]> git.sur5r.net Git - openocd/commitdiff
armv7a: rename l2_cache to outer_cache
authorMatthias Welwarsky <matthias@welwarsky.de>
Thu, 15 Oct 2015 15:28:46 +0000 (17:28 +0200)
committerPaul Fertser <fercerpav@gmail.com>
Mon, 30 Nov 2015 05:40:05 +0000 (05:40 +0000)
The outer cache is not necessarily at L2 in a system. Rename functions
to make that clear.

Change-Id: Ia636a4844f50634f2bdf5cdce285febc1a47c11f
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3020
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
src/target/armv7a.c
src/target/armv7a.h
src/target/armv7a_cache_l2x.c

index cea2ac48a737dd429a004e51a17177087d902ad8..6a2393970979164b5c95a2a0aafc60a665ef97aa 100644 (file)
@@ -409,7 +409,7 @@ static int armv7a_l2x_flush_all_data(struct target *target)
        int retval = ERROR_FAIL;
        struct armv7a_common *armv7a = target_to_armv7a(target);
        struct armv7a_l2x_cache *l2x_cache = (struct armv7a_l2x_cache *)
-               (armv7a->armv7a_mmu.armv7a_cache.l2_cache);
+               (armv7a->armv7a_mmu.armv7a_cache.outer_cache);
        uint32_t base = l2x_cache->base;
        uint32_t l2_way = l2x_cache->way;
        uint32_t l2_way_val = (1 << l2_way) - 1;
@@ -429,7 +429,7 @@ static int armv7a_handle_l2x_cache_info_command(struct command_context *cmd_ctx,
 {
 
        struct armv7a_l2x_cache *l2x_cache = (struct armv7a_l2x_cache *)
-               (armv7a_cache->l2_cache);
+               (armv7a_cache->outer_cache);
 
        if (armv7a_cache->ctype == -1) {
                command_print(cmd_ctx, "cache not yet identified");
@@ -469,9 +469,9 @@ static int armv7a_l2x_cache_init(struct target *target, uint32_t base, uint32_t
        l2x_cache->way = way;
        /*LOG_INFO("cache l2 initialized base %x  way %d",
        l2x_cache->base,l2x_cache->way);*/
-       if (armv7a->armv7a_mmu.armv7a_cache.l2_cache)
-               LOG_INFO("cache l2 already initialized\n");
-       armv7a->armv7a_mmu.armv7a_cache.l2_cache = l2x_cache;
+       if (armv7a->armv7a_mmu.armv7a_cache.outer_cache)
+               LOG_INFO("outer cache already initialized\n");
+       armv7a->armv7a_mmu.armv7a_cache.outer_cache = l2x_cache;
        /*  initialize l1 / l2x cache function  */
        armv7a->armv7a_mmu.armv7a_cache.flush_all_data_cache
                = armv7a_l2x_flush_all_data;
@@ -483,9 +483,9 @@ static int armv7a_l2x_cache_init(struct target *target, uint32_t base, uint32_t
                curr = head->target;
                if (curr != target) {
                        armv7a = target_to_armv7a(curr);
-                       if (armv7a->armv7a_mmu.armv7a_cache.l2_cache)
-                               LOG_ERROR("smp target : cache l2 already initialized\n");
-                       armv7a->armv7a_mmu.armv7a_cache.l2_cache = l2x_cache;
+                       if (armv7a->armv7a_mmu.armv7a_cache.outer_cache)
+                               LOG_ERROR("smp target : outer cache already initialized\n");
+                       armv7a->armv7a_mmu.armv7a_cache.outer_cache = l2x_cache;
                        armv7a->armv7a_mmu.armv7a_cache.flush_all_data_cache =
                                armv7a_l2x_flush_all_data;
                        armv7a->armv7a_mmu.armv7a_cache.display_cache_info =
@@ -748,8 +748,8 @@ int armv7a_init_arch_info(struct target *target, struct armv7a_common *armv7a)
        armv7a->arm.target = target;
        armv7a->arm.common_magic = ARM_COMMON_MAGIC;
        armv7a->common_magic = ARMV7_COMMON_MAGIC;
-       armv7a->armv7a_mmu.armv7a_cache.l2_cache = NULL;
        armv7a->armv7a_mmu.armv7a_cache.ctype = -1;
+       armv7a->armv7a_mmu.armv7a_cache.outer_cache = NULL;
        armv7a->armv7a_mmu.armv7a_cache.flush_all_data_cache = NULL;
        armv7a->armv7a_mmu.armv7a_cache.display_cache_info = NULL;
        armv7a->armv7a_mmu.armv7a_cache.auto_cache_enabled = 1;
index d1834cced970f7071217a64e53d6f85e80d4c9dd..69ccbd914b23aba3d8163a14b377f07d67a74c17 100644 (file)
@@ -73,8 +73,8 @@ struct armv7a_cache_common {
        int d_u_cache_enabled;
        int auto_cache_enabled;                 /* openocd automatic
                                                 * cache handling */
-       /* l2 external unified cache if some */
-       void *l2_cache;
+       /* outer unified cache if some */
+       void *outer_cache;
        int (*flush_all_data_cache)(struct target *target);
        int (*display_cache_info)(struct command_context *cmd_ctx,
                        struct armv7a_cache_common *armv7a_cache);
index 13156193848275511bb1cfa51f4f8c83c4e38d17..8b5fc43247a48b52650a355d83d050ff0848950d 100644 (file)
@@ -29,7 +29,7 @@ static int arm7a_l2x_sanity_check(struct target *target)
 {
        struct armv7a_common *armv7a = target_to_armv7a(target);
        struct armv7a_l2x_cache *l2x_cache = (struct armv7a_l2x_cache *)
-               (armv7a->armv7a_mmu.armv7a_cache.l2_cache);
+               (armv7a->armv7a_mmu.armv7a_cache.outer_cache);
 
        if (target->state != TARGET_HALTED) {
                LOG_ERROR("%s: target not halted", __func__);
@@ -50,7 +50,7 @@ static int arm7a_l2x_flush_all_data(struct target *target)
 {
        struct armv7a_common *armv7a = target_to_armv7a(target);
        struct armv7a_l2x_cache *l2x_cache = (struct armv7a_l2x_cache *)
-               (armv7a->armv7a_mmu.armv7a_cache.l2_cache);
+               (armv7a->armv7a_mmu.armv7a_cache.outer_cache);
        uint32_t l2_way_val;
        int retval;
 
@@ -70,7 +70,7 @@ int armv7a_l2x_cache_flush_virt(struct target *target, uint32_t virt,
 {
        struct armv7a_common *armv7a = target_to_armv7a(target);
        struct armv7a_l2x_cache *l2x_cache = (struct armv7a_l2x_cache *)
-               (armv7a->armv7a_mmu.armv7a_cache.l2_cache);
+               (armv7a->armv7a_mmu.armv7a_cache.outer_cache);
        /* FIXME: different controllers have different linelen? */
        uint32_t i, linelen = 32;
        int retval;
@@ -106,7 +106,7 @@ static int armv7a_l2x_cache_inval_virt(struct target *target, uint32_t virt,
 {
        struct armv7a_common *armv7a = target_to_armv7a(target);
        struct armv7a_l2x_cache *l2x_cache = (struct armv7a_l2x_cache *)
-               (armv7a->armv7a_mmu.armv7a_cache.l2_cache);
+               (armv7a->armv7a_mmu.armv7a_cache.outer_cache);
        /* FIXME: different controllers have different linelen */
        uint32_t i, linelen = 32;
        int retval;
@@ -142,7 +142,7 @@ static int armv7a_l2x_cache_clean_virt(struct target *target, uint32_t virt,
 {
        struct armv7a_common *armv7a = target_to_armv7a(target);
        struct armv7a_l2x_cache *l2x_cache = (struct armv7a_l2x_cache *)
-               (armv7a->armv7a_mmu.armv7a_cache.l2_cache);
+               (armv7a->armv7a_mmu.armv7a_cache.outer_cache);
        /* FIXME: different controllers have different linelen */
        uint32_t i, linelen = 32;
        int retval;
@@ -177,7 +177,7 @@ static int arm7a_handle_l2x_cache_info_command(struct command_context *cmd_ctx,
        struct armv7a_cache_common *armv7a_cache)
 {
        struct armv7a_l2x_cache *l2x_cache = (struct armv7a_l2x_cache *)
-               (armv7a_cache->l2_cache);
+               (armv7a_cache->outer_cache);
 
        if (armv7a_cache->ctype == -1) {
                command_print(cmd_ctx, "cache not yet identified");
@@ -198,7 +198,7 @@ static int armv7a_l2x_cache_init(struct target *target, uint32_t base, uint32_t
        struct target *curr;
 
        struct armv7a_common *armv7a = target_to_armv7a(target);
-       if (armv7a->armv7a_mmu.armv7a_cache.l2_cache) {
+       if (armv7a->armv7a_mmu.armv7a_cache.outer_cache) {
                LOG_ERROR("L2 cache was already initialised\n");
                return ERROR_FAIL;
        }
@@ -206,7 +206,7 @@ static int armv7a_l2x_cache_init(struct target *target, uint32_t base, uint32_t
        l2x_cache = calloc(1, sizeof(struct armv7a_l2x_cache));
        l2x_cache->base = base;
        l2x_cache->way = way;
-       armv7a->armv7a_mmu.armv7a_cache.l2_cache = l2x_cache;
+       armv7a->armv7a_mmu.armv7a_cache.outer_cache = l2x_cache;
 
        /*  initialize all targets in this cluster (smp target)
         *  l2 cache must be configured after smp declaration */
@@ -214,11 +214,11 @@ static int armv7a_l2x_cache_init(struct target *target, uint32_t base, uint32_t
                curr = head->target;
                if (curr != target) {
                        armv7a = target_to_armv7a(curr);
-                       if (armv7a->armv7a_mmu.armv7a_cache.l2_cache) {
+                       if (armv7a->armv7a_mmu.armv7a_cache.outer_cache) {
                                LOG_ERROR("smp target : cache l2 already initialized\n");
                                return ERROR_FAIL;
                        }
-                       armv7a->armv7a_mmu.armv7a_cache.l2_cache = l2x_cache;
+                       armv7a->armv7a_mmu.armv7a_cache.outer_cache = l2x_cache;
                }
                head = head->next;
        }