Rework the low power demo that uses the RTCC clock on the Pearl Gecko, and add attent...

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@2424 1d2547de-c912-0410-9cb9-b8ca96c0e9e2

diff --git a/FreeRTOS/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/Low_Power_Demo/low_power_tick_management_RTCC.c b/FreeRTOS/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/Low_Power_Demo/low_power_tick_management_RTCC.c
index 6e75baed94ca58fc0845007de524f25cd7e4c1e3..59dc1c15487a7920127a9173f8aa8bc4dac95914 100644 (file)
--- a/FreeRTOS/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/Low_Power_Demo/low_power_tick_management_RTCC.c
+++ b/FreeRTOS/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/Low_Power_Demo/low_power_tick_management_RTCC.c
@@ -79,6 +79,7 @@
 #include "em_rtcc.h"\r
 #include "em_rmu.h"\r
 #include "em_int.h"\r
+#include "em_letimer.h"\r
 #include "sleep.h"\r
 \r
 /* SEE THE COMMENTS ABOVE THE DEFINITION OF configCREATE_LOW_POWER_DEMO IN\r
@@ -88,6 +89,11 @@ in the RTOS port layer.  Therefore only build this file if the low power demo
 is being built. */\r
 #if( configCREATE_LOW_POWER_DEMO == 1 )\r
 \r
+/* When lpUSE_TEST_TIMER is 1 a second timer will be used to bring the MCU out\r
+of its low power state before the expected idle time has completed.  This is\r
+done purely for test coverage purposes. */\r
+#define lpUSE_TEST_TIMER       ( 0 )\r
+\r
 /* The RTCC channel used to generate the tick interrupt. */\r
 #define lpRTCC_CHANNEL         ( 1 )\r
 \r
@@ -191,12 +197,22 @@ void vPortSetupTimerInterrupt( void )
        NVIC_EnableIRQ( RTCC_IRQn );\r
        RTCC_IntEnable( RTCC_IEN_CC1 );\r
        RTCC_Enable( true );\r
+\r
+       #if( lpUSE_TEST_TIMER == 1 )\r
+       {\r
+               void prvSetupTestTimer( void );\r
+\r
+               /* A second timer is used to test the path where the MCU is brought out\r
+               of a low power state by a timer other than the tick timer. */\r
+               prvSetupTestTimer();\r
+       }\r
+       #endif\r
 }\r
 /*-----------------------------------------------------------*/\r
 \r
 void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )\r
 {\r
-uint32_t ulReloadValue, ulCompleteTickPeriods, ulCountBeforeSleep, ulCountAfterSleep;\r
+uint32_t ulReloadValue, ulCompleteTickPeriods, ulCountAfterSleep;\r
 eSleepModeStatus eSleepAction;\r
 TickType_t xModifiableIdleTime;\r
 \r
@@ -221,17 +237,9 @@ TickType_t xModifiableIdleTime;
        /* Stop the RTC momentarily.  The time the RTC is stopped for is accounted\r
        for as best it can be, but using the tickless mode will inevitably result\r
        in some tiny drift of the time maintained by the kernel with respect to\r
-       calendar time.  The count is latched before stopping the timer as stopping\r
-       the timer appears to clear the count. */\r
-       ulCountBeforeSleep = RTCC_CounterGet();\r
+       calendar time. */\r
        RTCC_Enable( false );\r
 \r
-       /* If this function is re-entered before one complete tick period then the\r
-       reload value might be set to take into account a partial time slice, but\r
-       just reading the count assumes it is counting up to a full ticks worth - so\r
-       add in the difference if any. */\r
-       ulCountBeforeSleep += ( ulReloadValueForOneTick - RTCC_ChannelCCVGet( lpRTCC_CHANNEL ) );\r
-\r
        /* Enter a critical section but don't use the taskENTER_CRITICAL() method as\r
        that will mask interrupts that should exit sleep mode. */\r
        INT_Disable();\r
@@ -249,20 +257,16 @@ TickType_t xModifiableIdleTime;
        eSleepAction = eTaskConfirmSleepModeStatus();\r
        if( eSleepAction == eAbortSleep )\r
        {\r
-               /* Restart tick and count up to whatever was left of the current time\r
+               /* Restart tick and continue counting to complete the current time\r
                slice. */\r
-               RTCC_ChannelCCVSet( lpRTCC_CHANNEL, ( ulReloadValueForOneTick - ulCountBeforeSleep ) + ulStoppedTimerCompensation );\r
                RTCC_Enable( true );\r
 \r
-               /* Re-enable interrupts - see comments above the cpsid instruction()\r
+               /* Re-enable interrupts - see comments above the RTCC_Enable() call\r
                above. */\r
                INT_Enable();\r
        }\r
        else\r
        {\r
-               /* Adjust the reload value to take into account that the current time\r
-               slice is already partially complete. */\r
-               ulReloadValue -= ulCountBeforeSleep;\r
                RTCC_ChannelCCVSet( lpRTCC_CHANNEL, ulReloadValue );\r
 \r
                /* Restart the RTC. */\r
@@ -288,12 +292,11 @@ TickType_t xModifiableIdleTime;
                /* Stop RTC.  Again, the time the SysTick is stopped for is accounted\r
                for as best it can be, but using the tickless mode will inevitably\r
                result in some tiny drift of the time maintained by the kernel with\r
-               respect to calendar time.  The count value is latched before stopping\r
-               the timer as stopping the timer appears to clear the count. */\r
-               ulCountAfterSleep = RTCC_CounterGet();\r
+               respect to calendar time. */\r
                RTCC_Enable( false );\r
+               ulCountAfterSleep = RTCC_CounterGet();\r
 \r
-               /* Re-enable interrupts - see comments above the cpsid instruction()\r
+               /* Re-enable interrupts - see comments above the INT_Enable() call\r
                above. */\r
                INT_Enable();\r
                __asm volatile( "dsb" );\r
@@ -304,40 +307,30 @@ TickType_t xModifiableIdleTime;
                        /* The tick interrupt has already executed, although because this\r
                        function is called with the scheduler suspended the actual tick\r
                        processing will not occur until after this function has exited.\r
-                       Reset the reload value with whatever remains of this tick period. */\r
-                       ulReloadValue = ulReloadValueForOneTick - ulCountAfterSleep;\r
-                       RTCC_ChannelCCVSet( lpRTCC_CHANNEL, ulReloadValue );\r
-\r
-                       /* The tick interrupt handler will already have pended the tick\r
+                       The tick interrupt handler will already have pended the tick\r
                        processing in the kernel.  As the pending tick will be processed as\r
                        soon as this function exits, the tick value     maintained by the tick\r
                        is stepped forward by one less than the time spent sleeping.  The\r
                        actual stepping of the tick appears later in this function. */\r
                        ulCompleteTickPeriods = xExpectedIdleTime - 1UL;\r
+\r
+                       /* The interrupt should have reset the CCV value. */\r
+                       configASSERT( RTCC_ChannelCCVGet( lpRTCC_CHANNEL ) == ulReloadValueForOneTick );\r
                }\r
                else\r
                {\r
                        /* Something other than the tick interrupt ended the sleep.  How\r
                        many complete tick periods passed while the processor was\r
-                       sleeping?  Add back in the adjustment that was made to the reload\r
-                       value to account for the fact that a time slice was part way through\r
-                       when this function was called. */\r
-                       ulCountAfterSleep += ulCountBeforeSleep;\r
+                       sleeping? */\r
                        ulCompleteTickPeriods = ulCountAfterSleep / ulReloadValueForOneTick;\r
 \r
-                       /* The reload value is set to whatever fraction of a single tick\r
-                       period remains. */\r
-                       ulCountAfterSleep -= ( ulCompleteTickPeriods * ulReloadValueForOneTick );\r
-                       ulReloadValue = ulReloadValueForOneTick - ulCountAfterSleep;\r
-\r
-                       if( ulReloadValue == 0 )\r
-                       {\r
-                               /* There is no fraction remaining. */\r
-                               ulReloadValue = ulReloadValueForOneTick;\r
-                               ulCompleteTickPeriods++;\r
-                       }\r
-\r
-                       RTCC_ChannelCCVSet( lpRTCC_CHANNEL, ulReloadValue );\r
+                       /* The next interrupt is configured to occur at whatever fraction of\r
+                       the current tick period remains by setting the reload value back to\r
+                       that required for one tick, and truncating the count to remove the\r
+                       counts that are greater than the reload value. */\r
+                       RTCC_ChannelCCVSet( lpRTCC_CHANNEL, ulReloadValueForOneTick );\r
+                       ulCountAfterSleep %= ulReloadValueForOneTick;\r
+                       RTCC_CounterSet( ulCountAfterSleep );\r
                }\r
 \r
                /* Restart the RTC so it runs up to the alarm value.  The alarm value\r
@@ -379,4 +372,55 @@ void RTCC_IRQHandler( void )
 }\r
 /*-----------------------------------------------------------*/\r
 \r
+#if( lpUSE_TEST_TIMER == 1 )\r
+\r
+       /* Juse used to ensure the second timer is executing. */\r
+       volatile uint32_t ulLETimerIncrements = 0;\r
+\r
+       void LETIMER0_IRQHandler( void )\r
+       {\r
+               /* This ISR is used purely to bring the MCU out of sleep mode - it has\r
+               no other purpose. */\r
+               ulLETimerIncrements++;\r
+               LETIMER_IntClear( LETIMER0, LETIMER_IF_COMP0 );\r
+       }\r
+\r
+#endif /* lpUSE_TEST_TIMER == 1 */\r
+/*-----------------------------------------------------------*/\r
+\r
+#if( lpUSE_TEST_TIMER == 1 )\r
+\r
+       /* Set up a timer that used used to bring the MCU out of sleep mode using\r
+       an interrupt other than the tick interrupt.  This is done for code coverage\r
+       puposes only. */\r
+       void prvSetupTestTimer( void )\r
+       {\r
+       static const LETIMER_Init_TypeDef xLETimerInitStruct =\r
+       {\r
+               true,               /* Enable timer when init complete. */\r
+               false,              /* Stop counter during debug halt. */\r
+               true,               /* Load COMP0 into CNT on underflow. */\r
+               false,              /* Do not load COMP1 into COMP0 when REP0 reaches 0. */\r
+               0,                  /* Idle value 0 for output 0. */\r
+               0,                  /* Idle value 0 for output 1. */\r
+               letimerUFOANone,    /* No action on underflow on output 0. */\r
+               letimerUFOANone,    /* No action on underflow on output 1. */\r
+               letimerRepeatFree   /* Count until stopped by SW. */\r
+       };\r
+       const uint32_t ulCompareMatch = 32768UL / 10UL;\r
+\r
+               CMU_ClockSelectSet( cmuClock_LFA, cmuSelect_LFXO );\r
+               CMU_ClockEnable( cmuClock_LETIMER0, true );\r
+\r
+               LETIMER_CompareSet( LETIMER0, 0, ulCompareMatch );\r
+               LETIMER_IntEnable( LETIMER0, LETIMER_IF_COMP0 );\r
+               NVIC_EnableIRQ( LETIMER0_IRQn );\r
+               LETIMER_Init( LETIMER0, &xLETimerInitStruct);\r
+       }\r
+\r
+#endif /* lpUSE_TEST_TIMER == 1 */\r
+\r
+\r
+\r
+\r
 #endif /* ( configCREATE_LOW_POWER_DEMO == 1 ) */\r