/* portNOP() is not required by this port. */\r
#define portNOP()\r
\r
+#define portINLINE __inline\r
+\r
+#ifndef portFORCE_INLINE\r
+ #define portFORCE_INLINE inline __attribute__(( always_inline))\r
+#endif\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void )\r
+{\r
+uint32_t ulCurrentInterrupt;\r
+BaseType_t xReturn;\r
+\r
+ /* Obtain the number of the currently executing interrupt. */\r
+ __asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );\r
+\r
+ if( ulCurrentInterrupt == 0 )\r
+ {\r
+ xReturn = pdFALSE;\r
+ }\r
+ else\r
+ {\r
+ xReturn = pdTRUE;\r
+ }\r
+\r
+ return xReturn;\r
+}\r
+\r
/*-----------------------------------------------------------*/\r
\r
/* Suppress warnings that are generated by the IAR tools, but cannot be fixed in\r
#define portBYTE_ALIGNMENT 8\r
/*-----------------------------------------------------------*/\r
\r
+/* Compiler directives. */\r
+#define portWEAK_SYMBOL __attribute__( ( weak ) )\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+\r
/* Scheduler utilities. */\r
#define portYIELD() \\r
{ \\r
/* portNOP() is not required by this port. */\r
#define portNOP()\r
\r
+#define portINLINE __inline\r
+\r
+#ifndef portFORCE_INLINE\r
+ #define portFORCE_INLINE inline __attribute__(( always_inline))\r
+#endif\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void )\r
+{\r
+uint32_t ulCurrentInterrupt;\r
+BaseType_t xReturn;\r
+\r
+ /* Obtain the number of the currently executing interrupt. */\r
+ __asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );\r
+\r
+ if( ulCurrentInterrupt == 0 )\r
+ {\r
+ xReturn = pdFALSE;\r
+ }\r
+ else\r
+ {\r
+ xReturn = pdTRUE;\r
+ }\r
+\r
+ return xReturn;\r
+}\r
+\r
/*-----------------------------------------------------------*/\r
\r
/* Suppress warnings that are generated by the IAR tools, but cannot be fixed in\r
\r
/* portNOP() is not required by this port. */\r
#define portNOP()\r
+\r
+#define portINLINE __inline\r
+\r
+#ifndef portFORCE_INLINE\r
+ #define portFORCE_INLINE inline __attribute__(( always_inline))\r
+#endif\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void )\r
+{\r
+uint32_t ulCurrentInterrupt;\r
+BaseType_t xReturn;\r
+\r
+ /* Obtain the number of the currently executing interrupt. */\r
+ __asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );\r
+\r
+ if( ulCurrentInterrupt == 0 )\r
+ {\r
+ xReturn = pdFALSE;\r
+ }\r
+ else\r
+ {\r
+ xReturn = pdTRUE;\r
+ }\r
+\r
+ return xReturn;\r
+}\r
+\r
+\r
/*-----------------------------------------------------------*/\r
\r
extern BaseType_t xIsPrivileged( void );\r
#define portBYTE_ALIGNMENT 8\r
/*-----------------------------------------------------------*/\r
\r
+/* Compiler directives. */\r
+#define portWEAK_SYMBOL __attribute__( ( weak ) )\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+\r
/* Scheduler utilities. */\r
#define portYIELD() \\r
{ \\r
/* portNOP() is not required by this port. */\r
#define portNOP()\r
\r
+#define portINLINE __inline\r
+\r
+#ifndef portFORCE_INLINE\r
+ #define portFORCE_INLINE inline __attribute__(( always_inline))\r
+#endif\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void )\r
+{\r
+uint32_t ulCurrentInterrupt;\r
+BaseType_t xReturn;\r
+\r
+ /* Obtain the number of the currently executing interrupt. */\r
+ __asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );\r
+\r
+ if( ulCurrentInterrupt == 0 )\r
+ {\r
+ xReturn = pdFALSE;\r
+ }\r
+ else\r
+ {\r
+ xReturn = pdTRUE;\r
+ }\r
+\r
+ return xReturn;\r
+}\r
+\r
/*-----------------------------------------------------------*/\r
\r
/* Suppress warnings that are generated by the IAR tools, but cannot be fixed in\r
/* Used to program the machine timer compare register. */\r
uint64_t ullNextTime = 0ULL;\r
const uint64_t *pullNextTime = &ullNextTime;\r
-const size_t uxTimerIncrementsForOneTick = ( size_t ) ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ); /* Assumes increment won't go over 32-bits. */\r
-volatile uint64_t * const pullMachineTimerCompareRegisterBase = ( uint64_t * ) ( configCLINT_BASE_ADDRESS + 0x4000 );\r
+const size_t uxTimerIncrementsForOneTick = ( size_t ) ( ( configCPU_CLOCK_HZ ) / ( configTICK_RATE_HZ ) ); /* Assumes increment won't go over 32-bits. */\r
+volatile uint64_t * const pullMachineTimerCompareRegisterBase = ( uint64_t * ) ( ( configCLINT_BASE_ADDRESS ) + 0x4000 );\r
volatile uint64_t * pullMachineTimerCompareRegister = 0;\r
/* Set configCHECK_FOR_STACK_OVERFLOW to 3 to add ISR stack checking to task\r
stack checking. A problem in the ISR stack will trigger an assert, not call the\r