]> git.sur5r.net Git - freertos/commitdiff
First working MCF52221 demo.
authorrichardbarry <richardbarry@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Tue, 21 Oct 2008 10:18:47 +0000 (10:18 +0000)
committerrichardbarry <richardbarry@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Tue, 21 Oct 2008 10:18:47 +0000 (10:18 +0000)
git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@508 1d2547de-c912-0410-9cb9-b8ca96c0e9e2

Demo/ColdFire_MCF52221_CodeWarrior/RTOSDemo.mcp
Demo/ColdFire_MCF52221_CodeWarrior/RTOSDemo_Data/CWSettingsWindows.stg
Demo/ColdFire_MCF52221_CodeWarrior/RTOSDemo_Data/INTERNAL_FLASH/TargetDataWindows.tdt
Demo/ColdFire_MCF52221_CodeWarrior/lcf/MCF52221_CONSOLE_INTERNAL_RAM.lcf [deleted file]
Demo/ColdFire_MCF52221_CodeWarrior/lcf/MCF52221_INTERNAL_FLASH.lcf
Demo/ColdFire_MCF52221_CodeWarrior/lcf/MCF52221_INTERNAL_RAM.lcf [deleted file]
Demo/ColdFire_MCF52221_CodeWarrior/sources/FreeRTOSConfig.h
Demo/ColdFire_MCF52221_CodeWarrior/sources/FreeRTOS_Tick_Setup.c
Demo/ColdFire_MCF52221_CodeWarrior/sources/main.c

index 28b292be25cd1959734489f4caa5b0f3d318ccba..8375979944682e0340d399706b9fd9962eeeae50 100644 (file)
Binary files a/Demo/ColdFire_MCF52221_CodeWarrior/RTOSDemo.mcp and b/Demo/ColdFire_MCF52221_CodeWarrior/RTOSDemo.mcp differ
index 9c3ff743ce64f10c477ac5089554181983116de4..75b25711d9bb5ce0fc8ffe43b44a98bcb6bc11be 100644 (file)
Binary files a/Demo/ColdFire_MCF52221_CodeWarrior/RTOSDemo_Data/CWSettingsWindows.stg and b/Demo/ColdFire_MCF52221_CodeWarrior/RTOSDemo_Data/CWSettingsWindows.stg differ
index 608dcf48a8c69ef7e533086ae23267477dd11262..1b913d221aa79c823c08bc00083c7b82b7f10e5c 100644 (file)
Binary files a/Demo/ColdFire_MCF52221_CodeWarrior/RTOSDemo_Data/INTERNAL_FLASH/TargetDataWindows.tdt and b/Demo/ColdFire_MCF52221_CodeWarrior/RTOSDemo_Data/INTERNAL_FLASH/TargetDataWindows.tdt differ
diff --git a/Demo/ColdFire_MCF52221_CodeWarrior/lcf/MCF52221_CONSOLE_INTERNAL_RAM.lcf b/Demo/ColdFire_MCF52221_CodeWarrior/lcf/MCF52221_CONSOLE_INTERNAL_RAM.lcf
deleted file mode 100644 (file)
index b6ecc52..0000000
+++ /dev/null
@@ -1,133 +0,0 @@
-# Sample Linker Command File for CodeWarrior for ColdFire\r
-\r
-KEEP_SECTION {.vectortable}\r
-\r
-# Memory ranges        \r
-\r
-MEMORY {\r
-   vectorram   (RWX) : ORIGIN = 0x20000000, LENGTH = 0x00000500\r
-   code        (RX)  : ORIGIN = 0x20000500, LENGTH = 0x00002B00\r
-   userram     (RWX) : ORIGIN = 0x20003000, LENGTH = 0x00001000\r
-}\r
-\r
-SECTIONS {\r
\r
-# Heap and Stack sizes definition\r
-       ___heap_size      = 0x400;\r
-       ___stack_size     = 0x400;\r
-\r
-\r
-\r
-# MCF52221 Derivative Memory map definitions from linker command files:\r
-# __IPSBAR, __RAMBAR, __RAMBAR_SIZE, __FLASHBAR, __FLASHBAR_SIZE linker\r
-# symbols must be defined in the linker command file.\r
-\r
-# Memory Mapped Registers (IPSBAR= 0x40000000)\r
-   ___IPSBAR         = 0x40000000;\r
-\r
-# 16 Kbytes Internal SRAM\r
-   ___RAMBAR         = 0x20000000;\r
-   ___RAMBAR_SIZE    = 0x00004000;\r
-\r
-# 128 KByte Internal Flash Memory\r
-   ___FLASHBAR       = 0x00000000;\r
-   ___FLASHBAR_SIZE  = 0x00020000;\r
-\r
-   ___SP_AFTER_RESET = ___RAMBAR + ___RAMBAR_SIZE - 4;\r
-   \r
-  .userram       : {} > userram                \r
-  .code            : {} > code         \r
-  .vectorram   : {} > vectorram                        \r
-       \r
-       .vectors :\r
-       {\r
-               exceptions.c(.vectortable)\r
-               . = ALIGN (0x4); \r
-       } >> code\r
-\r
-\r
-       .text :\r
-       {\r
-               *(.text)\r
-               . = ALIGN (0x4);\r
-               *(.rodata)\r
-               . = ALIGN (0x4);                \r
-               ___ROM_AT = .;\r
-               ___DATA_ROM = .;\r
-       } >> code\r
-\r
-       .data : AT(___ROM_AT) \r
-       {  \r
-               ___DATA_RAM = .;\r
-               . = ALIGN(0x4);\r
-               *(.exception)   \r
-               . = ALIGN(0x4); \r
-               __exception_table_start__ = .;\r
-               EXCEPTION\r
-               __exception_table_end__ = .;\r
-               \r
-               ___sinit__ = .;\r
-           STATICINIT\r
-               __START_DATA = .;\r
-\r
-               *(.data)\r
-               . = ALIGN (0x4);\r
-               __END_DATA = .;\r
-\r
-               __START_SDATA = .;\r
-               *(.sdata)\r
-               . = ALIGN (0x4);\r
-               __END_SDATA = .;\r
-\r
-               ___DATA_END = .;\r
-               __SDA_BASE = .;\r
-               . = ALIGN (0x4);\r
-       } >> userram\r
-\r
-       .bss :\r
-       {\r
-               ___BSS_START = .;\r
-               __START_SBSS = .;\r
-               *(.sbss)\r
-               . = ALIGN (0x4);\r
-               *(SCOMMON)\r
-               __END_SBSS = .;\r
-\r
-               __START_BSS = .;\r
-               *(.bss)\r
-               . = ALIGN (0x4);\r
-               *(COMMON)\r
-               __END_BSS = .;\r
-               ___BSS_END = .;\r
-\r
-               . = ALIGN(0x4);\r
-       } >> userram\r
-\r
-       .custom :\r
-       {\r
-               ___HEAP_START   = .;\r
-               ___heap_addr    = ___HEAP_START;\r
-               ___HEAP_END             = ___HEAP_START + ___heap_size;\r
-               ___SP_END               = ___HEAP_END;\r
-               ___SP_INIT              = ___SP_END + ___stack_size;\r
-\r
-               . = ALIGN (0x4);\r
-       } >> userram\r
-       \r
-       ___VECTOR_RAM           = ADDR(.vectorram);\r
-       \r
-       __SP_INIT               = ___SP_INIT;\r
-\r
-       _romp_at = ___ROM_AT + SIZEOF(.data);\r
-       .romp : AT(_romp_at)\r
-       {\r
-               __S_romp = _romp_at;\r
-               WRITEW(___ROM_AT);\r
-               WRITEW(ADDR(.data));\r
-               WRITEW(SIZEOF(.data));\r
-               WRITEW(0);\r
-               WRITEW(0);\r
-               WRITEW(0);\r
-       }\r
-\r
-}
\ No newline at end of file
index 6cf788e782367fa781f00d6128e074c41c10b176..72d2c1e8e356582f1bbd4797f1a3fa4002269f63 100644 (file)
@@ -8,14 +8,14 @@ MEMORY {
    vectorrom   (RX)  : ORIGIN = 0x00000000, LENGTH = 0x00000400\r
    cfmprotrom  (RX)  : ORIGIN = 0x00000400, LENGTH = 0x00000020   \r
    code        (RX)  : ORIGIN = 0x00000500, LENGTH = 0x0001FB00\r
-   userram     (RWX) : ORIGIN = 0x20000400, LENGTH = 0x00003C00\r
+   userram     (RWX) : ORIGIN = 0x20000000, LENGTH = 0x00003C00\r
 }\r
 \r
 SECTIONS {\r
 \r
 # Heap and Stack sizes definition\r
        ___heap_size      = 0x4;\r
-       ___stack_size     = 0x200;\r
+       ___stack_size     = 0x100;\r
        \r
 \r
 \r
diff --git a/Demo/ColdFire_MCF52221_CodeWarrior/lcf/MCF52221_INTERNAL_RAM.lcf b/Demo/ColdFire_MCF52221_CodeWarrior/lcf/MCF52221_INTERNAL_RAM.lcf
deleted file mode 100644 (file)
index b6ecc52..0000000
+++ /dev/null
@@ -1,133 +0,0 @@
-# Sample Linker Command File for CodeWarrior for ColdFire\r
-\r
-KEEP_SECTION {.vectortable}\r
-\r
-# Memory ranges        \r
-\r
-MEMORY {\r
-   vectorram   (RWX) : ORIGIN = 0x20000000, LENGTH = 0x00000500\r
-   code        (RX)  : ORIGIN = 0x20000500, LENGTH = 0x00002B00\r
-   userram     (RWX) : ORIGIN = 0x20003000, LENGTH = 0x00001000\r
-}\r
-\r
-SECTIONS {\r
\r
-# Heap and Stack sizes definition\r
-       ___heap_size      = 0x400;\r
-       ___stack_size     = 0x400;\r
-\r
-\r
-\r
-# MCF52221 Derivative Memory map definitions from linker command files:\r
-# __IPSBAR, __RAMBAR, __RAMBAR_SIZE, __FLASHBAR, __FLASHBAR_SIZE linker\r
-# symbols must be defined in the linker command file.\r
-\r
-# Memory Mapped Registers (IPSBAR= 0x40000000)\r
-   ___IPSBAR         = 0x40000000;\r
-\r
-# 16 Kbytes Internal SRAM\r
-   ___RAMBAR         = 0x20000000;\r
-   ___RAMBAR_SIZE    = 0x00004000;\r
-\r
-# 128 KByte Internal Flash Memory\r
-   ___FLASHBAR       = 0x00000000;\r
-   ___FLASHBAR_SIZE  = 0x00020000;\r
-\r
-   ___SP_AFTER_RESET = ___RAMBAR + ___RAMBAR_SIZE - 4;\r
-   \r
-  .userram       : {} > userram                \r
-  .code            : {} > code         \r
-  .vectorram   : {} > vectorram                        \r
-       \r
-       .vectors :\r
-       {\r
-               exceptions.c(.vectortable)\r
-               . = ALIGN (0x4); \r
-       } >> code\r
-\r
-\r
-       .text :\r
-       {\r
-               *(.text)\r
-               . = ALIGN (0x4);\r
-               *(.rodata)\r
-               . = ALIGN (0x4);                \r
-               ___ROM_AT = .;\r
-               ___DATA_ROM = .;\r
-       } >> code\r
-\r
-       .data : AT(___ROM_AT) \r
-       {  \r
-               ___DATA_RAM = .;\r
-               . = ALIGN(0x4);\r
-               *(.exception)   \r
-               . = ALIGN(0x4); \r
-               __exception_table_start__ = .;\r
-               EXCEPTION\r
-               __exception_table_end__ = .;\r
-               \r
-               ___sinit__ = .;\r
-           STATICINIT\r
-               __START_DATA = .;\r
-\r
-               *(.data)\r
-               . = ALIGN (0x4);\r
-               __END_DATA = .;\r
-\r
-               __START_SDATA = .;\r
-               *(.sdata)\r
-               . = ALIGN (0x4);\r
-               __END_SDATA = .;\r
-\r
-               ___DATA_END = .;\r
-               __SDA_BASE = .;\r
-               . = ALIGN (0x4);\r
-       } >> userram\r
-\r
-       .bss :\r
-       {\r
-               ___BSS_START = .;\r
-               __START_SBSS = .;\r
-               *(.sbss)\r
-               . = ALIGN (0x4);\r
-               *(SCOMMON)\r
-               __END_SBSS = .;\r
-\r
-               __START_BSS = .;\r
-               *(.bss)\r
-               . = ALIGN (0x4);\r
-               *(COMMON)\r
-               __END_BSS = .;\r
-               ___BSS_END = .;\r
-\r
-               . = ALIGN(0x4);\r
-       } >> userram\r
-\r
-       .custom :\r
-       {\r
-               ___HEAP_START   = .;\r
-               ___heap_addr    = ___HEAP_START;\r
-               ___HEAP_END             = ___HEAP_START + ___heap_size;\r
-               ___SP_END               = ___HEAP_END;\r
-               ___SP_INIT              = ___SP_END + ___stack_size;\r
-\r
-               . = ALIGN (0x4);\r
-       } >> userram\r
-       \r
-       ___VECTOR_RAM           = ADDR(.vectorram);\r
-       \r
-       __SP_INIT               = ___SP_INIT;\r
-\r
-       _romp_at = ___ROM_AT + SIZEOF(.data);\r
-       .romp : AT(_romp_at)\r
-       {\r
-               __S_romp = _romp_at;\r
-               WRITEW(___ROM_AT);\r
-               WRITEW(ADDR(.data));\r
-               WRITEW(SIZEOF(.data));\r
-               WRITEW(0);\r
-               WRITEW(0);\r
-               WRITEW(0);\r
-       }\r
-\r
-}
\ No newline at end of file
index 2cca51ac50049166b7a959e3c942990042b470c5..4480d1f144611130b816e49ac1da26ddf8616448 100644 (file)
  *----------------------------------------------------------*/\r
 \r
 #define configUSE_PREEMPTION                   1\r
-#define configUSE_IDLE_HOOK                            0\r
+#define configUSE_IDLE_HOOK                            1\r
 #define configUSE_TICK_HOOK                            0\r
 #define configCPU_CLOCK_HZ                             ( ( unsigned portLONG ) 80000000 )\r
 #define configTICK_RATE_HZ                             ( ( portTickType ) 100 )\r
-#define configMINIMAL_STACK_SIZE               ( ( unsigned portSHORT ) 160 )\r
-#define configTOTAL_HEAP_SIZE                  ( ( size_t ) ( 10 * 1024 ) ) /* The heap size is worked out from the linker script, so this constant is not used. */\r
+#define configMINIMAL_STACK_SIZE               ( ( unsigned portSHORT ) 140 )\r
+#define configTOTAL_HEAP_SIZE                  ( ( size_t ) ( 14 * 1024 ) )\r
 #define configMAX_TASK_NAME_LEN                        ( 12 )\r
 #define configUSE_TRACE_FACILITY               1\r
 #define configUSE_16_BIT_TICKS                 0\r
 #define configIDLE_SHOULD_YIELD                        0\r
-#define configUSE_CO_ROUTINES                  0\r
+#define configUSE_CO_ROUTINES                  1\r
 #define configUSE_MUTEXES                              1\r
 #define configCHECK_FOR_STACK_OVERFLOW 2\r
 #define configUSE_RECURSIVE_MUTEXES            1\r
index b9eb5eb768ce5f8854b850824348d0c15283ef0a..e32d4cf4ad7bd3b2fd8a1a282c13f3fd1a744a72 100644 (file)
@@ -51,7 +51,6 @@
 #include "task.h"\r
 \r
 __declspec(interrupt:0) void vPIT0InterruptHandler( void );\r
-extern unsigned portLONG __VECTOR_RAM[];\r
 \r
 /* Constants used to configure the interrupts. */\r
 #define portPRESCALE_VALUE                     64\r
@@ -62,7 +61,7 @@ extern unsigned portLONG __VECTOR_RAM[];
 /*\r
  * FreeRTOS.org requires two interrupts - a tick interrupt generated from a\r
  * timer source, and a spare interrupt vector used for context switching.\r
- * The configuration below uses PIT0 for the former, and vector 63 for the\r
+ * The configuration below uses PIT0 for the former, and vector 16 for the\r
  * latter.  **IF YOUR APPLICATION HAS BOTH OF THESE INTERRUPTS FREE THEN YOU DO\r
  * NOT NEED TO CHANGE ANY OF THIS CODE** - otherwise instructions are provided\r
  * here for using alternative interrupt sources.\r
@@ -92,7 +91,7 @@ extern unsigned portLONG __VECTOR_RAM[];
  *\r
  *  3) Change the name of the function __cs3_isr_interrupt_127() within portasm.S\r
  *  to be correct for whichever vector number is being used.  By default interrupt\r
- *  controller 0 number 63 is used, which corresponds to vector number 127.\r
+ *  controller 0 number 16 is used, which corresponds to vector number 127.\r
  */\r
 void vApplicationSetupInterrupts( void )\r
 {\r
index 0dba35c71249a2628ef4aa4d8d70f1802418dc3c..0b4502ceb9a22200650434f95c00627cc5b10c05 100644 (file)
@@ -81,7 +81,7 @@
 /* Demo app includes. */\r
 #include "BlockQ.h"\r
 #include "death.h"\r
-#include "flash.h"\r
+#include "crflash.h"\r
 #include "partest.h"\r
 #include "semtest.h"\r
 #include "PollQ.h"\r
@@ -117,6 +117,9 @@ error have been detected. */
 #define mainGEN_QUEUE_TASK_PRIORITY                    ( tskIDLE_PRIORITY )\r
 #define mainWEB_TASK_PRIORITY                  ( tskIDLE_PRIORITY + 2 )\r
 \r
+/* Co-routines are used to flash the LEDs. */\r
+#define mainNUM_FLASH_CO_ROUTINES                      ( 3 )\r
+\r
 /*\r
  * Configure the hardware for the demo.\r
  */\r
@@ -128,12 +131,6 @@ static void prvSetupHardware( void );
  */\r
 static void prvCheckTask( void *pvParameters );\r
 \r
-/*\r
- * Implement the 'Reg test' functionality as described at the top of this file.\r
- */\r
-static void vRegTest1Task( void *pvParameters );\r
-static void vRegTest2Task( void *pvParameters );\r
-\r
 /*-----------------------------------------------------------*/\r
 \r
 /* Counters used to detect errors within the reg test tasks. */\r
@@ -147,26 +144,17 @@ int main( void )
        prvSetupHardware();\r
 \r
        /* Start the standard demo tasks. */\r
-       vStartLEDFlashTasks( tskIDLE_PRIORITY );\r
        vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
-       vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );\r
        vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );\r
        vStartQueuePeekTasks();\r
-       vStartRecursiveMutexTasks();\r
        vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
 \r
-       /* Start the reg test tasks - defined in this file. */\r
-       xTaskCreate( vRegTest1Task, ( signed portCHAR * ) "Reg1", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest1Counter, tskIDLE_PRIORITY, NULL );\r
-       xTaskCreate( vRegTest2Task, ( signed portCHAR * ) "Reg2", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest2Counter, tskIDLE_PRIORITY, NULL );\r
+       /* For demo purposes use some co-routines to flash the LEDs. */\r
+       vStartFlashCoRoutines( mainNUM_FLASH_CO_ROUTINES );\r
 \r
        /* Create the check task. */\r
        xTaskCreate( prvCheckTask, ( signed portCHAR * ) "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );\r
 \r
-       /* The suicide tasks must be created last as they need to know how many\r
-       tasks were running prior to their creation in order to ascertain whether\r
-       or not the correct/expected number of tasks are running at any given time. */\r
-    vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY );\r
-\r
        /* Start the scheduler. */\r
        vTaskStartScheduler();\r
 \r
@@ -215,36 +203,8 @@ portTickType xLastExecutionTime;
                ulError |= 0x20UL;\r
            }\r
 \r
-               if( xArePollingQueuesStillRunning() != pdTRUE )\r
-           {\r
-               ulError |= 0x40UL;\r
-           }\r
-\r
-               if( xIsCreateTaskStillRunning() != pdTRUE )\r
-           {\r
-               ulError |= 0x80UL;\r
-           }\r
-\r
-               if( xAreRecursiveMutexTasksStillRunning() != pdTRUE )\r
-           {\r
-               ulError |= 0x200UL;\r
-           }\r
-\r
-               if( ulLastRegTest1Count == ulRegTest1Counter )\r
-               {\r
-                       ulError |= 0x1000UL;\r
-               }\r
-\r
-               if( ulLastRegTest2Count == ulRegTest2Counter )\r
-               {\r
-                       ulError |= 0x1000UL;\r
-               }\r
-\r
-               ulLastRegTest1Count = ulRegTest1Counter;\r
-               ulLastRegTest2Count = ulRegTest2Counter;\r
-\r
                /* If an error has been found then increase our cycle rate, and in so\r
-               going increase the rate at which the check task LED toggles. */\r
+               doing increase the rate at which the check task LED toggles. */\r
                if( ulError != 0 )\r
                {\r
                ulTicksToWait = mainERROR_PERIOD;\r
@@ -281,169 +241,19 @@ void vApplicationStackOverflowHook( xTaskHandle *pxTask, signed portCHAR *pcTask
 }\r
 /*-----------------------------------------------------------*/\r
 \r
-static void vRegTest1Task( void *pvParameters )\r
-{\r
-       /* Sanity check - did we receive the parameter expected? */\r
-       if( pvParameters != &ulRegTest1Counter )\r
-       {\r
-               /* Change here so the check task can detect that an error occurred. */\r
-               for( ;; )\r
-               {\r
-               }\r
-       }\r
-\r
-       /* Set all the registers to known values, then check that each retains its\r
-       expected value - as described at the top of this file.  If an error is\r
-       found then the loop counter will no longer be incremented allowing the check\r
-       task to recognise the error. */\r
-       asm volatile    (       "reg_test_1_start:                                              \n\t"\r
-                                               "       moveq           #1, d0                                  \n\t"\r
-                                               "       moveq           #2, d1                                  \n\t"\r
-                                               "       moveq           #3, d2                                  \n\t"\r
-                                               "       moveq           #4, d3                                  \n\t"\r
-                                               "       moveq           #5, d4                                  \n\t"\r
-                                               "       moveq           #6, d5                                  \n\t"\r
-                                               "       moveq           #7, d6                                  \n\t"\r
-                                               "       moveq           #8, d7                                  \n\t"\r
-                                               "       move            #9, a0                                  \n\t"\r
-                                               "       move            #10, a1                                 \n\t"\r
-                                               "       move            #11, a2                                 \n\t"\r
-                                               "       move            #12, a3                                 \n\t"\r
-                                               "       move            #13, a4                                 \n\t"\r
-                                               "       move            #14, a5                                 \n\t"\r
-                                               "       move            #15, a6                                 \n\t"\r
-                                               "                                                                               \n\t"\r
-                                               "       cmpi.l          #1, d0                                  \n\t"\r
-                                               "       bne                     reg_test_1_error                \n\t"\r
-                                               "       cmpi.l          #2, d1                                  \n\t"\r
-                                               "       bne                     reg_test_1_error                \n\t"\r
-                                               "       cmpi.l          #3, d2                                  \n\t"\r
-                                               "       bne                     reg_test_1_error                \n\t"\r
-                                               "       cmpi.l          #4, d3                                  \n\t"\r
-                                               "       bne                     reg_test_1_error                \n\t"\r
-                                               "       cmpi.l          #5, d4                                  \n\t"\r
-                                               "       bne                     reg_test_1_error                \n\t"\r
-                                               "       cmpi.l          #6, d5                                  \n\t"\r
-                                               "       bne                     reg_test_1_error                \n\t"\r
-                                               "       cmpi.l          #7, d6                                  \n\t"\r
-                                               "       bne                     reg_test_1_error                \n\t"\r
-                                               "       cmpi.l          #8, d7                                  \n\t"\r
-                                               "       bne                     reg_test_1_error                \n\t"\r
-                                               "       move            a0, d0                                  \n\t"\r
-                                               "       cmpi.l          #9, d0                                  \n\t"\r
-                                               "       bne                     reg_test_1_error                \n\t"\r
-                                               "       move            a1, d0                                  \n\t"\r
-                                               "       cmpi.l          #10, d0                                 \n\t"\r
-                                               "       bne                     reg_test_1_error                \n\t"\r
-                                               "       move            a2, d0                                  \n\t"\r
-                                               "       cmpi.l          #11, d0                                 \n\t"\r
-                                               "       bne                     reg_test_1_error                \n\t"\r
-                                               "       move            a3, d0                                  \n\t"\r
-                                               "       cmpi.l          #12, d0                                 \n\t"\r
-                                               "       bne                     reg_test_1_error                \n\t"\r
-                                               "       move            a4, d0                                  \n\t"\r
-                                               "       cmpi.l          #13, d0                                 \n\t"\r
-                                               "       bne                     reg_test_1_error                \n\t"\r
-                                               "       move            a5, d0                                  \n\t"\r
-                                               "       cmpi.l          #14, d0                                 \n\t"\r
-                                               "       bne                     reg_test_1_error                \n\t"\r
-                                               "       move            a6, d0                                  \n\t"\r
-                                               "       cmpi.l          #15, d0                                 \n\t"\r
-                                               "       bne                     reg_test_1_error                \n\t"\r
-                                               "       move            ulRegTest1Counter, d0   \n\t"\r
-                                               "       addq            #1, d0                                  \n\t"\r
-                                               "       move            d0, ulRegTest1Counter   \n\t"\r
-                                               "       bra                     reg_test_1_start                \n\t"\r
-                                               "reg_test_1_error:                                              \n\t"\r
-                                               "       bra                     reg_test_1_error                \n\t"\r
-                                       );\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-static void vRegTest2Task( void *pvParameters )\r
+void vApplicationIdleHook( void );\r
+void vApplicationIdleHook( void )\r
 {\r
-       /* Sanity check - did we receive the parameter expected? */\r
-       if( pvParameters != &ulRegTest2Counter )\r
-       {\r
-               /* Change here so the check task can detect that an error occurred. */\r
-               for( ;; )\r
-               {\r
-               }\r
-       }\r
-\r
-       /* Set all the registers to known values, then check that each retains its\r
-       expected value - as described at the top of this file.  If an error is\r
-       found then the loop counter will no longer be incremented allowing the check\r
-       task to recognise the error. */\r
-       asm volatile    (       "reg_test_2_start:                                              \n\t"\r
-                                               "       moveq           #10, d0                                 \n\t"\r
-                                               "       moveq           #20, d1                                 \n\t"\r
-                                               "       moveq           #30, d2                                 \n\t"\r
-                                               "       moveq           #40, d3                                 \n\t"\r
-                                               "       moveq           #50, d4                                 \n\t"\r
-                                               "       moveq           #60, d5                                 \n\t"\r
-                                               "       moveq           #70, d6                                 \n\t"\r
-                                               "       moveq           #80, d7                                 \n\t"\r
-                                               "       move            #90, a0                                 \n\t"\r
-                                               "       move            #100, a1                                \n\t"\r
-                                               "       move            #110, a2                                \n\t"\r
-                                               "       move            #120, a3                                \n\t"\r
-                                               "       move            #130, a4                                \n\t"\r
-                                               "       move            #140, a5                                \n\t"\r
-                                               "       move            #150, a6                                \n\t"\r
-                                               "                                                                               \n\t"\r
-                                               "       cmpi.l          #10, d0                                 \n\t"\r
-                                               "       bne                     reg_test_2_error                \n\t"\r
-                                               "       cmpi.l          #20, d1                                 \n\t"\r
-                                               "       bne                     reg_test_2_error                \n\t"\r
-                                               "       cmpi.l          #30, d2                                 \n\t"\r
-                                               "       bne                     reg_test_2_error                \n\t"\r
-                                               "       cmpi.l          #40, d3                                 \n\t"\r
-                                               "       bne                     reg_test_2_error                \n\t"\r
-                                               "       cmpi.l          #50, d4                                 \n\t"\r
-                                               "       bne                     reg_test_2_error                \n\t"\r
-                                               "       cmpi.l          #60, d5                                 \n\t"\r
-                                               "       bne                     reg_test_2_error                \n\t"\r
-                                               "       cmpi.l          #70, d6                                 \n\t"\r
-                                               "       bne                     reg_test_2_error                \n\t"\r
-                                               "       cmpi.l          #80, d7                                 \n\t"\r
-                                               "       bne                     reg_test_2_error                \n\t"\r
-                                               "       move            a0, d0                                  \n\t"\r
-                                               "       cmpi.l          #90, d0                                 \n\t"\r
-                                               "       bne                     reg_test_2_error                \n\t"\r
-                                               "       move            a1, d0                                  \n\t"\r
-                                               "       cmpi.l          #100, d0                                \n\t"\r
-                                               "       bne                     reg_test_2_error                \n\t"\r
-                                               "       move            a2, d0                                  \n\t"\r
-                                               "       cmpi.l          #110, d0                                \n\t"\r
-                                               "       bne                     reg_test_2_error                \n\t"\r
-                                               "       move            a3, d0                                  \n\t"\r
-                                               "       cmpi.l          #120, d0                                \n\t"\r
-                                               "       bne                     reg_test_2_error                \n\t"\r
-                                               "       move            a4, d0                                  \n\t"\r
-                                               "       cmpi.l          #130, d0                                \n\t"\r
-                                               "       bne                     reg_test_2_error                \n\t"\r
-                                               "       move            a5, d0                                  \n\t"\r
-                                               "       cmpi.l          #140, d0                                \n\t"\r
-                                               "       bne                     reg_test_2_error                \n\t"\r
-                                               "       move            a6, d0                                  \n\t"\r
-                                               "       cmpi.l          #150, d0                                \n\t"\r
-                                               "       bne                     reg_test_2_error                \n\t"\r
-                                               "       move            ulRegTest1Counter, d0   \n\t"\r
-                                               "       addq            #1, d0                                  \n\t"\r
-                                               "       move            d0, ulRegTest2Counter   \n\t"\r
-                                               "       bra                     reg_test_2_start                \n\t"\r
-                                               "reg_test_2_error:                                              \n\t"\r
-                                               "       bra                     reg_test_2_error                \n\t"\r
-                                       );\r
+       /* The co-routines run in the idle task. */\r
+       vCoRoutineSchedule();\r
 }\r
 /*-----------------------------------------------------------*/\r
 \r
-/* To keep the linker happy. */\r
 void exit( int n )\r
 {\r
+       /* To keep the linker happy only as the libraries have been removed from\r
+       the build. */\r
        ( void ) n;\r
        for( ;; ) {}\r
 }\r
 \r
-\r