+++ /dev/null
-/*\r
- FreeRTOS.org V4.7.1 - Copyright (C) 2003-2008 Richard Barry.\r
-\r
- This file is part of the FreeRTOS.org distribution.\r
-\r
- FreeRTOS.org is free software; you can redistribute it and/or modify\r
- it under the terms of the GNU General Public License as published by\r
- the Free Software Foundation; either version 2 of the License, or\r
- (at your option) any later version.\r
-\r
- FreeRTOS.org is distributed in the hope that it will be useful,\r
- but WITHOUT ANY WARRANTY; without even the implied warranty of\r
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\r
- GNU General Public License for more details.\r
-\r
- You should have received a copy of the GNU General Public License\r
- along with FreeRTOS.org; if not, write to the Free Software\r
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA\r
-\r
- A special exception to the GPL can be applied should you wish to distribute\r
- a combined work that includes FreeRTOS.org, without being obliged to provide\r
- the source code for any proprietary components. See the licensing section \r
- of http://www.FreeRTOS.org for full details of how and when the exception\r
- can be applied.\r
-\r
- ***************************************************************************\r
-\r
- Please ensure to read the configuration and relevant port sections of the \r
- online documentation.\r
-\r
- +++ http://www.FreeRTOS.org +++\r
- Documentation, latest information, license and contact details. \r
-\r
- +++ http://www.SafeRTOS.com +++\r
- A version that is certified for use in safety critical systems.\r
-\r
- +++ http://www.OpenRTOS.com +++\r
- Commercial support, development, porting, licensing and training services.\r
-\r
- ***************************************************************************\r
-*/\r
-\r
-/*-----------------------------------------------------------\r
- * Implementation of functions defined in portable.h for the PPC405 port.\r
- *----------------------------------------------------------*/\r
-\r
-\r
-/* Scheduler includes. */\r
-#include "FreeRTOS.h"\r
-#include "task.h"\r
-\r
-/* Library includes. */\r
-#include "xtime_l.h"\r
-#include "xintc.h"\r
-#include "xintc_i.h"\r
-\r
-/* Standard includes. */\r
-#include <string.h>\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-#define portCRITICAL_INTERRUPT_ENABLE ( 0UL << 17UL )\r
-#define portEXTERNAL_INTERRUPT_ENABLE ( 1UL << 15UL )\r
-#define portMACHINE_CHECK_ENABLE ( 0UL << 12UL )\r
-#define portINITIAL_MSR ( portCRITICAL_INTERRUPT_ENABLE | portEXTERNAL_INTERRUPT_ENABLE | portMACHINE_CHECK_ENABLE )\r
-\r
-/*\r
- */\r
-static void prvSetupTimerInterrupt( void );\r
-extern void vPortTickISR( void );\r
-extern void vPortYield( void );\r
-extern void vPortStartFirstTask( void );\r
-\r
-static XIntc xInterruptController;\r
-\r
-/* \r
- * Initialise the stack of a task to look exactly as if a call to \r
- * portSAVE_CONTEXT had been made.\r
- * \r
- * See the header file portable.h.\r
- */\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
-{\r
- /* Place a known value at the bottom of the stack for debugging. */\r
- *pxTopOfStack = 0xDEADBEEF;\r
- *pxTopOfStack--;\r
-\r
- /* EABI stack frame. */\r
- *pxTopOfStack = 0x31313131UL; /* R31. */\r
- pxTopOfStack--;\r
- *pxTopOfStack = 0x30303030UL; /* R30. */\r
- pxTopOfStack--;\r
- *pxTopOfStack = 0x29292929UL; /* R29. */\r
- pxTopOfStack--;\r
- *pxTopOfStack = 0x28282828UL; /* R28. */\r
- pxTopOfStack--;\r
- *pxTopOfStack = 0x27272727UL; /* R27. */\r
- pxTopOfStack--;\r
- *pxTopOfStack = 0x26262626UL; /* R26. */\r
- pxTopOfStack--;\r
- *pxTopOfStack = 0x25252525UL; /* R25. */\r
- pxTopOfStack--;\r
- *pxTopOfStack = 0x24242424UL; /* R24. */\r
- pxTopOfStack--;\r
- *pxTopOfStack = 0x23232323UL; /* R23. */\r
- pxTopOfStack--;\r
- *pxTopOfStack = 0x22222222UL; /* R22. */\r
- pxTopOfStack--;\r
- *pxTopOfStack = 0x21212121UL; /* R21. */\r
- pxTopOfStack--;\r
- *pxTopOfStack = 0x20202020UL; /* R20. */\r
- pxTopOfStack--;\r
- *pxTopOfStack = 0x19191919UL; /* R19. */\r
- pxTopOfStack--;\r
- *pxTopOfStack = 0x18181818UL; /* R18. */\r
- pxTopOfStack--;\r
- *pxTopOfStack = 0x17171717UL; /* R17. */\r
- pxTopOfStack--;\r
- *pxTopOfStack = 0x16161616UL; /* R16. */\r
- pxTopOfStack--;\r
- *pxTopOfStack = 0x15151515UL; /* R15. */\r
- pxTopOfStack--;\r
- *pxTopOfStack = 0x14141414UL; /* R14. */\r
- pxTopOfStack--;\r
- *pxTopOfStack = 0x13131313UL; /* R13. */\r
- pxTopOfStack--;\r
- *pxTopOfStack = 0x12121212UL; /* R12. */\r
- pxTopOfStack--;\r
- *pxTopOfStack = 0x11111111UL; /* R11. */\r
- pxTopOfStack--;\r
- *pxTopOfStack = 0x10101010UL; /* R10. */\r
- pxTopOfStack--;\r
- *pxTopOfStack = 0x09090909UL; /* R9. */\r
- pxTopOfStack--;\r
- *pxTopOfStack = 0x08080808UL; /* R8. */\r
- pxTopOfStack--;\r
- *pxTopOfStack = 0x07070707UL; /* R7. */\r
- pxTopOfStack--;\r
- *pxTopOfStack = 0x06060606UL; /* R6. */\r
- pxTopOfStack--;\r
- *pxTopOfStack = 0x05050505UL; /* R5. */\r
- pxTopOfStack--;\r
- *pxTopOfStack = 0x04040404UL; /* R4. */\r
- pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters;\r
- pxTopOfStack--;\r
- *pxTopOfStack = 0x02020202UL; /* R2. */\r
- pxTopOfStack--;\r
- *pxTopOfStack = 0x10000001UL;; /* R0. */\r
- pxTopOfStack--;\r
- *pxTopOfStack = 0x00000000UL; /* USPRG0. */\r
- pxTopOfStack--;\r
- *pxTopOfStack = 0x00000000UL; /* CR. */\r
- pxTopOfStack--;\r
- *pxTopOfStack = 0x00000000UL; /* XER. */\r
- pxTopOfStack--;\r
- *pxTopOfStack = 0x00000000UL; /* CTR. */\r
- pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) vPortStartFirstTask; /* LR. */\r
- pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* SRR0. */\r
- pxTopOfStack--;\r
- *pxTopOfStack = portINITIAL_MSR;/* SRR1. */\r
- pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) vPortStartFirstTask;/* Next LR. */\r
- pxTopOfStack--;\r
- *pxTopOfStack = 0x00000000UL;;/* Backchain. */\r
-// pxTopOfStack--;\r
-\r
- return pxTopOfStack;\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-portBASE_TYPE xPortStartScheduler( void )\r
-{\r
-extern void *pxCurrentTCB;\r
-\r
- prvSetupTimerInterrupt();\r
-\r
- XExc_RegisterHandler( XEXC_ID_SYSTEM_CALL, ( XExceptionHandler ) vPortYield, ( void * ) 0 );\r
-\r
-// XExc_mEnableExceptions( XEXC_NON_CRITICAL );\r
-\r
- vPortStartFirstTask();\r
-\r
- /* Should not get here as the tasks are now running! */\r
- return pdFALSE;\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void vPortEndScheduler( void )\r
-{\r
- /* Not implemented. */\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-/*\r
- * Hardware initialisation to generate the RTOS tick. \r
- */\r
-static void prvTickISR( void );\r
-static void prvSetupTimerInterrupt( void )\r
-{\r
-const unsigned portLONG ulInterval = ( ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL );\r
-\r
- XTime_PITClearInterrupt();\r
- XTime_FITClearInterrupt();\r
- XTime_WDTClearInterrupt();\r
- XTime_WDTDisableInterrupt();\r
- XTime_FITDisableInterrupt();\r
-\r
- XExc_RegisterHandler( XEXC_ID_PIT_INT, ( XExceptionHandler ) vPortTickISR, ( void * ) 0 );\r
-\r
- XTime_PITEnableAutoReload();\r
- XTime_PITSetInterval( ulInterval );\r
- XTime_PITEnableInterrupt();\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-static void prvTickISR( void )\r
-{\r
-static unsigned portLONG ulTicks = 0;\r
-\r
- ulTicks++;\r
- if( ulTicks >= 1000 )\r
- {\r
- vParTestToggleLED( 0 );\r
- ulTicks = 0;\r
- }\r
- XTime_PITClearInterrupt();\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void vPortISRHandler( void *vNullDoNotUse )\r
-{\r
-Xuint32 IntrStatus;\r
-Xuint32 IntrMask = 1;\r
-int IntrNumber;\r
-//extern XIntc xInterruptController;\r
-XIntc_Config *CfgPtr;// = xInterruptController.CfgPtr;\r
- \r
- /* Get the configuration data using the device ID */\r
- //CfgPtr = &XIntc_ConfigTable[(Xuint32)DeviceId];\r
- CfgPtr = &XIntc_ConfigTable[(Xuint32)XPAR_OPB_INTC_0_DEVICE_ID];\r
- \r
- /* Get the interrupts that are waiting to be serviced */\r
- IntrStatus = XIntc_mGetIntrStatus(CfgPtr->BaseAddress);\r
- \r
- /* Service each interrupt that is active and enabled by checking each\r
- * bit in the register from LSB to MSB which corresponds to an interrupt\r
- * intput signal\r
- */\r
- for (IntrNumber = 0; IntrNumber < XPAR_INTC_MAX_NUM_INTR_INPUTS;\r
- IntrNumber++)\r
- {\r
- if (IntrStatus & 1)\r
- {\r
- XIntc_VectorTableEntry *TablePtr;\r
- \r
- /* The interrupt is active and enabled, call the interrupt\r
- * handler that was setup with the specified parameter\r
- */\r
- TablePtr = &(CfgPtr->HandlerTable[IntrNumber]);\r
- TablePtr->Handler(TablePtr->CallBackRef);\r
-\r
- /* Clear the interrupt. */ \r
- XIntc_mAckIntr(CfgPtr->BaseAddress, IntrMask);\r
- break;\r
- }\r
- \r
- /* Move to the next interrupt to check */\r
- IntrMask <<= 1;\r
- IntrStatus >>= 1;\r
- \r
- /* If there are no other bits set indicating that all interrupts\r
- * have been serviced, then exit the loop\r
- */\r
- if (IntrStatus == 0)\r
- {\r
- break;\r
- }\r
- }\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void vPortSetupInterruptController( void )\r
-{\r
-extern void vPortISRWrapper( void );\r
-\r
- XExc_mDisableExceptions( XEXC_NON_CRITICAL );\r
- XExc_Init();\r
- XExc_RegisterHandler( XEXC_ID_NON_CRITICAL_INT, (XExceptionHandler)vPortISRWrapper, NULL );\r
- XIntc_Initialize( &xInterruptController, XPAR_OPB_INTC_0_DEVICE_ID );\r
- XIntc_Start( &xInterruptController, XIN_REAL_MODE );\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-portBASE_TYPE xPortInstallInterruptHandler( unsigned portCHAR ucInterruptID, XInterruptHandler pxHandler, void *pvCallBackRef )\r
-{\r
-portBASE_TYPE xReturn = pdFAIL;\r
-\r
- if( XST_SUCCESS == XIntc_Connect( &xInterruptController, ucInterruptID, pxHandler, pvCallBackRef ) )\r
- {\r
- XIntc_Enable( &xInterruptController, ucInterruptID );\r
- xReturn = pdPASS;\r
- }\r
-\r
- return xReturn; \r
-}\r
+++ /dev/null
-#include "xreg405.h"\r
-\r
- .extern pxCurrentTCB\r
- .extern vTaskSwitchContext\r
- .extern vTaskIncrementTick\r
- .extern vPortISRHandler\r
-\r
- .global vPortStartFirstTask\r
- .global vPortYield\r
- .global vPortTickISR\r
- .global vPortISRWrapper\r
-\r
-.set portCONTEXT_SIZE, 156\r
-.set portR0_OFFSET, 152\r
-.set portGPR_OFFSET, 32\r
-.set portCR_OFFSET, 28\r
-.set portXER_OFFSET, 24\r
-.set portLR_OFFSET, 16\r
-.set portCTR_OFFSET, 16\r
-.set portUSPRG0_OFFSET, 12\r
-.set portSRR0_OFFSET, 8\r
-.set portSRR1_OFFSET, 4\r
-\r
-\r
-.set BChainField, 0\r
-.set NextLRField, BChainField + 4\r
-.set MSRField, NextLRField + 4\r
-.set PCField, MSRField + 4\r
-.set LRField, PCField + 4\r
-.set CTRField, LRField + 4\r
-.set XERField, CTRField + 4\r
-.set CRField, XERField + 4\r
-.set USPRG0Field, CRField + 4\r
-.set r0Field, USPRG0Field + 4\r
-.set r2Field, r0Field + 4\r
-.set r3r31Field, r2Field + 4\r
-.set IFrameSize, r3r31Field + ( ( 31 - 3 ) + 1 ) * 4\r
-\r
-\r
-.macro portRESTORE_CONTEXT\r
-\r
- # Get the address of the TCB.\r
- xor R0, R0, R0\r
- addis SP, R0, pxCurrentTCB@ha\r
- lwz SP, pxCurrentTCB@l( SP )\r
-\r
- # Get the task stack pointer from the TCB.\r
- lwz SP, 0( SP )\r
-\r
- # Pop the special purpose registers\r
- lwz R0, portSRR1_OFFSET( SP )\r
- mtspr SRR1, R0\r
- lwz R0, portSRR0_OFFSET( SP )\r
- mtspr SRR0, R0\r
- lwz R0, portUSPRG0_OFFSET( SP )\r
- mtspr 256, R0 #USPRG0\r
- lwz R0, portCTR_OFFSET( SP )\r
- mtspr CTR, R0\r
- lwz R0, portLR_OFFSET( SP )\r
- mtspr LR, R0\r
- lwz R0, portXER_OFFSET( SP )\r
- mtspr XER, R0\r
- lwz R0, portCR_OFFSET( SP )\r
- mtcr R0\r
-\r
- # Pop GPRs\r
- lmw R2, portGPR_OFFSET( SP )\r
-\r
- # Finally pop R0 and correct the stack pointer\r
- lwz R0, portR0_OFFSET( SP )\r
- addi R1, R1, portCONTEXT_SIZE\r
-\r
- # Start the task running\r
- rfi\r
-\r
- .endm\r
-\r
-.macro portSAVE_CONTEXT\r
-\r
- # Make room on the stack.\r
- subi R1, R1, portCONTEXT_SIZE\r
-\r
- # Push R0, then the GPRs\r
- stw R0, portR0_OFFSET( SP )\r
- stm R2, portGPR_OFFSET( SP )\r
-\r
- # Push the SFRs\r
- mfcr R0\r
- stw R0, portCR_OFFSET( SP )\r
- mfspr R0, XER\r
- stw R0, portXER_OFFSET( SP )\r
- mfspr R0, LR\r
- stw R0, portLR_OFFSET( SP )\r
- mfspr R0, CTR\r
- stw R0, portCTR_OFFSET( SP )\r
- mfspr R0, 256 #USPRG0\r
- stw R0, portUSPRG0_OFFSET( SP )\r
- mfspr R0, SRR0\r
- stw R0, portSRR0_OFFSET( SP )\r
- mfspr R0, SRR1\r
- stw R0, portSRR1_OFFSET( SP )\r
-\r
- # Get the address of the TCB.\r
- xor R0, R0, R0\r
- addis R2, R0, pxCurrentTCB@ha\r
- lwz R2, pxCurrentTCB@l( R2 )\r
-\r
- # Store the stack pointer into the TCB\r
- stw SP, 0( R2 )\r
-\r
- .endm\r
-\r
-\r
-.macro int_epilogue\r
-\r
- # Get the address of the TCB.\r
- xor R0, R0, R0\r
- addis SP, R0, pxCurrentTCB@ha\r
- lwz SP, pxCurrentTCB@l( SP )\r
-\r
- # Get the task stack pointer from the TCB.\r
- lwz SP, 0( SP )\r
- \r
- # Restore MSR register to SRR1.\r
- lwz R0,MSRField(R1)\r
- mtsrr1 R0\r
- \r
- # Restore current PC location to SRR0.\r
- lwz R0,PCField(R1)\r
- mtsrr0 R0\r
-\r
- # Save USPRG0 register\r
- lwz R0,USPRG0Field(R1)\r
- mtspr 0x100,R0\r
- \r
- # Restore Condition register\r
- lwz R0,CRField(R1)\r
- mtcr R0\r
- \r
- # Restore Fixed Point Exception register\r
- lwz R0,XERField(R1)\r
- mtxer R0\r
- \r
- # Restore Counter register\r
- lwz R0,CTRField(R1)\r
- mtctr R0\r
- \r
- # Restore Link register\r
- lwz R0,LRField(R1)\r
- mtlr R0\r
- \r
- # Restore remaining GPR registers.\r
- lmw R3,r3r31Field(R1)\r
- \r
- # Restore r0 and r2.\r
- lwz R0,r0Field(R1)\r
- lwz R2,r2Field(R1)\r
- \r
- # Remove frame from stack\r
- addi R1,R1,IFrameSize\r
- \r
-.endm\r
-\r
-.macro portENTER_SWITCHING_ISR\r
-\r
- # Get the address of the TCB. \r
- xor R0, R0, R0\r
- addis R2, R0, pxCurrentTCB@ha\r
- lwz R2, pxCurrentTCB@l( R2 )\r
-\r
- # Store the stack pointer into the TCB\r
- stw SP, 0( R2 )\r
-\r
- # Save the link register\r
- stwu R1, -24( R1 )\r
- mflr R0\r
- stw R31, 20( R1 )\r
- stw R0, 28( R1 )\r
- mr R31, r1\r
-\r
-.endm\r
-\r
-.macro portEXIT_SWITCHING_ISR\r
-\r
- # Restore the link register\r
- lwz R11, 0( R1 )\r
- lwz R0, 4( R11 )\r
- mtlr R0\r
- lwz R31, -4( R11 )\r
- mr R1, R11\r
-\r
- # Get the address of the TCB.\r
- xor R0, R0, R0\r
- addis SP, R0, pxCurrentTCB@ha\r
- lwz SP, pxCurrentTCB@l( R1 )\r
-\r
- # Get the task stack pointer from the TCB.\r
- lwz SP, 0( SP )\r
-\r
-.endm\r
-\r
-\r
-vPortStartFirstTask:\r
-\r
- int_epilogue\r
- rfi\r
-\r
-#vPortStartFirstTask:\r
-# portRESTORE_CONTEXT\r
-# rfi\r
-\r
-\r
-\r
-vPortYield:\r
-\r
- portENTER_SWITCHING_ISR\r
- bl vTaskSwitchContext\r
- portEXIT_SWITCHING_ISR\r
- blr\r
-\r
-vPortTickISR:\r
-\r
- portENTER_SWITCHING_ISR\r
- bl vTaskIncrementTick\r
- #if configUSE_PREEMPTION == 1\r
- bl vTaskSwitchContext\r
- #endif\r
-\r
- # Clear the interrupt\r
- lis R0, 2048\r
- mttsr R0\r
-\r
- portEXIT_SWITCHING_ISR\r
- blr\r
-\r
-vPortISRWrapper:\r
-\r
- portENTER_SWITCHING_ISR\r
- bl vPortISRHandler\r
- portEXIT_SWITCHING_ISR\r
- blr\r
+++ /dev/null
-/*\r
- FreeRTOS.org V4.7.1 - Copyright (C) 2003-2008 Richard Barry.\r
-\r
- This file is part of the FreeRTOS.org distribution.\r
-\r
- FreeRTOS.org is free software; you can redistribute it and/or modify\r
- it under the terms of the GNU General Public License as published by\r
- the Free Software Foundation; either version 2 of the License, or\r
- (at your option) any later version.\r
-\r
- FreeRTOS.org is distributed in the hope that it will be useful,\r
- but WITHOUT ANY WARRANTY; without even the implied warranty of\r
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\r
- GNU General Public License for more details.\r
-\r
- You should have received a copy of the GNU General Public License\r
- along with FreeRTOS.org; if not, write to the Free Software\r
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA\r
-\r
- A special exception to the GPL can be applied should you wish to distribute\r
- a combined work that includes FreeRTOS.org, without being obliged to provide\r
- the source code for any proprietary components. See the licensing section \r
- of http://www.FreeRTOS.org for full details of how and when the exception\r
- can be applied.\r
-\r
- ***************************************************************************\r
-\r
- Please ensure to read the configuration and relevant port sections of the \r
- online documentation.\r
-\r
- +++ http://www.FreeRTOS.org +++\r
- Documentation, latest information, license and contact details. \r
-\r
- +++ http://www.SafeRTOS.com +++\r
- A version that is certified for use in safety critical systems.\r
-\r
- +++ http://www.OpenRTOS.com +++\r
- Commercial support, development, porting, licensing and training services.\r
-\r
- ***************************************************************************\r
-*/\r
-\r
-#ifndef PORTMACRO_H\r
-#define PORTMACRO_H\r
-\r
-#include "xexception_l.h"\r
-\r
-#ifdef __cplusplus\r
-extern "C" {\r
-#endif\r
-\r
-/*-----------------------------------------------------------\r
- * Port specific definitions. \r
- *\r
- * The settings in this file configure FreeRTOS correctly for the\r
- * given hardware and compiler.\r
- *\r
- * These settings should not be altered.\r
- *-----------------------------------------------------------\r
- */\r
-\r
-/* Type definitions. */\r
-#define portCHAR char\r
-#define portFLOAT float\r
-#define portDOUBLE double\r
-#define portLONG long\r
-#define portSHORT short\r
-#define portSTACK_TYPE unsigned portLONG\r
-#define portBASE_TYPE portLONG\r
-\r
-#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
-#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffff\r
-#endif\r
-/*-----------------------------------------------------------*/ \r
-\r
-#define portCRITICAL_NESTING_IN_TCB 1\r
-\r
-/* Interrupt control macros. */\r
-#define portDISABLE_INTERRUPTS() XExc_mDisableExceptions( XEXC_NON_CRITICAL );\r
-#define portENABLE_INTERRUPTS() XExc_mEnableExceptions( XEXC_NON_CRITICAL );\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-/* Critical section macros. */\r
-void vTaskEnterCritical( void );\r
-void vTaskExitCritical( void );\r
-#define portENTER_CRITICAL() vTaskEnterCritical()\r
-#define portEXIT_CRITICAL() vTaskExitCritical()\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-/* Task utilities. */\r
-void vPortYield( void );\r
-#define portYIELD() asm volatile ( "SC \n\t NOP" )\r
-#define portYIELD_FROM_ISR() vTaskSwitchContext()\r
-/*-----------------------------------------------------------*/\r
-\r
-/* Hardware specifics. */\r
-#define portBYTE_ALIGNMENT 8\r
-#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
-#define portNOP() asm volatile ( "NOP" )\r
-/*-----------------------------------------------------------*/\r
-\r
-/* Task function macros as described on the FreeRTOS.org WEB site. */\r
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
-#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
-\r
-/* Port specific initialisation function. */\r
-void vPortSetupInterruptController( void );\r
-portBASE_TYPE xPortInstallInterruptHandler( unsigned portCHAR ucInterruptID, XInterruptHandler pxHandler, void *pvCallBackRef );\r
-\r
-#ifdef __cplusplus\r
-}\r
-#endif\r
-\r
-#endif /* PORTMACRO_H */\r
-\r
--- /dev/null
+/*\r
+ FreeRTOS.org V4.7.1 - Copyright (C) 2003-2008 Richard Barry.\r
+\r
+ This file is part of the FreeRTOS.org distribution.\r
+\r
+ FreeRTOS.org is free software; you can redistribute it and/or modify\r
+ it under the terms of the GNU General Public License as published by\r
+ the Free Software Foundation; either version 2 of the License, or\r
+ (at your option) any later version.\r
+\r
+ FreeRTOS.org is distributed in the hope that it will be useful,\r
+ but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\r
+ GNU General Public License for more details.\r
+\r
+ You should have received a copy of the GNU General Public License\r
+ along with FreeRTOS.org; if not, write to the Free Software\r
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA\r
+\r
+ A special exception to the GPL can be applied should you wish to distribute\r
+ a combined work that includes FreeRTOS.org, without being obliged to provide\r
+ the source code for any proprietary components. See the licensing section \r
+ of http://www.FreeRTOS.org for full details of how and when the exception\r
+ can be applied.\r
+\r
+ ***************************************************************************\r
+\r
+ Please ensure to read the configuration and relevant port sections of the \r
+ online documentation.\r
+\r
+ +++ http://www.FreeRTOS.org +++\r
+ Documentation, latest information, license and contact details. \r
+\r
+ +++ http://www.SafeRTOS.com +++\r
+ A version that is certified for use in safety critical systems.\r
+\r
+ +++ http://www.OpenRTOS.com +++\r
+ Commercial support, development, porting, licensing and training services.\r
+\r
+ ***************************************************************************\r
+*/\r
+\r
+/*-----------------------------------------------------------\r
+ * Implementation of functions defined in portable.h for the PPC405 port.\r
+ *----------------------------------------------------------*/\r
+\r
+\r
+/* Scheduler includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+\r
+/* Library includes. */\r
+#include "xtime_l.h"\r
+#include "xintc.h"\r
+#include "xintc_i.h"\r
+\r
+/* Standard includes. */\r
+#include <string.h>\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+#define portCRITICAL_INTERRUPT_ENABLE ( 0UL << 17UL )\r
+#define portEXTERNAL_INTERRUPT_ENABLE ( 1UL << 15UL )\r
+#define portMACHINE_CHECK_ENABLE ( 0UL << 12UL )\r
+#define portINITIAL_MSR ( portCRITICAL_INTERRUPT_ENABLE | portEXTERNAL_INTERRUPT_ENABLE | portMACHINE_CHECK_ENABLE )\r
+\r
+/*\r
+ */\r
+static void prvSetupTimerInterrupt( void );\r
+extern void vPortTickISR( void );\r
+extern void vPortYield( void );\r
+extern void vPortStartFirstTask( void );\r
+\r
+static XIntc xInterruptController;\r
+\r
+/* \r
+ * Initialise the stack of a task to look exactly as if a call to \r
+ * portSAVE_CONTEXT had been made.\r
+ * \r
+ * See the header file portable.h.\r
+ */\r
+portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+{\r
+ /* Place a known value at the bottom of the stack for debugging. */\r
+ *pxTopOfStack = 0xDEADBEEF;\r
+ *pxTopOfStack--;\r
+\r
+ /* EABI stack frame. */\r
+ *pxTopOfStack = 0x31313131UL; /* R31. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = 0x30303030UL; /* R30. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = 0x29292929UL; /* R29. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = 0x28282828UL; /* R28. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = 0x27272727UL; /* R27. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = 0x26262626UL; /* R26. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = 0x25252525UL; /* R25. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = 0x24242424UL; /* R24. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = 0x23232323UL; /* R23. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = 0x22222222UL; /* R22. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = 0x21212121UL; /* R21. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = 0x20202020UL; /* R20. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = 0x19191919UL; /* R19. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = 0x18181818UL; /* R18. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = 0x17171717UL; /* R17. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = 0x16161616UL; /* R16. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = 0x15151515UL; /* R15. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = 0x14141414UL; /* R14. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = 0x13131313UL; /* R13. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = 0x12121212UL; /* R12. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = 0x11111111UL; /* R11. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = 0x10101010UL; /* R10. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = 0x09090909UL; /* R9. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = 0x08080808UL; /* R8. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = 0x07070707UL; /* R7. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = 0x06060606UL; /* R6. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = 0x05050505UL; /* R5. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = 0x04040404UL; /* R4. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( portSTACK_TYPE ) pvParameters;\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = 0x02020202UL; /* R2. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = 0x10000001UL;; /* R0. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = 0x00000000UL; /* USPRG0. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = 0x00000000UL; /* CR. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = 0x00000000UL; /* XER. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = 0x00000000UL; /* CTR. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( portSTACK_TYPE ) vPortStartFirstTask; /* LR. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* SRR0. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = portINITIAL_MSR;/* SRR1. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( portSTACK_TYPE ) vPortStartFirstTask;/* Next LR. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = 0x00000000UL;;/* Backchain. */\r
+// pxTopOfStack--;\r
+\r
+ return pxTopOfStack;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+portBASE_TYPE xPortStartScheduler( void )\r
+{\r
+extern void *pxCurrentTCB;\r
+\r
+ prvSetupTimerInterrupt();\r
+\r
+ XExc_RegisterHandler( XEXC_ID_SYSTEM_CALL, ( XExceptionHandler ) vPortYield, ( void * ) 0 );\r
+\r
+// XExc_mEnableExceptions( XEXC_NON_CRITICAL );\r
+\r
+ vPortStartFirstTask();\r
+\r
+ /* Should not get here as the tasks are now running! */\r
+ return pdFALSE;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vPortEndScheduler( void )\r
+{\r
+ /* Not implemented. */\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * Hardware initialisation to generate the RTOS tick. \r
+ */\r
+static void prvTickISR( void );\r
+static void prvSetupTimerInterrupt( void )\r
+{\r
+const unsigned portLONG ulInterval = ( ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL );\r
+\r
+ XTime_PITClearInterrupt();\r
+ XTime_FITClearInterrupt();\r
+ XTime_WDTClearInterrupt();\r
+ XTime_WDTDisableInterrupt();\r
+ XTime_FITDisableInterrupt();\r
+\r
+ XExc_RegisterHandler( XEXC_ID_PIT_INT, ( XExceptionHandler ) vPortTickISR, ( void * ) 0 );\r
+\r
+ XTime_PITEnableAutoReload();\r
+ XTime_PITSetInterval( ulInterval );\r
+ XTime_PITEnableInterrupt();\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvTickISR( void )\r
+{\r
+static unsigned portLONG ulTicks = 0;\r
+\r
+ ulTicks++;\r
+ if( ulTicks >= 1000 )\r
+ {\r
+ vParTestToggleLED( 0 );\r
+ ulTicks = 0;\r
+ }\r
+ XTime_PITClearInterrupt();\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vPortISRHandler( void *vNullDoNotUse )\r
+{\r
+Xuint32 IntrStatus;\r
+Xuint32 IntrMask = 1;\r
+int IntrNumber;\r
+//extern XIntc xInterruptController;\r
+XIntc_Config *CfgPtr;// = xInterruptController.CfgPtr;\r
+ \r
+ /* Get the configuration data using the device ID */\r
+ //CfgPtr = &XIntc_ConfigTable[(Xuint32)DeviceId];\r
+ CfgPtr = &XIntc_ConfigTable[(Xuint32)XPAR_OPB_INTC_0_DEVICE_ID];\r
+ \r
+ /* Get the interrupts that are waiting to be serviced */\r
+ IntrStatus = XIntc_mGetIntrStatus(CfgPtr->BaseAddress);\r
+ \r
+ /* Service each interrupt that is active and enabled by checking each\r
+ * bit in the register from LSB to MSB which corresponds to an interrupt\r
+ * intput signal\r
+ */\r
+ for (IntrNumber = 0; IntrNumber < XPAR_INTC_MAX_NUM_INTR_INPUTS;\r
+ IntrNumber++)\r
+ {\r
+ if (IntrStatus & 1)\r
+ {\r
+ XIntc_VectorTableEntry *TablePtr;\r
+ \r
+ /* The interrupt is active and enabled, call the interrupt\r
+ * handler that was setup with the specified parameter\r
+ */\r
+ TablePtr = &(CfgPtr->HandlerTable[IntrNumber]);\r
+ TablePtr->Handler(TablePtr->CallBackRef);\r
+\r
+ /* Clear the interrupt. */ \r
+ XIntc_mAckIntr(CfgPtr->BaseAddress, IntrMask);\r
+ break;\r
+ }\r
+ \r
+ /* Move to the next interrupt to check */\r
+ IntrMask <<= 1;\r
+ IntrStatus >>= 1;\r
+ \r
+ /* If there are no other bits set indicating that all interrupts\r
+ * have been serviced, then exit the loop\r
+ */\r
+ if (IntrStatus == 0)\r
+ {\r
+ break;\r
+ }\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vPortSetupInterruptController( void )\r
+{\r
+extern void vPortISRWrapper( void );\r
+\r
+ XExc_mDisableExceptions( XEXC_NON_CRITICAL );\r
+ XExc_Init();\r
+ XExc_RegisterHandler( XEXC_ID_NON_CRITICAL_INT, (XExceptionHandler)vPortISRWrapper, NULL );\r
+ XIntc_Initialize( &xInterruptController, XPAR_OPB_INTC_0_DEVICE_ID );\r
+ XIntc_Start( &xInterruptController, XIN_REAL_MODE );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+portBASE_TYPE xPortInstallInterruptHandler( unsigned portCHAR ucInterruptID, XInterruptHandler pxHandler, void *pvCallBackRef )\r
+{\r
+portBASE_TYPE xReturn = pdFAIL;\r
+\r
+ if( XST_SUCCESS == XIntc_Connect( &xInterruptController, ucInterruptID, pxHandler, pvCallBackRef ) )\r
+ {\r
+ XIntc_Enable( &xInterruptController, ucInterruptID );\r
+ xReturn = pdPASS;\r
+ }\r
+\r
+ return xReturn; \r
+}\r
--- /dev/null
+#include "xreg405.h"\r
+\r
+ .extern pxCurrentTCB\r
+ .extern vTaskSwitchContext\r
+ .extern vTaskIncrementTick\r
+ .extern vPortISRHandler\r
+\r
+ .global vPortStartFirstTask\r
+ .global vPortYield\r
+ .global vPortTickISR\r
+ .global vPortISRWrapper\r
+\r
+.set portCONTEXT_SIZE, 156\r
+.set portR0_OFFSET, 152\r
+.set portGPR_OFFSET, 32\r
+.set portCR_OFFSET, 28\r
+.set portXER_OFFSET, 24\r
+.set portLR_OFFSET, 16\r
+.set portCTR_OFFSET, 16\r
+.set portUSPRG0_OFFSET, 12\r
+.set portSRR0_OFFSET, 8\r
+.set portSRR1_OFFSET, 4\r
+\r
+\r
+.set BChainField, 0\r
+.set NextLRField, BChainField + 4\r
+.set MSRField, NextLRField + 4\r
+.set PCField, MSRField + 4\r
+.set LRField, PCField + 4\r
+.set CTRField, LRField + 4\r
+.set XERField, CTRField + 4\r
+.set CRField, XERField + 4\r
+.set USPRG0Field, CRField + 4\r
+.set r0Field, USPRG0Field + 4\r
+.set r2Field, r0Field + 4\r
+.set r3r31Field, r2Field + 4\r
+.set IFrameSize, r3r31Field + ( ( 31 - 3 ) + 1 ) * 4\r
+\r
+\r
+.macro portRESTORE_CONTEXT\r
+\r
+ # Get the address of the TCB.\r
+ xor R0, R0, R0\r
+ addis SP, R0, pxCurrentTCB@ha\r
+ lwz SP, pxCurrentTCB@l( SP )\r
+\r
+ # Get the task stack pointer from the TCB.\r
+ lwz SP, 0( SP )\r
+\r
+ # Pop the special purpose registers\r
+ lwz R0, portSRR1_OFFSET( SP )\r
+ mtspr SRR1, R0\r
+ lwz R0, portSRR0_OFFSET( SP )\r
+ mtspr SRR0, R0\r
+ lwz R0, portUSPRG0_OFFSET( SP )\r
+ mtspr 256, R0 #USPRG0\r
+ lwz R0, portCTR_OFFSET( SP )\r
+ mtspr CTR, R0\r
+ lwz R0, portLR_OFFSET( SP )\r
+ mtspr LR, R0\r
+ lwz R0, portXER_OFFSET( SP )\r
+ mtspr XER, R0\r
+ lwz R0, portCR_OFFSET( SP )\r
+ mtcr R0\r
+\r
+ # Pop GPRs\r
+ lmw R2, portGPR_OFFSET( SP )\r
+\r
+ # Finally pop R0 and correct the stack pointer\r
+ lwz R0, portR0_OFFSET( SP )\r
+ addi R1, R1, portCONTEXT_SIZE\r
+\r
+ # Start the task running\r
+ rfi\r
+\r
+ .endm\r
+\r
+.macro portSAVE_CONTEXT\r
+\r
+ # Make room on the stack.\r
+ subi R1, R1, portCONTEXT_SIZE\r
+\r
+ # Push R0, then the GPRs\r
+ stw R0, portR0_OFFSET( SP )\r
+ stm R2, portGPR_OFFSET( SP )\r
+\r
+ # Push the SFRs\r
+ mfcr R0\r
+ stw R0, portCR_OFFSET( SP )\r
+ mfspr R0, XER\r
+ stw R0, portXER_OFFSET( SP )\r
+ mfspr R0, LR\r
+ stw R0, portLR_OFFSET( SP )\r
+ mfspr R0, CTR\r
+ stw R0, portCTR_OFFSET( SP )\r
+ mfspr R0, 256 #USPRG0\r
+ stw R0, portUSPRG0_OFFSET( SP )\r
+ mfspr R0, SRR0\r
+ stw R0, portSRR0_OFFSET( SP )\r
+ mfspr R0, SRR1\r
+ stw R0, portSRR1_OFFSET( SP )\r
+\r
+ # Get the address of the TCB.\r
+ xor R0, R0, R0\r
+ addis R2, R0, pxCurrentTCB@ha\r
+ lwz R2, pxCurrentTCB@l( R2 )\r
+\r
+ # Store the stack pointer into the TCB\r
+ stw SP, 0( R2 )\r
+\r
+ .endm\r
+\r
+\r
+.macro int_epilogue\r
+\r
+ # Get the address of the TCB.\r
+ xor R0, R0, R0\r
+ addis SP, R0, pxCurrentTCB@ha\r
+ lwz SP, pxCurrentTCB@l( SP )\r
+\r
+ # Get the task stack pointer from the TCB.\r
+ lwz SP, 0( SP )\r
+ \r
+ # Restore MSR register to SRR1.\r
+ lwz R0,MSRField(R1)\r
+ mtsrr1 R0\r
+ \r
+ # Restore current PC location to SRR0.\r
+ lwz R0,PCField(R1)\r
+ mtsrr0 R0\r
+\r
+ # Save USPRG0 register\r
+ lwz R0,USPRG0Field(R1)\r
+ mtspr 0x100,R0\r
+ \r
+ # Restore Condition register\r
+ lwz R0,CRField(R1)\r
+ mtcr R0\r
+ \r
+ # Restore Fixed Point Exception register\r
+ lwz R0,XERField(R1)\r
+ mtxer R0\r
+ \r
+ # Restore Counter register\r
+ lwz R0,CTRField(R1)\r
+ mtctr R0\r
+ \r
+ # Restore Link register\r
+ lwz R0,LRField(R1)\r
+ mtlr R0\r
+ \r
+ # Restore remaining GPR registers.\r
+ lmw R3,r3r31Field(R1)\r
+ \r
+ # Restore r0 and r2.\r
+ lwz R0,r0Field(R1)\r
+ lwz R2,r2Field(R1)\r
+ \r
+ # Remove frame from stack\r
+ addi R1,R1,IFrameSize\r
+ \r
+.endm\r
+\r
+.macro portENTER_SWITCHING_ISR\r
+\r
+ # Get the address of the TCB. \r
+ xor R0, R0, R0\r
+ addis R2, R0, pxCurrentTCB@ha\r
+ lwz R2, pxCurrentTCB@l( R2 )\r
+\r
+ # Store the stack pointer into the TCB\r
+ stw SP, 0( R2 )\r
+\r
+ # Save the link register\r
+ stwu R1, -24( R1 )\r
+ mflr R0\r
+ stw R31, 20( R1 )\r
+ stw R0, 28( R1 )\r
+ mr R31, r1\r
+\r
+.endm\r
+\r
+.macro portEXIT_SWITCHING_ISR\r
+\r
+ # Restore the link register\r
+ lwz R11, 0( R1 )\r
+ lwz R0, 4( R11 )\r
+ mtlr R0\r
+ lwz R31, -4( R11 )\r
+ mr R1, R11\r
+\r
+ # Get the address of the TCB.\r
+ xor R0, R0, R0\r
+ addis SP, R0, pxCurrentTCB@ha\r
+ lwz SP, pxCurrentTCB@l( R1 )\r
+\r
+ # Get the task stack pointer from the TCB.\r
+ lwz SP, 0( SP )\r
+\r
+.endm\r
+\r
+\r
+vPortStartFirstTask:\r
+\r
+ int_epilogue\r
+ rfi\r
+\r
+#vPortStartFirstTask:\r
+# portRESTORE_CONTEXT\r
+# rfi\r
+\r
+\r
+\r
+vPortYield:\r
+\r
+ portENTER_SWITCHING_ISR\r
+ bl vTaskSwitchContext\r
+ portEXIT_SWITCHING_ISR\r
+ blr\r
+\r
+vPortTickISR:\r
+\r
+ portENTER_SWITCHING_ISR\r
+ bl vTaskIncrementTick\r
+ #if configUSE_PREEMPTION == 1\r
+ bl vTaskSwitchContext\r
+ #endif\r
+\r
+ # Clear the interrupt\r
+ lis R0, 2048\r
+ mttsr R0\r
+\r
+ portEXIT_SWITCHING_ISR\r
+ blr\r
+\r
+vPortISRWrapper:\r
+\r
+ portENTER_SWITCHING_ISR\r
+ bl vPortISRHandler\r
+ portEXIT_SWITCHING_ISR\r
+ blr\r
--- /dev/null
+/*\r
+ FreeRTOS.org V4.7.1 - Copyright (C) 2003-2008 Richard Barry.\r
+\r
+ This file is part of the FreeRTOS.org distribution.\r
+\r
+ FreeRTOS.org is free software; you can redistribute it and/or modify\r
+ it under the terms of the GNU General Public License as published by\r
+ the Free Software Foundation; either version 2 of the License, or\r
+ (at your option) any later version.\r
+\r
+ FreeRTOS.org is distributed in the hope that it will be useful,\r
+ but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\r
+ GNU General Public License for more details.\r
+\r
+ You should have received a copy of the GNU General Public License\r
+ along with FreeRTOS.org; if not, write to the Free Software\r
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA\r
+\r
+ A special exception to the GPL can be applied should you wish to distribute\r
+ a combined work that includes FreeRTOS.org, without being obliged to provide\r
+ the source code for any proprietary components. See the licensing section \r
+ of http://www.FreeRTOS.org for full details of how and when the exception\r
+ can be applied.\r
+\r
+ ***************************************************************************\r
+\r
+ Please ensure to read the configuration and relevant port sections of the \r
+ online documentation.\r
+\r
+ +++ http://www.FreeRTOS.org +++\r
+ Documentation, latest information, license and contact details. \r
+\r
+ +++ http://www.SafeRTOS.com +++\r
+ A version that is certified for use in safety critical systems.\r
+\r
+ +++ http://www.OpenRTOS.com +++\r
+ Commercial support, development, porting, licensing and training services.\r
+\r
+ ***************************************************************************\r
+*/\r
+\r
+#ifndef PORTMACRO_H\r
+#define PORTMACRO_H\r
+\r
+#include "xexception_l.h"\r
+\r
+#ifdef __cplusplus\r
+extern "C" {\r
+#endif\r
+\r
+/*-----------------------------------------------------------\r
+ * Port specific definitions. \r
+ *\r
+ * The settings in this file configure FreeRTOS correctly for the\r
+ * given hardware and compiler.\r
+ *\r
+ * These settings should not be altered.\r
+ *-----------------------------------------------------------\r
+ */\r
+\r
+/* Type definitions. */\r
+#define portCHAR char\r
+#define portFLOAT float\r
+#define portDOUBLE double\r
+#define portLONG long\r
+#define portSHORT short\r
+#define portSTACK_TYPE unsigned portLONG\r
+#define portBASE_TYPE portLONG\r
+\r
+#if( configUSE_16_BIT_TICKS == 1 )\r
+ typedef unsigned portSHORT portTickType;\r
+ #define portMAX_DELAY ( portTickType ) 0xffff\r
+#else\r
+ typedef unsigned portLONG portTickType;\r
+ #define portMAX_DELAY ( portTickType ) 0xffffffff\r
+#endif\r
+/*-----------------------------------------------------------*/ \r
+\r
+#define portCRITICAL_NESTING_IN_TCB 1\r
+\r
+/* Interrupt control macros. */\r
+#define portDISABLE_INTERRUPTS() XExc_mDisableExceptions( XEXC_NON_CRITICAL );\r
+#define portENABLE_INTERRUPTS() XExc_mEnableExceptions( XEXC_NON_CRITICAL );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Critical section macros. */\r
+void vTaskEnterCritical( void );\r
+void vTaskExitCritical( void );\r
+#define portENTER_CRITICAL() vTaskEnterCritical()\r
+#define portEXIT_CRITICAL() vTaskExitCritical()\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Task utilities. */\r
+void vPortYield( void );\r
+#define portYIELD() asm volatile ( "SC \n\t NOP" )\r
+#define portYIELD_FROM_ISR() vTaskSwitchContext()\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Hardware specifics. */\r
+#define portBYTE_ALIGNMENT 8\r
+#define portSTACK_GROWTH ( -1 )\r
+#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
+#define portNOP() asm volatile ( "NOP" )\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Task function macros as described on the FreeRTOS.org WEB site. */\r
+#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
+#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
+\r
+/* Port specific initialisation function. */\r
+void vPortSetupInterruptController( void );\r
+portBASE_TYPE xPortInstallInterruptHandler( unsigned portCHAR ucInterruptID, XInterruptHandler pxHandler, void *pvCallBackRef );\r
+\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+\r
+#endif /* PORTMACRO_H */\r
+\r
projects / freertos / commitdiff