"" \r
[GENERAL_DATA]\r
"FIRST_CONNECTION_TAG" "NO" \r
-"MRULABELS_DATAMANAGER_KEY" "00000000|FFFFFFFF|88218|000870B4|000870AE|88204|88208|18b8" \r
+"MRULABELS_DATAMANAGER_KEY" "FFFFFFFF|00000000|1054|fff8cd9e|1050|fff8c484|88218|000870B4|000870AE|88204|88208|18b8" \r
"RESET_CPU_AFTER_DOWNLOAD_TAG" "VARIANT_TRUE_STORE_TAG" \r
"{228DB593-0AB2-4EBE-A098-A2CABF094E46}RamMonitorCtrlViews" "0" \r
"{287A8023-99B5-49E1-A54E-4DDCA43D7959}MapCtrlECX_MAP_FIND_SYMBOL_LIST" "" \r
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}TclTkCtrlLogFileName" "" \r
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_COMPARE_END_ADDRESS" "" \r
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_COMPARE_START_ADDRESS" "" \r
-"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_DISPLAY_DEST_ADDRESS" "88218" \r
+"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_DISPLAY_DEST_ADDRESS" "1054" \r
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_DISPLAY_END_ADDRESS" "FFFFFFFF" \r
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_DISPLAY_START_ADDRESS" "00000000" \r
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_FILL_END_ADDRESS" "" \r
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryCtrlViews" "0" \r
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewA0AutoRefreshEnableTopPane" "0" \r
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewA0AutoRefreshIntervalTopPane" "100" \r
-"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewA0DataLength" "1" \r
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+"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewA0DataLength" "4" \r
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"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewA0DispCode" "42208" \r
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+"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewA0DispColumnCount" "4" \r
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewA0IsDispCode" "1" \r
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"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewAInstanceKey0" "{WK_00000001_MEMORY}RTOSDemoSessionRX600_E1_E20_SYSTEM" \r
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewB0AutoRefreshEnableTopPane" "0" \r
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewB0AutoRefreshIntervalTopPane" "100" \r
-"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewB0DataLength" "1" \r
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+"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewB0DataLength" "4" \r
+"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewB0DispAddressTopPane" "4180" \r
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewB0DispCode" "42208" \r
-"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewB0DispColumnCount" "16" \r
+"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewB0DispColumnCount" "4" \r
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewB0IsDispCode" "1" \r
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"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewB0IsDispLabel" "0" \r
"{5F75FDA0-6FF0-11D5-B7CE-00E029352378}PACtrlViews" "0" \r
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_EVAL_DENORMAL_MODE" "16777216" \r
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_EVAL_ROUND_MODE" "768" \r
-"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_0" "000000000000BAEC" \r
-"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_1" "0000000000000007" \r
+"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_0" "0000000000003DA4" \r
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"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_10" "00000000A5A5A5A5" \r
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_11" "00000000A5A5A5A5" \r
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_12" "00000000A5A5A5A5" \r
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_13" "00000000A5A5A5A5" \r
-"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_14" "0000000000000007" \r
-"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_15" "00000000A5A5A5A5" \r
-"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_16" "000000000000BAEC" \r
-"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_17" "0000000000011220" \r
-"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_18" "0000000000030000" \r
-"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_19" "00000000FFF8E520" \r
-"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_2" "000000000000C508" \r
+"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_14" "0000000000000020" \r
+"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_15" "0000000000001BE4" \r
+"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_16" "0000000000003DA4" \r
+"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_17" "0000000000011224" \r
+"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_18" "0000000000030001" \r
+"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_19" "00000000FFF9312A" \r
+"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_2" "0000000000000020" \r
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_20" "00000000FFF8C424" \r
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_21" "0000000080000000" \r
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_22" "0000000000000000" \r
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_23" "0000000000000000" \r
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_24" "0000000000000100" \r
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_25" "1234567887650000" \r
-"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_3" "0000000041480000" \r
-"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_4" "0000000040E00000" \r
-"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_5" "000000000000C4E0" \r
-"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_6" "00000000A5A5A5A5" \r
-"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_7" "00000000A5A5A5A5" \r
+"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_3" "000000000000EB9C" \r
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+"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_5" "0000000000001C1A" \r
+"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_6" "0000000000000008" \r
+"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_7" "0000000000000008" \r
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_8" "00000000A5A5A5A5" \r
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_9" "00000000A5A5A5A5" \r
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_COUNT" "26" \r
"{8A898260-6F1D-11D5-8EB6-00004CC34E9D}ECX_WAVE_COMB_BUFFER" ",,,," \r
"{8A898260-6F1D-11D5-8EB6-00004CC34E9D}ECX_WAVE_SAMPLING_RATE" "1000" \r
"{8A898260-6F1D-11D5-8EB6-00004CC34E9D}WaveformCtrlViews" "0" \r
-"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersCtrlViews" "0" \r
+"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersCtrlViews" "1" \r
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWnd0ColumnWidth" "47,153,35" \r
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWnd0ECX_REGISTER_COUNT" "33" \r
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWnd0ECX_REGISTER_DISPLAYED" "1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" \r
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ColWidth12" "200" \r
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ColWidth2" "120" \r
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ColWidth3" "200" \r
-"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ECX_WATCH_ITEM0000" "cErrorText, 10, 0, P, Col, Hex, N" \r
+"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ECX_WATCH_ITEM0000" "xCurrentRxDesc, 10, 0, P, Col, Hex, N" \r
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ECX_WATCH_ITEM0000_SCOPE" "Current Scope," \r
-"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ECX_WATCH_ITEMCnt" "1" \r
+"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ECX_WATCH_ITEM0001" "xEthernetBuffers, 11, 0, P, Exp, Hex, MN" \r
+"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ECX_WATCH_ITEM0001_SCOPE" "Current Scope," \r
+"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ECX_WATCH_ITEM0002" "ulAlignmentVariable, 2, 0, C0001, Col, Hex, MN" \r
+"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ECX_WATCH_ITEM0003" "cBuffer, 6, 0, C0001, Col, Hex, MN" \r
+"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ECX_WATCH_ITEM0004" "xRxDescriptors, 6, 0, P, Col, Hex, MN" \r
+"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ECX_WATCH_ITEM0004_SCOPE" "Current Scope," \r
+"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ECX_WATCH_ITEM0005" "xTxDescriptors, 6, 0, P, Col, Hex, MN" \r
+"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ECX_WATCH_ITEM0005_SCOPE" "Current Scope," \r
+"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ECX_WATCH_ITEMCnt" "0" \r
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd1ColWidth0" "120" \r
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd1ColWidth1" "150" \r
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd1ColWidth12" "200" \r
"{F866DB60-6186-11D5-8BBE-0004E2013C71}IOWnd0Exp0" "0" \r
"{F866DB60-6186-11D5-8BBE-0004E2013C71}IOWnd0Exp1" "0" \r
"{F866DB60-6186-11D5-8BBE-0004E2013C71}IOWnd0Exp10" "0" \r
+"{F866DB60-6186-11D5-8BBE-0004E2013C71}IOWnd0Exp100" "0" \r
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"{F866DB60-6186-11D5-8BBE-0004E2013C71}IOWnd0Exp11" "0" \r
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"{F866DB60-6186-11D5-8BBE-0004E2013C71}IOWnd0Exp75" "0" \r
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"{F866DB60-6186-11D5-8BBE-0004E2013C71}IOWnd0ScrollHorz" "0" \r
-"{F866DB60-6186-11D5-8BBE-0004E2013C71}IOWnd0ScrollVert" "16" \r
+"{F866DB60-6186-11D5-8BBE-0004E2013C71}IOWnd0ScrollVert" "96" \r
"{F866DB60-6186-11D5-8BBE-0004E2013C71}IOWnd1ColWidth0" "200" \r
"{F866DB60-6186-11D5-8BBE-0004E2013C71}IOWnd1ColWidth1" "100" \r
"{F866DB60-6186-11D5-8BBE-0004E2013C71}IOWnd1ColWidth2" "100" \r
0 \r
[WINDOW_POSITION_STATE_DATA_VD1]\r
"Help" "TOOLBAR 0" 59419 1 5 "0.00" 0 0 0 0 0 17 0 "" "0.0" \r
-"{WK_00000001_CmdLine}" "WINDOW" 59422 0 2 "0.07" 270 0 0 350 200 17 0 "32771|32772|32778|<<separator>>|32773|32774|<<separator>>|32820|<<separator>>|32801|32824" "0.0" \r
-"{WK_00000001_DEBUGCONSOLE}RTOSDemoSessionRX600_E1_E20_SYSTEM" "WINDOW" 59421 0 0 "1.00" 307 0 0 350 200 17 0 "57634|57637|57633|<<separator>>|32781|32782|<<separator>>|32780|32785|32787" "0.0" \r
+"{WK_00000001_CmdLine}" "WINDOW" 59422 0 2 "0.07" 344 0 0 350 200 17 0 "32771|32772|32778|<<separator>>|32773|32774|<<separator>>|32820|<<separator>>|32801|32824" "0.0" \r
+"{WK_00000001_DEBUGCONSOLE}RTOSDemoSessionRX600_E1_E20_SYSTEM" "WINDOW" 59421 0 1 "1.00" 307 0 0 350 200 17 0 "57634|57637|57633|<<separator>>|32781|32782|<<separator>>|32780|32785|32787" "0.0" \r
"{WK_00000001_DISASSEMBLY}" "WINDOW" 0 0 0 "0.00" 0 0 0 1062 571 9 0 "" "0.0" \r
-"{WK_00000001_IO}RTOSDemoSessionRX600_E1_E20_SYSTEM" "WINDOW" 59422 0 3 "0.58" 270 0 0 350 200 17 0 "32817|32826|32819|32820|32821" "0.0" \r
-"{WK_00000001_MEMORY}RTOSDemoSessionRX600_E1_E20_SYSTEM" "WINDOW" 59422 0 0 "0.64" 289 0 0 350 200 2065 0 "42202|42203|42204|42233|<<separator>>|42206|42205|42230|42229|42207|<<separator>>|42208|42209|42210|49076|42228|42227|<<separator>>|42231|42232|42234|42235|<<separator>>|42211|<<separator>>" "0.0" \r
-"{WK_00000001_OUTPUT}" "WINDOW" 59422 0 0 "0.97" 270 560 340 350 200 18 0 "36756|36757|36758|36759|<<separator>>|36746|36747|<<separator>>|39531|<<separator>>|39500|39534|<<separator>>|36687" "0.0" \r
-"{WK_00000001_REGISTERS}RTOSDemoSessionRX600_E1_E20_SYSTEM" "WINDOW" 59421 0 0 "1.00" 307 0 0 350 200 2065 0 "" "0.0" \r
-"{WK_00000001_WATCH}RTOSDemoSessionRX600_E1_E20_SYSTEM" "WINDOW" 59422 0 1 "0.03" 270 0 0 853 610 18 0 "32781|32783|<<separator>>|32771|32829|32772|32827|32773|<<separator>>|32786|<<separator>>|32810|32811" "0.0" \r
+"{WK_00000001_IO}RTOSDemoSessionRX600_E1_E20_SYSTEM" "WINDOW" 59422 0 3 "0.39" 344 0 0 350 200 17 0 "32817|32826|32819|32820|32821" "0.0" \r
+"{WK_00000001_MEMORY}RTOSDemoSessionRX600_E1_E20_SYSTEM" "WINDOW" 59422 0 0 "0.35" 344 0 0 350 200 2065 0 "42202|42203|42204|42233|<<separator>>|42206|42205|42230|42229|42207|<<separator>>|42208|42209|42210|49076|42228|42227|<<separator>>|42231|42232|42234|42235|<<separator>>|42211|<<separator>>" "0.0" \r
+"{WK_00000001_OUTPUT}" "WINDOW" 59422 0 0 "1.00" 344 560 340 350 200 18 0 "36756|36757|36758|36759|<<separator>>|36746|36747|<<separator>>|39531|<<separator>>|39500|39534|<<separator>>|36687" "0.0" \r
+"{WK_00000001_REGISTERS}RTOSDemoSessionRX600_E1_E20_SYSTEM" "WINDOW" 59421 0 0 "1.00" 307 0 0 350 200 18 0 "" "0.0" \r
+"{WK_00000001_WATCH}RTOSDemoSessionRX600_E1_E20_SYSTEM" "WINDOW" 59422 0 1 "0.72" 344 0 0 853 610 17 0 "32781|32783|<<separator>>|32771|32829|32772|32827|32773|<<separator>>|32786|<<separator>>|32810|32811" "0.0" \r
"{WK_00000002_WORKSPACE}" "WINDOW" 59420 0 0 "1.00" 360 560 340 350 200 18 0 "" "0.0" \r
"{WK_TB00000001_STANDARD}" "TOOLBAR 0" 59419 0 2 "0.00" 0 0 0 0 0 18 0 "" "0.0" \r
"{WK_TB00000002_EDITOR}" "TOOLBAR 0" 59419 0 0 "0.00" 0 0 0 0 0 18 0 "" "0.0" \r
[WINDOW_POSITION_STATE_DATA_VD3]\r
[WINDOW_POSITION_STATE_DATA_VD4]\r
[WINDOW_Z_ORDER]\r
+"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RDK_Renesas\RTOSDemo\main-full.c" \r
[TARGET_NAME]\r
"RX600 E1/E20 SYSTEM" "" 0 \r
[STATUSBAR_STATEINFO_VD1]\r
"SBK_TAR_EMUE100|Exception" 1 \r
"SBK_TAR_EMUE100|BreakCondition" 1 \r
"SBK_TAR_EMUE100|TaskID" 1 \r
-"SBK_TAR_EMUE100|PC" 1 \r
"SBK_TAR_EMUE100|ExecutionTime" 1 \r
+"SBK_TAR_EMUE100|PC" 1 \r
[STATUSBAR_DEBUGGER_PANESTATE_VD2]\r
[STATUSBAR_DEBUGGER_PANESTATE_VD3]\r
[STATUSBAR_DEBUGGER_PANESTATE_VD4]\r
[FLASH_DETAILS]\r
"" 0 0 "" 0 "" 0 0 "" 0 0 0 0 0 0 0 "" "" "" "" "" \r
[BREAKPOINTS]\r
+"c:\e\dev\freertos\workingcopy\demo\rx600_rx62n-rdk_renesas\rtosdemo\main-full.c" 436 -450004 1 "{00000000-0000-0000-C000-000000000046}" "" \r
[END]\r
#include "iodefine.h"\r
#include "typedefine.h"\r
#include "r_ether.h"\r
-#include "phy.h"\r
\r
/* FreeRTOS includes. */\r
#include "FreeRTOS.h"\r
\r
/*-----------------------------------------------------------*/\r
\r
-/* The buffers and descriptors themselves. */\r
-static union x_RX_Desc\r
-{\r
- unsigned long long ullAlignmentVariable;\r
- ethfifo xDescriptorArray[ emacNUM_RX_DESCRIPTORS ];\r
-} xRxDescriptors;\r
+/* The buffers and descriptors themselves. */\r
+#pragma section _RX_DESC\r
+ volatile ethfifo xRxDescriptors[ emacNUM_RX_DESCRIPTORS ];\r
+#pragma section _TX_DESC\r
+ volatile ethfifo xTxDescriptors[ emacNUM_TX_BUFFERS ];\r
+#pragma section _ETHERNET_BUFFERS\r
+ struct\r
+ {\r
+ unsigned long ulAlignmentVariable;\r
+ char cBuffer[ emacNUM_BUFFERS ][ UIP_BUFSIZE ];\r
+ } xEthernetBuffers;\r
+#pragma section\r
\r
-static union x_TX_Desc\r
-{\r
- unsigned long long ullAlignmentVariable;\r
- ethfifo xDescriptorArray[ emacNUM_TX_BUFFERS ];\r
-} xTxDescriptors;\r
\r
-static union x_ETH_Buffers\r
-{\r
- unsigned long long ullAlignmentVariable;\r
- char xDataBuffers[ emacNUM_BUFFERS ][ UIP_BUFSIZE ];\r
-} xEthernetBuffers;\r
\r
\r
/* Used to indicate which buffers are free and which are in use. If an index\r
-contains 0 then the corresponding buffer in xEthernetBuffers.xDataBuffers is free, otherwise \r
+contains 0 then the corresponding buffer in xEthernetBuffers is free, otherwise \r
the buffer is in use or about to be used. */\r
static unsigned char ucBufferInUse[ emacNUM_BUFFERS ];\r
\r
static void prvInitialiseDescriptors( void );\r
\r
/*\r
- * Return a pointer to a free buffer within xEthernetBuffers.xDataBuffers.\r
+ * Return a pointer to a free buffer within xEthernetBuffers.\r
*/\r
static unsigned char *prvGetNextBuffer( void );\r
\r
/* Wait until the second transmission of the last packet has completed. */\r
for( x = 0; x < emacTX_WAIT_ATTEMPTS; x++ )\r
{\r
- if( ( xTxDescriptors.xDescriptorArray[ 1 ].status & ACT ) != 0 )\r
+ if( ( xTxDescriptors[ 1 ].status & ACT ) != 0 )\r
{\r
/* Descriptor is still active. */\r
vTaskDelay( emacTX_WAIT_DELAY_ms );\r
}\r
\r
/* Is the descriptor free after waiting for it? */\r
- if( ( xTxDescriptors.xDescriptorArray[ 1 ].status & ACT ) != 0 )\r
+ if( ( xTxDescriptors[ 1 ].status & ACT ) != 0 )\r
{\r
/* Something has gone wrong. */\r
prvResetEverything();\r
}\r
\r
/* Setup both descriptors to transmit the frame. */\r
- xTxDescriptors.xDescriptorArray[ 0 ].buf_p = ( char * ) uip_buf;\r
- xTxDescriptors.xDescriptorArray[ 0 ].bufsize = uip_len; \r
- xTxDescriptors.xDescriptorArray[ 1 ].buf_p = ( char * ) uip_buf;\r
- xTxDescriptors.xDescriptorArray[ 1 ].bufsize = uip_len;\r
+ xTxDescriptors[ 0 ].buf_p = ( char * ) uip_buf;\r
+ xTxDescriptors[ 0 ].bufsize = uip_len; \r
+ xTxDescriptors[ 1 ].buf_p = ( char * ) uip_buf;\r
+ xTxDescriptors[ 1 ].bufsize = uip_len;\r
\r
/* uip_buf is being sent by the Tx descriptor. Allocate a new buffer\r
for use by the stack. */\r
uip_buf = prvGetNextBuffer();\r
\r
/* Clear previous settings and go. */\r
- xTxDescriptors.xDescriptorArray[0].status &= ~( FP1 | FP0 );\r
- xTxDescriptors.xDescriptorArray[0].status |= ( FP1 | FP0 | ACT );\r
- xTxDescriptors.xDescriptorArray[1].status &= ~( FP1 | FP0 );\r
- xTxDescriptors.xDescriptorArray[1].status |= ( FP1 | FP0 | ACT );\r
+ xTxDescriptors[0].status &= ~( FP1 | FP0 );\r
+ xTxDescriptors[0].status |= ( FP1 | FP0 | ACT );\r
+ xTxDescriptors[1].status &= ~( FP1 | FP0 );\r
+ xTxDescriptors[1].status |= ( FP1 | FP0 | ACT );\r
\r
EDMAC.EDTRR.LONG = 0x00000001;\r
}\r
{\r
/* Half duplex link */\r
case PHY_LINK_100H:\r
+ ETHERC.ECMR.BIT.DM = 0;\r
+ ETHERC.ECMR.BIT.RTM = 1;\r
+ lReturn = pdPASS;\r
+ break;\r
+\r
case PHY_LINK_10H:\r
ETHERC.ECMR.BIT.DM = 0;\r
+ ETHERC.ECMR.BIT.RTM = 0;\r
lReturn = pdPASS;\r
break;\r
\r
+\r
/* Full duplex link */\r
case PHY_LINK_100F:\r
+ ETHERC.ECMR.BIT.DM = 1;\r
+ ETHERC.ECMR.BIT.RTM = 1;\r
+ lReturn = pdPASS;\r
+ break;\r
+ \r
case PHY_LINK_10F:\r
ETHERC.ECMR.BIT.DM = 1;\r
+ ETHERC.ECMR.BIT.RTM = 0;\r
lReturn = pdPASS;\r
break;\r
\r
/* Initialise the Rx descriptors. */\r
for( x = 0; x < emacNUM_RX_DESCRIPTORS; x++ )\r
{\r
- pxDescriptor = &( xRxDescriptors.xDescriptorArray[ x ] );\r
- pxDescriptor->buf_p = &( xEthernetBuffers.xDataBuffers[ x ][ 0 ] );\r
+ pxDescriptor = &( xRxDescriptors[ x ] );\r
+ pxDescriptor->buf_p = &( xEthernetBuffers.cBuffer[ x ][ 0 ] );\r
\r
pxDescriptor->bufsize = UIP_BUFSIZE;\r
pxDescriptor->size = 0;\r
pxDescriptor->status = ACT;\r
- pxDescriptor->next = &xRxDescriptors.xDescriptorArray[ x + 1 ]; \r
+ pxDescriptor->next = &xRxDescriptors[ x + 1 ]; \r
\r
/* Mark this buffer as in use. */\r
ucBufferInUse[ x ] = pdTRUE;\r
\r
/* The last descriptor points back to the start. */\r
pxDescriptor->status |= DL;\r
- pxDescriptor->next = &xRxDescriptors.xDescriptorArray[ 0 ];\r
+ pxDescriptor->next = &xRxDescriptors[ 0 ];\r
\r
/* Initialise the Tx descriptors. */\r
for( x = 0; x < emacNUM_TX_BUFFERS; x++ )\r
{\r
- pxDescriptor = &( xTxDescriptors.xDescriptorArray[ x ] );\r
+ pxDescriptor = &( xTxDescriptors[ x ] );\r
\r
/* A buffer is not allocated to the Tx descriptor until a send is\r
actually required. */\r
pxDescriptor->bufsize = UIP_BUFSIZE;\r
pxDescriptor->size = 0;\r
pxDescriptor->status = 0;\r
- pxDescriptor->next = &xTxDescriptors.xDescriptorArray[ x + 1 ]; \r
+ pxDescriptor->next = &xTxDescriptors[ x + 1 ]; \r
}\r
\r
/* The last descriptor points back to the start. */\r
pxDescriptor->status |= DL;\r
- pxDescriptor->next = &( xTxDescriptors.xDescriptorArray[ 0 ] );\r
+ pxDescriptor->next = &( xTxDescriptors[ 0 ] );\r
\r
/* Use the first Rx descriptor to start with. */\r
- xCurrentRxDesc = &( xRxDescriptors.xDescriptorArray[ 0 ] );\r
+ xCurrentRxDesc = &( xRxDescriptors[ 0 ] );\r
}\r
/*-----------------------------------------------------------*/\r
\r
if( ucBufferInUse[ x ] == pdFALSE )\r
{\r
ucBufferInUse[ x ] = pdTRUE;\r
- pucReturn = ( unsigned char * ) &( xEthernetBuffers.xDataBuffers[ x ][ 0 ] );\r
+ pucReturn = ( unsigned char * ) &( xEthernetBuffers.cBuffer[ x ][ 0 ] );\r
break;\r
}\r
}\r
/* Return a buffer to the pool of free buffers. */\r
for( ul = 0; ul < emacNUM_BUFFERS; ul++ )\r
{\r
- if( &( xEthernetBuffers.xDataBuffers[ ul ][ 0 ] ) == ( void * ) pucBuffer )\r
+ if( &( xEthernetBuffers.cBuffer[ ul ][ 0 ] ) == ( void * ) pucBuffer )\r
{\r
ucBufferInUse[ ul ] = pdFALSE;\r
break;\r
\r
/* EDMAC */\r
EDMAC.EESR.LONG = 0x47FF0F9F; /* Clear all ETHERC and EDMAC status bits */\r
+ #ifdef __LIT\r
+ EDMAC.EDMR.BIT.DE = 1;\r
+ #endif\r
EDMAC.RDLAR = ( void * ) xCurrentRxDesc; /* Initialaize Rx Descriptor List Address */\r
- EDMAC.TDLAR = &( xTxDescriptors.xDescriptorArray[ 0 ] ); /* Initialaize Tx Descriptor List Address */\r
+ EDMAC.TDLAR = &( xTxDescriptors[ 0 ] ); /* Initialaize Tx Descriptor List Address */\r
EDMAC.TRSCER.LONG = 0x00000000; /* Copy-back status is RFE & TFE only */\r
EDMAC.TFTR.LONG = 0x00000000; /* Threshold of Tx_FIFO */\r
EDMAC.FDR.LONG = 0x00000000; /* Transmit fifo & receive fifo is 256 bytes */\r
EDMAC.RMCR.LONG = 0x00000003; /* Receive function is normal mode(continued) */\r
+ \r
+ /* Enable the interrupt... */\r
+ _IEN( _ETHER_EINT ) = 1; \r
}\r
/*-----------------------------------------------------------*/\r
\r
if( ulTxEndInts >= 2 )\r
{\r
/* Only return the buffer to the pool once both Txes have completed. */\r
- prvReturnBuffer( ( void * ) xTxDescriptors.xDescriptorArray[ 0 ].buf_p );\r
+ prvReturnBuffer( ( void * ) xTxDescriptors[ 0 ].buf_p );\r
ulTxEndInts = 0;\r
}\r
EDMAC.EESR.LONG = emacTX_END_INTERRUPT;\r
EDMAC.EESR.LONG = emacRX_END_INTERRUPT;\r
}\r
}\r
+\r