stm32x_info->ppage_size = 4;
max_flash_size_in_kb = 128;
break;
- case 0x422: /* stm32f302xb/c */
+ case 0x422: /* stm32f302/3xb/c */
page_size = 2048;
stm32x_info->ppage_size = 2;
max_flash_size_in_kb = 256;
stm32x_info->option_offset = 6;
stm32x_info->default_rdp = 0x55AA;
break;
+ case 0x446: /* stm32f303xD/E */
+ page_size = 2048;
+ stm32x_info->ppage_size = 2;
+ max_flash_size_in_kb = 512;
+ stm32x_info->user_data_offset = 16;
+ stm32x_info->option_offset = 6;
+ stm32x_info->default_rdp = 0x55AA;
+ break;
case 0x428: /* value line High density */
page_size = 2048;
stm32x_info->ppage_size = 4;
rev_str = get_stm32f0_revision(rev_id);
break;
+ case 0x446:
+ device_str = "STM32F303xD/E";
+ switch (rev_id) {
+ case 0x1000:
+ rev_str = "A";
+ break;
+ }
+ break;
+
case 0x448:
device_str = "STM32F07x";
rev_str = get_stm32f0_revision(rev_id);
if { [info exists BSTAPID] } {
set _BSTAPID $BSTAPID
} else {
- # STM Document RM0316 rev 2 Section 30.6.2 says 0x06432041
- # but STM32F303VCT6 rev Y has 0x06422041
+ # STM Document RM0316 rev 5 for STM32F302/303 B/C size
set _BSTAPID1 0x06422041
+ # STM Document RM0313 rev 3 for STM32F37x
set _BSTAPID2 0x06432041
+ # STM Document RM0313 rev 3 for STM32F37x Chip Revision 1.0
+ set _BSTAPID3 0x06422041
+ # STM Document RM364 rev 1 for STM32F334
+ set _BSTAPID4 0x06438041
+ # STM Document RM316 rev 5 for STM32F303 6/8 size
+ # STM Document RM365 rev 3 for STM32F302 6/8 size
+ # STM Document RM366 rev 2 for STM32F301 6/8 size
+ set _BSTAPID5 0x06439041
+ # STM Document RM016 rev 5 for STM32F303 D/E size
+ set _BSTAPID6 0x06446041
}
if {[using_jtag]} {
- swj_newdap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 -expected-id $_BSTAPID2
+ swj_newdap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 \
+ -expected-id $_BSTAPID2 -expected-id $_BSTAPID3 -expected-id $_BSTAPID4 \
+ -expected-id $_BSTAPID5 -expected-id $_BSTAPID6
}
set _TARGETNAME $_CHIPNAME.cpu