]> git.sur5r.net Git - openocd/commitdiff
Cleanup: removal of obsolete semicolons
authorAlexander Kurz <akurz@blala.de>
Sun, 28 Feb 2016 20:21:40 +0000 (21:21 +0100)
committerAndreas Fritiofson <andreas.fritiofson@gmail.com>
Mon, 29 Feb 2016 19:09:21 +0000 (19:09 +0000)
Obsolete C source code semicolons were removed using the semantic patch
semicolon/semicolon.cocci, see coccinellery.org

Change-Id: I153b4995a9e028ebaf5f58c947821dc78345a777
Signed-off-by: Alexander Kurz <akurz@blala.de>
Reviewed-on: http://openocd.zylin.com/3367
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
21 files changed:
src/flash/nor/cfi.c
src/flash/nor/efm32.c
src/flash/nor/em357.c
src/flash/nor/lpc2900.c
src/flash/nor/lpcspifi.c
src/flash/nor/mdr.c
src/flash/nor/mrvlqspi.c
src/flash/nor/niietcm4.c
src/flash/nor/nrf51.c
src/flash/nor/pic32mx.c
src/flash/nor/psoc4.c
src/flash/nor/stellaris.c
src/flash/nor/stm32f1x.c
src/flash/nor/stm32f2x.c
src/flash/nor/stm32l4x.c
src/flash/nor/stm32lx.c
src/flash/nor/str7x.c
src/flash/nor/str9x.c
src/jtag/drivers/openjtag.c
src/target/dsp5680xx.c
src/target/xscale.c

index df1de8c784537ead0228f0964e89fa48eddd0340..bf313ec956c4266dc549b032bb612a3e6bbf06d7 100644 (file)
@@ -1275,7 +1275,6 @@ static int cfi_intel_write_block(struct flash_bank *bank, const uint8_t *buffer,
                LOG_WARNING("No working area available, can't do block memory writes");
                return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
        }
-       ;
 
        /* write algorithm code to working area */
        retval = target_write_buffer(target, write_algorithm->address,
@@ -1297,7 +1296,6 @@ static int cfi_intel_write_block(struct flash_bank *bank, const uint8_t *buffer,
                        goto cleanup;
                }
        }
-       ;
 
        /* setup algo registers */
        init_reg_param(&reg_params[0], "r0", 32, PARAM_OUT);
@@ -1540,7 +1538,6 @@ static int cfi_spansion_write_block_mips(struct flash_bank *bank, const uint8_t
                        return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
                }
        }
-       ;
 
        init_reg_param(&reg_params[0], "r4", 32, PARAM_OUT);
        init_reg_param(&reg_params[1], "r5", 32, PARAM_OUT);
@@ -1920,7 +1917,6 @@ static int cfi_spansion_write_block(struct flash_bank *bank, const uint8_t *buff
                        return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
                }
        }
-       ;
 
        init_reg_param(&reg_params[0], "r0", 32, PARAM_OUT);
        init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT);
index d268bea468d322a109ab7576ee59b98b0e4da1f3..0c66d4db3d8abbed8adde6269fd5a97bf5234732 100644 (file)
@@ -668,7 +668,7 @@ static int efm32x_write_block(struct flash_bank *bank, const uint8_t *buf,
                        &write_algorithm) != ERROR_OK) {
                LOG_WARNING("no working area available, can't do block memory writes");
                return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
-       };
+       }
 
        ret = target_write_buffer(target, write_algorithm->address,
                        sizeof(efm32x_flash_write_code), efm32x_flash_write_code);
@@ -687,7 +687,7 @@ static int efm32x_write_block(struct flash_bank *bank, const uint8_t *buf,
                        LOG_WARNING("no large enough working area available, can't do block memory writes");
                        return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
                }
-       };
+       }
 
        init_reg_param(&reg_params[0], "r0", 32, PARAM_IN_OUT); /* flash base (in), status (out) */
        init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT);    /* count (word-32bit) */
index 70a5431ac68880b2827bbc1984a4db091edd6d3e..6cc922c2c21292418dfbcfb7058b559074e97de9 100644 (file)
@@ -502,7 +502,6 @@ static int em357_write_block(struct flash_bank *bank, const uint8_t *buffer,
                LOG_WARNING("no working area available, can't do block memory writes");
                return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
        }
-       ;
 
        retval = target_write_buffer(target, write_algorithm->address,
                        sizeof(em357_flash_write_code), em357_flash_write_code);
index 7c3e67580e8aba196e1bd87dfa5b0db9263212c8..886842083b69732b92276d532dd5bfa485d68ca6 100644 (file)
@@ -1160,7 +1160,6 @@ static int lpc2900_write(struct flash_bank *bank, const uint8_t *buffer,
                        break;
                }
        }
-       ;
 
        if (warea) {
                struct reg_param reg_params[5];
index 3b383ebd996004acddff62d4cbd7c1a11a1e80e1..63901493c0593386540d368fa82993cda1ef3544 100644 (file)
@@ -698,7 +698,7 @@ static int lpcspifi_write(struct flash_bank *bank, const uint8_t *buffer,
                        " a working area > %zdB in order to write to SPIFI flash.",
                        sizeof(lpcspifi_flash_write_code));
                return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
-       };
+       }
 
        retval = target_write_buffer(target, write_algorithm->address,
                        sizeof(lpcspifi_flash_write_code),
@@ -734,7 +734,7 @@ static int lpcspifi_write(struct flash_bank *bank, const uint8_t *buffer,
        if (target_alloc_working_area(target, fifo_size, &fifo) != ERROR_OK) {
                target_free_working_area(target, write_algorithm);
                return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
-       };
+       }
 
        armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
        armv7m_info.core_mode = ARM_MODE_THREAD;
index 98e013aa355585b77d10dcac63f78eaf11fdaff1..9a19b559bebd3c753bbd895d59d783e1daa46beb 100644 (file)
@@ -255,7 +255,7 @@ static int mdr_write_block(struct flash_bank *bank, const uint8_t *buffer,
                        &write_algorithm) != ERROR_OK) {
                LOG_WARNING("no working area available, can't do block memory writes");
                return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
-       };
+       }
 
        retval = target_write_buffer(target, write_algorithm->address,
                        sizeof(mdr32fx_flash_write_code), mdr32fx_flash_write_code);
@@ -274,7 +274,7 @@ static int mdr_write_block(struct flash_bank *bank, const uint8_t *buffer,
                        LOG_WARNING("no large enough working area available, can't do block memory writes");
                        return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
                }
-       };
+       }
 
        init_reg_param(&reg_params[0], "r0", 32, PARAM_IN_OUT); /* flash base (in), status (out) */
        init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT);    /* count (32bit) */
index 0dfe6f86fe60a5e1f2beb5b3e9dbf44dbfbfdbca..21fc91b25213d26f4ea6807a1adeeb0946437194 100644 (file)
@@ -680,7 +680,7 @@ static int mrvlqspi_flash_write(struct flash_bank *bank, const uint8_t *buffer,
                        " a working area > %zdB in order to write to SPIFI flash.",
                        sizeof(mrvlqspi_flash_write_code));
                return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
-       };
+       }
 
        retval = target_write_buffer(target, write_algorithm->address,
                        sizeof(mrvlqspi_flash_write_code),
@@ -714,7 +714,7 @@ static int mrvlqspi_flash_write(struct flash_bank *bank, const uint8_t *buffer,
        if (target_alloc_working_area(target, fifo_size, &fifo) != ERROR_OK) {
                target_free_working_area(target, write_algorithm);
                return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
-       };
+       }
 
        armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
        armv7m_info.core_mode = ARM_MODE_THREAD;
index c8dd1bc70fce72a2f475725e7d1046a9b3faefc1..9e32c010459cc71e055caf65ddca5e438d582c5f 100644 (file)
@@ -1299,7 +1299,7 @@ static int niietcm4_write_block(struct flash_bank *bank, const uint8_t *buffer,
                        &write_algorithm) != ERROR_OK) {
                LOG_WARNING("no working area available, can't do block memory writes");
                return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
-       };
+       }
 
        retval = target_write_buffer(target, write_algorithm->address,
                        sizeof(niietcm4_flash_write_code), niietcm4_flash_write_code);
@@ -1319,7 +1319,7 @@ static int niietcm4_write_block(struct flash_bank *bank, const uint8_t *buffer,
                        LOG_WARNING("no large enough working area available, can't do block memory writes");
                        return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
                }
-       };
+       }
 
        init_reg_param(&reg_params[0], "r0", 32, PARAM_IN_OUT); /* write_cmd base (in), status (out) */
        init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT);    /* count (128bit) */
index 28fa4d00c8b6fdc177e0e12fd5f4e93192f4207c..334f95f280c11a2f1af2e2a164b42f50ab85c29a 100644 (file)
@@ -587,7 +587,7 @@ static int nrf51_protect(struct flash_bank *bank, int set, int first, int last)
        if ((ppfc & 0xFF) == 0x00) {
                LOG_ERROR("Code region 0 size was pre-programmed at the factory, can't change flash protection settings");
                return ERROR_FAIL;
-       };
+       }
 
        res = target_read_u32(chip->target, NRF51_UICR_CLENR0,
                              &clenr0);
@@ -767,7 +767,7 @@ static int nrf51_erase_page(struct flash_bank *bank,
 
                        LOG_ERROR("The chip was not pre-programmed with SoftDevice stack and UICR cannot be erased separately. Please issue mass erase before trying to write to this region");
                        return ERROR_FAIL;
-               };
+               }
 
                res = nrf51_nvmc_generic_erase(chip,
                                               NRF51_NVMC_ERASEUICR,
@@ -1148,7 +1148,7 @@ COMMAND_HANDLER(nrf51_handle_mass_erase_command)
                LOG_ERROR("Code region 0 size was pre-programmed at the factory, "
                          "mass erase command won't work.");
                return ERROR_FAIL;
-       };
+       }
 
        res = nrf51_erase_all(chip);
        if (res != ERROR_OK) {
index 70a66fa1bdc2152846c8938761f641ef2a594f9f..ce5bffb56fc4db3793530b8a870e3fb823f6615c 100644 (file)
@@ -430,7 +430,7 @@ static int pic32mx_write_block(struct flash_bank *bank, const uint8_t *buffer,
                        &write_algorithm) != ERROR_OK) {
                LOG_WARNING("no working area available, can't do block memory writes");
                return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
-       };
+       }
 
        /* Change values for counters and row size, depending on variant */
        if (pic32mx_info->dev_type == MX_1_2) {
index 72541d5dc6ac719c2ef1c02de40cb9d5e291d84c..182745036e9ac5ccc0d0804177811f14811f6c8d 100644 (file)
@@ -221,7 +221,7 @@ static int psoc4_sysreq(struct target *target, uint8_t cmd, uint16_t cmd_param,
                        &sysreq_wait_algorithm) != ERROR_OK) {
                LOG_DEBUG("no working area for sysreq code");
                return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
-       };
+       }
 
        /* Write the code */
        retval = target_write_buffer(target,
index 451f19b7ba98d8488c054bfeca9236ac0c5ac8bc..ecfc10e141e407f16dc10023bf397d63b3f657ad 100644 (file)
@@ -1065,7 +1065,7 @@ static int stellaris_write_block(struct flash_bank *bank,
                        &write_algorithm) != ERROR_OK) {
                LOG_DEBUG("no working area for block memory writes");
                return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
-       };
+       }
 
        /* plus a buffer big enough for this data */
        if (wcount * 4 < buffer_size)
@@ -1080,7 +1080,7 @@ static int stellaris_write_block(struct flash_bank *bank,
                }
                LOG_DEBUG("retry target_alloc_working_area(%s, size=%u)",
                                target_name(target), (unsigned) buffer_size);
-       };
+       }
 
        target_write_buffer(target, write_algorithm->address,
                        sizeof(stellaris_write_code),
index 82f112ef7b39cc0d66f74958cf435de079fbe353..d06e0a692cd3ca445d7f17007b878baab86c36d7 100644 (file)
@@ -620,7 +620,7 @@ static int stm32x_write_block(struct flash_bank *bank, const uint8_t *buffer,
                        &write_algorithm) != ERROR_OK) {
                LOG_WARNING("no working area available, can't do block memory writes");
                return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
-       };
+       }
 
        retval = target_write_buffer(target, write_algorithm->address,
                        sizeof(stm32x_flash_write_code), stm32x_flash_write_code);
@@ -639,7 +639,7 @@ static int stm32x_write_block(struct flash_bank *bank, const uint8_t *buffer,
                        LOG_WARNING("no large enough working area available, can't do block memory writes");
                        return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
                }
-       };
+       }
 
        init_reg_param(&reg_params[0], "r0", 32, PARAM_IN_OUT); /* flash base (in), status (out) */
        init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT);    /* count (halfword-16bit) */
index 89fc75dcf3aa618466ada65baac7573a1ae28fcb..606c0a7960b298057aa18d82c525bfa74fc554c9 100644 (file)
@@ -551,7 +551,7 @@ static int stm32x_write_block(struct flash_bank *bank, const uint8_t *buffer,
                        &write_algorithm) != ERROR_OK) {
                LOG_WARNING("no working area available, can't do block memory writes");
                return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
-       };
+       }
 
        retval = target_write_buffer(target, write_algorithm->address,
                        sizeof(stm32x_flash_write_code),
@@ -570,7 +570,7 @@ static int stm32x_write_block(struct flash_bank *bank, const uint8_t *buffer,
                        LOG_WARNING("no large enough working area available, can't do block memory writes");
                        return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
                }
-       };
+       }
 
        armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
        armv7m_info.core_mode = ARM_MODE_THREAD;
index 6bdb51d60329b60cdcf38c169e22a7a9b09857f6..549506c9b731e25a7a5cc54a1b698fcb6790c909 100644 (file)
@@ -477,7 +477,7 @@ static int stm32l4_write_block(struct flash_bank *bank, const uint8_t *buffer,
                        &write_algorithm) != ERROR_OK) {
                LOG_WARNING("no working area available, can't do block memory writes");
                return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
-       };
+       }
 
        retval = target_write_buffer(target, write_algorithm->address,
                        sizeof(stm32l4_flash_write_code),
@@ -497,7 +497,7 @@ static int stm32l4_write_block(struct flash_bank *bank, const uint8_t *buffer,
                        LOG_WARNING("no large enough working area available, can't do block memory writes");
                        return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
                }
-       };
+       }
 
        armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
        armv7m_info.core_mode = ARM_MODE_THREAD;
index 7b0b0cc1daff595c708a15390e14b4f79c167848..bac2c4c727942675f319e0c0574420fa9701b3b4 100644 (file)
@@ -391,7 +391,7 @@ static int stm32lx_write_half_pages(struct flash_bank *bank, const uint8_t *buff
                        &write_algorithm) != ERROR_OK) {
                LOG_DEBUG("no working area for block memory writes");
                return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
-       };
+       }
 
        /* Write the flashing code */
        retval = target_write_buffer(target,
index 515b9751272fabf44d879d9e0ccdb17ddbad3ddd..d8a4cd498b05fd73b711d1007059813bfafe6c68 100644 (file)
@@ -487,7 +487,7 @@ static int str7x_write_block(struct flash_bank *bank, const uint8_t *buffer,
        if (target_alloc_working_area_try(target, sizeof(str7x_flash_write_code),
                        &write_algorithm) != ERROR_OK) {
                return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
-       };
+       }
 
        uint8_t code[sizeof(str7x_flash_write_code)];
        target_buffer_set_u32_array(target, code, ARRAY_SIZE(str7x_flash_write_code),
index 8b3c1371484dbce5fdc7ca788a870984282af917..b3f08b036e6417a6fdfbfa9c74a0f0fb3a10ea75 100644 (file)
@@ -390,7 +390,7 @@ static int str9x_write_block(struct flash_bank *bank,
                        &write_algorithm) != ERROR_OK) {
                LOG_WARNING("no working area available, can't do block memory writes");
                return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
-       };
+       }
 
        uint8_t code[sizeof(str9x_flash_write_code)];
        target_buffer_set_u32_array(target, code, ARRAY_SIZE(str9x_flash_write_code),
index 85d17938ed4f5167010c9d6f3da5001ea02244d0..904ab40d9ea752b0a984c27fdad50f84f855708f 100644 (file)
@@ -471,7 +471,7 @@ if (openjtag_device_desc == NULL) {
                LOG_ERROR("Can't set baud rate to max: %s",
                        ftdi_get_error_string(&ftdic));
                return ERROR_JTAG_DEVICE_ERROR;
-       };
+       }
 #endif
 
 #if BUILD_OPENJTAG_FTD2XX == 1
index 8a58cab473e17ec2c89d94bcab7771cf7d845138..86458371fce8c34eca2fcde510afb7047445ad48 100644 (file)
@@ -1003,12 +1003,12 @@ static int dsp5680xx_poll(struct target *target)
                         __func__);
                target->state = TARGET_UNKNOWN;
                return ERROR_TARGET_FAILURE;
-       };
+       }
        if (target->state == TARGET_UNKNOWN) {
                LOG_ERROR("%s: Target status invalid - communication failure",
                          __func__);
                return ERROR_TARGET_FAILURE;
-       };
+       }
        return ERROR_OK;
 }
 
index 82e41600eb2a6b34d790ce21a05005550a69faad..f9962cff3c9e8e5c275ed040f807fe7ca80502af 100644 (file)
@@ -1573,7 +1573,6 @@ static int xscale_deassert_reset(struct target *target)
 
                        address += buf_cnt;
                }
-               ;
 
                retval = xscale_load_ic(target, 0x0,
                                xscale->low_vectors);