extern uint32_t SystemCoreClock;\r
#endif /* __ICCARM__ */\r
\r
+/* The following definition allows the startup files that ship with the IDE\r
+to be used without modification when the chip used includes the PMU CM001\r
+errata. */\r
+#define WORKAROUND_PMU_CM001 1\r
+\r
#define configUSE_PREEMPTION 1\r
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1\r
#define configUSE_IDLE_HOOK 0\r
#define configASSERT( x ) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }\r
\r
/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS\r
-standard names. */\r
+standard names. WORKAROUND_PMU_CM001 is defined at the top of this file. */\r
+#if WORKAROUND_PMU_CM001 == 1\r
+ #define xPortPendSVHandler PendSV_Handler_Veneer\r
+#else\r
+ #define xPortPendSVHandler PendSV_Handler\r
+#endif\r
#define vPortSVCHandler SVC_Handler\r
-#define xPortPendSVHandler PendSV_Handler\r
#define xPortSysTickHandler SysTick_Handler\r
\r
/* Demo application specific settings. */\r
@REM \r
\r
\r
-"C:\devtools\IAR Systems\Embedded Workbench 6.5\common\bin\cspybat" "C:\devtools\IAR Systems\Embedded Workbench 6.5\arm\bin\armproc.dll" "C:\devtools\IAR Systems\Embedded Workbench 6.5\arm\bin\armjlink.dll" %1 --plugin "C:\devtools\IAR Systems\Embedded Workbench 6.5\arm\bin\armbat.dll" --macro "C:\devtools\IAR Systems\Embedded Workbench 6.5\arm\config\debugger\Infineon\Trace_XMC4500.dmac" --flash_loader "C:\devtools\IAR Systems\Embedded Workbench 6.5\arm\config\flashloader\Infineon\FlashXMC4400.board" --backend -B "--endian=little" "--cpu=Cortex-M4F" "--fpu=VFPv4" "-p" "C:\devtools\IAR Systems\Embedded Workbench 6.5\arm\CONFIG\debugger\Infineon\xmc4400.ddf" "--drv_verify_download" "--semihosting" "--device=xmc4400" "--drv_communication=USB0" "--jlink_speed=auto" "--jlink_initial_speed=32" "--jlink_reset_strategy=0,0" "--jlink_interface=SWD" "--drv_catch_exceptions=0x000" "--jlink_script_file=C:\devtools\IAR Systems\Embedded Workbench 6.5\arm\config\debugger\Infineon\XMC4500.jlinkscript" "--drv_swo_clock_setup=72000000,0,2000000" \r
+"C:\devtools\IAR Systems\Embedded Workbench 6.5\common\bin\cspybat" "C:\devtools\IAR Systems\Embedded Workbench 6.5\arm\bin\armproc.dll" "C:\devtools\IAR Systems\Embedded Workbench 6.5\arm\bin\armjlink.dll" %1 --plugin "C:\devtools\IAR Systems\Embedded Workbench 6.5\arm\bin\armbat.dll" --macro "C:\devtools\IAR Systems\Embedded Workbench 6.5\arm\config\debugger\Infineon\Trace_XMC4500.dmac" --flash_loader "C:\devtools\IAR Systems\Embedded Workbench 6.5\arm\config\flashloader\Infineon\FlashXMC4500.board" --backend -B "--endian=little" "--cpu=Cortex-M4F" "--fpu=VFPv4" "-p" "C:\devtools\IAR Systems\Embedded Workbench 6.5\arm\CONFIG\debugger\Infineon\xmc4500.ddf" "--drv_verify_download" "--semihosting" "--device=xmc4500" "--drv_communication=USB0" "--jlink_speed=auto" "--jlink_initial_speed=32" "--jlink_reset_strategy=0,0" "--jlink_interface=SWD" "--drv_catch_exceptions=0x000" "--jlink_script_file=C:\devtools\IAR Systems\Embedded Workbench 6.5\arm\config\debugger\Infineon\XMC4500.jlinkscript" "--drv_swo_clock_setup=72000000,0,2000000" \r
\r
\r
\r
\r
\r
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</Project>\r
\r
LimitSize=0\r
ByteLimit=50\r
[DebugChecksum]\r
-Checksum=-1591096957\r
+Checksum=92877996\r
[Exceptions]\r
StopOnUncaught=_ 0\r
StopOnThrow=_ 0\r
OverrideDefaultClocks=0\r
CpuClock=72000000\r
ClockAutoDetect=0\r
-ClockWanted=1000000\r
-JtagSpeed=1000000\r
-Prescaler=72\r
+ClockWanted=2000000\r
+JtagSpeed=2000000\r
+Prescaler=36\r
TimeStampPrescIndex=0\r
TimeStampPrescData=0\r
PcSampCYCTAP=1\r
<Workspace>\r
<ConfigDictionary>\r
\r
- <CurrentConfigs><Project>RTOSDemo/XMC4400</Project></CurrentConfigs></ConfigDictionary>\r
+ <CurrentConfigs><Project>RTOSDemo/XMC4500</Project></CurrentConfigs></ConfigDictionary>\r
<Desktop>\r
<Static>\r
<Workspace>\r
<Windows>\r
\r
\r
- <Wnd0>\r
+ <Wnd2>\r
<Tabs>\r
<Tab>\r
<Identity>TabID-29494-21985</Identity>\r
</Tab>\r
</Tabs>\r
\r
- <SelectedTab>0</SelectedTab></Wnd0><Wnd1>\r
+ <SelectedTab>0</SelectedTab></Wnd2><Wnd3>\r
<Tabs>\r
<Tab>\r
<Identity>TabID-28344-23030</Identity>\r
</Tab>\r
<Tab><Identity>TabID-19430-2343</Identity><TabName>Debug Log</TabName><Factory>Debug-Log</Factory><Session/></Tab></Tabs>\r
\r
- <SelectedTab>0</SelectedTab></Wnd1></Windows>\r
+ <SelectedTab>0</SelectedTab></Wnd3></Windows>\r
<Editor>\r
\r
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</Workspace>\r
\r
/*\r
* @file Startup_XMC4200.s\r
* XMC4000 Device Series\r
-* @version V1.0\r
-* @date Jan 2013\r
+* @version V1.1\r
+* @date Augsut 2013\r
*\r
* Copyright (C) 2012 IAR Systems. All rights reserved.\r
* Copyright (C) 2012 Infineon Technologies AG. All rights reserved.\r
*\r
*\r
* @par\r
-* Infineon Technologies AG (Infineon) is supplying this software for use with\r
+* Infineon Technologies AG (Infineon) is supplying this software for use with \r
* Infineon's microcontrollers. This file can be freely distributed\r
* within development tools that are supporting such microcontrollers.\r
*\r
/* ***************************************************************************\r
V1.0 January, 30 2013: In ths version a workoraound for the erratum PMU_CM.001\r
is implmented (patch for the Exception and interrupt handlers)\r
+V1.1 Augsut, 17 2013: Fix the bug of preprocessor due to workoraound for \r
+the erratum PMU_CM.001, and the bug of stack pointer alignment to a 8 byte boundary\r
\r
**************************************************************************** */\r
\r
;/* ===========START : MACRO DEFINITION MACRO DEFINITION ================== */\r
;/*\r
; * STEP_AB and below have the prefetch functional deviation (Errata id: PMU_CM.001).\r
-; * A veneer defined below will first be executed which in turn branches to the final\r
+; * A veneer defined below will first be executed which in turn branches to the final \r
; * exception handler.\r
; *\r
; * In addition to defining the veneers, the vector table must for these buggy\r
; */\r
\r
;set WORKAROUND_PMU_CM001 under Options for target\r
-;Initialize varaible WORKAROUND_PMU_CM001 as FALSE\r
-WORKAROUND_PMU_CM001 SET 1\r
+;define WORKAROUND_PMU_CM001 as TRUE\r
+#define WORKAROUND_PMU_CM001 1\r
\r
;/* A macro to setup a vector table entry based on STEP ID */\r
#ifdef WORKAROUND_PMU_CM001\r
#else\r
ExcpVector macro\r
DCD \1\r
- endm\r
+ endm \r
#endif\r
\r
;/* A macro to ease definition of the various handlers based on STEP ID */\r
SECTION .text:CODE:REORDER:NOROOT(1)\r
\1\r
B \1\r
- endm\r
-;/* And then define a veneer that will branch to the final excp handler */\r
-ProxyHandler_Veneer macro\r
- PUBWEAK \1\r
+;/* And then define a veneer that will branch to the final excp handler */ \r
+ PUBWEAK \1_Veneer\r
SECTION .text:CODE:REORDER:NOROOT(2)\r
-\1\r
- LDR R0, =ProxyHandler\r
- PUSH {LR}\r
+\1_Veneer:\r
+ LDR R0, =\1\r
+ PUSH {LR} /* Breaks AAPCS */\r
+ SUB SP,#4 /* Restores AAPCS */\r
BLX R0\r
+ ADD SP,#4\r
POP {PC}\r
endm\r
- ;/* No prefetch bug, hence define only the final exception handler */\r
+ ;/* No prefetch bug, hence define only the final exception handler */ \r
#else\r
ProxyHandler macro\r
PUBWEAK \1\r
\r
__vector_table\r
DCD sfe(CSTACK)\r
- DCD Reset_Handler ; Reset Handler\r
-\r
- ExcpVector NMI_Handler ; NMI Handler\r
- ExcpVector HardFault_Handler ; Hard Fault Handler\r
- ExcpVector MemManage_Handler ; MPU Fault Handler\r
- ExcpVector BusFault_Handler ; Bus Fault Handler\r
- ExcpVector UsageFault_Handler ; Usage Fault Handler\r
- DCD 0 ; Reserved\r
- DCD 0 ; Reserved\r
- DCD 0 ; Reserved\r
- DCD 0 ; Reserved\r
- ExcpVector SVC_Handler ; SVCall Handler\r
- DCD DebugMon_Handler ; Debug Monitor Handler\r
- DCD 0 ; Reserved\r
- ExcpVector PendSV_Handler ; PendSV Handler\r
- ExcpVector SysTick_Handler ; SysTick Handler\r
+ DCD Reset_Handler ; Reset Handler \r
+ \r
+ ExcpVector NMI_Handler ; NMI Handler \r
+ ExcpVector HardFault_Handler ; Hard Fault Handler \r
+ ExcpVector MemManage_Handler ; MPU Fault Handler \r
+ ExcpVector BusFault_Handler ; Bus Fault Handler \r
+ ExcpVector UsageFault_Handler ; Usage Fault Handler \r
+ DCD 0 ; Reserved \r
+ DCD 0 ; Reserved \r
+ DCD 0 ; Reserved \r
+ DCD 0 ; Reserved \r
+ ExcpVector SVC_Handler ; SVCall Handler \r
+ ExcpVector DebugMon_Handler ; Debug Monitor Handler \r
+ DCD 0 ; Reserved \r
+ ExcpVector PendSV_Handler ; PendSV Handler \r
+ ExcpVector SysTick_Handler ; SysTick Handler \r
\r
; Interrupt Handlers for Service Requests (SR) from XMC4200 Peripherals\r
- ExcpVector SCU_0_IRQHandler ; Handler name for SR SCU_0\r
- ExcpVector ERU0_0_IRQHandler ; Handler name for SR ERU0_0\r
- ExcpVector ERU0_1_IRQHandler ; Handler name for SR ERU0_1\r
- ExcpVector ERU0_2_IRQHandler ; Handler name for SR ERU0_2\r
- ExcpVector ERU0_3_IRQHandler ; Handler name for SR ERU0_3\r
- ExcpVector ERU1_0_IRQHandler ; Handler name for SR ERU1_0\r
- ExcpVector ERU1_1_IRQHandler ; Handler name for SR ERU1_1\r
- ExcpVector ERU1_2_IRQHandler ; Handler name for SR ERU1_2\r
- ExcpVector ERU1_3_IRQHandler ; Handler name for SR ERU1_3\r
- DCD 0 ; Not Available\r
- DCD 0 ; Not Available\r
- DCD 0 ; Not Available\r
- ExcpVector PMU0_0_IRQHandler ; Handler name for SR PMU0_0\r
- DCD 0 ; Not Available\r
- ExcpVector VADC0_C0_0_IRQHandler ; Handler name for SR VADC0_C0_0\r
- ExcpVector VADC0_C0_1_IRQHandler ; Handler name for SR VADC0_C0_1\r
- ExcpVector VADC0_C0_2_IRQHandler ; Handler name for SR VADC0_C0_1\r
- ExcpVector VADC0_C0_3_IRQHandler ; Handler name for SR VADC0_C0_3\r
- ExcpVector VADC0_G0_0_IRQHandler ; Handler name for SR VADC0_G0_0\r
- ExcpVector VADC0_G0_1_IRQHandler ; Handler name for SR VADC0_G0_1\r
- ExcpVector VADC0_G0_2_IRQHandler ; Handler name for SR VADC0_G0_2\r
- ExcpVector VADC0_G0_3_IRQHandler ; Handler name for SR VADC0_G0_3\r
- ExcpVector VADC0_G1_0_IRQHandler ; Handler name for SR VADC0_G1_0\r
- ExcpVector VADC0_G1_1_IRQHandler ; Handler name for SR VADC0_G1_1\r
- ExcpVector VADC0_G1_2_IRQHandler ; Handler name for SR VADC0_G1_2\r
- ExcpVector VADC0_G1_3_IRQHandler ; Handler name for SR VADC0_G1_3\r
- DCD 0 ; Not Available\r
- DCD 0 ; Not Available\r
- DCD 0 ; Not Available\r
- DCD 0 ; Not Available\r
- DCD 0 ; Not Available\r
- DCD 0 ; Not Available\r
- DCD 0 ; Not Available\r
- DCD 0 ; Not Available\r
- DCD 0 ; Not Available\r
- DCD 0 ; Not Available\r
- DCD 0 ; Not Available\r
- DCD 0 ; Not Available\r
- DCD 0 ; Not Available\r
- DCD 0 ; Not Available\r
- DCD 0 ; Not Available\r
- DCD 0 ; Not Available\r
- ExcpVector DAC0_0_IRQHandler ; Handler name for SR DAC0_0\r
- ExcpVector DAC0_1_IRQHandler ; Handler name for SR DAC0_1\r
- ExcpVector CCU40_0_IRQHandler ; Handler name for SR CCU40_0\r
- ExcpVector CCU40_1_IRQHandler ; Handler name for SR CCU40_1\r
- ExcpVector CCU40_2_IRQHandler ; Handler name for SR CCU40_2\r
- ExcpVector CCU40_3_IRQHandler ; Handler name for SR CCU40_3\r
- ExcpVector CCU41_0_IRQHandler ; Handler name for SR CCU41_0\r
- ExcpVector CCU41_1_IRQHandler ; Handler name for SR CCU41_1\r
- ExcpVector CCU41_2_IRQHandler ; Handler name for SR CCU41_2\r
- ExcpVector CCU41_3_IRQHandler ; Handler name for SR CCU41_3\r
- DCD 0 ; Not Available\r
- DCD 0 ; Not Available\r
- DCD 0 ; Not Available\r
- DCD 0 ; Not Available\r
- DCD 0 ; Not Available\r
- DCD 0 ; Not Available\r
- DCD 0 ; Not Available\r
- DCD 0 ; Not Available\r
- ExcpVector CCU80_0_IRQHandler ; Handler name for SR CCU80_0\r
- ExcpVector CCU80_1_IRQHandler ; Handler name for SR CCU80_1\r
- ExcpVector CCU80_2_IRQHandler ; Handler name for SR CCU80_2\r
- ExcpVector CCU80_3_IRQHandler ; Handler name for SR CCU80_3\r
- DCD 0 ; Not Available\r
- DCD 0 ; Not Available\r
- DCD 0 ; Not Available\r
- DCD 0 ; Not Available\r
- ExcpVector POSIF0_0_IRQHandler ; Handler name for SR POSIF0_0\r
- ExcpVector POSIF0_1_IRQHandler ; Handler name for SR POSIF0_1\r
- DCD 0 ; Not Available\r
- DCD 0 ; Not Available\r
- ExcpVector HRPWM_0_IRQHandler ; Handler name for SR HRPWM_0\r
- ExcpVector HRPWM_1_IRQHandler ; Handler name for SR HRPWM_1\r
- ExcpVector HRPWM_2_IRQHandler ; Handler name for SR HRPWM_2\r
- ExcpVector HRPWM_3_IRQHandler ; Handler name for SR HRPWM_3\r
- ExcpVector CAN0_0_IRQHandler ; Handler name for SR CAN0_0\r
- ExcpVector CAN0_1_IRQHandler ; Handler name for SR CAN0_1\r
- ExcpVector CAN0_2_IRQHandler ; Handler name for SR CAN0_2\r
- ExcpVector CAN0_3_IRQHandler ; Handler name for SR CAN0_3\r
- ExcpVector CAN0_4_IRQHandler ; Handler name for SR CAN0_4\r
- ExcpVector CAN0_5_IRQHandler ; Handler name for SR CAN0_5\r
- ExcpVector CAN0_6_IRQHandler ; Handler name for SR CAN0_6\r
- ExcpVector CAN0_7_IRQHandler ; Handler name for SR CAN0_7\r
- ExcpVector USIC0_0_IRQHandler ; Handler name for SR USIC0_0\r
- ExcpVector USIC0_1_IRQHandler ; Handler name for SR USIC0_1\r
- ExcpVector USIC0_2_IRQHandler ; Handler name for SR USIC0_2\r
- ExcpVector USIC0_3_IRQHandler ; Handler name for SR USIC0_3\r
- ExcpVector USIC0_4_IRQHandler ; Handler name for SR USIC0_4\r
- ExcpVector USIC0_5_IRQHandler ; Handler name for SR USIC0_5\r
- ExcpVector USIC1_0_IRQHandler ; Handler name for SR USIC1_0\r
- ExcpVector USIC1_1_IRQHandler ; Handler name for SR USIC1_1\r
- ExcpVector USIC1_2_IRQHandler ; Handler name for SR USIC1_2\r
- ExcpVector USIC1_3_IRQHandler ; Handler name for SR USIC1_3\r
- ExcpVector USIC1_4_IRQHandler ; Handler name for SR USIC1_4\r
- ExcpVector USIC1_5_IRQHandler ; Handler name for SR USIC1_5\r
- DCD 0 ; Not Available\r
- DCD 0 ; Not Available\r
- DCD 0 ; Not Available\r
- DCD 0 ; Not Available\r
- DCD 0 ; Not Available\r
- DCD 0 ; Not Available\r
- ExcpVector LEDTS0_0_IRQHandler ; Handler name for SR LEDTS0_0\r
- DCD 0 ; Not Available\r
- ExcpVector FCE0_0_IRQHandler ; Handler name for SR FCE0_0\r
- ExcpVector GPDMA0_0_IRQHandler ; Handler name for SR GPDMA0_0\r
- DCD 0 ; Not Available\r
- ExcpVector USB0_0_IRQHandler ; Handler name for SR USB0_0\r
- DCD 0 ; Not Available\r
- DCD 0 ; Not Available\r
- DCD 0 ; Not Available\r
- DCD 0 ; Not Available\r
+ ExcpVector SCU_0_IRQHandler ; Handler name for SR SCU_0 \r
+ ExcpVector ERU0_0_IRQHandler ; Handler name for SR ERU0_0 \r
+ ExcpVector ERU0_1_IRQHandler ; Handler name for SR ERU0_1 \r
+ ExcpVector ERU0_2_IRQHandler ; Handler name for SR ERU0_2 \r
+ ExcpVector ERU0_3_IRQHandler ; Handler name for SR ERU0_3 \r
+ ExcpVector ERU1_0_IRQHandler ; Handler name for SR ERU1_0 \r
+ ExcpVector ERU1_1_IRQHandler ; Handler name for SR ERU1_1 \r
+ ExcpVector ERU1_2_IRQHandler ; Handler name for SR ERU1_2 \r
+ ExcpVector ERU1_3_IRQHandler ; Handler name for SR ERU1_3 \r
+ DCD 0 ; Not Available \r
+ DCD 0 ; Not Available \r
+ DCD 0 ; Not Available \r
+ ExcpVector PMU0_0_IRQHandler ; Handler name for SR PMU0_0 \r
+ DCD 0 ; Not Available \r
+ ExcpVector VADC0_C0_0_IRQHandler ; Handler name for SR VADC0_C0_0 \r
+ ExcpVector VADC0_C0_1_IRQHandler ; Handler name for SR VADC0_C0_1 \r
+ ExcpVector VADC0_C0_2_IRQHandler ; Handler name for SR VADC0_C0_1 \r
+ ExcpVector VADC0_C0_3_IRQHandler ; Handler name for SR VADC0_C0_3 \r
+ ExcpVector VADC0_G0_0_IRQHandler ; Handler name for SR VADC0_G0_0 \r
+ ExcpVector VADC0_G0_1_IRQHandler ; Handler name for SR VADC0_G0_1 \r
+ ExcpVector VADC0_G0_2_IRQHandler ; Handler name for SR VADC0_G0_2 \r
+ ExcpVector VADC0_G0_3_IRQHandler ; Handler name for SR VADC0_G0_3 \r
+ ExcpVector VADC0_G1_0_IRQHandler ; Handler name for SR VADC0_G1_0 \r
+ ExcpVector VADC0_G1_1_IRQHandler ; Handler name for SR VADC0_G1_1 \r
+ ExcpVector VADC0_G1_2_IRQHandler ; Handler name for SR VADC0_G1_2 \r
+ ExcpVector VADC0_G1_3_IRQHandler ; Handler name for SR VADC0_G1_3 \r
+ DCD 0 ; Not Available \r
+ DCD 0 ; Not Available \r
+ DCD 0 ; Not Available \r
+ DCD 0 ; Not Available \r
+ DCD 0 ; Not Available \r
+ DCD 0 ; Not Available \r
+ DCD 0 ; Not Available \r
+ DCD 0 ; Not Available \r
+ DCD 0 ; Not Available \r
+ DCD 0 ; Not Available \r
+ DCD 0 ; Not Available \r
+ DCD 0 ; Not Available \r
+ DCD 0 ; Not Available \r
+ DCD 0 ; Not Available \r
+ DCD 0 ; Not Available \r
+ DCD 0 ; Not Available \r
+ ExcpVector DAC0_0_IRQHandler ; Handler name for SR DAC0_0 \r
+ ExcpVector DAC0_1_IRQHandler ; Handler name for SR DAC0_1 \r
+ ExcpVector CCU40_0_IRQHandler ; Handler name for SR CCU40_0 \r
+ ExcpVector CCU40_1_IRQHandler ; Handler name for SR CCU40_1 \r
+ ExcpVector CCU40_2_IRQHandler ; Handler name for SR CCU40_2 \r
+ ExcpVector CCU40_3_IRQHandler ; Handler name for SR CCU40_3 \r
+ ExcpVector CCU41_0_IRQHandler ; Handler name for SR CCU41_0 \r
+ ExcpVector CCU41_1_IRQHandler ; Handler name for SR CCU41_1 \r
+ ExcpVector CCU41_2_IRQHandler ; Handler name for SR CCU41_2 \r
+ ExcpVector CCU41_3_IRQHandler ; Handler name for SR CCU41_3 \r
+ DCD 0 ; Not Available \r
+ DCD 0 ; Not Available \r
+ DCD 0 ; Not Available \r
+ DCD 0 ; Not Available \r
+ DCD 0 ; Not Available \r
+ DCD 0 ; Not Available \r
+ DCD 0 ; Not Available \r
+ DCD 0 ; Not Available \r
+ ExcpVector CCU80_0_IRQHandler ; Handler name for SR CCU80_0 \r
+ ExcpVector CCU80_1_IRQHandler ; Handler name for SR CCU80_1 \r
+ ExcpVector CCU80_2_IRQHandler ; Handler name for SR CCU80_2 \r
+ ExcpVector CCU80_3_IRQHandler ; Handler name for SR CCU80_3 \r
+ DCD 0 ; Not Available \r
+ DCD 0 ; Not Available \r
+ DCD 0 ; Not Available \r
+ DCD 0 ; Not Available \r
+ ExcpVector POSIF0_0_IRQHandler ; Handler name for SR POSIF0_0 \r
+ ExcpVector POSIF0_1_IRQHandler ; Handler name for SR POSIF0_1 \r
+ DCD 0 ; Not Available \r
+ DCD 0 ; Not Available \r
+ ExcpVector HRPWM_0_IRQHandler ; Handler name for SR HRPWM_0 \r
+ ExcpVector HRPWM_1_IRQHandler ; Handler name for SR HRPWM_1 \r
+ ExcpVector HRPWM_2_IRQHandler ; Handler name for SR HRPWM_2 \r
+ ExcpVector HRPWM_3_IRQHandler ; Handler name for SR HRPWM_3 \r
+ ExcpVector CAN0_0_IRQHandler ; Handler name for SR CAN0_0 \r
+ ExcpVector CAN0_1_IRQHandler ; Handler name for SR CAN0_1 \r
+ ExcpVector CAN0_2_IRQHandler ; Handler name for SR CAN0_2 \r
+ ExcpVector CAN0_3_IRQHandler ; Handler name for SR CAN0_3 \r
+ ExcpVector CAN0_4_IRQHandler ; Handler name for SR CAN0_4 \r
+ ExcpVector CAN0_5_IRQHandler ; Handler name for SR CAN0_5 \r
+ ExcpVector CAN0_6_IRQHandler ; Handler name for SR CAN0_6 \r
+ ExcpVector CAN0_7_IRQHandler ; Handler name for SR CAN0_7 \r
+ ExcpVector USIC0_0_IRQHandler ; Handler name for SR USIC0_0 \r
+ ExcpVector USIC0_1_IRQHandler ; Handler name for SR USIC0_1 \r
+ ExcpVector USIC0_2_IRQHandler ; Handler name for SR USIC0_2 \r
+ ExcpVector USIC0_3_IRQHandler ; Handler name for SR USIC0_3 \r
+ ExcpVector USIC0_4_IRQHandler ; Handler name for SR USIC0_4 \r
+ ExcpVector USIC0_5_IRQHandler ; Handler name for SR USIC0_5 \r
+ ExcpVector USIC1_0_IRQHandler ; Handler name for SR USIC1_0 \r
+ ExcpVector USIC1_1_IRQHandler ; Handler name for SR USIC1_1 \r
+ ExcpVector USIC1_2_IRQHandler ; Handler name for SR USIC1_2 \r
+ ExcpVector USIC1_3_IRQHandler ; Handler name for SR USIC1_3 \r
+ ExcpVector USIC1_4_IRQHandler ; Handler name for SR USIC1_4 \r
+ ExcpVector USIC1_5_IRQHandler ; Handler name for SR USIC1_5 \r
+ DCD 0 ; Not Available \r
+ DCD 0 ; Not Available \r
+ DCD 0 ; Not Available \r
+ DCD 0 ; Not Available \r
+ DCD 0 ; Not Available \r
+ DCD 0 ; Not Available \r
+ ExcpVector LEDTS0_0_IRQHandler ; Handler name for SR LEDTS0_0 \r
+ DCD 0 ; Not Available \r
+ ExcpVector FCE0_0_IRQHandler ; Handler name for SR FCE0_0 \r
+ ExcpVector GPDMA0_0_IRQHandler ; Handler name for SR GPDMA0_0 \r
+ DCD 0 ; Not Available \r
+ ExcpVector USB0_0_IRQHandler ; Handler name for SR USB0_0 \r
+ DCD 0 ; Not Available \r
+ DCD 0 ; Not Available \r
+ DCD 0 ; Not Available \r
+ DCD 0 ; Not Available \r
\r
\r
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;\r
Reset_Handler\r
\r
LDR R0, =SystemInit\r
- BLX R0\r
+ BLX R0 \r
LDR R0, =SystemInit_DAVE3\r
- BLX R0\r
+ BLX R0 \r
LDR R0, =__iar_program_start\r
BX R0\r
-\r
+ \r
\r
ProxyHandler NMI_Handler\r
ProxyHandler HardFault_Handler\r
ProxyHandler PendSV_Handler\r
ProxyHandler SysTick_Handler\r
\r
- ProxyHandler SCU_0_IRQHandler\r
- ProxyHandler ERU0_0_IRQHandler\r
- ProxyHandler ERU0_1_IRQHandler\r
- ProxyHandler ERU0_2_IRQHandler\r
- ProxyHandler ERU0_3_IRQHandler\r
- ProxyHandler ERU1_0_IRQHandler\r
- ProxyHandler ERU1_1_IRQHandler\r
- ProxyHandler ERU1_2_IRQHandler\r
- ProxyHandler ERU1_3_IRQHandler\r
- ProxyHandler PMU0_0_IRQHandler\r
- ProxyHandler VADC0_C0_0_IRQHandler\r
- ProxyHandler VADC0_C0_1_IRQHandler\r
- ProxyHandler VADC0_C0_2_IRQHandler\r
- ProxyHandler VADC0_C0_3_IRQHandler\r
- ProxyHandler VADC0_G0_0_IRQHandler\r
- ProxyHandler VADC0_G0_1_IRQHandler\r
- ProxyHandler VADC0_G0_2_IRQHandler\r
- ProxyHandler VADC0_G0_3_IRQHandler\r
- ProxyHandler VADC0_G1_0_IRQHandler\r
- ProxyHandler VADC0_G1_1_IRQHandler\r
- ProxyHandler VADC0_G1_2_IRQHandler\r
- ProxyHandler VADC0_G1_3_IRQHandler\r
- ProxyHandler DAC0_0_IRQHandler\r
- ProxyHandler DAC0_1_IRQHandler\r
- ProxyHandler CCU40_0_IRQHandler\r
- ProxyHandler CCU40_1_IRQHandler\r
- ProxyHandler CCU40_2_IRQHandler\r
- ProxyHandler CCU40_3_IRQHandler\r
- ProxyHandler CCU41_0_IRQHandler\r
- ProxyHandler CCU41_1_IRQHandler\r
- ProxyHandler CCU41_2_IRQHandler\r
- ProxyHandler CCU41_3_IRQHandler\r
- ProxyHandler CCU80_0_IRQHandler\r
- ProxyHandler CCU80_1_IRQHandler\r
- ProxyHandler CCU80_2_IRQHandler\r
- ProxyHandler CCU80_3_IRQHandler\r
- ProxyHandler POSIF0_0_IRQHandler\r
- ProxyHandler POSIF0_1_IRQHandler\r
- ProxyHandler HRPWM_0_IRQHandler\r
- ProxyHandler HRPWM_1_IRQHandler\r
- ProxyHandler HRPWM_2_IRQHandler\r
- ProxyHandler HRPWM_3_IRQHandler\r
- ProxyHandler CAN0_0_IRQHandler\r
- ProxyHandler CAN0_1_IRQHandler\r
- ProxyHandler CAN0_2_IRQHandler\r
- ProxyHandler CAN0_3_IRQHandler\r
- ProxyHandler CAN0_4_IRQHandler\r
- ProxyHandler CAN0_5_IRQHandler\r
- ProxyHandler CAN0_6_IRQHandler\r
- ProxyHandler CAN0_7_IRQHandler\r
- ProxyHandler USIC0_0_IRQHandler\r
- ProxyHandler USIC0_1_IRQHandler\r
- ProxyHandler USIC0_2_IRQHandler\r
- ProxyHandler USIC0_3_IRQHandler\r
- ProxyHandler USIC0_4_IRQHandler\r
- ProxyHandler USIC0_5_IRQHandler\r
- ProxyHandler USIC1_0_IRQHandler\r
- ProxyHandler USIC1_1_IRQHandler\r
- ProxyHandler USIC1_2_IRQHandler\r
- ProxyHandler USIC1_3_IRQHandler\r
- ProxyHandler USIC1_4_IRQHandler\r
- ProxyHandler USIC1_5_IRQHandler\r
- ProxyHandler LEDTS0_0_IRQHandler\r
- ProxyHandler FCE0_0_IRQHandler\r
- ProxyHandler GPDMA0_0_IRQHandler\r
- ProxyHandler USB0_0_IRQHandler\r
+ ProxyHandler SCU_0_IRQHandler \r
+ ProxyHandler ERU0_0_IRQHandler \r
+ ProxyHandler ERU0_1_IRQHandler \r
+ ProxyHandler ERU0_2_IRQHandler \r
+ ProxyHandler ERU0_3_IRQHandler \r
+ ProxyHandler ERU1_0_IRQHandler \r
+ ProxyHandler ERU1_1_IRQHandler \r
+ ProxyHandler ERU1_2_IRQHandler \r
+ ProxyHandler ERU1_3_IRQHandler \r
+ ProxyHandler PMU0_0_IRQHandler \r
+ ProxyHandler VADC0_C0_0_IRQHandler \r
+ ProxyHandler VADC0_C0_1_IRQHandler \r
+ ProxyHandler VADC0_C0_2_IRQHandler \r
+ ProxyHandler VADC0_C0_3_IRQHandler \r
+ ProxyHandler VADC0_G0_0_IRQHandler \r
+ ProxyHandler VADC0_G0_1_IRQHandler \r
+ ProxyHandler VADC0_G0_2_IRQHandler \r
+ ProxyHandler VADC0_G0_3_IRQHandler \r
+ ProxyHandler VADC0_G1_0_IRQHandler \r
+ ProxyHandler VADC0_G1_1_IRQHandler \r
+ ProxyHandler VADC0_G1_2_IRQHandler \r
+ ProxyHandler VADC0_G1_3_IRQHandler \r
+ ProxyHandler DAC0_0_IRQHandler \r
+ ProxyHandler DAC0_1_IRQHandler \r
+ ProxyHandler CCU40_0_IRQHandler \r
+ ProxyHandler CCU40_1_IRQHandler \r
+ ProxyHandler CCU40_2_IRQHandler \r
+ ProxyHandler CCU40_3_IRQHandler \r
+ ProxyHandler CCU41_0_IRQHandler \r
+ ProxyHandler CCU41_1_IRQHandler \r
+ ProxyHandler CCU41_2_IRQHandler \r
+ ProxyHandler CCU41_3_IRQHandler \r
+ ProxyHandler CCU80_0_IRQHandler \r
+ ProxyHandler CCU80_1_IRQHandler \r
+ ProxyHandler CCU80_2_IRQHandler \r
+ ProxyHandler CCU80_3_IRQHandler \r
+ ProxyHandler POSIF0_0_IRQHandler \r
+ ProxyHandler POSIF0_1_IRQHandler \r
+ ProxyHandler HRPWM_0_IRQHandler \r
+ ProxyHandler HRPWM_1_IRQHandler \r
+ ProxyHandler HRPWM_2_IRQHandler \r
+ ProxyHandler HRPWM_3_IRQHandler \r
+ ProxyHandler CAN0_0_IRQHandler \r
+ ProxyHandler CAN0_1_IRQHandler \r
+ ProxyHandler CAN0_2_IRQHandler \r
+ ProxyHandler CAN0_3_IRQHandler \r
+ ProxyHandler CAN0_4_IRQHandler \r
+ ProxyHandler CAN0_5_IRQHandler \r
+ ProxyHandler CAN0_6_IRQHandler \r
+ ProxyHandler CAN0_7_IRQHandler \r
+ ProxyHandler USIC0_0_IRQHandler \r
+ ProxyHandler USIC0_1_IRQHandler \r
+ ProxyHandler USIC0_2_IRQHandler \r
+ ProxyHandler USIC0_3_IRQHandler \r
+ ProxyHandler USIC0_4_IRQHandler \r
+ ProxyHandler USIC0_5_IRQHandler \r
+ ProxyHandler USIC1_0_IRQHandler \r
+ ProxyHandler USIC1_1_IRQHandler \r
+ ProxyHandler USIC1_2_IRQHandler \r
+ ProxyHandler USIC1_3_IRQHandler \r
+ ProxyHandler USIC1_4_IRQHandler \r
+ ProxyHandler USIC1_5_IRQHandler \r
+ ProxyHandler LEDTS0_0_IRQHandler \r
+ ProxyHandler FCE0_0_IRQHandler \r
+ ProxyHandler GPDMA0_0_IRQHandler \r
+ ProxyHandler USB0_0_IRQHandler \r
\r
; Definition of the default weak SystemInit_DAVE3 function for DAVE3 system init.\r
PUBWEAK SystemInit_DAVE3\r
SECTION .text:CODE:REORDER:NOROOT(2)\r
SystemInit_DAVE3\r
- NOP\r
+ NOP \r
BX LR\r
-\r
+ \r
; Definition of the default weak DAVE3 function for clock App usage.\r
; AllowPLLInitByStartup Handler\r
PUBWEAK AllowPLLInitByStartup\r
SECTION .text:CODE:REORDER:NOROOT(2)\r
-AllowPLLInitByStartup\r
+AllowPLLInitByStartup \r
MOV R0,#1\r
- BX LR\r
+ BX LR \r
\r
PREF_PCON EQU 0x58004000\r
SCU_GCU_PEEN EQU 0x5000413C\r
SCU_GCU_PEFLAG EQU 0x50004150\r
\r
-\r
+ \r
END\r
/**\r
* @file Startup_XMC4400.s\r
* XMC4000 Device Series\r
-* @version V1.0\r
-* @date Jan 2013\r
+* @version V1.1\r
+* @date August 2013\r
*\r
* Copyright (C) 2012 IAR Systems. All rights reserved.\r
* Copyright (C) 2012 Infineon Technologies AG. All rights reserved.\r
*\r
*\r
* @par\r
-* Infineon Technologies AG (Infineon) is supplying this software for use with\r
+* Infineon Technologies AG (Infineon) is supplying this software for use with \r
* Infineon's microcontrollers. This file can be freely distributed\r
* within development tools that are supporting such microcontrollers.\r
*\r
/* ***************************************************************************\r
V1.0 January, 30 2013: In ths version a workoraound for the erratum PMU_CM.001\r
is implmented (patch for the Exception and interrupt handlers)\r
+V1.1 Augsut, 17 2013: Fix the bug of preprocessor due to workoraound for \r
+the erratum PMU_CM.001, and the bug of stack pointer alignment to a 8 byte boundary \r
\r
**************************************************************************** */\r
\r
SECTION .intvec:CODE:NOROOT(2)\r
\r
EXTERN __iar_program_start\r
- EXTERN SystemInit\r
+ EXTERN SystemInit \r
PUBLIC __vector_table\r
\r
DATA\r
;/* ===========START : MACRO DEFINITION MACRO DEFINITION ================== */\r
;/*\r
; * STEP_AB and below have the prefetch functional deviation (Errata id: PMU_CM.001).\r
-; * A veneer defined below will first be executed which in turn branches to the final\r
+; * A veneer defined below will first be executed which in turn branches to the final \r
; * exception handler.\r
; *\r
; * In addition to defining the veneers, the vector table must for these buggy\r
; */\r
\r
;set WORKAROUND_PMU_CM001 under Options for target\r
-;Initialize varaible WORKAROUND_PMU_CM001 as FALSE\r
-WORKAROUND_PMU_CM001 SET 1\r
+;define WORKAROUND_PMU_CM001 as TRUE\r
+#define WORKAROUND_PMU_CM001 1\r
\r
;/* A macro to setup a vector table entry based on STEP ID */\r
#ifdef WORKAROUND_PMU_CM001\r
#else\r
ExcpVector macro\r
DCD \1\r
- endm\r
+ endm \r
#endif\r
\r
;/* A macro to ease definition of the various handlers based on STEP ID */\r
SECTION .text:CODE:REORDER:NOROOT(1)\r
\1\r
B \1\r
- endm\r
-;/* And then define a veneer that will branch to the final excp handler */\r
-ProxyHandler_Veneer macro\r
- PUBWEAK \1\r
+;/* And then define a veneer that will branch to the final excp handler */ \r
+ PUBWEAK \1_Veneer\r
SECTION .text:CODE:REORDER:NOROOT(2)\r
-\1\r
- LDR R0, =ProxyHandler\r
- PUSH {LR}\r
+\1_Veneer\r
+ LDR R0, =\1\r
+ PUSH {LR} /* Breaks AAPCS */\r
+ SUB SP,#4 /* Restores AAPCS */\r
BLX R0\r
+ ADD SP,#4\r
POP {PC}\r
endm\r
- ;/* No prefetch bug, hence define only the final exception handler */\r
+\r
+ ;/* No prefetch bug, hence define only the final exception handler */ \r
#else\r
ProxyHandler macro\r
PUBWEAK \1\r
\r
__vector_table\r
DCD sfe(CSTACK)\r
- DCD Reset_Handler ; Reset Handler\r
-\r
- ExcpVector NMI_Handler ; NMI Handler\r
- ExcpVector HardFault_Handler ; Hard Fault Handler\r
- ExcpVector MemManage_Handler ; MPU Fault Handler\r
- ExcpVector BusFault_Handler ; Bus Fault Handler\r
- ExcpVector UsageFault_Handler ; Usage Fault Handler\r
- DCD 0 ; Reserved\r
- DCD 0 ; Reserved\r
- DCD 0 ; Reserved\r
- DCD 0 ; Reserved\r
- ExcpVector SVC_Handler ; SVCall Handler\r
- ExcpVector DebugMon_Handler ; Debug Monitor Handler\r
- DCD 0 ; Reserved\r
- ExcpVector PendSV_Handler ; PendSV Handler\r
- ExcpVector SysTick_Handler ; SysTick Handler\r
+ DCD Reset_Handler ; Reset Handler \r
+ \r
+ ExcpVector NMI_Handler ; NMI Handler \r
+ ExcpVector HardFault_Handler ; Hard Fault Handler \r
+ ExcpVector MemManage_Handler ; MPU Fault Handler \r
+ ExcpVector BusFault_Handler ; Bus Fault Handler \r
+ ExcpVector UsageFault_Handler ; Usage Fault Handler \r
+ DCD 0 ; Reserved \r
+ DCD 0 ; Reserved \r
+ DCD 0 ; Reserved \r
+ DCD 0 ; Reserved \r
+ ExcpVector SVC_Handler ; SVCall Handler \r
+ ExcpVector DebugMon_Handler ; Debug Monitor Handler \r
+ DCD 0 ; Reserved \r
+ ExcpVector PendSV_Handler ; PendSV Handler \r
+ ExcpVector SysTick_Handler ; SysTick Handler \r
\r
; Interrupt Handlers for Service Requests (SR) from XMC4500 Peripherals\r
- ExcpVector SCU_0_IRQHandler ; Handler name for SR SCU_0\r
- ExcpVector ERU0_0_IRQHandler ; Handler name for SR ERU0_0\r
- ExcpVector ERU0_1_IRQHandler ; Handler name for SR ERU0_1\r
- ExcpVector ERU0_2_IRQHandler ; Handler name for SR ERU0_2\r
- ExcpVector ERU0_3_IRQHandler ; Handler name for SR ERU0_3\r
- ExcpVector ERU1_0_IRQHandler ; Handler name for SR ERU1_0\r
- ExcpVector ERU1_1_IRQHandler ; Handler name for SR ERU1_1\r
- ExcpVector ERU1_2_IRQHandler ; Handler name for SR ERU1_2\r
- ExcpVector ERU1_3_IRQHandler ; Handler name for SR ERU1_3\r
- DCD 0 ; Not Available\r
- DCD 0 ; Not Available\r
- DCD 0 ; Not Available\r
- ExcpVector PMU0_0_IRQHandler ; Handler name for SR PMU0_0\r
- DCD 0 ; Not Available\r
- ExcpVector VADC0_C0_0_IRQHandler ; Handler name for SR VADC0_C0_0\r
- ExcpVector VADC0_C0_1_IRQHandler ; Handler name for SR VADC0_C0_1\r
- ExcpVector VADC0_C0_2_IRQHandler ; Handler name for SR VADC0_C0_1\r
- ExcpVector VADC0_C0_3_IRQHandler ; Handler name for SR VADC0_C0_3\r
- ExcpVector VADC0_G0_0_IRQHandler ; Handler name for SR VADC0_G0_0\r
- ExcpVector VADC0_G0_1_IRQHandler ; Handler name for SR VADC0_G0_1\r
- ExcpVector VADC0_G0_2_IRQHandler ; Handler name for SR VADC0_G0_2\r
- ExcpVector VADC0_G0_3_IRQHandler ; Handler name for SR VADC0_G0_3\r
- ExcpVector VADC0_G1_0_IRQHandler ; Handler name for SR VADC0_G1_0\r
- ExcpVector VADC0_G1_1_IRQHandler ; Handler name for SR VADC0_G1_1\r
- ExcpVector VADC0_G1_2_IRQHandler ; Handler name for SR VADC0_G1_2\r
- ExcpVector VADC0_G1_3_IRQHandler ; Handler name for SR VADC0_G1_3\r
- ExcpVector VADC0_G2_0_IRQHandler ; Handler name for SR VADC0_G2_0\r
- ExcpVector VADC0_G2_1_IRQHandler ; Handler name for SR VADC0_G2_1\r
- ExcpVector VADC0_G2_2_IRQHandler ; Handler name for SR VADC0_G2_2\r
- ExcpVector VADC0_G2_3_IRQHandler ; Handler name for SR VADC0_G2_3\r
- ExcpVector VADC0_G3_0_IRQHandler ; Handler name for SR VADC0_G3_0\r
- ExcpVector VADC0_G3_1_IRQHandler ; Handler name for SR VADC0_G3_1\r
- ExcpVector VADC0_G3_2_IRQHandler ; Handler name for SR VADC0_G3_2\r
- ExcpVector VADC0_G3_3_IRQHandler ; Handler name for SR VADC0_G3_3\r
- ExcpVector DSD0_0_IRQHandler ; Handler name for SR DSD_SRM_0\r
- ExcpVector DSD0_1_IRQHandler ; Handler name for SR DSD_SRM_1\r
- ExcpVector DSD0_2_IRQHandler ; Handler name for SR DSD_SRM_2\r
- ExcpVector DSD0_3_IRQHandler ; Handler name for SR DSD_SRM_3\r
- ExcpVector DSD0_4_IRQHandler ; Handler name for SR DSD_SRA_0\r
- ExcpVector DSD0_5_IRQHandler ; Handler name for SR DSD_SRA_1\r
- ExcpVector DSD0_6_IRQHandler ; Handler name for SR DSD_SRA_2\r
- ExcpVector DSD0_7_IRQHandler ; Handler name for SR DSD_SRA_3\r
- ExcpVector DAC0_0_IRQHandler ; Handler name for SR DAC0_0\r
- ExcpVector DAC0_1_IRQHandler ; Handler name for SR DAC0_1\r
- ExcpVector CCU40_0_IRQHandler ; Handler name for SR CCU40_0\r
- ExcpVector CCU40_1_IRQHandler ; Handler name for SR CCU40_1\r
- ExcpVector CCU40_2_IRQHandler ; Handler name for SR CCU40_2\r
- ExcpVector CCU40_3_IRQHandler ; Handler name for SR CCU40_3\r
- ExcpVector CCU41_0_IRQHandler ; Handler name for SR CCU41_0\r
- ExcpVector CCU41_1_IRQHandler ; Handler name for SR CCU41_1\r
- ExcpVector CCU41_2_IRQHandler ; Handler name for SR CCU41_2\r
- ExcpVector CCU41_3_IRQHandler ; Handler name for SR CCU41_3\r
- ExcpVector CCU42_0_IRQHandler ; Handler name for SR CCU42_0\r
- ExcpVector CCU42_1_IRQHandler ; Handler name for SR CCU42_1\r
- ExcpVector CCU42_2_IRQHandler ; Handler name for SR CCU42_2\r
- ExcpVector CCU42_3_IRQHandler ; Handler name for SR CCU42_3\r
- ExcpVector CCU43_0_IRQHandler ; Handler name for SR CCU43_0\r
- ExcpVector CCU43_1_IRQHandler ; Handler name for SR CCU43_1\r
- ExcpVector CCU43_2_IRQHandler ; Handler name for SR CCU43_2\r
- ExcpVector CCU43_3_IRQHandler ; Handler name for SR CCU43_3\r
- ExcpVector CCU80_0_IRQHandler ; Handler name for SR CCU80_0\r
- ExcpVector CCU80_1_IRQHandler ; Handler name for SR CCU80_1\r
- ExcpVector CCU80_2_IRQHandler ; Handler name for SR CCU80_2\r
- ExcpVector CCU80_3_IRQHandler ; Handler name for SR CCU80_3\r
- ExcpVector CCU81_0_IRQHandler ; Handler name for SR CCU81_0\r
- ExcpVector CCU81_1_IRQHandler ; Handler name for SR CCU81_1\r
- ExcpVector CCU81_2_IRQHandler ; Handler name for SR CCU81_2\r
- ExcpVector CCU81_3_IRQHandler ; Handler name for SR CCU81_3\r
- ExcpVector POSIF0_0_IRQHandler ; Handler name for SR POSIF0_0\r
- ExcpVector POSIF0_1_IRQHandler ; Handler name for SR POSIF0_1\r
- ExcpVector POSIF1_0_IRQHandler ; Handler name for SR POSIF1_0\r
- ExcpVector POSIF1_1_IRQHandler ; Handler name for SR POSIF1_1\r
- ExcpVector HRPWM_0_IRQHandler ; Handler name for SR HRPWM_0\r
- ExcpVector HRPWM_1_IRQHandler ; Handler name for SR HRPWM_1\r
- ExcpVector HRPWM_2_IRQHandler ; Handler name for SR HRPWM_2\r
- ExcpVector HRPWM_3_IRQHandler ; Handler name for SR HRPWM_3\r
- ExcpVector CAN0_0_IRQHandler ; Handler name for SR CAN0_0\r
- ExcpVector CAN0_1_IRQHandler ; Handler name for SR CAN0_1\r
- ExcpVector CAN0_2_IRQHandler ; Handler name for SR CAN0_2\r
- ExcpVector CAN0_3_IRQHandler ; Handler name for SR CAN0_3\r
- ExcpVector CAN0_4_IRQHandler ; Handler name for SR CAN0_4\r
- ExcpVector CAN0_5_IRQHandler ; Handler name for SR CAN0_5\r
- ExcpVector CAN0_6_IRQHandler ; Handler name for SR CAN0_6\r
- ExcpVector CAN0_7_IRQHandler ; Handler name for SR CAN0_7\r
- ExcpVector USIC0_0_IRQHandler ; Handler name for SR USIC0_0\r
- ExcpVector USIC0_1_IRQHandler ; Handler name for SR USIC0_1\r
- ExcpVector USIC0_2_IRQHandler ; Handler name for SR USIC0_2\r
- ExcpVector USIC0_3_IRQHandler ; Handler name for SR USIC0_3\r
- ExcpVector USIC0_4_IRQHandler ; Handler name for SR USIC0_4\r
- ExcpVector USIC0_5_IRQHandler ; Handler name for SR USIC0_5\r
- ExcpVector USIC1_0_IRQHandler ; Handler name for SR USIC1_0\r
- ExcpVector USIC1_1_IRQHandler ; Handler name for SR USIC1_1\r
- ExcpVector USIC1_2_IRQHandler ; Handler name for SR USIC1_2\r
- ExcpVector USIC1_3_IRQHandler ; Handler name for SR USIC1_3\r
- ExcpVector USIC1_4_IRQHandler ; Handler name for SR USIC1_4\r
- ExcpVector USIC1_5_IRQHandler ; Handler name for SR USIC1_5\r
- DCD 0 ; Not Available\r
- DCD 0 ; Not Available\r
- DCD 0 ; Not Available\r
- DCD 0 ; Not Available\r
- DCD 0 ; Not Available\r
- DCD 0 ; Not Available\r
- ExcpVector LEDTS0_0_IRQHandler ; Handler name for SR LEDTS0_0\r
- DCD 0 ; Not Available\r
- ExcpVector FCE0_0_IRQHandler ; Handler name for SR FCE0_0\r
- ExcpVector GPDMA0_0_IRQHandler ; Handler name for SR GPDMA0_0\r
- DCD 0 ; Not Available\r
- ExcpVector USB0_0_IRQHandler ; Handler name for SR USB0_0\r
- ExcpVector ETH0_0_IRQHandler ; Handler name for SR ETH0_0\r
- DCD 0 ; Not Available\r
- DCD 0 ; Not Available\r
- DCD 0 ; Not Available\r
+ ExcpVector SCU_0_IRQHandler ; Handler name for SR SCU_0 \r
+ ExcpVector ERU0_0_IRQHandler ; Handler name for SR ERU0_0 \r
+ ExcpVector ERU0_1_IRQHandler ; Handler name for SR ERU0_1 \r
+ ExcpVector ERU0_2_IRQHandler ; Handler name for SR ERU0_2 \r
+ ExcpVector ERU0_3_IRQHandler ; Handler name for SR ERU0_3 \r
+ ExcpVector ERU1_0_IRQHandler ; Handler name for SR ERU1_0 \r
+ ExcpVector ERU1_1_IRQHandler ; Handler name for SR ERU1_1 \r
+ ExcpVector ERU1_2_IRQHandler ; Handler name for SR ERU1_2 \r
+ ExcpVector ERU1_3_IRQHandler ; Handler name for SR ERU1_3 \r
+ DCD 0 ; Not Available \r
+ DCD 0 ; Not Available \r
+ DCD 0 ; Not Available \r
+ ExcpVector PMU0_0_IRQHandler ; Handler name for SR PMU0_0 \r
+ DCD 0 ; Not Available \r
+ ExcpVector VADC0_C0_0_IRQHandler ; Handler name for SR VADC0_C0_0 \r
+ ExcpVector VADC0_C0_1_IRQHandler ; Handler name for SR VADC0_C0_1 \r
+ ExcpVector VADC0_C0_2_IRQHandler ; Handler name for SR VADC0_C0_1 \r
+ ExcpVector VADC0_C0_3_IRQHandler ; Handler name for SR VADC0_C0_3 \r
+ ExcpVector VADC0_G0_0_IRQHandler ; Handler name for SR VADC0_G0_0 \r
+ ExcpVector VADC0_G0_1_IRQHandler ; Handler name for SR VADC0_G0_1 \r
+ ExcpVector VADC0_G0_2_IRQHandler ; Handler name for SR VADC0_G0_2 \r
+ ExcpVector VADC0_G0_3_IRQHandler ; Handler name for SR VADC0_G0_3 \r
+ ExcpVector VADC0_G1_0_IRQHandler ; Handler name for SR VADC0_G1_0 \r
+ ExcpVector VADC0_G1_1_IRQHandler ; Handler name for SR VADC0_G1_1 \r
+ ExcpVector VADC0_G1_2_IRQHandler ; Handler name for SR VADC0_G1_2 \r
+ ExcpVector VADC0_G1_3_IRQHandler ; Handler name for SR VADC0_G1_3 \r
+ ExcpVector VADC0_G2_0_IRQHandler ; Handler name for SR VADC0_G2_0 \r
+ ExcpVector VADC0_G2_1_IRQHandler ; Handler name for SR VADC0_G2_1 \r
+ ExcpVector VADC0_G2_2_IRQHandler ; Handler name for SR VADC0_G2_2 \r
+ ExcpVector VADC0_G2_3_IRQHandler ; Handler name for SR VADC0_G2_3 \r
+ ExcpVector VADC0_G3_0_IRQHandler ; Handler name for SR VADC0_G3_0 \r
+ ExcpVector VADC0_G3_1_IRQHandler ; Handler name for SR VADC0_G3_1 \r
+ ExcpVector VADC0_G3_2_IRQHandler ; Handler name for SR VADC0_G3_2 \r
+ ExcpVector VADC0_G3_3_IRQHandler ; Handler name for SR VADC0_G3_3 \r
+ ExcpVector DSD0_0_IRQHandler ; Handler name for SR DSD_SRM_0 \r
+ ExcpVector DSD0_1_IRQHandler ; Handler name for SR DSD_SRM_1 \r
+ ExcpVector DSD0_2_IRQHandler ; Handler name for SR DSD_SRM_2 \r
+ ExcpVector DSD0_3_IRQHandler ; Handler name for SR DSD_SRM_3 \r
+ ExcpVector DSD0_4_IRQHandler ; Handler name for SR DSD_SRA_0 \r
+ ExcpVector DSD0_5_IRQHandler ; Handler name for SR DSD_SRA_1 \r
+ ExcpVector DSD0_6_IRQHandler ; Handler name for SR DSD_SRA_2 \r
+ ExcpVector DSD0_7_IRQHandler ; Handler name for SR DSD_SRA_3 \r
+ ExcpVector DAC0_0_IRQHandler ; Handler name for SR DAC0_0 \r
+ ExcpVector DAC0_1_IRQHandler ; Handler name for SR DAC0_1 \r
+ ExcpVector CCU40_0_IRQHandler ; Handler name for SR CCU40_0 \r
+ ExcpVector CCU40_1_IRQHandler ; Handler name for SR CCU40_1 \r
+ ExcpVector CCU40_2_IRQHandler ; Handler name for SR CCU40_2 \r
+ ExcpVector CCU40_3_IRQHandler ; Handler name for SR CCU40_3 \r
+ ExcpVector CCU41_0_IRQHandler ; Handler name for SR CCU41_0 \r
+ ExcpVector CCU41_1_IRQHandler ; Handler name for SR CCU41_1 \r
+ ExcpVector CCU41_2_IRQHandler ; Handler name for SR CCU41_2 \r
+ ExcpVector CCU41_3_IRQHandler ; Handler name for SR CCU41_3 \r
+ ExcpVector CCU42_0_IRQHandler ; Handler name for SR CCU42_0 \r
+ ExcpVector CCU42_1_IRQHandler ; Handler name for SR CCU42_1 \r
+ ExcpVector CCU42_2_IRQHandler ; Handler name for SR CCU42_2 \r
+ ExcpVector CCU42_3_IRQHandler ; Handler name for SR CCU42_3 \r
+ ExcpVector CCU43_0_IRQHandler ; Handler name for SR CCU43_0 \r
+ ExcpVector CCU43_1_IRQHandler ; Handler name for SR CCU43_1 \r
+ ExcpVector CCU43_2_IRQHandler ; Handler name for SR CCU43_2 \r
+ ExcpVector CCU43_3_IRQHandler ; Handler name for SR CCU43_3 \r
+ ExcpVector CCU80_0_IRQHandler ; Handler name for SR CCU80_0 \r
+ ExcpVector CCU80_1_IRQHandler ; Handler name for SR CCU80_1 \r
+ ExcpVector CCU80_2_IRQHandler ; Handler name for SR CCU80_2 \r
+ ExcpVector CCU80_3_IRQHandler ; Handler name for SR CCU80_3 \r
+ ExcpVector CCU81_0_IRQHandler ; Handler name for SR CCU81_0 \r
+ ExcpVector CCU81_1_IRQHandler ; Handler name for SR CCU81_1 \r
+ ExcpVector CCU81_2_IRQHandler ; Handler name for SR CCU81_2 \r
+ ExcpVector CCU81_3_IRQHandler ; Handler name for SR CCU81_3 \r
+ ExcpVector POSIF0_0_IRQHandler ; Handler name for SR POSIF0_0 \r
+ ExcpVector POSIF0_1_IRQHandler ; Handler name for SR POSIF0_1 \r
+ ExcpVector POSIF1_0_IRQHandler ; Handler name for SR POSIF1_0 \r
+ ExcpVector POSIF1_1_IRQHandler ; Handler name for SR POSIF1_1 \r
+ ExcpVector HRPWM_0_IRQHandler ; Handler name for SR HRPWM_0 \r
+ ExcpVector HRPWM_1_IRQHandler ; Handler name for SR HRPWM_1 \r
+ ExcpVector HRPWM_2_IRQHandler ; Handler name for SR HRPWM_2 \r
+ ExcpVector HRPWM_3_IRQHandler ; Handler name for SR HRPWM_3 \r
+ ExcpVector CAN0_0_IRQHandler ; Handler name for SR CAN0_0 \r
+ ExcpVector CAN0_1_IRQHandler ; Handler name for SR CAN0_1 \r
+ ExcpVector CAN0_2_IRQHandler ; Handler name for SR CAN0_2 \r
+ ExcpVector CAN0_3_IRQHandler ; Handler name for SR CAN0_3 \r
+ ExcpVector CAN0_4_IRQHandler ; Handler name for SR CAN0_4 \r
+ ExcpVector CAN0_5_IRQHandler ; Handler name for SR CAN0_5 \r
+ ExcpVector CAN0_6_IRQHandler ; Handler name for SR CAN0_6 \r
+ ExcpVector CAN0_7_IRQHandler ; Handler name for SR CAN0_7 \r
+ ExcpVector USIC0_0_IRQHandler ; Handler name for SR USIC0_0 \r
+ ExcpVector USIC0_1_IRQHandler ; Handler name for SR USIC0_1 \r
+ ExcpVector USIC0_2_IRQHandler ; Handler name for SR USIC0_2 \r
+ ExcpVector USIC0_3_IRQHandler ; Handler name for SR USIC0_3 \r
+ ExcpVector USIC0_4_IRQHandler ; Handler name for SR USIC0_4 \r
+ ExcpVector USIC0_5_IRQHandler ; Handler name for SR USIC0_5 \r
+ ExcpVector USIC1_0_IRQHandler ; Handler name for SR USIC1_0 \r
+ ExcpVector USIC1_1_IRQHandler ; Handler name for SR USIC1_1 \r
+ ExcpVector USIC1_2_IRQHandler ; Handler name for SR USIC1_2 \r
+ ExcpVector USIC1_3_IRQHandler ; Handler name for SR USIC1_3 \r
+ ExcpVector USIC1_4_IRQHandler ; Handler name for SR USIC1_4 \r
+ ExcpVector USIC1_5_IRQHandler ; Handler name for SR USIC1_5 \r
+ DCD 0 ; Not Available \r
+ DCD 0 ; Not Available \r
+ DCD 0 ; Not Available \r
+ DCD 0 ; Not Available \r
+ DCD 0 ; Not Available \r
+ DCD 0 ; Not Available \r
+ ExcpVector LEDTS0_0_IRQHandler ; Handler name for SR LEDTS0_0 \r
+ DCD 0 ; Not Available \r
+ ExcpVector FCE0_0_IRQHandler ; Handler name for SR FCE0_0 \r
+ ExcpVector GPDMA0_0_IRQHandler ; Handler name for SR GPDMA0_0 \r
+ DCD 0 ; Not Available \r
+ ExcpVector USB0_0_IRQHandler ; Handler name for SR USB0_0 \r
+ ExcpVector ETH0_0_IRQHandler ; Handler name for SR ETH0_0 \r
+ DCD 0 ; Not Available \r
+ DCD 0 ; Not Available \r
+ DCD 0 ; Not Available \r
\r
\r
\r
Reset_Handler\r
\r
LDR R0, =SystemInit\r
- BLX R0\r
+ BLX R0 \r
LDR R0, =SystemInit_DAVE3\r
- BLX R0\r
+ BLX R0 \r
LDR R0, =__iar_program_start\r
- BX R0\r
-\r
+ BX R0 \r
+ \r
\r
ProxyHandler NMI_Handler\r
ProxyHandler HardFault_Handler\r
ProxyHandler PendSV_Handler\r
ProxyHandler SysTick_Handler\r
\r
- ProxyHandler SCU_0_IRQHandler\r
- ProxyHandler ERU0_0_IRQHandler\r
- ProxyHandler ERU0_1_IRQHandler\r
- ProxyHandler ERU0_2_IRQHandler\r
- ProxyHandler ERU0_3_IRQHandler\r
- ProxyHandler ERU1_0_IRQHandler\r
- ProxyHandler ERU1_1_IRQHandler\r
- ProxyHandler ERU1_2_IRQHandler\r
- ProxyHandler ERU1_3_IRQHandler\r
- ProxyHandler PMU0_0_IRQHandler\r
- ProxyHandler VADC0_C0_0_IRQHandler\r
- ProxyHandler VADC0_C0_1_IRQHandler\r
- ProxyHandler VADC0_C0_2_IRQHandler\r
- ProxyHandler VADC0_C0_3_IRQHandler\r
- ProxyHandler VADC0_G0_0_IRQHandler\r
- ProxyHandler VADC0_G0_1_IRQHandler\r
- ProxyHandler VADC0_G0_2_IRQHandler\r
- ProxyHandler VADC0_G0_3_IRQHandler\r
- ProxyHandler VADC0_G1_0_IRQHandler\r
- ProxyHandler VADC0_G1_1_IRQHandler\r
- ProxyHandler VADC0_G1_2_IRQHandler\r
- ProxyHandler VADC0_G1_3_IRQHandler\r
- ProxyHandler VADC0_G2_0_IRQHandler\r
- ProxyHandler VADC0_G2_1_IRQHandler\r
- ProxyHandler VADC0_G2_2_IRQHandler\r
- ProxyHandler VADC0_G2_3_IRQHandler\r
- ProxyHandler VADC0_G3_0_IRQHandler\r
- ProxyHandler VADC0_G3_1_IRQHandler\r
- ProxyHandler VADC0_G3_2_IRQHandler\r
- ProxyHandler VADC0_G3_3_IRQHandler\r
- ProxyHandler DSD0_0_IRQHandler\r
- ProxyHandler DSD0_1_IRQHandler\r
- ProxyHandler DSD0_2_IRQHandler\r
- ProxyHandler DSD0_3_IRQHandler\r
- ProxyHandler DSD0_4_IRQHandler\r
- ProxyHandler DSD0_5_IRQHandler\r
- ProxyHandler DSD0_6_IRQHandler\r
- ProxyHandler DSD0_7_IRQHandler\r
- ProxyHandler DAC0_0_IRQHandler\r
- ProxyHandler DAC0_1_IRQHandler\r
- ProxyHandler CCU40_0_IRQHandler\r
- ProxyHandler CCU40_1_IRQHandler\r
- ProxyHandler CCU40_2_IRQHandler\r
- ProxyHandler CCU40_3_IRQHandler\r
- ProxyHandler CCU41_0_IRQHandler\r
- ProxyHandler CCU41_1_IRQHandler\r
- ProxyHandler CCU41_2_IRQHandler\r
- ProxyHandler CCU41_3_IRQHandler\r
- ProxyHandler CCU42_0_IRQHandler\r
- ProxyHandler CCU42_1_IRQHandler\r
- ProxyHandler CCU42_2_IRQHandler\r
- ProxyHandler CCU42_3_IRQHandler\r
- ProxyHandler CCU43_0_IRQHandler\r
- ProxyHandler CCU43_1_IRQHandler\r
- ProxyHandler CCU43_2_IRQHandler\r
- ProxyHandler CCU43_3_IRQHandler\r
- ProxyHandler CCU80_0_IRQHandler\r
- ProxyHandler CCU80_1_IRQHandler\r
- ProxyHandler CCU80_2_IRQHandler\r
- ProxyHandler CCU80_3_IRQHandler\r
- ProxyHandler CCU81_0_IRQHandler\r
- ProxyHandler CCU81_1_IRQHandler\r
- ProxyHandler CCU81_2_IRQHandler\r
- ProxyHandler CCU81_3_IRQHandler\r
- ProxyHandler POSIF0_0_IRQHandler\r
- ProxyHandler POSIF0_1_IRQHandler\r
- ProxyHandler POSIF1_0_IRQHandler\r
- ProxyHandler POSIF1_1_IRQHandler\r
- ProxyHandler HRPWM_0_IRQHandler\r
- ProxyHandler HRPWM_1_IRQHandler\r
- ProxyHandler HRPWM_2_IRQHandler\r
- ProxyHandler HRPWM_3_IRQHandler\r
- ProxyHandler CAN0_0_IRQHandler\r
- ProxyHandler CAN0_1_IRQHandler\r
- ProxyHandler CAN0_2_IRQHandler\r
- ProxyHandler CAN0_3_IRQHandler\r
- ProxyHandler CAN0_4_IRQHandler\r
- ProxyHandler CAN0_5_IRQHandler\r
- ProxyHandler CAN0_6_IRQHandler\r
- ProxyHandler CAN0_7_IRQHandler\r
- ProxyHandler USIC0_0_IRQHandler\r
- ProxyHandler USIC0_1_IRQHandler\r
- ProxyHandler USIC0_2_IRQHandler\r
- ProxyHandler USIC0_3_IRQHandler\r
- ProxyHandler USIC0_4_IRQHandler\r
- ProxyHandler USIC0_5_IRQHandler\r
- ProxyHandler USIC1_0_IRQHandler\r
- ProxyHandler USIC1_1_IRQHandler\r
- ProxyHandler USIC1_2_IRQHandler\r
- ProxyHandler USIC1_3_IRQHandler\r
- ProxyHandler USIC1_4_IRQHandler\r
- ProxyHandler USIC1_5_IRQHandler\r
- ProxyHandler LEDTS0_0_IRQHandler\r
- ProxyHandler FCE0_0_IRQHandler\r
- ProxyHandler GPDMA0_0_IRQHandler\r
- ProxyHandler USB0_0_IRQHandler\r
- ProxyHandler ETH0_0_IRQHandler\r
+ ProxyHandler SCU_0_IRQHandler \r
+ ProxyHandler ERU0_0_IRQHandler \r
+ ProxyHandler ERU0_1_IRQHandler \r
+ ProxyHandler ERU0_2_IRQHandler \r
+ ProxyHandler ERU0_3_IRQHandler \r
+ ProxyHandler ERU1_0_IRQHandler \r
+ ProxyHandler ERU1_1_IRQHandler \r
+ ProxyHandler ERU1_2_IRQHandler \r
+ ProxyHandler ERU1_3_IRQHandler \r
+ ProxyHandler PMU0_0_IRQHandler \r
+ ProxyHandler VADC0_C0_0_IRQHandler \r
+ ProxyHandler VADC0_C0_1_IRQHandler \r
+ ProxyHandler VADC0_C0_2_IRQHandler \r
+ ProxyHandler VADC0_C0_3_IRQHandler \r
+ ProxyHandler VADC0_G0_0_IRQHandler \r
+ ProxyHandler VADC0_G0_1_IRQHandler \r
+ ProxyHandler VADC0_G0_2_IRQHandler \r
+ ProxyHandler VADC0_G0_3_IRQHandler \r
+ ProxyHandler VADC0_G1_0_IRQHandler \r
+ ProxyHandler VADC0_G1_1_IRQHandler \r
+ ProxyHandler VADC0_G1_2_IRQHandler \r
+ ProxyHandler VADC0_G1_3_IRQHandler \r
+ ProxyHandler VADC0_G2_0_IRQHandler \r
+ ProxyHandler VADC0_G2_1_IRQHandler \r
+ ProxyHandler VADC0_G2_2_IRQHandler \r
+ ProxyHandler VADC0_G2_3_IRQHandler \r
+ ProxyHandler VADC0_G3_0_IRQHandler \r
+ ProxyHandler VADC0_G3_1_IRQHandler \r
+ ProxyHandler VADC0_G3_2_IRQHandler \r
+ ProxyHandler VADC0_G3_3_IRQHandler \r
+ ProxyHandler DSD0_0_IRQHandler \r
+ ProxyHandler DSD0_1_IRQHandler \r
+ ProxyHandler DSD0_2_IRQHandler \r
+ ProxyHandler DSD0_3_IRQHandler \r
+ ProxyHandler DSD0_4_IRQHandler \r
+ ProxyHandler DSD0_5_IRQHandler \r
+ ProxyHandler DSD0_6_IRQHandler \r
+ ProxyHandler DSD0_7_IRQHandler \r
+ ProxyHandler DAC0_0_IRQHandler \r
+ ProxyHandler DAC0_1_IRQHandler \r
+ ProxyHandler CCU40_0_IRQHandler \r
+ ProxyHandler CCU40_1_IRQHandler \r
+ ProxyHandler CCU40_2_IRQHandler \r
+ ProxyHandler CCU40_3_IRQHandler \r
+ ProxyHandler CCU41_0_IRQHandler \r
+ ProxyHandler CCU41_1_IRQHandler \r
+ ProxyHandler CCU41_2_IRQHandler \r
+ ProxyHandler CCU41_3_IRQHandler \r
+ ProxyHandler CCU42_0_IRQHandler \r
+ ProxyHandler CCU42_1_IRQHandler \r
+ ProxyHandler CCU42_2_IRQHandler \r
+ ProxyHandler CCU42_3_IRQHandler \r
+ ProxyHandler CCU43_0_IRQHandler \r
+ ProxyHandler CCU43_1_IRQHandler \r
+ ProxyHandler CCU43_2_IRQHandler \r
+ ProxyHandler CCU43_3_IRQHandler \r
+ ProxyHandler CCU80_0_IRQHandler \r
+ ProxyHandler CCU80_1_IRQHandler \r
+ ProxyHandler CCU80_2_IRQHandler \r
+ ProxyHandler CCU80_3_IRQHandler \r
+ ProxyHandler CCU81_0_IRQHandler \r
+ ProxyHandler CCU81_1_IRQHandler \r
+ ProxyHandler CCU81_2_IRQHandler \r
+ ProxyHandler CCU81_3_IRQHandler \r
+ ProxyHandler POSIF0_0_IRQHandler \r
+ ProxyHandler POSIF0_1_IRQHandler \r
+ ProxyHandler POSIF1_0_IRQHandler \r
+ ProxyHandler POSIF1_1_IRQHandler \r
+ ProxyHandler HRPWM_0_IRQHandler \r
+ ProxyHandler HRPWM_1_IRQHandler \r
+ ProxyHandler HRPWM_2_IRQHandler \r
+ ProxyHandler HRPWM_3_IRQHandler \r
+ ProxyHandler CAN0_0_IRQHandler \r
+ ProxyHandler CAN0_1_IRQHandler \r
+ ProxyHandler CAN0_2_IRQHandler \r
+ ProxyHandler CAN0_3_IRQHandler \r
+ ProxyHandler CAN0_4_IRQHandler \r
+ ProxyHandler CAN0_5_IRQHandler \r
+ ProxyHandler CAN0_6_IRQHandler \r
+ ProxyHandler CAN0_7_IRQHandler \r
+ ProxyHandler USIC0_0_IRQHandler \r
+ ProxyHandler USIC0_1_IRQHandler \r
+ ProxyHandler USIC0_2_IRQHandler \r
+ ProxyHandler USIC0_3_IRQHandler \r
+ ProxyHandler USIC0_4_IRQHandler \r
+ ProxyHandler USIC0_5_IRQHandler \r
+ ProxyHandler USIC1_0_IRQHandler \r
+ ProxyHandler USIC1_1_IRQHandler \r
+ ProxyHandler USIC1_2_IRQHandler \r
+ ProxyHandler USIC1_3_IRQHandler \r
+ ProxyHandler USIC1_4_IRQHandler \r
+ ProxyHandler USIC1_5_IRQHandler \r
+ ProxyHandler LEDTS0_0_IRQHandler \r
+ ProxyHandler FCE0_0_IRQHandler \r
+ ProxyHandler GPDMA0_0_IRQHandler \r
+ ProxyHandler USB0_0_IRQHandler \r
+ ProxyHandler ETH0_0_IRQHandler \r
\r
; Definition of the default weak SystemInit_DAVE3 function for DAVE3 system init.\r
PUBWEAK SystemInit_DAVE3\r
SECTION .text:CODE:REORDER:NOROOT(2)\r
SystemInit_DAVE3\r
- NOP\r
+ NOP \r
BX LR\r
-\r
+ \r
; Definition of the default weak DAVE3 function for clock App usage.\r
; AllowPLLInitByStartup Handler\r
PUBWEAK AllowPLLInitByStartup\r
SECTION .text:CODE:REORDER:NOROOT(2)\r
-AllowPLLInitByStartup\r
+AllowPLLInitByStartup \r
MOV R0,#1\r
- BX LR\r
+ BX LR \r
\r
PREF_PCON EQU 0x58004000\r
SCU_GCU_PEEN EQU 0x5000413C\r
SCU_GCU_PEFLAG EQU 0x50004150\r
\r
-\r
+ \r
END\r
/**\r
* @file Startup_XMC4500.s\r
* XMC4000 Device Series\r
-* @version V1.0\r
-* @date Jan 2013\r
+* @version V1.1\r
+* @date Augus 2013\r
*\r
* Copyright (C) 2012 IAR Systems. All rights reserved.\r
* Copyright (C) 2012 Infineon Technologies AG. All rights reserved.\r
*\r
*\r
* @par\r
-* Infineon Technologies AG (Infineon) is supplying this software for use with\r
+* Infineon Technologies AG (Infineon) is supplying this software for use with \r
* Infineon's microcontrollers. This file can be freely distributed\r
* within development tools that are supporting such microcontrollers.\r
*\r
/* ***************************************************************************\r
V1.0 January, 30 2013: In ths version a workoraound for the erratum PMU_CM.001\r
is implmented (patch for the Exception and interrupt handlers)\r
+V1.1 Augsut, 17 2013: Fix the bug of preprocessor due to workoraound for \r
+the erratum PMU_CM.001, and the bug of stack pointer alignment to a 8 byte boundary \r
\r
**************************************************************************** */\r
\r
SECTION .intvec:CODE:NOROOT(2)\r
\r
EXTERN __iar_program_start\r
- EXTERN SystemInit\r
+ EXTERN SystemInit \r
PUBLIC __vector_table\r
\r
DATA\r
;/* ===========START : MACRO DEFINITION MACRO DEFINITION ================== */\r
;/*\r
; * STEP_AB and below have the prefetch functional deviation (Errata id: PMU_CM.001).\r
-; * A veneer defined below will first be executed which in turn branches to the final\r
+; * A veneer defined below will first be executed which in turn branches to the final \r
; * exception handler.\r
; *\r
; * In addition to defining the veneers, the vector table must for these buggy\r
; */\r
\r
;set WORKAROUND_PMU_CM001 under Options for target\r
-;Initialize varaible WORKAROUND_PMU_CM001 as TRUE\r
-WORKAROUND_PMU_CM001 SET 1\r
+;define WORKAROUND_PMU_CM001 as TRUE\r
+#define WORKAROUND_PMU_CM001 1\r
\r
;/* A macro to setup a vector table entry based on STEP ID */\r
#ifdef WORKAROUND_PMU_CM001\r
#else\r
ExcpVector macro\r
DCD \1\r
- endm\r
+ endm \r
#endif\r
\r
;/* A macro to ease definition of the various handlers based on STEP ID */\r
SECTION .text:CODE:REORDER:NOROOT(1)\r
\1\r
B \1\r
- endm\r
-;/* And then define a veneer that will branch to the final excp handler */\r
-ProxyHandler_Veneer macro\r
- PUBWEAK \1\r
+;/* And then define a veneer that will branch to the final excp handler */ \r
+ PUBWEAK \1_Veneer\r
SECTION .text:CODE:REORDER:NOROOT(2)\r
-\1\r
- LDR R0, =ProxyHandler\r
- PUSH {LR}\r
+\1_Veneer:\r
+ LDR R0, =\1\r
+ PUSH {LR} /* Breaks AAPCS */\r
+ SUB SP,#4 /* Restores AAPCS */\r
BLX R0\r
+ ADD SP,#4\r
POP {PC}\r
endm\r
- ;/* No prefetch bug, hence define only the final exception handler */\r
+ ;/* No prefetch bug, hence define only the final exception handler */ \r
#else\r
ProxyHandler macro\r
PUBWEAK \1\r
DCD 0\r
DCD 0\r
DCD 0\r
- ExcpVector SVC_Handler ; SVCall Handler\r
+ ExcpVector SVC_Handler\r
ExcpVector DebugMon_Handler\r
DCD 0\r
- ExcpVector PendSV_Handler ; PendSV Handler\r
- ExcpVector SysTick_Handler ; SysTick Handler\r
+ ExcpVector PendSV_Handler\r
+ ExcpVector SysTick_Handler\r
\r
; Interrupt Handlers for Service Requests (SR) from XMC4500 Peripherals\r
ExcpVector SCU_0_IRQHandler ; Handler name for SR SCU_0\r
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;\r
;;\r
;; Default interrupt handlers.\r
-;;\r
+;; \r
THUMB\r
PUBWEAK Reset_Handler\r
SECTION .text:CODE:REORDER(2)\r
Reset_Handler\r
\r
LDR R0, =SystemInit\r
- BLX R0\r
+ BLX R0 \r
LDR R0, =SystemInit_DAVE3\r
- BLX R0\r
+ BLX R0 \r
LDR R0, =__iar_program_start\r
- BX R0\r
-\r
+ BX R0 \r
+ \r
\r
ProxyHandler NMI_Handler\r
ProxyHandler HardFault_Handler\r
ProxyHandler DebugMon_Handler\r
ProxyHandler PendSV_Handler\r
ProxyHandler SysTick_Handler\r
-\r
+ \r
ProxyHandler SCU_0_IRQHandler\r
ProxyHandler ERU0_0_IRQHandler\r
ProxyHandler ERU0_1_IRQHandler\r
ProxyHandler USB0_0_IRQHandler\r
ProxyHandler ETH0_0_IRQHandler\r
ProxyHandler GPDMA1_0_IRQHandler\r
-\r
-\r
+ \r
+ \r
; Definition of the default weak SystemInit_DAVE3 function for DAVE3 system init.\r
PUBWEAK SystemInit_DAVE3\r
SECTION .text:CODE:REORDER:NOROOT(2)\r
SystemInit_DAVE3\r
- NOP\r
+ NOP \r
BX LR\r
-\r
+ \r
; Definition of the default weak DAVE3 function for clock App usage.\r
; AllowPLLInitByStartup Handler\r
PUBWEAK AllowPLLInitByStartup\r
SECTION .text:CODE:REORDER:NOROOT(2)\r
-AllowPLLInitByStartup\r
+AllowPLLInitByStartup \r
MOV R0,#1\r
- BX LR\r
+ BX LR \r
\r
PREF_PCON EQU 0x58004000\r
SCU_GCU_PEEN EQU 0x5000413C\r
SCU_GCU_PEFLAG EQU 0x50004150\r
\r
-\r
+ \r
END\r