]> git.sur5r.net Git - openocd/commitdiff
Solve problem with single stepping.
authormlu <mlu@b42882b7-edfa-0310-969c-e2dbd0fdcd60>
Tue, 14 Apr 2009 16:33:52 +0000 (16:33 +0000)
committermlu <mlu@b42882b7-edfa-0310-969c-e2dbd0fdcd60>
Tue, 14 Apr 2009 16:33:52 +0000 (16:33 +0000)
git-svn-id: svn://svn.berlios.de/openocd/trunk@1455 b42882b7-edfa-0310-969c-e2dbd0fdcd60

src/target/arm_simulator.c

index 217633e898b05b7acf28afc72b4a2106f5b62bb1..b21ea4a8865cf5b15c210e5a4f03141dd481c2bb 100644 (file)
@@ -415,7 +415,12 @@ int arm_simulate_step(target_t *target, u32 *dry_run_pc)
                u8 carry_out;
                
                Rd = 0x0;
-               Rn = buf_get_u32(ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, instruction.info.data_proc.Rn).value, 0, 32);
+               /* ARM_MOV and ARM_MVN does not use Rn */
+               if ((instruction.type != ARM_MOV) && (instruction.type != ARM_MVN))
+                       Rn = buf_get_u32(ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, instruction.info.data_proc.Rn).value, 0, 32);
+               else
+                       Rn = 0;
+
                shifter_operand = arm_shifter_operand(armv4_5, instruction.info.data_proc.variant, instruction.info.data_proc.shifter_operand, &carry_out);
 
                /* adjust Rn in case the PC is being read */
@@ -446,6 +451,8 @@ int arm_simulate_step(target_t *target, u32 *dry_run_pc)
                        Rd = shifter_operand;
                else if (instruction.type == ARM_MVN)
                        Rd = ~shifter_operand;
+               else
+                       LOG_WARNING("unhandled instruction type");
                
                if (dry_run_pc)
                {