]> git.sur5r.net Git - openocd/commitdiff
add TI TMS570 support scripts
authorAndrey Yurovsky <yurovsky@gmail.com>
Thu, 31 Oct 2013 06:32:40 +0000 (23:32 -0700)
committerSpencer Oliver <spen@spen-soft.co.uk>
Wed, 6 Nov 2013 13:06:41 +0000 (13:06 +0000)
Add support for the TMS570 Cortex-R4 MCU from TI and their USB stick
development kit, TMDX570LS31USB.  Tested attaching, reset/halt/run, and
reading and writing memory and registers.

Change-Id: I12d779cef0c2b834f9bcf722307f35677cc4bd8f
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Reviewed-on: http://openocd.zylin.com/1788
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
tcl/board/ti_tmdx570ls31usb.cfg [new file with mode: 0644]
tcl/target/ti_tms570.cfg [new file with mode: 0644]

diff --git a/tcl/board/ti_tmdx570ls31usb.cfg b/tcl/board/ti_tmdx570ls31usb.cfg
new file mode 100644 (file)
index 0000000..5502444
--- /dev/null
@@ -0,0 +1,6 @@
+adapter_khz 1500
+
+source [find interface/ftdi/xds100v2.cfg]
+source [find target/ti_tms570.cfg]
+
+reset_config trst_only
diff --git a/tcl/target/ti_tms570.cfg b/tcl/target/ti_tms570.cfg
new file mode 100644 (file)
index 0000000..589e9d6
--- /dev/null
@@ -0,0 +1,53 @@
+adapter_khz 1500
+
+if { [info exists CHIPNAME] } {
+       set _CHIPNAME $CHIPNAME
+} else {
+       set _CHIPNAME tms570
+}
+
+if { [info exists ENDIAN] } {
+       set _ENDIAN $ENDIAN
+} else {
+       set _ENDIAN big
+}
+
+# TMS570 has an ICEpick-C on which we need the router commands.
+source [find target/icepick.cfg]
+
+# Main DAP
+if { [info exists DAP_TAPID] } {
+       set _DAP_TAPID $DAP_TAPID
+} else {
+       set _DAP_TAPID 0x0B8A002F
+}
+jtag newtap $_CHIPNAME dap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DAP_TAPID -disable
+jtag configure $_CHIPNAME.dap -event tap-enable "icepick_c_tapenable $_CHIPNAME.jrc 0"
+
+# ICEpick-C (JTAG route controller)
+if { [info exists JRC_TAPID] } {
+       set _JRC_TAPID $JRC_TAPID
+} else {
+       set _JRC_TAPID 0x0B8A002F
+}
+jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0x3f \
+       -expected-id $_JRC_TAPID -ignore-version
+jtag configure $_CHIPNAME.jrc -event setup "jtag tapenable $_CHIPNAME.dap"
+jtag configure $_CHIPNAME.jrc -event post-reset "runtest 100"
+
+# Cortex R4 target
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_r4 -endian $_ENDIAN \
+       -chain-position $_CHIPNAME.dap -coreid 0 -dbgbase 0x00001003
+
+$_TARGETNAME configure -event gdb-attach {
+       cortex_r4 dbginit
+       halt
+}
+
+$_TARGETNAME configure -event "reset-assert" {
+       global _CHIPNAME
+
+       # assert warm system reset through ICEPick
+       icepick_c_wreset $_CHIPNAME.jrc
+}