#ifndef ARM_H
#define ARM_H
-#include <target/target.h>
#include <helper/command.h>
+#include "target.h"
/**
#ifndef ARM11_H
#define ARM11_H
-#include <target/arm.h>
-#include <target/arm_dpm.h>
+#include "arm.h"
+#include "arm_dpm.h"
#define ARM11_TAP_DEFAULT TAP_INVALID
#ifndef ARM11_DBGTAP_H
#define ARM11_DBGTAP_H
-#include <target/arm11.h>
+#include "arm11.h"
/* ARM11 internals */
#ifndef ARM720T_H
#define ARM720T_H
-#include <target/arm7tdmi.h>
-#include <target/armv4_5_mmu.h>
+#include "arm7tdmi.h"
+#include "armv4_5_mmu.h"
#define ARM720T_COMMON_MAGIC 0xa720a720
#ifndef ARM7_9_COMMON_H
#define ARM7_9_COMMON_H
-#include <target/arm.h>
-#include <target/arm_jtag.h>
+#include "arm.h"
+#include "arm_jtag.h"
#define ARM7_9_COMMON_MAGIC 0x0a790a79 /**< */
#ifndef ARM7TDMI_H
#define ARM7TDMI_H
-#include <target/embeddedice.h>
+#include "embeddedice.h"
int arm7tdmi_init_arch_info(struct target *target,
struct arm7_9_common *arm7_9, struct jtag_tap *tap);
#ifndef ARM920T_H
#define ARM920T_H
-#include <target/arm9tdmi.h>
-#include <target/armv4_5_mmu.h>
+#include "arm9tdmi.h"
+#include "armv4_5_mmu.h"
#define ARM920T_COMMON_MAGIC 0xa920a920
#ifndef ARM926EJS_H
#define ARM926EJS_H
-#include <target/arm9tdmi.h>
-#include <target/armv4_5_mmu.h>
+#include "arm9tdmi.h"
+#include "armv4_5_mmu.h"
#define ARM926EJS_COMMON_MAGIC 0xa926a926
#ifndef ARM966E_H
#define ARM966E_H
-#include <target/arm9tdmi.h>
+#include "arm9tdmi.h"
#define ARM966E_COMMON_MAGIC 0x20f920f9
#ifndef ARM9TDMI_H
#define ARM9TDMI_H
-#include <target/embeddedice.h>
+#include "embeddedice.h"
int arm9tdmi_init_target(struct command_context *cmd_ctx,
struct target *target);
#ifndef ARM_ADI_V5_H
#define ARM_ADI_V5_H
-#include <target/arm_jtag.h>
+#include "arm_jtag.h"
#define DAP_IR_DPACC 0xA
#define DAP_IR_APACC 0xB
#ifndef ARMV4_5_MMU_H
#define ARMV4_5_MMU_H
-#include <target/armv4_5_cache.h>
+#include "armv4_5_cache.h"
struct target;
#ifndef ARMV7A_H
#define ARMV7A_H
-#include <target/arm_adi_v5.h>
-#include <target/arm.h>
-#include <target/armv4_5_mmu.h>
-#include <target/armv4_5_cache.h>
-#include <target/arm_dpm.h>
+#include "arm_adi_v5.h"
+#include "arm.h"
+#include "armv4_5_mmu.h"
+#include "armv4_5_cache.h"
+#include "arm_dpm.h"
enum
{
#ifndef ARMV7M_COMMON_H
#define ARMV7M_COMMON_H
-#include <target/arm_adi_v5.h>
-#include <target/arm.h>
+#include "arm_adi_v5.h"
+#include "arm.h"
/* define for enabling armv7 gdb workarounds */
#if 1
#ifndef CORTEX_A8_H
#define CORTEX_A8_H
-#include <target/armv7a.h>
+#include "armv7a.h"
#define CORTEX_A8_COMMON_MAGIC 0x411fc082
#ifndef CORTEX_M3_H
#define CORTEX_M3_H
-#include <target/armv7m.h>
+#include "armv7m.h"
#define CORTEX_M3_COMMON_MAGIC 0x1A451A45
#ifndef EMBEDDED_ICE_H
#define EMBEDDED_ICE_H
-#include <target/arm7_9_common.h>
+#include "arm7_9_common.h"
enum
{
#ifndef ETM_H
#define ETM_H
-#include <target/trace.h>
-#include <target/arm_jtag.h>
+#include "trace.h"
+#include "arm_jtag.h"
struct image;
#ifndef ETM_DUMMY_H
#define ETM_DUMMY_H
-#include <target/etm.h>
+#include "etm.h"
extern struct etm_capture_driver etm_dummy_capture_driver;
#ifndef MIPS32_H
#define MIPS32_H
-#include <target/target.h>
-#include <target/mips32_pracc.h>
+#include "target.h"
+#include "mips32_pracc.h"
#define MIPS32_COMMON_MAGIC 0xB320B320
#ifndef MIPS32_DMAACC_H
#define MIPS32_DMAACC_H
-#include <target/mips_ejtag.h>
+#include "mips_ejtag.h"
#define EJTAG_CTRL_DMA_BYTE 0x00000000
#define EJTAG_CTRL_DMA_HALFWORD 0x00000080
#ifndef MIPS32_PRACC_H
#define MIPS32_PRACC_H
-#include <target/mips_ejtag.h>
+#include "mips_ejtag.h"
#define MIPS32_PRACC_TEXT 0xFF200200
//#define MIPS32_PRACC_STACK 0xFF2FFFFC
#endif
#include "arm.h"
+#include "etm.h"
#include "oocd_trace.h"
/*
#ifndef OOCD_TRACE_H
#define OOCD_TRACE_H
-#include <target/etm.h>
-
#include <termios.h>
/* registers */
#ifndef XSCALE_H
#define XSCALE_H
-#include <target/arm.h>
-#include <target/armv4_5_mmu.h>
-#include <target/trace.h>
+#include "arm.h"
+#include "armv4_5_mmu.h"
+#include "trace.h"
#define XSCALE_COMMON_MAGIC 0x58534341