Update to V4.5.0 files and directory structure.

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@109 1d2547de-c912-0410-9cb9-b8ca96c0e9e2

diff --git a/Demo/ARM7_AT91FR40008_GCC/FreeRTOSConfig.h b/Demo/ARM7_AT91FR40008_GCC/FreeRTOSConfig.h
index 841dcc810ff9207a4174d717bd96841b2fcae699..07a2c85122e0034d5fe1733a98245bd1a16fc0b6 100644 (file)
--- a/Demo/ARM7_AT91FR40008_GCC/FreeRTOSConfig.h
+++ b/Demo/ARM7_AT91FR40008_GCC/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/ARM7_AT91FR40008_GCC/Makefile b/Demo/ARM7_AT91FR40008_GCC/Makefile
index 6aa05faf2addabc6bf7f97e51ce2385e4800c17b..b4aee7bb713366172e43928f0badfead98c4896d 100644 (file)
--- a/Demo/ARM7_AT91FR40008_GCC/Makefile
+++ b/Demo/ARM7_AT91FR40008_GCC/Makefile
@@ -1,4 +1,4 @@
-#      FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+#      FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 #\r
 #      This file is part of the FreeRTOS.org distribution.\r
 #\r

diff --git a/Demo/ARM7_AT91FR40008_GCC/ParTest/ParTest.c b/Demo/ARM7_AT91FR40008_GCC/ParTest/ParTest.c
index db3eca95fe54a0fa7a3f25f5451309f654f6b3e1..3ddd9ffd709e81083df76827e9526bfe47d1d019 100644 (file)
--- a/Demo/ARM7_AT91FR40008_GCC/ParTest/ParTest.c
+++ b/Demo/ARM7_AT91FR40008_GCC/ParTest/ParTest.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/ARM7_AT91FR40008_GCC/main.c b/Demo/ARM7_AT91FR40008_GCC/main.c
index 784409c345e66d0e75a1ff23fea710537f7f8f9c..edbdf37174aa83f84362d3c624525ab15f2bcbf7 100644 (file)
--- a/Demo/ARM7_AT91FR40008_GCC/main.c
+++ b/Demo/ARM7_AT91FR40008_GCC/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/ARM7_AT91FR40008_GCC/serial/serial.c b/Demo/ARM7_AT91FR40008_GCC/serial/serial.c
index 24a0e5eb07b5647fdb9d31c8e40e4660712d2f3a..49ab7fabffae5f6d4b4fe4641788aa3ec4cc66d7 100644 (file)
--- a/Demo/ARM7_AT91FR40008_GCC/serial/serial.c
+++ b/Demo/ARM7_AT91FR40008_GCC/serial/serial.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/ARM7_AT91FR40008_GCC/serial/serialISR.c b/Demo/ARM7_AT91FR40008_GCC/serial/serialISR.c
index af9ac8bbde44ef2df287c449037e5f3dcea007fb..4fdcab46c6a13829aeebfcc2912e31e48d3f1403 100644 (file)
--- a/Demo/ARM7_AT91FR40008_GCC/serial/serialISR.c
+++ b/Demo/ARM7_AT91FR40008_GCC/serial/serialISR.c
@@ -1,5 +1,5 @@
 /*\r
-  FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+  FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
   This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/ARM7_AT91SAM7S64_IAR/FreeRTOSConfig.h b/Demo/ARM7_AT91SAM7S64_IAR/FreeRTOSConfig.h
index 88882d0e1e6228ae29bbeb64350cb181433aa561..76272a046e0a2171b9b41a9ee572a9888287a404 100644 (file)
--- a/Demo/ARM7_AT91SAM7S64_IAR/FreeRTOSConfig.h
+++ b/Demo/ARM7_AT91SAM7S64_IAR/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/ARM7_AT91SAM7S64_IAR/ParTest/ParTest.c b/Demo/ARM7_AT91SAM7S64_IAR/ParTest/ParTest.c
index 39ef8ddec953df84edd087903f88c3eda0928c1e..6c5ef809e9f60c45ec7df7939a5ac648ac2105cb 100644 (file)
--- a/Demo/ARM7_AT91SAM7S64_IAR/ParTest/ParTest.c
+++ b/Demo/ARM7_AT91SAM7S64_IAR/ParTest/ParTest.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/ARM7_AT91SAM7S64_IAR/USB/USBSample.c b/Demo/ARM7_AT91SAM7S64_IAR/USB/USBSample.c
index 197e13d77084100ded2e46e742160b41ad326d53..90d7a1bbd6766c5e4f5b19b447a0f01015f34ecf 100644 (file)
--- a/Demo/ARM7_AT91SAM7S64_IAR/USB/USBSample.c
+++ b/Demo/ARM7_AT91SAM7S64_IAR/USB/USBSample.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/ARM7_AT91SAM7S64_IAR/main.c b/Demo/ARM7_AT91SAM7S64_IAR/main.c
index aabe3b0479d3b525bb28b37a30b0757bc93415cc..a7f4a850bd5b45332cb419540b2ad6ff8bdec224 100644 (file)
--- a/Demo/ARM7_AT91SAM7S64_IAR/main.c
+++ b/Demo/ARM7_AT91SAM7S64_IAR/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/ARM7_AT91SAM7S64_IAR/serial/serial.c b/Demo/ARM7_AT91SAM7S64_IAR/serial/serial.c
index c6ca00f522874ebbf83700665603045c819a1f65..19c7b2235c2201727178bfdabcd53fa53bd3da34 100644 (file)
--- a/Demo/ARM7_AT91SAM7S64_IAR/serial/serial.c
+++ b/Demo/ARM7_AT91SAM7S64_IAR/serial/serial.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/ARM7_LPC2106_GCC/FreeRTOSConfig.h b/Demo/ARM7_LPC2106_GCC/FreeRTOSConfig.h
index d5ee9d8529892bdf366249a08fd8a82b0f7b9a45..ffb291e88fd0c63f713c96a6a8f0f9a1c21af327 100644 (file)
--- a/Demo/ARM7_LPC2106_GCC/FreeRTOSConfig.h
+++ b/Demo/ARM7_LPC2106_GCC/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/ARM7_LPC2106_GCC/Makefile b/Demo/ARM7_LPC2106_GCC/Makefile
index 978dcd8c193bd69a58720b4e786628b05dd7202d..8880bf61dad1ac39a1414da8e95184b0cfe89e56 100644 (file)
--- a/Demo/ARM7_LPC2106_GCC/Makefile
+++ b/Demo/ARM7_LPC2106_GCC/Makefile
@@ -1,4 +1,4 @@
-#      FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+#      FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 #\r
 #      This file is part of the FreeRTOS.org distribution.\r
 #\r

diff --git a/Demo/ARM7_LPC2106_GCC/ParTest/ParTest.c b/Demo/ARM7_LPC2106_GCC/ParTest/ParTest.c
index 28d35c9b9ac666716f64de2d66095eaa9866df96..0946ab4744f9fdb2fb752b8a1418c7d3001eedf8 100644 (file)
--- a/Demo/ARM7_LPC2106_GCC/ParTest/ParTest.c
+++ b/Demo/ARM7_LPC2106_GCC/ParTest/ParTest.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/ARM7_LPC2106_GCC/main.c b/Demo/ARM7_LPC2106_GCC/main.c
index 6d4bd558ce2b7dbe2d863bce78ce6e98d277cde3..f5bc1dd3c4d045bef7188b72442cac43b95fb092 100644 (file)
--- a/Demo/ARM7_LPC2106_GCC/main.c
+++ b/Demo/ARM7_LPC2106_GCC/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/ARM7_LPC2106_GCC/serial/serial.c b/Demo/ARM7_LPC2106_GCC/serial/serial.c
index 5e522a110c6962303f83690adda90135fe8516a9..bbb5b207adc158f4decd180a761360caad8515ca 100644 (file)
--- a/Demo/ARM7_LPC2106_GCC/serial/serial.c
+++ b/Demo/ARM7_LPC2106_GCC/serial/serial.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/ARM7_LPC2106_GCC/serial/serialISR.c b/Demo/ARM7_LPC2106_GCC/serial/serialISR.c
index 509a2134952514e99804578ab630921d3aaa8687..57a18e5c150275254b0d63864ba21c6eb1c3747d 100644 (file)
--- a/Demo/ARM7_LPC2106_GCC/serial/serialISR.c
+++ b/Demo/ARM7_LPC2106_GCC/serial/serialISR.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/ARM7_LPC2129_IAR/FreeRTOSConfig.h b/Demo/ARM7_LPC2129_IAR/FreeRTOSConfig.h
index 1606ce8b761a3c5739a900610c21b25ffafde367..186f2ee2f859133a56ddd95e57cd15ce8fd6fdb0 100644 (file)
--- a/Demo/ARM7_LPC2129_IAR/FreeRTOSConfig.h
+++ b/Demo/ARM7_LPC2129_IAR/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/ARM7_LPC2129_IAR/ParTest/ParTest.c b/Demo/ARM7_LPC2129_IAR/ParTest/ParTest.c
index 7456dedccde64152f1ba751fd57df3b19018519c..5d74aee05980b39efd998fa335bbc0b257e57948 100644 (file)
--- a/Demo/ARM7_LPC2129_IAR/ParTest/ParTest.c
+++ b/Demo/ARM7_LPC2129_IAR/ParTest/ParTest.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/ARM7_LPC2129_IAR/main.c b/Demo/ARM7_LPC2129_IAR/main.c
index 8bee2260b4bd5dcbe3e0978f8e9c4a9108822955..e8bacb736a677d35180c0e4280f9d6c40bc9fd7c 100644 (file)
--- a/Demo/ARM7_LPC2129_IAR/main.c
+++ b/Demo/ARM7_LPC2129_IAR/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/ARM7_LPC2129_IAR/serial/serial.c b/Demo/ARM7_LPC2129_IAR/serial/serial.c
index 199de46c4b026ffba2b042c4ec3afc961b74e217..c4b96011be3b2f2d2cb74f597b7f9f724440e021 100644 (file)
--- a/Demo/ARM7_LPC2129_IAR/serial/serial.c
+++ b/Demo/ARM7_LPC2129_IAR/serial/serial.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/ARM7_LPC2129_Keil/FreeRTOSConfig.h b/Demo/ARM7_LPC2129_Keil/FreeRTOSConfig.h
index 85c58f955e785d15a7453349d5ad1b2afc398524..53f00b9c11695ce6e860ee9b41399fb29af0ae01 100644 (file)
--- a/Demo/ARM7_LPC2129_Keil/FreeRTOSConfig.h
+++ b/Demo/ARM7_LPC2129_Keil/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/ARM7_LPC2129_Keil/ParTest/ParTest.c b/Demo/ARM7_LPC2129_Keil/ParTest/ParTest.c
index c41b98b90533f54e87353470ca7aba5f7c33b3e7..7e3b5c5b86763bedaa7accf961aaded71cb88a98 100644 (file)
--- a/Demo/ARM7_LPC2129_Keil/ParTest/ParTest.c
+++ b/Demo/ARM7_LPC2129_Keil/ParTest/ParTest.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/ARM7_LPC2129_Keil/main.c b/Demo/ARM7_LPC2129_Keil/main.c
index 954ee89376289dd2f3d9020aae72e71efe1b0855..eea635aaeba3112426e520a1217e943a952b549a 100644 (file)
--- a/Demo/ARM7_LPC2129_Keil/main.c
+++ b/Demo/ARM7_LPC2129_Keil/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/ARM7_LPC2129_Keil/serial/serial.c b/Demo/ARM7_LPC2129_Keil/serial/serial.c
index 85d7f723e3faa0f5010f34ea3cd817057890611d..3e5cdacbccf40ab1929a71c33000d10ca26e1b69 100644 (file)
--- a/Demo/ARM7_LPC2129_Keil/serial/serial.c
+++ b/Demo/ARM7_LPC2129_Keil/serial/serial.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/ARM7_LPC2129_Keil/serial/serialISR.c b/Demo/ARM7_LPC2129_Keil/serial/serialISR.c
index 75824c4d1418f901b5cad9efd3b4bc0084769e66..9480397eed45fc50f684f7df77e775140a57ef99 100644 (file)
--- a/Demo/ARM7_LPC2129_Keil/serial/serialISR.c
+++ b/Demo/ARM7_LPC2129_Keil/serial/serialISR.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/ARM7_LPC2138_Rowley/FreeRTOSConfig.h b/Demo/ARM7_LPC2138_Rowley/FreeRTOSConfig.h
index 5fa9e191ff59bcf0e40dd80c423cecff9009103f..654b8e612fb8281f065ee504520251031ad62848 100644 (file)
--- a/Demo/ARM7_LPC2138_Rowley/FreeRTOSConfig.h
+++ b/Demo/ARM7_LPC2138_Rowley/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r
@@ -71,6 +71,7 @@ the CPU frequency. */
 #define configUSE_TRACE_FACILITY       1\r
 #define configUSE_16_BIT_TICKS         0\r
 #define configIDLE_SHOULD_YIELD                1\r
+#define configUSE_MUTEXES                      0\r
 \r
 /* Co-routine definitions. */\r
 #define configUSE_CO_ROUTINES          0\r

diff --git a/Demo/ARM7_LPC2138_Rowley/main.c b/Demo/ARM7_LPC2138_Rowley/main.c
index 49b5f0af256e3416fd032b4e9988a9fb62989248..1e6e33944aaddb6b746f5e5faa208a4d93c4e34a 100644 (file)
--- a/Demo/ARM7_LPC2138_Rowley/main.c
+++ b/Demo/ARM7_LPC2138_Rowley/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/ARM7_LPC2138_Rowley/mainISR.c b/Demo/ARM7_LPC2138_Rowley/mainISR.c
index 1843a029946313eff46d40ae3fa606d502dbd7b9..ae93705624bc8e7bbc62aa46e6e7262010c77144 100644 (file)
--- a/Demo/ARM7_LPC2138_Rowley/mainISR.c
+++ b/Demo/ARM7_LPC2138_Rowley/mainISR.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.lock b/Demo/ARM7_LPC2368_Eclipse/.metadata/.lock
new file mode 100644 (file)
index 0000000..e69de29

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.cdt.core/shareddefaults.xml b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.cdt.core/shareddefaults.xml
new file mode 100644 (file)
index 0000000..c4b91cf
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.cdt.core/shareddefaults.xml
@@ -0,0 +1 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?><SharedRoot><SharedProperty id="" value=""/></SharedRoot>
\ No newline at end of file

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.cdt.make.core/RTOSDemo.sc b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.cdt.make.core/RTOSDemo.sc
new file mode 100644 (file)
index 0000000..6643763
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.cdt.make.core/RTOSDemo.sc
@@ -0,0 +1,155 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>\r
+<?scdStore version="2"?>\r
+\r
+<scannerInfo id="org.eclipse.cdt.make.core.discoveredScannerInfo">\r
+<instance id="0.1109417601">\r
+<collector id="org.eclipse.cdt.make.core.PerProjectSICollector">\r
+<includePath path="c:/devtools/codesourcery/sourcery g++ lite/bin/../lib/gcc/arm-none-eabi/4.2.0/include"/>\r
+<includePath path="c:/devtools/codesourcery/sourcery g++ lite/bin/../lib/gcc/arm-none-eabi/4.2.0/include-fixed"/>\r
+<includePath path="c:/devtools/codesourcery/sourcery g++ lite/bin/../lib/gcc/arm-none-eabi/4.2.0/../../../../arm-none-eabi/include"/>\r
+<includePath path="c:/devtools/codesourcery/sourcery g++ lite/lib/gcc/../../lib/gcc/arm-none-eabi/4.2.0/include"/>\r
+<includePath path="c:/devtools/codesourcery/sourcery g++ lite/lib/gcc/../../lib/gcc/arm-none-eabi/4.2.0/include-fixed"/>\r
+<includePath path="c:/devtools/codesourcery/sourcery g++ lite/lib/gcc/../../lib/gcc/arm-none-eabi/4.2.0/../../../../arm-none-eabi/include"/>\r
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+<definedSymbol symbol="inline="/>\r
+<definedSymbol symbol="PACK_STRUCT_END=__attribute\(\(packed\)\)"/>\r
+<definedSymbol symbol="ALIGN_STRUCT_END=__attribute\(\(aligned\(4\)\)\)"/>\r
+<definedSymbol symbol="sprintf=usprintf"/>\r
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+<definedSymbol symbol="snprintf=usnprintf"/>\r
+<definedSymbol symbol="printf=uipprintf"/>\r
+<definedSymbol removed="true" symbol="printf=xprintf"/>\r
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+<definedSymbol symbol="__OPTIMIZE_SIZE__=1"/>\r
+</collector>\r
+</instance>\r
+</scannerInfo>\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.cdt.make.core/specs.c b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.cdt.make.core/specs.c
new file mode 100644 (file)
index 0000000..8b13789
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.cdt.make.core/specs.c
@@ -0,0 +1 @@
+

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.cdt.make.core/specs.cpp b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.cdt.make.core/specs.cpp
new file mode 100644 (file)
index 0000000..8b13789
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.cdt.make.core/specs.cpp
@@ -0,0 +1 @@
+

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.cdt.make.ui/dialog_settings.xml b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.cdt.make.ui/dialog_settings.xml
new file mode 100644 (file)
index 0000000..9e62c4b
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.cdt.make.ui/dialog_settings.xml
@@ -0,0 +1,5 @@
+<?xml version="1.0" encoding="UTF-8"?>\r
+<section name="Workbench">\r
+       <section name="org.eclipse.cdt.internal.ui.MakeView">\r
+       </section>\r
+</section>\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.cdt.ui/cHelpSettings.xml b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.cdt.ui/cHelpSettings.xml
new file mode 100644 (file)
index 0000000..5240b18
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.cdt.ui/cHelpSettings.xml
@@ -0,0 +1,4 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>\r
+<cHelpSettings>\r
+<project name="RTOSDemo"/>\r
+</cHelpSettings>\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.cdt.ui/dialog_settings.xml b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.cdt.ui/dialog_settings.xml
new file mode 100644 (file)
index 0000000..ab95b05
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.cdt.ui/dialog_settings.xml
@@ -0,0 +1,12 @@
+<?xml version="1.0" encoding="UTF-8"?>\r
+<section name="Workbench">\r
+       <item value="1" key="org.eclipse.cdt.uiformatter_page.line_wrapping_tab_page.last_category_index"/>\r
+       <item value="549" key="org.eclipse.cdt.uiformatter_pagemodify_dialog.preferred_height"/>\r
+       <item value="138" key="org.eclipse.cdt.uiformatter_pagemodify_dialog.preferred_x"/>\r
+       <item value="0" key="org.eclipse.cdt.uiformatter_pagemodify_dialog.preferred_y"/>\r
+       <item value="645" key="org.eclipse.cdt.uiformatter_pagemodify_dialog.preferred_width"/>\r
+       <section name="completion_proposal_size">\r
+       </section>\r
+       <section name="PDOMSearchPage">\r
+       </section>\r
+</section>\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/33/5b/e7/4/history.index b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/33/5b/e7/4/history.index
new file mode 100644 (file)
index 0000000..b5f9597
Binary files /dev/null and b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/33/5b/e7/4/history.index differ

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/69/history.index b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/69/history.index
new file mode 100644 (file)
index 0000000..7cc2335
Binary files /dev/null and b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/69/history.index differ

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/ad/history.index b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/ad/history.index
new file mode 100644 (file)
index 0000000..5ae7777
Binary files /dev/null and b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/ad/history.index differ

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/history.index b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/history.index
new file mode 100644 (file)
index 0000000..7a847c7
Binary files /dev/null and b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/history.index differ

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/properties.index b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/properties.index
new file mode 100644 (file)
index 0000000..401e243
Binary files /dev/null and b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/properties.index differ

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.markers b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.markers
new file mode 100644 (file)
index 0000000..7a57056
Binary files /dev/null and b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.markers differ

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.root/.indexes/history.version b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.root/.indexes/history.version
new file mode 100644 (file)
index 0000000..25cb955
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.root/.indexes/history.version
@@ -0,0 +1 @@
+\ 2
\ No newline at end of file

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.root/.indexes/properties.index b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.root/.indexes/properties.index
new file mode 100644 (file)
index 0000000..567d91c
Binary files /dev/null and b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.root/.indexes/properties.index differ

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.root/.indexes/properties.version b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.root/.indexes/properties.version
new file mode 100644 (file)
index 0000000..6b2aaa7
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.root/.indexes/properties.version
@@ -0,0 +1 @@
+\ 1
\ No newline at end of file

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.root/.markers b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.root/.markers
new file mode 100644 (file)
index 0000000..bccaaab
Binary files /dev/null and b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.root/.markers differ

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.root/31.tree b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.root/31.tree
new file mode 100644 (file)
index 0000000..fe99eb1
Binary files /dev/null and b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.root/31.tree differ

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.safetable/org.eclipse.core.resources b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.safetable/org.eclipse.core.resources
new file mode 100644 (file)
index 0000000..7a06fe0
Binary files /dev/null and b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.safetable/org.eclipse.core.resources differ

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.core.prj-RTOSDemo.prefs b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.core.prj-RTOSDemo.prefs
new file mode 100644 (file)
index 0000000..bb305ff
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.core.prj-RTOSDemo.prefs
@@ -0,0 +1,3 @@
+#Sun Aug 19 15:20:24 BST 2007\r
+eclipse.preferences.version=1\r
+indexer/preferenceScope=0\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.debug.core.prefs b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.debug.core.prefs
new file mode 100644 (file)
index 0000000..1c0fdf1
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.debug.core.prefs
@@ -0,0 +1,3 @@
+#Sun Aug 19 15:19:23 BST 2007\r
+org.eclipse.cdt.debug.core.cDebug.common_source_containers=<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?>\r\n<sourceLookupDirector>\r\n<sourceContainers duplicates\="false"/>\r\n</sourceLookupDirector>\r\n\r
+eclipse.preferences.version=1\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.debug.ui.prefs b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.debug.ui.prefs
new file mode 100644 (file)
index 0000000..962a2b7
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.debug.ui.prefs
@@ -0,0 +1,5 @@
+#Sun Aug 19 23:06:50 BST 2007\r
+pref_state_memento.org.eclipse.cdt.debug.ui.ModulesView=<?xml version\="1.0" encoding\="UTF-8"?>\r\n<ModulesViewMemento org.eclipse.cdt.debug.ui.SASH_DETAILS_PART\="568" org.eclipse.cdt.debug.ui.SASH_VIEW_PART\="427"/>\r
+eclipse.preferences.version=1\r
+org.eclipse.debug.ui.DebugView.org.eclipse.cdt.debug.ui.cDebug.show_full_paths=true\r
+org.eclipse.debug.ui.BreakpointView.org.eclipse.cdt.debug.ui.cDebug.show_full_paths=true\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.managedbuilder.core.prefs b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.managedbuilder.core.prefs
new file mode 100644 (file)
index 0000000..aa0ab5b
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.managedbuilder.core.prefs
@@ -0,0 +1,3 @@
+#Sun Sep 02 21:22:35 BST 2007\r
+eclipse.preferences.version=1\r
+properties/RTOSDemo.null.976634949/0.1109417601=\#\r\n\#Sun Sep 02 21\:22\:35 BST 2007\r\n0.1109417601\=\\\#\\r\\n\\\#Sun Sep 02 21\\\:22\\\:35 BST 2007\\r\\nrcState\\\=0\\r\\nrebuildState\\\=false\\r\\n\r\norg.eclipse.cdt.build.core.settings.holder.1502006385\=\\\#\\r\\n\\\#Sun Sep 02 21\\\:22\\\:35 BST 2007\\r\\nrebuildState\\\=false\\r\\n\r\norg.eclipse.cdt.build.core.settings.holder.1021181093\=\\\#\\r\\n\\\#Sun Sep 02 21\\\:22\\\:35 BST 2007\\r\\nrebuildState\\\=false\\r\\n\r\norg.eclipse.cdt.build.core.settings.holder.164584712\=\\\#\\r\\n\\\#Sun Sep 02 21\\\:22\\\:35 BST 2007\\r\\nrebuildState\\\=false\\r\\n\r\norg.eclipse.cdt.build.core.settings.holder.libs.260784574\=\\\#\\r\\n\\\#Sun Sep 02 21\\\:22\\\:35 BST 2007\\r\\nrebuildState\\\=false\\r\\n\r\norg.eclipse.cdt.build.core.prefbase.toolchain.1816209921\=\\\#\\r\\n\\\#Sun Sep 02 21\\\:22\\\:35 BST 2007\\r\\nrebuildState\\\=false\\r\\n\r\n\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.ui.prefs b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.ui.prefs
new file mode 100644 (file)
index 0000000..8a970da
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.ui.prefs
@@ -0,0 +1,12 @@
+#Thu Aug 23 20:22:58 BST 2007\r
+useQuickDiffPrefPage=true\r
+closeBrackets=false\r
+ensureNewlineAtEOF=true\r
+useAnnotationsPrefPage=true\r
+closeAngularBrackets=false\r
+eclipse.preferences.version=1\r
+org.eclipse.cdt.ui.text.templates.custom=<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?><templates/>\r
+hoverModifierMasks=org.eclipse.cdt.ui.BestMatchHover;0;org.eclipse.cdt.ui.CSourceHover;131072;org.eclipse.cdt.debug.internal.ui.editors.DebugTextHover;0;org.eclipse.cdt.ui.CDocHover;0;org.eclipse.cdt.ui.AnnotationHover;0;\r
+hoverModifiers=org.eclipse.cdt.ui.BestMatchHover;0;org.eclipse.cdt.ui.CSourceHover;Shift;org.eclipse.cdt.debug.internal.ui.editors.DebugTextHover;\!0;org.eclipse.cdt.ui.CDocHover;\!0;org.eclipse.cdt.ui.AnnotationHover;\!0;\r
+closeBraces=false\r
+closeStrings=false\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.core.resources.prefs b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.core.resources.prefs
new file mode 100644 (file)
index 0000000..242e941
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.core.resources.prefs
@@ -0,0 +1,5 @@
+#Fri Aug 31 14:25:00 BST 2007\r
+version=1\r
+eclipse.preferences.version=1\r
+pathvariable.FreeRTOS_ROOT=C\:/E/Dev/FreeRTOS\r
+description.autobuilding=false\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.debug.core.prefs b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.debug.core.prefs
new file mode 100644 (file)
index 0000000..205a072
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.debug.core.prefs
@@ -0,0 +1,3 @@
+#Sun Sep 02 17:49:35 BST 2007\r
+prefWatchExpressions=<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?>\r\n<watchExpressions>\r\n<expression enabled\="true" text\="uxCurrentNumberOfTasks"/>\r\n</watchExpressions>\r\n\r
+eclipse.preferences.version=1\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.debug.ui.prefs b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.debug.ui.prefs
new file mode 100644 (file)
index 0000000..53bcfe8
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.debug.ui.prefs
@@ -0,0 +1,12 @@
+#Sun Sep 02 17:49:35 BST 2007\r
+org.eclipse.debug.ui.PREF_FILTER_WORKING_SETS=false\r
+org.eclipse.debug.ui.PREF_LAUNCH_PERSPECTIVES=<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?>\r\n<launchPerspectives/>\r\n\r
+org.eclipse.debug.ui.BreakpointView+org.eclipse.debug.ui.ShowSupportedBreakpointsAction=true\r
+pref_state_memento.org.eclipse.debug.ui.VariableView=<?xml version\="1.0" encoding\="UTF-8"?>\r\n<VariablesViewMemento org.eclipse.debug.ui.SASH_DETAILS_PART\="315" org.eclipse.debug.ui.SASH_VIEW_PART\="684"/>\r
+pref_state_memento.org.eclipse.debug.ui.RegisterView=<?xml version\="1.0" encoding\="UTF-8"?>\r\n<VariablesViewMemento org.eclipse.debug.ui.SASH_DETAILS_PART\="198" org.eclipse.debug.ui.SASH_VIEW_PART\="801"/>\r
+pref_state_memento.org.eclipse.debug.ui.ExpressionView=<?xml version\="1.0" encoding\="UTF-8"?>\r\n<VariablesViewMemento org.eclipse.debug.ui.SASH_DETAILS_PART\="315" org.eclipse.debug.ui.SASH_VIEW_PART\="684"/>\r
+org.eclipse.debug.ui.PREF_FILTER_LAUNCH_CLOSED=false\r
+preferredDetailPanes=DefaultDetailPane\:DefaultDetailPane|\r
+org.eclipse.debug.ui.PREF_FILTER_LAUNCH_DELETED=false\r
+eclipse.preferences.version=1\r
+org.eclipse.debug.ui.user_view_bindings=<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?>\r\n<viewBindings>\r\n<view id\="org.eclipse.debug.ui.ExpressionView">\r\n<perspective id\="org.eclipse.debug.ui.DebugPerspective" userAction\="opened"/>\r\n</view>\r\n</viewBindings>\r\n\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.help.ui.prefs b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.help.ui.prefs
new file mode 100644 (file)
index 0000000..8d1b311
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.help.ui.prefs
@@ -0,0 +1,7 @@
+#Sun Aug 26 17:32:13 BST 2007\r
+browser.x=177\r
+browser.w=1024\r
+eclipse.preferences.version=1\r
+browser.h=768\r
+browser.maximized=false\r
+browser.y=128\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.search.prefs b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.search.prefs
new file mode 100644 (file)
index 0000000..2426c2b
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.search.prefs
@@ -0,0 +1,3 @@
+#Sun Aug 19 19:39:29 BST 2007\r
+org.eclipse.search.defaultPerspective=org.eclipse.search.defaultPerspective.none\r
+eclipse.preferences.version=1\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.team.ui.prefs b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.team.ui.prefs
new file mode 100644 (file)
index 0000000..06f8f10
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.team.ui.prefs
@@ -0,0 +1,3 @@
+#Fri Aug 31 18:19:04 BST 2007\r
+eclipse.preferences.version=1\r
+org.eclipse.team.ui.first_time=false\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.editors.prefs b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.editors.prefs
new file mode 100644 (file)
index 0000000..1affd26
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.editors.prefs
@@ -0,0 +1,3 @@
+#Sun Aug 19 20:45:57 BST 2007\r
+eclipse.preferences.version=1\r
+overviewRuler_migration=migrated_3.1\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.ide.prefs b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.ide.prefs
new file mode 100644 (file)
index 0000000..b6611b7
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.ide.prefs
@@ -0,0 +1,4 @@
+#Fri Aug 31 14:27:00 BST 2007\r
+eclipse.preferences.version=1\r
+tipsAndTricks=true\r
+platformState=1187207632230\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.prefs b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.prefs
new file mode 100644 (file)
index 0000000..3e5b2b1
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.prefs
@@ -0,0 +1,3 @@
+#Sun Aug 19 20:45:58 BST 2007\r
+eclipse.preferences.version=1\r
+showIntro=false\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.workbench.prefs b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.workbench.prefs
new file mode 100644 (file)
index 0000000..06cd1e9
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.workbench.prefs
@@ -0,0 +1,3 @@
+#Mon Aug 20 21:59:49 BST 2007\r
+eclipse.preferences.version=1\r
+org.eclipse.ui.commands=<?xml version\="1.0" encoding\="UTF-8"?>\r\n<org.eclipse.ui.commands>\r\n<keyBinding contextId\="org.eclipse.ui.contexts.window" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="CTRL+B"/>\r\n<keyBinding commandId\="org.eclipse.ui.project.buildAll" contextId\="org.eclipse.ui.contexts.window" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F7"/>\r\n<keyBinding contextId\="org.eclipse.ui.contexts.window" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F11"/>\r\n<keyBinding contextId\="org.eclipse.debug.ui.debugging" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F5"/>\r\n<keyBinding commandId\="org.eclipse.debug.ui.commands.StepInto" contextId\="org.eclipse.ui.contexts.window" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F11"/>\r\n<keyBinding contextId\="org.eclipse.debug.ui.debugging" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F6"/>\r\n<keyBinding commandId\="org.eclipse.debug.ui.commands.StepOver" contextId\="org.eclipse.ui.contexts.window" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F10"/>\r\n<keyBinding commandId\="org.eclipse.debug.ui.commands.DebugLast" contextId\="org.eclipse.ui.contexts.window" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="CTRL+D"/>\r\n<keyBinding contextId\="org.eclipse.ui.textEditorScope" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="CTRL+D"/>\r\n<keyBinding contextId\="org.eclipse.ui.contexts.window" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="CTRL+F11"/>\r\n<keyBinding commandId\="org.eclipse.debug.ui.commands.RunLast" contextId\="org.eclipse.ui.contexts.window" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F5"/>\r\n<keyBinding contextId\="org.eclipse.ui.contexts.window" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F5"/>\r\n<keyBinding contextId\="org.eclipse.ui.textEditorScope" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="CTRL+K"/>\r\n<keyBinding commandId\="org.eclipse.ui.edit.findNext" contextId\="org.eclipse.ui.contexts.window" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F3"/>\r\n<keyBinding contextId\="org.eclipse.cdt.make.ui.makefileEditorScope" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F3"/>\r\n<keyBinding contextId\="org.eclipse.cdt.ui.cEditorScope" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F3"/>\r\n<keyBinding contextId\="org.eclipse.cdt.ui.cViewScope" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F3"/>\r\n</org.eclipse.ui.commands>\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.debug.core/.launches/OpenOCD Programmer.launch b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.debug.core/.launches/OpenOCD Programmer.launch
new file mode 100644 (file)
index 0000000..4175eca
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.debug.core/.launches/OpenOCD Programmer.launch
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>\r
+<launchConfiguration type="org.eclipse.ui.externaltools.ProgramLaunchConfigurationType">\r
+<booleanAttribute key="org.eclipse.debug.core.appendEnvironmentVariables" value="true"/>\r
+<stringAttribute key="org.eclipse.ui.externaltools.ATTR_LOCATION" value="${workspace_loc}/../Common/drivers/OpenOCD/openocd-pp.exe"/>\r
+<stringAttribute key="org.eclipse.ui.externaltools.ATTR_TOOL_ARGUMENTS" value="--file lpc2368_flash.cfg"/>\r
+<stringAttribute key="org.eclipse.ui.externaltools.ATTR_WORKING_DIRECTORY" value="${workspace_loc}"/>\r
+</launchConfiguration>\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.debug.core/.launches/OpenOCD Server.launch b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.debug.core/.launches/OpenOCD Server.launch
new file mode 100644 (file)
index 0000000..f70d8f9
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.debug.core/.launches/OpenOCD Server.launch
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>\r
+<launchConfiguration type="org.eclipse.ui.externaltools.ProgramLaunchConfigurationType">\r
+<booleanAttribute key="org.eclipse.debug.core.appendEnvironmentVariables" value="true"/>\r
+<stringAttribute key="org.eclipse.ui.externaltools.ATTR_LOCATION" value="${workspace_loc}/../Common/drivers/OpenOCD/openocd-pp.exe"/>\r
+<stringAttribute key="org.eclipse.ui.externaltools.ATTR_TOOL_ARGUMENTS" value="--file lpc2xxx_pp.cfg"/>\r
+<stringAttribute key="org.eclipse.ui.externaltools.ATTR_WORKING_DIRECTORY" value="${workspace_loc}"/>\r
+</launchConfiguration>\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.debug.core/.launches/RTOSDemo.launch b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.debug.core/.launches/RTOSDemo.launch
new file mode 100644 (file)
index 0000000..acc651f
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.debug.core/.launches/RTOSDemo.launch
@@ -0,0 +1,26 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>\r
+<launchConfiguration type="org.eclipse.cdt.debug.gdbjtag.launchConfigurationType">\r
+<stringAttribute key="org.eclipse.cdt.debug.gdbremote.core.imageFileName" value="C:\E\Dev\FreeRTOS\Demo\CORTEX_LM3S8962_Eclipse\RTOSDemo\RTOSDemo.elf"/>\r
+<stringAttribute key="org.eclipse.cdt.debug.gdbremote.core.initCommands" value="target remote:3333&#13;&#10;monitor sleep 500&#13;&#10;monitor arm7_9 force_hw_bkpts enable&#13;&#10;monitor sleep 500&#13;&#10;monitor soft_reset_halt&#13;&#10;delete&#13;&#10;monitor sleep 500&#13;&#10;b main&#13;&#10;monitor sleep 500&#13;&#10;c&#13;&#10;monitor sleep 500&#13;&#10;delete&#13;&#10;&#13;&#10;&#13;&#10;"/>\r
+<stringAttribute key="org.eclipse.cdt.debug.gdbremote.core.ipAddress" value="localhost"/>\r
+<booleanAttribute key="org.eclipse.cdt.debug.gdbremote.core.loadImage" value="false"/>\r
+<intAttribute key="org.eclipse.cdt.debug.gdbremote.core.portNumber" value="3333"/>\r
+<stringAttribute key="org.eclipse.cdt.debug.gdbremote.core.runCommands" value=""/>\r
+<booleanAttribute key="org.eclipse.cdt.debug.gdbremote.core.useRemoteTarget" value="false"/>\r
+<stringAttribute key="org.eclipse.cdt.debug.mi.core.DEBUG_NAME" value="arm-elf-gdb.exe"/>\r
+<stringAttribute key="org.eclipse.cdt.debug.mi.core.GDB_INIT" value=""/>\r
+<stringAttribute key="org.eclipse.cdt.debug.mi.core.commandFactory" value="Standard"/>\r
+<stringAttribute key="org.eclipse.cdt.debug.mi.core.protocol" value="mi"/>\r
+<booleanAttribute key="org.eclipse.cdt.debug.mi.core.verboseMode" value="false"/>\r
+<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value=""/>\r
+<stringAttribute key="org.eclipse.cdt.launch.GLOBAL_VARIABLES" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;globalVariableList/&gt;&#13;&#10;"/>\r
+<stringAttribute key="org.eclipse.cdt.launch.MEMORY_BLOCKS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;memoryBlockExpressionList/&gt;&#13;&#10;"/>\r
+<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="RTOSDemo.elf"/>\r
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="RTOSDemo"/>\r
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">\r
+<listEntry value="/RTOSDemo"/>\r
+</listAttribute>\r
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">\r
+<listEntry value="4"/>\r
+</listAttribute>\r
+</launchConfiguration>\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.debug.ui/dialog_settings.xml b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.debug.ui/dialog_settings.xml
new file mode 100644 (file)
index 0000000..4b12221
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.debug.ui/dialog_settings.xml
@@ -0,0 +1,34 @@
+<?xml version="1.0" encoding="UTF-8"?>\r
+<section name="Workbench">\r
+       <section name="org.eclipse.debug.ui.STRING_VARIABLE_SELECTION_DIALOG_SECTION">\r
+               <item value="326" key="DIALOG_WIDTH"/>\r
+               <item value="-33" key="DIALOG_Y_ORIGIN"/>\r
+               <item value="309" key="DIALOG_X_ORIGIN"/>\r
+               <item value="530" key="DIALOG_HEIGHT"/>\r
+               <item value="1|Tahoma|8.25|0|WINDOWS|1|-11|0|0|0|400|0|0|0|1|0|0|0|0|Tahoma" key="DIALOG_FONT_NAME"/>\r
+       </section>\r
+       <section name="org.eclipse.debug.ui.LAUNCH_CONFIGURATIONS_DIALOG_SECTION">\r
+               <item value="944" key="DIALOG_WIDTH"/>\r
+               <item value="154" key="DIALOG_Y_ORIGIN"/>\r
+               <item value=", org.eclipse.ui.externaltools.ProgramLaunchConfigurationType, org.eclipse.cdt.debug.gdbjtag.launchConfigurationType, org.eclipse.cdt.launch.localCLaunch, " key="org.eclipse.debug.ui.EXPANDED_NODES"/>\r
+               <item value="274" key="DIALOG_X_ORIGIN"/>\r
+               <item value="640" key="DIALOG_HEIGHT"/>\r
+               <item value="237" key="org.eclipse.debug.ui.DIALOG_SASH_WEIGHTS_1"/>\r
+               <item value="762" key="org.eclipse.debug.ui.DIALOG_SASH_WEIGHTS_2"/>\r
+               <item value="1|Tahoma|8.25|0|WINDOWS|1|-11|0|0|0|400|0|0|0|1|0|0|0|0|Tahoma" key="DIALOG_FONT_NAME"/>\r
+       </section>\r
+       <section name="org.eclipse.debug.ui.SELECT_CONFIGURATION_TYPE_DIALOG">\r
+               <item value="300" key="DIALOG_WIDTH"/>\r
+               <item value="46" key="DIALOG_Y_ORIGIN"/>\r
+               <item value="301" key="DIALOG_X_ORIGIN"/>\r
+               <item value="350" key="DIALOG_HEIGHT"/>\r
+               <item value="1|Tahoma|8.25|0|WINDOWS|1|-11|0|0|0|400|0|0|0|1|0|0|0|0|Tahoma" key="DIALOG_FONT_NAME"/>\r
+       </section>\r
+       <section name="FAVORITES_DIALOG_SECTION">\r
+               <item value="227" key="DIALOG_WIDTH"/>\r
+               <item value="360" key="DIALOG_Y_ORIGIN"/>\r
+               <item value="731" key="DIALOG_X_ORIGIN"/>\r
+               <item value="233" key="DIALOG_HEIGHT"/>\r
+               <item value="1|Tahoma|8.25|0|WINDOWS|1|-11|0|0|0|400|0|0|0|1|0|0|0|0|Tahoma" key="DIALOG_FONT_NAME"/>\r
+       </section>\r
+</section>\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.debug.ui/launchConfigurationHistory.xml b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.debug.ui/launchConfigurationHistory.xml
new file mode 100644 (file)
index 0000000..598b376
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.debug.ui/launchConfigurationHistory.xml
@@ -0,0 +1,24 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>\r
+<launchHistory>\r
+<launchGroup id="org.eclipse.ui.externaltools.launchGroup">\r
+<mruHistory>\r
+<launch memento="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;launchConfiguration local=&quot;true&quot; path=&quot;OpenOCD Programmer.launch&quot;/&gt;&#13;&#10;"/>\r
+<launch memento="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;launchConfiguration local=&quot;true&quot; path=&quot;OpenOCD Server.launch&quot;/&gt;&#13;&#10;"/>\r
+</mruHistory>\r
+<favorites/>\r
+</launchGroup>\r
+<launchGroup id="org.eclipse.debug.ui.launchGroup.profile">\r
+<mruHistory/>\r
+<favorites/>\r
+</launchGroup>\r
+<launchGroup id="org.eclipse.debug.ui.launchGroup.debug">\r
+<mruHistory>\r
+<launch memento="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;launchConfiguration local=&quot;true&quot; path=&quot;RTOSDemo.launch&quot;/&gt;&#13;&#10;"/>\r
+</mruHistory>\r
+<favorites/>\r
+</launchGroup>\r
+<launchGroup id="org.eclipse.debug.ui.launchGroup.run">\r
+<mruHistory/>\r
+<favorites/>\r
+</launchGroup>\r
+</launchHistory>\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.help.ui/dialog_settings.xml b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.help.ui/dialog_settings.xml
new file mode 100644 (file)
index 0000000..1ef2b05
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.help.ui/dialog_settings.xml
@@ -0,0 +1,3 @@
+<?xml version="1.0" encoding="UTF-8"?>\r
+<section name="Workbench">\r
+</section>\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.help.ui/scope_sets/Default.pref b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.help.ui/scope_sets/Default.pref
new file mode 100644 (file)
index 0000000..fc15817
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.help.ui/scope_sets/Default.pref
@@ -0,0 +1,2 @@
+#Sun Aug 26 17:54:18 BST 2007\r
+__DEFAULT__=true\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.help.ui/scope_sets/relative_path.hist b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.help.ui/scope_sets/relative_path.hist
new file mode 100644 (file)
index 0000000..713e721
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.help.ui/scope_sets/relative_path.hist
@@ -0,0 +1,4 @@
+#Sun Aug 26 17:36:29 BST 2007\r
+__DEFAULT__=false\r
+org.eclipse.help.ui.localSearch.master=true\r
+expression=relative path\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.help.ui/scope_sets/working_set.hist b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.help.ui/scope_sets/working_set.hist
new file mode 100644 (file)
index 0000000..197837b
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.help.ui/scope_sets/working_set.hist
@@ -0,0 +1,4 @@
+#Sun Aug 26 17:29:25 BST 2007\r
+__DEFAULT__=false\r
+org.eclipse.help.ui.localSearch.master=true\r
+expression=working set\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.help.ui/scope_sets/working_sets.hist b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.help.ui/scope_sets/working_sets.hist
new file mode 100644 (file)
index 0000000..a88e15e
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.help.ui/scope_sets/working_sets.hist
@@ -0,0 +1,4 @@
+#Sun Aug 26 17:54:21 BST 2007\r
+__DEFAULT__=false\r
+org.eclipse.help.ui.localSearch.master=true\r
+expression=working sets\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.ltk.ui.refactoring/dialog_settings.xml b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.ltk.ui.refactoring/dialog_settings.xml
new file mode 100644 (file)
index 0000000..ac67147
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.ltk.ui.refactoring/dialog_settings.xml
@@ -0,0 +1,6 @@
+<?xml version="1.0" encoding="UTF-8"?>\r
+<section name="Workbench">\r
+       <section name="RefactoringPropertyPage">\r
+               <item value="true" key="org.eclipse.ltk.ui.refactoring.sortRefactorings"/>\r
+       </section>\r
+</section>\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.search/dialog_settings.xml b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.search/dialog_settings.xml
new file mode 100644 (file)
index 0000000..839aca5
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.search/dialog_settings.xml
@@ -0,0 +1,46 @@
+<?xml version="1.0" encoding="UTF-8"?>\r
+<section name="Workbench">\r
+       <section name="">\r
+               <item value="1000" key="org.eclipse.search.resultpage.limit"/>\r
+       </section>\r
+       <section name="DialogBounds_SearchDialog">\r
+               <item value="519" key="DIALOG_WIDTH"/>\r
+               <item value="259" key="DIALOG_Y_ORIGIN"/>\r
+               <item value="385" key="DIALOG_HEIGHT"/>\r
+               <item value="445" key="DIALOG_X_ORIGIN"/>\r
+               <item value="1|Tahoma|8.25|0|WINDOWS|1|-11|0|0|0|400|0|0|0|1|0|0|0|0|Tahoma" key="DIALOG_FONT_NAME"/>\r
+       </section>\r
+       <section name="Search">\r
+               <list key="Search.processedPageIds">\r
+                       <item value="org.eclipse.search.internal.ui.text.TextSearchPage"/>\r
+                       <item value="org.eclipse.cdt.ui.pdomSearchPage"/>\r
+               </list>\r
+               <list key="Search.enabledPageIds">\r
+                       <item value="org.eclipse.search.internal.ui.text.TextSearchPage"/>\r
+                       <item value="org.eclipse.cdt.ui.pdomSearchPage"/>\r
+               </list>\r
+       </section>\r
+       <section name="org.eclipse.search.text.FileSearchResultPage">\r
+               <item value="1000" key="org.eclipse.search.resultpage.limit"/>\r
+       </section>\r
+       <section name="TextSearchPage">\r
+               <item value="false" key="CASE_SENSITIVE"/>\r
+               <item value="false" key="REG_EX_SEARCH"/>\r
+               <item value="false" key="SEARCH_DERIVED"/>\r
+               <item value="1" key="HISTORY_SIZE"/>\r
+               <section name="HISTORY0">\r
+                       <item value="false" key="isRegExSearch"/>\r
+                       <item value="struct timer" key="textPattern"/>\r
+                       <item value="0" key="scope"/>\r
+                       <item value="true" key="ignoreCase"/>\r
+                       <list key="fileNamePatterns">\r
+                               <item value="*.c *.h"/>\r
+                       </list>\r
+                       <list key="workingSets">\r
+                       </list>\r
+               </section>\r
+       </section>\r
+       <section name="SearchDialog.ScopePart">\r
+               <item value="0" key="scope"/>\r
+       </section>\r
+</section>\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.ui.cheatsheets/dialog_settings.xml b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.ui.cheatsheets/dialog_settings.xml
new file mode 100644 (file)
index 0000000..1df8b48
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.ui.cheatsheets/dialog_settings.xml
@@ -0,0 +1,10 @@
+<?xml version="1.0" encoding="UTF-8"?>\r
+<section name="Workbench">\r
+       <section name="CheatSheetCategoryBasedSelectionDialog">\r
+               <item value="326" key="DIALOG_WIDTH"/>\r
+               <item value="154" key="DIALOG_Y_ORIGIN"/>\r
+               <item value="542" key="DIALOG_HEIGHT"/>\r
+               <item value="541" key="DIALOG_X_ORIGIN"/>\r
+               <item value="1|Tahoma|8.25|0|WINDOWS|1|-11|0|0|0|400|0|0|0|1|0|0|0|0|Tahoma" key="DIALOG_FONT_NAME"/>\r
+       </section>\r
+</section>\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.ui.ide/dialog_settings.xml b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.ui.ide/dialog_settings.xml
new file mode 100644 (file)
index 0000000..127582b
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.ui.ide/dialog_settings.xml
@@ -0,0 +1,26 @@
+<?xml version="1.0" encoding="UTF-8"?>\r
+<section name="Workbench">\r
+       <section name="ResourceNavigator">\r
+               <item value="FreeRTOS_LM3S8962_Demo" key="ResourceWorkingSetFilter.STORE_WORKING_SET"/>\r
+               <item value="1" key="ResourceViewer.STORE_SORT_TYPE"/>\r
+       </section>\r
+       <section name="org.eclipse.ui.views.problem">\r
+       </section>\r
+       <section name="org.eclipse.ui.views.task">\r
+       </section>\r
+       <section name="SaveAsDialogSettings">\r
+               <item value="438" key="DIALOG_WIDTH"/>\r
+               <item value="147" key="DIALOG_Y_ORIGIN"/>\r
+               <item value="553" key="DIALOG_HEIGHT"/>\r
+               <item value="625" key="DIALOG_X_ORIGIN"/>\r
+               <item value="1|Tahoma|8.25|0|WINDOWS|1|-11|0|0|0|400|0|0|0|1|0|0|0|0|Tahoma" key="DIALOG_FONT_NAME"/>\r
+       </section>\r
+       <section name="CleanDialogSettings">\r
+               <item value="443" key="DIALOG_WIDTH"/>\r
+               <item value="false" key="BUILD_NOW"/>\r
+               <item value="251" key="DIALOG_Y_ORIGIN"/>\r
+               <item value="479" key="DIALOG_X_ORIGIN"/>\r
+               <item value="391" key="DIALOG_HEIGHT"/>\r
+               <item value="false" key="TOGGLE_SELECTED"/>\r
+       </section>\r
+</section>\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.ui.intro/dialog_settings.xml b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.ui.intro/dialog_settings.xml
new file mode 100644 (file)
index 0000000..d3014f5
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.ui.intro/dialog_settings.xml
@@ -0,0 +1,4 @@
+<?xml version="1.0" encoding="UTF-8"?>\r
+<section name="Workbench">\r
+       <item value="1024" key="introLaunchBar.location"/>\r
+</section>\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.ui.workbench.texteditor/dialog_settings.xml b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.ui.workbench.texteditor/dialog_settings.xml
new file mode 100644 (file)
index 0000000..ec032bd
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.ui.workbench.texteditor/dialog_settings.xml
@@ -0,0 +1,38 @@
+<?xml version="1.0" encoding="UTF-8"?>\r
+<section name="Workbench">\r
+       <section name="org.eclipse.ui.texteditor.FindReplaceDialog_dialogBounds">\r
+               <item value="243" key="DIALOG_WIDTH"/>\r
+               <item value="209" key="DIALOG_Y_ORIGIN"/>\r
+               <item value="356" key="DIALOG_HEIGHT"/>\r
+               <item value="1044" key="DIALOG_X_ORIGIN"/>\r
+               <item value="1|Tahoma|8.25|0|WINDOWS|1|-11|0|0|0|400|0|0|0|1|0|0|0|0|Tahoma" key="DIALOG_FONT_NAME"/>\r
+       </section>\r
+       <section name="org.eclipse.ui.texteditor.FindReplaceDialog">\r
+               <item value="false" key="wrap"/>\r
+               <item value="false" key="isRegEx"/>\r
+               <item value="false" key="casesensitive"/>\r
+               <item value="false" key="incremental"/>\r
+               <item value="false" key="wholeword"/>\r
+               <item value="print(" key="selection"/>\r
+               <list key="findhistory">\r
+                       <item value="print("/>\r
+                       <item value="7404"/>\r
+                       <item value="heap_"/>\r
+                       <item value="create"/>\r
+                       <item value="death"/>\r
+                       <item value="int"/>\r
+                       <item value="print"/>\r
+                       <item value="snprintf"/>\r
+               </list>\r
+               <list key="replacehistory">\r
+                       <item value="DESCRIPTORNUM"/>\r
+                       <item value="MAC_TXPRODUCEINDEX"/>\r
+                       <item value="MAC_TXDESCRIPTORNUMBER"/>\r
+                       <item value="MAC_TXSTATUS"/>\r
+                       <item value="MAC_TXDESCRIPTOR"/>\r
+                       <item value="MAC_RXDESCRIPTORNUMBER"/>\r
+                       <item value="MAC_RXSTATUS"/>\r
+                       <item value="MAC_MRDD"/>\r
+               </list>\r
+       </section>\r
+</section>\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.ui.workbench/dialog_settings.xml b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.ui.workbench/dialog_settings.xml
new file mode 100644 (file)
index 0000000..77beade
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.ui.workbench/dialog_settings.xml
@@ -0,0 +1,19 @@
+<?xml version="1.0" encoding="UTF-8"?>\r
+<section name="Workbench">\r
+       <section name="WorkbenchPreferenceDialogSettings">\r
+               <item value="146" key="DIALOG_Y_ORIGIN"/>\r
+               <item value="269" key="DIALOG_X_ORIGIN"/>\r
+       </section>\r
+       <section name="org.eclipse.ui.preferences.keysPreferencePage">\r
+               <item value="true" key="uncategorizedFilter"/>\r
+               <item value="false" key="showAllField"/>\r
+               <item value="true" key="internalFilter"/>\r
+               <item value="true" key="actionSetFilter"/>\r
+       </section>\r
+       <section name="ImportExportAction">\r
+               <item value="org.eclipse.ui.wizards.import.FileSystem" key="ImportExportPage.STORE_SELECTED_IMPORT_WIZARD_ID"/>\r
+               <list key="ImportExportPage.STORE_EXPANDED_IMPORT_CATEGORIES">\r
+                       <item value="org.eclipse.ui.Basic"/>\r
+               </list>\r
+       </section>\r
+</section>\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.ui.workbench/workbench.xml b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.ui.workbench/workbench.xml
new file mode 100644 (file)
index 0000000..01621f4
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.ui.workbench/workbench.xml
@@ -0,0 +1,530 @@
+<?xml version="1.0" encoding="UTF-8"?>\r
+<workbench progressCount="21" version="2.0">\r
+<workbenchAdvisor/>\r
+<window height="768" maximized="true" width="1024" x="66" y="69">\r
+<fastViewData fastViewLocation="1024"/>\r
+<perspectiveBar>\r
+<itemSize x="160"/>\r
+</perspectiveBar>\r
+<coolbarLayout locked="0">\r
+<coolItem id="group.file" itemType="typeGroupMarker"/>\r
+<coolItem id="org.eclipse.ui.workbench.file" itemType="typeToolBarContribution" x="130" y="22"/>\r
+<coolItem id="additions" itemType="typeGroupMarker"/>\r
+<coolItem id="org.eclipse.cdt.ui.CElementCreationActionSet" itemType="typeToolBarContribution" x="161" y="22"/>\r
+<coolItem id="org.eclipse.cdt.ui.buildConfigActionSet" itemType="typeToolBarContribution" x="85" y="22"/>\r
+<coolItem id="org.eclipse.debug.ui.launchActionSet" itemType="typeToolBarContribution" x="124" y="22"/>\r
+<coolItem id="org.eclipse.search.searchActionSet" itemType="typeToolBarContribution" x="61" y="22"/>\r
+<coolItem id="org.eclipse.ui.edit.text.actionSet.presentation" itemType="typeToolBarContribution" x="61" y="22"/>\r
+<coolItem id="group.nav" itemType="typeGroupMarker"/>\r
+<coolItem id="org.eclipse.ui.workbench.navigate" itemType="typeToolBarContribution" x="185" y="22"/>\r
+<coolItem id="group.editor" itemType="typeGroupMarker"/>\r
+<coolItem id="org.eclipse.cdt.ui.editor.asm.AsmEditor" itemType="typePlaceholder" x="-1" y="-1"/>\r
+<coolItem id="org.eclipse.ui.DefaultTextEditor" itemType="typePlaceholder" x="-1" y="-1"/>\r
+<coolItem id="org.eclipse.cdt.ui.editor.CEditor" itemType="typeToolBarContribution" x="-1" y="-1"/>\r
+<coolItem id="org.eclipse.cdt.make.editor" itemType="typePlaceholder" x="-1" y="-1"/>\r
+<coolItem id="group.help" itemType="typeGroupMarker"/>\r
+<coolItem id="org.eclipse.ui.workbench.help" itemType="typeToolBarContribution" x="-1" y="-1"/>\r
+</coolbarLayout>\r
+<page aggregateWorkingSetId="Aggregate for window 1188147282312" focus="true" label="Workspace - C/C++">\r
+<editors>\r
+<editorArea activeWorkbook="DefaultEditorWorkbook">\r
+<info part="DefaultEditorWorkbook">\r
+<folder appearance="1" expanded="2">\r
+<presentation id="org.eclipse.ui.internal.presentations.r33.WorkbenchPresentationFactory_33">\r
+<part id="0"/>\r
+</presentation>\r
+</folder>\r
+</info>\r
+</editorArea>\r
+<editor focus="true" id="org.eclipse.cdt.ui.editor.CEditor" name="main.c" partName="main.c" path="C:/E/Dev/FreeRTOS/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/main.c" title="main.c" tooltip="RTOSDemo/main.c" workbook="DefaultEditorWorkbook">\r
+<input factoryID="org.eclipse.ui.part.FileEditorInputFactory" path="/RTOSDemo/main.c"/>\r
+<editorState selectionHPixel="0" selectionLength="0" selectionOffset="9810"/>\r
+</editor>\r
+</editors>\r
+<views>\r
+<view id="org.eclipse.search.ui.views.SearchView" partName="Search">\r
+<viewState isPinned="false">\r
+<view IMemento.internal.id="" org.eclipse.search.lastActivation="0"/>\r
+</viewState>\r
+</view>\r
+<view id="org.eclipse.debug.ui.DebugView" partName="Debug">\r
+<viewState/>\r
+</view>\r
+<view id="org.eclipse.ui.views.TaskList" partName="Tasks">\r
+<viewState columnWidth0="43" columnWidth1="19" columnWidth2="253" columnWidth3="78" columnWidth4="283" columnWidth5="63" columnWidth6="0" horizontalPosition="0" verticalPosition="0">\r
+<columnOrder columnOrderIndex="0"/>\r
+<columnOrder columnOrderIndex="1"/>\r
+<columnOrder columnOrderIndex="2"/>\r
+<columnOrder columnOrderIndex="3"/>\r
+<columnOrder columnOrderIndex="4"/>\r
+<columnOrder columnOrderIndex="5"/>\r
+<columnOrder columnOrderIndex="6"/>\r
+</viewState>\r
+</view>\r
+<view id="org.eclipse.debug.ui.VariableView" partName="Variables">\r
+<viewState/>\r
+</view>\r
+<view id="org.eclipse.debug.ui.BreakpointView" partName="Breakpoints">\r
+<viewState>\r
+<isTrackingSelection value="false"/>\r
+</viewState>\r
+</view>\r
+<view id="org.eclipse.ui.navigator.ProjectExplorer" partName="Project Explorer">\r
+<viewState CommonNavigator.LINKING_ENABLED="0" CommonNavigator.LINKING_ENABLED.delayed="0" org.eclipse.cdt.ui.cview.groupincludes="false" org.eclipse.cdt.ui.editor.CUChildren="true" org.eclipse.ui.navigator.resources.workingSets.showTopLevelWorkingSets="0"/>\r
+</view>\r
+<view id="org.eclipse.debug.ui.ExpressionView" partName="Expressions">\r
+<viewState/>\r
+</view>\r
+<view id="org.eclipse.ui.views.PropertySheet" partName="Properties">\r
+<viewState/>\r
+</view>\r
+<view id="org.eclipse.ui.views.ResourceNavigator" partName="Navigator">\r
+<viewState LINK_NAVIGATOR_TO_EDITOR="0" sorter="1">\r
+<filters>\r
+<filter element=".*" isEnabled="false"/>\r
+</filters>\r
+<expanded>\r
+<element path="/RTOSDemo"/>\r
+</expanded>\r
+</viewState>\r
+</view>\r
+<view id="org.eclipse.ui.views.ProblemView" partName="Problems">\r
+<viewState columnWidth0="781" columnWidth1="78" columnWidth2="153" columnWidth3="63" columnWidth4="0" horizontalPosition="0" verticalPosition="0">\r
+<columnOrder columnOrderIndex="0"/>\r
+<columnOrder columnOrderIndex="1"/>\r
+<columnOrder columnOrderIndex="2"/>\r
+<columnOrder columnOrderIndex="3"/>\r
+<columnOrder columnOrderIndex="4"/>\r
+</viewState>\r
+</view>\r
+<view id="org.eclipse.ui.console.ConsoleView" partName="Console">\r
+<viewState/>\r
+</view>\r
+</views>\r
+<perspectives activePart="org.eclipse.ui.console.ConsoleView" activePerspective="org.eclipse.cdt.ui.CPerspective">\r
+<perspective editorAreaTrimState="2" editorAreaVisible="1" fixed="0" version="0.016">\r
+<descriptor class="org.eclipse.cdt.internal.ui.CPerspectiveFactory" id="org.eclipse.cdt.ui.CPerspective" label="C/C++"/>\r
+<alwaysOnActionSet id="org.eclipse.ui.cheatsheets.actionSet"/>\r
+<alwaysOnActionSet id="org.eclipse.search.searchActionSet"/>\r
+<alwaysOnActionSet id="org.eclipse.ui.edit.text.actionSet.annotationNavigation"/>\r
+<alwaysOnActionSet id="org.eclipse.ui.edit.text.actionSet.navigation"/>\r
+<alwaysOnActionSet id="org.eclipse.ui.edit.text.actionSet.convertLineDelimitersTo"/>\r
+<alwaysOnActionSet id="org.eclipse.ui.externaltools.ExternalToolsSet"/>\r
+<alwaysOnActionSet id="org.eclipse.ui.actionSet.keyBindings"/>\r
+<alwaysOnActionSet id="org.eclipse.ui.WorkingSetActionSet"/>\r
+<alwaysOnActionSet id="org.eclipse.ui.actionSet.openFiles"/>\r
+<alwaysOnActionSet id="org.eclipse.update.ui.softwareUpdates"/>\r
+<alwaysOnActionSet id="org.eclipse.cdt.ui.SearchActionSet"/>\r
+<alwaysOnActionSet id="org.eclipse.cdt.ui.CElementCreationActionSet"/>\r
+<alwaysOnActionSet id="org.eclipse.ui.NavigateActionSet"/>\r
+<alwaysOnActionSet id="org.eclipse.debug.ui.breakpointActionSet"/>\r
+<alwaysOnActionSet id="org.eclipse.cdt.make.ui.makeTargetActionSet"/>\r
+<alwaysOnActionSet id="org.eclipse.cdt.ui.CodingActionSet"/>\r
+<alwaysOnActionSet id="org.eclipse.debug.ui.launchActionSet"/>\r
+<alwaysOnActionSet id="org.eclipse.cdt.ui.buildConfigActionSet"/>\r
+<alwaysOnActionSet id="org.eclipse.cdt.ui.NavigationActionSet"/>\r
+<alwaysOnActionSet id="org.eclipse.cdt.ui.OpenActionSet"/>\r
+<alwaysOnActionSet id="org.eclipse.ui.edit.text.actionSet.presentation"/>\r
+<show_view_action id="org.eclipse.ui.console.ConsoleView"/>\r
+<show_view_action id="org.eclipse.search.ui.views.SearchView"/>\r
+<show_view_action id="org.eclipse.ui.views.ContentOutline"/>\r
+<show_view_action id="org.eclipse.ui.views.ProblemView"/>\r
+<show_view_action id="org.eclipse.cdt.ui.CView"/>\r
+<show_view_action id="org.eclipse.ui.views.ResourceNavigator"/>\r
+<show_view_action id="org.eclipse.ui.views.PropertySheet"/>\r
+<show_view_action id="org.eclipse.ui.views.TaskList"/>\r
+<show_view_action id="org.eclipse.cdt.make.ui.views.MakeView"/>\r
+<show_view_action id="org.eclipse.ui.navigator.ProjectExplorer"/>\r
+<show_view_action id="org.eclipse.cdt.ui.includeBrowser"/>\r
+<show_in_time id="org.eclipse.ui.views.ResourceNavigator" time="1187629972828"/>\r
+<new_wizard_action id="org.eclipse.cdt.ui.wizards.ConvertToMakeWizard"/>\r
+<new_wizard_action id="org.eclipse.cdt.ui.wizards.NewCWizard2"/>\r
+<new_wizard_action id="org.eclipse.cdt.ui.wizards.NewCWizard1"/>\r
+<new_wizard_action id="org.eclipse.cdt.ui.wizards.NewSourceFolderCreationWizard"/>\r
+<new_wizard_action id="org.eclipse.cdt.ui.wizards.NewFolderCreationWizard"/>\r
+<new_wizard_action id="org.eclipse.cdt.ui.wizards.NewSourceFileCreationWizard"/>\r
+<new_wizard_action id="org.eclipse.cdt.ui.wizards.NewHeaderFileCreationWizard"/>\r
+<new_wizard_action id="org.eclipse.cdt.ui.wizards.NewFileCreationWizard"/>\r
+<new_wizard_action id="org.eclipse.cdt.ui.wizards.NewClassCreationWizard"/>\r
+<perspective_action id="org.eclipse.debug.ui.DebugPerspective"/>\r
+<perspective_action id="org.eclipse.team.ui.TeamSynchronizingPerspective"/>\r
+<view id="org.eclipse.ui.navigator.ProjectExplorer"/>\r
+<view id="org.eclipse.ui.views.ResourceNavigator"/>\r
+<view id="org.eclipse.ui.views.ProblemView"/>\r
+<view id="org.eclipse.ui.views.TaskList"/>\r
+<view id="org.eclipse.ui.console.ConsoleView"/>\r
+<view id="org.eclipse.ui.views.PropertySheet"/>\r
+<view id="org.eclipse.search.ui.views.SearchView"/>\r
+<fastViewBars/>\r
+<layout>\r
+<mainWindow>\r
+<info folder="true" part="topLeft">\r
+<folder activePageID="org.eclipse.ui.views.ResourceNavigator" appearance="2" expanded="2">\r
+<page content="org.eclipse.ui.navigator.ProjectExplorer" label="Project Explorer"/>\r
+<page content="org.eclipse.ui.views.ResourceNavigator" label="Navigator"/>\r
+<page content="org.eclipse.cdt.ui.CView" label="LabelNotFound"/>\r
+<page content="org.eclipse.ui.views.BookmarkView" label="LabelNotFound"/>\r
+<presentation id="org.eclipse.ui.internal.presentations.r33.WorkbenchPresentationFactory_33">\r
+<part id="0"/>\r
+<part id="1"/>\r
+</presentation>\r
+</folder>\r
+</info>\r
+<info folder="true" part="org.eclipse.ui.internal.ViewStack@b4d39c" ratio="0.75" ratioLeft="756" ratioRight="252" relationship="2" relative="topLeft">\r
+<folder appearance="2" expanded="2">\r
+<page content="org.eclipse.help.ui.HelpView" label="LabelNotFound"/>\r
+<page content="org.eclipse.ui.internal.introview" label="LabelNotFound"/>\r
+<page content="org.eclipse.ui.cheatsheets.views.CheatSheetView" label="LabelNotFound"/>\r
+<presentation id="org.eclipse.ui.internal.presentations.r33.WorkbenchPresentationFactory_33"/>\r
+</folder>\r
+</info>\r
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\ No newline at end of file

diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.ui.workbench/workingsets.xml b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.ui.workbench/workingsets.xml
new file mode 100644 (file)
index 0000000..ce2a930
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.ui.workbench/workingsets.xml
@@ -0,0 +1,73 @@
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diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.ui/dialog_settings.xml b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.ui/dialog_settings.xml
new file mode 100644 (file)
index 0000000..64561b6
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.ui/dialog_settings.xml
@@ -0,0 +1,10 @@
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diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.update.ui/dialog_settings.xml b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.update.ui/dialog_settings.xml
new file mode 100644 (file)
index 0000000..86928e0
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/.metadata/.plugins/org.eclipse.update.ui/dialog_settings.xml
@@ -0,0 +1,5 @@
+<?xml version="1.0" encoding="UTF-8"?>\r
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+       </section>\r
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diff --git a/Demo/ARM7_LPC2368_Eclipse/.metadata/version.ini b/Demo/ARM7_LPC2368_Eclipse/.metadata/version.ini
new file mode 100644 (file)
index 0000000..c51ff74
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/.metadata/version.ini
@@ -0,0 +1 @@
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\ No newline at end of file

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new file mode 100644 (file)
index 0000000..bbcae40
--- /dev/null
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+</storageModule>\r
+</cproject>\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/.project b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/.project
new file mode 100644 (file)
index 0000000..b3776de
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/.project
@@ -0,0 +1,97 @@
+<?xml version="1.0" encoding="UTF-8"?>\r
+<projectDescription>\r
+       <name>RTOSDemo</name>\r
+       <comment></comment>\r
+       <projects>\r
+       </projects>\r
+       <buildSpec>\r
+               <buildCommand>\r
+                       <name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>\r
+                       <triggers>clean,full,incremental,</triggers>\r
+                       <arguments>\r
+                               <dictionary>\r
+                                       <key>org.eclipse.cdt.make.core.cleanBuildTarget</key>\r
+                                       <value>clean</value>\r
+                               </dictionary>\r
+                               <dictionary>\r
+                                       <key>org.eclipse.cdt.make.core.enableCleanBuild</key>\r
+                                       <value>true</value>\r
+                               </dictionary>\r
+                               <dictionary>\r
+                                       <key>?name?</key>\r
+                                       <value></value>\r
+                               </dictionary>\r
+                               <dictionary>\r
+                                       <key>org.eclipse.cdt.make.core.append_environment</key>\r
+                                       <value>true</value>\r
+                               </dictionary>\r
+                               <dictionary>\r
+                                       <key>org.eclipse.cdt.make.core.stopOnError</key>\r
+                                       <value>true</value>\r
+                               </dictionary>\r
+                               <dictionary>\r
+                                       <key>org.eclipse.cdt.make.core.buildCommand</key>\r
+                                       <value>make</value>\r
+                               </dictionary>\r
+                               <dictionary>\r
+                                       <key>org.eclipse.cdt.make.core.contents</key>\r
+                                       <value>org.eclipse.cdt.make.core.activeConfigSettings</value>\r
+                               </dictionary>\r
+                               <dictionary>\r
+                                       <key>org.eclipse.cdt.make.core.buildLocation</key>\r
+                                       <value>${workspace_loc:/RTOSDemo}</value>\r
+                               </dictionary>\r
+                               <dictionary>\r
+                                       <key>org.eclipse.cdt.make.core.useDefaultBuildCmd</key>\r
+                                       <value>false</value>\r
+                               </dictionary>\r
+                               <dictionary>\r
+                                       <key>org.eclipse.cdt.make.core.enableAutoBuild</key>\r
+                                       <value>false</value>\r
+                               </dictionary>\r
+                               <dictionary>\r
+                                       <key>org.eclipse.cdt.make.core.enableFullBuild</key>\r
+                                       <value>true</value>\r
+                               </dictionary>\r
+                               <dictionary>\r
+                                       <key>org.eclipse.cdt.make.core.buildArguments</key>\r
+                                       <value></value>\r
+                               </dictionary>\r
+                               <dictionary>\r
+                                       <key>org.eclipse.cdt.make.core.fullBuildTarget</key>\r
+                                       <value>all</value>\r
+                               </dictionary>\r
+                               <dictionary>\r
+                                       <key>?children?</key>\r
+                                       <value>?name?=outputEntries\|?children?=?name?=entry\\\\\\\\\\\\\\\|\\\\\\\|\||</value>\r
+                               </dictionary>\r
+                               <dictionary>\r
+                                       <key>org.eclipse.cdt.make.core.autoBuildTarget</key>\r
+                                       <value>all</value>\r
+                               </dictionary>\r
+                       </arguments>\r
+               </buildCommand>\r
+               <buildCommand>\r
+                       <name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>\r
+                       <arguments>\r
+                       </arguments>\r
+               </buildCommand>\r
+       </buildSpec>\r
+       <natures>\r
+               <nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>\r
+               <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>\r
+               <nature>org.eclipse.cdt.core.cnature</nature>\r
+       </natures>\r
+       <linkedResources>\r
+               <link>\r
+                       <name>Common Demo Files</name>\r
+                       <type>2</type>\r
+                       <locationURI>FreeRTOS_ROOT/Demo/Common</locationURI>\r
+               </link>\r
+               <link>\r
+                       <name>FreeRTOS.org Source</name>\r
+                       <type>2</type>\r
+                       <locationURI>FreeRTOS_ROOT/Source</locationURI>\r
+               </link>\r
+       </linkedResources>\r
+</projectDescription>\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/.settings/org.eclipse.ltk.core.refactoring.prefs b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/.settings/org.eclipse.ltk.core.refactoring.prefs
new file mode 100644 (file)
index 0000000..a9f7e81
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/.settings/org.eclipse.ltk.core.refactoring.prefs
@@ -0,0 +1,3 @@
+#Sun Aug 19 20:36:58 BST 2007\r
+eclipse.preferences.version=1\r
+org.eclipse.ltk.core.refactoring.enable.project.refactoring.history=false\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/FreeRTOSConfig.h b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/FreeRTOSConfig.h
new file mode 100644 (file)
index 0000000..f90931c
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/FreeRTOSConfig.h
@@ -0,0 +1,108 @@
+/*\r
+       FreeRTOS V3.2.3 - Copyright (C) 2003-2005 Richard Barry.\r
+\r
+       This file is part of the FreeRTOS distribution.\r
+\r
+       FreeRTOS is free software; you can redistribute it and/or modify\r
+       it under the terms of the GNU General Public License as published by\r
+       the Free Software Foundation; either version 2 of the License, or\r
+       (at your option) any later version.\r
+\r
+       FreeRTOS is distributed in the hope that it will be useful,\r
+       but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+       MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
+       GNU General Public License for more details.\r
+\r
+       You should have received a copy of the GNU General Public License\r
+       along with FreeRTOS; if not, write to the Free Software\r
+       Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
+\r
+       A special exception to the GPL can be applied should you wish to distribute\r
+       a combined work that includes FreeRTOS, without being obliged to provide\r
+       the source code for any proprietary components.  See the licensing section \r
+       of http://www.FreeRTOS.org for full details of how and when the exception\r
+       can be applied.\r
+\r
+       ***************************************************************************\r
+       See http://www.FreeRTOS.org for documentation, latest information, license \r
+       and contact details.  Please ensure to read the configuration and relevant \r
+       port sections of the online documentation.\r
+       ***************************************************************************\r
+*/\r
+\r
+#ifndef FREERTOS_CONFIG_H\r
+#define FREERTOS_CONFIG_H\r
+\r
+#include <stdio.h>\r
+#include "lpc23xx.h"\r
+/*-----------------------------------------------------------\r
+ * Application specific definitions.\r
+ *\r
+ * These definitions should be adjusted for your particular hardware and\r
+ * application requirements.\r
+ *\r
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE\r
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. \r
+ *----------------------------------------------------------*/\r
+\r
+#define configUSE_PREEMPTION           1\r
+#define configUSE_IDLE_HOOK         0\r
+#define configUSE_TICK_HOOK         1\r
+#define configCPU_CLOCK_HZ          ( ( unsigned portLONG ) 57600000 ) /* =12Mhz xtal multiplied by 5 using the PLL. */\r
+#define configTICK_RATE_HZ          ( ( portTickType ) 1000 )\r
+#define configMAX_PRIORITIES           ( ( unsigned portBASE_TYPE ) 4 )\r
+#define configMINIMAL_STACK_SIZE       ( ( unsigned portSHORT ) 104 )\r
+#define configTOTAL_HEAP_SIZE          ( ( size_t ) ( 18 * 1024 ) )\r
+#define configMAX_TASK_NAME_LEN                ( 10 )\r
+#define configUSE_TRACE_FACILITY       1\r
+#define configUSE_16_BIT_TICKS         0\r
+#define configIDLE_SHOULD_YIELD                1\r
+#define configUSE_MUTEXES                      1\r
+\r
+/* Co-routine definitions. */\r
+#define configUSE_CO_ROUTINES          0\r
+#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )\r
+\r
+\r
+/* Set the following definitions to 1 to include the API function, or zero\r
+to exclude the API function. */\r
+\r
+#define INCLUDE_vTaskPrioritySet            1\r
+#define INCLUDE_uxTaskPriorityGet           1\r
+#define INCLUDE_vTaskDelete                 1\r
+#define INCLUDE_vTaskCleanUpResources       0\r
+#define INCLUDE_vTaskSuspend                1\r
+#define INCLUDE_vTaskDelayUntil             1\r
+#define INCLUDE_vTaskDelay                  1\r
+#define INCLUDE_xTaskGetCurrentTaskHandle      1\r
+\r
+\r
+#endif /* FREERTOS_CONFIG_H */\r
+\r
+\r
+#ifndef sbi\r
+#define sbi(x,y)       x|=(1 << (y))\r
+#endif\r
+\r
+#ifndef cbi \r
+#define cbi(x,y)       x&=~(1 << (y))\r
+#endif\r
+\r
+#ifndef tstb\r
+#define tstb(x,y)      (x & (1 << (y)) ? 1 : 0)\r
+#endif\r
+\r
+#ifndef toggle \r
+#define toggle(x,y)    x^=(1 << (y))\r
+#endif\r
+\r
+#ifndef BIT\r
+#define BIT(x) (1 << (x))\r
+\r
+typedef struct\r
+{\r
+       long xColumn;\r
+       char *pcMessage;\r
+} xLCDMessage;\r
+\r
+#endif\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/LCD/portlcd.c b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/LCD/portlcd.c
new file mode 100644 (file)
index 0000000..55c538f
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/LCD/portlcd.c
@@ -0,0 +1,391 @@
+/*****************************************************************************\r
+ *\r
+ * Project          : lwIP Web\r
+ * Subproject       : \r
+ * Name             : portlcd.c\r
+ * Function         : Routines for LCD\r
+ * Designer         : K. Sterckx\r
+ * Creation date    : 22/01/2007\r
+ * Compiler         : GNU ARM\r
+ * Processor        : LPC2368\r
+ * Last update      :\r
+ * Last updated by  :\r
+ * History          : \r
+ *  based on example code from NXP\r
+ *\r
+ ************************************************************************\r
+ *\r
+ *  This code is used to place text on the LCD.\r
+ *\r
+ ************************************************************************/\r
+\r
+#include "portlcd.h"\r
+#include "FreeRTOS.h"\r
+#include "Task.h"\r
+\r
+/* Please note, on old MCB2300 board, the LCD_E bit is p1.30, on the new board\r
+it's p1.31, please check the schematic carefully, and change LCD_CTRL and LCD_E \r
+accordingly if you have a different board. */\r
+\r
+/* LCD IO definitions */\r
+#define LCD_E     0x80000000            /* Enable control pin                */\r
+#define LCD_RW    0x20000000            /* Read/Write control pin            */\r
+#define LCD_RS    0x10000000            /* Data/Instruction control          */\r
+#define LCD_CTRL  0xB0000000            /* Control lines mask                */\r
+#define LCD_DATA  0x0F000000            /* Data lines mask                   */\r
+\r
+/* Local variables */\r
+static unsigned int lcd_ptr;\r
+\r
+/* 8 user defined characters to be loaded into CGRAM (used for bargraph) */\r
+static const unsigned char UserFont[8][8] = {\r
+       { 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 },\r
+       { 0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10 },\r
+       { 0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18 },\r
+       { 0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C },\r
+       { 0x1E,0x1E,0x1E,0x1E,0x1E,0x1E,0x1E,0x1E },\r
+       { 0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F },\r
+       { 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 },\r
+       { 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 }\r
+};\r
+\r
+/* Local Function Prototypes */\r
+static void     lcd_write( unsigned int c );\r
+static void     lcd_write_4bit( unsigned int c );\r
+static unsigned int lcd_read_stat( void );\r
+static void     lcd_write_cmd( unsigned int c );\r
+static void     lcd_write_data( unsigned int d );\r
+static void     lcd_wait_busy( void );\r
+\r
+\r
+/******************************************************************************\r
+** Function name:  lcd_write_4bit\r
+**\r
+** Descriptions:\r
+**\r
+** parameters:     four bits to write\r
+** Returned value: None\r
+** \r
+******************************************************************************/\r
+static void lcd_write_4bit(unsigned int c)\r
+{\r
+       /* Write a 4-bit command to LCD controller. */\r
+       FIO1DIR |= LCD_DATA | LCD_CTRL;\r
+       FIO1CLR  = LCD_RW   | LCD_DATA;\r
+       FIO1SET  = (c & 0xF) << 24;\r
+       FIO1SET  = LCD_E;\r
+       vTaskDelay(0);\r
+       FIO1CLR  = LCD_E;\r
+       vTaskDelay(0);\r
+       return;\r
+}\r
+\r
+/******************************************************************************\r
+** Function name: lcd_write\r
+**\r
+** Descriptions:\r
+**\r
+** parameters:     word to write\r
+** Returned value: None\r
+** \r
+******************************************************************************/\r
+static void lcd_write(unsigned int c)\r
+{\r
+       /* Write data/command to LCD controller. */\r
+       lcd_write_4bit (c >> 4);\r
+       lcd_write_4bit (c);\r
+       return;\r
+}\r
+\r
+/******************************************************************************\r
+** Function name: lcd_read_stat\r
+**\r
+** Descriptions:\r
+**\r
+** parameters:     None\r
+** Returned value: status\r
+** \r
+******************************************************************************/\r
+static unsigned int lcd_read_stat(void)\r
+{\r
+       /* Read status of LCD controller (ST7066) */\r
+       unsigned int stat;\r
+\r
+       FIO1DIR &= ~LCD_DATA;\r
+       FIO1CLR  = LCD_RS;\r
+       FIO1SET  = LCD_RW;\r
+       vTaskDelay( 0 );\r
+       FIO1SET  = LCD_E;\r
+       vTaskDelay( 0 );\r
+       stat    = (FIO1PIN >> 20) & 0xF0;\r
+       FIO1CLR  = LCD_E;\r
+       vTaskDelay( 0 );\r
+       FIO1SET  = LCD_E;\r
+       vTaskDelay( 0 );\r
+       stat   |= (FIO1PIN >> 24) & 0xF;\r
+       FIO1CLR  = LCD_E;\r
+       return (stat);\r
+}\r
+\r
+/******************************************************************************\r
+** Function name: lcd_wait_busy\r
+**\r
+** Descriptions:\r
+**\r
+** parameters:     None\r
+** Returned value: None\r
+** \r
+******************************************************************************/\r
+static void lcd_wait_busy(void)\r
+{\r
+       /* Wait until LCD controller (ST7066) is busy. */\r
+       unsigned int stat;\r
+\r
+       do\r
+       {\r
+               stat = lcd_read_stat();\r
+       }\r
+       while (stat & 0x80); /* Wait for busy flag */\r
+\r
+       return;\r
+}\r
+\r
+/******************************************************************************\r
+** Function name: lcd_write_cmd\r
+**\r
+** Descriptions:\r
+**\r
+** parameters:     command word\r
+** Returned value: None\r
+** \r
+******************************************************************************/\r
+static void lcd_write_cmd(unsigned int c)\r
+{\r
+       /* Write command to LCD controller. */\r
+       lcd_wait_busy();\r
+       FIO1CLR = LCD_RS;\r
+       lcd_write(c);\r
+       return;\r
+}\r
+\r
+/******************************************************************************\r
+** Function name: lcd_write_data\r
+**\r
+** Descriptions:\r
+**\r
+** parameters:     data word\r
+** Returned value: None\r
+** \r
+******************************************************************************/\r
+static void lcd_write_data(unsigned int d)\r
+{\r
+       /* Write data to LCD controller. */\r
+       lcd_wait_busy();\r
+       FIO1SET = LCD_RS;\r
+       lcd_write(d);\r
+       return;\r
+}\r
+\r
+/******************************************************************************\r
+** Function name: LCD_init\r
+**\r
+** Descriptions:\r
+**\r
+** parameters:     None\r
+** Returned value: None\r
+** \r
+******************************************************************************/\r
+void LCD_init(void)\r
+{\r
+       /* Initialize the ST7066 LCD controller to 4-bit mode. */\r
+       PINSEL3 = 0x00000000;\r
+#if USE_FIO\r
+       SCS |= 0x00000001;/* set GPIOx to use Fast I/O */\r
+#endif\r
+       FIO1DIR |= LCD_CTRL | LCD_DATA;\r
+       FIO1CLR  = LCD_RW   | LCD_RS   | LCD_DATA;\r
+\r
+       lcd_write_4bit(0x3);                /* Select 4-bit interface            */\r
+       vTaskDelay(100);\r
+       lcd_write_4bit(0x3);\r
+       vTaskDelay(100);\r
+       lcd_write_4bit(0x3);\r
+       lcd_write_4bit(0x2);\r
+\r
+       lcd_write_cmd(0x28);                /* 2 lines, 5x8 character matrix     */\r
+       lcd_write_cmd(0x0e);                /* Display ctrl:Disp/Curs/Blnk=ON    */\r
+       lcd_write_cmd(0x06);                /* Entry mode: Move right, no shift  */\r
+\r
+       LCD_load( (unsigned char *)&UserFont, sizeof (UserFont) );\r
+       LCD_cls();\r
+       return;\r
+}\r
+\r
+/******************************************************************************\r
+** Function name: LCD_load\r
+**\r
+** Descriptions:\r
+**\r
+** parameters:     pointer to the buffer and counter\r
+** Returned value: None\r
+** \r
+******************************************************************************/\r
+void LCD_load(unsigned char *fp, unsigned int cnt)\r
+{\r
+       /* Load user-specific characters into CGRAM */\r
+       unsigned int i;\r
+\r
+       lcd_write_cmd( 0x40 );                /* Set CGRAM address counter to 0    */\r
+       for (i = 0; i < cnt; i++, fp++)  \r
+       {\r
+               lcd_write_data( *fp );\r
+       }\r
+       return;\r
+}\r
+\r
+/******************************************************************************\r
+** Function name: LCD_gotoxy\r
+**\r
+** Descriptions:\r
+**\r
+** parameters:     pixel X and Y\r
+** Returned value: None\r
+** \r
+******************************************************************************/\r
+void LCD_gotoxy(unsigned int x, unsigned int y)\r
+{\r
+       /* Set cursor position on LCD display. Left corner: 1,1, right: 16,2 */\r
+       unsigned int c;\r
+\r
+       c = --x;\r
+       if (--y) \r
+       {\r
+               c |= 0x40;\r
+       }\r
+       lcd_write_cmd (c | 0x80);\r
+       lcd_ptr = y*16 + x;\r
+       return;\r
+}\r
+\r
+/******************************************************************************\r
+** Function name: LCD_cls\r
+**\r
+** Descriptions:\r
+**\r
+** parameters:     None\r
+** Returned value: None\r
+** \r
+******************************************************************************/\r
+void LCD_cls(void)\r
+{\r
+       /* Clear LCD display, move cursor to home position. */\r
+       lcd_write_cmd (0x01);\r
+       LCD_gotoxy (1,1);\r
+       return;\r
+}\r
+\r
+/******************************************************************************\r
+** Function name: LCD_cur_off\r
+**\r
+** Descriptions:\r
+**\r
+** parameters:     None\r
+** Returned value: None\r
+** \r
+******************************************************************************/\r
+void LCD_cur_off(void)\r
+{\r
+       /* Switch off LCD cursor. */\r
+       lcd_write_cmd(0x0c);\r
+       return;\r
+}\r
+\r
+\r
+/******************************************************************************\r
+** Function name: LCD_on\r
+**\r
+** Descriptions:\r
+**\r
+** parameters:     None\r
+** Returned value: None\r
+** \r
+******************************************************************************/\r
+void LCD_on(void)\r
+{\r
+       /* Switch on LCD and enable cursor. */\r
+       lcd_write_cmd (0x0e);\r
+       return;\r
+}\r
+\r
+/******************************************************************************\r
+** Function name: LCD_putc\r
+**\r
+** Descriptions:\r
+**\r
+** parameters:     unsigned char character\r
+** Returned value: None\r
+** \r
+******************************************************************************/\r
+void LCD_putc(unsigned char c)\r
+{ \r
+       /* Print a character to LCD at current cursor position. */\r
+       if (lcd_ptr == 16) \r
+       {\r
+               lcd_write_cmd (0xc0);\r
+       }\r
+       lcd_write_data(c);\r
+       lcd_ptr++;\r
+       return;\r
+}\r
+\r
+/******************************************************************************\r
+** Function name: LCD_puts\r
+**\r
+** Descriptions:\r
+**\r
+** parameters:     pointer to the buffer\r
+** Returned value: None\r
+** \r
+******************************************************************************/\r
+void LCD_puts(char *sp)\r
+{\r
+       /* Print a string to LCD display. */\r
+       while (*sp) \r
+       {\r
+               LCD_putc (*sp++);\r
+       }\r
+       return;\r
+}\r
+\r
+/******************************************************************************\r
+** Function name: LCD_bargraph\r
+**\r
+** Descriptions:\r
+**\r
+** parameters:     value and size\r
+** Returned value: None\r
+** \r
+******************************************************************************/\r
+void LCD_bargraph(unsigned int val, unsigned int size)\r
+{\r
+       /* Print a bargraph to LCD display.  */\r
+       /* - val:  value 0..100 %            */\r
+       /* - size: size of bargraph 1..16    */\r
+       unsigned int i;\r
+\r
+       val = val * size / 20;               /* Display matrix 5 x 8 pixels       */\r
+       for (i = 0; i < size; i++) \r
+       {\r
+               if (val > 5) \r
+               {\r
+                       LCD_putc(5);\r
+                       val -= 5;\r
+               }\r
+               else\r
+               {\r
+                       LCD_putc(val);\r
+                       break;\r
+               }\r
+       }\r
+       return;\r
+}\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/LCD/portlcd.h b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/LCD/portlcd.h
new file mode 100644 (file)
index 0000000..7696253
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/LCD/portlcd.h
@@ -0,0 +1,31 @@
+/*****************************************************************************\r
+ *   rtc.h:  Header file for NXP LPC23xx/24xx Family Microprocessors\r
+ *\r
+ *   Copyright(C) 2006, NXP Semiconductor\r
+ *   All rights reserved.\r
+ *\r
+ *   History\r
+ *   2006.07.13  ver 1.00    Prelimnary version, first Release\r
+ *\r
+******************************************************************************/\r
+#ifndef __PORTLCD_H \r
+#define __PORTLCD_H\r
+\r
+extern void LCD_init(void);\r
+extern void LCD_load(unsigned char *fp, unsigned int cnt);\r
+extern void LCD_gotoxy(unsigned int x, unsigned int y);\r
+extern void LCD_cls(void);\r
+extern void LCD_cur_off(void);\r
+extern void LCD_on(void);\r
+extern void LCD_putc(unsigned char c);\r
+extern void LCD_puts(char *sp);\r
+extern void LCD_bargraph(unsigned int val, unsigned int size);\r
+\r
+extern void LCD_putnibble(unsigned char nibble);\r
+extern void LCD_puthexbyte(unsigned char abyte);\r
+\r
+\r
+#endif /* end __PORTLCD_H */\r
+/*****************************************************************************\r
+**                            End Of File\r
+******************************************************************************/\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/LPC23xx.h b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/LPC23xx.h
new file mode 100644 (file)
index 0000000..d3587f5
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/LPC23xx.h
@@ -0,0 +1,1138 @@
+/*****************************************************************************\r
+ *\r
+ * Project          : lwIP Web\r
+ * Subproject       : \r
+ * Name             : LPC23xx.h\r
+ * Function         : register definitions\r
+ * Designer         : K. Sterckx\r
+ * Creation date    : 22/01/2007\r
+ * Compiler         : GNU ARM\r
+ * Processor        : LPC23xx\r
+ * Last update      :\r
+ * Last updated by  :\r
+ * History          :\r
+ *\r
+ *****************************************************************************\r
+ *\r
+ * Hardware specific macro's and defines\r
+ *\r
+ ****************************************************************************/\r
+\r
+#ifndef __LPC23xx_H\r
+#define __LPC23xx_H\r
+\r
+/* Vectored Interrupt Controller (VIC) */\r
+#define VIC_BASE_ADDR  0xFFFFF000\r
+#define VICIRQStatus   (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x000))\r
+#define VICFIQStatus   (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x004))\r
+#define VICRawIntr     (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x008))\r
+#define VICIntSelect   (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x00C))\r
+#define VICIntEnable   (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x010))\r
+#define VICIntEnClr    (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x014))\r
+#define VICSoftInt     (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x018))\r
+#define VICSoftIntClr  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x01C))\r
+#define VICProtection  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x020))\r
+#define VICSWPrioMask  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x024))\r
+\r
+#define VICVectAddr0   (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x100))\r
+#define VICVectAddr1   (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x104))\r
+#define VICVectAddr2   (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x108))\r
+#define VICVectAddr3   (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x10C))\r
+#define VICVectAddr4   (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x110))\r
+#define VICVectAddr5   (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x114))\r
+#define VICVectAddr6   (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x118))\r
+#define VICVectAddr7   (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x11C))\r
+#define VICVectAddr8   (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x120))\r
+#define VICVectAddr9   (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x124))\r
+#define VICVectAddr10  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x128))\r
+#define VICVectAddr11  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x12C))\r
+#define VICVectAddr12  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x130))\r
+#define VICVectAddr13  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x134))\r
+#define VICVectAddr14  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x138))\r
+#define VICVectAddr15  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x13C))\r
+#define VICVectAddr16  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x140))\r
+#define VICVectAddr17  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x144))\r
+#define VICVectAddr18  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x148))\r
+#define VICVectAddr19  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x14C))\r
+#define VICVectAddr20  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x150))\r
+#define VICVectAddr21  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x154))\r
+#define VICVectAddr22  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x158))\r
+#define VICVectAddr23  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x15C))\r
+#define VICVectAddr24  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x160))\r
+#define VICVectAddr25  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x164))\r
+#define VICVectAddr26  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x168))\r
+#define VICVectAddr27  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x16C))\r
+#define VICVectAddr28  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x170))\r
+#define VICVectAddr29  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x174))\r
+#define VICVectAddr30  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x178))\r
+#define VICVectAddr31  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x17C))\r
+\r
+/* The name convention below is from previous LPC2000 family MCUs, in LPC230x,\r
+these registers are known as "VICVectPriority(x)". */\r
+#define VICVectCntl0   (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x200))\r
+#define VICVectCntl1   (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x204))\r
+#define VICVectCntl2   (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x208))\r
+#define VICVectCntl3   (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x20C))\r
+#define VICVectCntl4   (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x210))\r
+#define VICVectCntl5   (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x214))\r
+#define VICVectCntl6   (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x218))\r
+#define VICVectCntl7   (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x21C))\r
+#define VICVectCntl8   (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x220))\r
+#define VICVectCntl9   (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x224))\r
+#define VICVectCntl10  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x228))\r
+#define VICVectCntl11  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x22C))\r
+#define VICVectCntl12  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x230))\r
+#define VICVectCntl13  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x234))\r
+#define VICVectCntl14  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x238))\r
+#define VICVectCntl15  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x23C))\r
+#define VICVectCntl16  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x240))\r
+#define VICVectCntl17  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x244))\r
+#define VICVectCntl18  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x248))\r
+#define VICVectCntl19  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x24C))\r
+#define VICVectCntl20  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x250))\r
+#define VICVectCntl21  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x254))\r
+#define VICVectCntl22  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x258))\r
+#define VICVectCntl23  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x25C))\r
+#define VICVectCntl24  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x260))\r
+#define VICVectCntl25  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x264))\r
+#define VICVectCntl26  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x268))\r
+#define VICVectCntl27  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x26C))\r
+#define VICVectCntl28  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x270))\r
+#define VICVectCntl29  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x274))\r
+#define VICVectCntl30  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x278))\r
+#define VICVectCntl31  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x27C))\r
+\r
+#define VICVectAddr    (*(volatile unsigned int *)(VIC_BASE_ADDR + 0xF00))\r
+\r
+\r
+/* Pin Connect Block */\r
+#define PINSEL_BASE_ADDR       0xE002C000\r
+#define PINSEL0        (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x00))\r
+#define PINSEL1        (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x04))\r
+#define PINSEL2        (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x08))\r
+#define PINSEL3        (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x0C))\r
+#define PINSEL4        (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x10))\r
+#define PINSEL5        (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x14))\r
+#define PINSEL6        (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x18))\r
+#define PINSEL7        (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x1C))\r
+#define PINSEL8        (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x20))\r
+#define PINSEL9        (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x24))\r
+#define PINSEL10       (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x28))\r
+\r
+#define PINMODE0        (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x40))\r
+#define PINMODE1        (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x44))\r
+#define PINMODE2        (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x48))\r
+#define PINMODE3        (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x4C))\r
+#define PINMODE4        (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x50))\r
+#define PINMODE5        (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x54))\r
+#define PINMODE6        (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x58))\r
+#define PINMODE7        (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x5C))\r
+#define PINMODE8        (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x60))\r
+#define PINMODE9        (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x64))\r
+\r
+/* General Purpose Input/Output (GPIO) */\r
+#define GPIO_BASE_ADDR         0xE0028000\r
+#define IOPIN0         (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x00))\r
+#define IOSET0         (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x04))\r
+#define IODIR0         (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x08))\r
+#define IOCLR0         (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x0C))\r
+#define IOPIN1         (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x10))\r
+#define IOSET1         (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x14))\r
+#define IODIR1         (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x18))\r
+#define IOCLR1         (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x1C))\r
+\r
+/* GPIO Interrupt Registers */\r
+#define IO0_INT_EN_R    (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x90)) \r
+#define IO0_INT_EN_F    (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x94))\r
+#define IO0_INT_STAT_R  (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x84))\r
+#define IO0_INT_STAT_F  (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x88))\r
+#define IO0_INT_CLR     (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x8C))\r
+\r
+#define IO2_INT_EN_R    (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0xB0)) \r
+#define IO2_INT_EN_F    (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0xB4))\r
+#define IO2_INT_STAT_R  (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0xA4))\r
+#define IO2_INT_STAT_F  (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0xA8))\r
+#define IO2_INT_CLR     (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0xAC))\r
+\r
+#define IO_INT_STAT     (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x80))\r
+\r
+#define PARTCFG_BASE_ADDR              0x3FFF8000\r
+#define PARTCFG        (*(volatile unsigned int *)(PARTCFG_BASE_ADDR + 0x00)) \r
+\r
+/* Fast I/O setup */\r
+#define FIO_BASE_ADDR          0x3FFFC000\r
+#define FIO0DIR        (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x00)) \r
+#define FIO0MASK       (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x10))\r
+#define FIO0PIN        (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x14))\r
+#define FIO0SET        (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x18))\r
+#define FIO0CLR        (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x1C))\r
+\r
+#define FIO1DIR        (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x20)) \r
+#define FIO1MASK       (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x30))\r
+#define FIO1PIN        (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x34))\r
+#define FIO1SET        (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x38))\r
+#define FIO1CLR        (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x3C))\r
+\r
+#define FIO2DIR        (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x40)) \r
+#define FIO2MASK       (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x50))\r
+#define FIO2PIN        (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x54))\r
+#define FIO2SET        (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x58))\r
+#define FIO2CLR        (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x5C))\r
+\r
+#define FIO3DIR        (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x60)) \r
+#define FIO3MASK       (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x70))\r
+#define FIO3PIN        (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x74))\r
+#define FIO3SET        (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x78))\r
+#define FIO3CLR        (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x7C))\r
+\r
+#define FIO4DIR        (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x80)) \r
+#define FIO4MASK       (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x90))\r
+#define FIO4PIN        (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x94))\r
+#define FIO4SET        (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x98))\r
+#define FIO4CLR        (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x9C))\r
+\r
+/* FIOs can be accessed through WORD, HALF-WORD or BYTE. */\r
+#define FIO0DIR0       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x01)) \r
+#define FIO1DIR0       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x21)) \r
+#define FIO2DIR0       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x41)) \r
+#define FIO3DIR0       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x61)) \r
+#define FIO4DIR0       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x81)) \r
+\r
+#define FIO0DIR1       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x02)) \r
+#define FIO1DIR1       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x22)) \r
+#define FIO2DIR1       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x42)) \r
+#define FIO3DIR1       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x62)) \r
+#define FIO4DIR1       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x82)) \r
+\r
+#define FIO0DIR2       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x03)) \r
+#define FIO1DIR2       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x23)) \r
+#define FIO2DIR2       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x43)) \r
+#define FIO3DIR2       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x63)) \r
+#define FIO4DIR2       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x83)) \r
+\r
+#define FIO0DIR3       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x04)) \r
+#define FIO1DIR3       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x24)) \r
+#define FIO2DIR3       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x44)) \r
+#define FIO3DIR3       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x64)) \r
+#define FIO4DIR3       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x84)) \r
+\r
+#define FIO0DIRL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x00)) \r
+#define FIO1DIRL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x20)) \r
+#define FIO2DIRL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x40)) \r
+#define FIO3DIRL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x60)) \r
+#define FIO4DIRL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x80)) \r
+\r
+#define FIO0DIRU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x02)) \r
+#define FIO1DIRU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x22)) \r
+#define FIO2DIRU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x42)) \r
+#define FIO3DIRU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x62)) \r
+#define FIO4DIRU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x82)) \r
+\r
+#define FIO0MASK0      (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x10)) \r
+#define FIO1MASK0      (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x30)) \r
+#define FIO2MASK0      (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x50)) \r
+#define FIO3MASK0      (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x70)) \r
+#define FIO4MASK0      (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x90)) \r
+\r
+#define FIO0MASK1      (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x11)) \r
+#define FIO1MASK1      (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x21)) \r
+#define FIO2MASK1      (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x51)) \r
+#define FIO3MASK1      (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x71)) \r
+#define FIO4MASK1      (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x91)) \r
+\r
+#define FIO0MASK2      (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x12)) \r
+#define FIO1MASK2      (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x32)) \r
+#define FIO2MASK2      (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x52)) \r
+#define FIO3MASK2      (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x72)) \r
+#define FIO4MASK2      (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x92)) \r
+\r
+#define FIO0MASK3      (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x13)) \r
+#define FIO1MASK3      (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x33)) \r
+#define FIO2MASK3      (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x53)) \r
+#define FIO3MASK3      (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x73)) \r
+#define FIO4MASK3      (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x93)) \r
+\r
+#define FIO0MASKL      (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x10)) \r
+#define FIO1MASKL      (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x30)) \r
+#define FIO2MASKL      (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x50)) \r
+#define FIO3MASKL      (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x70)) \r
+#define FIO4MASKL      (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x90)) \r
+\r
+#define FIO0MASKU      (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x12)) \r
+#define FIO1MASKU      (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x32)) \r
+#define FIO2MASKU      (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x52)) \r
+#define FIO3MASKU      (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x72)) \r
+#define FIO4MASKU      (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x92)) \r
+\r
+#define FIO0PIN0       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x14)) \r
+#define FIO1PIN0       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x34)) \r
+#define FIO2PIN0       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x54)) \r
+#define FIO3PIN0       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x74)) \r
+#define FIO4PIN0       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x94)) \r
+\r
+#define FIO0PIN1       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x15)) \r
+#define FIO1PIN1       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x25)) \r
+#define FIO2PIN1       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x55)) \r
+#define FIO3PIN1       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x75)) \r
+#define FIO4PIN1       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x95)) \r
+\r
+#define FIO0PIN2       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x16)) \r
+#define FIO1PIN2       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x36)) \r
+#define FIO2PIN2       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x56)) \r
+#define FIO3PIN2       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x76)) \r
+#define FIO4PIN2       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x96)) \r
+\r
+#define FIO0PIN3       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x17)) \r
+#define FIO1PIN3       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x37)) \r
+#define FIO2PIN3       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x57)) \r
+#define FIO3PIN3       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x77)) \r
+#define FIO4PIN3       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x97)) \r
+\r
+#define FIO0PINL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x14)) \r
+#define FIO1PINL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x34)) \r
+#define FIO2PINL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x54)) \r
+#define FIO3PINL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x74)) \r
+#define FIO4PINL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x94)) \r
+\r
+#define FIO0PINU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x16)) \r
+#define FIO1PINU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x36)) \r
+#define FIO2PINU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x56)) \r
+#define FIO3PINU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x76)) \r
+#define FIO4PINU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x96)) \r
+\r
+#define FIO0SET0       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x18)) \r
+#define FIO1SET0       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x38)) \r
+#define FIO2SET0       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x58)) \r
+#define FIO3SET0       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x78)) \r
+#define FIO4SET0       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x98)) \r
+\r
+#define FIO0SET1       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x19)) \r
+#define FIO1SET1       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x29)) \r
+#define FIO2SET1       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x59)) \r
+#define FIO3SET1       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x79)) \r
+#define FIO4SET1       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x99)) \r
+\r
+#define FIO0SET2       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x1A)) \r
+#define FIO1SET2       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x3A)) \r
+#define FIO2SET2       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x5A)) \r
+#define FIO3SET2       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x7A)) \r
+#define FIO4SET2       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x9A)) \r
+\r
+#define FIO0SET3       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x1B)) \r
+#define FIO1SET3       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x3B)) \r
+#define FIO2SET3       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x5B)) \r
+#define FIO3SET3       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x7B)) \r
+#define FIO4SET3       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x9B)) \r
+\r
+#define FIO0SETL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x18)) \r
+#define FIO1SETL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x38)) \r
+#define FIO2SETL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x58)) \r
+#define FIO3SETL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x78)) \r
+#define FIO4SETL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x98)) \r
+\r
+#define FIO0SETU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x1A)) \r
+#define FIO1SETU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x3A)) \r
+#define FIO2SETU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x5A)) \r
+#define FIO3SETU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x7A)) \r
+#define FIO4SETU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x9A)) \r
+\r
+#define FIO0CLR0       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x1C)) \r
+#define FIO1CLR0       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x3C)) \r
+#define FIO2CLR0       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x5C)) \r
+#define FIO3CLR0       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x7C)) \r
+#define FIO4CLR0       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x9C)) \r
+\r
+#define FIO0CLR1       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x1D)) \r
+#define FIO1CLR1       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x2D)) \r
+#define FIO2CLR1       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x5D)) \r
+#define FIO3CLR1       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x7D)) \r
+#define FIO4CLR1       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x9D)) \r
+\r
+#define FIO0CLR2       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x1E)) \r
+#define FIO1CLR2       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x3E)) \r
+#define FIO2CLR2       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x5E)) \r
+#define FIO3CLR2       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x7E)) \r
+#define FIO4CLR2       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x9E)) \r
+\r
+#define FIO0CLR3       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x1F)) \r
+#define FIO1CLR3       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x3F)) \r
+#define FIO2CLR3       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x5F)) \r
+#define FIO3CLR3       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x7F)) \r
+#define FIO4CLR3       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x9F)) \r
+\r
+#define FIO0CLRL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x1C)) \r
+#define FIO1CLRL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x3C)) \r
+#define FIO2CLRL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x5C)) \r
+#define FIO3CLRL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x7C)) \r
+#define FIO4CLRL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x9C)) \r
+\r
+#define FIO0CLRU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x1E)) \r
+#define FIO1CLRU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x3E)) \r
+#define FIO2CLRU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x5E)) \r
+#define FIO3CLRU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x7E)) \r
+#define FIO4CLRU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x9E)) \r
+\r
+\r
+/* System Control Block(SCB) modules include Memory Accelerator Module,\r
+Phase Locked Loop, VPB divider, Power Control, External Interrupt, \r
+Reset, and Code Security/Debugging */\r
+#define SCB_BASE_ADDR  0xE01FC000\r
+\r
+/* Memory Accelerator Module (MAM) */\r
+#define MAMCR          (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x000))\r
+#define MAMTIM         (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x004))\r
+#define MEMMAP         (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x040))\r
+\r
+/* Phase Locked Loop (PLL) */\r
+#define PLLCON         (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x080))\r
+#define PLLCFG         (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x084))\r
+#define PLLSTAT        (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x088))\r
+#define PLLFEED        (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x08C))\r
+\r
+/* Power Control */\r
+#define PCON           (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x0C0))\r
+#define PCONP          (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x0C4))\r
+\r
+/* Clock Divider */\r
+#define APBDIV         (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x100))\r
+#define CCLKCFG        (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x104))\r
+#define USBCLKCFG      (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x108))\r
+#define CLKSRCSEL      (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x10C))\r
+#define PCLKSEL0       (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x1A8))\r
+#define PCLKSEL1       (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x1AC))\r
+       \r
+/* External Interrupts */\r
+#define EXTINT         (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x140))\r
+#define INTWAKE        (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x144))\r
+#define EXTMODE        (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x148))\r
+#define EXTPOLAR       (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x14C))\r
+\r
+/* Reset, reset source identification */\r
+#define RSIR           (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x180))\r
+\r
+/* RSID, code security protection */\r
+#define CSPR           (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x184))\r
+\r
+/* AHB configuration */\r
+#define AHBCFG1        (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x188))\r
+#define AHBCFG2        (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x18C))\r
+\r
+/* System Controls and Status */\r
+#define SCS            (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x1A0))\r
+\r
+/*MPMC(EMC) registers*/\r
+#define STATIC_MEM0_BASE               0x80000000\r
+#define STATIC_MEM1_BASE               0x81000000\r
+#define STATIC_MEM2_BASE               0x82000000\r
+#define STATIC_MEM3_BASE               0x83000000\r
+\r
+#define DYNAMIC_MEM0_BASE              0xA0000000\r
+#define DYNAMIC_MEM1_BASE              0xB0000000\r
+#define DYNAMIC_MEM2_BASE              0xC0000000\r
+#define DYNAMIC_MEM3_BASE              0xD0000000\r
+\r
+/* External Memory Controller (EMC) */\r
+#define EMC_BASE_ADDR          0xFFE08000\r
+#define EMC_CTRL       (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x000))\r
+#define EMC_STAT       (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x004))\r
+#define EMC_CONFIG     (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x008))\r
+\r
+/* Dynamic RAM access registers */\r
+#define EMC_DYN_CTRL     (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x020))\r
+#define EMC_DYN_RFSH     (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x024))\r
+#define EMC_DYN_RD_CFG   (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x028))\r
+#define EMC_DYN_RP       (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x030))\r
+#define EMC_DYN_RAS      (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x034))\r
+#define EMC_DYN_SREX     (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x038))\r
+#define EMC_DYN_APR      (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x03C))\r
+#define EMC_DYN_DAL      (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x040))\r
+#define EMC_DYN_WR       (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x044))\r
+#define EMC_DYN_RC       (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x048))\r
+#define EMC_DYN_RFC      (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x04C))\r
+#define EMC_DYN_XSR      (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x050))\r
+#define EMC_DYN_RRD      (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x054))\r
+#define EMC_DYN_MRD      (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x058))\r
+\r
+#define EMC_DYN_CFG0     (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x100))\r
+#define EMC_DYN_RASCAS0  (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x104))\r
+#define EMC_DYN_CFG1     (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x140))\r
+#define EMC_DYN_RASCAS1  (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x144))\r
+#define EMC_DYN_CFG2     (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x160))\r
+#define EMC_DYN_RASCAS2  (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x164))\r
+#define EMC_DYN_CFG3     (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x180))\r
+#define EMC_DYN_RASCAS3  (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x184))\r
+\r
+/* static RAM access registers */\r
+#define EMC_STA_CFG0      (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x200))\r
+#define EMC_STA_WAITWEN0  (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x204))\r
+#define EMC_STA_WAITOEN0  (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x208))\r
+#define EMC_STA_WAITRD0   (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x20C))\r
+#define EMC_STA_WAITPAGE0 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x210))\r
+#define EMC_STA_WAITWR0   (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x214))\r
+#define EMC_STA_WAITTURN0 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x218))\r
+\r
+#define EMC_STA_CFG1      (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x220))\r
+#define EMC_STA_WAITWEN1  (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x224))\r
+#define EMC_STA_WAITOEN1  (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x228))\r
+#define EMC_STA_WAITRD1   (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x22C))\r
+#define EMC_STA_WAITPAGE1 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x230))\r
+#define EMC_STA_WAITWR1   (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x234))\r
+#define EMC_STA_WAITTURN1 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x238))\r
+\r
+#define EMC_STA_CFG2      (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x240))\r
+#define EMC_STA_WAITWEN2  (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x244))\r
+#define EMC_STA_WAITOEN2  (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x248))\r
+#define EMC_STA_WAITRD2   (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x24C))\r
+#define EMC_STA_WAITPAGE2 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x250))\r
+#define EMC_STA_WAITWR2   (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x254))\r
+#define EMC_STA_WAITTURN2 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x258))\r
+\r
+#define EMC_STA_CFG3      (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x260))\r
+#define EMC_STA_WAITWEN3  (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x264))\r
+#define EMC_STA_WAITOEN3  (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x268))\r
+#define EMC_STA_WAITRD3   (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x26C))\r
+#define EMC_STA_WAITPAGE3 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x270))\r
+#define EMC_STA_WAITWR3   (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x274))\r
+#define EMC_STA_WAITTURN3 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x278))\r
+\r
+#define EMC_STA_EXT_WAIT  (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x880))\r
+\r
+       \r
+/* Timer 0 */\r
+#define TMR0_BASE_ADDR         0xE0004000\r
+#define T0IR           (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x00))\r
+#define T0TCR          (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x04))\r
+#define T0TC           (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x08))\r
+#define T0PR           (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x0C))\r
+#define T0PC           (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x10))\r
+#define T0MCR          (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x14))\r
+#define T0MR0          (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x18))\r
+#define T0MR1          (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x1C))\r
+#define T0MR2          (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x20))\r
+#define T0MR3          (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x24))\r
+#define T0CCR          (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x28))\r
+#define T0CR0          (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x2C))\r
+#define T0CR1          (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x30))\r
+#define T0CR2          (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x34))\r
+#define T0CR3          (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x38))\r
+#define T0EMR          (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x3C))\r
+#define T0CTCR         (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x70))\r
+\r
+/* Timer 1 */\r
+#define TMR1_BASE_ADDR         0xE0008000\r
+#define T1IR           (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x00))\r
+#define T1TCR          (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x04))\r
+#define T1TC           (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x08))\r
+#define T1PR           (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x0C))\r
+#define T1PC           (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x10))\r
+#define T1MCR          (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x14))\r
+#define T1MR0          (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x18))\r
+#define T1MR1          (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x1C))\r
+#define T1MR2          (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x20))\r
+#define T1MR3          (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x24))\r
+#define T1CCR          (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x28))\r
+#define T1CR0          (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x2C))\r
+#define T1CR1          (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x30))\r
+#define T1CR2          (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x34))\r
+#define T1CR3          (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x38))\r
+#define T1EMR          (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x3C))\r
+#define T1CTCR         (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x70))\r
+\r
+/* Timer 2 */\r
+#define TMR2_BASE_ADDR         0xE0070000\r
+#define T2IR           (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x00))\r
+#define T2TCR          (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x04))\r
+#define T2TC           (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x08))\r
+#define T2PR           (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x0C))\r
+#define T2PC           (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x10))\r
+#define T2MCR          (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x14))\r
+#define T2MR0          (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x18))\r
+#define T2MR1          (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x1C))\r
+#define T2MR2          (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x20))\r
+#define T2MR3          (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x24))\r
+#define T2CCR          (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x28))\r
+#define T2CR0          (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x2C))\r
+#define T2CR1          (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x30))\r
+#define T2CR2          (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x34))\r
+#define T2CR3          (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x38))\r
+#define T2EMR          (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x3C))\r
+#define T2CTCR         (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x70))\r
+\r
+/* Timer 3 */\r
+#define TMR3_BASE_ADDR         0xE0074000\r
+#define T3IR           (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x00))\r
+#define T3TCR          (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x04))\r
+#define T3TC           (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x08))\r
+#define T3PR           (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x0C))\r
+#define T3PC           (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x10))\r
+#define T3MCR          (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x14))\r
+#define T3MR0          (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x18))\r
+#define T3MR1          (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x1C))\r
+#define T3MR2          (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x20))\r
+#define T3MR3          (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x24))\r
+#define T3CCR          (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x28))\r
+#define T3CR0          (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x2C))\r
+#define T3CR1          (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x30))\r
+#define T3CR2          (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x34))\r
+#define T3CR3          (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x38))\r
+#define T3EMR          (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x3C))\r
+#define T3CTCR         (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x70))\r
+\r
+\r
+/* Pulse Width Modulator (PWM) */\r
+#define PWM0_BASE_ADDR         0xE0014000\r
+#define PWM0IR          (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x00))\r
+#define PWM0TCR         (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x04))\r
+#define PWM0TC          (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x08))\r
+#define PWM0PR          (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x0C))\r
+#define PWM0PC          (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x10))\r
+#define PWM0MCR         (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x14))\r
+#define PWM0MR0         (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x18))\r
+#define PWM0MR1         (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x1C))\r
+#define PWM0MR2         (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x20))\r
+#define PWM0MR3         (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x24))\r
+#define PWM0CCR         (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x28))\r
+#define PWM0CR0         (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x2C))\r
+#define PWM0CR1         (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x30))\r
+#define PWM0CR2         (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x34))\r
+#define PWM0CR3         (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x38))\r
+#define PWM0EMR         (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x3C))\r
+#define PWM0MR4         (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x40))\r
+#define PWM0MR5         (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x44))\r
+#define PWM0MR6         (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x48))\r
+#define PWM0PCR         (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x4C))\r
+#define PWM0LER         (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x50))\r
+#define PWM0CTCR        (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x70))\r
+\r
+#define PWM1_BASE_ADDR         0xE0018000\r
+#define PWM1IR          (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x00))\r
+#define PWM1TCR         (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x04))\r
+#define PWM1TC          (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x08))\r
+#define PWM1PR          (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x0C))\r
+#define PWM1PC          (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x10))\r
+#define PWM1MCR         (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x14))\r
+#define PWM1MR0         (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x18))\r
+#define PWM1MR1         (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x1C))\r
+#define PWM1MR2         (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x20))\r
+#define PWM1MR3         (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x24))\r
+#define PWM1CCR         (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x28))\r
+#define PWM1CR0         (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x2C))\r
+#define PWM1CR1         (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x30))\r
+#define PWM1CR2         (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x34))\r
+#define PWM1CR3         (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x38))\r
+#define PWM1EMR         (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x3C))\r
+#define PWM1MR4         (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x40))\r
+#define PWM1MR5         (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x44))\r
+#define PWM1MR6         (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x48))\r
+#define PWM1PCR         (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x4C))\r
+#define PWM1LER         (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x50))\r
+#define PWM1CTCR        (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x70))\r
+\r
+\r
+/* Universal Asynchronous Receiver Transmitter 0 (UART0) */\r
+#define UART0_BASE_ADDR                0xE000C000\r
+#define U0RBR          (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x00))\r
+#define U0THR          (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x00))\r
+#define U0DLL          (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x00))\r
+#define U0DLM          (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x04))\r
+#define U0IER          (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x04))\r
+#define U0IIR          (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x08))\r
+#define U0FCR          (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x08))\r
+#define U0LCR          (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x0C))\r
+#define U0LSR          (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x14))\r
+#define U0SCR          (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x1C))\r
+#define U0ACR          (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x20))\r
+#define U0ICR          (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x24))\r
+#define U0FDR          (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x28))\r
+#define U0TER          (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x30))\r
+\r
+/* Universal Asynchronous Receiver Transmitter 1 (UART1) */\r
+#define UART1_BASE_ADDR                0xE0010000\r
+#define U1RBR          (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x00))\r
+#define U1THR          (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x00))\r
+#define U1DLL          (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x00))\r
+#define U1DLM          (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x04))\r
+#define U1IER          (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x04))\r
+#define U1IIR          (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x08))\r
+#define U1FCR          (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x08))\r
+#define U1LCR          (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x0C))\r
+#define U1MCR          (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x10))\r
+#define U1LSR          (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x14))\r
+#define U1MSR          (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x18))\r
+#define U1SCR          (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x1C))\r
+#define U1ACR          (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x20))\r
+#define U1FDR          (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x28))\r
+#define U1TER          (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x30))\r
+\r
+/* Universal Asynchronous Receiver Transmitter 2 (UART2) */\r
+#define UART2_BASE_ADDR                0xE0078000\r
+#define U2RBR          (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x00))\r
+#define U2THR          (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x00))\r
+#define U2DLL          (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x00))\r
+#define U2DLM          (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x04))\r
+#define U2IER          (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x04))\r
+#define U2IIR          (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x08))\r
+#define U2FCR          (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x08))\r
+#define U2LCR          (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x0C))\r
+#define U2LSR          (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x14))\r
+#define U2SCR          (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x1C))\r
+#define U2ACR          (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x20))\r
+#define U2ICR          (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x24))\r
+#define U2FDR          (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x28))\r
+#define U2TER          (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x30))\r
+\r
+/* Universal Asynchronous Receiver Transmitter 3 (UART3) */\r
+#define UART3_BASE_ADDR                0xE007C000\r
+#define U3RBR          (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x00))\r
+#define U3THR          (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x00))\r
+#define U3DLL          (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x00))\r
+#define U3DLM          (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x04))\r
+#define U3IER          (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x04))\r
+#define U3IIR          (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x08))\r
+#define U3FCR          (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x08))\r
+#define U3LCR          (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x0C))\r
+#define U3LSR          (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x14))\r
+#define U3SCR          (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x1C))\r
+#define U3ACR          (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x20))\r
+#define U3ICR          (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x24))\r
+#define U3FDR          (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x28))\r
+#define U3TER          (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x30))\r
+\r
+/* I2C Interface 0 */\r
+#define I2C0_BASE_ADDR         0xE001C000\r
+#define I20CONSET      (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x00))\r
+#define I20STAT        (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x04))\r
+#define I20DAT         (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x08))\r
+#define I20ADR         (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x0C))\r
+#define I20SCLH        (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x10))\r
+#define I20SCLL        (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x14))\r
+#define I20CONCLR      (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x18))\r
+//Slightly different naming\r
+#define I2C0CONSET      (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x00))\r
+#define I2C0STAT        (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x04))\r
+#define I2C0DAT         (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x08))\r
+#define I2C0ADR         (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x0C))\r
+#define I2C0SCLH        (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x10))\r
+#define I2C0SCLL        (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x14))\r
+#define I2C0CONCLR      (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x18))\r
+\r
+\r
+/* I2C Interface 1 */\r
+#define I2C1_BASE_ADDR         0xE005C000\r
+#define I21CONSET      (*(volatile unsigned int *)(I2C1_BASE_ADDR + 0x00))\r
+#define I21STAT        (*(volatile unsigned int *)(I2C1_BASE_ADDR + 0x04))\r
+#define I21DAT         (*(volatile unsigned int *)(I2C1_BASE_ADDR + 0x08))\r
+#define I21ADR         (*(volatile unsigned int *)(I2C1_BASE_ADDR + 0x0C))\r
+#define I21SCLH        (*(volatile unsigned int *)(I2C1_BASE_ADDR + 0x10))\r
+#define I21SCLL        (*(volatile unsigned int *)(I2C1_BASE_ADDR + 0x14))\r
+#define I21CONCLR      (*(volatile unsigned int *)(I2C1_BASE_ADDR + 0x18))\r
+\r
+/* I2C Interface 2 */\r
+#define I2C2_BASE_ADDR         0xE0080000\r
+#define I22CONSET      (*(volatile unsigned int *)(I2C2_BASE_ADDR + 0x00))\r
+#define I22STAT        (*(volatile unsigned int *)(I2C2_BASE_ADDR + 0x04))\r
+#define I22DAT         (*(volatile unsigned int *)(I2C2_BASE_ADDR + 0x08))\r
+#define I22ADR         (*(volatile unsigned int *)(I2C2_BASE_ADDR + 0x0C))\r
+#define I22SCLH        (*(volatile unsigned int *)(I2C2_BASE_ADDR + 0x10))\r
+#define I22SCLL        (*(volatile unsigned int *)(I2C2_BASE_ADDR + 0x14))\r
+#define I22CONCLR      (*(volatile unsigned int *)(I2C2_BASE_ADDR + 0x18))\r
+\r
+/* SPI0 (Serial Peripheral Interface 0) */\r
+#define SPI0_BASE_ADDR         0xE0020000\r
+#define S0SPCR         (*(volatile unsigned int *)(SPI0_BASE_ADDR + 0x00))\r
+#define S0SPSR         (*(volatile unsigned int *)(SPI0_BASE_ADDR + 0x04))\r
+#define S0SPDR         (*(volatile unsigned int *)(SPI0_BASE_ADDR + 0x08))\r
+#define S0SPCCR        (*(volatile unsigned int *)(SPI0_BASE_ADDR + 0x0C))\r
+#define S0SPINT        (*(volatile unsigned int *)(SPI0_BASE_ADDR + 0x1C))\r
+\r
+/* SSP0 Controller */\r
+#define SSP0_BASE_ADDR         0xE0068000\r
+#define SSP0CR0        (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x00))\r
+#define SSP0CR1        (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x04))\r
+#define SSP0DR         (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x08))\r
+#define SSP0SR         (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x0C))\r
+#define SSP0CPSR       (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x10))\r
+#define SSP0IMSC       (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x14))\r
+#define SSP0RIS        (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x18))\r
+#define SSP0MIS        (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x1C))\r
+#define SSP0ICR        (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x20))\r
+#define SSP0DMACR      (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x24))\r
+\r
+/* SSP1 Controller */\r
+#define SSP1_BASE_ADDR         0xE0030000\r
+#define SSP1CR0        (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x00))\r
+#define SSP1CR1        (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x04))\r
+#define SSP1DR         (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x08))\r
+#define SSP1SR         (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x0C))\r
+#define SSP1CPSR       (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x10))\r
+#define SSP1IMSC       (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x14))\r
+#define SSP1RIS        (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x18))\r
+#define SSP1MIS        (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x1C))\r
+#define SSP1ICR        (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x20))\r
+#define SSP1DMACR      (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x24))\r
+\r
+\r
+/* Real Time Clock */\r
+#define RTC_BASE_ADDR          0xE0024000\r
+#define RTC_ILR         (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x00))\r
+#define RTC_CTC         (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x04))\r
+#define RTC_CCR         (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x08))\r
+#define RTC_CIIR        (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x0C))\r
+#define RTC_AMR         (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x10))\r
+#define RTC_CTIME0      (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x14))\r
+#define RTC_CTIME1      (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x18))\r
+#define RTC_CTIME2      (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x1C))\r
+#define RTC_SEC         (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x20))\r
+#define RTC_MIN         (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x24))\r
+#define RTC_HOUR        (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x28))\r
+#define RTC_DOM         (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x2C))\r
+#define RTC_DOW         (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x30))\r
+#define RTC_DOY         (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x34))\r
+#define RTC_MONTH       (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x38))\r
+#define RTC_YEAR        (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x3C))\r
+#define RTC_CISS        (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x40))\r
+#define RTC_ALSEC       (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x60))\r
+#define RTC_ALMIN       (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x64))\r
+#define RTC_ALHOUR      (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x68))\r
+#define RTC_ALDOM       (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x6C))\r
+#define RTC_ALDOW       (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x70))\r
+#define RTC_ALDOY       (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x74))\r
+#define RTC_ALMON       (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x78))\r
+#define RTC_ALYEAR      (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x7C))\r
+#define RTC_PREINT      (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x80))\r
+#define RTC_PREFRAC     (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x84))\r
+\r
+\r
+/* A/D Converter 0 (AD0) */\r
+#define AD0_BASE_ADDR          0xE0034000\r
+#define AD0CR          (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x00))\r
+#define AD0GDR         (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x04))\r
+#define AD0INTEN       (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x0C))\r
+#define AD0DR0         (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x10))\r
+#define AD0DR1         (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x14))\r
+#define AD0DR2         (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x18))\r
+#define AD0DR3         (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x1C))\r
+#define AD0DR4         (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x20))\r
+#define AD0DR5         (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x24))\r
+#define AD0DR6         (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x28))\r
+#define AD0DR7         (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x2C))\r
+#define AD0STAT        (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x30))\r
+\r
+\r
+/* D/A Converter */\r
+#define DAC_BASE_ADDR          0xE006C000\r
+#define DACR           (*(volatile unsigned int *)(DAC_BASE_ADDR + 0x00))\r
+\r
+\r
+/* Watchdog */\r
+#define WDG_BASE_ADDR          0xE0000000\r
+#define WDMOD          (*(volatile unsigned int *)(WDG_BASE_ADDR + 0x00))\r
+#define WDTC           (*(volatile unsigned int *)(WDG_BASE_ADDR + 0x04))\r
+#define WDFEED         (*(volatile unsigned int *)(WDG_BASE_ADDR + 0x08))\r
+#define WDTV           (*(volatile unsigned int *)(WDG_BASE_ADDR + 0x0C))\r
+#define WDCLKSEL       (*(volatile unsigned int *)(WDG_BASE_ADDR + 0x10))\r
+\r
+/* CAN CONTROLLERS AND ACCEPTANCE FILTER */\r
+#define CAN_ACCEPT_BASE_ADDR           0xE003C000\r
+#define CAN_AFMR               (*(volatile unsigned int *)(CAN_ACCEPT_BASE_ADDR + 0x00))       \r
+#define CAN_SFF_SA             (*(volatile unsigned int *)(CAN_ACCEPT_BASE_ADDR + 0x04))       \r
+#define CAN_SFF_GRP_SA         (*(volatile unsigned int *)(CAN_ACCEPT_BASE_ADDR + 0x08))\r
+#define CAN_EFF_SA             (*(volatile unsigned int *)(CAN_ACCEPT_BASE_ADDR + 0x0C))\r
+#define CAN_EFF_GRP_SA         (*(volatile unsigned int *)(CAN_ACCEPT_BASE_ADDR + 0x10))       \r
+#define CAN_EOT                (*(volatile unsigned int *)(CAN_ACCEPT_BASE_ADDR + 0x14))\r
+#define CAN_LUT_ERR_ADR (*(volatile unsigned int *)(CAN_ACCEPT_BASE_ADDR + 0x18))      \r
+#define CAN_LUT_ERR    (*(volatile unsigned int *)(CAN_ACCEPT_BASE_ADDR + 0x1C))\r
+\r
+#define CAN_CENTRAL_BASE_ADDR          0xE0040000      \r
+#define CAN_TX_SR      (*(volatile unsigned int *)(CAN_CENTRAL_BASE_ADDR + 0x00))      \r
+#define CAN_RX_SR      (*(volatile unsigned int *)(CAN_CENTRAL_BASE_ADDR + 0x04))      \r
+#define CAN_MSR        (*(volatile unsigned int *)(CAN_CENTRAL_BASE_ADDR + 0x08))\r
+\r
+#define CAN1_BASE_ADDR         0xE0044000\r
+#define CAN1MOD        (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x00))     \r
+#define CAN1CMR        (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x04))     \r
+#define CAN1GSR        (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x08))     \r
+#define CAN1ICR        (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x0C))     \r
+#define CAN1IER        (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x10))\r
+#define CAN1BTR        (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x14))     \r
+#define CAN1EWL        (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x18))     \r
+#define CAN1SR                 (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x1C))     \r
+#define CAN1RFS        (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x20))     \r
+#define CAN1RID        (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x24))\r
+#define CAN1RDA        (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x28))     \r
+#define CAN1RDB        (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x2C))\r
+       \r
+#define CAN1TFI1       (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x30))     \r
+#define CAN1TID1       (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x34))     \r
+#define CAN1TDA1       (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x38))\r
+#define CAN1TDB1       (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x3C))     \r
+#define CAN1TFI2       (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x40))     \r
+#define CAN1TID2       (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x44))     \r
+#define CAN1TDA2       (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x48))     \r
+#define CAN1TDB2       (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x4C))\r
+#define CAN1TFI3       (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x50))     \r
+#define CAN1TID3       (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x54))     \r
+#define CAN1TDA3       (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x58))     \r
+#define CAN1TDB3       (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x5C))\r
+\r
+#define CAN2_BASE_ADDR         0xE0048000\r
+#define CAN2MOD        (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x00))     \r
+#define CAN2CMR        (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x04))     \r
+#define CAN2GSR        (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x08))     \r
+#define CAN2ICR        (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x0C))     \r
+#define CAN2IER        (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x10))\r
+#define CAN2BTR        (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x14))     \r
+#define CAN2EWL        (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x18))     \r
+#define CAN2SR                 (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x1C))     \r
+#define CAN2RFS        (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x20))     \r
+#define CAN2RID        (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x24))\r
+#define CAN2RDA        (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x28))     \r
+#define CAN2RDB        (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x2C))\r
+       \r
+#define CAN2TFI1       (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x30))     \r
+#define CAN2TID1       (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x34))     \r
+#define CAN2TDA1       (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x38))\r
+#define CAN2TDB1       (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x3C))     \r
+#define CAN2TFI2       (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x40))     \r
+#define CAN2TID2       (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x44))     \r
+#define CAN2TDA2       (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x48))     \r
+#define CAN2TDB2       (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x4C))\r
+#define CAN2TFI3       (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x50))     \r
+#define CAN2TID3       (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x54))     \r
+#define CAN2TDA3       (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x58))     \r
+#define CAN2TDB3       (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x5C))\r
+\r
+\r
+/* MultiMedia Card Interface(MCI) Controller */\r
+#define MCI_BASE_ADDR          0xE008C000\r
+#define MCI_POWER      (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x00))\r
+#define MCI_CLOCK      (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x04))\r
+#define MCI_ARGUMENT   (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x08))\r
+#define MCI_COMMAND    (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x0C))\r
+#define MCI_RESP_CMD   (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x10))\r
+#define MCI_RESP0      (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x14))\r
+#define MCI_RESP1      (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x18))\r
+#define MCI_RESP2      (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x1C))\r
+#define MCI_RESP3      (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x20))\r
+#define MCI_DATA_TMR   (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x24))\r
+#define MCI_DATA_LEN   (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x28))\r
+#define MCI_DATA_CTRL  (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x2C))\r
+#define MCI_DATA_CNT   (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x30))\r
+#define MCI_STATUS     (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x34))\r
+#define MCI_CLEAR      (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x38))\r
+#define MCI_MASK0      (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x3C))\r
+#define MCI_MASK1      (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x40))\r
+#define MCI_FIFO_CNT   (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x48))\r
+#define MCI_FIFO       (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x80))\r
+\r
+\r
+/* I2S Interface Controller (I2S) */\r
+#define I2S_BASE_ADDR          0xE0088000\r
+#define I2S_DAO        (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x00))\r
+#define I2S_DAI        (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x04))\r
+#define I2S_TX_FIFO    (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x08))\r
+#define I2S_RX_FIFO    (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x0C))\r
+#define I2S_STATE      (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x10))\r
+#define I2S_DMA1       (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x14))\r
+#define I2S_DMA2       (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x18))\r
+#define I2S_IRQ        (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x1C))\r
+#define I2S_TXRATE     (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x20))\r
+#define I2S_RXRATE     (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x24))\r
+\r
+\r
+/* General-purpose DMA Controller */\r
+#define DMA_BASE_ADDR          0xFFE04000\r
+#define GPDMA_INT_STAT         (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x000))\r
+#define GPDMA_INT_TCSTAT       (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x004))\r
+#define GPDMA_INT_TCCLR        (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x008))\r
+#define GPDMA_INT_ERR_STAT     (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x00C))\r
+#define GPDMA_INT_ERR_CLR      (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x010))\r
+#define GPDMA_RAW_INT_TCSTAT   (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x014))\r
+#define GPDMA_RAW_INT_ERR_STAT (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x018))\r
+#define GPDMA_ENABLED_CHNS     (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x01C))\r
+#define GPDMA_SOFT_BREQ        (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x020))\r
+#define GPDMA_SOFT_SREQ        (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x024))\r
+#define GPDMA_SOFT_LBREQ       (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x028))\r
+#define GPDMA_SOFT_LSREQ       (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x02C))\r
+#define GPDMA_CONFIG           (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x030))\r
+#define GPDMA_SYNC             (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x034))\r
+\r
+/* DMA channel 0 registers */\r
+#define GPDMA_CH0_SRC      (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x100))\r
+#define GPDMA_CH0_DEST     (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x104))\r
+#define GPDMA_CH0_LLI      (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x108))\r
+#define GPDMA_CH0_CTRL     (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x10C))\r
+#define GPDMA_CH0_CFG      (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x110))\r
+\r
+/* DMA channel 1 registers */\r
+#define GPDMA_CH1_SRC      (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x120))\r
+#define GPDMA_CH1_DEST     (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x124))\r
+#define GPDMA_CH1_LLI      (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x128))\r
+#define GPDMA_CH1_CTRL     (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x12C))\r
+#define GPDMA_CH1_CFG      (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x130))\r
+\r
+\r
+/* USB Controller */\r
+#define USB_INT_BASE_ADDR      0xE01FC1C0\r
+#define USB_BASE_ADDR          0xFFE0C200              /* USB Base Address */\r
+\r
+#define USB_INT_STAT    (*(volatile unsigned int *)(USB_INT_BASE_ADDR + 0x00))\r
+\r
+/* USB Device Interrupt Registers */\r
+#define DEV_INT_STAT    (*(volatile unsigned int *)(USB_BASE_ADDR + 0x00))\r
+#define DEV_INT_EN      (*(volatile unsigned int *)(USB_BASE_ADDR + 0x04))\r
+#define DEV_INT_CLR     (*(volatile unsigned int *)(USB_BASE_ADDR + 0x08))\r
+#define DEV_INT_SET     (*(volatile unsigned int *)(USB_BASE_ADDR + 0x0C))\r
+#define DEV_INT_PRIO    (*(volatile unsigned int *)(USB_BASE_ADDR + 0x2C))\r
+\r
+/* USB Device Endpoint Interrupt Registers */\r
+#define EP_INT_STAT     (*(volatile unsigned int *)(USB_BASE_ADDR + 0x30))\r
+#define EP_INT_EN       (*(volatile unsigned int *)(USB_BASE_ADDR + 0x34))\r
+#define EP_INT_CLR      (*(volatile unsigned int *)(USB_BASE_ADDR + 0x38))\r
+#define EP_INT_SET      (*(volatile unsigned int *)(USB_BASE_ADDR + 0x3C))\r
+#define EP_INT_PRIO     (*(volatile unsigned int *)(USB_BASE_ADDR + 0x40))\r
+\r
+/* USB Device Endpoint Realization Registers */\r
+#define REALIZE_EP      (*(volatile unsigned int *)(USB_BASE_ADDR + 0x44))\r
+#define EP_INDEX        (*(volatile unsigned int *)(USB_BASE_ADDR + 0x48))\r
+#define MAXPACKET_SIZE  (*(volatile unsigned int *)(USB_BASE_ADDR + 0x4C))\r
+\r
+/* USB Device Command Reagisters */\r
+#define CMD_CODE        (*(volatile unsigned int *)(USB_BASE_ADDR + 0x10))\r
+#define CMD_DATA        (*(volatile unsigned int *)(USB_BASE_ADDR + 0x14))\r
+\r
+/* USB Device Data Transfer Registers */\r
+#define RX_DATA         (*(volatile unsigned int *)(USB_BASE_ADDR + 0x18))\r
+#define TX_DATA         (*(volatile unsigned int *)(USB_BASE_ADDR + 0x1C))\r
+#define RX_PLENGTH      (*(volatile unsigned int *)(USB_BASE_ADDR + 0x20))\r
+#define TX_PLENGTH      (*(volatile unsigned int *)(USB_BASE_ADDR + 0x24))\r
+#define USB_CTRL        (*(volatile unsigned int *)(USB_BASE_ADDR + 0x28))\r
+\r
+/* USB Device DMA Registers */\r
+#define DMA_REQ_STAT        (*(volatile unsigned int *)(USB_BASE_ADDR + 0x50))\r
+#define DMA_REQ_CLR         (*(volatile unsigned int *)(USB_BASE_ADDR + 0x54))\r
+#define DMA_REQ_SET         (*(volatile unsigned int *)(USB_BASE_ADDR + 0x58))\r
+#define UDCA_HEAD           (*(volatile unsigned int *)(USB_BASE_ADDR + 0x80))\r
+#define EP_DMA_STAT         (*(volatile unsigned int *)(USB_BASE_ADDR + 0x84))\r
+#define EP_DMA_EN           (*(volatile unsigned int *)(USB_BASE_ADDR + 0x88))\r
+#define EP_DMA_DIS          (*(volatile unsigned int *)(USB_BASE_ADDR + 0x8C))\r
+#define DMA_INT_STAT        (*(volatile unsigned int *)(USB_BASE_ADDR + 0x90))\r
+#define DMA_INT_EN          (*(volatile unsigned int *)(USB_BASE_ADDR + 0x94))\r
+#define EOT_INT_STAT        (*(volatile unsigned int *)(USB_BASE_ADDR + 0xA0))\r
+#define EOT_INT_CLR         (*(volatile unsigned int *)(USB_BASE_ADDR + 0xA4))\r
+#define EOT_INT_SET         (*(volatile unsigned int *)(USB_BASE_ADDR + 0xA8))\r
+#define NDD_REQ_INT_STAT    (*(volatile unsigned int *)(USB_BASE_ADDR + 0xAC))\r
+#define NDD_REQ_INT_CLR     (*(volatile unsigned int *)(USB_BASE_ADDR + 0xB0))\r
+#define NDD_REQ_INT_SET     (*(volatile unsigned int *)(USB_BASE_ADDR + 0xB4))\r
+#define SYS_ERR_INT_STAT    (*(volatile unsigned int *)(USB_BASE_ADDR + 0xB8))\r
+#define SYS_ERR_INT_CLR     (*(volatile unsigned int *)(USB_BASE_ADDR + 0xBC))\r
+#define SYS_ERR_INT_SET     (*(volatile unsigned int *)(USB_BASE_ADDR + 0xC0))\r
+\r
+\r
+/* USB Host Controller */\r
+#define USBHC_BASE_ADDR                0xFFE0C000\r
+#define HC_REVISION         (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x00))\r
+#define HC_CONTROL          (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x04))\r
+#define HC_CMD_STAT         (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x08))\r
+#define HC_INT_STAT         (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x0C))\r
+#define HC_INT_EN           (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x10))\r
+#define HC_INT_DIS          (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x14))\r
+#define HC_HCCA             (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x18))\r
+#define HC_PERIOD_CUR_ED    (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x1C))\r
+#define HC_CTRL_HEAD_ED     (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x20))\r
+#define HC_CTRL_CUR_ED      (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x24))\r
+#define HC_BULK_HEAD_ED     (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x28))\r
+#define HC_BULK_CUR_ED      (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x2C))\r
+#define HC_DONE_HEAD        (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x30))\r
+#define HC_FM_INTERVAL      (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x34))\r
+#define HC_FM_REMAINING     (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x38))\r
+#define HC_FM_NUMBER        (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x3C))\r
+#define HC_PERIOD_START     (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x40))\r
+#define HC_LS_THRHLD        (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x44))\r
+#define HC_RH_DESCA         (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x48))\r
+#define HC_RH_DESCB         (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x4C))\r
+#define HC_RH_STAT          (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x50))\r
+#define HC_RH_PORT_STAT1    (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x54))\r
+#define HC_RH_PORT_STAT2    (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x58))\r
+\r
+/* USB OTG Controller */\r
+#define USBOTG_BASE_ADDR       0xFFE0C100\r
+#define OTG_INT_STAT        (*(volatile unsigned int *)(USBOTG_BASE_ADDR + 0x00))\r
+#define OTG_INT_EN          (*(volatile unsigned int *)(USBOTG_BASE_ADDR + 0x04))\r
+#define OTG_INT_SET         (*(volatile unsigned int *)(USBOTG_BASE_ADDR + 0x08))\r
+#define OTG_INT_CLR         (*(volatile unsigned int *)(USBOTG_BASE_ADDR + 0x0C))\r
+#define OTG_STAT_CTRL       (*(volatile unsigned int *)(USBOTG_BASE_ADDR + 0x10))\r
+#define OTG_TIMER           (*(volatile unsigned int *)(USBOTG_BASE_ADDR + 0x14))\r
+\r
+#define USBOTG_I2C_BASE_ADDR   0xFFE0C300\r
+#define OTG_I2C_RX          (*(volatile unsigned int *)(USBOTG_I2C_BASE_ADDR + 0x00))\r
+#define OTG_I2C_TX          (*(volatile unsigned int *)(USBOTG_I2C_BASE_ADDR + 0x00))\r
+#define OTG_I2C_STS         (*(volatile unsigned int *)(USBOTG_I2C_BASE_ADDR + 0x04))\r
+#define OTG_I2C_CTL         (*(volatile unsigned int *)(USBOTG_I2C_BASE_ADDR + 0x08))\r
+#define OTG_I2C_CLKHI       (*(volatile unsigned int *)(USBOTG_I2C_BASE_ADDR + 0x0C))\r
+#define OTG_I2C_CLKLO       (*(volatile unsigned int *)(USBOTG_I2C_BASE_ADDR + 0x10))\r
+\r
+#define USBOTG_CLK_BASE_ADDR   0xFFE0CFF0\r
+#define OTG_CLK_CTRL        (*(volatile unsigned int *)(USBOTG_CLK_BASE_ADDR + 0x04))\r
+#define OTG_CLK_STAT        (*(volatile unsigned int *)(USBOTG_CLK_BASE_ADDR + 0x08))\r
+\r
+\r
+/* Ethernet MAC (32 bit data bus) -- all registers are RW unless indicated in parentheses */\r
+#define MAC_BASE_ADDR          0xFFE00000 /* AHB Peripheral # 0 */\r
+#define MAC_MAC1            (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x000)) /* MAC config reg 1 */\r
+#define MAC_MAC2            (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x004)) /* MAC config reg 2 */\r
+#define MAC_IPGT            (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x008)) /* b2b InterPacketGap reg */\r
+#define MAC_IPGR            (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x00C)) /* non b2b InterPacketGap reg */\r
+#define MAC_CLRT            (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x010)) /* CoLlision window/ReTry reg */\r
+#define MAC_MAXF            (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x014)) /* MAXimum Frame reg */\r
+#define MAC_SUPP            (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x018)) /* PHY SUPPort reg */\r
+#define MAC_TEST            (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x01C)) /* TEST reg */\r
+#define MAC_MCFG            (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x020)) /* MII Mgmt ConFiG reg */\r
+#define MAC_MCMD            (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x024)) /* MII Mgmt CoMmanD reg */\r
+#define MAC_MADR            (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x028)) /* MII Mgmt ADdRess reg */\r
+#define MAC_MWTD            (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x02C)) /* MII Mgmt WriTe Data reg (WO) */\r
+#define MAC_MRDD            (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x030)) /* MII Mgmt ReaD Data reg (RO) */\r
+#define MAC_MIND            (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x034)) /* MII Mgmt INDicators reg (RO) */\r
+\r
+#define MAC_SA0             (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x040)) /* Station Address 0 reg */\r
+#define MAC_SA1             (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x044)) /* Station Address 1 reg */\r
+#define MAC_SA2             (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x048)) /* Station Address 2 reg */\r
+\r
+#define MAC_COMMAND         (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x100)) /* Command reg */\r
+#define MAC_STATUS          (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x104)) /* Status reg (RO) */\r
+#define MAC_RXDESCRIPTOR    (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x108)) /* Rx descriptor base address reg */\r
+#define MAC_RXSTATUS        (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x10C)) /* Rx status base address reg */\r
+#define MAC_RXDESCRIPTORNUM (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x110)) /* Rx number of descriptors reg */\r
+#define MAC_RXPRODUCEINDEX  (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x114)) /* Rx produce index reg (RO) */\r
+#define MAC_RXCONSUMEINDEX  (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x118)) /* Rx consume index reg */\r
+#define MAC_TXDESCRIPTOR    (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x11C)) /* Tx descriptor base address reg */\r
+#define MAC_TXSTATUS        (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x120)) /* Tx status base address reg */\r
+#define MAC_TXDESCRIPTORNUM (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x124)) /* Tx number of descriptors reg */\r
+#define MAC_TXPRODUCEINDEX  (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x128)) /* Tx produce index reg */\r
+#define MAC_TXCONSUMEINDEX  (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x12C)) /* Tx consume index reg (RO) */\r
+\r
+#define MAC_TSV0            (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x158)) /* Tx status vector 0 reg (RO) */\r
+#define MAC_TSV1            (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x15C)) /* Tx status vector 1 reg (RO) */\r
+#define MAC_RSV             (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x160)) /* Rx status vector reg (RO) */\r
+\r
+#define MAC_FLOWCONTROLCNT  (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x170)) /* Flow control counter reg */\r
+#define MAC_FLOWCONTROLSTS  (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x174)) /* Flow control status reg */\r
+\r
+#define MAC_RXFILTERCTRL    (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x200)) /* Rx filter ctrl reg */\r
+#define MAC_RXFILTERWOLSTS  (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x204)) /* Rx filter WoL status reg (RO) */\r
+#define MAC_RXFILTERWOLCLR  (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x208)) /* Rx filter WoL clear reg (WO) */\r
+\r
+#define MAC_HASHFILTERL     (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x210)) /* Hash filter LSBs reg */\r
+#define MAC_HASHFILTERH     (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x214)) /* Hash filter MSBs reg */\r
+\r
+#define MAC_INTSTATUS       (*(volatile unsigned int *)(MAC_BASE_ADDR + 0xFE0)) /* Interrupt status reg (RO) */\r
+#define MAC_INTENABLE       (*(volatile unsigned int *)(MAC_BASE_ADDR + 0xFE4)) /* Interrupt enable reg  */\r
+#define MAC_INTCLEAR        (*(volatile unsigned int *)(MAC_BASE_ADDR + 0xFE8)) /* Interrupt clear reg (WO) */\r
+#define MAC_INTSET          (*(volatile unsigned int *)(MAC_BASE_ADDR + 0xFEC)) /* Interrupt set reg (WO) */\r
+\r
+#define MAC_POWERDOWN       (*(volatile unsigned int *)(MAC_BASE_ADDR + 0xFF4)) /* Power-down reg */\r
+#define MAC_MODULEID        (*(volatile unsigned int *)(MAC_BASE_ADDR + 0xFFC)) /* Module ID reg (RO) */\r
+\r
+\r
+#endif  /* __LPC23xx_H */\r
+\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/Makefile b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/Makefile
new file mode 100644 (file)
index 0000000..add5a48
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/Makefile
@@ -0,0 +1,128 @@
+#      FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
+#\r
+#      This file is part of the FreeRTOS.org distribution.\r
+#\r
+#      FreeRTOS.org is free software; you can redistribute it and/or modify\r
+#      it under the terms of the GNU General Public License as published by\r
+#      the Free Software Foundation; either version 2 of the License, or\r
+#      (at your option) any later version.\r
+#\r
+#      FreeRTOS.org is distributed in the hope that it will be useful,\r
+#      but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+#      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
+#      GNU General Public License for more details.\r
+#\r
+#      You should have received a copy of the GNU General Public License\r
+#      along with FreeRTOS.org; if not, write to the Free Software\r
+#      Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
+#\r
+#      A special exception to the GPL can be applied should you wish to distribute\r
+#      a combined work that includes FreeRTOS.org, without being obliged to provide\r
+#      the source code for any proprietary components.  See the licensing section \r
+#      of http://www.FreeRTOS.org for full details of how and when the exception\r
+#      can be applied.\r
+#\r
+#      ***************************************************************************\r
+#      See http://www.FreeRTOS.org for documentation, latest information, license \r
+#      and contact details.  Please ensure to read the configuration and relevant \r
+#      port sections of the online documentation.\r
+#      ***************************************************************************\r
+\r
+\r
+RTOS_SOURCE_DIR=../../../Source\r
+DEMO_COMMON_DIR=../../Common/Minimal\r
+DEMO_INCLUDE_DIR=../../Common/include\r
+UIP_COMMON_DIR=../../Common/ethernet/uIP/uip-1.0/uip\r
+\r
+CC=arm-elf-gcc\r
+OBJCOPY=arm-elf-objcopy\r
+LDSCRIPT=lpc2368.ld\r
+\r
+LINKER_FLAGS=-mthumb -nostartfiles -Xlinker -oRTOSDemo.elf -Xlinker -M -Xlinker -Map=rtosdemo.map\r
+\r
+DEBUG=-g\r
+OPTIM=-O1\r
+\r
+\r
+CFLAGS= $(DEBUG) \\r
+               $(OPTIM) \\r
+               -T$(LDSCRIPT) \\r
+               -I . \\r
+               -I $(RTOS_SOURCE_DIR)/include \\r
+               -I $(RTOS_SOURCE_DIR)/portable/GCC/ARM7_LPC23xx \\r
+               -I $(DEMO_INCLUDE_DIR) \\r
+               -I ./webserver \\r
+               -I $(UIP_COMMON_DIR) \\r
+               -D ROWLEY_LPC23xx \\r
+               -D THUMB_INTERWORK \\r
+               -mcpu=arm7tdmi \\r
+               -D PACK_STRUCT_END=__attribute\(\(packed\)\) \\r
+               -D ALIGN_STRUCT_END=__attribute\(\(aligned\(4\)\)\) \\r
+               -fomit-frame-pointer \\r
+               -mthumb-interwork\r
+                                                                               \r
+THUMB_SOURCE= \\r
+               main.c \\r
+               ./ParTest/ParTest.c \\r
+               ./LCD/portlcd.c \\r
+               $(DEMO_COMMON_DIR)/BlockQ.c \\r
+               $(DEMO_COMMON_DIR)/blocktim.c \\r
+               $(DEMO_COMMON_DIR)/flash.c \\r
+               $(DEMO_COMMON_DIR)/integer.c \\r
+               $(DEMO_COMMON_DIR)/GenQTest.c \\r
+               $(DEMO_COMMON_DIR)/QPeek.c \\r
+               $(DEMO_COMMON_DIR)/dynamic.c \\r
+               ./webserver/uIP_Task.c \\r
+               ./webserver/emac.c \\r
+               ./webserver/httpd.c \\r
+               ./webserver/httpd-cgi.c \\r
+               ./webserver/httpd-fs.c \\r
+               ./webserver/http-strings.c \\r
+               $(UIP_COMMON_DIR)/uip_arp.c \\r
+               $(UIP_COMMON_DIR)/psock.c \\r
+               $(UIP_COMMON_DIR)/timer.c \\r
+               $(UIP_COMMON_DIR)/uip.c \\r
+               $(RTOS_SOURCE_DIR)/list.c \\r
+               $(RTOS_SOURCE_DIR)/queue.c \\r
+               $(RTOS_SOURCE_DIR)/tasks.c \\r
+               $(RTOS_SOURCE_DIR)/portable/GCC/ARM7_LPC23xx/port.c \\r
+               $(RTOS_SOURCE_DIR)/portable/MemMang/heap_2.c\r
+\r
+ARM_SOURCE= \\r
+               $(RTOS_SOURCE_DIR)/portable/GCC/ARM7_LPC23xx/portISR.c \\r
+               ./webserver/EMAC_ISR.c\r
+\r
+THUMB_OBJS = $(THUMB_SOURCE:.c=.o)\r
+ARM_OBJS = $(ARM_SOURCE:.c=.o)\r
+\r
+\r
+all: RTOSDemo.bin\r
+\r
+RTOSDemo.bin : RTOSDemo.hex\r
+       $(OBJCOPY) RTOSDemo.elf -O binary RTOSDemo.bin\r
+        \r
+RTOSDemo.hex : RTOSDemo.elf\r
+       $(OBJCOPY) RTOSDemo.elf -O ihex RTOSDemo.hex\r
+\r
+RTOSDemo.elf : $(THUMB_OBJS) $(ARM_OBJS) boot.s Makefile\r
+       $(CC) $(CFLAGS) $(ARM_OBJS) $(THUMB_OBJS) $(LIBS) boot.s $(LINKER_FLAGS) \r
+\r
+$(THUMB_OBJS) : %.o : %.c Makefile FreeRTOSConfig.h\r
+       $(CC) -c $(CFLAGS) -mthumb $< -o $@\r
+\r
+$(ARM_OBJS) : %.o : %.c Makefile FreeRTOSConfig.h\r
+       $(CC) -c $(CFLAGS) $< -o $@\r
+\r
+clean :\r
+       rm $(THUMB_OBJS)\r
+       rm $(ARM_OBJS)\r
+       touch Makefile\r
+       rm RTOSDemo.elf\r
+       rm RTOSDemo.hex\r
+       \r
+       \r
+       \r
+\r
+\r
+\r
+\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/ParTest/ParTest.c b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/ParTest/ParTest.c
new file mode 100644 (file)
index 0000000..11fc351
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/ParTest/ParTest.c
@@ -0,0 +1,114 @@
+/*\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
+\r
+       This file is part of the FreeRTOS.org distribution.\r
+\r
+       FreeRTOS.org is free software; you can redistribute it and/or modify\r
+       it under the terms of the GNU General Public License as published by\r
+       the Free Software Foundation; either version 2 of the License, or\r
+       (at your option) any later version.\r
+\r
+       FreeRTOS.org is distributed in the hope that it will be useful,\r
+       but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+       MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
+       GNU General Public License for more details.\r
+\r
+       You should have received a copy of the GNU General Public License\r
+       along with FreeRTOS.org; if not, write to the Free Software\r
+       Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
+\r
+       A special exception to the GPL can be applied should you wish to distribute\r
+       a combined work that includes FreeRTOS.org, without being obliged to provide\r
+       the source code for any proprietary components.  See the licensing section \r
+       of http://www.FreeRTOS.org for full details of how and when the exception\r
+       can be applied.\r
+\r
+       ***************************************************************************\r
+       See http://www.FreeRTOS.org for documentation, latest information, license \r
+       and contact details.  Please ensure to read the configuration and relevant \r
+       port sections of the online documentation.\r
+       ***************************************************************************\r
+*/\r
+\r
+/* FreeRTOS.org includes. */\r
+#include "FreeRTOS.h"\r
+\r
+/* Demo application includes. */\r
+#include "partest.h"\r
+\r
+#define partstFIRST_IO                 ( ( unsigned portLONG ) 0x01 )\r
+#define partstNUM_LEDS                 ( 8 )\r
+#define partstALL_OUTPUTS_OFF  ( ( unsigned portLONG ) 0xff )\r
+\r
+/*-----------------------------------------------------------\r
+ * Simple parallel port IO routines.\r
+ *-----------------------------------------------------------*/\r
+\r
+void vParTestInitialise( void )\r
+{\r
+       PINSEL10 = 0;\r
+       FIO2DIR  = 0x000000FF;\r
+       FIO2MASK = 0x00000000;\r
+       FIO2CLR  = 0xFF;\r
+       SCS |= (1<<0); //fast mode for port 0 and 1\r
+\r
+    FIO2CLR = partstALL_OUTPUTS_OFF;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vParTestSetLED( unsigned portBASE_TYPE uxLED, signed portBASE_TYPE xValue )\r
+{\r
+unsigned portLONG ulLED = partstFIRST_IO;\r
+\r
+       if( uxLED < partstNUM_LEDS )\r
+       {\r
+               /* Rotate to the wanted bit of port */\r
+               ulLED <<= ( unsigned portLONG ) uxLED;\r
+\r
+               /* Set of clear the output. */\r
+               if( xValue )\r
+               {\r
+                       FIO2CLR = ulLED;\r
+               }\r
+               else\r
+               {\r
+                       FIO2SET = ulLED;\r
+               }\r
+       }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vParTestToggleLED( unsigned portBASE_TYPE uxLED )\r
+{\r
+unsigned portLONG ulLED = partstFIRST_IO, ulCurrentState;\r
+\r
+       if( uxLED < partstNUM_LEDS )\r
+       {\r
+               /* Rotate to the wanted bit of port 0.  Only P10 to P13 have an LED\r
+               attached. */\r
+               ulLED <<= ( unsigned portLONG ) uxLED;\r
+\r
+               /* If this bit is already set, clear it, and visa versa. */\r
+               ulCurrentState = FIO2PIN;\r
+               if( ulCurrentState & ulLED )\r
+               {\r
+                       FIO2CLR = ulLED;\r
+               }\r
+               else\r
+               {\r
+                       FIO2SET = ulLED;                        \r
+               }\r
+       }       \r
+}\r
+\r
+/*-----------------------------------------------------------*/\r
+unsigned portBASE_TYPE uxParTextGetLED( unsigned portBASE_TYPE uxLED )\r
+{\r
+unsigned portLONG ulLED = partstFIRST_IO;\r
+    \r
+    ulLED <<= ( unsigned portLONG ) uxLED;\r
+\r
+    return ( FIO2PIN & ulLED );\r
+}\r
+\r
+\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/boot.s b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/boot.s
new file mode 100644 (file)
index 0000000..f3c4ab0
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/boot.s
@@ -0,0 +1,157 @@
+       /* Sample initialization file */\r
+\r
+       .extern main\r
+       .extern exit\r
+\r
+       .text\r
+       .code 32\r
+\r
+\r
+       .align  0\r
+\r
+       .extern __bss_beg__\r
+       .extern __bss_end__\r
+       .extern __stack_end__\r
+       .extern __data_beg__\r
+       .extern __data_end__\r
+       .extern __data+beg_src__\r
+\r
+       .global start\r
+       .global endless_loop\r
+\r
+       /* Stack Sizes */\r
+    .set  UND_STACK_SIZE, 0x00000004\r
+    .set  ABT_STACK_SIZE, 0x00000004\r
+    .set  FIQ_STACK_SIZE, 0x00000004\r
+    .set  IRQ_STACK_SIZE, 0X00000100\r
+    .set  SVC_STACK_SIZE, 0x00000100\r
+\r
+       /* Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs */\r
+    .set  MODE_USR, 0x10            /* User Mode */\r
+    .set  MODE_FIQ, 0x11            /* FIQ Mode */\r
+    .set  MODE_IRQ, 0x12            /* IRQ Mode */\r
+    .set  MODE_SVC, 0x13            /* Supervisor Mode */\r
+    .set  MODE_ABT, 0x17            /* Abort Mode */\r
+    .set  MODE_UND, 0x1B            /* Undefined Mode */\r
+    .set  MODE_SYS, 0x1F            /* System Mode */\r
+\r
+    .equ  I_BIT, 0x80               /* when I bit is set, IRQ is disabled */\r
+    .equ  F_BIT, 0x40               /* when F bit is set, FIQ is disabled */\r
+\r
+\r
+start:\r
+_start:\r
+_mainCRTStartup:\r
+\r
+       /* Setup a stack for each mode - note that this only sets up a usable stack\r
+       for system/user, SWI and IRQ modes.   Also each mode is setup with\r
+       interrupts initially disabled. */\r
+    ldr   r0, .LC6\r
+    msr   CPSR_c, #MODE_UND|I_BIT|F_BIT /* Undefined Instruction Mode\r
+    mov   sp, r0\r
+    sub   r0, r0, #UND_STACK_SIZE\r
+    msr   CPSR_c, #MODE_ABT|I_BIT|F_BIT /* Abort Mode */\r
+    mov   sp, r0\r
+    sub   r0, r0, #ABT_STACK_SIZE\r
+    msr   CPSR_c, #MODE_FIQ|I_BIT|F_BIT /* FIQ Mode */\r
+    mov   sp, r0\r
+    sub   r0, r0, #FIQ_STACK_SIZE\r
+    msr   CPSR_c, #MODE_IRQ|I_BIT|F_BIT /* IRQ Mode */\r
+    mov   sp, r0\r
+    sub   r0, r0, #IRQ_STACK_SIZE\r
+    msr   CPSR_c, #MODE_SVC|I_BIT|F_BIT /* Supervisor Mode */\r
+    mov   sp, r0\r
+    sub   r0, r0, #SVC_STACK_SIZE\r
+    msr   CPSR_c, #MODE_SYS|I_BIT|F_BIT /* System Mode */\r
+    mov   sp, r0\r
+\r
+       /* We want to start in supervisor mode.  Operation will switch to system\r
+       mode when the first task starts. */\r
+       msr   CPSR_c, #MODE_SVC|I_BIT|F_BIT\r
+\r
+       /* Clear BSS. */\r
+\r
+       mov     a2, #0                  /* Fill value */\r
+       mov             fp, a2                  /* Null frame pointer */\r
+       mov             r7, a2                  /* Null frame pointer for Thumb */\r
+\r
+       ldr             r1, .LC1                /* Start of memory block */\r
+       ldr             r3, .LC2                /* End of memory block */\r
+       subs    r3, r3, r1      /* Length of block */\r
+       beq             .end_clear_loop\r
+       mov             r2, #0\r
+\r
+.clear_loop:\r
+       strb    r2, [r1], #1\r
+       subs    r3, r3, #1\r
+       bgt             .clear_loop\r
+\r
+.end_clear_loop:\r
+\r
+       /* Initialise data. */\r
+\r
+       ldr             r1, .LC3                /* Start of memory block */\r
+       ldr             r2, .LC4                /* End of memory block */\r
+       ldr             r3, .LC5\r
+       subs    r3, r3, r1              /* Length of block */\r
+       beq             .end_set_loop\r
+\r
+.set_loop:\r
+       ldrb    r4, [r2], #1\r
+       strb    r4, [r1], #1\r
+       subs    r3, r3, #1\r
+       bgt             .set_loop\r
+\r
+.end_set_loop:\r
+\r
+       mov             r0, #0          /* no arguments  */\r
+       mov             r1, #0          /* no argv either */\r
+\r
+       bl              main\r
+\r
+endless_loop:\r
+       b               endless_loop\r
+\r
+\r
+       .align 0\r
+\r
+       .LC1:\r
+       .word   __bss_beg__\r
+       .LC2:\r
+       .word   __bss_end__\r
+       .LC3:\r
+       .word   __data_beg__\r
+       .LC4:\r
+       .word   __data_beg_src__\r
+       .LC5:\r
+       .word   __data_end__\r
+       .LC6:\r
+       .word   __stack_end__\r
+\r
+\r
+       /* Setup vector table.  Note that undf, pabt, dabt, fiq just execute\r
+       a null loop. */\r
+\r
+.section .startup,"ax"\r
+         .code 32\r
+         .align 0\r
+\r
+       b     _start                                            /* reset - _start                       */\r
+       ldr   pc, _undf                                         /* undefined - _undf            */\r
+       ldr   pc, _swi                                          /* SWI - _swi                           */\r
+       ldr   pc, _pabt                                         /* program abort - _pabt        */\r
+       ldr   pc, _dabt                                         /* data abort - _dabt           */\r
+       nop                                                                     /* reserved                                     */\r
+       ldr   pc, [pc,#-0x120]                          /* IRQ - read the VIC           */\r
+       ldr   pc, _fiq                                          /* FIQ - _fiq                           */\r
+\r
+_undf:  .word __undf                    /* undefined                           */\r
+_swi:   .word vPortYieldProcessor       /* SWI                                         */\r
+_pabt:  .word __pabt                    /* program abort                       */\r
+_dabt:  .word __dabt                    /* data abort                          */\r
+_fiq:   .word __fiq                     /* FIQ                                         */\r
+\r
+__undf: b     .                         /* undefined                           */\r
+__pabt: b     .                         /* program abort                       */\r
+__dabt: b     .                         /* data abort                          */\r
+__fiq:  b     .                         /* FIQ                                         */\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/lpc2368.ld b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/lpc2368.ld
new file mode 100644 (file)
index 0000000..79a37e6
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/lpc2368.ld
@@ -0,0 +1,67 @@
+MEMORY \r
+{\r
+       flash   : ORIGIN = 0x00000000, LENGTH = 500K\r
+       ram     : ORIGIN = 0x40000000, LENGTH = 32K\r
+       usbram   : ORIGIN = 0x7FD00000, LENGTH = 8K\r
+       ethram   : ORIGIN = 0x7FE00000, LENGTH = 16K\r
+}\r
+\r
+__stack_end__ = 0x40000000 + 32K - 4;\r
+\r
+SECTIONS \r
+{\r
+       . = 0;\r
+       startup : { *(.startup)} >flash\r
+\r
+       prog : \r
+       {\r
+               *(.text)\r
+               *(.rodata)\r
+               *(.rodata*)\r
+               *(.glue_7)\r
+               *(.glue_7t)\r
+       } >flash\r
+\r
+       __end_of_text__ = .;\r
+\r
+       .data : \r
+       {\r
+               __data_beg__ = .;\r
+               __data_beg_src__ = __end_of_text__;\r
+               *(.data)\r
+               __data_end__ = .;\r
+       } >ram AT>flash\r
+\r
+       .bss : \r
+       {\r
+               __bss_beg__ = .;\r
+               *(.bss)\r
+       } >ram\r
+\r
+       /* Align here to ensure that the .bss section occupies space up to\r
+       _end.  Align after .bss to ensure correct alignment even if the\r
+       .bss section disappears because there are no input sections.  */\r
+       . = ALIGN(32 / 8);\r
+\r
+       .usbram (NOLOAD):\r
+       {\r
+       __usbram_beg__ = .;\r
+       *(.dmaram)\r
+               __usbram_end__ = .;\r
+       } >usbram\r
+\r
+       .ethram (NOLOAD):\r
+       {\r
+       __ethram_beg__ = .;\r
+       *(.ethram)\r
+               __ethram_end__ = .;\r
+       } >ethram\r
+\r
+\r
+}\r
+       . = ALIGN(32 / 8);\r
+       _end = .;\r
+       _bss_end__ = . ; __bss_end__ = . ; __end__ = . ;\r
+       PROVIDE (end = .);\r
+\r
+\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/main.c b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/main.c
new file mode 100644 (file)
index 0000000..077b6f0
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/main.c
@@ -0,0 +1,281 @@
+/*\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
+\r
+       This file is part of the FreeRTOS.org distribution.\r
+\r
+       FreeRTOS.org is free software; you can redistribute it and/or modify\r
+       it under the terms of the GNU General Public License as published by\r
+       the Free Software Foundation; either version 2 of the License, or\r
+       (at your option) any later version.\r
+\r
+       FreeRTOS.org is distributed in the hope that it will be useful,\r
+       but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+       MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
+       GNU General Public License for more details.\r
+\r
+       You should have received a copy of the GNU General Public License\r
+       along with FreeRTOS.org; if not, write to the Free Software\r
+       Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
+\r
+       A special exception to the GPL can be applied should you wish to distribute\r
+       a combined work that includes FreeRTOS.org, without being obliged to provide\r
+       the source code for any proprietary components.  See the licensing section \r
+       of http://www.FreeRTOS.org for full details of how and when the exception\r
+       can be applied.\r
+\r
+       ***************************************************************************\r
+       See http://www.FreeRTOS.org for documentation, latest information, license \r
+       and contact details.  Please ensure to read the configuration and relevant \r
+       port sections of the online documentation.\r
+       ***************************************************************************\r
+*/\r
+\r
+/*\r
+ * Creates all the demo application tasks, then starts the scheduler.  The WEB\r
+ * documentation provides more details of the standard demo application tasks.\r
+ * In addition to the standard demo tasks, the following tasks and tests are\r
+ * defined and/or created within this file:\r
+ *\r
+ * "LCD" task - the LCD task is a 'gatekeeper' task.  It is the only task that\r
+ * is permitted to access the display directly.  Other tasks wishing to write a\r
+ * message to the LCD send the message on a queue to the LCD task instead of\r
+ * accessing the LCD themselves.  The LCD task just blocks on the queue waiting\r
+ * for messages - waking and displaying the messages as they arrive.\r
+ *\r
+ * "Check" hook -  This only executes every five seconds from the tick hook.\r
+ * Its main function is to check that all the standard demo tasks are still \r
+ * operational.  Should any unexpected behaviour within a demo task be discovered \r
+ * the tick hook will write an error to the LCD (via the LCD task).  If all the \r
+ * demo tasks are executing with their expected behaviour then the check task \r
+ * writes PASS to the LCD (again via the LCD task), as described above.\r
+ *\r
+ * "uIP" task -  This is the task that handles the uIP stack.  All TCP/IP\r
+ * processing is performed in this task.\r
+ */\r
+\r
+/* Scheduler includes. */\r
+#include "FreeRTOS.h"\r
+#include "Task.h"\r
+#include "queue.h"\r
+#include "semphr.h"\r
+\r
+/* Demo app includes. */\r
+#include "BlockQ.h"\r
+#include "death.h"\r
+#include "blocktim.h"\r
+#include "LCD/portlcd.h"\r
+#include "flash.h"\r
+#include "partest.h"\r
+#include "GenQTest.h"\r
+#include "QPeek.h"\r
+#include "dynamic.h"\r
+\r
+/* Demo application definitions. */\r
+#define mainQUEUE_SIZE                                         ( 3 )\r
+#define mainCHECK_DELAY                                                ( ( portTickType ) 5000 / portTICK_RATE_MS )\r
+#define mainBASIC_WEB_STACK_SIZE            ( configMINIMAL_STACK_SIZE * 6 )\r
+\r
+/* Task priorities. */\r
+#define mainQUEUE_POLL_PRIORITY                                ( tskIDLE_PRIORITY + 2 )\r
+#define mainCHECK_TASK_PRIORITY                                ( tskIDLE_PRIORITY + 3 )\r
+#define mainBLOCK_Q_PRIORITY                           ( tskIDLE_PRIORITY + 2 )\r
+#define mainFLASH_PRIORITY                  ( tskIDLE_PRIORITY + 2 )\r
+#define mainCREATOR_TASK_PRIORITY           ( tskIDLE_PRIORITY + 3 )\r
+#define mainGEN_QUEUE_TASK_PRIORITY                    ( tskIDLE_PRIORITY ) \r
+\r
+/* Constants to setup the PLL. */\r
+#define mainPLL_MUL                    ( ( unsigned portLONG ) ( 12 - 1 ) )\r
+#define mainPLL_DIV                    ( ( unsigned portLONG ) 0x0000 )\r
+#define mainCPU_CLK_DIV                ( ( unsigned portLONG ) 0x0004 )\r
+#define mainPLL_ENABLE         ( ( unsigned portLONG ) 0x0001 )\r
+#define mainPLL_CONNECT                ( ( ( unsigned portLONG ) 0x0002 ) | mainPLL_ENABLE )\r
+#define mainPLL_FEED_BYTE1     ( ( unsigned portLONG ) 0xaa )\r
+#define mainPLL_FEED_BYTE2     ( ( unsigned portLONG ) 0x55 )\r
+#define mainPLL_LOCK           ( ( unsigned portLONG ) 0x4000000 )\r
+#define mainPLL_CONNECTED      ( ( unsigned portLONG ) 0x2000000 )\r
+#define mainOSC_ENABLE         ( ( unsigned portLONG ) 0x20 )\r
+#define mainOSC_STAT           ( ( unsigned portLONG ) 0x40 )\r
+#define mainOSC_SELECT         ( ( unsigned portLONG ) 0x01 )\r
+\r
+/* Constants to setup the MAM. */\r
+#define mainMAM_TIM_3          ( ( unsigned portCHAR ) 0x03 )\r
+#define mainMAM_MODE_FULL      ( ( unsigned portCHAR ) 0x02 )\r
+\r
+/* \r
+ * The task that handles the uIP stack.  All TCP/IP processing is performed in\r
+ * this task.\r
+ */\r
+extern void vuIP_Task( void *pvParameters );\r
+\r
+/*\r
+ * The LCD is written two by more than one task so is controlled by a \r
+ * 'gatekeeper' task.  This is the only task that is actually permitted to \r
+ * access the LCD directly.  Other tasks wanting to display a message send\r
+ * the message to the gatekeeper.\r
+ */\r
+static void vLCDTask( void *pvParameters );\r
+\r
+/* Configure the hardware as required by the demo. */\r
+static void prvSetupHardware( void );\r
+\r
+/* The queue used to send messages to the LCD task. */\r
+xQueueHandle xLCDQueue;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+int main( void )\r
+{\r
+       prvSetupHardware();\r
+       \r
+       /* Create the queue used by the LCD task.  Messages for display on the LCD\r
+       are received via this queue. */\r
+       xLCDQueue = xQueueCreate( mainQUEUE_SIZE, sizeof( xLCDMessage ) );\r
+\r
+       /* Create the uIP task.  This uses the lwIP RTOS abstraction layer.*/\r
+    xTaskCreate( vuIP_Task, ( signed portCHAR * ) "uIP", mainBASIC_WEB_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY - 1, NULL );\r
+\r
+       /* Start the standard demo tasks. */\r
+       vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
+    vCreateBlockTimeTasks();\r
+    vStartLEDFlashTasks( mainFLASH_PRIORITY );\r
+    vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );\r
+    vStartQueuePeekTasks();   \r
+    vStartDynamicPriorityTasks();\r
+\r
+       /* Start the tasks defined within this file/specific to this demo. */\r
+       xTaskCreate( vLCDTask, ( signed portCHAR * ) "LCD", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY - 1, NULL );\r
+\r
+       /* Start the scheduler. */\r
+       vTaskStartScheduler();\r
+\r
+    /* Will only get here if there was insufficient memory to create the idle\r
+    task. */\r
+       return 0; \r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vApplicationTickHook( void )\r
+{\r
+unsigned portBASE_TYPE uxColumn = 0;\r
+static xLCDMessage xMessage = { 0, "PASS" };\r
+static unsigned portLONG ulTicksSinceLastDisplay = 0;\r
+\r
+       /* Called from every tick interrupt.  Have enough ticks passed to make it\r
+       time to perform our health status check again? */\r
+       ulTicksSinceLastDisplay++;\r
+       if( ulTicksSinceLastDisplay >= mainCHECK_DELAY )\r
+       {\r
+               ulTicksSinceLastDisplay = 0;\r
+               \r
+               /* Has an error been found in any task? */\r
+\r
+        if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
+               {\r
+                       xMessage.pcMessage = "ERROR - BLOCKQ";\r
+               }\r
+\r
+               if( xAreBlockTimeTestTasksStillRunning() != pdTRUE )\r
+               {\r
+                       xMessage.pcMessage = "ERROR - BLOCKTIM";\r
+               }\r
+\r
+               if( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
+               {\r
+                       xMessage.pcMessage = "ERROR - GENQ";\r
+               }\r
+               \r
+               if( xAreQueuePeekTasksStillRunning() != pdTRUE )\r
+               {\r
+                       xMessage.pcMessage = "ERROR - PEEKQ";\r
+               }       \r
+               \r
+               if( xAreDynamicPriorityTasksStillRunning() != pdTRUE )\r
+               {\r
+                       xMessage.pcMessage = "ERROR - DYNAMIC";\r
+               }\r
+        \r
+        xMessage.xColumn++;\r
+\r
+               /* Send the message to the LCD gatekeeper for display. */\r
+               xQueueSendToBackFromISR( xLCDQueue, &xMessage, pdFALSE );\r
+       }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vLCDTask( void *pvParameters )\r
+{\r
+xLCDMessage xMessage;\r
+\r
+       /* Initialise the LCD and display a startup message. */\r
+       LCD_init();\r
+       LCD_cur_off();\r
+    LCD_cls();    \r
+    LCD_gotoxy( 1, 1 );\r
+    LCD_puts( "www.FreeRTOS.org" );\r
+\r
+       for( ;; )\r
+       {\r
+               /* Wait for a message to arrive that requires displaying. */\r
+               while( xQueueReceive( xLCDQueue, &xMessage, portMAX_DELAY ) != pdPASS );\r
+               \r
+               /* Display the message.  Print each message to a different position. */\r
+               LCD_cls();\r
+               LCD_gotoxy( ( xMessage.xColumn & 0x07 ) + 1, ( xMessage.xColumn & 0x01 ) + 1 );\r
+               LCD_puts( xMessage.pcMessage );\r
+       }\r
+\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvSetupHardware( void )\r
+{\r
+       #ifdef RUN_FROM_RAM\r
+               /* Remap the interrupt vectors to RAM if we are are running from RAM. */\r
+               SCB_MEMMAP = 2;\r
+       #endif\r
+       \r
+       /* Disable the PLL. */\r
+       PLLCON = 0;\r
+       PLLFEED = mainPLL_FEED_BYTE1;\r
+       PLLFEED = mainPLL_FEED_BYTE2;\r
+       \r
+       /* Configure clock source. */\r
+       SCS |= mainOSC_ENABLE;\r
+       while( !( SCS & mainOSC_STAT ) );\r
+       CLKSRCSEL = mainOSC_SELECT; \r
+       \r
+       /* Setup the PLL to multiply the XTAL input by 4. */\r
+       PLLCFG = ( mainPLL_MUL | mainPLL_DIV );\r
+       PLLFEED = mainPLL_FEED_BYTE1;\r
+       PLLFEED = mainPLL_FEED_BYTE2;\r
+\r
+       /* Turn on and wait for the PLL to lock... */\r
+       PLLCON = mainPLL_ENABLE;\r
+       PLLFEED = mainPLL_FEED_BYTE1;\r
+       PLLFEED = mainPLL_FEED_BYTE2;\r
+       CCLKCFG = mainCPU_CLK_DIV;      \r
+       while( !( PLLSTAT & mainPLL_LOCK ) );\r
+       \r
+       /* Connecting the clock. */\r
+       PLLCON = mainPLL_CONNECT;\r
+       PLLFEED = mainPLL_FEED_BYTE1;\r
+       PLLFEED = mainPLL_FEED_BYTE2;\r
+       while( !( PLLSTAT & mainPLL_CONNECTED ) ); \r
+       \r
+       /* Setup and turn on the MAM.  Three cycle access is used due to the fast\r
+       PLL used.  It is possible faster overall performance could be obtained by\r
+       tuning the MAM and PLL settings. */\r
+       MAMCR = 0;\r
+       MAMTIM = mainMAM_TIM_3;\r
+       MAMCR = mainMAM_MODE_FULL;\r
+       \r
+       /* Setup the led's on the MCB2300 board */\r
+       vParTestInitialise();\r
+}\r
+\r
+\r
+\r
+\r
+\r
+\r
+\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/EMAC_ISR.c b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/EMAC_ISR.c
new file mode 100644 (file)
index 0000000..ba43f93
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/EMAC_ISR.c
@@ -0,0 +1,29 @@
+#include "FreeRTOS.h"\r
+#include "Semphr.h"\r
+#include "Task.h"\r
+\r
+void vEMAC_ISR( void ) __attribute__((naked));\r
+\r
+extern xSemaphoreHandle xEMACSemaphore;\r
+\r
+void vEMAC_ISR( void )\r
+{\r
+    portENTER_SWITCHING_ISR();\r
+\r
+    portBASE_TYPE xSwitchRequired = pdFALSE;\r
+\r
+    /* Clear the interrupt. */\r
+    MAC_INTCLEAR = 0xffff;\r
+    VICVectAddr = 0;\r
+\r
+    /* Ensure the uIP task is not blocked as data has arrived. */\r
+    if( xSemaphoreGiveFromISR( xEMACSemaphore, pdFALSE ) )\r
+    {\r
+        xSwitchRequired = pdTRUE;\r
+    }\r
+\r
+    /* Switch to the uIP task. */\r
+    portEXIT_SWITCHING_ISR( xSwitchRequired );\r
+}\r
+\r
+\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/clock-arch.h b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/clock-arch.h
new file mode 100644 (file)
index 0000000..cde657b
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/clock-arch.h
@@ -0,0 +1,42 @@
+/*\r
+ * Copyright (c) 2006, Swedish Institute of Computer Science.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions\r
+ * are met:\r
+ * 1. Redistributions of source code must retain the above copyright\r
+ *    notice, this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright\r
+ *    notice, this list of conditions and the following disclaimer in the\r
+ *    documentation and/or other materials provided with the distribution.\r
+ * 3. Neither the name of the Institute nor the names of its contributors\r
+ *    may be used to endorse or promote products derived from this software\r
+ *    without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND\r
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE\r
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\r
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY\r
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF\r
+ * SUCH DAMAGE.\r
+ *\r
+ * This file is part of the uIP TCP/IP stack\r
+ *\r
+ * $Id: clock-arch.h,v 1.2 2006/06/12 08:00:31 adam Exp $\r
+ */\r
+\r
+#ifndef __CLOCK_ARCH_H__\r
+#define __CLOCK_ARCH_H__\r
+\r
+#include "FreeRTOS.h"\r
+\r
+typedef unsigned long clock_time_t;\r
+#define CLOCK_CONF_SECOND configTICK_RATE_HZ\r
+\r
+#endif /* __CLOCK_ARCH_H__ */\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/emac.c b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/emac.c
new file mode 100644 (file)
index 0000000..ab308e6
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/emac.c
@@ -0,0 +1,411 @@
+/******************************************************************\r
+ *****                                                        *****\r
+ *****  Name: cs8900.c                                        *****\r
+ *****  Ver.: 1.0                                             *****\r
+ *****  Date: 07/05/2001                                      *****\r
+ *****  Auth: Andreas Dannenberg                              *****\r
+ *****        HTWK Leipzig                                    *****\r
+ *****        university of applied sciences                  *****\r
+ *****        Germany                                         *****\r
+ *****  Func: ethernet packet-driver for use with LAN-        *****\r
+ *****        controller CS8900 from Crystal/Cirrus Logic     *****\r
+ *****                                                        *****\r
+ *****  Keil: Module modified for use with Philips            *****\r
+ *****        LPC2378 EMAC Ethernet controller                *****\r
+ *****                                                        *****\r
+ ******************************************************************/\r
+\r
+/* Adapted from file originally written by Andreas Dannenberg.  Supplied with permission. */\r
+\r
+#include "FreeRTOS.h"\r
+#include "Semphr.h" \r
+#include "task.h"\r
+#include "EMAC.h"\r
+\r
+/* The semaphore used to wake the uIP task when data arives. */\r
+xSemaphoreHandle xEMACSemaphore = NULL;\r
+\r
+static unsigned short *rptr;\r
+static unsigned short *tptr;\r
+\r
+// easyWEB internal function\r
+// help function to swap the byte order of a WORD\r
+\r
+static unsigned short SwapBytes(unsigned short Data)\r
+{\r
+  return (Data >> 8) | (Data << 8);\r
+}\r
+\r
+// Keil: function added to write PHY\r
+void write_PHY (int PhyReg, int Value)\r
+{\r
+  unsigned int tout;\r
+\r
+  MAC_MADR = DP83848C_DEF_ADR | PhyReg;\r
+  MAC_MWTD = Value;\r
+\r
+  /* Wait utill operation completed */\r
+  tout = 0;\r
+  for (tout = 0; tout < MII_WR_TOUT; tout++) {\r
+    if ((MAC_MIND & MIND_BUSY) == 0) {\r
+      break;\r
+    }\r
+  }\r
+}\r
+\r
+\r
+// Keil: function added to read PHY\r
+unsigned short read_PHY (unsigned char PhyReg) \r
+{\r
+  unsigned int tout;\r
+\r
+  MAC_MADR = DP83848C_DEF_ADR | PhyReg;\r
+  MAC_MCMD = MCMD_READ;\r
+\r
+  /* Wait until operation completed */\r
+  tout = 0;\r
+  for (tout = 0; tout < MII_RD_TOUT; tout++) {\r
+    if ((MAC_MIND & MIND_BUSY) == 0) {\r
+      break;\r
+    }\r
+  }\r
+  MAC_MCMD = 0;\r
+  return (MAC_MRDD);\r
+}\r
+\r
+\r
+// Keil: function added to initialize Rx Descriptors\r
+void rx_descr_init (void)\r
+{\r
+  unsigned int i;\r
+\r
+  for (i = 0; i < NUM_RX_FRAG; i++) {\r
+    RX_DESC_PACKET(i)  = RX_BUF(i);\r
+    RX_DESC_CTRL(i)    = RCTRL_INT | (ETH_FRAG_SIZE-1);\r
+    RX_STAT_INFO(i)    = 0;\r
+    RX_STAT_HASHCRC(i) = 0;\r
+  }\r
+\r
+  /* Set EMAC Receive Descriptor Registers. */\r
+  MAC_RXDESCRIPTOR    = RX_DESC_BASE;\r
+  MAC_RXSTATUS        = RX_STAT_BASE;\r
+  MAC_RXDESCRIPTORNUM = NUM_RX_FRAG-1;\r
+\r
+  /* Rx Descriptors Point to 0 */\r
+  MAC_RXCONSUMEINDEX  = 0;\r
+}\r
+\r
+\r
+// Keil: function added to initialize Tx Descriptors\r
+void tx_descr_init (void) {\r
+  unsigned int i;\r
+\r
+  for (i = 0; i < NUM_TX_FRAG; i++) {\r
+    TX_DESC_PACKET(i) = TX_BUF(i);\r
+    TX_DESC_CTRL(i)   = 0;\r
+    TX_STAT_INFO(i)   = 0;\r
+  }\r
+\r
+  /* Set EMAC Transmit Descriptor Registers. */\r
+  MAC_TXDESCRIPTOR    = TX_DESC_BASE;\r
+  MAC_TXSTATUS        = TX_STAT_BASE;\r
+  MAC_TXDESCRIPTORNUM = NUM_TX_FRAG-1;\r
+\r
+  /* Tx Descriptors Point to 0 */\r
+  MAC_TXPRODUCEINDEX  = 0;\r
+}\r
+\r
+\r
+// configure port-pins for use with LAN-controller,\r
+// reset it and send the configuration-sequence\r
+\r
+portBASE_TYPE Init_EMAC(void)\r
+{\r
+portBASE_TYPE xReturn = pdPASS;\r
+\r
+// Keil: function modified to access the EMAC\r
+// Initializes the EMAC ethernet controller\r
+  volatile unsigned int regv,tout,id1,id2;\r
+\r
+  /* Enable P1 Ethernet Pins. */\r
+  PINSEL2 = 0x55555555;\r
+  PINSEL3 = (PINSEL3 & ~0x0000000F) | 0x00000005;\r
+\r
+  /* Power Up the EMAC controller. */\r
+  PCONP |= 0x40000000;\r
+  vTaskDelay( 1 );\r
+\r
+  /* Reset all EMAC internal modules. */\r
+  MAC_MAC1 = MAC1_RES_TX | MAC1_RES_MCS_TX | MAC1_RES_RX | MAC1_RES_MCS_RX | MAC1_SIM_RES | MAC1_SOFT_RES;\r
+  MAC_COMMAND = CR_REG_RES | CR_TX_RES | CR_RX_RES;\r
+\r
+  /* A short delay after reset. */\r
+  vTaskDelay( 1 );\r
+\r
+  /* Initialize MAC control registers. */\r
+  MAC_MAC1 = MAC1_PASS_ALL;\r
+  MAC_MAC2 = MAC2_CRC_EN | MAC2_PAD_EN;\r
+  MAC_MAXF = ETH_MAX_FLEN;\r
+  MAC_CLRT = CLRT_DEF;\r
+  MAC_IPGR = IPGR_DEF;\r
+\r
+  /* Enable Reduced MII interface. */\r
+  MAC_COMMAND = CR_RMII | CR_PASS_RUNT_FRM;\r
+\r
+  /* Reset Reduced MII Logic. */\r
+  MAC_SUPP = SUPP_RES_RMII;\r
+  MAC_SUPP = 0;\r
+\r
+  /* Put the DP83848C in reset mode */\r
+  write_PHY (PHY_REG_BMCR, 0x8000);\r
+  write_PHY (PHY_REG_BMCR, 0x8000);\r
+\r
+  /* Wait for hardware reset to end. */\r
+  for (tout = 0; tout < 100; tout++) {\r
+    vTaskDelay( 10 );\r
+    regv = read_PHY (PHY_REG_BMCR);\r
+    if (!(regv & 0x8000)) {\r
+      /* Reset complete */\r
+      break;\r
+    }\r
+  }\r
+\r
+  /* Check if this is a DP83848C PHY. */\r
+  id1 = read_PHY (PHY_REG_IDR1);\r
+  id2 = read_PHY (PHY_REG_IDR2);\r
+  if (((id1 << 16) | (id2 & 0xFFF0)) == DP83848C_ID) {\r
+    /* Configure the PHY device */\r
+\r
+    /* Use autonegotiation about the link speed. */\r
+    write_PHY (PHY_REG_BMCR, PHY_AUTO_NEG);\r
+    /* Wait to complete Auto_Negotiation. */\r
+    for (tout = 0; tout < 10; tout++) {\r
+      vTaskDelay( 100 );\r
+      regv = read_PHY (PHY_REG_BMSR);\r
+      if (regv & 0x0020) {\r
+        /* Autonegotiation Complete. */\r
+        break;\r
+      }\r
+    }\r
+  }\r
+  else\r
+  {\r
+    xReturn = pdFAIL;\r
+  }\r
+\r
+  /* Check the link status. */\r
+  if( xReturn == pdPASS )\r
+  {\r
+    xReturn = pdFAIL;\r
+    for (tout = 0; tout < 10; tout++) {\r
+      vTaskDelay( 100 );\r
+      regv = read_PHY (PHY_REG_STS);\r
+      if (regv & 0x0001) {\r
+        /* Link is on. */\r
+        xReturn = pdPASS;\r
+        break;\r
+      }\r
+    }\r
+  }\r
+\r
+  if( xReturn == pdPASS )\r
+  {\r
+    /* Configure Full/Half Duplex mode. */\r
+    if (regv & 0x0004) {\r
+      /* Full duplex is enabled. */\r
+      MAC_MAC2    |= MAC2_FULL_DUP;\r
+      MAC_COMMAND |= CR_FULL_DUP;\r
+      MAC_IPGT     = IPGT_FULL_DUP;\r
+    }\r
+    else {\r
+      /* Half duplex mode. */\r
+      MAC_IPGT = IPGT_HALF_DUP;\r
+    }\r
+\r
+    /* Configure 100MBit/10MBit mode. */\r
+    if (regv & 0x0002) {\r
+      /* 10MBit mode. */\r
+      MAC_SUPP = 0;\r
+    }\r
+    else {\r
+      /* 100MBit mode. */\r
+      MAC_SUPP = SUPP_SPEED;\r
+    }\r
+\r
+    /* Set the Ethernet MAC Address registers */\r
+    MAC_SA0 = (emacETHADDR0 << 8) | emacETHADDR1;\r
+    MAC_SA1 = (emacETHADDR2 << 8) | emacETHADDR3;\r
+    MAC_SA2 = (emacETHADDR4 << 8) | emacETHADDR5;\r
+\r
+    /* Initialize Tx and Rx DMA Descriptors */\r
+    rx_descr_init ();\r
+    tx_descr_init ();\r
+\r
+    /* Receive Broadcast and Perfect Match Packets */\r
+    MAC_RXFILTERCTRL = RFC_UCAST_EN | RFC_BCAST_EN | RFC_PERFECT_EN;\r
+\r
+    /* Create the semaphore used ot wake the uIP task. */\r
+    vSemaphoreCreateBinary( xEMACSemaphore );\r
+\r
+    /* Reset all interrupts */\r
+    MAC_INTCLEAR  = 0xFFFF;\r
+\r
+    /* Enable receive and transmit mode of MAC Ethernet core */\r
+    MAC_COMMAND  |= (CR_RX_EN | CR_TX_EN);\r
+    MAC_MAC1     |= MAC1_REC_EN;\r
+  }\r
+\r
+  return xReturn;\r
+}\r
+\r
+\r
+// reads a word in little-endian byte order from RX_BUFFER\r
+\r
+unsigned short ReadFrame_EMAC(void)\r
+{\r
+  return (*rptr++);\r
+}\r
+\r
+// reads a word in big-endian byte order from RX_FRAME_PORT\r
+// (useful to avoid permanent byte-swapping while reading\r
+// TCP/IP-data)\r
+\r
+unsigned short ReadFrameBE_EMAC(void)\r
+{\r
+  unsigned short ReturnValue;\r
+\r
+  ReturnValue = SwapBytes (*rptr++);\r
+  return (ReturnValue);\r
+}\r
+\r
+\r
+// copies bytes from frame port to MCU-memory\r
+// NOTES: * an odd number of byte may only be transfered\r
+//          if the frame is read to the end!\r
+//        * MCU-memory MUST start at word-boundary\r
+\r
+void CopyFromFrame_EMAC(void *Dest, unsigned short Size)\r
+{\r
+  unsigned short * piDest;                       // Keil: Pointer added to correct expression\r
+\r
+  piDest = Dest;                                 // Keil: Line added\r
+  while (Size > 1) {\r
+    *piDest++ = ReadFrame_EMAC();\r
+    Size -= 2;\r
+  }\r
+  \r
+  if (Size) {                                         // check for leftover byte...\r
+    *(unsigned char *)piDest = (char)ReadFrame_EMAC();// the LAN-Controller will return 0\r
+  }                                                   // for the highbyte\r
+}\r
+\r
+// does a dummy read on frame-I/O-port\r
+// NOTE: only an even number of bytes is read!\r
+\r
+void DummyReadFrame_EMAC(unsigned short Size)    // discards an EVEN number of bytes\r
+{                                                // from RX-fifo\r
+  while (Size > 1) {\r
+    ReadFrame_EMAC();\r
+    Size -= 2;\r
+  }\r
+}\r
+\r
+// Reads the length of the received ethernet frame and checks if the \r
+// destination address is a broadcast message or not\r
+// returns the frame length\r
+unsigned short StartReadFrame(void) {\r
+  unsigned short RxLen;\r
+  unsigned int idx;\r
+\r
+  idx = MAC_RXCONSUMEINDEX;\r
+  RxLen = (RX_STAT_INFO(idx) & RINFO_SIZE) - 3;\r
+  rptr = (unsigned short *)RX_DESC_PACKET(idx);\r
+  return(RxLen);\r
+}\r
+\r
+void EndReadFrame(void) {\r
+  unsigned int idx;\r
+\r
+  /* DMA free packet. */\r
+  idx = MAC_RXCONSUMEINDEX;\r
+\r
+  if (++idx == NUM_RX_FRAG)\r
+    idx = 0;\r
+\r
+  MAC_RXCONSUMEINDEX = idx;\r
+}\r
+\r
+unsigned int CheckFrameReceived(void) {             // Packet received ?\r
+\r
+  if (MAC_RXPRODUCEINDEX != MAC_RXCONSUMEINDEX)     // more packets received ?\r
+    return(1);\r
+  else \r
+    return(0);\r
+}\r
+\r
+unsigned int uiGetEMACRxData( unsigned char *ucBuffer )\r
+{\r
+unsigned int uiLen = 0;\r
+\r
+    if( MAC_RXPRODUCEINDEX != MAC_RXCONSUMEINDEX )\r
+    {\r
+        uiLen = StartReadFrame();\r
+        CopyFromFrame_EMAC( ucBuffer, uiLen );\r
+        EndReadFrame();\r
+    }\r
+\r
+    return uiLen;\r
+}\r
+\r
+// requests space in EMAC memory for storing an outgoing frame\r
+\r
+void RequestSend(void)\r
+{\r
+  unsigned int idx;\r
+\r
+  idx  = MAC_TXPRODUCEINDEX;\r
+  tptr = (unsigned short *)TX_DESC_PACKET(idx);\r
+}\r
+\r
+// check if ethernet controller is ready to accept the\r
+// frame we want to send\r
+\r
+unsigned int Rdy4Tx(void)\r
+{\r
+  return (1);   // the ethernet controller transmits much faster\r
+}               // than the CPU can load its buffers\r
+\r
+\r
+// writes a word in little-endian byte order to TX_BUFFER\r
+void WriteFrame_EMAC(unsigned short Data)\r
+{\r
+  *tptr++ = Data;\r
+}\r
+\r
+// copies bytes from MCU-memory to frame port\r
+// NOTES: * an odd number of byte may only be transfered\r
+//          if the frame is written to the end!\r
+//        * MCU-memory MUST start at word-boundary\r
+\r
+void CopyToFrame_EMAC(void *Source, unsigned int Size)\r
+{\r
+  unsigned short * piSource;\r
+\r
+  piSource = Source;\r
+  Size = (Size + 1) & 0xFFFE;    // round Size up to next even number\r
+  while (Size > 0) {\r
+    WriteFrame_EMAC(*piSource++);\r
+    Size -= 2;\r
+  }\r
+}\r
+\r
+void DoSend_EMAC(unsigned short FrameSize)\r
+{\r
+  unsigned int idx;\r
+\r
+  idx = MAC_TXPRODUCEINDEX;\r
+  TX_DESC_CTRL(idx) = FrameSize | TCTRL_LAST;\r
+  if (++idx == NUM_TX_FRAG) idx = 0;\r
+  MAC_TXPRODUCEINDEX = idx;\r
+}\r
+\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/emac.h b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/emac.h
new file mode 100644 (file)
index 0000000..c363421
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/emac.h
@@ -0,0 +1,322 @@
+/*----------------------------------------------------------------------------\r
+ *      LPC2378 Ethernet Definitions\r
+ *----------------------------------------------------------------------------\r
+ *      Name:    EMAC.H\r
+ *      Purpose: Philips LPC2378 EMAC hardware definitions\r
+ *----------------------------------------------------------------------------\r
+ *      Copyright (c) 2006 KEIL - An ARM Company. All rights reserved.\r
+ *---------------------------------------------------------------------------*/\r
+#ifndef __EMAC_H\r
+#define __EMAC_H\r
+\r
+/* MAC address definition.  The MAC address must be unique on the network. */\r
+#define emacETHADDR0 0\r
+#define emacETHADDR1 0xbd\r
+#define emacETHADDR2 0x33\r
+#define emacETHADDR3 0x02\r
+#define emacETHADDR4 0x64\r
+#define emacETHADDR5 0x24\r
+\r
+\r
+/* EMAC Memory Buffer configuration for 16K Ethernet RAM. */\r
+#define NUM_RX_FRAG         4           /* Num.of RX Fragments 4*1536= 6.0kB */\r
+#define NUM_TX_FRAG         2           /* Num.of TX Fragments 2*1536= 3.0kB */\r
+#define ETH_FRAG_SIZE       1536        /* Packet Fragment size 1536 Bytes   */\r
+\r
+#define ETH_MAX_FLEN        1536        /* Max. Ethernet Frame Size          */\r
+\r
+/* EMAC variables located in 16K Ethernet SRAM */\r
+#define RX_DESC_BASE        0x7FE00000\r
+#define RX_STAT_BASE        (RX_DESC_BASE + NUM_RX_FRAG*8)\r
+#define TX_DESC_BASE        (RX_STAT_BASE + NUM_RX_FRAG*8)\r
+#define TX_STAT_BASE        (TX_DESC_BASE + NUM_TX_FRAG*8)\r
+#define RX_BUF_BASE         (TX_STAT_BASE + NUM_TX_FRAG*4)\r
+#define TX_BUF_BASE         (RX_BUF_BASE  + NUM_RX_FRAG*ETH_FRAG_SIZE)\r
+\r
+/* RX and TX descriptor and status definitions. */\r
+#define RX_DESC_PACKET(i)   (*(unsigned int *)(RX_DESC_BASE   + 8*i))\r
+#define RX_DESC_CTRL(i)     (*(unsigned int *)(RX_DESC_BASE+4 + 8*i))\r
+#define RX_STAT_INFO(i)     (*(unsigned int *)(RX_STAT_BASE   + 8*i))\r
+#define RX_STAT_HASHCRC(i)  (*(unsigned int *)(RX_STAT_BASE+4 + 8*i))\r
+#define TX_DESC_PACKET(i)   (*(unsigned int *)(TX_DESC_BASE   + 8*i))\r
+#define TX_DESC_CTRL(i)     (*(unsigned int *)(TX_DESC_BASE+4 + 8*i))\r
+#define TX_STAT_INFO(i)     (*(unsigned int *)(TX_STAT_BASE   + 4*i))\r
+#define RX_BUF(i)           (RX_BUF_BASE + ETH_FRAG_SIZE*i)\r
+#define TX_BUF(i)           (TX_BUF_BASE + ETH_FRAG_SIZE*i)\r
+\r
+/* MAC Configuration Register 1 */\r
+#define MAC1_REC_EN         0x00000001  /* Receive Enable                    */\r
+#define MAC1_PASS_ALL       0x00000002  /* Pass All Receive Frames           */\r
+#define MAC1_RX_FLOWC       0x00000004  /* RX Flow Control                   */\r
+#define MAC1_TX_FLOWC       0x00000008  /* TX Flow Control                   */\r
+#define MAC1_LOOPB          0x00000010  /* Loop Back Mode                    */\r
+#define MAC1_RES_TX         0x00000100  /* Reset TX Logic                    */\r
+#define MAC1_RES_MCS_TX     0x00000200  /* Reset MAC TX Control Sublayer     */\r
+#define MAC1_RES_RX         0x00000400  /* Reset RX Logic                    */\r
+#define MAC1_RES_MCS_RX     0x00000800  /* Reset MAC RX Control Sublayer     */\r
+#define MAC1_SIM_RES        0x00004000  /* Simulation Reset                  */\r
+#define MAC1_SOFT_RES       0x00008000  /* Soft Reset MAC                    */\r
+\r
+/* MAC Configuration Register 2 */\r
+#define MAC2_FULL_DUP       0x00000001  /* Full Duplex Mode                  */\r
+#define MAC2_FRM_LEN_CHK    0x00000002  /* Frame Length Checking             */\r
+#define MAC2_HUGE_FRM_EN    0x00000004  /* Huge Frame Enable                 */\r
+#define MAC2_DLY_CRC        0x00000008  /* Delayed CRC Mode                  */\r
+#define MAC2_CRC_EN         0x00000010  /* Append CRC to every Frame         */\r
+#define MAC2_PAD_EN         0x00000020  /* Pad all Short Frames              */\r
+#define MAC2_VLAN_PAD_EN    0x00000040  /* VLAN Pad Enable                   */\r
+#define MAC2_ADET_PAD_EN    0x00000080  /* Auto Detect Pad Enable            */\r
+#define MAC2_PPREAM_ENF     0x00000100  /* Pure Preamble Enforcement         */\r
+#define MAC2_LPREAM_ENF     0x00000200  /* Long Preamble Enforcement         */\r
+#undef  MAC2_NO_BACKOFF /* Remove compiler warning. */\r
+#define MAC2_NO_BACKOFF     0x00001000  /* No Backoff Algorithm              */\r
+#define MAC2_BACK_PRESSURE  0x00002000  /* Backoff Presurre / No Backoff     */\r
+#define MAC2_EXCESS_DEF     0x00004000  /* Excess Defer                      */\r
+\r
+/* Back-to-Back Inter-Packet-Gap Register */\r
+#define IPGT_FULL_DUP       0x00000015  /* Recommended value for Full Duplex */\r
+#define IPGT_HALF_DUP       0x00000012  /* Recommended value for Half Duplex */\r
+\r
+/* Non Back-to-Back Inter-Packet-Gap Register */\r
+#define IPGR_DEF            0x00000012  /* Recommended value                 */\r
+\r
+/* Collision Window/Retry Register */\r
+#define CLRT_DEF            0x0000370F  /* Default value                     */\r
+\r
+/* PHY Support Register */\r
+#undef SUPP_SPEED   /* Remove compiler warning. */\r
+#define SUPP_SPEED          0x00000100  /* Reduced MII Logic Current Speed   */\r
+#define SUPP_RES_RMII       0x00000800  /* Reset Reduced MII Logic           */\r
+\r
+/* Test Register */\r
+#define TEST_SHCUT_PQUANTA  0x00000001  /* Shortcut Pause Quanta             */\r
+#define TEST_TST_PAUSE      0x00000002  /* Test Pause                        */\r
+#define TEST_TST_BACKP      0x00000004  /* Test Back Pressure                */\r
+\r
+/* MII Management Configuration Register */\r
+#define MCFG_SCAN_INC       0x00000001  /* Scan Increment PHY Address        */\r
+#define MCFG_SUPP_PREAM     0x00000002  /* Suppress Preamble                 */\r
+#define MCFG_CLK_SEL        0x0000001C  /* Clock Select Mask                 */\r
+#define MCFG_RES_MII        0x00008000  /* Reset MII Management Hardware     */\r
+\r
+/* MII Management Command Register */\r
+#undef MCMD_READ   /* Remove compiler warning. */\r
+#define MCMD_READ           0x00000001  /* MII Read                          */\r
+#undef MCMD_SCAN /* Remove compiler warning. */\r
+#define MCMD_SCAN           0x00000002  /* MII Scan continuously             */\r
+\r
+#define MII_WR_TOUT         0x00050000  /* MII Write timeout count           */\r
+#define MII_RD_TOUT         0x00050000  /* MII Read timeout count            */\r
+\r
+/* MII Management Address Register */\r
+#define MADR_REG_ADR        0x0000001F  /* MII Register Address Mask         */\r
+#define MADR_PHY_ADR        0x00001F00  /* PHY Address Mask                  */\r
+\r
+/* MII Management Indicators Register */\r
+#undef MIND_BUSY   /* Remove compiler warning. */\r
+#define MIND_BUSY           0x00000001  /* MII is Busy                       */\r
+#define MIND_SCAN           0x00000002  /* MII Scanning in Progress          */\r
+#define MIND_NOT_VAL        0x00000004  /* MII Read Data not valid           */\r
+#define MIND_MII_LINK_FAIL  0x00000008  /* MII Link Failed                   */\r
+\r
+/* Command Register */\r
+#define CR_RX_EN            0x00000001  /* Enable Receive                    */\r
+#define CR_TX_EN            0x00000002  /* Enable Transmit                   */\r
+#define CR_REG_RES          0x00000008  /* Reset Host Registers              */\r
+#define CR_TX_RES           0x00000010  /* Reset Transmit Datapath           */\r
+#define CR_RX_RES           0x00000020  /* Reset Receive Datapath            */\r
+#define CR_PASS_RUNT_FRM    0x00000040  /* Pass Runt Frames                  */\r
+#define CR_PASS_RX_FILT     0x00000080  /* Pass RX Filter                    */\r
+#define CR_TX_FLOW_CTRL     0x00000100  /* TX Flow Control                   */\r
+#define CR_RMII             0x00000200  /* Reduced MII Interface             */\r
+#define CR_FULL_DUP         0x00000400  /* Full Duplex                       */\r
+\r
+/* Status Register */\r
+#define SR_RX_EN            0x00000001  /* Enable Receive                    */\r
+#define SR_TX_EN            0x00000002  /* Enable Transmit                   */\r
+\r
+/* Transmit Status Vector 0 Register */\r
+#define TSV0_CRC_ERR        0x00000001  /* CRC error                         */\r
+#define TSV0_LEN_CHKERR     0x00000002  /* Length Check Error                */\r
+#define TSV0_LEN_OUTRNG     0x00000004  /* Length Out of Range               */\r
+#define TSV0_DONE           0x00000008  /* Tramsmission Completed            */\r
+#define TSV0_MCAST          0x00000010  /* Multicast Destination             */\r
+#define TSV0_BCAST          0x00000020  /* Broadcast Destination             */\r
+#define TSV0_PKT_DEFER      0x00000040  /* Packet Deferred                   */\r
+#define TSV0_EXC_DEFER      0x00000080  /* Excessive Packet Deferral         */\r
+#define TSV0_EXC_COLL       0x00000100  /* Excessive Collision               */\r
+#define TSV0_LATE_COLL      0x00000200  /* Late Collision Occured            */\r
+#define TSV0_GIANT          0x00000400  /* Giant Frame                       */\r
+#define TSV0_UNDERRUN       0x00000800  /* Buffer Underrun                   */\r
+#define TSV0_BYTES          0x0FFFF000  /* Total Bytes Transferred           */\r
+#define TSV0_CTRL_FRAME     0x10000000  /* Control Frame                     */\r
+#define TSV0_PAUSE          0x20000000  /* Pause Frame                       */\r
+#define TSV0_BACK_PRESS     0x40000000  /* Backpressure Method Applied       */\r
+#define TSV0_VLAN           0x80000000  /* VLAN Frame                        */\r
+\r
+/* Transmit Status Vector 1 Register */\r
+#define TSV1_BYTE_CNT       0x0000FFFF  /* Transmit Byte Count               */\r
+#define TSV1_COLL_CNT       0x000F0000  /* Transmit Collision Count          */\r
+\r
+/* Receive Status Vector Register */\r
+#define RSV_BYTE_CNT        0x0000FFFF  /* Receive Byte Count                */\r
+#define RSV_PKT_IGNORED     0x00010000  /* Packet Previously Ignored         */\r
+#define RSV_RXDV_SEEN       0x00020000  /* RXDV Event Previously Seen        */\r
+#define RSV_CARR_SEEN       0x00040000  /* Carrier Event Previously Seen     */\r
+#define RSV_REC_CODEV       0x00080000  /* Receive Code Violation            */\r
+#define RSV_CRC_ERR         0x00100000  /* CRC Error                         */\r
+#define RSV_LEN_CHKERR      0x00200000  /* Length Check Error                */\r
+#define RSV_LEN_OUTRNG      0x00400000  /* Length Out of Range               */\r
+#define RSV_REC_OK          0x00800000  /* Frame Received OK                 */\r
+#define RSV_MCAST           0x01000000  /* Multicast Frame                   */\r
+#define RSV_BCAST           0x02000000  /* Broadcast Frame                   */\r
+#define RSV_DRIB_NIBB       0x04000000  /* Dribble Nibble                    */\r
+#define RSV_CTRL_FRAME      0x08000000  /* Control Frame                     */\r
+#define RSV_PAUSE           0x10000000  /* Pause Frame                       */\r
+#define RSV_UNSUPP_OPC      0x20000000  /* Unsupported Opcode                */\r
+#define RSV_VLAN            0x40000000  /* VLAN Frame                        */\r
+\r
+/* Flow Control Counter Register */\r
+#define FCC_MIRR_CNT        0x0000FFFF  /* Mirror Counter                    */\r
+#define FCC_PAUSE_TIM       0xFFFF0000  /* Pause Timer                       */\r
+\r
+/* Flow Control Status Register */\r
+#define FCS_MIRR_CNT        0x0000FFFF  /* Mirror Counter Current            */\r
+\r
+/* Receive Filter Control Register */\r
+#define RFC_UCAST_EN        0x00000001  /* Accept Unicast Frames Enable      */\r
+#define RFC_BCAST_EN        0x00000002  /* Accept Broadcast Frames Enable    */\r
+#define RFC_MCAST_EN        0x00000004  /* Accept Multicast Frames Enable    */\r
+#define RFC_UCAST_HASH_EN   0x00000008  /* Accept Unicast Hash Filter Frames */\r
+#define RFC_MCAST_HASH_EN   0x00000010  /* Accept Multicast Hash Filter Fram.*/\r
+#define RFC_PERFECT_EN      0x00000020  /* Accept Perfect Match Enable       */\r
+#define RFC_MAGP_WOL_EN     0x00001000  /* Magic Packet Filter WoL Enable    */\r
+#define RFC_PFILT_WOL_EN    0x00002000  /* Perfect Filter WoL Enable         */\r
+\r
+/* Receive Filter WoL Status/Clear Registers */\r
+#define WOL_UCAST           0x00000001  /* Unicast Frame caused WoL          */\r
+#define WOL_BCAST           0x00000002  /* Broadcast Frame caused WoL        */\r
+#define WOL_MCAST           0x00000004  /* Multicast Frame caused WoL        */\r
+#define WOL_UCAST_HASH      0x00000008  /* Unicast Hash Filter Frame WoL     */\r
+#define WOL_MCAST_HASH      0x00000010  /* Multicast Hash Filter Frame WoL   */\r
+#define WOL_PERFECT         0x00000020  /* Perfect Filter WoL                */\r
+#define WOL_RX_FILTER       0x00000080  /* RX Filter caused WoL              */\r
+#define WOL_MAG_PACKET      0x00000100  /* Magic Packet Filter caused WoL    */\r
+\r
+/* Interrupt Status/Enable/Clear/Set Registers */\r
+#define INT_RX_OVERRUN      0x00000001  /* Overrun Error in RX Queue         */\r
+#define INT_RX_ERR          0x00000002  /* Receive Error                     */\r
+#define INT_RX_FIN          0x00000004  /* RX Finished Process Descriptors   */\r
+#define INT_RX_DONE         0x00000008  /* Receive Done                      */\r
+#define INT_TX_UNDERRUN     0x00000010  /* Transmit Underrun                 */\r
+#define INT_TX_ERR          0x00000020  /* Transmit Error                    */\r
+#define INT_TX_FIN          0x00000040  /* TX Finished Process Descriptors   */\r
+#define INT_TX_DONE         0x00000080  /* Transmit Done                     */\r
+#define INT_SOFT_INT        0x00001000  /* Software Triggered Interrupt      */\r
+#define INT_WAKEUP          0x00002000  /* Wakeup Event Interrupt            */\r
+\r
+/* Power Down Register */\r
+#define PD_POWER_DOWN       0x80000000  /* Power Down MAC                    */\r
+\r
+/* RX Descriptor Control Word */\r
+#define RCTRL_SIZE          0x000007FF  /* Buffer size mask                  */\r
+#define RCTRL_INT           0x80000000  /* Generate RxDone Interrupt         */\r
+\r
+/* RX Status Hash CRC Word */\r
+#define RHASH_SA            0x000001FF  /* Hash CRC for Source Address       */\r
+#define RHASH_DA            0x001FF000  /* Hash CRC for Destination Address  */\r
+\r
+/* RX Status Information Word */\r
+#define RINFO_SIZE          0x000007FF  /* Data size in bytes                */\r
+#define RINFO_CTRL_FRAME    0x00040000  /* Control Frame                     */\r
+#define RINFO_VLAN          0x00080000  /* VLAN Frame                        */\r
+#define RINFO_FAIL_FILT     0x00100000  /* RX Filter Failed                  */\r
+#define RINFO_MCAST         0x00200000  /* Multicast Frame                   */\r
+#define RINFO_BCAST         0x00400000  /* Broadcast Frame                   */\r
+#define RINFO_CRC_ERR       0x00800000  /* CRC Error in Frame                */\r
+#define RINFO_SYM_ERR       0x01000000  /* Symbol Error from PHY             */\r
+#define RINFO_LEN_ERR       0x02000000  /* Length Error                      */\r
+#define RINFO_RANGE_ERR     0x04000000  /* Range Error (exceeded max. size)  */\r
+#define RINFO_ALIGN_ERR     0x08000000  /* Alignment Error                   */\r
+#define RINFO_OVERRUN       0x10000000  /* Receive overrun                   */\r
+#define RINFO_NO_DESCR      0x20000000  /* No new Descriptor available       */\r
+#define RINFO_LAST_FLAG     0x40000000  /* Last Fragment in Frame            */\r
+#define RINFO_ERR           0x80000000  /* Error Occured (OR of all errors)  */\r
+\r
+#define RINFO_ERR_MASK     (RINFO_FAIL_FILT | RINFO_CRC_ERR   | RINFO_SYM_ERR | \\r
+                            RINFO_LEN_ERR   | RINFO_ALIGN_ERR | RINFO_OVERRUN)\r
+\r
+/* TX Descriptor Control Word */\r
+#define TCTRL_SIZE          0x000007FF  /* Size of data buffer in bytes      */\r
+#define TCTRL_OVERRIDE      0x04000000  /* Override Default MAC Registers    */\r
+#define TCTRL_HUGE          0x08000000  /* Enable Huge Frame                 */\r
+#define TCTRL_PAD           0x10000000  /* Pad short Frames to 64 bytes      */\r
+#define TCTRL_CRC           0x20000000  /* Append a hardware CRC to Frame    */\r
+#define TCTRL_LAST          0x40000000  /* Last Descriptor for TX Frame      */\r
+#define TCTRL_INT           0x80000000  /* Generate TxDone Interrupt         */\r
+\r
+/* TX Status Information Word */\r
+#define TINFO_COL_CNT       0x01E00000  /* Collision Count                   */\r
+#define TINFO_DEFER         0x02000000  /* Packet Deferred (not an error)    */\r
+#define TINFO_EXCESS_DEF    0x04000000  /* Excessive Deferral                */\r
+#define TINFO_EXCESS_COL    0x08000000  /* Excessive Collision               */\r
+#define TINFO_LATE_COL      0x10000000  /* Late Collision Occured            */\r
+#define TINFO_UNDERRUN      0x20000000  /* Transmit Underrun                 */\r
+#define TINFO_NO_DESCR      0x40000000  /* No new Descriptor available       */\r
+#define TINFO_ERR           0x80000000  /* Error Occured (OR of all errors)  */\r
+\r
+/* DP83848C PHY Registers */\r
+#define PHY_REG_BMCR        0x00        /* Basic Mode Control Register       */\r
+#define PHY_REG_BMSR        0x01        /* Basic Mode Status Register        */\r
+#define PHY_REG_IDR1        0x02        /* PHY Identifier 1                  */\r
+#define PHY_REG_IDR2        0x03        /* PHY Identifier 2                  */\r
+#define PHY_REG_ANAR        0x04        /* Auto-Negotiation Advertisement    */\r
+#define PHY_REG_ANLPAR      0x05        /* Auto-Neg. Link Partner Abitily    */\r
+#define PHY_REG_ANER        0x06        /* Auto-Neg. Expansion Register      */\r
+#define PHY_REG_ANNPTR      0x07        /* Auto-Neg. Next Page TX            */\r
+\r
+/* PHY Extended Registers */\r
+#define PHY_REG_STS         0x10        /* Status Register                   */\r
+#define PHY_REG_MICR        0x11        /* MII Interrupt Control Register    */\r
+#define PHY_REG_MISR        0x12        /* MII Interrupt Status Register     */\r
+#define PHY_REG_FCSCR       0x14        /* False Carrier Sense Counter       */\r
+#define PHY_REG_RECR        0x15        /* Receive Error Counter             */\r
+#define PHY_REG_PCSR        0x16        /* PCS Sublayer Config. and Status   */\r
+#define PHY_REG_RBR         0x17        /* RMII and Bypass Register          */\r
+#define PHY_REG_LEDCR       0x18        /* LED Direct Control Register       */\r
+#define PHY_REG_PHYCR       0x19        /* PHY Control Register              */\r
+#define PHY_REG_10BTSCR     0x1A        /* 10Base-T Status/Control Register  */\r
+#define PHY_REG_CDCTRL1     0x1B        /* CD Test Control and BIST Extens.  */\r
+#define PHY_REG_EDCR        0x1D        /* Energy Detect Control Register    */\r
+\r
+#define PHY_FULLD_100M      0x2100      /* Full Duplex 100Mbit               */\r
+#define PHY_HALFD_100M      0x2000      /* Half Duplex 100Mbit               */\r
+#define PHY_FULLD_10M       0x0100      /* Full Duplex 10Mbit                */\r
+#define PHY_HALFD_10M       0x0000      /* Half Duplex 10MBit                */\r
+#define PHY_AUTO_NEG        0x3000      /* Select Auto Negotiation           */\r
+\r
+#define DP83848C_DEF_ADR    0x0100      /* Default PHY device address        */\r
+#define DP83848C_ID         0x20005C90  /* PHY Identifier                    */\r
+\r
+// prototypes\r
+portBASE_TYPE           Init_EMAC(void);\r
+unsigned short ReadFrameBE_EMAC(void);\r
+void           CopyToFrame_EMAC(void *Source, unsigned int Size);\r
+void           CopyFromFrame_EMAC(void *Dest, unsigned short Size);\r
+void           DummyReadFrame_EMAC(unsigned short Size);\r
+unsigned short StartReadFrame(void);\r
+void           EndReadFrame(void);\r
+unsigned int   CheckFrameReceived(void);\r
+void           RequestSend(void);\r
+unsigned int   Rdy4Tx(void);\r
+void           DoSend_EMAC(unsigned short FrameSize);\r
+void vEMACWaitForInput( void );\r
+unsigned int uiGetEMACRxData( unsigned char *ucBuffer );\r
+\r
+\r
+#endif\r
+\r
+/*----------------------------------------------------------------------------\r
+ * end of file\r
+ *---------------------------------------------------------------------------*/\r
+\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/http-strings b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/http-strings
new file mode 100644 (file)
index 0000000..0d3c30c
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/http-strings
@@ -0,0 +1,35 @@
+http_http "http://"\r
+http_200 "200 "\r
+http_301 "301 "\r
+http_302 "302 "\r
+http_get "GET "\r
+http_10 "HTTP/1.0"\r
+http_11 "HTTP/1.1"\r
+http_content_type "content-type: "\r
+http_texthtml "text/html"\r
+http_location "location: "\r
+http_host "host: "\r
+http_crnl "\r\n"\r
+http_index_html "/index.html"\r
+http_404_html "/404.html"\r
+http_referer "Referer:"\r
+http_header_200 "HTTP/1.0 200 OK\r\nServer: uIP/1.0 http://www.sics.se/~adam/uip/\r\nConnection: close\r\n"\r
+http_header_404 "HTTP/1.0 404 Not found\r\nServer: uIP/1.0 http://www.sics.se/~adam/uip/\r\nConnection: close\r\n"\r
+http_content_type_plain "Content-type: text/plain\r\n\r\n"\r
+http_content_type_html "Content-type: text/html\r\n\r\n"\r
+http_content_type_css  "Content-type: text/css\r\n\r\n"\r
+http_content_type_text "Content-type: text/text\r\n\r\n"\r
+http_content_type_png  "Content-type: image/png\r\n\r\n"\r
+http_content_type_gif  "Content-type: image/gif\r\n\r\n"\r
+http_content_type_jpg  "Content-type: image/jpeg\r\n\r\n"\r
+http_content_type_binary "Content-type: application/octet-stream\r\n\r\n"\r
+http_html ".html"\r
+http_shtml ".shtml"\r
+http_htm ".htm"\r
+http_css ".css"\r
+http_png ".png"\r
+http_gif ".gif"\r
+http_jpg ".jpg"\r
+http_text ".txt"\r
+http_txt ".txt"\r
+\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/http-strings.c b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/http-strings.c
new file mode 100644 (file)
index 0000000..ef7a41c
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/http-strings.c
@@ -0,0 +1,102 @@
+const char http_http[8] = \r
+/* "http://" */\r
+{0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, };\r
+const char http_200[5] = \r
+/* "200 " */\r
+{0x32, 0x30, 0x30, 0x20, };\r
+const char http_301[5] = \r
+/* "301 " */\r
+{0x33, 0x30, 0x31, 0x20, };\r
+const char http_302[5] = \r
+/* "302 " */\r
+{0x33, 0x30, 0x32, 0x20, };\r
+const char http_get[5] = \r
+/* "GET " */\r
+{0x47, 0x45, 0x54, 0x20, };\r
+const char http_10[9] = \r
+/* "HTTP/1.0" */\r
+{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x30, };\r
+const char http_11[9] = \r
+/* "HTTP/1.1" */\r
+{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x31, };\r
+const char http_content_type[15] = \r
+/* "content-type: " */\r
+{0x63, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, };\r
+const char http_texthtml[10] = \r
+/* "text/html" */\r
+{0x74, 0x65, 0x78, 0x74, 0x2f, 0x68, 0x74, 0x6d, 0x6c, };\r
+const char http_location[11] = \r
+/* "location: " */\r
+{0x6c, 0x6f, 0x63, 0x61, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, };\r
+const char http_host[7] = \r
+/* "host: " */\r
+{0x68, 0x6f, 0x73, 0x74, 0x3a, 0x20, };\r
+const char http_crnl[3] = \r
+/* "\r\n" */\r
+{0xd, 0xa, };\r
+const char http_index_html[12] = \r
+/* "/index.html" */\r
+{0x2f, 0x69, 0x6e, 0x64, 0x65, 0x78, 0x2e, 0x68, 0x74, 0x6d, 0x6c, };\r
+const char http_404_html[10] = \r
+/* "/404.html" */\r
+{0x2f, 0x34, 0x30, 0x34, 0x2e, 0x68, 0x74, 0x6d, 0x6c, };\r
+const char http_referer[9] = \r
+/* "Referer:" */\r
+{0x52, 0x65, 0x66, 0x65, 0x72, 0x65, 0x72, 0x3a, };\r
+const char http_header_200[84] = \r
+/* "HTTP/1.0 200 OK\r\nServer: uIP/1.0 http://www.sics.se/~adam/uip/\r\nConnection: close\r\n" */\r
+{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x32, 0x30, 0x30, 0x20, 0x4f, 0x4b, 0xd, 0xa, 0x53, 0x65, 0x72, 0x76, 0x65, 0x72, 0x3a, 0x20, 0x75, 0x49, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, 0x77, 0x77, 0x77, 0x2e, 0x73, 0x69, 0x63, 0x73, 0x2e, 0x73, 0x65, 0x2f, 0x7e, 0x61, 0x64, 0x61, 0x6d, 0x2f, 0x75, 0x69, 0x70, 0x2f, 0xd, 0xa, 0x43, 0x6f, 0x6e, 0x6e, 0x65, 0x63, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, 0x63, 0x6c, 0x6f, 0x73, 0x65, 0xd, 0xa, };\r
+const char http_header_404[91] = \r
+/* "HTTP/1.0 404 Not found\r\nServer: uIP/1.0 http://www.sics.se/~adam/uip/\r\nConnection: close\r\n" */\r
+{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x34, 0x30, 0x34, 0x20, 0x4e, 0x6f, 0x74, 0x20, 0x66, 0x6f, 0x75, 0x6e, 0x64, 0xd, 0xa, 0x53, 0x65, 0x72, 0x76, 0x65, 0x72, 0x3a, 0x20, 0x75, 0x49, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, 0x77, 0x77, 0x77, 0x2e, 0x73, 0x69, 0x63, 0x73, 0x2e, 0x73, 0x65, 0x2f, 0x7e, 0x61, 0x64, 0x61, 0x6d, 0x2f, 0x75, 0x69, 0x70, 0x2f, 0xd, 0xa, 0x43, 0x6f, 0x6e, 0x6e, 0x65, 0x63, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, 0x63, 0x6c, 0x6f, 0x73, 0x65, 0xd, 0xa, };\r
+const char http_content_type_plain[29] = \r
+/* "Content-type: text/plain\r\n\r\n" */\r
+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x70, 0x6c, 0x61, 0x69, 0x6e, 0xd, 0xa, 0xd, 0xa, };\r
+const char http_content_type_html[28] = \r
+/* "Content-type: text/html\r\n\r\n" */\r
+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x68, 0x74, 0x6d, 0x6c, 0xd, 0xa, 0xd, 0xa, };\r
+const char http_content_type_css [27] = \r
+/* "Content-type: text/css\r\n\r\n" */\r
+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x63, 0x73, 0x73, 0xd, 0xa, 0xd, 0xa, };\r
+const char http_content_type_text[28] = \r
+/* "Content-type: text/text\r\n\r\n" */\r
+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x74, 0x65, 0x78, 0x74, 0xd, 0xa, 0xd, 0xa, };\r
+const char http_content_type_png [28] = \r
+/* "Content-type: image/png\r\n\r\n" */\r
+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x70, 0x6e, 0x67, 0xd, 0xa, 0xd, 0xa, };\r
+const char http_content_type_gif [28] = \r
+/* "Content-type: image/gif\r\n\r\n" */\r
+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x67, 0x69, 0x66, 0xd, 0xa, 0xd, 0xa, };\r
+const char http_content_type_jpg [29] = \r
+/* "Content-type: image/jpeg\r\n\r\n" */\r
+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x6a, 0x70, 0x65, 0x67, 0xd, 0xa, 0xd, 0xa, };\r
+const char http_content_type_binary[43] = \r
+/* "Content-type: application/octet-stream\r\n\r\n" */\r
+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x61, 0x70, 0x70, 0x6c, 0x69, 0x63, 0x61, 0x74, 0x69, 0x6f, 0x6e, 0x2f, 0x6f, 0x63, 0x74, 0x65, 0x74, 0x2d, 0x73, 0x74, 0x72, 0x65, 0x61, 0x6d, 0xd, 0xa, 0xd, 0xa, };\r
+const char http_html[6] = \r
+/* ".html" */\r
+{0x2e, 0x68, 0x74, 0x6d, 0x6c, };\r
+const char http_shtml[7] = \r
+/* ".shtml" */\r
+{0x2e, 0x73, 0x68, 0x74, 0x6d, 0x6c, };\r
+const char http_htm[5] = \r
+/* ".htm" */\r
+{0x2e, 0x68, 0x74, 0x6d, };\r
+const char http_css[5] = \r
+/* ".css" */\r
+{0x2e, 0x63, 0x73, 0x73, };\r
+const char http_png[5] = \r
+/* ".png" */\r
+{0x2e, 0x70, 0x6e, 0x67, };\r
+const char http_gif[5] = \r
+/* ".gif" */\r
+{0x2e, 0x67, 0x69, 0x66, };\r
+const char http_jpg[5] = \r
+/* ".jpg" */\r
+{0x2e, 0x6a, 0x70, 0x67, };\r
+const char http_text[5] = \r
+/* ".txt" */\r
+{0x2e, 0x74, 0x78, 0x74, };\r
+const char http_txt[5] = \r
+/* ".txt" */\r
+{0x2e, 0x74, 0x78, 0x74, };\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/http-strings.h b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/http-strings.h
new file mode 100644 (file)
index 0000000..acbe7e1
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/http-strings.h
@@ -0,0 +1,34 @@
+extern const char http_http[8];\r
+extern const char http_200[5];\r
+extern const char http_301[5];\r
+extern const char http_302[5];\r
+extern const char http_get[5];\r
+extern const char http_10[9];\r
+extern const char http_11[9];\r
+extern const char http_content_type[15];\r
+extern const char http_texthtml[10];\r
+extern const char http_location[11];\r
+extern const char http_host[7];\r
+extern const char http_crnl[3];\r
+extern const char http_index_html[12];\r
+extern const char http_404_html[10];\r
+extern const char http_referer[9];\r
+extern const char http_header_200[84];\r
+extern const char http_header_404[91];\r
+extern const char http_content_type_plain[29];\r
+extern const char http_content_type_html[28];\r
+extern const char http_content_type_css [27];\r
+extern const char http_content_type_text[28];\r
+extern const char http_content_type_png [28];\r
+extern const char http_content_type_gif [28];\r
+extern const char http_content_type_jpg [29];\r
+extern const char http_content_type_binary[43];\r
+extern const char http_html[6];\r
+extern const char http_shtml[7];\r
+extern const char http_htm[5];\r
+extern const char http_css[5];\r
+extern const char http_png[5];\r
+extern const char http_gif[5];\r
+extern const char http_jpg[5];\r
+extern const char http_text[5];\r
+extern const char http_txt[5];\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/httpd-cgi.c b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/httpd-cgi.c
new file mode 100644 (file)
index 0000000..62795e7
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/httpd-cgi.c
@@ -0,0 +1,276 @@
+/**\r
+ * \addtogroup httpd\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * \file\r
+ *         Web server script interface\r
+ * \author\r
+ *         Adam Dunkels <adam@sics.se>\r
+ *\r
+ */\r
+\r
+/*\r
+ * Copyright (c) 2001-2006, Adam Dunkels.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions\r
+ * are met:\r
+ * 1. Redistributions of source code must retain the above copyright\r
+ *    notice, this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright\r
+ *    notice, this list of conditions and the following disclaimer in the\r
+ *    documentation and/or other materials provided with the distribution.\r
+ * 3. The name of the author may not be used to endorse or promote\r
+ *    products derived from this software without specific prior\r
+ *    written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS\r
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\r
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY\r
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE\r
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\r
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,\r
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\r
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+ * This file is part of the uIP TCP/IP stack.\r
+ *\r
+ * $Id: httpd-cgi.c,v 1.2 2006/06/11 21:46:37 adam Exp $\r
+ *\r
+ */\r
+\r
+#include "uip.h"\r
+#include "psock.h"\r
+#include "httpd.h"\r
+#include "httpd-cgi.h"\r
+#include "httpd-fs.h"\r
+\r
+#include <stdio.h>\r
+#include <string.h>\r
+\r
+HTTPD_CGI_CALL(file, "file-stats", file_stats);\r
+HTTPD_CGI_CALL(tcp, "tcp-connections", tcp_stats);\r
+HTTPD_CGI_CALL(net, "net-stats", net_stats);\r
+HTTPD_CGI_CALL(rtos, "rtos-stats", rtos_stats );\r
+HTTPD_CGI_CALL(io, "led-io", led_io );\r
+\r
+\r
+static const struct httpd_cgi_call *calls[] = { &file, &tcp, &net, &rtos, &io, NULL };\r
+\r
+/*---------------------------------------------------------------------------*/\r
+static\r
+PT_THREAD(nullfunction(struct httpd_state *s, char *ptr))\r
+{\r
+  PSOCK_BEGIN(&s->sout);\r
+  PSOCK_END(&s->sout);\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+httpd_cgifunction\r
+httpd_cgi(char *name)\r
+{\r
+  const struct httpd_cgi_call **f;\r
+\r
+  /* Find the matching name in the table, return the function. */\r
+  for(f = calls; *f != NULL; ++f) {\r
+    if(strncmp((*f)->name, name, strlen((*f)->name)) == 0) {\r
+      return (*f)->function;\r
+    }\r
+  }\r
+  return nullfunction;\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static unsigned short\r
+generate_file_stats(void *arg)\r
+{\r
+  char *f = (char *)arg;\r
+  return snprintf((char *)uip_appdata, UIP_APPDATA_SIZE, "%5u", httpd_fs_count(f));\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static\r
+PT_THREAD(file_stats(struct httpd_state *s, char *ptr))\r
+{\r
+  PSOCK_BEGIN(&s->sout);\r
+\r
+  PSOCK_GENERATOR_SEND(&s->sout, generate_file_stats, strchr(ptr, ' ') + 1);\r
+  \r
+  PSOCK_END(&s->sout);\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static const char closed[] =   /*  "CLOSED",*/\r
+{0x43, 0x4c, 0x4f, 0x53, 0x45, 0x44, 0};\r
+static const char syn_rcvd[] = /*  "SYN-RCVD",*/\r
+{0x53, 0x59, 0x4e, 0x2d, 0x52, 0x43, 0x56,\r
+ 0x44,  0};\r
+static const char syn_sent[] = /*  "SYN-SENT",*/\r
+{0x53, 0x59, 0x4e, 0x2d, 0x53, 0x45, 0x4e,\r
+ 0x54,  0};\r
+static const char established[] = /*  "ESTABLISHED",*/\r
+{0x45, 0x53, 0x54, 0x41, 0x42, 0x4c, 0x49, 0x53, 0x48,\r
+ 0x45, 0x44, 0};\r
+static const char fin_wait_1[] = /*  "FIN-WAIT-1",*/\r
+{0x46, 0x49, 0x4e, 0x2d, 0x57, 0x41, 0x49,\r
+ 0x54, 0x2d, 0x31, 0};\r
+static const char fin_wait_2[] = /*  "FIN-WAIT-2",*/\r
+{0x46, 0x49, 0x4e, 0x2d, 0x57, 0x41, 0x49,\r
+ 0x54, 0x2d, 0x32, 0};\r
+static const char closing[] = /*  "CLOSING",*/\r
+{0x43, 0x4c, 0x4f, 0x53, 0x49,\r
+ 0x4e, 0x47, 0};\r
+static const char time_wait[] = /*  "TIME-WAIT,"*/\r
+{0x54, 0x49, 0x4d, 0x45, 0x2d, 0x57, 0x41,\r
+ 0x49, 0x54, 0};\r
+static const char last_ack[] = /*  "LAST-ACK"*/\r
+{0x4c, 0x41, 0x53, 0x54, 0x2d, 0x41, 0x43,\r
+ 0x4b, 0};\r
+\r
+static const char *states[] = {\r
+  closed,\r
+  syn_rcvd,\r
+  syn_sent,\r
+  established,\r
+  fin_wait_1,\r
+  fin_wait_2,\r
+  closing,\r
+  time_wait,\r
+  last_ack};\r
+  \r
+\r
+static unsigned short\r
+generate_tcp_stats(void *arg)\r
+{\r
+  struct uip_conn *conn;\r
+  struct httpd_state *s = (struct httpd_state *)arg;\r
+    \r
+  conn = &uip_conns[s->count];\r
+  return snprintf((char *)uip_appdata, UIP_APPDATA_SIZE,\r
+                "<tr><td>%d</td><td>%u.%u.%u.%u:%u</td><td>%s</td><td>%u</td><td>%u</td><td>%c %c</td></tr>\r\n",\r
+                htons(conn->lport),\r
+                htons(conn->ripaddr[0]) >> 8,\r
+                htons(conn->ripaddr[0]) & 0xff,\r
+                htons(conn->ripaddr[1]) >> 8,\r
+                htons(conn->ripaddr[1]) & 0xff,\r
+                htons(conn->rport),\r
+                states[conn->tcpstateflags & UIP_TS_MASK],\r
+                conn->nrtx,\r
+                conn->timer,\r
+                (uip_outstanding(conn))? '*':' ',\r
+                (uip_stopped(conn))? '!':' ');\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static\r
+PT_THREAD(tcp_stats(struct httpd_state *s, char *ptr))\r
+{\r
+  \r
+  PSOCK_BEGIN(&s->sout);\r
+\r
+  for(s->count = 0; s->count < UIP_CONNS; ++s->count) {\r
+    if((uip_conns[s->count].tcpstateflags & UIP_TS_MASK) != UIP_CLOSED) {\r
+      PSOCK_GENERATOR_SEND(&s->sout, generate_tcp_stats, s);\r
+    }\r
+  }\r
+\r
+  PSOCK_END(&s->sout);\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static unsigned short\r
+generate_net_stats(void *arg)\r
+{\r
+  struct httpd_state *s = (struct httpd_state *)arg;\r
+  return snprintf((char *)uip_appdata, UIP_APPDATA_SIZE,\r
+                 "%5u\n", ((uip_stats_t *)&uip_stat)[s->count]);\r
+}\r
+\r
+static\r
+PT_THREAD(net_stats(struct httpd_state *s, char *ptr))\r
+{\r
+  PSOCK_BEGIN(&s->sout);\r
+\r
+#if UIP_STATISTICS\r
+\r
+  for(s->count = 0; s->count < sizeof(uip_stat) / sizeof(uip_stats_t);\r
+      ++s->count) {\r
+    PSOCK_GENERATOR_SEND(&s->sout, generate_net_stats, s);\r
+  }\r
+  \r
+#endif /* UIP_STATISTICS */\r
+  \r
+  PSOCK_END(&s->sout);\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+\r
+extern void vTaskList( signed char *pcWriteBuffer );\r
+static char cCountBuf[ 32 ];\r
+long lRefreshCount = 0;\r
+static unsigned short\r
+generate_rtos_stats(void *arg)\r
+{\r
+       lRefreshCount++;\r
+       sprintf( cCountBuf, "<p><br>Refresh count = %ld", lRefreshCount );\r
+    vTaskList( uip_appdata );\r
+       strcat( uip_appdata, cCountBuf );\r
+  \r
+       return strlen( uip_appdata );\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+\r
+\r
+static\r
+PT_THREAD(rtos_stats(struct httpd_state *s, char *ptr))\r
+{\r
+  PSOCK_BEGIN(&s->sout);\r
+  PSOCK_GENERATOR_SEND(&s->sout, generate_rtos_stats, NULL);  \r
+  PSOCK_END(&s->sout);\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+\r
+char *pcStatus[ 3 ];\r
+unsigned long ulString;\r
+extern unsigned long uxParTextGetLED( unsigned long uxLED );\r
+\r
+static unsigned short generate_io_state( void *arg )\r
+{\r
+       for( ulString = 0; ulString < 4; ulString++ )\r
+       {\r
+               if( uxParTextGetLED( ulString + 5 ) )\r
+               {\r
+                       pcStatus[ ulString ] = "checked";\r
+               }\r
+               else\r
+               {\r
+                       pcStatus[ ulString ] = "";\r
+               }\r
+       }\r
+\r
+       sprintf( uip_appdata,\r
+               "<input type=\"checkbox\" name=\"LED0\" value=\"1\" %s>LED 2.5,"\\r
+               "<input type=\"checkbox\" name=\"LED1\" value=\"1\" %s>LED 2.6,"\\r
+               "<input type=\"checkbox\" name=\"LED2\" value=\"1\" %s>LED 2.7"\\r
+               "<p>"\\r
+               "<input type=\"text\" name=\"LCD\" value=\"Enter LCD text\" size=\"16\">",\r
+               pcStatus[ 0 ], \r
+               pcStatus[ 1 ], \r
+               pcStatus[ 2 ] );\r
+\r
+       return strlen( uip_appdata );\r
+}\r
+\r
+static PT_THREAD(led_io(struct httpd_state *s, char *ptr))\r
+{\r
+  PSOCK_BEGIN(&s->sout);\r
+  PSOCK_GENERATOR_SEND(&s->sout, generate_io_state, NULL);\r
+  PSOCK_END(&s->sout);\r
+}\r
+\r
+/** @} */\r
+\r
+\r
+\r
+\r
+\r
+\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/httpd-cgi.h b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/httpd-cgi.h
new file mode 100644 (file)
index 0000000..7ae9283
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/httpd-cgi.h
@@ -0,0 +1,84 @@
+/**\r
+ * \addtogroup httpd\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * \file\r
+ *         Web server script interface header file\r
+ * \author\r
+ *         Adam Dunkels <adam@sics.se>\r
+ *\r
+ */\r
+\r
+\r
+\r
+/*\r
+ * Copyright (c) 2001, Adam Dunkels.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions\r
+ * are met:\r
+ * 1. Redistributions of source code must retain the above copyright\r
+ *    notice, this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright\r
+ *    notice, this list of conditions and the following disclaimer in the\r
+ *    documentation and/or other materials provided with the distribution.\r
+ * 3. The name of the author may not be used to endorse or promote\r
+ *    products derived from this software without specific prior\r
+ *    written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS\r
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\r
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY\r
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE\r
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\r
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,\r
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\r
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+ * This file is part of the uIP TCP/IP stack.\r
+ *\r
+ * $Id: httpd-cgi.h,v 1.2 2006/06/11 21:46:38 adam Exp $\r
+ *\r
+ */\r
+\r
+#ifndef __HTTPD_CGI_H__\r
+#define __HTTPD_CGI_H__\r
+\r
+#include "psock.h"\r
+#include "httpd.h"\r
+\r
+typedef PT_THREAD((* httpd_cgifunction)(struct httpd_state *, char *));\r
+\r
+httpd_cgifunction httpd_cgi(char *name);\r
+\r
+struct httpd_cgi_call {\r
+  const char *name;\r
+  const httpd_cgifunction function;\r
+};\r
+\r
+/**\r
+ * \brief      HTTPD CGI function declaration\r
+ * \param name The C variable name of the function\r
+ * \param str  The string name of the function, used in the script file\r
+ * \param function A pointer to the function that implements it\r
+ *\r
+ *             This macro is used for declaring a HTTPD CGI\r
+ *             function. This function is then added to the list of\r
+ *             HTTPD CGI functions with the httpd_cgi_add() function.\r
+ *\r
+ * \hideinitializer\r
+ */\r
+#define HTTPD_CGI_CALL(name, str, function) \\r
+static PT_THREAD(function(struct httpd_state *, char *)); \\r
+static const struct httpd_cgi_call name = {str, function}\r
+\r
+void httpd_cgi_init(void);\r
+#endif /* __HTTPD_CGI_H__ */\r
+\r
+/** @} */\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/httpd-fs.c b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/httpd-fs.c
new file mode 100644 (file)
index 0000000..dc4aef0
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/httpd-fs.c
@@ -0,0 +1,132 @@
+/*\r
+ * Copyright (c) 2001, Swedish Institute of Computer Science.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions\r
+ * are met:\r
+ * 1. Redistributions of source code must retain the above copyright\r
+ *    notice, this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright\r
+ *    notice, this list of conditions and the following disclaimer in the\r
+ *    documentation and/or other materials provided with the distribution.\r
+ * 3. Neither the name of the Institute nor the names of its contributors\r
+ *    may be used to endorse or promote products derived from this software\r
+ *    without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND\r
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE\r
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\r
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY\r
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF\r
+ * SUCH DAMAGE.\r
+ *\r
+ * This file is part of the lwIP TCP/IP stack.\r
+ *\r
+ * Author: Adam Dunkels <adam@sics.se>\r
+ *\r
+ * $Id: httpd-fs.c,v 1.1 2006/06/07 09:13:08 adam Exp $\r
+ */\r
+\r
+#include "httpd.h"\r
+#include "httpd-fs.h"\r
+#include "httpd-fsdata.h"\r
+\r
+#ifndef NULL\r
+#define NULL 0\r
+#endif /* NULL */\r
+\r
+#include "httpd-fsdata.c"\r
+\r
+#if HTTPD_FS_STATISTICS\r
+static u16_t count[HTTPD_FS_NUMFILES];\r
+#endif /* HTTPD_FS_STATISTICS */\r
+\r
+/*-----------------------------------------------------------------------------------*/\r
+static u8_t\r
+httpd_fs_strcmp(const char *str1, const char *str2)\r
+{\r
+  u8_t i;\r
+  i = 0;\r
+ loop:\r
+\r
+  if(str2[i] == 0 ||\r
+     str1[i] == '\r' ||\r
+     str1[i] == '\n') {\r
+    return 0;\r
+  }\r
+\r
+  if(str1[i] != str2[i]) {\r
+    return 1;\r
+  }\r
+\r
+\r
+  ++i;\r
+  goto loop;\r
+}\r
+/*-----------------------------------------------------------------------------------*/\r
+int\r
+httpd_fs_open(const char *name, struct httpd_fs_file *file)\r
+{\r
+#if HTTPD_FS_STATISTICS\r
+  u16_t i = 0;\r
+#endif /* HTTPD_FS_STATISTICS */\r
+  struct httpd_fsdata_file_noconst *f;\r
+\r
+  for(f = (struct httpd_fsdata_file_noconst *)HTTPD_FS_ROOT;\r
+      f != NULL;\r
+      f = (struct httpd_fsdata_file_noconst *)f->next) {\r
+\r
+    if(httpd_fs_strcmp(name, f->name) == 0) {\r
+      file->data = f->data;\r
+      file->len = f->len;\r
+#if HTTPD_FS_STATISTICS\r
+      ++count[i];\r
+#endif /* HTTPD_FS_STATISTICS */\r
+      return 1;\r
+    }\r
+#if HTTPD_FS_STATISTICS\r
+    ++i;\r
+#endif /* HTTPD_FS_STATISTICS */\r
+\r
+  }\r
+  return 0;\r
+}\r
+/*-----------------------------------------------------------------------------------*/\r
+void\r
+httpd_fs_init(void)\r
+{\r
+#if HTTPD_FS_STATISTICS\r
+  u16_t i;\r
+  for(i = 0; i < HTTPD_FS_NUMFILES; i++) {\r
+    count[i] = 0;\r
+  }\r
+#endif /* HTTPD_FS_STATISTICS */\r
+}\r
+/*-----------------------------------------------------------------------------------*/\r
+#if HTTPD_FS_STATISTICS\r
+u16_t httpd_fs_count\r
+(char *name)\r
+{\r
+  struct httpd_fsdata_file_noconst *f;\r
+  u16_t i;\r
+\r
+  i = 0;\r
+  for(f = (struct httpd_fsdata_file_noconst *)HTTPD_FS_ROOT;\r
+      f != NULL;\r
+      f = (struct httpd_fsdata_file_noconst *)f->next) {\r
+\r
+    if(httpd_fs_strcmp(name, f->name) == 0) {\r
+      return count[i];\r
+    }\r
+    ++i;\r
+  }\r
+  return 0;\r
+}\r
+#endif /* HTTPD_FS_STATISTICS */\r
+/*-----------------------------------------------------------------------------------*/\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/httpd-fs.h b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/httpd-fs.h
new file mode 100644 (file)
index 0000000..b594eea
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/httpd-fs.h
@@ -0,0 +1,57 @@
+/*\r
+ * Copyright (c) 2001, Swedish Institute of Computer Science.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions\r
+ * are met:\r
+ * 1. Redistributions of source code must retain the above copyright\r
+ *    notice, this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright\r
+ *    notice, this list of conditions and the following disclaimer in the\r
+ *    documentation and/or other materials provided with the distribution.\r
+ * 3. Neither the name of the Institute nor the names of its contributors\r
+ *    may be used to endorse or promote products derived from this software\r
+ *    without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND\r
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE\r
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\r
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY\r
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF\r
+ * SUCH DAMAGE.\r
+ *\r
+ * This file is part of the lwIP TCP/IP stack.\r
+ *\r
+ * Author: Adam Dunkels <adam@sics.se>\r
+ *\r
+ * $Id: httpd-fs.h,v 1.1 2006/06/07 09:13:08 adam Exp $\r
+ */\r
+#ifndef __HTTPD_FS_H__\r
+#define __HTTPD_FS_H__\r
+\r
+#define HTTPD_FS_STATISTICS 1\r
+\r
+struct httpd_fs_file {\r
+  char *data;\r
+  int len;\r
+};\r
+\r
+/* file must be allocated by caller and will be filled in\r
+   by the function. */\r
+int httpd_fs_open(const char *name, struct httpd_fs_file *file);\r
+\r
+#ifdef HTTPD_FS_STATISTICS\r
+#if HTTPD_FS_STATISTICS == 1\r
+u16_t httpd_fs_count(char *name);\r
+#endif /* HTTPD_FS_STATISTICS */\r
+#endif /* HTTPD_FS_STATISTICS */\r
+\r
+void httpd_fs_init(void);\r
+\r
+#endif /* __HTTPD_FS_H__ */\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/httpd-fs/404.html b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/httpd-fs/404.html
new file mode 100644 (file)
index 0000000..43e7f4c
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/httpd-fs/404.html
@@ -0,0 +1,8 @@
+<html>\r
+  <body bgcolor="white">\r
+    <center>\r
+      <h1>404 - file not found</h1>\r
+      <h3>Go <a href="/">here</a> instead.</h3>\r
+    </center>\r
+  </body>\r
+</html>
\ No newline at end of file

diff --git a/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/httpd-fs/index.html b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/httpd-fs/index.html
new file mode 100644 (file)
index 0000000..1d3bbee
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/httpd-fs/index.html
@@ -0,0 +1,13 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">\r
+<html>\r
+  <head>\r
+    <title>FreeRTOS.org uIP WEB server demo</title>\r
+  </head>\r
+  <BODY onLoad="window.setTimeout(&quot;location.href='index.shtml'&quot;,100)"bgcolor="#CCCCff">\r
+<font face="arial">\r
+Loading index.shtml.  Click <a href="index.shtml">here</a> if not automatically redirected.\r
+</font>\r
+</font>\r
+</body>\r
+</html>\r
+\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/httpd-fs/index.shtml b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/httpd-fs/index.shtml
new file mode 100644 (file)
index 0000000..0ce405b
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/httpd-fs/index.shtml
@@ -0,0 +1,20 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">\r
+<html>\r
+  <head>\r
+    <title>FreeRTOS.org uIP WEB server demo</title>\r
+  </head>\r
+  <BODY onLoad="window.setTimeout(&quot;location.href='index.shtml'&quot;,2000)"bgcolor="#CCCCff">\r
+<font face="arial">\r
+<a href="index.shtml">RTOS Stats</a> <b>|</b> <a href="stats.shtml">TCP Stats</a> <b>|</b> <a href="tcp.shtml">Connections</a> <b>|</b> <a href="http://www.freertos.org/">FreeRTOS.org Homepage</a> <b>|</b> <a href="io.shtml">IO</a>\r
+<br><p>\r
+<hr>\r
+<br><p>\r
+<h2>Task statistics</h2>\r
+Page will refresh evey 2 seconds.<p>\r
+<font face="courier"><pre>Task          State  Priority  Stack #<br>************************************************<br>\r
+%! rtos-stats\r
+</pre></font>\r
+</font>\r
+</body>\r
+</html>\r
+\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/httpd-fs/io.shtml b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/httpd-fs/io.shtml
new file mode 100644 (file)
index 0000000..0ffdbff
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/httpd-fs/io.shtml
@@ -0,0 +1,28 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">\r
+<html>\r
+  <head>\r
+    <title>FreeRTOS.org uIP WEB server demo</title>\r
+  </head>\r
+  <BODY bgcolor="#CCCCff">\r
+<font face="arial">\r
+<a href="index.shtml">RTOS Stats</a> <b>|</b> <a href="stats.shtml">TCP Stats</a> <b>|</b> <a href="tcp.shtml">Connections</a> <b>|</b> <a href="http://www.freertos.org/">FreeRTOS.org Homepage</a> <b>|</b> <a href="io.shtml">IO</a>\r
+<br><p>\r
+<hr>\r
+<b>LED and LCD IO</b><br>\r
+\r
+<p>\r
+\r
+Use the check boxes to select the LED's to turn on or off, enter text to display on the LCD, then click "Update IO".\r
+\r
+\r
+<p>\r
+<form name="aForm" action="/io.shtml" method="get">\r
+%! led-io\r
+<p>\r
+<input type="submit" value="Update IO">\r
+</form>\r
+<br><p>\r
+</font>\r
+</body>\r
+</html>\r
+\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/httpd-fs/stats.shtml b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/httpd-fs/stats.shtml
new file mode 100644 (file)
index 0000000..d762f40
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/httpd-fs/stats.shtml
@@ -0,0 +1,41 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">\r
+<html>\r
+  <head>\r
+    <title>FreeRTOS.org uIP WEB server demo</title>\r
+  </head>\r
+  <BODY bgcolor="#CCCCff">\r
+<font face="arial">\r
+<a href="index.shtml">RTOS Stats</a> <b>|</b> <a href="stats.shtml">TCP Stats</a> <b>|</b> <a href="tcp.shtml">Connections</a> <b>|</b> <a href="http://www.freertos.org/">FreeRTOS.org Homepage</a> <b>|</b> <a href="io.shtml">IO</a>\r
+<br><p>\r
+<hr>\r
+<br><p>\r
+<h2>Network statistics</h2>\r
+<table width="300" border="0">\r
+<tr><td align="left"><font face="courier"><pre>\r
+IP           Packets dropped\r
+             Packets received\r
+             Packets sent\r
+IP errors    IP version/header length\r
+             IP length, high byte\r
+             IP length, low byte\r
+             IP fragments\r
+             Header checksum\r
+             Wrong protocol\r
+ICMP        Packets dropped\r
+             Packets received\r
+             Packets sent\r
+             Type errors\r
+TCP          Packets dropped\r
+             Packets received\r
+             Packets sent\r
+             Checksum errors\r
+             Data packets without ACKs\r
+             Resets\r
+             Retransmissions\r
+            No connection avaliable\r
+            Connection attempts to closed ports\r
+</pre></font></td><td><pre>%! net-stats\r
+</pre></table>\r
+</font>\r
+</body>\r
+</html>\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/httpd-fs/tcp.shtml b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/httpd-fs/tcp.shtml
new file mode 100644 (file)
index 0000000..654d61f
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/httpd-fs/tcp.shtml
@@ -0,0 +1,21 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">\r
+<html>\r
+  <head>\r
+    <title>FreeRTOS.org uIP WEB server demo</title>\r
+  </head>\r
+  <BODY bgcolor="#CCCCff">\r
+<font face="arial">\r
+<a href="index.shtml">RTOS Stats</a> <b>|</b> <a href="stats.shtml">TCP Stats</a> <b>|</b> <a href="tcp.shtml">Connections</a> <b>|</b> <a href="http://www.freertos.org/">FreeRTOS.org Homepage</a> <b>|</b> <a href="io.shtml">IO</a>\r
+<br><p>\r
+<hr>\r
+<br>\r
+<h2>Network connections</h2>\r
+<p>\r
+<table>\r
+<tr><th>Local</th><th>Remote</th><th>State</th><th>Retransmissions</th><th>Timer</th><th>Flags</th></tr>\r
+%! tcp-connections\r
+</pre></font>\r
+</font>\r
+</body>\r
+</html>\r
+\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/httpd-fsdata.c b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/httpd-fsdata.c
new file mode 100644 (file)
index 0000000..e7e29e3
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/httpd-fsdata.c
@@ -0,0 +1,470 @@
+static const unsigned char data_404_html[] = {\r
+       /* /404.html */\r
+       0x2f, 0x34, 0x30, 0x34, 0x2e, 0x68, 0x74, 0x6d, 0x6c, 0,\r
+       0x3c, 0x68, 0x74, 0x6d, 0x6c, 0x3e, 0xd, 0xa, 0x20, 0x20, \r
+       0x3c, 0x62, 0x6f, 0x64, 0x79, 0x20, 0x62, 0x67, 0x63, 0x6f, \r
+       0x6c, 0x6f, 0x72, 0x3d, 0x22, 0x77, 0x68, 0x69, 0x74, 0x65, \r
+       0x22, 0x3e, 0xd, 0xa, 0x20, 0x20, 0x20, 0x20, 0x3c, 0x63, \r
+       0x65, 0x6e, 0x74, 0x65, 0x72, 0x3e, 0xd, 0xa, 0x20, 0x20, \r
+       0x20, 0x20, 0x20, 0x20, 0x3c, 0x68, 0x31, 0x3e, 0x34, 0x30, \r
+       0x34, 0x20, 0x2d, 0x20, 0x66, 0x69, 0x6c, 0x65, 0x20, 0x6e, \r
+       0x6f, 0x74, 0x20, 0x66, 0x6f, 0x75, 0x6e, 0x64, 0x3c, 0x2f, \r
+       0x68, 0x31, 0x3e, 0xd, 0xa, 0x20, 0x20, 0x20, 0x20, 0x20, \r
+       0x20, 0x3c, 0x68, 0x33, 0x3e, 0x47, 0x6f, 0x20, 0x3c, 0x61, \r
+       0x20, 0x68, 0x72, 0x65, 0x66, 0x3d, 0x22, 0x2f, 0x22, 0x3e, \r
+       0x68, 0x65, 0x72, 0x65, 0x3c, 0x2f, 0x61, 0x3e, 0x20, 0x69, \r
+       0x6e, 0x73, 0x74, 0x65, 0x61, 0x64, 0x2e, 0x3c, 0x2f, 0x68, \r
+       0x33, 0x3e, 0xd, 0xa, 0x20, 0x20, 0x20, 0x20, 0x3c, 0x2f, \r
+       0x63, 0x65, 0x6e, 0x74, 0x65, 0x72, 0x3e, 0xd, 0xa, 0x20, \r
+       0x20, 0x3c, 0x2f, 0x62, 0x6f, 0x64, 0x79, 0x3e, 0xd, 0xa, \r
+       0x3c, 0x2f, 0x68, 0x74, 0x6d, 0x6c, 0x3e, 0};\r
+\r
+static const unsigned char data_index_html[] = {\r
+       /* /index.html */\r
+       0x2f, 0x69, 0x6e, 0x64, 0x65, 0x78, 0x2e, 0x68, 0x74, 0x6d, 0x6c, 0,\r
+       0x3c, 0x21, 0x44, 0x4f, 0x43, 0x54, 0x59, 0x50, 0x45, 0x20, \r
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+       0x43, 0x20, 0x22, 0x2d, 0x2f, 0x2f, 0x57, 0x33, 0x43, 0x2f, \r
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+       0x34, 0x2e, 0x30, 0x31, 0x20, 0x54, 0x72, 0x61, 0x6e, 0x73, \r
+       0x69, 0x74, 0x69, 0x6f, 0x6e, 0x61, 0x6c, 0x2f, 0x2f, 0x45, \r
+       0x4e, 0x22, 0x20, 0x22, 0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, \r
+       0x2f, 0x77, 0x77, 0x77, 0x2e, 0x77, 0x33, 0x2e, 0x6f, 0x72, \r
+       0x67, 0x2f, 0x54, 0x52, 0x2f, 0x68, 0x74, 0x6d, 0x6c, 0x34, \r
+       0x2f, 0x6c, 0x6f, 0x6f, 0x73, 0x65, 0x2e, 0x64, 0x74, 0x64, \r
+       0x22, 0x3e, 0xd, 0xa, 0x3c, 0x68, 0x74, 0x6d, 0x6c, 0x3e, \r
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+       0xd, 0xa, 0x20, 0x20, 0x20, 0x20, 0x3c, 0x74, 0x69, 0x74, \r
+       0x6c, 0x65, 0x3e, 0x46, 0x72, 0x65, 0x65, 0x52, 0x54, 0x4f, \r
+       0x53, 0x2e, 0x6f, 0x72, 0x67, 0x20, 0x75, 0x49, 0x50, 0x20, \r
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+       0x20, 0x66, 0x61, 0x63, 0x65, 0x3d, 0x22, 0x61, 0x72, 0x69, \r
+       0x61, 0x6c, 0x22, 0x3e, 0xd, 0xa, 0x4c, 0x6f, 0x61, 0x64, \r
+       0x69, 0x6e, 0x67, 0x20, 0x69, 0x6e, 0x64, 0x65, 0x78, 0x2e, \r
+       0x73, 0x68, 0x74, 0x6d, 0x6c, 0x2e, 0x20, 0x20, 0x43, 0x6c, \r
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+       0x66, 0x3d, 0x22, 0x69, 0x6e, 0x64, 0x65, 0x78, 0x2e, 0x73, \r
+       0x68, 0x74, 0x6d, 0x6c, 0x22, 0x3e, 0x68, 0x65, 0x72, 0x65, \r
+       0x3c, 0x2f, 0x61, 0x3e, 0x20, 0x69, 0x66, 0x20, 0x6e, 0x6f, \r
+       0x74, 0x20, 0x61, 0x75, 0x74, 0x6f, 0x6d, 0x61, 0x74, 0x69, \r
+       0x63, 0x61, 0x6c, 0x6c, 0x79, 0x20, 0x72, 0x65, 0x64, 0x69, \r
+       0x72, 0x65, 0x63, 0x74, 0x65, 0x64, 0x2e, 0xd, 0xa, 0x3c, \r
+       0x2f, 0x66, 0x6f, 0x6e, 0x74, 0x3e, 0xd, 0xa, 0x3c, 0x2f, \r
+       0x66, 0x6f, 0x6e, 0x74, 0x3e, 0xd, 0xa, 0x3c, 0x2f, 0x62, \r
+       0x6f, 0x64, 0x79, 0x3e, 0xd, 0xa, 0x3c, 0x2f, 0x68, 0x74, \r
+       0x6d, 0x6c, 0x3e, 0xd, 0xa, 0xd, 0xa, 0};\r
+\r
+static const unsigned char data_index_shtml[] = {\r
+       /* /index.shtml */\r
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+\r
+static const unsigned char data_io_shtml[] = {\r
+       /* /io.shtml */\r
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+\r
+static const unsigned char data_stats_shtml[] = {\r
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+       0x74, 0x73, 0x3c, 0x2f, 0x61, 0x3e, 0x20, 0x3c, 0x62, 0x3e, \r
+       0x7c, 0x3c, 0x2f, 0x62, 0x3e, 0x20, 0x3c, 0x61, 0x20, 0x68, \r
+       0x72, 0x65, 0x66, 0x3d, 0x22, 0x74, 0x63, 0x70, 0x2e, 0x73, \r
+       0x68, 0x74, 0x6d, 0x6c, 0x22, 0x3e, 0x43, 0x6f, 0x6e, 0x6e, \r
+       0x65, 0x63, 0x74, 0x69, 0x6f, 0x6e, 0x73, 0x3c, 0x2f, 0x61, \r
+       0x3e, 0x20, 0x3c, 0x62, 0x3e, 0x7c, 0x3c, 0x2f, 0x62, 0x3e, \r
+       0x20, 0x3c, 0x61, 0x20, 0x68, 0x72, 0x65, 0x66, 0x3d, 0x22, \r
+       0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, 0x77, 0x77, 0x77, \r
+       0x2e, 0x66, 0x72, 0x65, 0x65, 0x72, 0x74, 0x6f, 0x73, 0x2e, \r
+       0x6f, 0x72, 0x67, 0x2f, 0x22, 0x3e, 0x46, 0x72, 0x65, 0x65, \r
+       0x52, 0x54, 0x4f, 0x53, 0x2e, 0x6f, 0x72, 0x67, 0x20, 0x48, \r
+       0x6f, 0x6d, 0x65, 0x70, 0x61, 0x67, 0x65, 0x3c, 0x2f, 0x61, \r
+       0x3e, 0x20, 0x3c, 0x62, 0x3e, 0x7c, 0x3c, 0x2f, 0x62, 0x3e, \r
+       0x20, 0x3c, 0x61, 0x20, 0x68, 0x72, 0x65, 0x66, 0x3d, 0x22, \r
+       0x69, 0x6f, 0x2e, 0x73, 0x68, 0x74, 0x6d, 0x6c, 0x22, 0x3e, \r
+       0x49, 0x4f, 0x3c, 0x2f, 0x61, 0x3e, 0xd, 0xa, 0x3c, 0x62, \r
+       0x72, 0x3e, 0x3c, 0x70, 0x3e, 0xd, 0xa, 0x3c, 0x68, 0x72, \r
+       0x3e, 0xd, 0xa, 0x3c, 0x62, 0x72, 0x3e, 0xd, 0xa, 0x3c, \r
+       0x68, 0x32, 0x3e, 0x4e, 0x65, 0x74, 0x77, 0x6f, 0x72, 0x6b, \r
+       0x20, 0x63, 0x6f, 0x6e, 0x6e, 0x65, 0x63, 0x74, 0x69, 0x6f, \r
+       0x6e, 0x73, 0x3c, 0x2f, 0x68, 0x32, 0x3e, 0xd, 0xa, 0x3c, \r
+       0x70, 0x3e, 0xd, 0xa, 0x3c, 0x74, 0x61, 0x62, 0x6c, 0x65, \r
+       0x3e, 0xd, 0xa, 0x3c, 0x74, 0x72, 0x3e, 0x3c, 0x74, 0x68, \r
+       0x3e, 0x4c, 0x6f, 0x63, 0x61, 0x6c, 0x3c, 0x2f, 0x74, 0x68, \r
+       0x3e, 0x3c, 0x74, 0x68, 0x3e, 0x52, 0x65, 0x6d, 0x6f, 0x74, \r
+       0x65, 0x3c, 0x2f, 0x74, 0x68, 0x3e, 0x3c, 0x74, 0x68, 0x3e, \r
+       0x53, 0x74, 0x61, 0x74, 0x65, 0x3c, 0x2f, 0x74, 0x68, 0x3e, \r
+       0x3c, 0x74, 0x68, 0x3e, 0x52, 0x65, 0x74, 0x72, 0x61, 0x6e, \r
+       0x73, 0x6d, 0x69, 0x73, 0x73, 0x69, 0x6f, 0x6e, 0x73, 0x3c, \r
+       0x2f, 0x74, 0x68, 0x3e, 0x3c, 0x74, 0x68, 0x3e, 0x54, 0x69, \r
+       0x6d, 0x65, 0x72, 0x3c, 0x2f, 0x74, 0x68, 0x3e, 0x3c, 0x74, \r
+       0x68, 0x3e, 0x46, 0x6c, 0x61, 0x67, 0x73, 0x3c, 0x2f, 0x74, \r
+       0x68, 0x3e, 0x3c, 0x2f, 0x74, 0x72, 0x3e, 0xd, 0xa, 0x25, \r
+       0x21, 0x20, 0x74, 0x63, 0x70, 0x2d, 0x63, 0x6f, 0x6e, 0x6e, \r
+       0x65, 0x63, 0x74, 0x69, 0x6f, 0x6e, 0x73, 0xd, 0xa, 0x3c, \r
+       0x2f, 0x70, 0x72, 0x65, 0x3e, 0x3c, 0x2f, 0x66, 0x6f, 0x6e, \r
+       0x74, 0x3e, 0xd, 0xa, 0x3c, 0x2f, 0x66, 0x6f, 0x6e, 0x74, \r
+       0x3e, 0xd, 0xa, 0x3c, 0x2f, 0x62, 0x6f, 0x64, 0x79, 0x3e, \r
+       0xd, 0xa, 0x3c, 0x2f, 0x68, 0x74, 0x6d, 0x6c, 0x3e, 0xd, \r
+       0xa, 0xd, 0xa, 0};\r
+\r
+const struct httpd_fsdata_file file_404_html[] = {{NULL, data_404_html, data_404_html + 10, sizeof(data_404_html) - 10}};\r
+\r
+const struct httpd_fsdata_file file_index_html[] = {{file_404_html, data_index_html, data_index_html + 12, sizeof(data_index_html) - 12}};\r
+\r
+const struct httpd_fsdata_file file_index_shtml[] = {{file_index_html, data_index_shtml, data_index_shtml + 13, sizeof(data_index_shtml) - 13}};\r
+\r
+const struct httpd_fsdata_file file_io_shtml[] = {{file_index_shtml, data_io_shtml, data_io_shtml + 10, sizeof(data_io_shtml) - 10}};\r
+\r
+const struct httpd_fsdata_file file_stats_shtml[] = {{file_io_shtml, data_stats_shtml, data_stats_shtml + 13, sizeof(data_stats_shtml) - 13}};\r
+\r
+const struct httpd_fsdata_file file_tcp_shtml[] = {{file_stats_shtml, data_tcp_shtml, data_tcp_shtml + 11, sizeof(data_tcp_shtml) - 11}};\r
+\r
+#define HTTPD_FS_ROOT file_tcp_shtml\r
+\r
+#define HTTPD_FS_NUMFILES 6\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/httpd-fsdata.h b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/httpd-fsdata.h
new file mode 100644 (file)
index 0000000..52d35c2
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/httpd-fsdata.h
@@ -0,0 +1,64 @@
+/*\r
+ * Copyright (c) 2001, Swedish Institute of Computer Science.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions\r
+ * are met:\r
+ * 1. Redistributions of source code must retain the above copyright\r
+ *    notice, this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright\r
+ *    notice, this list of conditions and the following disclaimer in the\r
+ *    documentation and/or other materials provided with the distribution.\r
+ * 3. Neither the name of the Institute nor the names of its contributors\r
+ *    may be used to endorse or promote products derived from this software\r
+ *    without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND\r
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE\r
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\r
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY\r
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF\r
+ * SUCH DAMAGE.\r
+ *\r
+ * This file is part of the lwIP TCP/IP stack.\r
+ *\r
+ * Author: Adam Dunkels <adam@sics.se>\r
+ *\r
+ * $Id: httpd-fsdata.h,v 1.1 2006/06/07 09:13:08 adam Exp $\r
+ */\r
+#ifndef __HTTPD_FSDATA_H__\r
+#define __HTTPD_FSDATA_H__\r
+\r
+#include "uip.h"\r
+\r
+struct httpd_fsdata_file {\r
+  const struct httpd_fsdata_file *next;\r
+  const char *name;\r
+  const char *data;\r
+  const int len;\r
+#ifdef HTTPD_FS_STATISTICS\r
+#if HTTPD_FS_STATISTICS == 1\r
+  u16_t count;\r
+#endif /* HTTPD_FS_STATISTICS */\r
+#endif /* HTTPD_FS_STATISTICS */\r
+};\r
+\r
+struct httpd_fsdata_file_noconst {\r
+  struct httpd_fsdata_file *next;\r
+  char *name;\r
+  char *data;\r
+  int len;\r
+#ifdef HTTPD_FS_STATISTICS\r
+#if HTTPD_FS_STATISTICS == 1\r
+  u16_t count;\r
+#endif /* HTTPD_FS_STATISTICS */\r
+#endif /* HTTPD_FS_STATISTICS */\r
+};\r
+\r
+#endif /* __HTTPD_FSDATA_H__ */\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/httpd.c b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/httpd.c
new file mode 100644 (file)
index 0000000..644cf16
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/httpd.c
@@ -0,0 +1,346 @@
+/**\r
+ * \addtogroup apps\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * \defgroup httpd Web server\r
+ * @{\r
+ * The uIP web server is a very simplistic implementation of an HTTP\r
+ * server. It can serve web pages and files from a read-only ROM\r
+ * filesystem, and provides a very small scripting language.\r
+\r
+ */\r
+\r
+/**\r
+ * \file\r
+ *         Web server\r
+ * \author\r
+ *         Adam Dunkels <adam@sics.se>\r
+ */\r
+\r
+\r
+/*\r
+ * Copyright (c) 2004, Adam Dunkels.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions\r
+ * are met:\r
+ * 1. Redistributions of source code must retain the above copyright\r
+ *    notice, this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright\r
+ *    notice, this list of conditions and the following disclaimer in the\r
+ *    documentation and/or other materials provided with the distribution.\r
+ * 3. Neither the name of the Institute nor the names of its contributors\r
+ *    may be used to endorse or promote products derived from this software\r
+ *    without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND\r
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE\r
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\r
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY\r
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF\r
+ * SUCH DAMAGE.\r
+ *\r
+ * This file is part of the uIP TCP/IP stack.\r
+ *\r
+ * Author: Adam Dunkels <adam@sics.se>\r
+ *\r
+ * $Id: httpd.c,v 1.2 2006/06/11 21:46:38 adam Exp $\r
+ */\r
+\r
+#include "uip.h"\r
+#include "httpd.h"\r
+#include "httpd-fs.h"\r
+#include "httpd-cgi.h"\r
+#include "http-strings.h"\r
+\r
+#include <string.h>\r
+\r
+#define STATE_WAITING 0\r
+#define STATE_OUTPUT  1\r
+\r
+#define ISO_nl      0x0a\r
+#define ISO_space   0x20\r
+#define ISO_bang    0x21\r
+#define ISO_percent 0x25\r
+#define ISO_period  0x2e\r
+#define ISO_slash   0x2f\r
+#define ISO_colon   0x3a\r
+\r
+\r
+/*---------------------------------------------------------------------------*/\r
+static unsigned short\r
+generate_part_of_file(void *state)\r
+{\r
+  struct httpd_state *s = (struct httpd_state *)state;\r
+\r
+  if(s->file.len > uip_mss()) {\r
+    s->len = uip_mss();\r
+  } else {\r
+    s->len = s->file.len;\r
+  }\r
+  memcpy(uip_appdata, s->file.data, s->len);\r
+  \r
+  return s->len;\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static\r
+PT_THREAD(send_file(struct httpd_state *s))\r
+{\r
+  PSOCK_BEGIN(&s->sout);\r
+  \r
+  do {\r
+    PSOCK_GENERATOR_SEND(&s->sout, generate_part_of_file, s);\r
+    s->file.len -= s->len;\r
+    s->file.data += s->len;\r
+  } while(s->file.len > 0);\r
+      \r
+  PSOCK_END(&s->sout);\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static\r
+PT_THREAD(send_part_of_file(struct httpd_state *s))\r
+{\r
+  PSOCK_BEGIN(&s->sout);\r
+\r
+  PSOCK_SEND(&s->sout, s->file.data, s->len);\r
+  \r
+  PSOCK_END(&s->sout);\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static void\r
+next_scriptstate(struct httpd_state *s)\r
+{\r
+  char *p;\r
+  p = strchr(s->scriptptr, ISO_nl) + 1;\r
+  s->scriptlen -= (unsigned short)(p - s->scriptptr);\r
+  s->scriptptr = p;\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static\r
+PT_THREAD(handle_script(struct httpd_state *s))\r
+{\r
+  char *ptr;\r
+  \r
+  PT_BEGIN(&s->scriptpt);\r
+\r
+\r
+  while(s->file.len > 0) {\r
+\r
+    /* Check if we should start executing a script. */\r
+    if(*s->file.data == ISO_percent &&\r
+       *(s->file.data + 1) == ISO_bang) {\r
+      s->scriptptr = s->file.data + 3;\r
+      s->scriptlen = s->file.len - 3;\r
+      if(*(s->scriptptr - 1) == ISO_colon) {\r
+       httpd_fs_open(s->scriptptr + 1, &s->file);\r
+       PT_WAIT_THREAD(&s->scriptpt, send_file(s));\r
+      } else {\r
+       PT_WAIT_THREAD(&s->scriptpt,\r
+                      httpd_cgi(s->scriptptr)(s, s->scriptptr));\r
+      }\r
+      next_scriptstate(s);\r
+      \r
+      /* The script is over, so we reset the pointers and continue\r
+        sending the rest of the file. */\r
+      s->file.data = s->scriptptr;\r
+      s->file.len = s->scriptlen;\r
+    } else {\r
+      /* See if we find the start of script marker in the block of HTML\r
+        to be sent. */\r
+\r
+      if(s->file.len > uip_mss()) {\r
+       s->len = uip_mss();\r
+      } else {\r
+       s->len = s->file.len;\r
+      }\r
+\r
+      if(*s->file.data == ISO_percent) {\r
+       ptr = strchr(s->file.data + 1, ISO_percent);\r
+      } else {\r
+       ptr = strchr(s->file.data, ISO_percent);\r
+      }\r
+      if(ptr != NULL &&\r
+        ptr != s->file.data) {\r
+       s->len = (int)(ptr - s->file.data);\r
+       if(s->len >= uip_mss()) {\r
+         s->len = uip_mss();\r
+       }\r
+      }\r
+      PT_WAIT_THREAD(&s->scriptpt, send_part_of_file(s));\r
+      s->file.data += s->len;\r
+      s->file.len -= s->len;\r
+      \r
+    }\r
+  }\r
+  \r
+  PT_END(&s->scriptpt);\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static\r
+PT_THREAD(send_headers(struct httpd_state *s, const char *statushdr))\r
+{\r
+  char *ptr;\r
+\r
+  PSOCK_BEGIN(&s->sout);\r
+\r
+  PSOCK_SEND_STR(&s->sout, statushdr);\r
+\r
+  ptr = strrchr(s->filename, ISO_period);\r
+  if(ptr == NULL) {\r
+    PSOCK_SEND_STR(&s->sout, http_content_type_binary);\r
+  } else if(strncmp(http_html, ptr, 5) == 0 ||\r
+           strncmp(http_shtml, ptr, 6) == 0) {\r
+    PSOCK_SEND_STR(&s->sout, http_content_type_html);\r
+  } else if(strncmp(http_css, ptr, 4) == 0) {\r
+    PSOCK_SEND_STR(&s->sout, http_content_type_css);\r
+  } else if(strncmp(http_png, ptr, 4) == 0) {\r
+    PSOCK_SEND_STR(&s->sout, http_content_type_png);\r
+  } else if(strncmp(http_gif, ptr, 4) == 0) {\r
+    PSOCK_SEND_STR(&s->sout, http_content_type_gif);\r
+  } else if(strncmp(http_jpg, ptr, 4) == 0) {\r
+    PSOCK_SEND_STR(&s->sout, http_content_type_jpg);\r
+  } else {\r
+    PSOCK_SEND_STR(&s->sout, http_content_type_plain);\r
+  }\r
+  PSOCK_END(&s->sout);\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static\r
+PT_THREAD(handle_output(struct httpd_state *s))\r
+{\r
+  char *ptr;\r
+  \r
+  PT_BEGIN(&s->outputpt);\r
+ \r
+  if(!httpd_fs_open(s->filename, &s->file)) {\r
+    httpd_fs_open(http_404_html, &s->file);\r
+    strcpy(s->filename, http_404_html);\r
+    PT_WAIT_THREAD(&s->outputpt,\r
+                  send_headers(s,\r
+                  http_header_404));\r
+    PT_WAIT_THREAD(&s->outputpt,\r
+                  send_file(s));\r
+  } else {\r
+    PT_WAIT_THREAD(&s->outputpt,\r
+                  send_headers(s,\r
+                  http_header_200));\r
+    ptr = strchr(s->filename, ISO_period);\r
+    if(ptr != NULL && strncmp(ptr, http_shtml, 6) == 0) {\r
+      PT_INIT(&s->scriptpt);\r
+      PT_WAIT_THREAD(&s->outputpt, handle_script(s));\r
+    } else {\r
+      PT_WAIT_THREAD(&s->outputpt,\r
+                    send_file(s));\r
+    }\r
+  }\r
+  PSOCK_CLOSE(&s->sout);\r
+  PT_END(&s->outputpt);\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static\r
+PT_THREAD(handle_input(struct httpd_state *s))\r
+{\r
+  PSOCK_BEGIN(&s->sin);\r
+\r
+  PSOCK_READTO(&s->sin, ISO_space);\r
+\r
+  \r
+  if(strncmp(s->inputbuf, http_get, 4) != 0) {\r
+    PSOCK_CLOSE_EXIT(&s->sin);\r
+  }\r
+  PSOCK_READTO(&s->sin, ISO_space);\r
+\r
+  if(s->inputbuf[0] != ISO_slash) {\r
+    PSOCK_CLOSE_EXIT(&s->sin);\r
+  }\r
+\r
+  if(s->inputbuf[1] == ISO_space) {\r
+    strncpy(s->filename, http_index_html, sizeof(s->filename));\r
+  } else {\r
+\r
+    s->inputbuf[PSOCK_DATALEN(&s->sin) - 1] = 0;\r
+\r
+    /* Process any form input being sent to the server. */\r
+    {\r
+        extern void vApplicationProcessFormInput( char *pcInputString, long xInputLength );\r
+        vApplicationProcessFormInput( s->inputbuf, PSOCK_DATALEN(&s->sin) );\r
+    }\r
+\r
+    strncpy(s->filename, &s->inputbuf[0], sizeof(s->filename));\r
+  }\r
+\r
+  /*  httpd_log_file(uip_conn->ripaddr, s->filename);*/\r
+  \r
+  s->state = STATE_OUTPUT;\r
+\r
+  while(1) {\r
+    PSOCK_READTO(&s->sin, ISO_nl);\r
+\r
+    if(strncmp(s->inputbuf, http_referer, 8) == 0) {\r
+      s->inputbuf[PSOCK_DATALEN(&s->sin) - 2] = 0;\r
+      /*      httpd_log(&s->inputbuf[9]);*/\r
+    }\r
+  }\r
+  \r
+  PSOCK_END(&s->sin);\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static void\r
+handle_connection(struct httpd_state *s)\r
+{\r
+  handle_input(s);\r
+  if(s->state == STATE_OUTPUT) {\r
+    handle_output(s);\r
+  }\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+void\r
+httpd_appcall(void)\r
+{\r
+  struct httpd_state *s = (struct httpd_state *)&(uip_conn->appstate);\r
+\r
+  if(uip_closed() || uip_aborted() || uip_timedout()) {\r
+  } else if(uip_connected()) {\r
+    PSOCK_INIT(&s->sin, s->inputbuf, sizeof(s->inputbuf) - 1);\r
+    PSOCK_INIT(&s->sout, s->inputbuf, sizeof(s->inputbuf) - 1);\r
+    PT_INIT(&s->outputpt);\r
+    s->state = STATE_WAITING;\r
+    /*    timer_set(&s->timer, CLOCK_SECOND * 100);*/\r
+    s->timer = 0;\r
+    handle_connection(s);\r
+  } else if(s != NULL) {\r
+    if(uip_poll()) {\r
+      ++s->timer;\r
+      if(s->timer >= 20) {\r
+       uip_abort();\r
+      }\r
+    } else {\r
+      s->timer = 0;\r
+    }\r
+    handle_connection(s);\r
+  } else {\r
+    uip_abort();\r
+  }\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+/**\r
+ * \brief      Initialize the web server\r
+ *\r
+ *             This function initializes the web server and should be\r
+ *             called at system boot-up.\r
+ */\r
+void\r
+httpd_init(void)\r
+{\r
+  uip_listen(HTONS(80));\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+/** @} */\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/httpd.h b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/httpd.h
new file mode 100644 (file)
index 0000000..7f7a666
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/httpd.h
@@ -0,0 +1,62 @@
+/*\r
+ * Copyright (c) 2001-2005, Adam Dunkels.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions\r
+ * are met:\r
+ * 1. Redistributions of source code must retain the above copyright\r
+ *    notice, this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright\r
+ *    notice, this list of conditions and the following disclaimer in the\r
+ *    documentation and/or other materials provided with the distribution.\r
+ * 3. The name of the author may not be used to endorse or promote\r
+ *    products derived from this software without specific prior\r
+ *    written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS\r
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\r
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY\r
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE\r
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\r
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,\r
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\r
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+ * This file is part of the uIP TCP/IP stack.\r
+ *\r
+ * $Id: httpd.h,v 1.2 2006/06/11 21:46:38 adam Exp $\r
+ *\r
+ */\r
+\r
+#ifndef __HTTPD_H__\r
+#define __HTTPD_H__\r
+\r
+#include "psock.h"\r
+#include "httpd-fs.h"\r
+\r
+struct httpd_state {\r
+  unsigned char timer;\r
+  struct psock sin, sout;\r
+  struct pt outputpt, scriptpt;\r
+  char inputbuf[50];\r
+  char filename[20];\r
+  char state;\r
+  struct httpd_fs_file file;\r
+  int len;\r
+  char *scriptptr;\r
+  int scriptlen;\r
+  \r
+  unsigned short count;\r
+};\r
+\r
+void httpd_init(void);\r
+void httpd_appcall(void);\r
+\r
+void httpd_log(char *msg);\r
+void httpd_log_file(u16_t *requester, char *file);\r
+\r
+#endif /* __HTTPD_H__ */\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/makefsdata b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/makefsdata
new file mode 100644 (file)
index 0000000..8d2715a
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/makefsdata
@@ -0,0 +1,78 @@
+#!/usr/bin/perl\r
+\r
+open(OUTPUT, "> httpd-fsdata.c");\r
+\r
+chdir("httpd-fs");\r
+\r
+opendir(DIR, ".");\r
+@files =  grep { !/^\./ && !/(CVS|~)/ } readdir(DIR);\r
+closedir(DIR);\r
+\r
+foreach $file (@files) {  \r
+   \r
+    if(-d $file && $file !~ /^\./) {\r
+       print "Processing directory $file\n";\r
+       opendir(DIR, $file);\r
+       @newfiles =  grep { !/^\./ && !/(CVS|~)/ } readdir(DIR);\r
+       closedir(DIR);\r
+       printf "Adding files @newfiles\n";\r
+       @files = (@files, map { $_ = "$file/$_" } @newfiles);\r
+       next;\r
+    }\r
+}\r
+\r
+foreach $file (@files) {\r
+    if(-f $file) {\r
+       \r
+       print "Adding file $file\n";\r
+       \r
+       open(FILE, $file) || die "Could not open file $file\n";\r
+\r
+       $file =~ s-^-/-;\r
+       $fvar = $file;\r
+       $fvar =~ s-/-_-g;\r
+       $fvar =~ s-\.-_-g;\r
+       # for AVR, add PROGMEM here\r
+       print(OUTPUT "static const unsigned char data".$fvar."[] = {\n");\r
+       print(OUTPUT "\t/* $file */\n\t");\r
+       for($j = 0; $j < length($file); $j++) {\r
+           printf(OUTPUT "%#02x, ", unpack("C", substr($file, $j, 1)));\r
+       }\r
+       printf(OUTPUT "0,\n");\r
+       \r
+       \r
+       $i = 0;        \r
+       while(read(FILE, $data, 1)) {\r
+           if($i == 0) {\r
+               print(OUTPUT "\t");\r
+           }\r
+           printf(OUTPUT "%#02x, ", unpack("C", $data));\r
+           $i++;\r
+           if($i == 10) {\r
+               print(OUTPUT "\n");\r
+               $i = 0;\r
+           }\r
+       }\r
+       print(OUTPUT "0};\n\n");\r
+       close(FILE);\r
+       push(@fvars, $fvar);\r
+       push(@pfiles, $file);\r
+    }\r
+}\r
+\r
+for($i = 0; $i < @fvars; $i++) {\r
+    $file = $pfiles[$i];\r
+    $fvar = $fvars[$i];\r
+\r
+    if($i == 0) {\r
+        $prevfile = "NULL";\r
+    } else {\r
+        $prevfile = "file" . $fvars[$i - 1];\r
+    }\r
+    print(OUTPUT "const struct httpd_fsdata_file file".$fvar."[] = {{$prevfile, data$fvar, ");\r
+    print(OUTPUT "data$fvar + ". (length($file) + 1) .", ");\r
+    print(OUTPUT "sizeof(data$fvar) - ". (length($file) + 1) ."}};\n\n");\r
+}\r
+\r
+print(OUTPUT "#define HTTPD_FS_ROOT file$fvars[$i - 1]\n\n");\r
+print(OUTPUT "#define HTTPD_FS_NUMFILES $i\n");\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/makestrings b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/makestrings
new file mode 100644 (file)
index 0000000..8a13c6d
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/makestrings
@@ -0,0 +1,40 @@
+#!/usr/bin/perl\r
+\r
+\r
+sub stringify {\r
+  my $name = shift(@_);\r
+  open(OUTPUTC, "> $name.c");\r
+  open(OUTPUTH, "> $name.h");\r
+  \r
+  open(FILE, "$name");\r
+  \r
+  while(<FILE>) {\r
+    if(/(.+) "(.+)"/) {\r
+      $var = $1;\r
+      $data = $2;\r
+      \r
+      $datan = $data;\r
+      $datan =~ s/\\r/\r/g;\r
+      $datan =~ s/\\n/\n/g;\r
+      $datan =~ s/\\01/\01/g;      \r
+      $datan =~ s/\\0/\0/g;\r
+      \r
+      printf(OUTPUTC "const char $var\[%d] = \n", length($datan) + 1);\r
+      printf(OUTPUTC "/* \"$data\" */\n");\r
+      printf(OUTPUTC "{");\r
+      for($j = 0; $j < length($datan); $j++) {\r
+       printf(OUTPUTC "%#02x, ", unpack("C", substr($datan, $j, 1)));\r
+      }\r
+      printf(OUTPUTC "};\n");\r
+      \r
+      printf(OUTPUTH "extern const char $var\[%d];\n", length($datan) + 1);\r
+      \r
+    }\r
+  }\r
+  close(OUTPUTC);\r
+  close(OUTPUTH);\r
+}\r
+stringify("http-strings");\r
+\r
+exit 0;\r
+\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/uIP_Task.c b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/uIP_Task.c
new file mode 100644 (file)
index 0000000..1520d15
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/uIP_Task.c
@@ -0,0 +1,318 @@
+/*\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
+\r
+       This file is part of the FreeRTOS.org distribution.\r
+\r
+       FreeRTOS.org is free software; you can redistribute it and/or modify\r
+       it under the terms of the GNU General Public License as published by\r
+       the Free Software Foundation; either version 2 of the License, or\r
+       (at your option) any later version.\r
+\r
+       FreeRTOS.org is distributed in the hope that it will be useful,\r
+       but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+       MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
+       GNU General Public License for more details.\r
+\r
+       You should have received a copy of the GNU General Public License\r
+       along with FreeRTOS.org; if not, write to the Free Software\r
+       Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
+\r
+       A special exception to the GPL can be applied should you wish to distribute\r
+       a combined work that includes FreeRTOS.org, without being obliged to provide\r
+       the source code for any proprietary components.  See the licensing section\r
+       of http://www.FreeRTOS.org for full details of how and when the exception\r
+       can be applied.\r
+\r
+       ***************************************************************************\r
+       See http://www.FreeRTOS.org for documentation, latest information, license\r
+       and contact details.  Please ensure to read the configuration and relevant\r
+       port sections of the online documentation.\r
+       ***************************************************************************\r
+*/\r
+/* Standard includes. */\r
+#include <string.h>\r
+\r
+/* Scheduler includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+#include "semphr.h"\r
+\r
+/* uip includes. */\r
+#include "uip.h"\r
+#include "uip_arp.h"\r
+#include "httpd.h"\r
+#include "timer.h"\r
+#include "clock-arch.h"\r
+\r
+/* Demo includes. */\r
+#include "emac.h"\r
+#include "partest.h"\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* MAC address configuration. */\r
+#define uipMAC_ADDR0   0x00\r
+#define uipMAC_ADDR1   0x12\r
+#define uipMAC_ADDR2   0x13\r
+#define uipMAC_ADDR3   0x10\r
+#define uipMAC_ADDR4   0x15\r
+#define uipMAC_ADDR5   0x11\r
+\r
+/* IP address configuration. */\r
+#define uipIP_ADDR0            172\r
+#define uipIP_ADDR1            25\r
+#define uipIP_ADDR2            218\r
+#define uipIP_ADDR3            10      \r
+\r
+/* How long to wait before attempting to connect the MAC again. */\r
+#define uipINIT_WAIT    100\r
+\r
+/* Shortcut to the header within the Rx buffer. */\r
+#define xHeader ((struct uip_eth_hdr *) &uip_buf[ 0 ])\r
+\r
+/* Standard constant. */\r
+#define uipTOTAL_FRAME_HEADER_SIZE     54\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* \r
+ * Send the uIP buffer to the MAC. \r
+ */\r
+static void prvENET_Send(void);\r
+\r
+/*\r
+ * Setup the MAC address in the MAC itself, and in the uIP stack.\r
+ */\r
+static void prvSetMACAddress( void );\r
+\r
+/*\r
+ * Port functions required by the uIP stack.\r
+ */\r
+void clock_init( void );\r
+clock_time_t clock_time( void );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* The semaphore used by the ISR to wake the uIP task. */\r
+extern xSemaphoreHandle xEMACSemaphore;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+void clock_init(void)\r
+{\r
+       /* This is done when the scheduler starts. */\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+clock_time_t clock_time( void )\r
+{\r
+       return xTaskGetTickCount();\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vuIP_Task( void *pvParameters )\r
+{\r
+portBASE_TYPE i;\r
+uip_ipaddr_t xIPAddr;\r
+struct timer periodic_timer, arp_timer;\r
+extern void ( vEMAC_ISR )( void );\r
+\r
+       /* Create the semaphore used by the ISR to wake this task. */\r
+       vSemaphoreCreateBinary( xEMACSemaphore );\r
+       \r
+       /* Initialise the uIP stack. */\r
+       timer_set( &periodic_timer, configTICK_RATE_HZ / 2 );\r
+       timer_set( &arp_timer, configTICK_RATE_HZ * 10 );\r
+       uip_init();\r
+       uip_ipaddr( xIPAddr, uipIP_ADDR0, uipIP_ADDR1, uipIP_ADDR2, uipIP_ADDR3 );\r
+       uip_sethostaddr( xIPAddr );\r
+       httpd_init();\r
+\r
+       /* Initialise the MAC. */\r
+       while( Init_EMAC() != pdPASS )\r
+    {\r
+        vTaskDelay( uipINIT_WAIT );\r
+    }\r
+\r
+       portENTER_CRITICAL();\r
+       {\r
+               MAC_INTENABLE = INT_RX_DONE;\r
+        VICIntEnable |= 0x00200000;\r
+        VICVectAddr21 = ( portLONG ) vEMAC_ISR;\r
+               prvSetMACAddress();\r
+       }\r
+       portEXIT_CRITICAL();\r
+       \r
+\r
+       for( ;; )\r
+       {\r
+               /* Is there received data ready to be processed? */\r
+               uip_len = uiGetEMACRxData( uip_buf );\r
+               \r
+               if( uip_len > 0 )\r
+               {\r
+                       /* Standard uIP loop taken from the uIP manual. */\r
+                       if( xHeader->type == htons( UIP_ETHTYPE_IP ) )\r
+                       {\r
+                               uip_arp_ipin();\r
+                               uip_input();\r
+\r
+                               /* If the above function invocation resulted in data that \r
+                               should be sent out on the network, the global variable \r
+                               uip_len is set to a value > 0. */\r
+                               if( uip_len > 0 )\r
+                               {\r
+                                       uip_arp_out();\r
+                                       prvENET_Send();\r
+                               }\r
+                       }\r
+                       else if( xHeader->type == htons( UIP_ETHTYPE_ARP ) )\r
+                       {\r
+                               uip_arp_arpin();\r
+\r
+                               /* If the above function invocation resulted in data that \r
+                               should be sent out on the network, the global variable \r
+                               uip_len is set to a value > 0. */\r
+                               if( uip_len > 0 )\r
+                               {\r
+                                       prvENET_Send();\r
+                               }\r
+                       }\r
+               }\r
+               else\r
+               {\r
+                       if( timer_expired( &periodic_timer ) )\r
+                       {\r
+                               timer_reset( &periodic_timer );\r
+                               for( i = 0; i < UIP_CONNS; i++ )\r
+                               {\r
+                                       uip_periodic( i );\r
+       \r
+                                       /* If the above function invocation resulted in data that \r
+                                       should be sent out on the network, the global variable \r
+                                       uip_len is set to a value > 0. */\r
+                                       if( uip_len > 0 )\r
+                                       {\r
+                                               uip_arp_out();\r
+                                               prvENET_Send();\r
+                                       }\r
+                               }       \r
+       \r
+                               /* Call the ARP timer function every 10 seconds. */\r
+                               if( timer_expired( &arp_timer ) )\r
+                               {\r
+                                       timer_reset( &arp_timer );\r
+                                       uip_arp_timer();\r
+                               }\r
+                       }\r
+                       else\r
+                       {                       \r
+                               /* We did not receive a packet, and there was no periodic\r
+                               processing to perform.  Block for a fixed period.  If a packet\r
+                               is received during this period we will be woken by the ISR\r
+                               giving us the Semaphore. */\r
+                               xSemaphoreTake( xEMACSemaphore, configTICK_RATE_HZ / 2 );                       \r
+                       }\r
+               }\r
+       }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvENET_Send(void)\r
+{\r
+    RequestSend();\r
+\r
+    /* Copy the header into the Tx buffer. */\r
+    CopyToFrame_EMAC( uip_buf, uipTOTAL_FRAME_HEADER_SIZE );\r
+    if( uip_len > uipTOTAL_FRAME_HEADER_SIZE )\r
+    {\r
+        CopyToFrame_EMAC( uip_appdata, ( uip_len - uipTOTAL_FRAME_HEADER_SIZE ) );\r
+    }\r
+\r
+    DoSend_EMAC( uip_len );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvSetMACAddress( void )\r
+{\r
+struct uip_eth_addr xAddr;\r
+\r
+       /* Configure the MAC address in the uIP stack. */\r
+       xAddr.addr[ 0 ] = uipMAC_ADDR0;\r
+       xAddr.addr[ 1 ] = uipMAC_ADDR1;\r
+       xAddr.addr[ 2 ] = uipMAC_ADDR2;\r
+       xAddr.addr[ 3 ] = uipMAC_ADDR3;\r
+       xAddr.addr[ 4 ] = uipMAC_ADDR4;\r
+       xAddr.addr[ 5 ] = uipMAC_ADDR5;\r
+       uip_setethaddr( xAddr );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vApplicationProcessFormInput( portCHAR *pcInputString, portBASE_TYPE xInputLength )\r
+{\r
+char *c, *pcText;\r
+static portCHAR cMessageForDisplay[ 32 ];\r
+extern xQueueHandle xLCDQueue;\r
+xLCDMessage xLCDMessage;\r
+\r
+       /* Process the form input sent by the IO page of the served HTML. */\r
+\r
+       c = strstr( pcInputString, "?" );\r
+    if( c )\r
+    {\r
+               /* Turn LED's on or off in accordance with the check box status. */\r
+               if( strstr( c, "LED0=1" ) != NULL )\r
+               {\r
+                       vParTestSetLED( 5, 0 );\r
+               }\r
+               else\r
+               {\r
+                       vParTestSetLED( 5, 1 );\r
+               }               \r
+               \r
+               if( strstr( c, "LED1=1" ) != NULL )\r
+               {\r
+                       vParTestSetLED( 6, 0 );\r
+               }\r
+               else\r
+               {\r
+                       vParTestSetLED( 6, 1 );\r
+               }               \r
+\r
+               if( strstr( c, "LED2=1" ) != NULL )\r
+               {\r
+                       vParTestSetLED( 7, 0 );\r
+               }\r
+               else\r
+               {\r
+                       vParTestSetLED( 7, 1 );\r
+               }\r
+\r
+               /* Find the start of the text to be displayed on the LCD. */\r
+        pcText = strstr( c, "LCD=" );\r
+        pcText += strlen( "LCD=" );\r
+\r
+        /* Terminate the file name for further processing within uIP. */\r
+        *c = 0x00;\r
+\r
+        /* Terminate the LCD string. */\r
+        c = strstr( pcText, " " );\r
+        if( c != NULL )\r
+        {\r
+            *c = 0x00;\r
+        }\r
+\r
+        /* Add required spaces. */\r
+        while( ( c = strstr( pcText, "+" ) ) != NULL )\r
+        {\r
+            *c = ' ';\r
+        }\r
+    \r
+        /* Write the message to the LCD. */\r
+               strcpy( cMessageForDisplay, pcText );\r
+               xLCDMessage.xColumn = 0;\r
+               xLCDMessage.pcMessage = cMessageForDisplay;\r
+        xQueueSend( xLCDQueue, &xLCDMessage, portMAX_DELAY );\r
+    }\r
+}\r
+\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/uip-conf.h b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/uip-conf.h
new file mode 100644 (file)
index 0000000..3e6f7f3
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/uip-conf.h
@@ -0,0 +1,157 @@
+/**\r
+ * \addtogroup uipopt\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * \name Project-specific configuration options\r
+ * @{\r
+ *\r
+ * uIP has a number of configuration options that can be overridden\r
+ * for each project. These are kept in a project-specific uip-conf.h\r
+ * file and all configuration names have the prefix UIP_CONF.\r
+ */\r
+\r
+/*\r
+ * Copyright (c) 2006, Swedish Institute of Computer Science.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions\r
+ * are met:\r
+ * 1. Redistributions of source code must retain the above copyright\r
+ *    notice, this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright\r
+ *    notice, this list of conditions and the following disclaimer in the\r
+ *    documentation and/or other materials provided with the distribution.\r
+ * 3. Neither the name of the Institute nor the names of its contributors\r
+ *    may be used to endorse or promote products derived from this software\r
+ *    without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND\r
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE\r
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\r
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY\r
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF\r
+ * SUCH DAMAGE.\r
+ *\r
+ * This file is part of the uIP TCP/IP stack\r
+ *\r
+ * $Id: uip-conf.h,v 1.6 2006/06/12 08:00:31 adam Exp $\r
+ */\r
+\r
+/**\r
+ * \file\r
+ *         An example uIP configuration file\r
+ * \author\r
+ *         Adam Dunkels <adam@sics.se>\r
+ */\r
+\r
+#ifndef __UIP_CONF_H__\r
+#define __UIP_CONF_H__\r
+\r
+#include <stdint.h>\r
+\r
+/**\r
+ * 8 bit datatype\r
+ *\r
+ * This typedef defines the 8-bit type used throughout uIP.\r
+ *\r
+ * \hideinitializer\r
+ */\r
+typedef uint8_t u8_t;\r
+\r
+/**\r
+ * 16 bit datatype\r
+ *\r
+ * This typedef defines the 16-bit type used throughout uIP.\r
+ *\r
+ * \hideinitializer\r
+ */\r
+typedef uint16_t u16_t;\r
+\r
+/**\r
+ * Statistics datatype\r
+ *\r
+ * This typedef defines the dataype used for keeping statistics in\r
+ * uIP.\r
+ *\r
+ * \hideinitializer\r
+ */\r
+typedef unsigned short uip_stats_t;\r
+\r
+/**\r
+ * Maximum number of TCP connections.\r
+ *\r
+ * \hideinitializer\r
+ */\r
+#define UIP_CONF_MAX_CONNECTIONS 40\r
+\r
+/**\r
+ * Maximum number of listening TCP ports.\r
+ *\r
+ * \hideinitializer\r
+ */\r
+#define UIP_CONF_MAX_LISTENPORTS 40\r
+\r
+/**\r
+ * uIP buffer size.\r
+ *\r
+ * \hideinitializer\r
+ */\r
+#define UIP_CONF_BUFFER_SIZE     1480\r
+\r
+/**\r
+ * CPU byte order.\r
+ *\r
+ * \hideinitializer\r
+ */\r
+#define UIP_CONF_BYTE_ORDER      LITTLE_ENDIAN\r
+\r
+/**\r
+ * Logging on or off\r
+ *\r
+ * \hideinitializer\r
+ */\r
+#define UIP_CONF_LOGGING         0\r
+\r
+/**\r
+ * UDP support on or off\r
+ *\r
+ * \hideinitializer\r
+ */\r
+#define UIP_CONF_UDP             0\r
+\r
+/**\r
+ * UDP checksums on or off\r
+ *\r
+ * \hideinitializer\r
+ */\r
+#define UIP_CONF_UDP_CHECKSUMS   1\r
+\r
+/**\r
+ * uIP statistics on or off\r
+ *\r
+ * \hideinitializer\r
+ */\r
+#define UIP_CONF_STATISTICS      1\r
+\r
+/* Here we include the header file for the application(s) we use in\r
+   our project. */\r
+/*#include "smtp.h"*/\r
+/*#include "hello-world.h"*/\r
+/*#include "telnetd.h"*/\r
+#include "webserver.h"\r
+/*#include "dhcpc.h"*/\r
+/*#include "resolv.h"*/\r
+/*#include "webclient.h"*/\r
+\r
+#endif /* __UIP_CONF_H__ */\r
+\r
+/** @} */\r
+/** @} */\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/webserver.h b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/webserver.h
new file mode 100644 (file)
index 0000000..1acb290
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/webserver.h
@@ -0,0 +1,49 @@
+/*\r
+ * Copyright (c) 2002, Adam Dunkels.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions\r
+ * are met:\r
+ * 1. Redistributions of source code must retain the above copyright\r
+ *    notice, this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above\r
+ *    copyright notice, this list of conditions and the following\r
+ *    disclaimer in the documentation and/or other materials provided\r
+ *    with the distribution.\r
+ * 3. The name of the author may not be used to endorse or promote\r
+ *    products derived from this software without specific prior\r
+ *    written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS\r
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\r
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY\r
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE\r
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\r
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,\r
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\r
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+ * This file is part of the uIP TCP/IP stack\r
+ *\r
+ * $Id: webserver.h,v 1.2 2006/06/11 21:46:38 adam Exp $\r
+ *\r
+ */\r
+#ifndef __WEBSERVER_H__\r
+#define __WEBSERVER_H__\r
+\r
+#include "httpd.h"\r
+\r
+typedef struct httpd_state uip_tcp_appstate_t;\r
+/* UIP_APPCALL: the name of the application function. This function\r
+   must return void and take no arguments (i.e., C type "void\r
+   appfunc(void)"). */\r
+#ifndef UIP_APPCALL\r
+#define UIP_APPCALL     httpd_appcall\r
+#endif\r
+\r
+\r
+#endif /* __WEBSERVER_H__ */\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/lpc2368_flash.cfg b/Demo/ARM7_LPC2368_Eclipse/lpc2368_flash.cfg
new file mode 100644 (file)
index 0000000..c45e902
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/lpc2368_flash.cfg
@@ -0,0 +1,35 @@
+#daemon configuration\r
+telnet_port 4444\r
+gdb_port 3333\r
+\r
+#interface\r
+interface parport\r
+parport_port 0x378\r
+parport_cable wiggler\r
+jtag_speed 2\r
+\r
+#use combined on interfaces or targets that can't set TRST/SRST separately\r
+reset_config trst_and_srst srst_pulls_trst\r
+\r
+#jtag scan chain\r
+#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)\r
+jtag_device 4 0x1 0xf 0xe\r
+\r
+#target configuration\r
+daemon_startup reset\r
+\r
+#target <type> <startup mode>\r
+#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>\r
+target arm7tdmi little run_and_init 0 arm7tdmi-s_r4\r
+run_and_halt_time 0 30\r
+\r
+working_area 0 0x40000000 0x40000 nobackup\r
+\r
+#flash configuration\r
+flash bank lpc2000 0x0 0x80000 0 0 0 lpc2000_v2 12000 calc_checksum\r
+flash bank cfi 0x80000000 0x400000 2 2 0\r
+\r
+# For more information about the configuration files, take a look at:\r
+# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger\r
+\r
+target_script 0 reset program.script\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/lpc2xxx_pp.cfg b/Demo/ARM7_LPC2368_Eclipse/lpc2xxx_pp.cfg
new file mode 100644 (file)
index 0000000..4c3b0ce
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/lpc2xxx_pp.cfg
@@ -0,0 +1,33 @@
+#daemon configuration\r
+telnet_port 4444\r
+gdb_port 3333\r
+\r
+#interface\r
+interface parport\r
+parport_port 0x378\r
+parport_cable wiggler\r
+jtag_speed 2\r
+\r
+#use combined on interfaces or targets that can't set TRST/SRST separately\r
+reset_config trst_and_srst srst_pulls_trst\r
+\r
+#jtag scan chain\r
+#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)\r
+jtag_device 4 0x1 0xf 0xe\r
+\r
+#target configuration\r
+daemon_startup reset\r
+\r
+#target <type> <startup mode>\r
+#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>\r
+target arm7tdmi little run_and_halt 0 arm7tdmi-s_r4\r
+run_and_halt_time 0 30\r
+\r
+working_area 0 0x40000000 0x40000 nobackup\r
+\r
+#flash configuration\r
+flash bank lpc2000 0x0 0x80000 0 0 0 lpc2000_v2 12000 calc_checksum\r
+flash bank cfi 0x80000000 0x400000 2 2 0\r
+\r
+# For more information about the configuration files, take a look at:\r
+# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger\r

diff --git a/Demo/ARM7_LPC2368_Eclipse/program.script b/Demo/ARM7_LPC2368_Eclipse/program.script
new file mode 100644 (file)
index 0000000..363913c
--- /dev/null
+++ b/Demo/ARM7_LPC2368_Eclipse/program.script
@@ -0,0 +1,11 @@
+arm7_9 dcc_downloads enable\r
+wait_halt\r
+sleep 10\r
+poll\r
+flash probe 0\r
+#flash protect 0 0 26 'off'\r
+flash erase 0 0 26\r
+flash write 0 ./RTOSDemo/RTOSDemo.bin 0x0\r
+reset run\r
+sleep 10\r
+shutdown\r

diff --git a/Demo/ARM7_LPC2368_Rowley/FreeRTOSConfig.h b/Demo/ARM7_LPC2368_Rowley/FreeRTOSConfig.h
index 80547d98e782c5367661b937e8ae395cd1b1f256..2ef3f547053a9c097a8e28670c7a0fc4dbc41186 100644 (file)
--- a/Demo/ARM7_LPC2368_Rowley/FreeRTOSConfig.h
+++ b/Demo/ARM7_LPC2368_Rowley/FreeRTOSConfig.h
@@ -101,7 +101,7 @@ to exclude the API function. */
 \r
 \r
 #define VICVectAddr    VICAddress\r
-\r
+#define VICVectCntl4 VICVectPriority4\r
 typedef struct\r
 {\r
        long xColumn;\r

diff --git a/Demo/ARM7_LPC2368_Rowley/ParTest/ParTest.c b/Demo/ARM7_LPC2368_Rowley/ParTest/ParTest.c
index 1f5d7d2eb0b49cebdafdcc4651aa2825b5f04c02..11fc351a88918e6d0a574e123d55fe11e2427d53 100644 (file)
--- a/Demo/ARM7_LPC2368_Rowley/ParTest/ParTest.c
+++ b/Demo/ARM7_LPC2368_Rowley/ParTest/ParTest.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/ARM7_LPC2368_Rowley/main.c b/Demo/ARM7_LPC2368_Rowley/main.c
index 9d302858e3dd1aa49db5ce9e74488b7ca3980dda..77be6b9aeadecac30b51849cbb5478d7647d7a93 100644 (file)
--- a/Demo/ARM7_LPC2368_Rowley/main.c
+++ b/Demo/ARM7_LPC2368_Rowley/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/ARM7_LPC2368_Rowley/webserver/uIP_Task.c b/Demo/ARM7_LPC2368_Rowley/webserver/uIP_Task.c
index 7810b9a7bb48c1771a6adf2ae781b81831a65b2b..304004f022c4c0eef868f3ad1a8a811c5b0786de 100644 (file)
--- a/Demo/ARM7_LPC2368_Rowley/webserver/uIP_Task.c
+++ b/Demo/ARM7_LPC2368_Rowley/webserver/uIP_Task.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/ARM7_STR71x_IAR/FreeRTOSConfig.h b/Demo/ARM7_STR71x_IAR/FreeRTOSConfig.h
index dd00f816afa073fa07f1a92ebbf19b396eb4f34e..15717c200923a327dc3cb99ca34f88da14e86157 100644 (file)
--- a/Demo/ARM7_STR71x_IAR/FreeRTOSConfig.h
+++ b/Demo/ARM7_STR71x_IAR/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/ARM7_STR71x_IAR/ParTest/ParTest.c b/Demo/ARM7_STR71x_IAR/ParTest/ParTest.c
index c13dc292bfa709f82457d6a36ffba66f21dfc7cc..8b477c6d5adffe8b3358b8f79a401c7a13d7dd44 100644 (file)
--- a/Demo/ARM7_STR71x_IAR/ParTest/ParTest.c
+++ b/Demo/ARM7_STR71x_IAR/ParTest/ParTest.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/ARM7_STR71x_IAR/main.c b/Demo/ARM7_STR71x_IAR/main.c
index 73575899b0c4dafd43b41c5ab9676a19d0ff334b..5c94f34b8eb840edcb83ba5a58b21a45f28c7430 100644 (file)
--- a/Demo/ARM7_STR71x_IAR/main.c
+++ b/Demo/ARM7_STR71x_IAR/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/ARM7_STR71x_IAR/serial/serial.c b/Demo/ARM7_STR71x_IAR/serial/serial.c
index 6e55a20ba2f503bc672cb2df4ab350e6662fab2e..1e423cf07b5457a3540eaebcd4d6faf5e7433242 100644 (file)
--- a/Demo/ARM7_STR71x_IAR/serial/serial.c
+++ b/Demo/ARM7_STR71x_IAR/serial/serial.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/ARM7_STR75x_GCC/FreeRTOSConfig.h b/Demo/ARM7_STR75x_GCC/FreeRTOSConfig.h
index 47b69679ae88aeca7450c7b94270174ba4cb26e4..c2073233c95efa63d6cc7a53176f8a4eaa986294 100644 (file)
--- a/Demo/ARM7_STR75x_GCC/FreeRTOSConfig.h
+++ b/Demo/ARM7_STR75x_GCC/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/ARM7_STR75x_GCC/ParTest/ParTest.c b/Demo/ARM7_STR75x_GCC/ParTest/ParTest.c
index d9b6b455b9bb73c7a01008f3b6178987e6175b0a..8a6fa0edf4736e39eaea254e2de590dac2bb4618 100644 (file)
--- a/Demo/ARM7_STR75x_GCC/ParTest/ParTest.c
+++ b/Demo/ARM7_STR75x_GCC/ParTest/ParTest.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/ARM7_STR75x_GCC/main.c b/Demo/ARM7_STR75x_GCC/main.c
index 124b44dbe52e23f8da3f609a064f129d26cb2fdf..c9501a4127d8563256872697aadc10689ada79e9 100644 (file)
--- a/Demo/ARM7_STR75x_GCC/main.c
+++ b/Demo/ARM7_STR75x_GCC/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/ARM7_STR75x_GCC/serial/serial.c b/Demo/ARM7_STR75x_GCC/serial/serial.c
index ea1d3a51fcd22a079e288e6119f1fe406fccc20f..c2795560f4a1df06dcef0f1a851b6cd3cc555b67 100644 (file)
--- a/Demo/ARM7_STR75x_GCC/serial/serial.c
+++ b/Demo/ARM7_STR75x_GCC/serial/serial.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/ARM7_STR75x_GCC/serial/serialISR.c b/Demo/ARM7_STR75x_GCC/serial/serialISR.c
index c8594d71fe0c2215a078fffcd3cb1234b2e22a72..fc727d2ca6bf4886805e4ed75120ad08bfdcc3cf 100644 (file)
--- a/Demo/ARM7_STR75x_GCC/serial/serialISR.c
+++ b/Demo/ARM7_STR75x_GCC/serial/serialISR.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/ARM7_STR75x_IAR/FreeRTOSConfig.h b/Demo/ARM7_STR75x_IAR/FreeRTOSConfig.h
index 0aa09455ce27313a3e64025a12ed64dc8918acf9..6271a2312119415ef863ac46f1b98dd0951d3fc3 100644 (file)
--- a/Demo/ARM7_STR75x_IAR/FreeRTOSConfig.h
+++ b/Demo/ARM7_STR75x_IAR/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/ARM7_STR75x_IAR/ParTest/ParTest.c b/Demo/ARM7_STR75x_IAR/ParTest/ParTest.c
index d9b6b455b9bb73c7a01008f3b6178987e6175b0a..8a6fa0edf4736e39eaea254e2de590dac2bb4618 100644 (file)
--- a/Demo/ARM7_STR75x_IAR/ParTest/ParTest.c
+++ b/Demo/ARM7_STR75x_IAR/ParTest/ParTest.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/ARM7_STR75x_IAR/main.c b/Demo/ARM7_STR75x_IAR/main.c
index 90c6f0c5424ed99b297d03825be1607c0a9f111b..a1da8a47db4f47388ab5cefefbc52ffe4521e1b0 100644 (file)
--- a/Demo/ARM7_STR75x_IAR/main.c
+++ b/Demo/ARM7_STR75x_IAR/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/ARM7_STR75x_IAR/serial/serial.c b/Demo/ARM7_STR75x_IAR/serial/serial.c
index 7f9f2af94de2f7d43e393e94fcfe20eda9d9b857..d5db3c0660b3c9c490e845f6a1d770ce6cde7e63 100644 (file)
--- a/Demo/ARM7_STR75x_IAR/serial/serial.c
+++ b/Demo/ARM7_STR75x_IAR/serial/serial.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/ARM9_STR91X_IAR/FreeRTOSConfig.h b/Demo/ARM9_STR91X_IAR/FreeRTOSConfig.h
index 8f1b2c02f472e2ec999765900275e7442a600496..6888373262400b300d3ba92f4b9011ce68b813a9 100644 (file)
--- a/Demo/ARM9_STR91X_IAR/FreeRTOSConfig.h
+++ b/Demo/ARM9_STR91X_IAR/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS distribution.\r
 \r
@@ -46,19 +46,28 @@
  * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.\r
  *----------------------------------------------------------*/\r
 \r
+/**\r
+ * The STR9 port can use either the watchdog or the timer 2 interrupt to generate\r
+ * the system tick.  Set configUSE_WATCHDOG_TICK to 1 to use the watchdog, or\r
+ * 0 to use timer 2.\r
+ */\r
+#define configUSE_WATCHDOG_TICK                        1\r
+\r
+\r
 #define configUSE_PREEMPTION                   1\r
 #define configUSE_IDLE_HOOK                            0\r
 #define configUSE_TICK_HOOK                            0\r
 #define configCPU_CLOCK_HZ                             ( ( unsigned portLONG ) 96000000 )\r
 #define configCPU_PERIPH_HZ                            ( ( unsigned portLONG ) 48000000 )\r
-#define configTICK_RATE_HZ                             ( ( portTickType ) 1000 )\r
+#define configTICK_RATE_HZ                             ( ( portTickType ) 100 )\r
 #define configMAX_PRIORITIES                   ( ( unsigned portBASE_TYPE ) 5 )\r
 #define configMINIMAL_STACK_SIZE               ( ( unsigned portSHORT ) 180 )\r
-#define configTOTAL_HEAP_SIZE                  ( ( size_t ) 50000 )\r
+#define configTOTAL_HEAP_SIZE                  ( ( size_t ) 52000 )\r
 #define configMAX_TASK_NAME_LEN                        ( 16 )\r
 #define configUSE_TRACE_FACILITY               1\r
 #define configUSE_16_BIT_TICKS                 0\r
 #define configIDLE_SHOULD_YIELD                        1\r
+#define configUSE_MUTEXES                              1\r
 \r
 /* Co-routine definitions. */\r
 #define configUSE_CO_ROUTINES                  0\r
@@ -67,13 +76,13 @@
 /* Set the following definitions to 1 to include the API function, or zero\r
 to exclude the API function. */\r
 \r
-#define INCLUDE_vTaskPrioritySet                       1\r
-#define INCLUDE_uxTaskPriorityGet                      1\r
-#define INCLUDE_vTaskDelete                                    1\r
-#define INCLUDE_vTaskCleanUpResources          0\r
-#define INCLUDE_vTaskSuspend                           1\r
-#define INCLUDE_vTaskDelayUntil                                1\r
-#define INCLUDE_vTaskDelay                                     1\r
-\r
+#define INCLUDE_vTaskPrioritySet                               1\r
+#define INCLUDE_uxTaskPriorityGet                              1\r
+#define INCLUDE_vTaskDelete                                            1\r
+#define INCLUDE_vTaskCleanUpResources                  0\r
+#define INCLUDE_vTaskSuspend                                   1\r
+#define INCLUDE_vTaskDelayUntil                                        1\r
+#define INCLUDE_vTaskDelay                                             1\r
+#define INCLUDE_xTaskGetCurrentTaskHandle              1\r
 \r
 #endif /* FREERTOS_CONFIG_H */\r

diff --git a/Demo/ARM9_STR91X_IAR/Library/include/91x_conf.h b/Demo/ARM9_STR91X_IAR/Library/include/91x_conf.h
index 565ec916ec97b6a6c67f3a5e5851ed59a022dc69..4fc85fff1a06bbdb39661a0a9890ce9d83ea605a 100644 (file)
--- a/Demo/ARM9_STR91X_IAR/Library/include/91x_conf.h
+++ b/Demo/ARM9_STR91X_IAR/Library/include/91x_conf.h
@@ -59,10 +59,10 @@
 /************************* WIU *************************/\r
 //#define _WIU\r
 /************************* TIM *************************/\r
-//#define _TIM\r
+#define _TIM\r
 //#define _TIM0\r
 //#define _TIM1\r
-//#define _TIM2\r
+#define _TIM2\r
 //#define _TIM3\r
 /************************* GPIO ************************/\r
 #define _GPIO\r

diff --git a/Demo/ARM9_STR91X_IAR/Library/include/91x_enet.h b/Demo/ARM9_STR91X_IAR/Library/include/91x_enet.h
index c22d8dd2297fc1bac39d5bf3d99c00437e9b876b..7ba5263e17759af3f5120848555404de6bc99330 100644 (file)
--- a/Demo/ARM9_STR91X_IAR/Library/include/91x_enet.h
+++ b/Demo/ARM9_STR91X_IAR/Library/include/91x_enet.h
@@ -93,11 +93,12 @@ typedef struct {
 \r
 /* AddressFilteringMode */\r
 #define MAC_Perfect_Multicast_Perfect 0x0\r
-#define MAC_Perfect_Muticast_Hash     0x1<<17\r
-#define MAC_Hash_Multicast_Hash       0x3<<17\r
-#define Inverse                       0x4<<17\r
-#define Promiscuous                   0x5<<17\r
-#define MAC_Hash_Muticast_All         0x6<<17\r
+#define MAC_Perfect_Multicast_Hash    0x1<<17\r
+#define MAC_Hash_Multicast_Hash       0x2<<17\r
+#define MAC_Inverse                   0x3<<17\r
+#define MAC_Promiscuous               0x4<<17\r
+#define MAC_Perfect_Multicast_All     0x5<<17\r
+#define MAC_Hash_Multicast_All        0x6<<17\r
 \r
 /* VLANFilteringMode */\r
 #define VLANFilter_VLTAG_VLID        1\r
@@ -109,7 +110,7 @@ typedef struct {
 \r
 \r
 /* MAC Address*/\r
-#define MAC_ADDR0 0x0D\r
+#define MAC_ADDR0 0x00\r
 #define MAC_ADDR1 0x0A\r
 #define MAC_ADDR2 0x08\r
 #define MAC_ADDR3 0x04\r

diff --git a/Demo/ARM9_STR91X_IAR/Library/include/91x_map.h b/Demo/ARM9_STR91X_IAR/Library/include/91x_map.h
index e405a263096d7a8908604249df34cb31846f52a2..147302ff6fdbe65caec51c91b646f09d1fc52ced 100644 (file)
--- a/Demo/ARM9_STR91X_IAR/Library/include/91x_map.h
+++ b/Demo/ARM9_STR91X_IAR/Library/include/91x_map.h
@@ -271,7 +271,7 @@ typedef struct
 } ENET_MAC_TypeDef;\r
 \r
 /* DMA Registers */\r
-typedef struct \r
+typedef struct\r
 {\r
   vu32 SCR;           /* DMA Status and Control Register         */\r
   vu32 IER;           /* DMA Interrupt Sources Enable Register   */\r
@@ -510,10 +510,10 @@ typedef struct
 #define AHB_DMA_B          (0x68000000) /* DMA Buffered Space   */\r
 \r
 #define AHB_ENET_MAC_U     (0x7C000400) /* ENET_MAC  UnBuffered Space */\r
-#define AHB_ENET_MAC_B     (0x6C000000) /* ENET_MAC  Buffered Space   */\r
+#define AHB_ENET_MAC_B     (0x6C000400) /* ENET_MAC  Buffered Space   */\r
 \r
 #define AHB_ENET_DMA_U     (0x7C000000) /* ENET_DMA  Unbuffered Space */\r
-#define AHB_ENET_DMA_B     (0x6C000400) /* ENET_DMA  Buffered Space    */\r
+#define AHB_ENET_DMA_B     (0x6C000000) /* ENET_DMA  Buffered Space    */\r
 \r
 #define AHB_VIC1_U         (0xFC000000) /* Secondary VIC1 UnBuffered Space */\r
 #define AHB_VIC0_U         (0xFFFFF000) /* Primary VIC0 UnBuffered Space   */\r
@@ -592,7 +592,7 @@ typedef struct
 /*----------------------------- Unbuffered Mode ------------------------------*/\r
 /*----------------------------------------------------------------------------*/\r
 \r
-#ifndef Buffered \r
+#ifndef Buffered\r
 \r
 /*******************************************************************************\r
 *                  AHBAPB peripheral Unbuffered Base Address                   *\r
@@ -618,7 +618,7 @@ typedef struct
 *                  EMI peripheral Unbuffered Base Address                      *\r
 *******************************************************************************/\r
 \r
-#define EMI_BASE           (AHB_EMI_U)    \r
+#define EMI_BASE           (AHB_EMI_U)\r
 \r
 /*******************************************************************************\r
 *                  FMI peripheral Unbuffered Base Address                      *\r

diff --git a/Demo/ARM9_STR91X_IAR/Library/source/91x_enet.c b/Demo/ARM9_STR91X_IAR/Library/source/91x_enet.c
index 29650d3456d4b22a6313bdf85b926f8cd0a7dc66..4a7a99661111f039c8a45daaedba32f76113aa8a 100644 (file)
--- a/Demo/ARM9_STR91X_IAR/Library/source/91x_enet.c
+++ b/Demo/ARM9_STR91X_IAR/Library/source/91x_enet.c
@@ -1,4 +1,4 @@
-/******************** \r
+/********************\r
 * Original work (C) COPYRIGHT 2006 STMicroelectronics **************************\r
 * Modifications (C) CopyRight 2006 Richard barry\r
 * File Name          : 91x_enet.c\r
@@ -54,7 +54,8 @@
 #define ENET_NUM_RX_BUFFERS 8\r
 \r
 static ENET_DMADSCRBase  dmaTxDscrBase, dmaRxDscrBase[ ENET_NUM_RX_BUFFERS ];\r
-static volatile u8 RxBuff[ ENET_NUM_RX_BUFFERS ][ENET_BUFFER_SIZE], TxBuff[ENET_BUFFER_SIZE];\r
+static u8 RxBuff[ ENET_NUM_RX_BUFFERS ][ENET_BUFFER_SIZE];\r
+u8 TxBuff[ENET_BUFFER_SIZE];\r
 \r
 /* Private function prototypes -----------------------------------------------*/\r
 extern MEMCOPY_L2S_BY4();\r
@@ -93,7 +94,7 @@ void ENET_MACControlConfig(ENET_MACConfig *MAC_Config)
   ENET_MAC->MCR |= MAC_Config->AddressFilteringMode;\r
 \r
   /* VLAN Filtering Mode */\r
-  ENET_MAC->MCR = (MAC_Config->VLANFilteringMode)<<15;\r
+       ENET_MAC->MCR |= (MAC_Config->VLANFilteringMode)<<15;\r
 \r
   /*Wrong Frame Pass */\r
   if (MAC_Config->PassWrongFrame == ENABLE) ENET_MAC->MCR |=MAC_MCR_PWF;\r
@@ -104,8 +105,8 @@ void ENET_MACControlConfig(ENET_MACConfig *MAC_Config)
   else ENET_MAC->MCR &=~MAC_MCR_ELC;\r
 \r
   /* Broadcast Frame Reception */\r
-  if (MAC_Config->BroadcastFrameReception == ENABLE) ENET_MAC->MCR |=MAC_MCR_DBF;\r
-  else ENET_MAC->MCR &=~MAC_MCR_DBF;\r
+  if (MAC_Config->BroadcastFrameReception == ENABLE) ENET_MAC->MCR &=~MAC_MCR_DBF;\r
+  else ENET_MAC->MCR |=MAC_MCR_DBF;\r
 \r
   /* PacketRetry */\r
   if (MAC_Config->PacketRetry == ENABLE) ENET_MAC->MCR &=~MAC_MCR_DPR;\r
@@ -361,7 +362,6 @@ void ENET_Init ()
   vu32 regValue;\r
   ENET_MACConfig *MAC_Config;\r
   ENET_MACConfig config;\r
-  u32 macAddrLow, macAddrHigh;\r
 \r
   /* De-assert the SRESET bit of ENET + MAC devices */\r
   ENET_DMA->SCR &=~DMA_SCR_SRESET;\r
@@ -372,6 +372,7 @@ void ENET_Init ()
   MAC_Config->MIIPrescaler = MIIPrescaler_2;\r
   MAC_Config->LoopbackMode = DISABLE;\r
   MAC_Config->AddressFilteringMode = MAC_Perfect_Multicast_Perfect;\r
+       MAC_Config->VLANFilteringMode = VLANfilter_VLTAG;\r
   MAC_Config->PassWrongFrame = DISABLE;\r
   MAC_Config->LateCollision = DISABLE;\r
   MAC_Config->BroadcastFrameReception = ENABLE;\r
@@ -402,24 +403,26 @@ void ENET_Init ()
   ENET_MIIWriteReg(0x0,MAC_MII_REG_XCR, 0x8000);\r
 \r
   /* Delay to assure PHY reset */\r
-  vTaskDelay( 3000 );\r
+  vTaskDelay( 3000 / portTICK_RATE_MS );\r
 \r
   /* initialize the opearting mode */\r
   while( ENET_SetOperatingMode() == pdFAIL )\r
   {\r
-       vTaskDelay( 3000 );\r
+               vTaskDelay( 3000 / portTICK_RATE_MS );\r
   }\r
-\r
+       \r
   /*set MAC physical*/\r
-  macAddrLow  = (MAC_ADDR3<<24) + (MAC_ADDR2<<16) + \\r
-                (MAC_ADDR1<<8) + MAC_ADDR0;\r
-\r
-  // Higher MAC address\r
-  macAddrHigh = (MAC_ADDR5<<8) + MAC_ADDR4;\r
-\r
+       //ENET_MAC->MAH = (MAC_ADDR5<<8) + MAC_ADDR4;\r
+       //ENET_MAC->MAL = (MAC_ADDR3<<24) + (MAC_ADDR2<<16) + (MAC_ADDR1<<8) + MAC_ADDR0;\r
+       \r
   /* Initialize Rx and Tx descriptors in memory */\r
   ENET_TxDscrInit();\r
   ENET_RxDscrInit();\r
+\r
+       // What's happening ???\r
+#ifdef DEBUG\r
+       //int pippo = 1; // Do NOT remove!!!\r
+#endif\r
 }\r
 \r
 /********************************************************************************\r

diff --git a/Demo/ARM9_STR91X_IAR/Library/source/91x_it.c b/Demo/ARM9_STR91X_IAR/Library/source/91x_it.c
index cb09f2b93ae23939e0f9302bc153371be2131e64..adf5696c967366a55816eef7a7241163634072ad 100644 (file)
--- a/Demo/ARM9_STR91X_IAR/Library/source/91x_it.c
+++ b/Demo/ARM9_STR91X_IAR/Library/source/91x_it.c
@@ -22,6 +22,7 @@
 * OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION\r
 * CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.\r
 *******************************************************************************/\r
+#include "FreeRTOSConfig.h"\r
 #include "91x_it.h"\r
 \r
 /*******************************************************************************\r
@@ -136,9 +137,9 @@ void TIM1_IRQHandler(void)
 * Output         : None\r
 * Return         : None\r
 *******************************************************************************/\r
-void TIM2_IRQHandler(void)\r
-{\r
-}\r
+//void TIM2_IRQHandler(void)\r
+//{\r
+//}\r
 /*******************************************************************************\r
 * Function Name  : TIM3_IRQHandler\r
 * Description    : This function handles the TIM3 interrupt request\r
@@ -371,4 +372,16 @@ void PFQBC_IRQHandler(void)
 {\r
 }\r
 \r
+#if configUSE_WATCHDOG_TICK == 0\r
+       /* The kernel is not using the watchdog interrupt so it can be defined here. */\r
+       void WDG_IRQHandler( void )\r
+       {\r
+       }\r
+#else\r
+       /* The kernel is not using the timer 2 interrupt so it can be defined here. */\r
+       void TIM2_IRQHandler( void )\r
+       {\r
+       }\r
+#endif /* configUSE_WATCHDOG_TICK */\r
+\r
 /******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/\r

diff --git a/Demo/ARM9_STR91X_IAR/Library/source/91x_tim.c b/Demo/ARM9_STR91X_IAR/Library/source/91x_tim.c
new file mode 100644 (file)
index 0000000..a0e78f0
--- /dev/null
+++ b/Demo/ARM9_STR91X_IAR/Library/source/91x_tim.c
@@ -0,0 +1,692 @@
+/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************\r
+* File Name          : 91x_tim.c\r
+* Author             : MCD Application Team\r
+* Date First Issued  : 05/18/2006 : Version 1.0\r
+* Description        : This file provides all the TIM software functions.\r
+********************************************************************************\r
+* History:\r
+* 05/22/2007 : Version 1.2\r
+* 05/24/2006 : Version 1.1\r
+* 05/18/2006 : Version 1.0\r
+********************************************************************************\r
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH\r
+* CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. AS\r
+* A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT\r
+* OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT\r
+* OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION\r
+* CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.\r
+*******************************************************************************/\r
+\r
+/* Includes ------------------------------------------------------------------*/\r
+#include "91x_tim.h"\r
+\r
+/* Include of other module interface headers ---------------------------------*/\r
+/* Local includes ------------------------------------------------------------*/\r
+/* Private typedef -----------------------------------------------------------*/\r
+/* Private define ------------------------------------------------------------*/\r
+\r
+/* TIM Bits Masks */\r
+\r
+#define TIM_PWM_MASK          0x0010\r
+#define TIM_OPM_MASK          0x0020\r
+#define TIM_OC1_ENABLE_MASK   0x0040\r
+#define TIM_OC1_DISABLE_MASK  0xFFBF\r
+#define TIM_OC2_ENABLE_MASK   0x0080\r
+#define TIM_OC2_DISABLE_MASK  0xFF7F\r
+\r
+#define TIM_OLVL1_SET_MASK    0x0100\r
+#define TIM_OLVL1_RESET_MASK  0xFEFF\r
+\r
+#define TIM_OLVL2_SET_MASK    0x0200\r
+#define TIM_OLVL2_RESET_MASK  0xFDFF\r
+\r
+#define TIM_ENABLE_MASK       0x8000\r
+#define TIM_DISABLE_MASK      0x7FFF\r
+\r
+#define TIM_DMA_CLEAR_MASK    0xCFFF\r
+\r
+/* Private macro -------------------------------------------------------------*/\r
+/* Private variables ---------------------------------------------------------*/\r
+/* Private function prototypes -----------------------------------------------*/\r
+/* Interface functions -------------------------------------------------------*/\r
+/* Private functions ---------------------------------------------------------*/\r
+/*******************************************************************************\r
+* Function Name  : TIM_DeInit\r
+* Description    : Initializes TIM peripheral control and registers to their\r
+*                : default reset values.\r
+* Input          : TIMx: where x can be from 0 to 3 to select the TIM\r
+*                  peripheral.\r
+* Output         : None\r
+* Return         : None\r
+*******************************************************************************/\r
+void TIM_DeInit(TIM_TypeDef *TIMx)\r
+{ \r
+  if((TIMx == TIM0)||(TIMx == TIM1))\r
+  {\r
+    SCU_APBPeriphReset(__TIM01, DISABLE);    /* TIM0 & TIM1 Reset's off */\r
+  }\r
+  else\r
+  {\r
+    SCU_APBPeriphReset(__TIM23, DISABLE);    /* TIM2 & TIM3 Reset's off */\r
+  }\r
+  \r
+  /* Set all the TIMx registers to thier default values */ \r
+  TIMx->OC1R = 0x8000;\r
+  TIMx->OC2R = 0x8000;\r
+  TIMx->CR1  = 0x0;\r
+  TIMx->CR2  = 0x1;\r
+  TIMx->CNTR = 0x1234;\r
+  TIMx->SR   = 0x0;\r
+}\r
+\r
+/*******************************************************************************\r
+* Function Name  : TIM_StructInit\r
+* Description    : Fills in a TIM_InitTypeDef structure with the reset value of\r
+*                  each parameter.\r
+* Input          : TIM_InitStruct : pointer to a TIM_InitTypeDef structure\r
+                   which will be initialized.\r
+* Output         : None\r
+* Return         : None.\r
+*******************************************************************************/\r
+void TIM_StructInit(TIM_InitTypeDef *TIM_InitStruct)\r
+{\r
+  TIM_InitStruct->TIM_Mode           = 0x0000;\r
+  TIM_InitStruct->TIM_OC1_Modes      = 0x0000;\r
+  TIM_InitStruct->TIM_OC2_Modes      = 0x0000;\r
+  TIM_InitStruct->TIM_Clock_Source   = 0x0000;\r
+  TIM_InitStruct->TIM_Clock_Edge     = 0x0000;\r
+  TIM_InitStruct->TIM_OPM_INPUT_Edge = 0x0000;\r
+  TIM_InitStruct->TIM_ICAP1_Edge     = 0x0000;\r
+  TIM_InitStruct->TIM_ICAP2_Edge     = 0x0000;\r
+  TIM_InitStruct->TIM_Prescaler      = 0x0000;\r
+  TIM_InitStruct->TIM_Pulse_Level_1  = 0x0000;\r
+  TIM_InitStruct->TIM_Pulse_Level_2  = 0x0000;\r
+  TIM_InitStruct->TIM_Period_Level   = 0x0000;\r
+  TIM_InitStruct->TIM_Pulse_Length_1 = 0x0000;\r
+  TIM_InitStruct->TIM_Pulse_Length_2 = 0x0000;\r
+  TIM_InitStruct->TIM_Full_Period    = 0x0000;\r
+}\r
+\r
+/*******************************************************************************\r
+* Function Name  : TIM_Init\r
+* Description    : Initializes TIM  peripheral according to the specified\r
+*                  parameters in the TIM_InitTypeDef structure.\r
+* Input1         : TIMx: where x can be from 0 to 3 to select the TIM\r
+*                  peripheral.\r
+* Input2         : TIM_InitStruct: pointer to a TIM_InitTypeDef structure that\r
+*                  contains the configuration information for the specified\r
+*                  TIM peripheral.\r
+* Output         : None\r
+* Return         : None\r
+*******************************************************************************/\r
+\r
+void TIM_Init(TIM_TypeDef *TIMx, TIM_InitTypeDef *TIM_InitStruct)\r
+{\r
+/***************************** Clock configuration ****************************/\r
+\r
+  if (TIM_InitStruct->TIM_Clock_Source == TIM_CLK_APB)\r
+  {\r
+    /* APB clock */\r
+    TIMx->CR1 &= TIM_CLK_APB;\r
+  }\r
+  else\r
+  {\r
+    /* External/SCU clock */\r
+    TIMx->CR1 |= TIM_CLK_EXTERNAL;\r
+    if (TIM_InitStruct->TIM_Clock_Edge == TIM_CLK_EDGE_RISING)\r
+    {\r
+      /* Clock rising edge */\r
+      TIMx->CR1 |= TIM_CLK_EDGE_RISING;\r
+    }\r
+    else\r
+    {\r
+      /* Clock falling edge */\r
+      TIMx->CR1 &= TIM_CLK_EDGE_FALLING;\r
+    }\r
+  }\r
+\r
+/************************** Prescaler configuration ***************************/\r
+\r
+  TIMx->CR2 =( TIMx->CR2 & 0xFF00 )|TIM_InitStruct->TIM_Prescaler ;\r
+  \r
+/********************************** TIM Modes *********************************/\r
+\r
+  switch ( TIM_InitStruct->TIM_Mode)\r
+  {\r
+/******************************* PWM Input mode *******************************/\r
+\r
+    case TIM_PWMI:\r
+\r
+      /* Set the PWMI Bit */\r
+      TIMx->CR1 |= TIM_PWMI;\r
+\r
+      /* Set the first edge Level */\r
+      if ( TIM_InitStruct->TIM_ICAP1_Edge == TIM_ICAP1_EDGE_RISING)\r
+      {\r
+        TIMx->CR1 |= TIM_ICAP1_EDGE_RISING;\r
+      }\r
+      else\r
+      {\r
+        TIMx->CR1 &= TIM_ICAP1_EDGE_FALLING;\r
+      }\r
+\r
+      /* Set the Second edge Level ( Opposite of the first level ) */\r
+      if ( TIM_InitStruct->TIM_ICAP1_Edge == TIM_ICAP1_EDGE_RISING)\r
+      {\r
+        TIMx->CR1 &= TIM_ICAP2_EDGE_FALLING;\r
+      }\r
+      else\r
+      {\r
+       TIMx->CR1 |= TIM_ICAP2_EDGE_RISING;\r
+      }\r
+\r
+      break;\r
+\r
+/************************** Output compare channel 1 **************************/\r
+\r
+    case TIM_OCM_CHANNEL_1:\r
+\r
+      if (TIM_InitStruct->TIM_Pulse_Level_1 == TIM_HIGH)\r
+      {\r
+        TIMx->CR1 |= TIM_OLVL1_SET_MASK;\r
+      }\r
+      else\r
+      {\r
+        TIMx->CR1 &= TIM_OLVL1_RESET_MASK;\r
+      }\r
+      \r
+      TIMx->OC1R = TIM_InitStruct->TIM_Pulse_Length_1;\r
+\r
+      if (TIM_InitStruct->TIM_OC1_Modes == TIM_TIMING)\r
+      {\r
+       TIMx->CR1 &= TIM_OC1_DISABLE_MASK;\r
+      }\r
+      else\r
+      {\r
+        TIMx->CR1 |= TIM_OC1_ENABLE_MASK;\r
+      }\r
+\r
+      break;\r
+\r
+/************************** Output compare channel 2 **************************/\r
+\r
+    case TIM_OCM_CHANNEL_2:\r
+\r
+      if (TIM_InitStruct->TIM_Pulse_Level_2 == TIM_HIGH)\r
+      {\r
+       TIMx->CR1 |= TIM_OLVL2_SET_MASK;\r
+      }\r
+      else\r
+      {\r
+        TIMx->CR1 &= TIM_OLVL2_RESET_MASK;\r
+      }\r
+       \r
+      TIMx->OC2R = TIM_InitStruct->TIM_Pulse_Length_2;\r
+\r
+      if (TIM_InitStruct->TIM_OC2_Modes == TIM_TIMING)\r
+      {\r
+        TIMx->CR1 &= TIM_OC2_DISABLE_MASK;\r
+      }\r
+      else\r
+      {\r
+        TIMx->CR1 |= TIM_OC2_ENABLE_MASK;\r
+      }\r
+\r
+      break;\r
+\r
+/************************ Output compare channel 1 & 2 ************************/\r
+\r
+   case TIM_OCM_CHANNEL_12:\r
+\r
+    TIMx->OC2R = TIM_InitStruct->TIM_Pulse_Length_2;\r
+    TIMx->OC1R = TIM_InitStruct->TIM_Pulse_Length_1;\r
+\r
+    if (TIM_InitStruct->TIM_OC2_Modes == TIM_TIMING)\r
+    {\r
+      TIMx->CR1 &= TIM_OC2_DISABLE_MASK;\r
+    }\r
+    else\r
+    {\r
+      TIMx->CR1 |= TIM_OC2_ENABLE_MASK;\r
+    }\r
+\r
+    if (TIM_InitStruct->TIM_OC1_Modes == TIM_TIMING)\r
+    {\r
+      TIMx->CR1 &= TIM_OC1_DISABLE_MASK;\r
+    }\r
+    else\r
+    {\r
+      TIMx->CR1 |= TIM_OC1_ENABLE_MASK;\r
+    }\r
+    \r
+    if (TIM_InitStruct->TIM_Pulse_Level_1 == TIM_HIGH)\r
+    {\r
+      TIMx->CR1 |= TIM_OLVL1_SET_MASK;\r
+    }\r
+    else\r
+    {\r
+      TIMx->CR1 &= TIM_OLVL1_RESET_MASK;\r
+    }\r
+\r
+    if (TIM_InitStruct->TIM_Pulse_Level_2 == TIM_HIGH)\r
+    {\r
+      TIMx->CR1 |= TIM_OLVL2_SET_MASK;\r
+    }\r
+    else\r
+    {\r
+      TIMx->CR1 &= TIM_OLVL2_RESET_MASK;\r
+    }\r
+\r
+    break;\r
+\r
+/********************************** PWM mode **********************************/\r
+\r
+    case TIM_PWM:\r
+\r
+      /* Set the Level During the pulse */\r
+      if ( TIM_InitStruct->TIM_Pulse_Level_1 == TIM_HIGH)\r
+      {\r
+        TIMx->CR1 |= TIM_OLVL2_SET_MASK;\r
+      }\r
+      else\r
+      {\r
+        TIMx->CR1 &= TIM_OLVL2_RESET_MASK;\r
+      }\r
+\r
+      /* Set the Level after the pulse */\r
+      if (TIM_InitStruct->TIM_Period_Level == TIM_HIGH)\r
+      {\r
+        TIMx->CR1 |= TIM_OLVL1_SET_MASK;\r
+      }\r
+      else\r
+      {\r
+        TIMx->CR1 &= TIM_OLVL1_RESET_MASK;\r
+      }\r
+      \r
+      /* Set the OCAE */\r
+      TIMx->CR1 |= TIM_OC1_ENABLE_MASK;\r
+\r
+      /* Set the PWM Bit */\r
+      TIMx->CR1 |= TIM_PWM_MASK;\r
+\r
+      /* Set the Duty Cycle value */\r
+      \r
+      TIMx->OC1R = TIM_InitStruct->TIM_Pulse_Length_1 ;\r
+\r
+      /* Set the Full Period */\r
+      \r
+      TIMx->OC2R = TIM_InitStruct->TIM_Full_Period ;\r
+\r
+      break;\r
+\r
+/******************************* One pulse mode *******************************/\r
+\r
+    case TIM_OPM:\r
+\r
+      /* Set the Level During the pulse */\r
+      if (TIM_InitStruct->TIM_Pulse_Level_1 == TIM_HIGH)\r
+      {\r
+        TIMx->CR1 |= TIM_OLVL2_SET_MASK;\r
+      }\r
+\r
+      /* Set the Level after the pulse  */\r
+      if (TIM_InitStruct->TIM_Period_Level == TIM_HIGH)\r
+      {\r
+        TIMx->CR1 |= TIM_OLVL1_SET_MASK;\r
+      }\r
+      \r
+      /* Set the Activation Edge on the ICAP 1 */\r
+      if (TIM_InitStruct->TIM_OPM_INPUT_Edge == TIM_OPM_EDGE_RISING)\r
+      {\r
+        TIMx->CR1 |= TIM_OPM_EDGE_RISING;\r
+      }\r
+\r
+      /* Set the Output Compare Function  */\r
+      TIMx->CR1 |= TIM_OC1_ENABLE_MASK;\r
+\r
+      /* Set the One pulse mode */\r
+      TIMx->CR1 |= TIM_OPM_MASK;\r
+\r
+      /* Set the Pulse length  */\r
+      TIMx->OC1R = TIM_InitStruct->TIM_Pulse_Length_1;\r
+\r
+      break;\r
+\r
+/*************************** Input capture channel 1 **************************/\r
+\r
+    case TIM_ICAP_CHANNEL_1:\r
+\r
+      if (TIM_InitStruct->TIM_ICAP1_Edge == TIM_ICAP1_EDGE_RISING)\r
+      {\r
+        TIMx->CR1 |= TIM_ICAP1_EDGE_RISING;\r
+      }\r
+      else\r
+      {\r
+        TIMx->CR1 &= TIM_ICAP1_EDGE_FALLING;\r
+      }\r
+\r
+      break;\r
+\r
+/*************************** Input capture channel 2 **************************/\r
+\r
+    case TIM_ICAP_CHANNEL_2:\r
+\r
+      if (TIM_InitStruct->TIM_ICAP2_Edge == TIM_ICAP2_EDGE_RISING)\r
+      {\r
+        TIMx->CR1 |= TIM_ICAP2_EDGE_RISING;\r
+      }\r
+      else\r
+      {\r
+        TIMx->CR1 &= TIM_ICAP2_EDGE_FALLING;\r
+      }\r
+\r
+      break;\r
+\r
+/************************* Input capture channel 1 & 2 ************************/\r
+\r
+    case TIM_ICAP_CHANNEL_12:\r
+      if (TIM_InitStruct->TIM_ICAP2_Edge == TIM_ICAP2_EDGE_RISING)\r
+      {\r
+        TIMx->CR1 |= TIM_ICAP2_EDGE_RISING;\r
+      }\r
+      else\r
+      {\r
+        TIMx->CR1 &= TIM_ICAP2_EDGE_FALLING;\r
+      }\r
+\r
+      if (TIM_InitStruct->TIM_ICAP1_Edge == TIM_ICAP1_EDGE_RISING)\r
+      {\r
+        TIMx->CR1 |= TIM_ICAP1_EDGE_RISING;\r
+      }\r
+      else\r
+      {\r
+        TIMx->CR1 &= TIM_ICAP1_EDGE_FALLING;\r
+      }\r
+\r
+      break;\r
+\r
+    default:\r
+      break;\r
+  }\r
+}\r
+\r
+/*******************************************************************************\r
+* Function Name  : TIM_CounterCmd\r
+* Description    : Enables or disables TIMx Counter peripheral.\r
+* Input1         : TIMx: where x can be from 0 to 3 to select the TIM\r
+*                  peripheral.\r
+* Input2         : TIM_operation: specifies the new state of the TIMx Counter.\r
+*                  This parameter can be one of the following values:\r
+*                       - TIM_START: Start the timer counter.\r
+*                       - TIM_STOP : Stop the timer counter.\r
+*                       - TIM_CLEAR: Clear the timer counter.\r
+* Output         : None\r
+* Return         : None\r
+*******************************************************************************/\r
+void TIM_CounterCmd(TIM_TypeDef *TIMx, TIM_CounterOperations TIM_operation)\r
+{\r
+  switch (TIM_operation)\r
+  {\r
+    case TIM_START:\r
+      TIMx->CR1 |= TIM_ENABLE_MASK;\r
+      break;\r
+\r
+    case TIM_STOP:\r
+      TIMx->CR1 &= TIM_DISABLE_MASK;\r
+      break;\r
+\r
+    case TIM_CLEAR:\r
+      TIMx->CNTR = 0x1234;\r
+      break;\r
+    \r
+    default:\r
+      break;\r
+  }\r
+}\r
+\r
+/*******************************************************************************\r
+* Function Name  : TIM_PrescalerConfig\r
+* Description    : This routine is used to configure the TIMx prescaler value\r
+*                  (when using the APB clock).\r
+* Input1         : TIMx: where x can be from 0 to 3 to select the TIM\r
+*                  peripheral.\r
+* Input2         : TIM_Prescaler: specifies the prescaler value. This parameter\r
+*                  can be a value from 0x0 to 0xFF.\r
+* Output         : None\r
+* Return         : None\r
+*******************************************************************************/\r
+void TIM_PrescalerConfig(TIM_TypeDef *TIMx, u8 TIM_Prescaler)\r
+{\r
+  TIMx->CR2 &= 0xFF00;\r
+  TIMx->CR2 |= TIM_Prescaler;\r
+\r
+}\r
+/*******************************************************************************\r
+* Function Name  : TIM_GetPrescalerValue\r
+* Description    : This routine is used to get the TIMx prescaler value\r
+*                  (when using the APB clock).\r
+* Input          : TIMx: where x can be from 0 to 3 to select the TIM\r
+*                  peripheral.\r
+* Output         : None\r
+* Return         : The prescaler value.\r
+*******************************************************************************/\r
+u8 TIM_GetPrescalerValue(TIM_TypeDef *TIMx)\r
+{\r
+  return TIMx->CR2 & 0x00FF;\r
+}\r
+\r
+/*******************************************************************************\r
+* Function Name  : TIM_GetCounterValue\r
+* Description    : This routine is used to get the TIMx counter value.\r
+* Input          : TIMx: where x can be from 0 to 3 to select the TIM\r
+*                  peripheral.\r
+* Output         : None\r
+* Return         : The counter value.\r
+*******************************************************************************/\r
+u16 TIM_GetCounterValue(TIM_TypeDef *TIMx)\r
+{\r
+  return TIMx->CNTR;\r
+}\r
+\r
+/*******************************************************************************\r
+* Function Name  : TIM_GetICAP1Value\r
+* Description    : This routine is used to get the Input Capture 1 value.\r
+* Input          : TIMx: where x can be from 0 to 3 to select the TIM\r
+*                  peripheral.\r
+* Output         : None\r
+* Return         : The Input Capture 1 value.\r
+*******************************************************************************/\r
+u16 TIM_GetICAP1Value(TIM_TypeDef *TIMx)\r
+{\r
+  return TIMx->IC1R;\r
+}\r
+\r
+/*******************************************************************************\r
+* Function Name  : TIM_GetICAP2Value\r
+* Description    : This routine is used to get the Input Capture 2 value.\r
+* Input          : TIMx: where x can be from 0 to 3 to select the TIM\r
+*                  peripheral.\r
+* Output         : None\r
+* Return         : The Input Capture 2 value.\r
+*******************************************************************************/\r
+u16 TIM_GetICAP2Value(TIM_TypeDef *TIMx)\r
+{\r
+  return TIMx->IC2R;\r
+}\r
+\r
+/*******************************************************************************\r
+* Function Name  : TIM_SetPulse\r
+* Description    : This routine is used to set the pulse value.\r
+* Input1         : TIMx: where x can be from 0 to 3 to select the TIM\r
+*                  peripheral.\r
+* Input2         : TIM_Channel: specifies the needed channel.\r
+*                  This parameter can be one of the following values:\r
+*                       - TIM_PWM_OC1_Channel: PWM/Output Compare 1 Channel\r
+*                       - TIM_OC2_Channel    : Output Compare 2 Channel\r
+* Input3         : TIM_Pulse: specifies the new pulse value.\r
+* Output         : None\r
+* Return         : None\r
+*******************************************************************************/\r
+void TIM_SetPulse(TIM_TypeDef *TIMx,u16 TIM_Channel ,u16 TIM_Pulse)\r
+{\r
+  if (TIM_Channel == TIM_PWM_OC1_Channel)\r
+  {\r
+    TIMx->OC1R = TIM_Pulse;\r
+  }\r
+  else\r
+  {\r
+    TIMx->OC2R = TIM_Pulse;\r
+  }\r
+}\r
+/*******************************************************************************\r
+* Function Name  : TIM_GetFlagStatus\r
+* Description    : Checks whether the specified TIMx flag is set or not.\r
+* Input1         : TIMx: where x can be from 0 to 3 to select the TIM\r
+*                  peripheral.\r
+* Input2         : TIM_Flag: specifies the flag to check.\r
+*                  This parameter can be one of the following values:\r
+*                       - TIM_FLAG_IC1: Input Capture Channel 1 Flag\r
+*                       - TIM_FLAG_IC2: Input Capture Channel 2 Flag\r
+*                       - TIM_FLAG_TO : Timer Overflow Flag \r
+*                       - TIM_FLAG_OC1: Output Compare Channel 1 Flag\r
+*                       - TIM_FLAG_OC2: Output Compare Channel 2 Flag\r
+* Output         : None\r
+* Return         : The NewState of the TIM_Flag (SET or RESET).\r
+*******************************************************************************/\r
+FlagStatus TIM_GetFlagStatus(TIM_TypeDef *TIMx, u16 TIM_Flag)\r
+{\r
+  if((TIMx->SR & TIM_Flag) == RESET)\r
+  {\r
+    return RESET;\r
+  }\r
+  else\r
+  {\r
+    return SET;\r
+  }\r
+}\r
+\r
+/*******************************************************************************\r
+* Function Name  : TIM_ClearFlag\r
+* Description    : Clears the TIM Flag passed as a parameter.\r
+* Input1         : TIMx: where x can be from 0 to 3 to select the TIM\r
+*                    peripheral.\r
+* Input2         : TIM_Flag: specifies the flag to clear.\r
+*                  This parameter can be one of the following values:\r
+*                       - TIM_FLAG_IC1: Input Capture Channel 1 Flag\r
+*                       - TIM_FLAG_IC2: Input Capture Channel 2 Flag\r
+*                       - TIM_FLAG_TO : Timer Overflow Flag\r
+*                       - TIM_FLAG_OC1: Output Compare Channel 1 Flag\r
+*                       - TIM_FLAG_OC2: Output Compare Channel 2 Flag\r
+* Output         : None\r
+* Return         : None\r
+*******************************************************************************/\r
+void TIM_ClearFlag(TIM_TypeDef *TIMx, u16 TIM_Flag)\r
+{\r
+  /* Clear TIM_Flag */\r
+  TIMx->SR &= ~TIM_Flag;\r
+}\r
+\r
+/*******************************************************************************\r
+* Function Name  : TIM_GetPWMIPulse\r
+* Description    : This routine is used to get the Pulse value in PWMI Mode.\r
+* Input          : TIMx: where x can be from 0 to 3 to select the TIM\r
+*                  peripheral.\r
+* Output         : None\r
+* Return         : The pulse value.\r
+*******************************************************************************/\r
+u16 TIM_GetPWMIPulse(TIM_TypeDef *TIMx)\r
+{\r
+  return TIMx->IC2R;\r
+}\r
+\r
+/*******************************************************************************\r
+* Function Name  : TIM_GetPWMIPeriod\r
+* Description    : This routine is used to get the Period value in PWMI Mode.\r
+* Input          : TIMx: where x can be from 0 to 3 to select the TIM\r
+*                  peripheral.\r
+* Output         : None\r
+* Return         : The period value.\r
+*******************************************************************************/\r
+u16 TIM_GetPWMIPeriod(TIM_TypeDef *TIMx)\r
+{\r
+  return TIMx->IC1R;\r
+}\r
+\r
+/*******************************************************************************\r
+* Function Name  : TIM_ITConfig\r
+* Description    : Configures the Timer interrupt source.\r
+* Input1         : TIMx: where x can be from 0 to 3 to select the TIM\r
+*                  peripheral.\r
+* Input2         : TIM_IT: specifies the TIM interrupt source to be enabled.\r
+*                  This parameter can be one of the following values:\r
+*                       - TIM_IT_IC1: Input Capture 1 Interrupt source.\r
+*                       - TIM_IT_OC1: Output Compare 1 Interrupt source.\r
+*                       - TIM_IT_TO : Timer Overflow Interrupt source.\r
+*                       - TIM_IT_IC2: Input Capture 2 Interrupt source.\r
+*                       - TIM_IT_OC2: Output Compare 2 Interrupt source.\r
+* Input3         : TIM_Newstate: specifies the new state of the  TIMx IT.\r
+*                  This parameter can be one of the following values:\r
+*                       - ENABLE : Enable the needed interrupt.\r
+*                       - DISABLE: Disable the needed interrupt.\r
+* Output         : None\r
+* Return         : None\r
+*******************************************************************************/\r
+void TIM_ITConfig(TIM_TypeDef *TIMx, u16 TIM_IT, FunctionalState TIM_Newstate)\r
+{\r
+  if(TIM_Newstate == ENABLE)\r
+  {\r
+    TIMx->CR2 = (TIMx->CR2 & 0x00FF) | TIM_IT; \r
+  }\r
+  else\r
+  {\r
+    TIMx->CR2 &= ~TIM_IT;\r
+  }\r
+}\r
+\r
+/*******************************************************************************\r
+* Function Name  : TIM_DMAConfig\r
+* Description    : Configures the Timer DMA source.\r
+* Input1         : TIMx: where x can be from 0 to 3 to select the TIM\r
+*                  peripheral.\r
+* Input2         : TIM_DMA_Souces: specifies the TIM DMA source to be selected.\r
+*                  This parameter can be one of the following values:\r
+*                       - TIM_DMA_IC1: Input Capture 1 DMA source.\r
+*                       - TIM_DMA_OCA1 Output Compare 1 DMA source.\r
+*                       - TIM_DMA_TO: Timer Overflow DMA source.\r
+*                       - TIM_DMA_IC2: Input Capture 2 DMA source.\r
+*                       - TIM_DMA_OC2: Output Compare 2 DMA source.\r
+* Output         : None\r
+* Return         : None\r
+*******************************************************************************/\r
+void TIM_DMAConfig(TIM_TypeDef *TIMx, u16 TIM_DMA_Sources)\r
+{\r
+  /* Reset the DMAS[1:0] bits */\r
+  TIMx->CR1 &= TIM_DMA_CLEAR_MASK;\r
+  /* Set the DMAS[1:0] bits according to TIM_DMA_Sources parameter */\r
+  TIMx->CR1 |= TIM_DMA_Sources; \r
+}\r
+\r
+/*******************************************************************************\r
+* Function Name  : TIM_DMACmd\r
+* Description    : Enables or disables TIMx DMA peripheral.\r
+* Input1         : TIMx: where x can be from 0 to 3 to select the TIM\r
+*                  peripheral.\r
+* Input2         : TIM_Newstate: new state of the  TIMx DMA peripheral \r
+*                  This parameter can be one of the following values:\r
+*                       - ENABLE : Enable the TIMx DMA.\r
+*                       - DISABLE: Disable the TIMx DMA.\r
+* Output         : None\r
+* Return         : None\r
+*******************************************************************************/\r
+void TIM_DMACmd(TIM_TypeDef *TIMx, FunctionalState TIM_Newstate)\r
+{\r
+  if (TIM_Newstate == ENABLE)\r
+  {\r
+    TIMx->CR2 |= TIM_DMA_ENABLE;\r
+  }\r
+  else\r
+  {\r
+    TIMx->CR2 &= TIM_DMA_DISABLE;\r
+  }\r
+}\r
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/\r

diff --git a/Demo/ARM9_STR91X_IAR/Library/source/91x_vic.c b/Demo/ARM9_STR91X_IAR/Library/source/91x_vic.c
index fecb8909600b368156c69c783e36cb9b838dbcc4..fc202e9205d4ea37d71d50ed66a75ec8a7101ac9 100644 (file)
--- a/Demo/ARM9_STR91X_IAR/Library/source/91x_vic.c
+++ b/Demo/ARM9_STR91X_IAR/Library/source/91x_vic.c
@@ -364,7 +364,7 @@ void VIC_ITCmd(u16 VIC_Source, FunctionalState VIC_NewState)
 \r
 /*******************************************************************************\r
 * Function Name  : VIC_SWITCmd\r
-* Description    : Generate a software interrupt for the specific source \r
+* Description    : Generate a software interrupt for the specific source\r
 *                  interrupt.\r
 * Input1         : VIC_Source: specifies the number of the source line.\r
 *                  This parameter can be one of the following values:\r
@@ -505,7 +505,7 @@ u32 VIC_GetCurrentISRAdd(VIC_TypeDef* VICx)
 *                     - PFQBC_ITLine : VIC source 31\r
 * Input2         : VIC_Priority: specifies the priority of the interrupt.\r
 *                  It can be a value from 0 to 15. 0 is the highest priority.\r
-* Input3         : void (*VIC_VectAddress)(void): specifies the ISR vector \r
+* Input3         : void (*VIC_VectAddress)(void): specifies the ISR vector\r
 *                  address pointer.\r
 * Output         : None\r
 * Return         : None\r
@@ -675,7 +675,7 @@ static void VIC_ITSourceConfig(u16 VIC_Source, u16 VIC_Priority)
 \r
 /*******************************************************************************\r
 * Function Name  : VIC_Config\r
-* Description    : Configure the ISR, the line, the mode and the priority for \r
+* Description    : Configure the ISR, the line, the mode and the priority for\r
 *                  each interrupt source line.\r
 * Input1         : VIC_Source: specifies the number of the source line.\r
 *                  This parameter can be one of the following values:\r

diff --git a/Demo/ARM9_STR91X_IAR/ParTest/ParTest.c b/Demo/ARM9_STR91X_IAR/ParTest/ParTest.c
index 9d48b20d9490299bdf43041b6586d58a93668622..9ea057f6610bf5fb4c68ff9e56a9fde266e7ad73 100644 (file)
--- a/Demo/ARM9_STR91X_IAR/ParTest/ParTest.c
+++ b/Demo/ARM9_STR91X_IAR/ParTest/ParTest.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS distribution.\r
 \r

diff --git a/Demo/ARM9_STR91X_IAR/RTOSDemo.dep b/Demo/ARM9_STR91X_IAR/RTOSDemo.dep
index bb7376f2e08d96f464f82886368d76edb0eb7ac5..9e43869161e073a8d6e56cf2ec3793f8a567b9e7 100644 (file)
--- a/Demo/ARM9_STR91X_IAR/RTOSDemo.dep
+++ b/Demo/ARM9_STR91X_IAR/RTOSDemo.dep
@@ -2,211 +2,336 @@
 \r
 <project>\r
   <fileVersion>2</fileVersion>\r
+  <fileChecksum>2035077562</fileChecksum>\r
   <configuration>\r
-    <name>ARM</name>\r
+    <name>ARM - lwIP - D</name>\r
     <outputs>\r
-      <file>$PROJ_DIR$\ARM\Obj\comtest.r79</file>\r
-      <file>$PROJ_DIR$\..\Common\include\BlockQ.h</file>\r
-      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\clock.h</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\lcd.r79</file>\r
-      <file>$PROJ_DIR$\Library\include\91x_uart.h</file>\r
-      <file>$TOOLKIT_DIR$\inc\stdio.h</file>\r
-      <file>$TOOLKIT_DIR$\inc\math.h</file>\r
-      <file>$PROJ_DIR$\Library\include\91x_map.h</file>\r
-      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\lc.h</file>\r
-      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uip.h</file>\r
-      <file>$PROJ_DIR$\..\..\Source\include\FreeRTOS.h</file>\r
-      <file>$PROJ_DIR$\Library\include\91x_lib.h</file>\r
-      <file>$PROJ_DIR$\Library\include\91x_ahbapb.h</file>\r
-      <file>$PROJ_DIR$\Library\include\91x_scu.h</file>\r
-      <file>$PROJ_DIR$\..\..\Source\include\projdefs.h</file>\r
-      <file>$PROJ_DIR$\..\..\Source\include\croutine.h</file>\r
-      <file>$PROJ_DIR$\..\Common\include\flop.h</file>\r
-      <file>$TOOLKIT_DIR$\inc\ymath.h</file>\r
-      <file>$PROJ_DIR$\Library\include\91x_gpio.h</file>\r
-      <file>$PROJ_DIR$\..\Common\include\flash.h</file>\r
-      <file>$PROJ_DIR$\..\..\Source\include\list.h</file>\r
-      <file>$PROJ_DIR$\webserver\httpd-fs.h</file>\r
-      <file>$PROJ_DIR$\..\Common\Minimal\dynamic.c</file>\r
-      <file>$PROJ_DIR$\..\Common\include\integer.h</file>\r
-      <file>$PROJ_DIR$\webserver\uip-conf.h</file>\r
-      <file>$PROJ_DIR$\webserver\httpd-fsdata.c</file>\r
-      <file>$PROJ_DIR$\Library\include\91x_type.h</file>\r
-      <file>$PROJ_DIR$\Library\include\91x_vic.h</file>\r
-      <file>$TOOLKIT_DIR$\inc\intrinsics.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\lwip\snmp.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\mem.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\lwip\def.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\stats.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\tcp.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\QPeek.pbi</file>\r
       <file>$PROJ_DIR$\Library\include\91x_fmi.h</file>\r
-      <file>$TOOLKIT_DIR$\inc\DLib_Product.h</file>\r
-      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\pt.h</file>\r
-      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uip_arch.h</file>\r
-      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uip_arp.h</file>\r
-      <file>$TOOLKIT_DIR$\inc\xencoding_limits.h</file>\r
-      <file>$PROJ_DIR$\..\Common\include\comtest.h</file>\r
-      <file>$PROJ_DIR$\..\Common\include\dynamic.h</file>\r
-      <file>$TOOLKIT_DIR$\inc\yvals.h</file>\r
-      <file>$PROJ_DIR$\webserver\webserver.h</file>\r
-      <file>$PROJ_DIR$\Library\include\91x_enet.h</file>\r
-      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\lc-switch.h</file>\r
-      <file>$TOOLKIT_DIR$\inc\stdint.h</file>\r
-      <file>$PROJ_DIR$\Library\include\91x_wdg.h</file>\r
-      <file>$PROJ_DIR$\STCode\lcd.h</file>\r
-      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\timer.h</file>\r
-      <file>$PROJ_DIR$\..\Common\include\PollQ.h</file>\r
-      <file>$TOOLKIT_DIR$\inc\ysizet.h</file>\r
-      <file>$TOOLKIT_DIR$\inc\DLib_Threads.h</file>\r
-      <file>$PROJ_DIR$\..\..\Source\include\queue.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\ip_frag.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\core\stats.c</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\ip.r79</file>\r
       <file>$PROJ_DIR$\..\Common\include\comtest2.h</file>\r
-      <file>$TOOLKIT_DIR$\inc\inttypes.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\udp.r79</file>\r
       <file>$PROJ_DIR$\..\..\Source\include\portable.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\ParTest.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\core\sys.c</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\port.pbi</file>\r
+      <file>$PROJ_DIR$\lwip\include\lwip\opt.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\List\RTOSDemo.html</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\mib2.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\BasicWEB.pbi</file>\r
+      <file>$PROJ_DIR$\lwip\include\lwIPWebServer\fs.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\91x_vect_IAR.r79</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_vic.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\flash.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\lwip\api_msg.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\list.r79</file>\r
+      <file>$PROJ_DIR$\Library\source\91x_scu.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\lwip\netif.h</file>\r
+      <file>$PROJ_DIR$\lwip\include\arch\lwip_errno.h</file>\r
+      <file>$PROJ_DIR$\Library\source\91x_gpio.c</file>\r
+      <file>$PROJ_DIR$\..\..\Source\include\FreeRTOS.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\lwip\tcpip.h</file>\r
+      <file>$TOOLKIT_DIR$\inc\stdio.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\91x_scu.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\QPeek.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\ParTest.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\icmp.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\91x_gpio.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\dynamic.pbi</file>\r
+      <file>$TOOLKIT_DIR$\inc\DLib_Threads.h</file>\r
+      <file>$PROJ_DIR$\..\..\Source\include\queue.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\tcpip.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\serial.pbi</file>\r
       <file>$TOOLKIT_DIR$\inc\intrinsic.h</file>\r
-      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uipopt.h</file>\r
-      <file>$PROJ_DIR$\webserver\httpd.h</file>\r
-      <file>$PROJ_DIR$\..\Common\include\serial.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\GenQTest.r79</file>\r
+      <file>$TOOLKIT_DIR$\inc\stdlib.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\91x_fmi.pbi</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_scu.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\sys.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\api\api_msg.c</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\91x_uart.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\dhcp.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\91x_tim.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\netif.r79</file>\r
       <file>$PROJ_DIR$\..\Common\include\partest.h</file>\r
-      <file>$PROJ_DIR$\webserver\httpd-cgi.h</file>\r
-      <file>$PROJ_DIR$\..\Common\include\semtest.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\mib_structs.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\msg_out.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\91x_tim.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\msg_in.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\91x_vic.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\tcpip.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\91x_vic.pbi</file>\r
+      <file>$PROJ_DIR$\..\..\Source\include\projdefs.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\main.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\RTOSDemo.pbd</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\icmp.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\91x_fmi.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\sockets.pbi</file>\r
+      <file>$PROJ_DIR$\lwip\lwipWebServer\fs.c</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\netif.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\main.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\api_lib.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\err.r79</file>\r
+      <file>$PROJ_DIR$\Library\source\91x_vic.c</file>\r
+      <file>$PROJ_DIR$\Library\source\91x_tim.c</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\ethernetif.r79</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_lib.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\msg_out.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\lwip\memp.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\flop.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\sys_arch.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\lcd.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\asn1_dec.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\dynamic.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\core\ipv4\ip_frag.c</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\BlockQ.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\ethernetif.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\lwip\debug.h</file>\r
+      <file>$PROJ_DIR$\..\Common\include\flop.h</file>\r
       <file>$TOOLKIT_DIR$\inc\DLib_Defaults.h</file>\r
-      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\psock.h</file>\r
-      <file>$PROJ_DIR$\webserver\clock-arch.h</file>\r
-      <file>$TOOLKIT_DIR$\inc\string.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\tcp_in.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\core\snmp\mib2.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\lwip\pbuf.h</file>\r
       <file>$PROJ_DIR$\..\..\Source\include\semphr.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\ip.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\comtest.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\PollQ.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\httpd.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\etharp.r79</file>\r
+      <file>$TOOLKIT_DIR$\lib\dl5tpainl8n.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\core\snmp\asn1_dec.c</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\inet.pbi</file>\r
+      <file>$TOOLKIT_DIR$\inc\DLib_Product.h</file>\r
       <file>$PROJ_DIR$\..\..\Source\include\task.h</file>\r
-      <file>$TOOLKIT_DIR$\inc\stdlib.h</file>\r
-      <file>$PROJ_DIR$\webserver\http-strings.h</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\dynamic.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\lwip\err.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\ipv4\lwip\ip_frag.h</file>\r
+      <file>$PROJ_DIR$\lwip\lwipWebServer\BasicWEB.c</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\comtest.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\include\PollQ.h</file>\r
+      <file>$PROJ_DIR$\..\..\Source\portable\IAR\STR91x\ISR_Support.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\BlockQ.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\lwip\arch.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\queue.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\91x_it.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\fs.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\lcd.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\etharp.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\ipv4\lwip\ip.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\msg_in.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\serial.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\BasicWEB.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\tcp_out.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\core\ipv4\ip.c</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\asn1_dec.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\raw.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\lwip\dhcp.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\core\raw.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\core\mem.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\core\tcp.c</file>\r
+      <file>$PROJ_DIR$\..\..\Source\include\croutine.h</file>\r
       <file>$TOOLKIT_DIR$\inc\stddef.h</file>\r
-      <file>$PROJ_DIR$\webserver\httpd-fsdata.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\mib_structs.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\dhcp.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\core\snmp\asn1_enc.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\core\tcp_in.c</file>\r
+      <file>$PROJ_DIR$\..\Common\include\semtest.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\heap_2.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\core\ipv4\ip_addr.c</file>\r
+      <file>$TOOLKIT_DIR$\inc\errno.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\api_lib.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\semtest.r79</file>\r
+      <file>$PROJ_DIR$\lwip\include\arch\cc.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\asn1_enc.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\ipv4\lwip\icmp.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Exe\RTOSDemo.d79</file>\r
+      <file>$PROJ_DIR$\Library\source\91x_uart.c</file>\r
+      <file>$PROJ_DIR$\Library\source\91x_lib.c</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\tcp.pbi</file>\r
+      <file>$PROJ_DIR$\lwip\include\lwIPWebServer\fsdata.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\91x_uart.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\91x_init_IAR.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\flash.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\core\tcp_out.c</file>\r
+      <file>$TOOLKIT_DIR$\inc\xencoding_limits.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\mib2.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\netif\etharp.h</file>\r
+      <file>$TOOLKIT_DIR$\inc\yvals.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\91x_it.r79</file>\r
+      <file>$PROJ_DIR$\STCode\lcd.h</file>\r
+      <file>$PROJ_DIR$\ParTest\ParTest.c</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\sys.r79</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_tim.h</file>\r
+      <file>$PROJ_DIR$\..\Common\include\flash.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\api\tcpip.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\lwip\api.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\ip_addr.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\queue.r79</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_ahbapb.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\core\udp.c</file>\r
       <file>$PROJ_DIR$\..\..\Source\portable\IAR\STR91x\portmacro.h</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\dynamic.r79</file>\r
-      <file>$PROJ_DIR$\Library\include\91x_it.h</file>\r
-      <file>$PROJ_DIR$\..\Common\Minimal\comtest.c</file>\r
-      <file>$PROJ_DIR$\..\Common\Minimal\BlockQ.c</file>\r
-      <file>$PROJ_DIR$\..\..\Source\portable\MemMang\heap_2.c</file>\r
-      <file>$PROJ_DIR$\..\Common\Minimal\integer.c</file>\r
-      <file>$PROJ_DIR$\STCode\lcd.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\core\snmp\mib_structs.c</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\tcp_out.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\GenQTest.pbi</file>\r
+      <file>$TOOLKIT_DIR$\inc\ymath.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Exe\RTOSDemo.sim</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\list.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\pbuf.r79</file>\r
       <file>$PROJ_DIR$\main.c</file>\r
-      <file>$PROJ_DIR$\..\Common\Minimal\semtest.c</file>\r
-      <file>$PROJ_DIR$\..\Common\Minimal\PollQ.c</file>\r
-      <file>$PROJ_DIR$\ParTest\ParTest.c</file>\r
-      <file>$PROJ_DIR$\serial\serial.c</file>\r
-      <file>$PROJ_DIR$\Library\source\91x_enet.c</file>\r
       <file>$PROJ_DIR$\Library\include\91x_conf.h</file>\r
       <file>$PROJ_DIR$\webserver\uIP_Task.c</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\91x_gpio.r79</file>\r
+      <file>$PROJ_DIR$\lwip\include\lwIPWebServer\BasicWEB.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\mem.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\91x_lib.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\sys_arch.pbi</file>\r
+      <file>$TOOLKIT_DIR$\inc\intrinsics.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\91x_wdg.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\lwip\sys.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\91x_wdg.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\include\BlockQ.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\91x_enet.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\port.r79</file>\r
+      <file>$PROJ_DIR$\..\..\Source\include\list.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\lwip\tcp.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\lwip\mem.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\ip_frag.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\tasks.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\ipv4\lwip\inet.h</file>\r
+      <file>$PROJ_DIR$\Library\source\91x_fmi.c</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\udp.pbi</file>\r
+      <file>$PROJ_DIR$\serial\serial.c</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\err.pbi</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_wdg.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\api_msg.r79</file>\r
+      <file>$PROJ_DIR$\lwip\include\lwip\lwipopts.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\netif\etharp.c</file>\r
+      <file>$TOOLKIT_DIR$\inc\math.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\memp.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\comtest.c</file>\r
+      <file>$PROJ_DIR$\lwip\api\sys_arch.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\api\sockets.c</file>\r
+      <file>$PROJ_DIR$\STCode\lcd.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\core\pbuf.c</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_map.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\flash.pbi</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_type.h</file>\r
+      <file>$PROJ_DIR$\lwip\include\arch\perf.h</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\integer.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\api\api_lib.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\core\snmp\msg_in.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\lwip\stats.h</file>\r
+      <file>$PROJ_DIR$\..\Common\include\GenQTest.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\memp.pbi</file>\r
+      <file>$PROJ_DIR$\Library\source\91x_enet.c</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\semtest.c</file>\r
+      <file>$PROJ_DIR$\Library\source\91x_it.c</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\asn1_enc.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\91x_lib.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\PollQ.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\core\dhcp.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\lwip\sockets.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\flop.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\semtest.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\include\integer.h</file>\r
+      <file>$PROJ_DIR$\..\Common\include\comtest.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\api_msg.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\lwip\raw.h</file>\r
+      <file>$PROJ_DIR$\lwip\lwipWebServer\httpd.c</file>\r
+      <file>$TOOLKIT_DIR$\inc\assert.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\httpd.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\BlockQ.c</file>\r
+      <file>$PROJ_DIR$\lwip\netif\ethernetif.c</file>\r
+      <file>$TOOLKIT_DIR$\inc\ysizet.h</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_uart.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\core\snmp\msg_out.c</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\91x_scu.r79</file>\r
+      <file>$PROJ_DIR$\lwip\include\lwIPWebServer\httpd.h</file>\r
+      <file>$PROJ_DIR$\lwip\include\arch\sys_arch.h</file>\r
+      <file>$PROJ_DIR$\..\Common\include\serial.h</file>\r
+      <file>$TOOLKIT_DIR$\lib\dl5tpainl8n.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\integer.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\sockets.r79</file>\r
+      <file>$PROJ_DIR$\..\..\Source\portable\MemMang\heap_2.c</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_it.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\tcp_in.pbi</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_gpio.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\ipv4\lwip\ip_addr.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\91x_enet.r79</file>\r
       <file>$PROJ_DIR$\Library\source\91x_wdg.c</file>\r
-      <file>$PROJ_DIR$\..\..\Source\portable\IAR\STR91x\port.c</file>\r
-      <file>$PROJ_DIR$\..\..\Source\queue.c</file>\r
-      <file>$PROJ_DIR$\..\..\Source\portable\IAR\STR91x\portasm.s79</file>\r
-      <file>$PROJ_DIR$\..\..\Source\tasks.c</file>\r
-      <file>$PROJ_DIR$\91x_init_IAR.s</file>\r
-      <file>$PROJ_DIR$\91x_vect_IAR.s</file>\r
-      <file>$PROJ_DIR$\lnkarm_flash.xcl</file>\r
-      <file>$PROJ_DIR$\lnkarm_ram.xcl</file>\r
-      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\apps\webserver\http-strings.c</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\tasks.pbi</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_enet.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\integer.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\GenQTest.c</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\flop.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\core\inet.c</file>\r
+      <file>$PROJ_DIR$\lwip\lwipWebServer\fsdata.c</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\stats.r79</file>\r
+      <file>$TOOLKIT_DIR$\inc\string.h</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\PollQ.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\core\netif.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\core\memp.c</file>\r
+      <file>$PROJ_DIR$\..\Common\include\QPeek.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\api\err.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\lwip\udp.h</file>\r
+      <file>$PROJ_DIR$\..\Common\include\dynamic.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\portasm.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\ip_addr.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\core\ipv4\icmp.c</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\fs.r79</file>\r
       <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\psock.c</file>\r
       <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uip_arp.c</file>\r
-      <file>$PROJ_DIR$\webserver\httpd-cgi.c</file>\r
-      <file>$PROJ_DIR$\webserver\httpd-fs.c</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\raw.r79</file>\r
       <file>$PROJ_DIR$\webserver\httpd.c</file>\r
-      <file>$PROJ_DIR$\..\Common\Minimal\flash.c</file>\r
-      <file>$PROJ_DIR$\..\Common\Minimal\flop.c</file>\r
-      <file>$PROJ_DIR$\FreeRTOSConfig.h</file>\r
-      <file>$PROJ_DIR$\Library\source\91x_gpio.c</file>\r
-      <file>$PROJ_DIR$\Library\source\91x_fmi.c</file>\r
-      <file>$PROJ_DIR$\Library\source\91x_uart.c</file>\r
-      <file>$PROJ_DIR$\Library\source\91x_it.c</file>\r
-      <file>$PROJ_DIR$\Library\source\91x_lib.c</file>\r
-      <file>$PROJ_DIR$\Library\source\91x_scu.c</file>\r
+      <file>$PROJ_DIR$\webserver\httpd-fs.c</file>\r
+      <file>$PROJ_DIR$\91x_vect_IAR.s</file>\r
+      <file>$PROJ_DIR$\lnkarm_ram.xcl</file>\r
+      <file>$PROJ_DIR$\webserver\httpd-cgi.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\apps\webserver\http-strings.c</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\QPeek.c</file>\r
+      <file>$PROJ_DIR$\lnkarm_flash.xcl</file>\r
+      <file>$PROJ_DIR$\91x_init_IAR.s</file>\r
+      <file>$PROJ_DIR$\..\..\Source\tasks.c</file>\r
+      <file>$PROJ_DIR$\..\..\Source\portable\IAR\STR91x\portasm.s79</file>\r
+      <file>$PROJ_DIR$\..\..\Source\queue.c</file>\r
       <file>$PROJ_DIR$\..\..\Source\list.c</file>\r
-      <file>$PROJ_DIR$\Library\source\91x_vic.c</file>\r
-      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\timer.c</file>\r
+      <file>$PROJ_DIR$\..\..\Source\portable\IAR\STR91x\port.c</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\heap_2.pbi</file>\r
+      <file>$PROJ_DIR$\FreeRTOSConfig.h</file>\r
+      <file>$PROJ_DIR$\lwip\include\arch\cpu.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\netif\loopif.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\inet.r79</file>\r
       <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uip.c</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\integer.r79</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\list.r79</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\port.r79</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\ParTest.r79</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\PollQ.r79</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\flash.r79</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\uip_arp.r79</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\portasm.r79</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\91x_init_IAR.r79</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\91x_vect_IAR.r79</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\comtest.pbi</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\dynamic.pbi</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\91x_lib.r79</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\91x_scu.r79</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\91x_uart.r79</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\91x_vic.r79</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\httpd-cgi.r79</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\httpd-fs.r79</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\httpd.r79</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\psock.r79</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\timer.r79</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\flop.pbi</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\flop.r79</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\BlockQ.r79</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\serial.pbi</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\uIP_Task.pbi</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\91x_enet.pbi</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\91x_fmi.pbi</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\91x_gpio.pbi</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\91x_it.pbi</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\91x_lib.pbi</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\91x_scu.pbi</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\91x_uart.pbi</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\91x_vic.pbi</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\91x_wdg.r79</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\uip.r79</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\BlockQ.pbi</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\queue.r79</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\tasks.r79</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\http-strings.r79</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\flash.pbi</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\lcd.pbi</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\heap_2.pbi</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\integer.pbi</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\main.pbi</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\list.pbi</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\ParTest.pbi</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\PollQ.pbi</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\semtest.pbi</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\semtest.r79</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\serial.r79</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\uIP_Task.r79</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\91x_enet.r79</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\91x_fmi.r79</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\91x_gpio.r79</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\91x_it.r79</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\91x_wdg.pbi</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\port.pbi</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\uip.pbi</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\queue.pbi</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\tasks.pbi</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\http-strings.pbi</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\httpd-cgi.pbi</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\httpd-fs.pbi</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\httpd.pbi</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\psock.pbi</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\timer.pbi</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\RTOSDemo.pbd</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\uip_arp.pbi</file>\r
-      <file>$PROJ_DIR$\ARM\Exe\RTOSDemo.d79</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\main.r79</file>\r
-      <file>$PROJ_DIR$\ARM\Obj\heap_2.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - D\Obj\pbuf.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\timer.c</file>\r
     </outputs>\r
     <file>\r
-      <name>$PROJ_DIR$\..\Common\Minimal\dynamic.c</name>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\stats.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 70</file>\r
+          <file> 267</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 124</file>\r
+          <file> 3</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 268 157 89 99 102 154 39 243 16 205 87 142 299 28 2 221 195 112 78</file>\r
+        </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 65 37 59 30 34 47 46 10 67 14 102 51 69 52 28 64 20 63 48 36</file>\r
+          <file> 268 157 89 102 154 39 243 16 205 87 142 299 28 2 221 195 112 78</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
@@ -215,503 +340,675 @@
       <outputs>\r
         <tool>\r
           <name>XLINK</name>\r
-          <file> 182</file>\r
+          <file> 145 17 175</file>\r
         </tool>\r
       </outputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\..\Common\Minimal\comtest.c</name>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\sys.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 0</file>\r
+          <file> 161</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 123</file>\r
+          <file> 48</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 188 142 299 28 16 205 87 248 30 131 157 89 99 102 154 39 243 62 298 12 170 43 186 103 193 40 93 2 78</file>\r
+        </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 65 37 59 30 34 47 46 10 67 14 102 51 69 52 28 64 20 55 35 56</file>\r
+          <file> 188 142 299 28 16 205 87 248 30 131 157 89 102 154 39 243 62 298 12 170 43 186 103 193 40 93 2 78</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\..\Common\Minimal\BlockQ.c</name>\r
+      <name>$PROJ_DIR$\Library\source\91x_scu.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 136</file>\r
+          <file> 246</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 149</file>\r
+          <file> 33</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 47 214 179 216</file>\r
+        </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 65 37 59 30 34 47 46 10 67 14 102 51 69 52 28 64 20 48 1</file>\r
+          <file> 47 214 179 216</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\..\..\Source\portable\MemMang\heap_2.c</name>\r
+      <name>$PROJ_DIR$\Library\source\91x_gpio.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 184</file>\r
+          <file> 181</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 155</file>\r
+          <file> 37</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 256 214 179 216 47</file>\r
+        </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 65 37 59 30 34 47 46 10 67 14 102 51 69 52 28 64 20</file>\r
+          <file> 256 214 179 216 47</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\..\Common\Minimal\integer.c</name>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\api\api_msg.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 113</file>\r
+          <file> 204</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 156</file>\r
+          <file> 236</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 16 205 87 142 299 28 112 24 92 188 248 30 131 157 89 99 102 154 39 243 62 298 12 170 43 186 103 193 40 93 118 2 257 105 274 198 194 195 144 27 165 237 78 31</file>\r
+        </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 65 37 59 30 34 47 46 10 67 14 102 51 69 52 28 64 20 23</file>\r
+          <file> 16 205 87 142 299 28 112 24 92 188 248 30 131 157 89 102 154 39 243 62 298 12 170 43 186 103 193 40 93 118 2 257 105 274 198 194 195 144 27 165 237 78 31</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\STCode\lcd.c</name>\r
+      <name>$PROJ_DIR$\ARM - lwIP - D\Obj\RTOSDemo.pbd</name>\r
+      <inputs>\r
+        <tool>\r
+          <name>BILINK</name>\r
+          <file> 191 46 37 114 184 33 57 150 61 187 19 85 173 13 229 5 71 236 82 143 95 133 38 202 117 86 215 232 115 297 97 36 101 251 94 277 7 81 176 63 183 223 18 55 119 56 69 303 15 113 125 233 42 67 3 48 185 260 148 255 172 41 200</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\lwip\lwipWebServer\fs.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 3</file>\r
+          <file> 279</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 154</file>\r
+          <file> 115</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 2 142 299 28 20 149 266 268 157 89 99 102 154 39 243</file>\r
+        </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 11 7 83 26 12 29 27 71 18 13 4 42 39 43 10 67 37 59 30 34 47 46 14 102 51 69 52 28 64 20</file>\r
+          <file> 2 142 299 28 20 149 266 268 157 89 102 154 39 243</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\main.c</name>\r
+      <name>$PROJ_DIR$\Library\source\91x_vic.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 183</file>\r
+          <file> 59</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 157</file>\r
+          <file> 61</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 22 214 179 216 254 76 168 6 162 47 256 244 203 261</file>\r
+        </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 5 37 59 30 34 47 46 11 7 83 26 12 29 27 71 18 13 4 42 39 10 67 14 102 51 69 52 28 64 20 48 43 19 23 45 1 58 36 56 16 49 55</file>\r
+          <file> 22 214 179 216 254 76 168 6 162 47 256 244 203 261</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\..\Common\Minimal\semtest.c</name>\r
+      <name>$PROJ_DIR$\Library\source\91x_tim.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 162</file>\r
+          <file> 52</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 161</file>\r
+          <file> 57</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 162 214 179 216 47</file>\r
+        </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 65 37 59 30 34 47 46 10 67 14 102 51 69 52 28 64 20 63 48 58</file>\r
+          <file> 162 214 179 216 47</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\..\Common\Minimal\PollQ.c</name>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\ipv4\ip_frag.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 117</file>\r
+          <file> 196</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 160</file>\r
+          <file> 7</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 268 157 89 99 102 154 39 243 16 205 87 142 299 28 118 112 2 92 257 105 106 27 198 0 274 221 195 78</file>\r
+        </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 65 37 59 30 34 47 46 10 67 14 102 51 69 52 28 64 20 48 45</file>\r
+          <file> 268 157 89 102 154 39 243 16 205 87 142 299 28 118 112 2 92 257 105 106 27 198 0 274 221 195 78</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\ParTest\ParTest.c</name>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\snmp\mib2.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 116</file>\r
+          <file> 155</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 159</file>\r
+          <file> 18</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 142 299 28 16 205 87</file>\r
+        </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 11 7 83 26 12 29 27 71 18 13 4 42 39 10 67 37 59 30 34 47 46 14 102 51 69 52 28 56</file>\r
+          <file> 142 299 28 16 205 87</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\serial\serial.c</name>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\snmp\asn1_dec.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 163</file>\r
+          <file> 124</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 137</file>\r
+          <file> 82</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 16 205 87 142 299 28</file>\r
+        </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 11 7 83 26 12 29 27 71 18 13 4 42 39 10 67 37 59 30 34 47 46 14 102 51 69 52 28 48 63 55</file>\r
+          <file> 16 205 87 142 299 28</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\Library\source\91x_enet.c</name>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\dynamic.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 165</file>\r
+          <file> 83</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 139</file>\r
+          <file> 38</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 45 157 89 99 102 154 39 243 30 131 62 298 12 170 43 186 103 193 93 40 275</file>\r
+        </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 10 67 37 59 30 34 47 46 14 102 51 69 52 28 64 20 11 7 83 26 12 29 27 71 18 13 4 42 39 62</file>\r
+          <file> 45 157 89 102 154 39 243 30 131 62 298 12 170 43 186 103 193 93 40 275</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\webserver\uIP_Task.c</name>\r
+      <name>$PROJ_DIR$\lwip\lwipWebServer\BasicWEB.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 164</file>\r
+          <file> 121</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 138</file>\r
+          <file> 19</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 32 157 89 99 102 154 39 243 268 30 131 62 298 12 170 43 186 103 193 93 40 182 216 165 16 205 87 142 299 28 92 188 248 118 112 2 257 105 237 198 274 194 195 144 27 31 24 78 221 300 159 76 214 179 168 6 22 254 162 47 256 244 203 261 247</file>\r
+        </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 62 37 59 30 34 47 46 11 7 83 26 12 29 27 71 18 13 4 42 39 10 67 14 102 51 69 52 28 64 20 63 48 9 53 24 50 41 38 54 60 31 8 40 21 33 44 2 61</file>\r
+          <file> 32 157 89 102 154 39 243 268 30 131 62 298 12 170 43 186 103 193 93 40 182 216 165 16 205 87 142 299 28 92 188 248 118 112 2 257 105 237 198 274 194 195 144 27 31 24 78 221 300 159 76 214 179 168 6 22 254 162 47 256 244 203 261 247</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\Library\source\91x_wdg.c</name>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\ipv4\ip.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 147</file>\r
+          <file> 9</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 169</file>\r
+          <file> 94</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 16 205 87 142 299 28 2 195 112 118 92 257 105 106 27 198 144 237 274 194 188 248 30 131 157 89 99 102 154 39 243 62 298 12 170 43 186 103 193 40 93 221 78 217 0</file>\r
+        </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 42 7 83 26 13</file>\r
+          <file> 16 205 87 142 299 28 2 195 112 118 92 257 105 106 27 198 144 237 274 194 188 248 30 131 157 89 102 154 39 243 62 298 12 170 43 186 103 193 40 93 221 78 217 0</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\..\..\Source\portable\IAR\STR91x\port.c</name>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\raw.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 115</file>\r
+          <file> 282</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 170</file>\r
+          <file> 125</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 268 157 89 99 102 154 39 243 16 205 87 142 299 28 2 78 198 112 92 257 27 105 237 118 221 195 217 0 274</file>\r
+        </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 11 7 83 26 12 29 27 71 18 13 4 42 39 65 37 59 30 34 47 46 10 67 14 102 51 69 52 28 64 20</file>\r
+          <file> 268 157 89 102 154 39 243 16 205 87 142 299 28 2 78 198 112 92 257 27 105 237 118 221 195 217 0 274</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\..\..\Source\queue.c</name>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\mem.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 150</file>\r
+          <file> 1</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 172</file>\r
+          <file> 183</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 268 157 89 99 102 154 39 243 112 142 299 28 16 205 87 2 195 188 248 30 131 62 298 12 170 43 186 103 193 40 93 221 78</file>\r
+        </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 65 37 59 30 34 47 46 62 10 67 14 102 51 69 52 28 64 20 15</file>\r
+          <file> 268 157 89 102 154 39 243 112 142 299 28 16 205 87 2 195 188 248 30 131 62 298 12 170 43 186 103 193 40 93 221 78</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\..\..\Source\portable\IAR\STR91x\portasm.s79</name>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\tcp.c</name>\r
       <outputs>\r
         <tool>\r
-          <name>AARM</name>\r
-          <file> 120</file>\r
+          <name>ICCARM</name>\r
+          <file> 4</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 148</file>\r
         </tool>\r
       </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 268 157 89 99 102 154 39 243 16 205 87 142 299 28 2 195 112 78 0 27 105 257 198 92 274 118 194 188 248 30 131 62 298 12 170 43 186 103 193 40 93 144</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 268 157 89 102 154 39 243 16 205 87 142 299 28 2 195 112 78 0 27 105 257 198 92 274 118 194 188 248 30 131 62 298 12 170 43 186 103 193 40 93 144</file>\r
+        </tool>\r
+      </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\..\..\Source\tasks.c</name>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\snmp\asn1_enc.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 151</file>\r
+          <file> 227</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 173</file>\r
+          <file> 143</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 16 205 87 142 299 28</file>\r
+        </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 5 37 59 30 34 47 46 65 62 10 67 14 102 51 69 52 28 64 20</file>\r
+          <file> 16 205 87 142 299 28</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\91x_init_IAR.s</name>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\tcp_in.c</name>\r
       <outputs>\r
         <tool>\r
-          <name>AARM</name>\r
-          <file> 121</file>\r
+          <name>ICCARM</name>\r
+          <file> 90</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 255</file>\r
         </tool>\r
       </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 2 142 299 28 16 205 87 257 112 27 105 198 92 195 78 194 188 248 30 131 157 89 99 102 154 39 243 62 298 12 170 43 186 103 193 40 93 118 144 221 217 0 274</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 2 142 299 28 16 205 87 257 112 27 105 198 92 195 78 194 188 248 30 131 157 89 102 154 39 243 62 298 12 170 43 186 103 193 40 93 118 144 221 217 0 274</file>\r
+        </tool>\r
+      </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\91x_vect_IAR.s</name>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\ipv4\ip_addr.c</name>\r
       <outputs>\r
         <tool>\r
-          <name>AARM</name>\r
-          <file> 122</file>\r
+          <name>ICCARM</name>\r
+          <file> 166</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 277</file>\r
         </tool>\r
       </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 257 112 142 299 28 198 16 205 87 92 27 105</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 257 112 142 299 28 198 16 205 87 92 27 105</file>\r
+        </tool>\r
+      </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\apps\webserver\http-strings.c</name>\r
+      <name>$PROJ_DIR$\ARM - lwIP - D\Exe\RTOSDemo.d79</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>XLINK</name>\r
+          <file> 17 175</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>XLINK</name>\r
+          <file> 290 258 66 181 151 158 228 246 52 50 21 59 189 121 111 44 35 96 34 140 204 124 227 108 51 83 72 98 75 23 79 279 137 240 65 301 262 9 166 196 116 25 70 1 208 155 132 58 77 53 177 192 276 167 282 141 120 252 267 161 80 197 4 90 122 60 11 250</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\Library\source\91x_uart.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 152</file>\r
+          <file> 50</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 174</file>\r
+          <file> 150</file>\r
         </tool>\r
       </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 244 214 179 216 47</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 244 214 179 216 47</file>\r
+        </tool>\r
+      </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\psock.c</name>\r
+      <name>$PROJ_DIR$\Library\source\91x_lib.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 132</file>\r
+          <file> 228</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 178</file>\r
+          <file> 184</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 214 179 216</file>\r
+        </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 5 37 59 30 34 47 46 62 53 24 50 41 38 54 60 31 8 40 21 9</file>\r
+          <file> 214 179 216</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uip_arp.c</name>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\flash.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 119</file>\r
+          <file> 23</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 181</file>\r
+          <file> 215</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 45 157 89 99 102 154 39 243 30 131 62 298 12 170 43 186 103 193 54 163</file>\r
+        </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 33 9 53 24 50 41 37 59 30 34 47 38 54 60 31 8 40 21 62 46</file>\r
+          <file> 45 157 89 102 154 39 243 30 131 62 298 12 170 43 186 103 193 54 163</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\webserver\httpd-cgi.c</name>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\tcp_out.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 129</file>\r
+          <file> 122</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 175</file>\r
+          <file> 172</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 268 157 89 99 102 154 39 243 2 142 299 28 16 205 87 195 112 78 188 248 30 131 62 298 12 170 43 186 103 193 40 93 257 27 105 198 92 194 118 144 221 0 274</file>\r
+        </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 9 53 24 50 41 37 59 30 34 47 38 54 60 31 8 40 21 57 5 46 62</file>\r
+          <file> 268 157 89 102 154 39 243 2 142 299 28 16 205 87 195 112 78 188 248 30 131 62 298 12 170 43 186 103 193 40 93 257 27 105 198 92 194 118 144 221 0 274</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\webserver\httpd-fs.c</name>\r
+      <name>$PROJ_DIR$\ParTest\ParTest.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 130</file>\r
+          <file> 35</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 176</file>\r
+          <file> 13</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 76 214 179 216 168 6 22 254 162 47 256 244 203 261 30 131 157 89 99 102 154 39 243 62 298 12 170 43 186 54</file>\r
+        </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 54 60 53 24 50 41 37 59 30 34 47 38 31 8 40 21 68 9 25</file>\r
+          <file> 76 214 179 216 168 6 22 254 162 47 256 244 203 261 30 131 157 89 102 154 39 243 62 298 12 170 43 186 54</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\webserver\httpd.c</name>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\api\tcpip.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 131</file>\r
+          <file> 60</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 177</file>\r
+          <file> 41</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 16 205 87 142 299 28 188 248 30 131 157 89 99 102 154 39 243 62 298 12 170 43 186 103 193 40 93 78 92 118 112 2 257 105 106 27 198 274 194 195 144 31 24 165 237</file>\r
+        </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 9 53 24 50 41 37 59 30 34 47 38 54 60 31 8 40 21 57 66 62 46</file>\r
+          <file> 16 205 87 142 299 28 188 248 30 131 157 89 102 154 39 243 62 298 12 170 43 186 103 193 40 93 78 92 118 112 2 257 105 106 27 198 274 194 195 144 31 24 165 237</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\..\Common\Minimal\flash.c</name>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\udp.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 118</file>\r
+          <file> 11</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 153</file>\r
+          <file> 200</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 268 157 89 99 102 154 39 243 16 205 87 142 299 28 2 78 198 112 92 257 27 105 274 118 144 221 195 217 0</file>\r
+        </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 65 37 59 30 34 47 46 10 67 14 102 51 69 52 28 64 20 56 19</file>\r
+          <file> 268 157 89 102 154 39 243 16 205 87 142 299 28 2 78 198 112 92 257 27 105 274 118 144 221 195 217 0</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\..\Common\Minimal\flop.c</name>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\snmp\mib_structs.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 135</file>\r
+          <file> 132</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 134</file>\r
+          <file> 55</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 16 205 87 142 299 28</file>\r
+        </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 65 37 59 30 34 47 46 6 17 10 67 14 102 51 69 52 28 64 20 16</file>\r
+          <file> 16 205 87 142 299 28</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\Library\source\91x_gpio.c</name>\r
+      <name>$PROJ_DIR$\main.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 167</file>\r
+          <file> 70</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 141</file>\r
+          <file> 63</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 32 157 89 99 102 154 39 243 76 214 179 216 168 6 22 254 162 47 256 244 203 261 30 131 62 298 12 170 43 186 103 193 40 159 163 234 109 190 136 275 54 88 10 249 222 272 182 188 142 299 28 16 205 87 248 93</file>\r
+        </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 18 7 83 26 13</file>\r
+          <file> 32 157 89 102 154 39 243 76 214 179 216 168 6 22 254 162 47 256 244 203 261 30 131 62 298 12 170 43 186 103 193 40 159 163 234 109 190 136 275 54 88 10 249 222 272 182 188 142 299 28 16 205 87 248 93</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
@@ -720,1335 +1017,6447 @@
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 166</file>\r
+          <file> 66</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 140</file>\r
+          <file> 46</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 6 214 179 216</file>\r
+        </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 29 7 83 26</file>\r
+          <file> 6 214 179 216</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\Library\source\91x_uart.c</name>\r
+      <name>$PROJ_DIR$\serial\serial.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 127</file>\r
+          <file> 120</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 145</file>\r
+          <file> 42</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 76 214 179 216 168 6 22 254 162 47 256 244 203 261 30 131 157 89 99 102 154 39 243 62 298 12 170 43 186 40 93 249</file>\r
+        </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 4 7 83 26 13</file>\r
+          <file> 76 214 179 216 168 6 22 254 162 47 256 244 203 261 30 131 157 89 102 154 39 243 62 298 12 170 43 186 40 93 249</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\Library\source\91x_it.c</name>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\netif\etharp.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 168</file>\r
+          <file> 98</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 142</file>\r
+          <file> 117</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 268 157 89 99 102 154 39 243 16 205 87 142 299 28 198 112 92 257 156 27 105 118 2 221 195 78 0 274</file>\r
+        </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 71 11 7 83 26 12 29 27 18 13 4 42 39</file>\r
+          <file> 268 157 89 102 154 39 243 16 205 87 142 299 28 198 112 92 257 156 27 105 118 2 221 195 78 0 274</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\Library\source\91x_lib.c</name>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\comtest.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 125</file>\r
+          <file> 108</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 143</file>\r
+          <file> 95</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 45 157 89 99 102 154 39 243 30 131 62 298 12 170 43 186 103 193 249 235 54</file>\r
+        </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 7 83 26</file>\r
+          <file> 45 157 89 102 154 39 243 30 131 62 298 12 170 43 186 103 193 249 235 54</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\Library\source\91x_scu.c</name>\r
+      <name>$PROJ_DIR$\lwip\api\sys_arch.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 126</file>\r
+          <file> 80</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 144</file>\r
+          <file> 185</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 87 142 299 28 2 188 16 205 248 30 131 157 89 99 102 154 39 243 62 298 12 170 43 186 103 193 40 93 195 112 32</file>\r
+        </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 13 7 83 26</file>\r
+          <file> 87 142 299 28 2 188 16 205 248 30 131 157 89 102 154 39 243 62 298 12 170 43 186 103 193 40 93 195 112 32</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\..\..\Source\list.c</name>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\api\sockets.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 114</file>\r
+          <file> 252</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 158</file>\r
+          <file> 67</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 268 157 89 99 102 154 39 243 139 16 205 87 142 299 28 165 92 188 248 30 131 62 298 12 170 43 186 103 193 40 93 118 112 2 257 105 237 198 274 194 195 144 27 231</file>\r
+        </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 65 37 59 30 34 47 46 10 67 14 102 51 69 52 28 20</file>\r
+          <file> 268 157 89 102 154 39 243 139 16 205 87 142 299 28 165 92 188 248 30 131 62 298 12 170 43 186 103 193 40 93 118 112 2 257 105 237 198 274 194 195 144 27 231</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\Library\source\91x_vic.c</name>\r
+      <name>$PROJ_DIR$\STCode\lcd.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 128</file>\r
+          <file> 116</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 146</file>\r
+          <file> 81</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 76 214 179 216 168 6 22 254 162 47 256 244 203 261 159 30 131 157 89 99 102 154 39 243 62 298 12 170 43 186 103 193</file>\r
+        </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 27 7 83 26 71 11 12 29 18 13 4 42 39</file>\r
+          <file> 76 214 179 216 168 6 22 254 162 47 256 244 203 261 159 30 131 157 89 102 154 39 243 62 298 12 170 43 186 103 193</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\timer.c</name>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\pbuf.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 133</file>\r
+          <file> 177</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 179</file>\r
+          <file> 303</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 268 157 89 99 102 154 39 243 16 205 87 142 299 28 221 195 112 78 2 92 188 248 30 131 62 298 12 170 43 186 103 193 40 93 217</file>\r
+        </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 2 61 10 67 37 59 30 34 47 46 14 102 51 69 52 28 44</file>\r
+          <file> 268 157 89 102 154 39 243 16 205 87 142 299 28 221 195 112 78 2 92 188 248 30 131 62 298 12 170 43 186 103 193 40 93 217</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uip.c</name>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\integer.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 148</file>\r
+          <file> 262</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 171</file>\r
+          <file> 251</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 45 157 89 99 102 154 39 243 30 131 62 298 12 170 43 186 103 193 234</file>\r
+        </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 9 53 24 50 41 37 59 30 34 47 38 54 60 31 8 40 21 32 62 46</file>\r
+          <file> 45 157 89 102 154 39 243 30 131 62 298 12 170 43 186 103 193 234</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\ARM\Obj\RTOSDemo.pbd</name>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\api\api_lib.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 140</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 71</file>\r
+        </tool>\r
+      </outputs>\r
       <inputs>\r
         <tool>\r
-          <name>BILINK</name>\r
-          <file> 139 140 141 142 143 144 145 146 169 149 159 160 123 124 153 134 155 174 175 176 177 156 154 158 157 170 178 172 161 137 173 179 138 171 181</file>\r
+          <name>ICCARM</name>\r
+          <file> 16 205 87 142 299 28 165 92 188 248 30 131 157 89 99 102 154 39 243 62 298 12 170 43 186 103 193 40 93 118 112 2 257 105 237 198 274 194 195 144 27 24 78</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 16 205 87 142 299 28 165 92 188 248 30 131 157 89 102 154 39 243 62 298 12 170 43 186 103 193 40 93 118 112 2 257 105 237 198 274 194 195 144 27 24 78</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\snmp\msg_in.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 58</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 119</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 16 205 87 142 299 28</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 16 205 87 142 299 28</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\Library\source\91x_enet.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 258</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 191</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 30 131 157 89 99 102 154 39 243 62 298 12 170 43 186 103 193 76 214 179 216 168 6 22 254 162 47 256 244 203 261 268</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 30 131 157 89 102 154 39 243 62 298 12 170 43 186 103 193 76 214 179 216 168 6 22 254 162 47 256 244 203 261 268</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\semtest.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 141</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 233</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 45 157 89 99 102 154 39 243 30 131 62 298 12 170 43 186 103 193 93 40 136</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 45 157 89 102 154 39 243 30 131 62 298 12 170 43 186 103 193 93 40 136</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\Library\source\91x_it.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 158</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 114</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 298 254 76 214 179 216 168 6 22 162 47 256 244 203 261</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 298 254 76 214 179 216 168 6 22 162 47 256 244 203 261</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\dhcp.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 51</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 133</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 268 157 89 99 102 154 39 243 221 16 205 87 142 299 28 195 112 78 274 92 198 257 118 2 105 27 156 188 248 30 131 62 298 12 170 43 186 103 193 40 93 126</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 268 157 89 102 154 39 243 221 16 205 87 142 299 28 195 112 78 274 92 198 257 118 2 105 27 156 188 248 30 131 62 298 12 170 43 186 103 193 40 93 126</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\lwip\lwipWebServer\httpd.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 240</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 97</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 87 142 299 28 221 16 205 195 112 78 247 194 188 248 30 131 157 89 99 102 154 39 243 62 298 12 170 43 186 103 193 40 93 92 118 2 257 105 144 27 198 20 268</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 87 142 299 28 221 16 205 195 112 78 247 194 188 248 30 131 157 89 102 154 39 243 62 298 12 170 43 186 103 193 40 93 92 118 2 257 105 144 27 198 20 268</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\BlockQ.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 111</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 85</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 45 157 89 99 102 154 39 243 30 131 62 298 12 170 43 186 103 193 40 190</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 45 157 89 102 154 39 243 30 131 62 298 12 170 43 186 103 193 40 190</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\lwip\netif\ethernetif.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 75</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 86</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 16 205 87 142 299 28 2 195 112 92 188 248 30 131 157 89 99 102 154 39 243 62 298 12 170 43 186 103 193 40 93 221 78 156 257 27 105 198 118 261 76 214 179 216 168 6 22 254 162 47 256 244 203 268</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 16 205 87 142 299 28 2 195 112 92 188 248 30 131 157 89 102 154 39 243 62 298 12 170 43 186 103 193 40 93 221 78 156 257 27 105 198 118 261 76 214 179 216 168 6 22 254 162 47 256 244 203 268</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\snmp\msg_out.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 77</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 56</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 16 205 87 142 299 28</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 16 205 87 142 299 28</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\Source\portable\MemMang\heap_2.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 137</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 297</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 45 157 89 99 102 154 39 243 30 131 62 298 12 170 43 186 103 193</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 45 157 89 102 154 39 243 30 131 62 298 12 170 43 186 103 193</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\Library\source\91x_wdg.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 189</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 187</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 203 214 179 216 47</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 203 214 179 216 47</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\GenQTest.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 44</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 173</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 45 157 89 99 102 154 39 243 30 131 62 298 12 170 43 186 103 193 40 93 222</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 45 157 89 102 154 39 243 30 131 62 298 12 170 43 186 103 193 40 93 222</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\flop.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 79</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 232</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 45 157 89 99 102 154 39 243 207 174 30 131 62 298 12 170 43 186 103 193 88</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 45 157 89 102 154 39 243 207 174 30 131 62 298 12 170 43 186 103 193 88</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\inet.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 301</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 101</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 16 205 87 142 299 28 112 2 198 92 257 188 248 30 131 157 89 99 102 154 39 243 62 298 12 170 43 186 103 193 40 93</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 16 205 87 142 299 28 112 2 198 92 257 188 248 30 131 157 89 102 154 39 243 62 298 12 170 43 186 103 193 40 93</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\PollQ.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 96</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 229</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 45 157 89 99 102 154 39 243 30 131 62 298 12 170 43 186 103 193 40 109</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 45 157 89 102 154 39 243 30 131 62 298 12 170 43 186 103 193 40 109</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\netif.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 53</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 69</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 16 205 87 142 299 28 2 257 112 27 105 198 92 194 188 248 30 131 157 89 99 102 154 39 243 62 298 12 170 43 186 103 193 40 93 195 118 144 0 274</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 16 205 87 142 299 28 2 257 112 27 105 198 92 194 188 248 30 131 157 89 102 154 39 243 62 298 12 170 43 186 103 193 40 93 195 118 144 0 274</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\memp.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 208</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 223</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 16 205 87 142 299 28 78 92 274 112 198 257 118 2 105 237 194 188 248 30 131 157 89 99 102 154 39 243 62 298 12 170 43 186 103 193 40 93 195 144 27 165 24 31 221</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 16 205 87 142 299 28 78 92 274 112 198 257 118 2 105 237 194 188 248 30 131 157 89 102 154 39 243 62 298 12 170 43 186 103 193 40 93 195 144 27 165 24 31 221</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\api\err.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 72</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 202</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 105 16 205 87 142 299 28</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 105 16 205 87 142 299 28</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\ipv4\icmp.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 65</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 36</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 268 157 89 99 102 154 39 243 16 205 87 142 299 28 144 112 92 257 27 105 198 118 2 221 195 78 0 274</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 268 157 89 102 154 39 243 16 205 87 142 299 28 144 112 92 257 27 105 198 118 2 221 195 78 0 274</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\91x_vect_IAR.s</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>AARM</name>\r
+          <file> 21</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>AARM</name>\r
+          <file> 298 110</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\QPeek.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 34</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 5</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 45 157 89 99 102 154 39 243 30 131 62 298 12 170 43 186 103 193 40 93 272</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 45 157 89 102 154 39 243 30 131 62 298 12 170 43 186 103 193 40 93 272</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\91x_init_IAR.s</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>AARM</name>\r
+          <file> 151</file>\r
+        </tool>\r
+      </outputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\Source\tasks.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 197</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 260</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 32 157 89 99 102 154 39 243 45 268 30 131 62 298 12 170 43 186 103 193</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 32 157 89 102 154 39 243 45 268 30 131 62 298 12 170 43 186 103 193</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\Source\portable\IAR\STR91x\portasm.s79</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>AARM</name>\r
+          <file> 276</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>AARM</name>\r
+          <file> 110</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\Source\queue.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 167</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 113</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 45 157 89 99 102 154 39 243 268 30 131 62 298 12 170 43 186 103 193 130</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 45 157 89 102 154 39 243 268 30 131 62 298 12 170 43 186 103 193 130</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\Source\list.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 25</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 176</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 45 157 89 99 102 154 39 243 30 131 62 298 12 170 43 186 193</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 45 157 89 102 154 39 243 30 131 62 298 12 170 43 186 193</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\Source\portable\IAR\STR91x\port.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 192</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 15</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 76 214 179 216 168 6 22 254 162 47 256 244 203 261 45 157 89 99 102 154 39 243 239 30 131 62 298 12 170 43 186 103 193</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 76 214 179 216 168 6 22 254 162 47 256 244 203 261 45 157 89 102 154 39 243 239 30 131 62 298 12 170 43 186 103 193</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\stats.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\sys.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\Library\source\91x_scu.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\Library\source\91x_gpio.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\api\api_msg.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\lwip\lwipWebServer\fs.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\Library\source\91x_vic.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\Library\source\91x_tim.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\ipv4\ip_frag.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\snmp\mib2.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\snmp\asn1_dec.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\dynamic.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\lwip\lwipWebServer\BasicWEB.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\ipv4\ip.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\raw.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\mem.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\tcp.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\snmp\asn1_enc.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\tcp_in.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\ipv4\ip_addr.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\Library\source\91x_uart.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\Library\source\91x_lib.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\flash.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\tcp_out.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\ParTest\ParTest.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\api\tcpip.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\udp.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\snmp\mib_structs.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\main.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\webserver\uIP_Task.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\Library\source\91x_fmi.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\serial\serial.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\netif\etharp.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\comtest.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\lwip\api\sys_arch.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\api\sockets.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\STCode\lcd.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\pbuf.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\integer.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\api\api_lib.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\snmp\msg_in.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\Library\source\91x_enet.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\semtest.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\Library\source\91x_it.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\dhcp.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\lwip\lwipWebServer\httpd.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\BlockQ.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\lwip\netif\ethernetif.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\snmp\msg_out.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\..\Source\portable\MemMang\heap_2.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\Library\source\91x_wdg.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\GenQTest.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\flop.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\inet.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\PollQ.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\netif.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\memp.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\api\err.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\ipv4\icmp.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\psock.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uip_arp.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\webserver\httpd.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\webserver\httpd-fs.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\webserver\httpd-cgi.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\apps\webserver\http-strings.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\QPeek.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\..\Source\tasks.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\..\Source\queue.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\..\Source\list.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\..\Source\portable\IAR\STR91x\port.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uip.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\timer.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+  </configuration>\r
+  <configuration>\r
+    <name>ARM - lwIP - R</name>\r
+    <outputs>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\lwip\snmp.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\lwip\def.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\tcp_in.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\mib2.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\ParTest.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\asn1_enc.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\tcp_out.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\icmp.r79</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_fmi.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\tasks.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\core\stats.c</file>\r
+      <file>$PROJ_DIR$\..\Common\include\comtest2.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\ip_addr.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\stats.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\stats.pbi</file>\r
+      <file>$PROJ_DIR$\..\..\Source\include\portable.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\sockets.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\core\sys.c</file>\r
+      <file>$PROJ_DIR$\lwip\include\lwip\opt.h</file>\r
+      <file>$PROJ_DIR$\lwip\include\lwIPWebServer\fs.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\tcp_in.pbi</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_vic.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\lwip\api_msg.h</file>\r
+      <file>$PROJ_DIR$\Library\source\91x_scu.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\lwip\netif.h</file>\r
+      <file>$PROJ_DIR$\lwip\include\arch\lwip_errno.h</file>\r
+      <file>$PROJ_DIR$\Library\source\91x_gpio.c</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\91x_scu.r79</file>\r
+      <file>$PROJ_DIR$\..\..\Source\include\FreeRTOS.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\91x_tim.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\lwip\tcpip.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\91x_gpio.pbi</file>\r
+      <file>$TOOLKIT_DIR$\inc\stdio.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\91x_lib.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\api_msg.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\udp.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\list.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\asn1_dec.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\raw.r79</file>\r
+      <file>$TOOLKIT_DIR$\inc\DLib_Threads.h</file>\r
+      <file>$PROJ_DIR$\..\..\Source\include\queue.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\91x_wdg.r79</file>\r
+      <file>$TOOLKIT_DIR$\inc\intrinsic.h</file>\r
+      <file>$TOOLKIT_DIR$\inc\stdlib.h</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_scu.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\tcp.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\api\api_msg.c</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\tasks.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\sys_arch.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\List\RTOSDemo.html</file>\r
+      <file>$PROJ_DIR$\..\Common\include\partest.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\BasicWEB.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\semtest.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\tcpip.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\dhcp.r79</file>\r
+      <file>$PROJ_DIR$\..\..\Source\include\projdefs.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\udp.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\sys.pbi</file>\r
+      <file>$PROJ_DIR$\lwip\lwipWebServer\fs.c</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\tcpip.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\asn1_enc.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\pbuf.pbi</file>\r
+      <file>$PROJ_DIR$\Library\source\91x_vic.c</file>\r
+      <file>$PROJ_DIR$\Library\source\91x_tim.c</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_lib.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\integer.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\lwip\memp.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\ip.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\PollQ.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\msg_out.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\GenQTest.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\etharp.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\portasm.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\RTOSDemo.pbd</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\flop.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\91x_enet.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\msg_in.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\dynamic.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\core\ipv4\ip_frag.c</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\inet.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\lwip\debug.h</file>\r
+      <file>$PROJ_DIR$\..\Common\include\flop.h</file>\r
+      <file>$TOOLKIT_DIR$\inc\DLib_Defaults.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\core\snmp\mib2.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\lwip\pbuf.h</file>\r
+      <file>$PROJ_DIR$\..\..\Source\include\semphr.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\BlockQ.r79</file>\r
+      <file>$TOOLKIT_DIR$\lib\dl5tpainl8n.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\core\snmp\asn1_dec.c</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\sockets.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\etharp.pbi</file>\r
+      <file>$TOOLKIT_DIR$\inc\DLib_Product.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\pbuf.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\QPeek.pbi</file>\r
+      <file>$PROJ_DIR$\..\..\Source\include\task.h</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\dynamic.c</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\api_lib.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\lwip\err.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\dhcp.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\fs.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\ipv4\lwip\ip_frag.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\memp.pbi</file>\r
+      <file>$PROJ_DIR$\lwip\lwipWebServer\BasicWEB.c</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\list.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\ethernetif.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\include\PollQ.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\91x_vect_IAR.r79</file>\r
+      <file>$PROJ_DIR$\..\..\Source\portable\IAR\STR91x\ISR_Support.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\lwip\arch.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\semtest.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Exe\RTOSDemo.sim</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\ipv4\lwip\ip.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\mib_structs.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\core\ipv4\ip.c</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\inet.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\main.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\sys_arch.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\lwip\dhcp.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\err.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\core\raw.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\core\mem.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\core\tcp.c</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\91x_fmi.r79</file>\r
+      <file>$PROJ_DIR$\..\..\Source\include\croutine.h</file>\r
+      <file>$TOOLKIT_DIR$\inc\stddef.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\PollQ.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\core\snmp\asn1_enc.c</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\ip_addr.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\core\tcp_in.c</file>\r
+      <file>$PROJ_DIR$\..\Common\include\semtest.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\ip_frag.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\BasicWEB.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\core\ipv4\ip_addr.c</file>\r
+      <file>$TOOLKIT_DIR$\inc\errno.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\api_lib.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\sys.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\raw.pbi</file>\r
+      <file>$PROJ_DIR$\lwip\include\arch\cc.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Exe\RTOSDemo.d79</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\ipv4\lwip\icmp.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\91x_uart.pbi</file>\r
+      <file>$PROJ_DIR$\Library\source\91x_uart.c</file>\r
+      <file>$PROJ_DIR$\Library\source\91x_lib.c</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\91x_vic.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\port.r79</file>\r
+      <file>$PROJ_DIR$\lwip\include\lwIPWebServer\fsdata.h</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\flash.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\core\tcp_out.c</file>\r
+      <file>$TOOLKIT_DIR$\inc\xencoding_limits.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\91x_enet.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\flash.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\netif\etharp.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\fs.pbi</file>\r
+      <file>$TOOLKIT_DIR$\inc\yvals.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\mib2.pbi</file>\r
+      <file>$PROJ_DIR$\STCode\lcd.h</file>\r
+      <file>$PROJ_DIR$\ParTest\ParTest.c</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_tim.h</file>\r
+      <file>$PROJ_DIR$\..\Common\include\flash.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\91x_wdg.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\api\tcpip.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\lwip\api.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\memp.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\ip.pbi</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_ahbapb.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\core\udp.c</file>\r
+      <file>$PROJ_DIR$\..\..\Source\portable\IAR\STR91x\portmacro.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\core\snmp\mib_structs.c</file>\r
+      <file>$TOOLKIT_DIR$\inc\ymath.h</file>\r
+      <file>$PROJ_DIR$\main.c</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_conf.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\mem.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\91x_init_IAR.r79</file>\r
+      <file>$PROJ_DIR$\lwip\include\lwIPWebServer\BasicWEB.h</file>\r
+      <file>$TOOLKIT_DIR$\inc\intrinsics.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\comtest.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\lwip\sys.h</file>\r
+      <file>$PROJ_DIR$\..\Common\include\BlockQ.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\flop.pbi</file>\r
+      <file>$PROJ_DIR$\..\..\Source\include\list.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\httpd.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\ethernetif.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\lwip\tcp.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\lwip\mem.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\ipv4\lwip\inet.h</file>\r
+      <file>$PROJ_DIR$\Library\source\91x_fmi.c</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\QPeek.r79</file>\r
+      <file>$PROJ_DIR$\serial\serial.c</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_wdg.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\integer.pbi</file>\r
+      <file>$PROJ_DIR$\lwip\include\lwip\lwipopts.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\netif\etharp.c</file>\r
+      <file>$TOOLKIT_DIR$\inc\math.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\91x_gpio.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\comtest.c</file>\r
+      <file>$PROJ_DIR$\lwip\api\sys_arch.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\api\sockets.c</file>\r
+      <file>$PROJ_DIR$\STCode\lcd.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\core\pbuf.c</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_map.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\91x_lib.pbi</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_type.h</file>\r
+      <file>$PROJ_DIR$\lwip\include\arch\perf.h</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\integer.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\api\api_lib.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\core\snmp\msg_in.c</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\GenQTest.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\lwip\stats.h</file>\r
+      <file>$PROJ_DIR$\..\Common\include\GenQTest.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\heap_2.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\serial.pbi</file>\r
+      <file>$PROJ_DIR$\Library\source\91x_enet.c</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\semtest.c</file>\r
+      <file>$PROJ_DIR$\Library\source\91x_it.c</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\msg_out.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\core\dhcp.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\lwip\sockets.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\lcd.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\include\integer.h</file>\r
+      <file>$PROJ_DIR$\..\Common\include\comtest.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\lwip\raw.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\BlockQ.pbi</file>\r
+      <file>$PROJ_DIR$\lwip\lwipWebServer\httpd.c</file>\r
+      <file>$TOOLKIT_DIR$\inc\assert.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\main.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\BlockQ.c</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\serial.r79</file>\r
+      <file>$PROJ_DIR$\lwip\netif\ethernetif.c</file>\r
+      <file>$TOOLKIT_DIR$\inc\ysizet.h</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_uart.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\core\snmp\msg_out.c</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\port.pbi</file>\r
+      <file>$PROJ_DIR$\lwip\include\lwIPWebServer\httpd.h</file>\r
+      <file>$PROJ_DIR$\lwip\include\arch\sys_arch.h</file>\r
+      <file>$PROJ_DIR$\..\Common\include\serial.h</file>\r
+      <file>$TOOLKIT_DIR$\lib\dl5tpainl8n.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\mib_structs.pbi</file>\r
+      <file>$PROJ_DIR$\..\..\Source\portable\MemMang\heap_2.c</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_it.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\queue.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\api_msg.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\queue.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\err.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\netif.pbi</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_gpio.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\ipv4\lwip\ip_addr.h</file>\r
+      <file>$PROJ_DIR$\Library\source\91x_wdg.c</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_enet.h</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\GenQTest.c</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\flop.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\core\inet.c</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\msg_in.pbi</file>\r
+      <file>$PROJ_DIR$\lwip\lwipWebServer\fsdata.c</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\icmp.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\flash.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\netif.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\dynamic.r79</file>\r
+      <file>$TOOLKIT_DIR$\inc\string.h</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\PollQ.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\core\netif.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\core\memp.c</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\91x_scu.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\include\QPeek.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\heap_2.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\api\err.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\lwip\udp.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\91x_tim.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\tcp_out.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\include\dynamic.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\91x_it.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\91x_it.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\comtest.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\core\ipv4\icmp.c</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\ip_frag.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\httpd.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\ParTest.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\91x_vic.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\91x_uart.r79</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\lcd.pbi</file>\r
+      <file>$PROJ_DIR$\91x_vect_IAR.s</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\mem.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\asn1_dec.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\tcp.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\QPeek.c</file>\r
+      <file>$PROJ_DIR$\lnkarm_flash.xcl</file>\r
+      <file>$PROJ_DIR$\91x_init_IAR.s</file>\r
+      <file>$PROJ_DIR$\..\..\Source\tasks.c</file>\r
+      <file>$PROJ_DIR$\..\..\Source\portable\IAR\STR91x\portasm.s79</file>\r
+      <file>$PROJ_DIR$\..\..\Source\queue.c</file>\r
+      <file>$PROJ_DIR$\..\..\Source\list.c</file>\r
+      <file>$PROJ_DIR$\..\..\Source\portable\IAR\STR91x\port.c</file>\r
+      <file>$PROJ_DIR$\FreeRTOSConfig.h</file>\r
+      <file>$PROJ_DIR$\lwip\include\arch\cpu.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\lwIP\include\netif\loopif.h</file>\r
+      <file>$PROJ_DIR$\ARM - lwIP - R\Obj\91x_fmi.pbi</file>\r
+    </outputs>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\stats.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 13</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 14</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 257 153 82 87 91 148 39 228 18 190 80 137 292 25 1 207 183 108 66</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 257 153 82 91 148 39 228 18 190 80 137 292 25 1 207 183 108 66</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>[ROOT_NODE]</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>XLINK</name>\r
+          <file> 49 110 138</file>\r
+        </tool>\r
+      </outputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\sys.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 135</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 57</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 176 137 292 25 18 190 80 233 28 124 153 82 87 91 148 39 228 55 291 15 166 42 174 94 179 40 85 1 66</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 176 137 292 25 18 190 80 233 28 124 153 82 91 148 39 228 55 291 15 166 42 174 94 179 40 85 1 66</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\Library\source\91x_scu.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 27</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 261</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 44 199 170 201</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 44 199 170 201</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\Library\source\91x_gpio.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 193</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 31</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 244 199 170 201 44</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 244 199 170 201 44</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\api\api_msg.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 240</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 34</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 18 190 80 137 292 25 108 22 84 176 233 28 124 153 82 87 91 148 39 228 55 291 15 166 42 174 94 179 40 85 111 1 245 97 265 184 182 183 139 24 161 220 66 30</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 18 190 80 137 292 25 108 22 84 176 233 28 124 153 82 91 148 39 228 55 291 15 166 42 174 94 179 40 85 111 1 245 97 265 184 182 183 139 24 161 220 66 30</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\lwip\lwipWebServer\fs.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 99</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 152</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 1 137 292 25 19 145 252 257 153 82 87 91 148 39 228</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 1 137 292 25 19 145 252 257 153 82 91 148 39 228</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\Library\source\91x_vic.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 276</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 143</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 21 199 170 201 238 64 164 8 157 44 244 229 188 247</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 21 199 170 201 238 64 164 8 157 44 244 229 188 247</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\Library\source\91x_tim.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 29</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 266</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 157 199 170 201 44</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 157 199 170 201 44</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\ARM - lwIP - R\Obj\RTOSDemo.pbd</name>\r
+      <inputs>\r
+        <tool>\r
+          <name>BILINK</name>\r
+          <file> 149 294 31 270 200 261 266 140 143 159 51 221 70 275 125 93 96 34 281 5 271 98 77 242 90 104 150 178 152 263 274 253 79 189 163 12 273 278 36 224 280 101 154 236 251 214 243 61 231 241 136 52 210 16 14 57 116 9 282 20 6 53 35</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\ipv4\ip_frag.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 130</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 273</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 257 153 82 87 91 148 39 228 18 190 80 137 292 25 111 108 1 84 245 97 100 24 184 0 265 207 183 66</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 257 153 82 91 148 39 228 18 190 80 137 292 25 111 108 1 84 245 97 100 24 184 0 265 207 183 66</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\snmp\mib2.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 3</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 154</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 137 292 25 18 190 80</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 137 292 25 18 190 80</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\snmp\asn1_dec.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 37</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 281</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 18 190 80 137 292 25</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 18 190 80 137 292 25</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\dynamic.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 256</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 77</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 43 153 82 87 91 148 39 228 28 124 55 291 15 166 42 174 94 179 85 40 268</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 43 153 82 91 148 39 228 28 124 55 291 15 166 42 174 94 179 85 40 268</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\lwip\lwipWebServer\BasicWEB.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 131</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 51</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 32 153 82 87 91 148 39 228 257 28 124 55 291 15 166 42 174 94 179 85 40 173 201 161 18 190 80 137 292 25 84 176 233 111 108 1 245 97 220 184 265 182 183 139 24 30 22 66 207 293 155 64 199 170 164 8 21 238 157 44 244 229 188 247 232</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 32 153 82 91 148 39 228 257 28 124 55 291 15 166 42 174 94 179 85 40 173 201 161 18 190 80 137 292 25 84 176 233 111 108 1 245 97 220 184 265 182 183 139 24 30 22 66 207 293 155 64 199 170 164 8 21 238 157 44 244 229 188 247 232</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\ipv4\ip.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 67</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 163</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 18 190 80 137 292 25 1 183 108 111 84 245 97 100 24 184 139 220 265 182 176 233 28 124 153 82 87 91 148 39 228 55 291 15 166 42 174 94 179 40 85 207 66 202 0</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 18 190 80 137 292 25 1 183 108 111 84 245 97 100 24 184 139 220 265 182 176 233 28 124 153 82 91 148 39 228 55 291 15 166 42 174 94 179 40 85 207 66 202 0</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\raw.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 38</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 136</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 257 153 82 87 91 148 39 228 18 190 80 137 292 25 1 66 184 108 84 245 24 97 220 111 207 183 202 0 265</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 257 153 82 91 148 39 228 18 190 80 137 292 25 1 66 184 108 84 245 24 97 220 111 207 183 202 0 265</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\mem.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 171</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 280</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 257 153 82 87 91 148 39 228 108 137 292 25 18 190 80 1 183 176 233 28 124 55 291 15 166 42 174 94 179 40 85 207 66</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 257 153 82 91 148 39 228 108 137 292 25 18 190 80 1 183 176 233 28 124 55 291 15 166 42 174 94 179 40 85 207 66</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\tcp.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 45</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 282</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 257 153 82 87 91 148 39 228 18 190 80 137 292 25 1 183 108 66 0 24 97 245 184 84 265 111 182 176 233 28 124 55 291 15 166 42 174 94 179 40 85 139</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 257 153 82 91 148 39 228 18 190 80 137 292 25 1 183 108 66 0 24 97 245 184 84 265 111 182 176 233 28 124 55 291 15 166 42 174 94 179 40 85 139</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\snmp\asn1_enc.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 60</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 5</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 18 190 80 137 292 25</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 18 190 80 137 292 25</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\tcp_in.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 2</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 20</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 1 137 292 25 18 190 80 245 108 24 97 184 84 183 66 182 176 233 28 124 153 82 87 91 148 39 228 55 291 15 166 42 174 94 179 40 85 111 139 207 202 0 265</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 1 137 292 25 18 190 80 245 108 24 97 184 84 183 66 182 176 233 28 124 153 82 91 148 39 228 55 291 15 166 42 174 94 179 40 85 111 139 207 202 0 265</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\ipv4\ip_addr.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 127</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 12</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 245 108 137 292 25 184 18 190 80 84 24 97</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 245 108 137 292 25 184 18 190 80 84 24 97</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\ARM - lwIP - R\Exe\RTOSDemo.d79</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>XLINK</name>\r
+          <file> 49 110</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>XLINK</name>\r
+          <file> 284 75 122 193 172 269 33 27 29 277 106 276 41 131 86 206 4 68 186 134 240 37 60 175 54 256 118 71 181 254 74 99 209 180 7 114 65 67 127 130 217 103 115 171 162 3 112 76 69 255 92 144 72 239 38 109 226 89 13 135 48 47 45 2 267 59 56 235</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\Library\source\91x_uart.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 277</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 140</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 229 199 170 201 44</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 229 199 170 201 44</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\Library\source\91x_lib.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 33</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 200</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 199 170 201</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 199 170 201</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\flash.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 254</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 150</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 43 153 82 87 91 148 39 228 28 124 55 291 15 166 42 174 94 179 50 158</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 43 153 82 91 148 39 228 28 124 55 291 15 166 42 174 94 179 50 158</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\tcp_out.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 267</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 6</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 257 153 82 87 91 148 39 228 1 137 292 25 18 190 80 183 108 66 176 233 28 124 55 291 15 166 42 174 94 179 40 85 245 24 97 184 84 182 111 139 207 0 265</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 257 153 82 91 148 39 228 1 137 292 25 18 190 80 183 108 66 176 233 28 124 55 291 15 166 42 174 94 179 40 85 245 24 97 184 84 182 111 139 207 0 265</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\ParTest\ParTest.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 4</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 275</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 64 199 170 201 164 8 21 238 157 44 244 229 188 247 28 124 153 82 87 91 148 39 228 55 291 15 166 42 174 50</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 64 199 170 201 164 8 21 238 157 44 244 229 188 247 28 124 153 82 91 148 39 228 55 291 15 166 42 174 50</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\api\tcpip.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 59</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 53</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 18 190 80 137 292 25 176 233 28 124 153 82 87 91 148 39 228 55 291 15 166 42 174 94 179 40 85 66 84 111 108 1 245 97 100 24 184 265 182 183 139 30 22 161 220</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 18 190 80 137 292 25 176 233 28 124 153 82 91 148 39 228 55 291 15 166 42 174 94 179 40 85 66 84 111 108 1 245 97 100 24 184 265 182 183 139 30 22 161 220</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\udp.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 56</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 35</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 257 153 82 87 91 148 39 228 18 190 80 137 292 25 1 66 184 108 84 245 24 97 265 111 139 207 183 202 0</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 257 153 82 91 148 39 228 18 190 80 137 292 25 1 66 184 108 84 245 24 97 265 111 139 207 183 202 0</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\snmp\mib_structs.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 112</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 236</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 18 190 80 137 292 25</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 18 190 80 137 292 25</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\main.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 115</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 224</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 32 153 82 87 91 148 39 228 64 199 170 201 164 8 21 238 157 44 244 229 188 247 28 124 55 291 15 166 42 174 94 179 40 155 158 218 105 177 129 268 50 81 11 234 208 262 173 176 137 292 25 18 190 80 233 85</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 32 153 82 91 148 39 228 64 199 170 201 164 8 21 238 157 44 244 229 188 247 28 124 55 291 15 166 42 174 94 179 40 155 158 218 105 177 129 268 50 81 11 234 208 262 173 176 137 292 25 18 190 80 233 85</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\Library\source\91x_fmi.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 122</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 294</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 8 199 170 201</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 8 199 170 201</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\serial\serial.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 226</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 210</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 64 199 170 201 164 8 21 238 157 44 244 229 188 247 28 124 153 82 87 91 148 39 228 55 291 15 166 42 174 40 85 234</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 64 199 170 201 164 8 21 238 157 44 244 229 188 247 28 124 153 82 91 148 39 228 55 291 15 166 42 174 40 85 234</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\netif\etharp.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 71</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 90</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 257 153 82 87 91 148 39 228 18 190 80 137 292 25 184 108 84 245 151 24 97 111 1 207 183 66 0 265</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 257 153 82 91 148 39 228 18 190 80 137 292 25 184 108 84 245 151 24 97 111 1 207 183 66 0 265</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\comtest.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 175</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 271</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 43 153 82 87 91 148 39 228 28 124 55 291 15 166 42 174 94 179 234 219 50</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 43 153 82 91 148 39 228 28 124 55 291 15 166 42 174 94 179 234 219 50</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\lwip\api\sys_arch.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 48</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 116</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 80 137 292 25 1 176 18 190 233 28 124 153 82 87 91 148 39 228 55 291 15 166 42 174 94 179 40 85 183 108 32</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 80 137 292 25 1 176 18 190 233 28 124 153 82 91 148 39 228 55 291 15 166 42 174 94 179 40 85 183 108 32</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\api\sockets.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 89</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 16</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 257 153 82 87 91 148 39 228 133 18 190 80 137 292 25 161 84 176 233 28 124 55 291 15 166 42 174 94 179 40 85 111 108 1 245 97 220 184 265 182 183 139 24 216</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 257 153 82 91 148 39 228 133 18 190 80 137 292 25 161 84 176 233 28 124 55 291 15 166 42 174 94 179 40 85 111 108 1 245 97 220 184 265 182 183 139 24 216</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\STCode\lcd.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 217</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 278</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 64 199 170 201 164 8 21 238 157 44 244 229 188 247 155 28 124 153 82 87 91 148 39 228 55 291 15 166 42 174 94 179</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 64 199 170 201 164 8 21 238 157 44 244 229 188 247 155 28 124 153 82 91 148 39 228 55 291 15 166 42 174 94 179</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\pbuf.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 92</file>\r
+        </tool>\r
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+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 64 199 170 201 164 8 21 238 157 44 244 229 188 247 43 153 82 91 148 39 228 223 28 124 55 291 15 166 42 174 94 179</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+  </configuration>\r
+  <configuration>\r
+    <name>ARM - uIP - D</name>\r
+    <outputs>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\httpd-fs.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\httpd-cgi.r79</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_fmi.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\91x_vect_IAR.r79</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\list.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\include\comtest2.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\portasm.r79</file>\r
+      <file>$PROJ_DIR$\..\..\Source\include\portable.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\91x_wdg.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\91x_fmi.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\List\RTOSDemo.html</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\91x_uart.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\lc.h</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_vic.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\91x_lib.pbi</file>\r
+      <file>$PROJ_DIR$\Library\source\91x_scu.c</file>\r
+      <file>$PROJ_DIR$\Library\source\91x_gpio.c</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\lcd.pbi</file>\r
+      <file>$PROJ_DIR$\..\..\Source\include\FreeRTOS.h</file>\r
+      <file>$TOOLKIT_DIR$\inc\stdio.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\91x_uart.r79</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\PollQ.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\psock.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\port.r79</file>\r
+      <file>$TOOLKIT_DIR$\inc\DLib_Threads.h</file>\r
+      <file>$PROJ_DIR$\..\..\Source\include\queue.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\queue.r79</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\91x_vic.r79</file>\r
+      <file>$TOOLKIT_DIR$\inc\intrinsic.h</file>\r
+      <file>$TOOLKIT_DIR$\inc\stdlib.h</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_scu.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\91x_enet.r79</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\httpd-cgi.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\httpd-fs.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\include\partest.h</file>\r
+      <file>$PROJ_DIR$\..\..\Source\include\projdefs.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\uip.r79</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\flash.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\ParTest.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\uip_arp.r79</file>\r
+      <file>$PROJ_DIR$\Library\source\91x_vic.c</file>\r
+      <file>$PROJ_DIR$\Library\source\91x_tim.c</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_lib.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\integer.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\tasks.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\ParTest.r79</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\91x_lib.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\pt.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\semtest.r79</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Exe\RTOSDemo.sim</file>\r
+      <file>$TOOLKIT_DIR$\inc\stdint.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\uIP_Task.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\include\flop.h</file>\r
+      <file>$TOOLKIT_DIR$\inc\DLib_Defaults.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\serial.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\httpd.r79</file>\r
+      <file>$PROJ_DIR$\webserver\clock-arch.h</file>\r
+      <file>$PROJ_DIR$\webserver\httpd-fsdata.h</file>\r
+      <file>$PROJ_DIR$\..\..\Source\include\semphr.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\timer.h</file>\r
+      <file>$TOOLKIT_DIR$\lib\dl5tpainl8n.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\GenQTest.r79</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\91x_scu.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\91x_vic.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\91x_tim.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\uip_arp.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\main.r79</file>\r
+      <file>$TOOLKIT_DIR$\inc\DLib_Product.h</file>\r
+      <file>$PROJ_DIR$\..\..\Source\include\task.h</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\dynamic.c</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\flop.r79</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\list.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\91x_enet.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\include\PollQ.h</file>\r
+      <file>$PROJ_DIR$\..\..\Source\portable\IAR\STR91x\ISR_Support.h</file>\r
+      <file>$PROJ_DIR$\webserver\httpd-cgi.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\BlockQ.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\flash.r79</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\dynamic.r79</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\heap_2.r79</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\RTOSDemo.pbd</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\clock.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\psock.r79</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\comtest.r79</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\GenQTest.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\91x_tim.r79</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\port.pbi</file>\r
+      <file>$PROJ_DIR$\..\..\Source\include\croutine.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\dynamic.pbi</file>\r
+      <file>$TOOLKIT_DIR$\inc\stddef.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\91x_it.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\include\semtest.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\91x_wdg.r79</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\http-strings.pbi</file>\r
+      <file>$PROJ_DIR$\Library\source\91x_uart.c</file>\r
+      <file>$PROJ_DIR$\Library\source\91x_lib.c</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\flash.c</file>\r
+      <file>$TOOLKIT_DIR$\inc\xencoding_limits.h</file>\r
+      <file>$PROJ_DIR$\webserver\http-strings.h</file>\r
+      <file>$TOOLKIT_DIR$\inc\yvals.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\lcd.r79</file>\r
+      <file>$PROJ_DIR$\STCode\lcd.h</file>\r
+      <file>$PROJ_DIR$\webserver\webserver.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\91x_it.r79</file>\r
+      <file>$PROJ_DIR$\ParTest\ParTest.c</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\integer.r79</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_tim.h</file>\r
+      <file>$PROJ_DIR$\..\Common\include\flash.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\http-strings.r79</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\httpd.pbi</file>\r
+      <file>$PROJ_DIR$\webserver\httpd.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\heap_2.pbi</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_ahbapb.h</file>\r
+      <file>$PROJ_DIR$\..\..\Source\portable\IAR\STR91x\portmacro.h</file>\r
+      <file>$TOOLKIT_DIR$\inc\ymath.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\QPeek.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\semtest.pbi</file>\r
+      <file>$PROJ_DIR$\main.c</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_conf.h</file>\r
+      <file>$PROJ_DIR$\webserver\uIP_Task.c</file>\r
+      <file>$TOOLKIT_DIR$\inc\inttypes.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\PollQ.r79</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\91x_scu.r79</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\comtest.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\91x_gpio.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\main.pbi</file>\r
+      <file>$TOOLKIT_DIR$\inc\intrinsics.h</file>\r
+      <file>$PROJ_DIR$\..\Common\include\BlockQ.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\flop.pbi</file>\r
+      <file>$PROJ_DIR$\..\..\Source\include\list.h</file>\r
+      <file>$PROJ_DIR$\webserver\httpd-fsdata.c</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\BlockQ.r79</file>\r
+      <file>$PROJ_DIR$\Library\source\91x_fmi.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uip_arp.h</file>\r
+      <file>$PROJ_DIR$\serial\serial.c</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\91x_init_IAR.r79</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_wdg.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\91x_gpio.r79</file>\r
+      <file>$PROJ_DIR$\webserver\uip-conf.h</file>\r
+      <file>$TOOLKIT_DIR$\inc\math.h</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\comtest.c</file>\r
+      <file>$PROJ_DIR$\STCode\lcd.c</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\91x_fmi.r79</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_map.h</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_type.h</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\integer.c</file>\r
+      <file>$PROJ_DIR$\..\Common\include\GenQTest.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uip_arch.h</file>\r
+      <file>$PROJ_DIR$\Library\source\91x_enet.c</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\semtest.c</file>\r
+      <file>$PROJ_DIR$\Library\source\91x_it.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\psock.h</file>\r
+      <file>$PROJ_DIR$\..\Common\include\integer.h</file>\r
+      <file>$PROJ_DIR$\..\Common\include\comtest.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uipopt.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\uIP_Task.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\tasks.r79</file>\r
+      <file>$TOOLKIT_DIR$\inc\assert.h</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\BlockQ.c</file>\r
+      <file>$TOOLKIT_DIR$\inc\ysizet.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\queue.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uip.h</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_uart.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\uip.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\include\serial.h</file>\r
+      <file>$TOOLKIT_DIR$\lib\dl5tpainl8n.r79</file>\r
+      <file>$PROJ_DIR$\..\..\Source\portable\MemMang\heap_2.c</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_it.h</file>\r
+      <file>$PROJ_DIR$\webserver\httpd-fs.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\serial.r79</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_gpio.h</file>\r
+      <file>$PROJ_DIR$\Library\source\91x_wdg.c</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_enet.h</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\GenQTest.c</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\flop.c</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\QPeek.r79</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\timer.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Obj\timer.r79</file>\r
+      <file>$TOOLKIT_DIR$\inc\string.h</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\PollQ.c</file>\r
+      <file>$PROJ_DIR$\..\Common\include\QPeek.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\lc-switch.h</file>\r
+      <file>$PROJ_DIR$\..\Common\include\dynamic.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - D\Exe\RTOSDemo.d79</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\psock.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uip_arp.c</file>\r
+      <file>$PROJ_DIR$\webserver\httpd.c</file>\r
+      <file>$PROJ_DIR$\webserver\httpd-fs.c</file>\r
+      <file>$PROJ_DIR$\91x_vect_IAR.s</file>\r
+      <file>$PROJ_DIR$\webserver\httpd-cgi.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\apps\webserver\http-strings.c</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\QPeek.c</file>\r
+      <file>$PROJ_DIR$\lnkarm_flash.xcl</file>\r
+      <file>$PROJ_DIR$\91x_init_IAR.s</file>\r
+      <file>$PROJ_DIR$\..\..\Source\tasks.c</file>\r
+      <file>$PROJ_DIR$\..\..\Source\portable\IAR\STR91x\portasm.s79</file>\r
+      <file>$PROJ_DIR$\..\..\Source\queue.c</file>\r
+      <file>$PROJ_DIR$\..\..\Source\list.c</file>\r
+      <file>$PROJ_DIR$\..\..\Source\portable\IAR\STR91x\port.c</file>\r
+      <file>$PROJ_DIR$\FreeRTOSConfig.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uip.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\timer.c</file>\r
+    </outputs>\r
+    <file>\r
+      <name>[ROOT_NODE]</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>XLINK</name>\r
+          <file> 10 49 183</file>\r
+        </tool>\r
+      </outputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\Library\source\91x_scu.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 122</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 62</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 30 143 118 144</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 30 143 118 144</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\Library\source\91x_gpio.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 137</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 124</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 170 143 118 144 30</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 170 143 118 144 30</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\Library\source\91x_vic.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 27</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 63</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 13 143 118 144 167 42 112 2 106 30 170 162 136 172</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 13 143 118 144 167 42 112 2 106 30 170 162 136 172</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\Library\source\91x_tim.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 85</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 64</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 106 143 118 144 30</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 106 143 118 144 30</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\dynamic.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 78</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 88</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 29 99 53 60 67 97 24 159 18 89 35 199 7 113 28 126 68 129 58 25 182</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 29 99 53 67 97 24 159 18 89 35 199 7 113 28 126 68 129 58 25 182</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\ARM - uIP - D\Obj\RTOSDemo.pbd</name>\r
+      <inputs>\r
+        <tool>\r
+          <name>BILINK</name>\r
+          <file> 72 9 124 90 14 62 64 11 63 8 76 84 38 21 115 123 88 37 128 111 93 32 0 109 43 17 71 125 86 22 160 116 54 44 176 155 163 65</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\Library\source\91x_uart.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 20</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 11</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 162 143 118 144 30</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 162 143 118 144 30</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\Library\source\91x_lib.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 46</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 14</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 143 118 144</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 143 118 144</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\flash.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 77</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 37</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 29 99 53 60 67 97 24 159 18 89 35 199 7 113 28 126 68 129 34 107</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 29 99 53 67 97 24 159 18 89 35 199 7 113 28 126 68 129 34 107</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\ParTest\ParTest.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 45</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 38</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 42 143 118 144 112 2 13 167 106 30 170 162 136 172 18 89 99 53 60 67 97 24 159 35 199 7 113 28 126 34</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 42 143 118 144 112 2 13 167 106 30 170 162 136 172 18 89 99 53 67 97 24 159 35 199 7 113 28 126 34</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\main.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 66</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 125</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 19 99 53 60 67 97 24 159 42 143 118 144 112 2 13 167 106 30 170 162 136 172 18 89 35 199 7 113 28 126 68 129 25 101 107 152 73 127 91 182 34 52 5 164 146 180</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 19 99 53 67 97 24 159 42 143 118 144 112 2 13 167 106 30 170 162 136 172 18 89 35 199 7 113 28 126 68 129 25 101 107 152 73 127 91 182 34 52 5 164 146 180</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\webserver\uIP_Task.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 51</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 155</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 178 99 53 60 67 97 24 159 42 143 118 144 112 2 13 167 106 30 170 162 136 172 18 89 35 199 7 113 28 126 68 129 58 25 161 154 138 120 50 102 110 151 47 12 181 168 133 59 81 56</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 178 99 53 67 97 24 159 42 143 118 144 112 2 13 167 106 30 170 162 136 172 18 89 35 199 7 113 28 126 68 129 58 25 161 154 138 120 50 102 110 151 47 12 181 168 133 59 81 56</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\Library\source\91x_fmi.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 142</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 9</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 2 143 118 144</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 2 143 118 144</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\serial\serial.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 169</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 54</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 42 143 118 144 112 2 13 167 106 30 170 162 136 172 18 89 99 53 60 67 97 24 159 35 199 7 113 28 126 25 58 164</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 42 143 118 144 112 2 13 167 106 30 170 162 136 172 18 89 99 53 67 97 24 159 35 199 7 113 28 126 25 58 164</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\comtest.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 83</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 123</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 29 99 53 60 67 97 24 159 18 89 35 199 7 113 28 126 68 129 164 153 34</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 29 99 53 67 97 24 159 18 89 35 199 7 113 28 126 68 129 164 153 34</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\STCode\lcd.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 100</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 17</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 42 143 118 144 112 2 13 167 106 30 170 162 136 172 101 18 89 99 53 60 67 97 24 159 35 199 7 113 28 126 68 129</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 42 143 118 144 112 2 13 167 106 30 170 162 136 172 101 18 89 99 53 67 97 24 159 35 199 7 113 28 126 68 129</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\integer.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 105</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 43</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 29 99 53 60 67 97 24 159 18 89 35 199 7 113 28 126 68 129 152</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 29 99 53 67 97 24 159 18 89 35 199 7 113 28 126 68 129 152</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\Library\source\91x_enet.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 31</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 72</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 18 89 99 53 60 67 97 24 159 35 199 7 113 28 126 68 129 42 143 118 144 112 2 13 167 106 30 170 162 136 172 178</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 18 89 99 53 67 97 24 159 35 199 7 113 28 126 68 129 42 143 118 144 112 2 13 167 106 30 170 162 136 172 178</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\semtest.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 48</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 116</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 29 99 53 60 67 97 24 159 18 89 35 199 7 113 28 126 68 129 58 25 91</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 29 99 53 67 97 24 159 18 89 35 199 7 113 28 126 68 129 58 25 91</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\Library\source\91x_it.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 103</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 90</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 199 167 42 143 118 144 112 2 13 106 30 170 162 136 172</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 199 167 42 143 118 144 112 2 13 106 30 170 162 136 172</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\BlockQ.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 131</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 76</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 29 99 53 60 67 97 24 159 18 89 35 199 7 113 28 126 68 129 25 127</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 29 99 53 67 97 24 159 18 89 35 199 7 113 28 126 68 129 25 127</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\Source\portable\MemMang\heap_2.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 79</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 111</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 29 99 53 60 67 97 24 159 18 89 35 199 7 113 28 126 68 129</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 29 99 53 67 97 24 159 18 89 35 199 7 113 28 126 68 129</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\Library\source\91x_wdg.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 92</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 8</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 136 143 118 144 30</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 136 143 118 144 30</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\GenQTest.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 61</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 84</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 29 99 53 60 67 97 24 159 18 89 35 199 7 113 28 126 68 129 25 58 146</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 29 99 53 67 97 24 159 18 89 35 199 7 113 28 126 68 129 25 58 146</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\flop.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 70</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 128</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 29 99 53 60 67 97 24 159 139 114 18 89 35 199 7 113 28 126 68 129 52</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 29 99 53 67 97 24 159 139 114 18 89 35 199 7 113 28 126 68 129 52</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\PollQ.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 121</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 21</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 29 99 53 60 67 97 24 159 18 89 35 199 7 113 28 126 68 129 25 73</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 29 99 53 67 97 24 159 18 89 35 199 7 113 28 126 68 129 25 73</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\ARM - uIP - D\Exe\RTOSDemo.d79</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>XLINK</name>\r
+          <file> 10 49</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>XLINK</name>\r
+          <file> 192 31 142 137 135 103 46 122 85 20 3 27 92 131 61 45 121 175 83 78 77 70 79 108 1 33 55 105 100 4 66 23 6 82 26 48 169 156 177 51 36 39 165</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\psock.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 82</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 22</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 19 99 53 60 67 97 24 159 178 154 138 120 50 102 110 151 47 12 181 168 161</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 19 99 53 67 97 24 159 178 154 138 120 50 102 110 151 47 12 181 168 161</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uip_arp.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 39</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 65</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 133 161 154 138 120 50 99 53 60 67 97 24 102 110 151 47 12 181 168 178 159</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 133 161 154 138 120 50 99 53 67 97 24 102 110 151 47 12 181 168 178 159</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\webserver\httpd.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 55</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 109</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 161 154 138 120 50 99 53 60 67 97 24 102 110 151 47 12 181 168 75 98 178 159</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 161 154 138 120 50 99 53 67 97 24 102 110 151 47 12 181 168 75 98 178 159</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\webserver\httpd-fs.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 33</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 0</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 110 151 154 138 120 50 99 53 60 67 97 24 102 47 12 181 168 57 161 130</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 110 151 154 138 120 50 99 53 67 97 24 102 47 12 181 168 57 161 130</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\91x_vect_IAR.s</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>AARM</name>\r
+          <file> 3</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>AARM</name>\r
+          <file> 199 74</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\webserver\httpd-cgi.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 1</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 32</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 161 154 138 120 50 99 53 60 67 97 24 102 110 151 47 12 181 168 75 19 159 178</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 161 154 138 120 50 99 53 67 97 24 102 110 151 47 12 181 168 75 19 159 178</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\apps\webserver\http-strings.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 108</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 93</file>\r
+        </tool>\r
+      </outputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\QPeek.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 175</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 115</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 29 99 53 60 67 97 24 159 18 89 35 199 7 113 28 126 68 129 25 58 180</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 29 99 53 67 97 24 159 18 89 35 199 7 113 28 126 68 129 25 58 180</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\91x_init_IAR.s</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>AARM</name>\r
+          <file> 135</file>\r
+        </tool>\r
+      </outputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\Source\tasks.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 156</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 44</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 19 99 53 60 67 97 24 159 29 178 18 89 35 199 7 113 28 126 68 129</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 19 99 53 67 97 24 159 29 178 18 89 35 199 7 113 28 126 68 129</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\Source\portable\IAR\STR91x\portasm.s79</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>AARM</name>\r
+          <file> 6</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>AARM</name>\r
+          <file> 74</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\Source\queue.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 26</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 160</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 29 99 53 60 67 97 24 159 178 18 89 35 199 7 113 28 126 68 129 87</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 29 99 53 67 97 24 159 178 18 89 35 199 7 113 28 126 68 129 87</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\Source\list.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 4</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 71</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 29 99 53 60 67 97 24 159 18 89 35 199 7 113 28 126 129</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 29 99 53 67 97 24 159 18 89 35 199 7 113 28 126 129</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\Source\portable\IAR\STR91x\port.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 23</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 86</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 42 143 118 144 112 2 13 167 106 30 170 162 136 172 29 99 53 60 67 97 24 159 157 18 89 35 199 7 113 28 126 68 129</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 42 143 118 144 112 2 13 167 106 30 170 162 136 172 29 99 53 67 97 24 159 157 18 89 35 199 7 113 28 126 68 129</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uip.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 36</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 163</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 161 154 138 120 50 99 53 60 67 97 24 102 110 151 47 12 181 168 147 178 159</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 161 154 138 120 50 99 53 67 97 24 102 110 151 47 12 181 168 147 178 159</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\timer.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 177</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 176</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 81 56 18 89 99 53 60 67 97 24 159 35 199 7 113 28 126 59</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 81 56 18 89 99 53 67 97 24 159 35 199 7 113 28 126 59</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\stats.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\sys.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\api\api_msg.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\lwip\lwipWebServer\fs.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\ipv4\ip_frag.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\snmp\mib2.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\snmp\asn1_dec.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\lwip\lwipWebServer\BasicWEB.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\ipv4\ip.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\raw.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\mem.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\tcp.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\snmp\asn1_enc.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\tcp_in.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\ipv4\ip_addr.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\tcp_out.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\api\tcpip.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\udp.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\snmp\mib_structs.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\netif\etharp.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\lwip\api\sys_arch.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\api\sockets.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\pbuf.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
     <forcedrebuild>\r
-      <name>$PROJ_DIR$\..\Common\Minimal\dynamic.c</name>\r
-      <tool>ICCARM</tool>\r
-    </forcedrebuild>\r
-    <forcedrebuild>\r
-      <name>$PROJ_DIR$\..\Common\Minimal\comtest.c</name>\r
-      <tool>ICCARM</tool>\r
-    </forcedrebuild>\r
-    <forcedrebuild>\r
-      <name>$PROJ_DIR$\..\Common\Minimal\BlockQ.c</name>\r
-      <tool>ICCARM</tool>\r
-    </forcedrebuild>\r
-    <forcedrebuild>\r
-      <name>$PROJ_DIR$\..\..\Source\portable\MemMang\heap_2.c</name>\r
-      <tool>ICCARM</tool>\r
-    </forcedrebuild>\r
-    <forcedrebuild>\r
-      <name>$PROJ_DIR$\..\Common\Minimal\integer.c</name>\r
-      <tool>ICCARM</tool>\r
-    </forcedrebuild>\r
-    <forcedrebuild>\r
-      <name>$PROJ_DIR$\STCode\lcd.c</name>\r
-      <tool>ICCARM</tool>\r
-    </forcedrebuild>\r
-    <forcedrebuild>\r
-      <name>$PROJ_DIR$\main.c</name>\r
-      <tool>ICCARM</tool>\r
-    </forcedrebuild>\r
-    <forcedrebuild>\r
-      <name>$PROJ_DIR$\..\Common\Minimal\semtest.c</name>\r
-      <tool>ICCARM</tool>\r
-    </forcedrebuild>\r
-    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\api\api_lib.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\snmp\msg_in.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\dhcp.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\lwip\lwipWebServer\httpd.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\lwip\netif\ethernetif.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\snmp\msg_out.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\inet.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\netif.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\memp.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\api\err.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\ipv4\icmp.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+  </configuration>\r
+  <configuration>\r
+    <name>ARM - uIP - R</name>\r
+    <outputs>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\http-strings.r79</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_fmi.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\BlockQ.r79</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\BlockQ.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\include\comtest2.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\http-strings.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\91x_tim.pbi</file>\r
+      <file>$PROJ_DIR$\..\..\Source\include\portable.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\port.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\lc.h</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_vic.h</file>\r
+      <file>$PROJ_DIR$\Library\source\91x_scu.c</file>\r
+      <file>$PROJ_DIR$\Library\source\91x_gpio.c</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\httpd-fs.r79</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\uip.pbi</file>\r
+      <file>$PROJ_DIR$\..\..\Source\include\FreeRTOS.h</file>\r
+      <file>$TOOLKIT_DIR$\inc\stdio.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\91x_enet.r79</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\integer.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\uip_arp.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\port.r79</file>\r
+      <file>$TOOLKIT_DIR$\inc\DLib_Threads.h</file>\r
+      <file>$PROJ_DIR$\..\..\Source\include\queue.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\serial.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\httpd.r79</file>\r
+      <file>$TOOLKIT_DIR$\inc\intrinsic.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Exe\RTOSDemo.sim</file>\r
+      <file>$TOOLKIT_DIR$\inc\stdlib.h</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_scu.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\PollQ.r79</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\flash.r79</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\91x_it.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\include\partest.h</file>\r
+      <file>$PROJ_DIR$\..\..\Source\include\projdefs.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\PollQ.pbi</file>\r
+      <file>$PROJ_DIR$\Library\source\91x_vic.c</file>\r
+      <file>$PROJ_DIR$\Library\source\91x_tim.c</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_lib.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\uIP_Task.r79</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\main.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\heap_2.r79</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\lcd.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\91x_scu.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\pt.h</file>\r
+      <file>$TOOLKIT_DIR$\inc\stdint.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\91x_vect_IAR.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\include\flop.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\GenQTest.r79</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\flash.pbi</file>\r
+      <file>$TOOLKIT_DIR$\inc\DLib_Defaults.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\flop.r79</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\integer.r79</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\queue.r79</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\tasks.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\httpd-cgi.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\91x_gpio.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\psock.r79</file>\r
+      <file>$PROJ_DIR$\webserver\clock-arch.h</file>\r
+      <file>$PROJ_DIR$\webserver\httpd-fsdata.h</file>\r
+      <file>$PROJ_DIR$\..\..\Source\include\semphr.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\comtest.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\timer.h</file>\r
+      <file>$TOOLKIT_DIR$\lib\dl5tpainl8n.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\91x_fmi.pbi</file>\r
+      <file>$TOOLKIT_DIR$\inc\DLib_Product.h</file>\r
+      <file>$PROJ_DIR$\..\..\Source\include\task.h</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\dynamic.c</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\httpd-cgi.r79</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\91x_init_IAR.r79</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\dynamic.r79</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\91x_lib.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\include\PollQ.h</file>\r
+      <file>$PROJ_DIR$\..\..\Source\portable\IAR\STR91x\ISR_Support.h</file>\r
+      <file>$PROJ_DIR$\webserver\httpd-cgi.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\tasks.r79</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\91x_lib.r79</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\ParTest.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\clock.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\timer.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\91x_it.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\heap_2.pbi</file>\r
+      <file>$PROJ_DIR$\..\..\Source\include\croutine.h</file>\r
+      <file>$TOOLKIT_DIR$\inc\stddef.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\serial.r79</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\httpd.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\include\semtest.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\timer.r79</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\flop.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\dynamic.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\91x_scu.r79</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\httpd-fs.pbi</file>\r
+      <file>$PROJ_DIR$\Library\source\91x_uart.c</file>\r
+      <file>$PROJ_DIR$\Library\source\91x_lib.c</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\List\RTOSDemo.html</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\flash.c</file>\r
+      <file>$TOOLKIT_DIR$\inc\xencoding_limits.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\91x_vic.pbi</file>\r
+      <file>$PROJ_DIR$\webserver\http-strings.h</file>\r
+      <file>$TOOLKIT_DIR$\inc\yvals.h</file>\r
+      <file>$PROJ_DIR$\STCode\lcd.h</file>\r
+      <file>$PROJ_DIR$\webserver\webserver.h</file>\r
+      <file>$PROJ_DIR$\ParTest\ParTest.c</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_tim.h</file>\r
+      <file>$PROJ_DIR$\..\Common\include\flash.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\QPeek.r79</file>\r
+      <file>$PROJ_DIR$\webserver\httpd.h</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_ahbapb.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\comtest.r79</file>\r
+      <file>$PROJ_DIR$\..\..\Source\portable\IAR\STR91x\portmacro.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\uip.r79</file>\r
+      <file>$TOOLKIT_DIR$\inc\ymath.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\uip_arp.r79</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\ParTest.pbi</file>\r
+      <file>$PROJ_DIR$\main.c</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_conf.h</file>\r
+      <file>$PROJ_DIR$\webserver\uIP_Task.c</file>\r
+      <file>$TOOLKIT_DIR$\inc\inttypes.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\uIP_Task.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\91x_wdg.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\QPeek.pbi</file>\r
+      <file>$TOOLKIT_DIR$\inc\intrinsics.h</file>\r
+      <file>$PROJ_DIR$\..\Common\include\BlockQ.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\list.r79</file>\r
+      <file>$PROJ_DIR$\..\..\Source\include\list.h</file>\r
+      <file>$PROJ_DIR$\webserver\httpd-fsdata.c</file>\r
+      <file>$PROJ_DIR$\Library\source\91x_fmi.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uip_arp.h</file>\r
+      <file>$PROJ_DIR$\serial\serial.c</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\GenQTest.pbi</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_wdg.h</file>\r
+      <file>$PROJ_DIR$\webserver\uip-conf.h</file>\r
+      <file>$TOOLKIT_DIR$\inc\math.h</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\comtest.c</file>\r
+      <file>$PROJ_DIR$\STCode\lcd.c</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_map.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\queue.pbi</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_type.h</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\integer.c</file>\r
+      <file>$PROJ_DIR$\..\Common\include\GenQTest.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uip_arch.h</file>\r
+      <file>$PROJ_DIR$\Library\source\91x_enet.c</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\semtest.c</file>\r
+      <file>$PROJ_DIR$\Library\source\91x_it.c</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\psock.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\portasm.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\psock.h</file>\r
+      <file>$PROJ_DIR$\..\Common\include\integer.h</file>\r
+      <file>$PROJ_DIR$\..\Common\include\comtest.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\91x_fmi.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uipopt.h</file>\r
+      <file>$TOOLKIT_DIR$\inc\assert.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\91x_enet.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\91x_gpio.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\BlockQ.c</file>\r
+      <file>$TOOLKIT_DIR$\inc\ysizet.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uip.h</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_uart.h</file>\r
+      <file>$PROJ_DIR$\..\Common\include\serial.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\semtest.r79</file>\r
+      <file>$TOOLKIT_DIR$\lib\dl5tpainl8n.r79</file>\r
+      <file>$PROJ_DIR$\..\..\Source\portable\MemMang\heap_2.c</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_it.h</file>\r
+      <file>$PROJ_DIR$\webserver\httpd-fs.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\91x_uart.r79</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_gpio.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\91x_tim.r79</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\RTOSDemo.pbd</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Exe\RTOSDemo.d79</file>\r
+      <file>$PROJ_DIR$\Library\source\91x_wdg.c</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_enet.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\91x_uart.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\GenQTest.c</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\flop.c</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\list.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\semtest.pbi</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\91x_vic.r79</file>\r
+      <file>$TOOLKIT_DIR$\inc\string.h</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\PollQ.c</file>\r
+      <file>$PROJ_DIR$\..\Common\include\QPeek.h</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\91x_wdg.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\lc-switch.h</file>\r
+      <file>$PROJ_DIR$\..\Common\include\dynamic.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\psock.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uip_arp.c</file>\r
+      <file>$PROJ_DIR$\webserver\httpd.c</file>\r
+      <file>$PROJ_DIR$\webserver\httpd-fs.c</file>\r
+      <file>$PROJ_DIR$\91x_vect_IAR.s</file>\r
+      <file>$PROJ_DIR$\webserver\httpd-cgi.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\apps\webserver\http-strings.c</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\main.r79</file>\r
+      <file>$PROJ_DIR$\ARM - uIP - R\Obj\lcd.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\QPeek.c</file>\r
+      <file>$PROJ_DIR$\lnkarm_flash.xcl</file>\r
+      <file>$PROJ_DIR$\91x_init_IAR.s</file>\r
+      <file>$PROJ_DIR$\..\..\Source\tasks.c</file>\r
+      <file>$PROJ_DIR$\..\..\Source\portable\IAR\STR91x\portasm.s79</file>\r
+      <file>$PROJ_DIR$\..\..\Source\queue.c</file>\r
+      <file>$PROJ_DIR$\..\..\Source\list.c</file>\r
+      <file>$PROJ_DIR$\..\..\Source\portable\IAR\STR91x\port.c</file>\r
+      <file>$PROJ_DIR$\FreeRTOSConfig.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uip.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\timer.c</file>\r
+    </outputs>\r
+    <file>\r
+      <name>[ROOT_NODE]</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>XLINK</name>\r
+          <file> 93 26 167</file>\r
+        </tool>\r
+      </outputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\Library\source\91x_scu.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 89</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 42</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 28 134 114 136</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 28 134 114 136</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\Library\source\91x_gpio.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 152</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 55</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 164 134 114 136 28</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 164 134 114 136 28</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\Library\source\91x_vic.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 175</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 96</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 10 134 114 136 161 37 106 1 102 28 164 156 129 169</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 10 134 114 136 161 37 106 1 102 28 164 156 129 169</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\Library\source\91x_tim.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 165</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 6</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 102 134 114 136 28</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 102 134 114 136 28</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\dynamic.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 69</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 88</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 27 98 49 62 64 95 21 154 15 82 33 199 7 108 25 120 65 123 59 22 181</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 27 98 49 64 95 21 154 15 82 33 199 7 108 25 120 65 123 59 22 181</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\Library\source\91x_uart.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 163</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 170</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 156 134 114 136 28</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 156 134 114 136 28</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\Library\source\91x_lib.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 75</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 70</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 134 114 136</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 134 114 136</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\flash.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 30</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 48</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 27 98 49 62 64 95 21 154 15 82 33 199 7 108 25 120 65 123 32 103</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 27 98 49 64 95 21 154 15 82 33 199 7 108 25 120 65 123 32 103</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\ParTest\ParTest.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 76</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 112</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 37 134 114 136 106 1 10 161 102 28 164 156 129 169 15 82 98 49 62 64 95 21 154 33 199 7 108 25 120 32</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 37 134 114 136 106 1 10 161 102 28 164 156 129 169 15 82 98 49 64 95 21 154 33 199 7 108 25 120 32</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\main.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 189</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 39</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 16 98 49 62 64 95 21 154 37 134 114 136 106 1 10 161 102 28 164 156 129 169 15 82 33 199 7 108 25 120 65 123 22 99 103 146 71 121 85 181 32 46 4 157 138 178</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 16 98 49 64 95 21 154 37 134 114 136 106 1 10 161 102 28 164 156 129 169 15 82 33 199 7 108 25 120 65 123 22 99 103 146 71 121 85 181 32 46 4 157 138 178</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\webserver\uIP_Task.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 38</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 117</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 176 98 49 62 64 95 21 154 37 134 114 136 106 1 10 161 102 28 164 156 129 169 15 82 33 199 7 108 25 120 65 123 59 22 155 149 130 116 44 100 105 145 43 9 180 162 126 61 77 57</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 176 98 49 64 95 21 154 37 134 114 136 106 1 10 161 102 28 164 156 129 169 15 82 33 199 7 108 25 120 65 123 59 22 155 149 130 116 44 100 105 145 43 9 180 162 126 61 77 57</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\Library\source\91x_fmi.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 148</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 63</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 1 134 114 136</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 1 134 114 136</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\serial\serial.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 83</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 23</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 37 134 114 136 106 1 10 161 102 28 164 156 129 169 15 82 98 49 62 64 95 21 154 33 199 7 108 25 120 22 59 157</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 37 134 114 136 106 1 10 161 102 28 164 156 129 169 15 82 98 49 64 95 21 154 33 199 7 108 25 120 22 59 157</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\comtest.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 107</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 60</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 27 98 49 62 64 95 21 154 15 82 33 199 7 108 25 120 65 123 157 147 32</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 27 98 49 64 95 21 154 15 82 33 199 7 108 25 120 65 123 157 147 32</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\STCode\lcd.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 190</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 41</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 37 134 114 136 106 1 10 161 102 28 164 156 129 169 99 15 82 98 49 62 64 95 21 154 33 199 7 108 25 120 65 123</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 37 134 114 136 106 1 10 161 102 28 164 156 129 169 99 15 82 98 49 64 95 21 154 33 199 7 108 25 120 65 123</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\integer.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 51</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 18</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 27 98 49 62 64 95 21 154 15 82 33 199 7 108 25 120 65 123 146</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 27 98 49 64 95 21 154 15 82 33 199 7 108 25 120 65 123 146</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\Library\source\91x_enet.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 17</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 151</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 15 82 98 49 62 64 95 21 154 33 199 7 108 25 120 65 123 37 134 114 136 106 1 10 161 102 28 164 156 129 169 176</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 15 82 98 49 64 95 21 154 33 199 7 108 25 120 65 123 37 134 114 136 106 1 10 161 102 28 164 156 129 169 176</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\semtest.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 158</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 174</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 27 98 49 62 64 95 21 154 15 82 33 199 7 108 25 120 65 123 59 22 85</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 27 98 49 64 95 21 154 15 82 33 199 7 108 25 120 65 123 59 22 85</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\Library\source\91x_it.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 31</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 79</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 199 161 37 134 114 136 106 1 10 102 28 164 156 129 169</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 199 161 37 134 114 136 106 1 10 102 28 164 156 129 169</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\BlockQ.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 2</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 3</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 27 98 49 62 64 95 21 154 15 82 33 199 7 108 25 120 65 123 22 121</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 27 98 49 64 95 21 154 15 82 33 199 7 108 25 120 65 123 22 121</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\Source\portable\MemMang\heap_2.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 40</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 80</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 27 98 49 62 64 95 21 154 15 82 33 199 7 108 25 120 65 123</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 27 98 49 64 95 21 154 15 82 33 199 7 108 25 120 65 123</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\ARM - uIP - R\Obj\RTOSDemo.pbd</name>\r
+      <inputs>\r
+        <tool>\r
+          <name>BILINK</name>\r
+          <file> 151 63 55 79 70 42 6 170 96 118 3 128 112 34 119 60 88 48 87 80 5 54 90 84 18 41 173 39 8 143 135 174 23 53 78 117 14 19</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\ARM - uIP - R\Exe\RTOSDemo.d79</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>XLINK</name>\r
+          <file> 93 26</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>XLINK</name>\r
+          <file> 192 17 148 152 68 31 75 89 165 163 45 175 179 2 47 76 29 104 107 69 30 50 40 0 67 13 24 51 190 122 189 20 144 56 52 158 83 74 86 38 109 111 159</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\Library\source\91x_wdg.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 179</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 118</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 129 134 114 136 28</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 129 134 114 136 28</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\GenQTest.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 47</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 128</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 27 98 49 62 64 95 21 154 15 82 33 199 7 108 25 120 65 123 22 59 138</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 27 98 49 64 95 21 154 15 82 33 199 7 108 25 120 65 123 22 59 138</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\flop.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 50</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 87</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 27 98 49 62 64 95 21 154 131 110 15 82 33 199 7 108 25 120 65 123 46</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 27 98 49 64 95 21 154 131 110 15 82 33 199 7 108 25 120 65 123 46</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
       <name>$PROJ_DIR$\..\Common\Minimal\PollQ.c</name>\r
-      <tool>ICCARM</tool>\r
-    </forcedrebuild>\r
-    <forcedrebuild>\r
-      <name>$PROJ_DIR$\ParTest\ParTest.c</name>\r
-      <tool>ICCARM</tool>\r
-    </forcedrebuild>\r
-    <forcedrebuild>\r
-      <name>$PROJ_DIR$\serial\serial.c</name>\r
-      <tool>ICCARM</tool>\r
-    </forcedrebuild>\r
-    <forcedrebuild>\r
-      <name>$PROJ_DIR$\Library\source\91x_enet.c</name>\r
-      <tool>ICCARM</tool>\r
-    </forcedrebuild>\r
-    <forcedrebuild>\r
-      <name>$PROJ_DIR$\webserver\uIP_Task.c</name>\r
-      <tool>ICCARM</tool>\r
-    </forcedrebuild>\r
-    <forcedrebuild>\r
-      <name>$PROJ_DIR$\Library\source\91x_wdg.c</name>\r
-      <tool>ICCARM</tool>\r
-    </forcedrebuild>\r
-    <forcedrebuild>\r
-      <name>$PROJ_DIR$\..\..\Source\portable\IAR\STR91x\port.c</name>\r
-      <tool>ICCARM</tool>\r
-    </forcedrebuild>\r
-    <forcedrebuild>\r
-      <name>$PROJ_DIR$\..\..\Source\queue.c</name>\r
-      <tool>ICCARM</tool>\r
-    </forcedrebuild>\r
-    <forcedrebuild>\r
-      <name>$PROJ_DIR$\..\..\Source\tasks.c</name>\r
-      <tool>ICCARM</tool>\r
-    </forcedrebuild>\r
-    <forcedrebuild>\r
-      <name>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\apps\webserver\http-strings.c</name>\r
-      <tool>ICCARM</tool>\r
-    </forcedrebuild>\r
-    <forcedrebuild>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 29</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 34</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 27 98 49 62 64 95 21 154 15 82 33 199 7 108 25 120 65 123 22 71</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 27 98 49 64 95 21 154 15 82 33 199 7 108 25 120 65 123 22 71</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
       <name>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\psock.c</name>\r
-      <tool>ICCARM</tool>\r
-    </forcedrebuild>\r
-    <forcedrebuild>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 56</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 143</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 16 98 49 62 64 95 21 154 176 149 130 116 44 100 105 145 43 9 180 162 155</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 16 98 49 64 95 21 154 176 149 130 116 44 100 105 145 43 9 180 162 155</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
       <name>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uip_arp.c</name>\r
-      <tool>ICCARM</tool>\r
-    </forcedrebuild>\r
-    <forcedrebuild>\r
-      <name>$PROJ_DIR$\webserver\httpd-cgi.c</name>\r
-      <tool>ICCARM</tool>\r
-    </forcedrebuild>\r
-    <forcedrebuild>\r
-      <name>$PROJ_DIR$\webserver\httpd-fs.c</name>\r
-      <tool>ICCARM</tool>\r
-    </forcedrebuild>\r
-    <forcedrebuild>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 111</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 19</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 126 155 149 130 116 44 98 49 62 64 95 21 100 105 145 43 9 180 162 176 154</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 126 155 149 130 116 44 98 49 64 95 21 100 105 145 43 9 180 162 176 154</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
       <name>$PROJ_DIR$\webserver\httpd.c</name>\r
-      <tool>ICCARM</tool>\r
-    </forcedrebuild>\r
-    <forcedrebuild>\r
-      <name>$PROJ_DIR$\..\Common\Minimal\flash.c</name>\r
-      <tool>ICCARM</tool>\r
-    </forcedrebuild>\r
-    <forcedrebuild>\r
-      <name>$PROJ_DIR$\..\Common\Minimal\flop.c</name>\r
-      <tool>ICCARM</tool>\r
-    </forcedrebuild>\r
-    <forcedrebuild>\r
-      <name>$PROJ_DIR$\Library\source\91x_gpio.c</name>\r
-      <tool>ICCARM</tool>\r
-    </forcedrebuild>\r
-    <forcedrebuild>\r
-      <name>$PROJ_DIR$\Library\source\91x_fmi.c</name>\r
-      <tool>ICCARM</tool>\r
-    </forcedrebuild>\r
-    <forcedrebuild>\r
-      <name>$PROJ_DIR$\Library\source\91x_uart.c</name>\r
-      <tool>ICCARM</tool>\r
-    </forcedrebuild>\r
-    <forcedrebuild>\r
-      <name>$PROJ_DIR$\Library\source\91x_it.c</name>\r
-      <tool>ICCARM</tool>\r
-    </forcedrebuild>\r
-    <forcedrebuild>\r
-      <name>$PROJ_DIR$\Library\source\91x_lib.c</name>\r
-      <tool>ICCARM</tool>\r
-    </forcedrebuild>\r
-    <forcedrebuild>\r
-      <name>$PROJ_DIR$\Library\source\91x_scu.c</name>\r
-      <tool>ICCARM</tool>\r
-    </forcedrebuild>\r
-    <forcedrebuild>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 24</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 84</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 155 149 130 116 44 98 49 62 64 95 21 100 105 145 43 9 180 162 73 97 176 154</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 155 149 130 116 44 98 49 64 95 21 100 105 145 43 9 180 162 73 97 176 154</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\webserver\httpd-fs.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 13</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 90</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 105 145 149 130 116 44 98 49 62 64 95 21 100 43 9 180 162 58 155 124</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 105 145 149 130 116 44 98 49 64 95 21 100 43 9 180 162 58 155 124</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\91x_vect_IAR.s</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>AARM</name>\r
+          <file> 45</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>AARM</name>\r
+          <file> 199 72</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\webserver\httpd-cgi.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 67</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 54</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 155 149 130 116 44 98 49 62 64 95 21 100 105 145 43 9 180 162 73 16 154 176</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 155 149 130 116 44 98 49 64 95 21 100 105 145 43 9 180 162 73 16 154 176</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\apps\webserver\http-strings.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 0</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 5</file>\r
+        </tool>\r
+      </outputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\QPeek.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 104</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 119</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 27 98 49 62 64 95 21 154 15 82 33 199 7 108 25 120 65 123 22 59 178</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 27 98 49 64 95 21 154 15 82 33 199 7 108 25 120 65 123 22 59 178</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\91x_init_IAR.s</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>AARM</name>\r
+          <file> 68</file>\r
+        </tool>\r
+      </outputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\Source\tasks.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 74</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 53</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 16 98 49 62 64 95 21 154 27 176 15 82 33 199 7 108 25 120 65 123</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 16 98 49 64 95 21 154 27 176 15 82 33 199 7 108 25 120 65 123</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\Source\portable\IAR\STR91x\portasm.s79</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>AARM</name>\r
+          <file> 144</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>AARM</name>\r
+          <file> 72</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\Source\queue.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 52</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 135</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 27 98 49 62 64 95 21 154 176 15 82 33 199 7 108 25 120 65 123 81</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 27 98 49 64 95 21 154 176 15 82 33 199 7 108 25 120 65 123 81</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
       <name>$PROJ_DIR$\..\..\Source\list.c</name>\r
-      <tool>ICCARM</tool>\r
-    </forcedrebuild>\r
-    <forcedrebuild>\r
-      <name>$PROJ_DIR$\Library\source\91x_vic.c</name>\r
-      <tool>ICCARM</tool>\r
-    </forcedrebuild>\r
-    <forcedrebuild>\r
-      <name>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\timer.c</name>\r
-      <tool>ICCARM</tool>\r
-    </forcedrebuild>\r
-    <forcedrebuild>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 122</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 173</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 27 98 49 62 64 95 21 154 15 82 33 199 7 108 25 120 123</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 27 98 49 64 95 21 154 15 82 33 199 7 108 25 120 123</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\Source\portable\IAR\STR91x\port.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 20</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 8</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 37 134 114 136 106 1 10 161 102 28 164 156 129 169 27 98 49 62 64 95 21 154 150 15 82 33 199 7 108 25 120 65 123</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 37 134 114 136 106 1 10 161 102 28 164 156 129 169 27 98 49 64 95 21 154 150 15 82 33 199 7 108 25 120 65 123</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
       <name>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uip.c</name>\r
-      <tool>ICCARM</tool>\r
-    </forcedrebuild>\r
-    <forcedrebuild>\r
-      <name>[REBUILD_ALL]</name>\r
-    </forcedrebuild>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 109</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 14</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 155 149 130 116 44 98 49 62 64 95 21 100 105 145 43 9 180 162 139 176 154</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 155 149 130 116 44 98 49 64 95 21 100 105 145 43 9 180 162 139 176 154</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\timer.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 86</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 78</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 77 57 15 82 98 49 62 64 95 21 154 33 199 7 108 25 120 61</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 77 57 15 82 98 49 64 95 21 154 33 199 7 108 25 120 61</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
   </configuration>\r
   <configuration>\r
     <name>THUMB</name>\r
     <outputs>\r
-      <file>$PROJ_DIR$\..\Common\include\BlockQ.h</file>\r
-      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\clock.h</file>\r
-      <file>$PROJ_DIR$\Library\include\91x_uart.h</file>\r
-      <file>$TOOLKIT_DIR$\inc\stdio.h</file>\r
-      <file>$TOOLKIT_DIR$\inc\math.h</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\QPeek.r79</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\PollQ.r79</file>\r
       <file>$PROJ_DIR$\THUMB\Obj\http-strings.r79</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\91x_vect_IAR.r79</file>\r
-      <file>$PROJ_DIR$\Library\include\91x_map.h</file>\r
-      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\lc.h</file>\r
-      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uip.h</file>\r
-      <file>$PROJ_DIR$\..\..\Source\include\FreeRTOS.h</file>\r
-      <file>$PROJ_DIR$\Library\include\91x_lib.h</file>\r
-      <file>$PROJ_DIR$\Library\include\91x_ahbapb.h</file>\r
-      <file>$PROJ_DIR$\Library\include\91x_scu.h</file>\r
-      <file>$PROJ_DIR$\..\..\Source\include\projdefs.h</file>\r
-      <file>$PROJ_DIR$\..\..\Source\include\croutine.h</file>\r
-      <file>$PROJ_DIR$\..\Common\include\flop.h</file>\r
-      <file>$TOOLKIT_DIR$\inc\ymath.h</file>\r
-      <file>$PROJ_DIR$\Library\include\91x_gpio.h</file>\r
-      <file>$PROJ_DIR$\..\Common\include\flash.h</file>\r
-      <file>$PROJ_DIR$\..\..\Source\include\list.h</file>\r
-      <file>$PROJ_DIR$\webserver\httpd-fs.h</file>\r
-      <file>$PROJ_DIR$\..\Common\Minimal\dynamic.c</file>\r
-      <file>$PROJ_DIR$\..\Common\include\integer.h</file>\r
-      <file>$PROJ_DIR$\webserver\uip-conf.h</file>\r
-      <file>$PROJ_DIR$\webserver\httpd-fsdata.c</file>\r
-      <file>$PROJ_DIR$\Library\include\91x_type.h</file>\r
-      <file>$PROJ_DIR$\Library\include\91x_vic.h</file>\r
-      <file>$TOOLKIT_DIR$\inc\intrinsics.h</file>\r
-      <file>$PROJ_DIR$\Library\include\91x_fmi.h</file>\r
-      <file>$TOOLKIT_DIR$\inc\DLib_Product.h</file>\r
-      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\pt.h</file>\r
-      <file>$PROJ_DIR$\..\..\Source\portable\IAR\STR91x\ISR_Support.h</file>\r
-      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uip_arch.h</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\comtest.r79</file>\r
-      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uip_arp.h</file>\r
-      <file>$TOOLKIT_DIR$\inc\xencoding_limits.h</file>\r
-      <file>$PROJ_DIR$\..\Common\include\comtest.h</file>\r
-      <file>$PROJ_DIR$\..\Common\include\dynamic.h</file>\r
-      <file>$TOOLKIT_DIR$\inc\yvals.h</file>\r
-      <file>$PROJ_DIR$\webserver\webserver.h</file>\r
-      <file>$PROJ_DIR$\Library\include\91x_enet.h</file>\r
-      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\lc-switch.h</file>\r
-      <file>$TOOLKIT_DIR$\inc\stdint.h</file>\r
-      <file>$PROJ_DIR$\Library\include\91x_wdg.h</file>\r
-      <file>$PROJ_DIR$\STCode\lcd.h</file>\r
-      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\timer.h</file>\r
-      <file>$PROJ_DIR$\..\Common\include\PollQ.h</file>\r
-      <file>$TOOLKIT_DIR$\inc\ysizet.h</file>\r
-      <file>$TOOLKIT_DIR$\inc\DLib_Threads.h</file>\r
-      <file>$PROJ_DIR$\..\..\Source\include\queue.h</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\BlockQ.r79</file>\r
-      <file>$PROJ_DIR$\..\Common\include\comtest2.h</file>\r
-      <file>$TOOLKIT_DIR$\inc\inttypes.h</file>\r
-      <file>$PROJ_DIR$\..\..\Source\include\portable.h</file>\r
-      <file>$TOOLKIT_DIR$\inc\intrinsic.h</file>\r
-      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uipopt.h</file>\r
-      <file>$PROJ_DIR$\webserver\httpd.h</file>\r
-      <file>$PROJ_DIR$\..\Common\include\serial.h</file>\r
-      <file>$PROJ_DIR$\..\Common\include\partest.h</file>\r
-      <file>$PROJ_DIR$\webserver\httpd-cgi.h</file>\r
-      <file>$TOOLKIT_DIR$\lib\dl5tptinl8n.h</file>\r
-      <file>$PROJ_DIR$\..\Common\include\semtest.h</file>\r
-      <file>$TOOLKIT_DIR$\inc\DLib_Defaults.h</file>\r
-      <file>$TOOLKIT_DIR$\lib\dl5tptinl8n.r79</file>\r
-      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\psock.h</file>\r
-      <file>$PROJ_DIR$\webserver\clock-arch.h</file>\r
-      <file>$TOOLKIT_DIR$\inc\string.h</file>\r
-      <file>$PROJ_DIR$\..\..\Source\include\semphr.h</file>\r
-      <file>$PROJ_DIR$\..\..\Source\include\task.h</file>\r
-      <file>$TOOLKIT_DIR$\inc\stdlib.h</file>\r
-      <file>$PROJ_DIR$\webserver\http-strings.h</file>\r
-      <file>$TOOLKIT_DIR$\inc\stddef.h</file>\r
-      <file>$PROJ_DIR$\webserver\httpd-fsdata.h</file>\r
-      <file>$PROJ_DIR$\..\..\Source\portable\IAR\STR91x\portmacro.h</file>\r
-      <file>$PROJ_DIR$\Library\include\91x_it.h</file>\r
-      <file>$PROJ_DIR$\..\Common\Minimal\comtest.c</file>\r
-      <file>$PROJ_DIR$\..\Common\Minimal\BlockQ.c</file>\r
-      <file>$PROJ_DIR$\..\..\Source\portable\MemMang\heap_2.c</file>\r
-      <file>$PROJ_DIR$\..\Common\Minimal\integer.c</file>\r
-      <file>$PROJ_DIR$\STCode\lcd.c</file>\r
-      <file>$PROJ_DIR$\main.c</file>\r
-      <file>$PROJ_DIR$\..\Common\Minimal\semtest.c</file>\r
-      <file>$PROJ_DIR$\..\Common\Minimal\PollQ.c</file>\r
-      <file>$PROJ_DIR$\ParTest\ParTest.c</file>\r
-      <file>$PROJ_DIR$\serial\serial.c</file>\r
-      <file>$PROJ_DIR$\Library\source\91x_enet.c</file>\r
-      <file>$PROJ_DIR$\Library\include\91x_conf.h</file>\r
-      <file>$PROJ_DIR$\webserver\uIP_Task.c</file>\r
-      <file>$PROJ_DIR$\Library\source\91x_wdg.c</file>\r
-      <file>$PROJ_DIR$\..\..\Source\portable\IAR\STR91x\port.c</file>\r
-      <file>$PROJ_DIR$\..\..\Source\queue.c</file>\r
-      <file>$PROJ_DIR$\..\..\Source\portable\IAR\STR91x\portasm.s79</file>\r
-      <file>$PROJ_DIR$\..\..\Source\tasks.c</file>\r
-      <file>$PROJ_DIR$\91x_init_IAR.s</file>\r
-      <file>$PROJ_DIR$\91x_vect_IAR.s</file>\r
-      <file>$PROJ_DIR$\lnkarm_flash.xcl</file>\r
-      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\apps\webserver\http-strings.c</file>\r
-      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\psock.c</file>\r
-      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uip_arp.c</file>\r
-      <file>$PROJ_DIR$\webserver\httpd-cgi.c</file>\r
-      <file>$PROJ_DIR$\webserver\httpd-fs.c</file>\r
-      <file>$PROJ_DIR$\webserver\httpd.c</file>\r
-      <file>$PROJ_DIR$\..\Common\Minimal\flash.c</file>\r
-      <file>$PROJ_DIR$\..\Common\Minimal\flop.c</file>\r
-      <file>$PROJ_DIR$\FreeRTOSConfig.h</file>\r
-      <file>$PROJ_DIR$\Library\source\91x_gpio.c</file>\r
-      <file>$PROJ_DIR$\Library\source\91x_fmi.c</file>\r
-      <file>$PROJ_DIR$\Library\source\91x_uart.c</file>\r
-      <file>$PROJ_DIR$\Library\source\91x_it.c</file>\r
-      <file>$PROJ_DIR$\Library\source\91x_lib.c</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\uip_arp.pbi</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\91x_gpio.r79</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_fmi.h</file>\r
+      <file>$PROJ_DIR$\..\Common\include\comtest2.h</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\timer.pbi</file>\r
+      <file>$PROJ_DIR$\..\..\Source\include\portable.h</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\port.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\lc.h</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_vic.h</file>\r
       <file>$PROJ_DIR$\Library\source\91x_scu.c</file>\r
-      <file>$PROJ_DIR$\..\..\Source\list.c</file>\r
-      <file>$PROJ_DIR$\Library\source\91x_vic.c</file>\r
-      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\timer.c</file>\r
-      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uip.c</file>\r
+      <file>$PROJ_DIR$\Library\source\91x_gpio.c</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\91x_vic.pbi</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\RTOSDemo.pbd</file>\r
+      <file>$PROJ_DIR$\..\..\Source\include\FreeRTOS.h</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\91x_vic.r79</file>\r
+      <file>$TOOLKIT_DIR$\inc\stdio.h</file>\r
+      <file>$TOOLKIT_DIR$\inc\DLib_Threads.h</file>\r
+      <file>$PROJ_DIR$\THUMB\Exe\RTOSDemo.d79</file>\r
+      <file>$PROJ_DIR$\..\..\Source\include\queue.h</file>\r
       <file>$PROJ_DIR$\THUMB\Obj\lcd.r79</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\main.r79</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\ParTest.r79</file>\r
+      <file>$TOOLKIT_DIR$\inc\intrinsic.h</file>\r
+      <file>$TOOLKIT_DIR$\inc\stdlib.h</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_scu.h</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\http-strings.pbi</file>\r
+      <file>$PROJ_DIR$\THUMB\Exe\RTOSDemo.sim</file>\r
+      <file>$PROJ_DIR$\..\Common\include\partest.h</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\semtest.pbi</file>\r
+      <file>$PROJ_DIR$\..\..\Source\include\projdefs.h</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\91x_tim.pbi</file>\r
       <file>$PROJ_DIR$\THUMB\Obj\91x_lib.r79</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\91x_scu.r79</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\ParTest.pbi</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\tasks.r79</file>\r
       <file>$PROJ_DIR$\THUMB\Obj\91x_uart.r79</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\91x_vic.r79</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\PollQ.r79</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\semtest.r79</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\serial.r79</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\dynamic.r79</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\uip.r79</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\uip_arp.r79</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\queue.pbi</file>\r
+      <file>$PROJ_DIR$\Library\source\91x_vic.c</file>\r
+      <file>$PROJ_DIR$\Library\source\91x_tim.c</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_lib.h</file>\r
       <file>$PROJ_DIR$\THUMB\Obj\portasm.r79</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\http-strings.pbi</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\httpd.r79</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\91x_tim.r79</file>\r
       <file>$PROJ_DIR$\THUMB\Obj\BlockQ.pbi</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\comtest.pbi</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\heap_2.r79</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\integer.r79</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\httpd-fs.r79</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\list.pbi</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\flop.pbi</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\psock.r79</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\dynamic.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\pt.h</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\uip.r79</file>\r
+      <file>$TOOLKIT_DIR$\inc\stdint.h</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\tasks.pbi</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\port.pbi</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\flop.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\include\flop.h</file>\r
+      <file>$TOOLKIT_DIR$\inc\DLib_Defaults.h</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\GenQTest.r79</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\httpd.pbi</file>\r
+      <file>$PROJ_DIR$\webserver\clock-arch.h</file>\r
+      <file>$PROJ_DIR$\webserver\httpd-fsdata.h</file>\r
+      <file>$PROJ_DIR$\..\..\Source\include\semphr.h</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\comtest.r79</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\serial.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\timer.h</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\91x_uart.pbi</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\httpd-fs.pbi</file>\r
       <file>$PROJ_DIR$\THUMB\Obj\uIP_Task.r79</file>\r
+      <file>$TOOLKIT_DIR$\inc\DLib_Product.h</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\main.r79</file>\r
+      <file>$PROJ_DIR$\..\..\Source\include\task.h</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\dynamic.c</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\queue.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\include\PollQ.h</file>\r
+      <file>$PROJ_DIR$\..\..\Source\portable\IAR\STR91x\ISR_Support.h</file>\r
+      <file>$PROJ_DIR$\webserver\httpd-cgi.h</file>\r
       <file>$PROJ_DIR$\THUMB\Obj\91x_enet.r79</file>\r
       <file>$PROJ_DIR$\THUMB\Obj\dynamic.pbi</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\91x_it.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\clock.h</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\91x_fmi.r79</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\91x_scu.r79</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\91x_enet.pbi</file>\r
+      <file>$PROJ_DIR$\..\..\Source\include\croutine.h</file>\r
+      <file>$TOOLKIT_DIR$\inc\stddef.h</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\timer.r79</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\uIP_Task.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\include\semtest.h</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\91x_lib.pbi</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\integer.pbi</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\91x_it.r79</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\91x_init_IAR.r79</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\91x_wdg.r79</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\semtest.r79</file>\r
       <file>$PROJ_DIR$\THUMB\Obj\flash.pbi</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\flop.pbi</file>\r
+      <file>$PROJ_DIR$\Library\source\91x_uart.c</file>\r
+      <file>$PROJ_DIR$\Library\source\91x_lib.c</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\ParTest.r79</file>\r
       <file>$PROJ_DIR$\THUMB\Obj\heap_2.pbi</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\integer.pbi</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\lcd.pbi</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\main.pbi</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\ParTest.pbi</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\PollQ.pbi</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\semtest.pbi</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\serial.pbi</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\uIP_Task.pbi</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\91x_enet.pbi</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\91x_fmi.pbi</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\91x_vect_IAR.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\flash.c</file>\r
+      <file>$TOOLKIT_DIR$\inc\xencoding_limits.h</file>\r
+      <file>$PROJ_DIR$\webserver\http-strings.h</file>\r
+      <file>$TOOLKIT_DIR$\inc\yvals.h</file>\r
+      <file>$PROJ_DIR$\STCode\lcd.h</file>\r
+      <file>$PROJ_DIR$\webserver\webserver.h</file>\r
+      <file>$PROJ_DIR$\ParTest\ParTest.c</file>\r
       <file>$PROJ_DIR$\THUMB\Obj\91x_gpio.pbi</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\91x_it.pbi</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\91x_lib.pbi</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\91x_scu.pbi</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\91x_uart.pbi</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\91x_vic.pbi</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\91x_wdg.pbi</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\list.pbi</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\port.pbi</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\queue.pbi</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\tasks.pbi</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\RTOSDemo.pbd</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\httpd-cgi.pbi</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\httpd-fs.pbi</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\httpd.pbi</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_tim.h</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\PollQ.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\include\flash.h</file>\r
+      <file>$PROJ_DIR$\webserver\httpd.h</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_ahbapb.h</file>\r
+      <file>$PROJ_DIR$\..\..\Source\portable\IAR\STR91x\portmacro.h</file>\r
       <file>$PROJ_DIR$\THUMB\Obj\psock.pbi</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\timer.pbi</file>\r
+      <file>$TOOLKIT_DIR$\inc\ymath.h</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\heap_2.r79</file>\r
+      <file>$PROJ_DIR$\main.c</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_conf.h</file>\r
+      <file>$PROJ_DIR$\webserver\uIP_Task.c</file>\r
+      <file>$TOOLKIT_DIR$\inc\inttypes.h</file>\r
+      <file>$TOOLKIT_DIR$\lib\dl5tptinl8n.h</file>\r
+      <file>$TOOLKIT_DIR$\inc\intrinsics.h</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\httpd-cgi.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\include\BlockQ.h</file>\r
       <file>$PROJ_DIR$\THUMB\Obj\uip.pbi</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\uip_arp.pbi</file>\r
-      <file>$PROJ_DIR$\THUMB\Exe\RTOSDemo.d79</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\flash.r79</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\flop.r79</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\91x_init_IAR.r79</file>\r
+      <file>$PROJ_DIR$\..\..\Source\include\list.h</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\91x_fmi.pbi</file>\r
+      <file>$PROJ_DIR$\webserver\httpd-fsdata.c</file>\r
+      <file>$PROJ_DIR$\Library\source\91x_fmi.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uip_arp.h</file>\r
+      <file>$TOOLKIT_DIR$\lib\dl5tptinl8n.r79</file>\r
+      <file>$PROJ_DIR$\serial\serial.c</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\GenQTest.pbi</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\QPeek.pbi</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_wdg.h</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\lcd.pbi</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\91x_wdg.pbi</file>\r
+      <file>$PROJ_DIR$\webserver\uip-conf.h</file>\r
+      <file>$TOOLKIT_DIR$\inc\math.h</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\comtest.c</file>\r
+      <file>$PROJ_DIR$\STCode\lcd.c</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_map.h</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_type.h</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\integer.c</file>\r
+      <file>$PROJ_DIR$\..\Common\include\GenQTest.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uip_arch.h</file>\r
+      <file>$PROJ_DIR$\Library\source\91x_enet.c</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\semtest.c</file>\r
+      <file>$PROJ_DIR$\Library\source\91x_it.c</file>\r
+      <file>$PROJ_DIR$\THUMB\List\RTOSDemo.html</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\integer.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\psock.h</file>\r
+      <file>$PROJ_DIR$\..\Common\include\integer.h</file>\r
+      <file>$PROJ_DIR$\..\Common\include\comtest.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uipopt.h</file>\r
+      <file>$TOOLKIT_DIR$\inc\assert.h</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\serial.pbi</file>\r
       <file>$PROJ_DIR$\THUMB\Obj\httpd-cgi.r79</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\httpd-fs.r79</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\httpd.r79</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\psock.r79</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\timer.r79</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\91x_wdg.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\BlockQ.c</file>\r
+      <file>$TOOLKIT_DIR$\inc\ysizet.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uip.h</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_uart.h</file>\r
+      <file>$PROJ_DIR$\..\Common\include\serial.h</file>\r
+      <file>$PROJ_DIR$\..\..\Source\portable\MemMang\heap_2.c</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_it.h</file>\r
+      <file>$PROJ_DIR$\webserver\httpd-fs.h</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\91x_scu.pbi</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_gpio.h</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\main.pbi</file>\r
       <file>$PROJ_DIR$\THUMB\Obj\list.r79</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\port.r79</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\queue.r79</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\tasks.r79</file>\r
-      <file>$PROJ_DIR$\THUMB\Exe\RTOSDemo.sim</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\91x_fmi.r79</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\91x_gpio.r79</file>\r
-      <file>$PROJ_DIR$\THUMB\Obj\91x_it.r79</file>\r
-      <file>$PROJ_DIR$\THUMB\List\RTOSDemo.html</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\flash.r79</file>\r
+      <file>$PROJ_DIR$\Library\source\91x_wdg.c</file>\r
+      <file>$PROJ_DIR$\Library\include\91x_enet.h</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\GenQTest.c</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\flop.c</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\uip_arp.r79</file>\r
+      <file>$TOOLKIT_DIR$\inc\string.h</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\PollQ.c</file>\r
+      <file>$PROJ_DIR$\..\Common\include\QPeek.h</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\BlockQ.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\lc-switch.h</file>\r
+      <file>$PROJ_DIR$\..\Common\include\dynamic.h</file>\r
+      <file>$PROJ_DIR$\THUMB\Obj\comtest.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\psock.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uip_arp.c</file>\r
+      <file>$PROJ_DIR$\webserver\httpd.c</file>\r
+      <file>$PROJ_DIR$\webserver\httpd-fs.c</file>\r
+      <file>$PROJ_DIR$\91x_vect_IAR.s</file>\r
+      <file>$PROJ_DIR$\webserver\httpd-cgi.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\apps\webserver\http-strings.c</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\QPeek.c</file>\r
+      <file>$PROJ_DIR$\lnkarm_flash.xcl</file>\r
+      <file>$PROJ_DIR$\91x_init_IAR.s</file>\r
+      <file>$PROJ_DIR$\..\..\Source\tasks.c</file>\r
+      <file>$PROJ_DIR$\..\..\Source\portable\IAR\STR91x\portasm.s79</file>\r
+      <file>$PROJ_DIR$\..\..\Source\queue.c</file>\r
+      <file>$PROJ_DIR$\..\..\Source\list.c</file>\r
+      <file>$PROJ_DIR$\..\..\Source\portable\IAR\STR91x\port.c</file>\r
+      <file>$PROJ_DIR$\FreeRTOSConfig.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uip.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\timer.c</file>\r
     </outputs>\r
     <file>\r
-      <name>$PROJ_DIR$\..\Common\Minimal\dynamic.c</name>\r
+      <name>[ROOT_NODE]</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>XLINK</name>\r
+          <file> 150 27 20</file>\r
+        </tool>\r
+      </outputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\Library\source\91x_scu.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 81</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 167</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 25 142 118 143</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 25 142 118 143</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\Library\source\91x_gpio.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 126</file>\r
+          <file> 4</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 137</file>\r
+          <file> 107</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 70 39 63 61 30 36 49 48 10 72 14 105 54 74 55 28 69 20 68 50 38</file>\r
+          <file> 168 142 118 143 25</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 70 39 63 30 36 49 48 10 72 14 105 54 74 55 28 69 20 68 50 38</file>\r
+          <file> 168 142 118 143 25</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>[ROOT_NODE]</name>\r
+      <name>$PROJ_DIR$\THUMB\Obj\RTOSDemo.pbd</name>\r
+      <inputs>\r
+        <tool>\r
+          <name>BILINK</name>\r
+          <file> 82 127 107 78 88 167 31 65 14 137 43 133 33 109 134 183 77 94 46 98 26 123 66 58 89 136 45 169 53 114 36 29 157 52 7 86 125 3</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\THUMB\Exe\RTOSDemo.d79</name>\r
       <outputs>\r
         <tool>\r
           <name>XLINK</name>\r
-          <file> 170 188 184</file>\r
+          <file> 150 27</file>\r
         </tool>\r
       </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>XLINK</name>\r
+          <file> 192 76 80 4 91 90 32 81 42 35 99 17 92 180 57 97 1 0 62 48 171 54 116 2 158 44 41 151 22 170 69 9 40 47 72 93 63 34 85 67 50 176 131</file>\r
+        </tool>\r
+      </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\..\Common\Minimal\comtest.c</name>\r
+      <name>$PROJ_DIR$\Library\source\91x_vic.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 34</file>\r
+          <file> 17</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 132</file>\r
+          <file> 14</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 70 39 63 61 30 36 49 48 10 72 14 105 54 74 55 28 69 20 58 37 59</file>\r
+          <file> 11 142 118 143 165 39 112 5 108 25 168 162 135 173</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 70 39 63 30 36 49 48 10 72 14 105 54 74 55 28 69 20 58 37 59</file>\r
+          <file> 11 142 118 143 165 39 112 5 108 25 168 162 135 173</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\..\Common\Minimal\BlockQ.c</name>\r
+      <name>$PROJ_DIR$\Library\source\91x_tim.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 51</file>\r
+          <file> 42</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 131</file>\r
+          <file> 31</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 70 39 63 61 30 36 49 48 10 72 14 105 54 74 55 28 69 20 50 0</file>\r
+          <file> 108 142 118 143 25</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 70 39 63 30 36 49 48 10 72 14 105 54 74 55 28 69 20 50 0</file>\r
+          <file> 108 142 118 143 25</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\..\..\Source\portable\MemMang\heap_2.c</name>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\dynamic.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 133</file>\r
+          <file> 48</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 140</file>\r
+          <file> 77</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 70 39 63 61 30 36 49 48 10 72 14 105 54 74 55 28 69 20</file>\r
+          <file> 24 103 56 121 68 101 19 160 16 84 30 199 8 113 23 122 70 126 61 21 182</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 70 39 63 30 36 49 48 10 72 14 105 54 74 55 28 69 20</file>\r
+          <file> 24 103 56 68 101 19 160 16 84 30 199 8 113 23 122 70 126 61 21 182</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\..\Common\Minimal\integer.c</name>\r
+      <name>$PROJ_DIR$\Library\source\91x_uart.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 134</file>\r
+          <file> 35</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 141</file>\r
+          <file> 65</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 70 39 63 61 30 36 49 48 10 72 14 105 54 74 55 28 69 20 23</file>\r
+          <file> 162 142 118 143 25</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 70 39 63 30 36 49 48 10 72 14 105 54 74 55 28 69 20 23</file>\r
+          <file> 162 142 118 143 25</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\STCode\lcd.c</name>\r
+      <name>$PROJ_DIR$\Library\source\91x_lib.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 116</file>\r
+          <file> 32</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 142</file>\r
+          <file> 88</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 11 7 87 26 12 29 27 75 18 13 2 44 41 45 10 72 39 63 61 30 36 49 48 14 105 54 74 55 28 69 20</file>\r
+          <file> 142 118 143</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 11 7 87 26 12 29 27 75 18 13 2 44 41 45 10 72 39 63 30 36 49 48 14 105 54 74 55 28 69 20</file>\r
+          <file> 142 118 143</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\main.c</name>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\flash.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 117</file>\r
+          <file> 171</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 143</file>\r
+          <file> 94</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 3 39 63 61 30 36 49 48 11 7 87 26 12 29 27 75 18 13 2 44 41 10 72 14 105 54 74 55 28 69 20 50 45 19 23 47 0 62 38 59 16 52 58</file>\r
+          <file> 24 103 56 121 68 101 19 160 16 84 30 199 8 113 23 122 70 126 28 110</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 3 39 63 30 36 49 48 11 7 87 26 12 29 27 75 18 13 2 44 41 10 72 14 105 54 74 55 28 69 20 50 45 19 23 47 0 62 38 59 16 52 58</file>\r
+          <file> 24 103 56 68 101 19 160 16 84 30 199 8 113 23 122 70 126 28 110</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\..\Common\Minimal\semtest.c</name>\r
+      <name>$PROJ_DIR$\ParTest\ParTest.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 124</file>\r
+          <file> 97</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 146</file>\r
+          <file> 33</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 70 39 63 61 30 36 49 48 10 72 14 105 54 74 55 28 69 20 68 50 62</file>\r
+          <file> 39 142 118 143 112 5 11 165 108 25 168 162 135 173 16 84 103 56 121 68 101 19 160 30 199 8 113 23 122 28</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 70 39 63 30 36 49 48 10 72 14 105 54 74 55 28 69 20 68 50 62</file>\r
+          <file> 39 142 118 143 112 5 11 165 108 25 168 162 135 173 16 84 103 56 68 101 19 160 30 199 8 113 23 122 28</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\..\Common\Minimal\PollQ.c</name>\r
+      <name>$PROJ_DIR$\main.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 123</file>\r
+          <file> 69</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 145</file>\r
+          <file> 169</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 70 39 63 61 30 36 49 48 10 72 14 105 54 74 55 28 69 20 50 47</file>\r
+          <file> 18 103 56 121 68 101 19 160 39 142 118 143 112 5 11 165 108 25 168 162 135 173 16 84 30 199 8 113 23 122 70 126 21 104 110 153 73 124 87 182 28 55 6 163 145 179</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 70 39 63 30 36 49 48 10 72 14 105 54 74 55 28 69 20 50 47</file>\r
+          <file> 18 103 56 68 101 19 160 39 142 118 143 112 5 11 165 108 25 168 162 135 173 16 84 30 199 8 113 23 122 70 126 21 104 110 153 73 124 87 182 28 55 6 163 145 179</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\ParTest\ParTest.c</name>\r
+      <name>$PROJ_DIR$\webserver\uIP_Task.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 118</file>\r
+          <file> 67</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 144</file>\r
+          <file> 86</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 11 7 87 26 12 29 27 75 18 13 2 44 41 10 72 39 63 61 30 36 49 48 14 105 54 74 55 28 59</file>\r
+          <file> 177 103 56 121 68 101 19 160 39 142 118 143 112 5 11 165 108 25 168 162 135 173 16 84 30 199 8 113 23 122 70 126 61 21 161 155 138 120 51 105 111 152 49 10 181 166 130 64 79 59</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 11 7 87 26 12 29 27 75 18 13 2 44 41 10 72 39 63 30 36 49 48 14 105 54 74 55 28 59</file>\r
+          <file> 177 103 56 68 101 19 160 39 142 118 143 112 5 11 165 108 25 168 162 135 173 16 84 30 199 8 113 23 122 70 126 61 21 161 155 138 120 51 105 111 152 49 10 181 166 130 64 79 59</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\serial\serial.c</name>\r
+      <name>$PROJ_DIR$\Library\source\91x_fmi.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 125</file>\r
+          <file> 80</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 147</file>\r
+          <file> 127</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 11 7 87 26 12 29 27 75 18 13 2 44 41 10 72 39 63 61 30 36 49 48 14 105 54 74 55 28 50 68 58</file>\r
+          <file> 5 142 118 143</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 11 7 87 26 12 29 27 75 18 13 2 44 41 10 72 39 63 30 36 49 48 14 105 54 74 55 28 50 68 58</file>\r
+          <file> 5 142 118 143</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\Library\source\91x_enet.c</name>\r
+      <name>$PROJ_DIR$\serial\serial.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 136</file>\r
+          <file> 63</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 149</file>\r
+          <file> 157</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 10 72 39 63 61 30 36 49 48 14 105 54 74 55 28 69 20 11 7 87 26 12 29 27 75 18 13 2 44 41 67</file>\r
+          <file> 39 142 118 143 112 5 11 165 108 25 168 162 135 173 16 84 103 56 121 68 101 19 160 30 199 8 113 23 122 21 61 163</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 10 72 39 63 30 36 49 48 14 105 54 74 55 28 69 20 11 7 87 26 12 29 27 75 18 13 2 44 41 67</file>\r
+          <file> 39 142 118 143 112 5 11 165 108 25 168 162 135 173 16 84 103 56 68 101 19 160 30 199 8 113 23 122 21 61 163</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\webserver\uIP_Task.c</name>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\comtest.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 135</file>\r
+          <file> 62</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 148</file>\r
+          <file> 183</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 67 39 63 61 30 36 49 48 11 7 87 26 12 29 27 75 18 13 2 44 41 10 72 14 105 54 74 55 28 69 20 68 50 9 56 24 53 43 40 57 65 31 8 42 21 35 46 1 66</file>\r
+          <file> 24 103 56 121 68 101 19 160 16 84 30 199 8 113 23 122 70 126 163 154 28</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 67 39 63 30 36 49 48 11 7 87 26 12 29 27 75 18 13 2 44 41 10 72 14 105 54 74 55 28 69 20 68 50 9 56 24 53 43 40 57 65 31 8 42 21 35 46 1 66</file>\r
+          <file> 24 103 56 68 101 19 160 16 84 30 199 8 113 23 122 70 126 163 154 28</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\Library\source\91x_wdg.c</name>\r
+      <name>$PROJ_DIR$\STCode\lcd.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 179</file>\r
+          <file> 22</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 157</file>\r
+          <file> 136</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 44 7 87 26 13</file>\r
+          <file> 39 142 118 143 112 5 11 165 108 25 168 162 135 173 104 16 84 103 56 121 68 101 19 160 30 199 8 113 23 122 70 126</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 44 7 87 26 13</file>\r
+          <file> 39 142 118 143 112 5 11 165 108 25 168 162 135 173 104 16 84 103 56 68 101 19 160 30 199 8 113 23 122 70 126</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\..\..\Source\portable\IAR\STR91x\port.c</name>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\integer.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 181</file>\r
+          <file> 151</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 159</file>\r
+          <file> 89</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 11 7 87 26 12 29 27 75 18 13 2 44 41 70 39 63 61 30 36 49 48 10 72 14 105 54 74 55 28 69 20</file>\r
+          <file> 24 103 56 121 68 101 19 160 16 84 30 199 8 113 23 122 70 126 153</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 11 7 87 26 12 29 27 75 18 13 2 44 41 70 39 63 30 36 49 48 10 72 14 105 54 74 55 28 69 20</file>\r
+          <file> 24 103 56 68 101 19 160 16 84 30 199 8 113 23 122 70 126 153</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\..\..\Source\queue.c</name>\r
+      <name>$PROJ_DIR$\Library\source\91x_enet.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 182</file>\r
+          <file> 76</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 160</file>\r
+          <file> 82</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 70 39 63 61 30 36 49 48 67 10 72 14 105 54 74 55 28 69 20 15</file>\r
+          <file> 16 84 103 56 121 68 101 19 160 30 199 8 113 23 122 70 126 39 142 118 143 112 5 11 165 108 25 168 162 135 173 177</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 70 39 63 30 36 49 48 67 10 72 14 105 54 74 55 28 69 20 15</file>\r
+          <file> 16 84 103 56 68 101 19 160 30 199 8 113 23 122 70 126 39 142 118 143 112 5 11 165 108 25 168 162 135 173 177</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\..\..\Source\portable\IAR\STR91x\portasm.s79</name>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\semtest.c</name>\r
       <outputs>\r
         <tool>\r
-          <name>AARM</name>\r
-          <file> 129</file>\r
+          <name>ICCARM</name>\r
+          <file> 93</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 29</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
         <tool>\r
-          <name>AARM</name>\r
-          <file> 32</file>\r
+          <name>ICCARM</name>\r
+          <file> 24 103 56 121 68 101 19 160 16 84 30 199 8 113 23 122 70 126 61 21 87</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 24 103 56 68 101 19 160 16 84 30 199 8 113 23 122 70 126 61 21 87</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\..\..\Source\tasks.c</name>\r
+      <name>$PROJ_DIR$\Library\source\91x_it.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 183</file>\r
+          <file> 90</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 161</file>\r
+          <file> 78</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 3 39 63 61 30 36 49 48 70 67 10 72 14 105 54 74 55 28 69 20</file>\r
+          <file> 199 165 39 142 118 143 112 5 11 108 25 168 162 135 173</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 3 39 63 30 36 49 48 70 67 10 72 14 105 54 74 55 28 69 20</file>\r
+          <file> 199 165 39 142 118 143 112 5 11 108 25 168 162 135 173</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\91x_init_IAR.s</name>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\BlockQ.c</name>\r
       <outputs>\r
         <tool>\r
-          <name>AARM</name>\r
-          <file> 173</file>\r
+          <name>ICCARM</name>\r
+          <file> 180</file>\r
         </tool>\r
-      </outputs>\r
-    </file>\r
-    <file>\r
-      <name>$PROJ_DIR$\91x_vect_IAR.s</name>\r
-      <outputs>\r
         <tool>\r
-          <name>AARM</name>\r
-          <file> 6</file>\r
+          <name>BICOMP</name>\r
+          <file> 43</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
-        <tool>\r
-          <name>AARM</name>\r
-          <file> 105 32</file>\r
-        </tool>\r
-      </inputs>\r
-    </file>\r
-    <file>\r
-      <name>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\apps\webserver\http-strings.c</name>\r
-      <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 5</file>\r
+          <file> 24 103 56 121 68 101 19 160 16 84 30 199 8 113 23 122 70 126 21 124</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 130</file>\r
+          <file> 24 103 56 68 101 19 160 16 84 30 199 8 113 23 122 70 126 21 124</file>\r
         </tool>\r
-      </outputs>\r
+      </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\psock.c</name>\r
+      <name>$PROJ_DIR$\..\..\Source\portable\MemMang\heap_2.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 177</file>\r
+          <file> 116</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 166</file>\r
+          <file> 98</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 3 39 63 61 30 36 49 48 67 56 24 53 43 40 57 65 31 8 42 21 9</file>\r
+          <file> 24 103 56 121 68 101 19 160 16 84 30 199 8 113 23 122 70 126</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 3 39 63 30 36 49 48 67 56 24 53 43 40 57 65 31 8 42 21 9</file>\r
+          <file> 24 103 56 68 101 19 160 16 84 30 199 8 113 23 122 70 126</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uip_arp.c</name>\r
+      <name>$PROJ_DIR$\Library\source\91x_wdg.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 128</file>\r
+          <file> 92</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 169</file>\r
+          <file> 137</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 35 9 56 24 53 43 39 63 61 30 36 49 40 57 65 31 8 42 21 67 48</file>\r
+          <file> 135 142 118 143 25</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 35 9 56 24 53 43 39 63 30 36 49 40 57 65 31 8 42 21 67 48</file>\r
+          <file> 135 142 118 143 25</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\webserver\httpd-cgi.c</name>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\GenQTest.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 174</file>\r
+          <file> 57</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 163</file>\r
+          <file> 133</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 9 56 24 53 43 39 63 61 30 36 49 40 57 65 31 8 42 21 60 3 48 67</file>\r
+          <file> 24 103 56 121 68 101 19 160 16 84 30 199 8 113 23 122 70 126 21 61 145</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 9 56 24 53 43 39 63 30 36 49 40 57 65 31 8 42 21 60 3 48 67</file>\r
+          <file> 24 103 56 68 101 19 160 16 84 30 199 8 113 23 122 70 126 21 61 145</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\webserver\httpd-fs.c</name>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\flop.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 175</file>\r
+          <file> 54</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 164</file>\r
+          <file> 46</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 57 65 56 24 53 43 39 63 61 30 36 49 40 31 8 42 21 73 9 25</file>\r
+          <file> 24 103 56 121 68 101 19 160 139 115 16 84 30 199 8 113 23 122 70 126 55</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 57 65 56 24 53 43 39 63 30 36 49 40 31 8 42 21 73 9 25</file>\r
+          <file> 24 103 56 68 101 19 160 139 115 16 84 30 199 8 113 23 122 70 126 55</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\webserver\httpd.c</name>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\PollQ.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 176</file>\r
+          <file> 1</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 165</file>\r
+          <file> 109</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 9 56 24 53 43 39 63 61 30 36 49 40 57 65 31 8 42 21 60 71 67 48</file>\r
+          <file> 24 103 56 121 68 101 19 160 16 84 30 199 8 113 23 122 70 126 21 73</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 9 56 24 53 43 39 63 30 36 49 40 57 65 31 8 42 21 60 71 67 48</file>\r
+          <file> 24 103 56 68 101 19 160 16 84 30 199 8 113 23 122 70 126 21 73</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\..\Common\Minimal\flash.c</name>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\psock.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 171</file>\r
+          <file> 47</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 138</file>\r
+          <file> 114</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 70 39 63 61 30 36 49 48 10 72 14 105 54 74 55 28 69 20 59 19</file>\r
+          <file> 18 103 56 121 68 101 19 160 177 155 138 120 51 105 111 152 49 10 181 166 161</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 70 39 63 30 36 49 48 10 72 14 105 54 74 55 28 69 20 59 19</file>\r
+          <file> 18 103 56 68 101 19 160 177 155 138 120 51 105 111 152 49 10 181 166 161</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\..\Common\Minimal\flop.c</name>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uip_arp.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 172</file>\r
+          <file> 176</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 139</file>\r
+          <file> 3</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 70 39 63 61 30 36 49 48 4 17 10 72 14 105 54 74 55 28 69 20 16</file>\r
+          <file> 130 161 155 138 120 51 103 56 121 68 101 19 105 111 152 49 10 181 166 177 160</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 70 39 63 30 36 49 48 4 17 10 72 14 105 54 74 55 28 69 20 16</file>\r
+          <file> 130 161 155 138 120 51 103 56 68 101 19 105 111 152 49 10 181 166 177 160</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\Library\source\91x_gpio.c</name>\r
+      <name>$PROJ_DIR$\webserver\httpd.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 186</file>\r
+          <file> 41</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 151</file>\r
+          <file> 58</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 18 7 87 26 13</file>\r
+          <file> 161 155 138 120 51 103 56 121 68 101 19 105 111 152 49 10 181 166 75 102 177 160</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 18 7 87 26 13</file>\r
+          <file> 161 155 138 120 51 103 56 68 101 19 105 111 152 49 10 181 166 75 102 177 160</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\Library\source\91x_fmi.c</name>\r
+      <name>$PROJ_DIR$\webserver\httpd-fs.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 185</file>\r
+          <file> 44</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 150</file>\r
+          <file> 66</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 29 7 87 26</file>\r
+          <file> 111 152 155 138 120 51 103 56 121 68 101 19 105 49 10 181 166 60 161 128</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 29 7 87 26</file>\r
+          <file> 111 152 155 138 120 51 103 56 68 101 19 105 49 10 181 166 60 161 128</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\Library\source\91x_uart.c</name>\r
+      <name>$PROJ_DIR$\91x_vect_IAR.s</name>\r
       <outputs>\r
         <tool>\r
-          <name>ICCARM</name>\r
-          <file> 121</file>\r
-        </tool>\r
-        <tool>\r
-          <name>BICOMP</name>\r
-          <file> 155</file>\r
+          <name>AARM</name>\r
+          <file> 99</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
         <tool>\r
-          <name>ICCARM</name>\r
-          <file> 2 7 87 26 13</file>\r
-        </tool>\r
-        <tool>\r
-          <name>BICOMP</name>\r
-          <file> 2 7 87 26 13</file>\r
+          <name>AARM</name>\r
+          <file> 199 74</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\Library\source\91x_it.c</name>\r
+      <name>$PROJ_DIR$\webserver\httpd-cgi.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 187</file>\r
+          <file> 158</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 152</file>\r
+          <file> 123</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 75 11 7 87 26 12 29 27 18 13 2 44 41</file>\r
+          <file> 161 155 138 120 51 103 56 121 68 101 19 105 111 152 49 10 181 166 75 18 160 177</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 75 11 7 87 26 12 29 27 18 13 2 44 41</file>\r
+          <file> 161 155 138 120 51 103 56 68 101 19 105 111 152 49 10 181 166 75 18 160 177</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\Library\source\91x_lib.c</name>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\apps\webserver\http-strings.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 119</file>\r
+          <file> 2</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 26</file>\r
+        </tool>\r
+      </outputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\QPeek.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 0</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 153</file>\r
+          <file> 134</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 7 87 26</file>\r
+          <file> 24 103 56 121 68 101 19 160 16 84 30 199 8 113 23 122 70 126 21 61 179</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 7 87 26</file>\r
+          <file> 24 103 56 68 101 19 160 16 84 30 199 8 113 23 122 70 126 21 61 179</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\Library\source\91x_scu.c</name>\r
+      <name>$PROJ_DIR$\91x_init_IAR.s</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>AARM</name>\r
+          <file> 91</file>\r
+        </tool>\r
+      </outputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\Source\tasks.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 120</file>\r
+          <file> 34</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 154</file>\r
+          <file> 52</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 13 7 87 26</file>\r
+          <file> 18 103 56 121 68 101 19 160 24 177 16 84 30 199 8 113 23 122 70 126</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 13 7 87 26</file>\r
+          <file> 18 103 56 68 101 19 160 24 177 16 84 30 199 8 113 23 122 70 126</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\..\..\Source\list.c</name>\r
+      <name>$PROJ_DIR$\..\..\Source\portable\IAR\STR91x\portasm.s79</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>AARM</name>\r
+          <file> 40</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>AARM</name>\r
+          <file> 74</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\Source\queue.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 180</file>\r
+          <file> 72</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 158</file>\r
+          <file> 36</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 70 39 63 61 30 36 49 48 10 72 14 105 54 74 55 28 20</file>\r
+          <file> 24 103 56 121 68 101 19 160 177 16 84 30 199 8 113 23 122 70 126 83</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 70 39 63 30 36 49 48 10 72 14 105 54 74 55 28 20</file>\r
+          <file> 24 103 56 68 101 19 160 177 16 84 30 199 8 113 23 122 70 126 83</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\Library\source\91x_vic.c</name>\r
+      <name>$PROJ_DIR$\..\..\Source\list.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 122</file>\r
+          <file> 170</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 156</file>\r
+          <file> 45</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 27 7 87 26 75 11 12 29 18 13 2 44 41</file>\r
+          <file> 24 103 56 121 68 101 19 160 16 84 30 199 8 113 23 122 126</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 27 7 87 26 75 11 12 29 18 13 2 44 41</file>\r
+          <file> 24 103 56 68 101 19 160 16 84 30 199 8 113 23 122 126</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\timer.c</name>\r
+      <name>$PROJ_DIR$\..\..\Source\portable\IAR\STR91x\port.c</name>\r
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 178</file>\r
+          <file> 9</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 167</file>\r
+          <file> 53</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 1 66 10 72 39 63 61 30 36 49 48 14 105 54 74 55 28 46</file>\r
+          <file> 39 142 118 143 112 5 11 165 108 25 168 162 135 173 24 103 56 121 68 101 19 160 156 16 84 30 199 8 113 23 122 70 126</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 1 66 10 72 39 63 30 36 49 48 14 105 54 74 55 28 46</file>\r
+          <file> 39 142 118 143 112 5 11 165 108 25 168 162 135 173 24 103 56 68 101 19 160 156 16 84 30 199 8 113 23 122 70 126</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
@@ -2057,48 +7466,335 @@
       <outputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 127</file>\r
+          <file> 50</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 168</file>\r
+          <file> 125</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
         <tool>\r
           <name>ICCARM</name>\r
-          <file> 9 56 24 53 43 39 63 61 30 36 49 40 57 65 31 8 42 21 33 67 48</file>\r
+          <file> 161 155 138 120 51 103 56 121 68 101 19 105 111 152 49 10 181 166 146 177 160</file>\r
         </tool>\r
         <tool>\r
           <name>BICOMP</name>\r
-          <file> 9 56 24 53 43 39 63 30 36 49 40 57 65 31 8 42 21 33 67 48</file>\r
+          <file> 161 155 138 120 51 103 56 68 101 19 105 111 152 49 10 181 166 146 177 160</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
     <file>\r
-      <name>$PROJ_DIR$\THUMB\Obj\RTOSDemo.pbd</name>\r
-      <inputs>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\timer.c</name>\r
+      <outputs>\r
         <tool>\r
-          <name>BILINK</name>\r
-          <file> 149 150 151 152 153 154 155 156 157 131 144 145 132 137 138 139 140 130 163 164 165 141 142 158 143 159 166 160 146 147 161 167 148 168 169</file>\r
+          <name>ICCARM</name>\r
+          <file> 85</file>\r
         </tool>\r
-      </inputs>\r
-    </file>\r
-    <file>\r
-      <name>$PROJ_DIR$\THUMB\Exe\RTOSDemo.d79</name>\r
-      <outputs>\r
         <tool>\r
-          <name>XLINK</name>\r
-          <file> 188 184</file>\r
+          <name>BICOMP</name>\r
+          <file> 7</file>\r
         </tool>\r
       </outputs>\r
       <inputs>\r
         <tool>\r
-          <name>XLINK</name>\r
-          <file> 96 136 185 186 173 187 119 120 121 6 122 179 51 118 123 34 126 171 172 133 5 174 175 176 134 116 180 117 181 129 177 182 124 125 183 178 135 127 128 64</file>\r
+          <name>ICCARM</name>\r
+          <file> 79 59 16 84 103 56 121 68 101 19 160 30 199 8 113 23 122 64</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 79 59 16 84 103 56 68 101 19 160 30 199 8 113 23 122 64</file>\r
         </tool>\r
       </inputs>\r
     </file>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\stats.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\sys.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\Library\source\91x_scu.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\Library\source\91x_gpio.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\api\api_msg.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\lwip\lwipWebServer\fs.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\Library\source\91x_vic.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\Library\source\91x_tim.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\ipv4\ip_frag.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\snmp\mib2.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\snmp\asn1_dec.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\dynamic.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\lwip\lwipWebServer\BasicWEB.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\ipv4\ip.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\raw.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\mem.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\tcp.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\snmp\asn1_enc.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\tcp_in.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\ipv4\ip_addr.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\Library\source\91x_uart.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\Library\source\91x_lib.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\flash.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\tcp_out.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\ParTest\ParTest.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\api\tcpip.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\udp.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\snmp\mib_structs.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\main.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\webserver\uIP_Task.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\Library\source\91x_fmi.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\serial\serial.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\netif\etharp.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\comtest.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\lwip\api\sys_arch.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\api\sockets.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\STCode\lcd.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\pbuf.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\integer.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\api\api_lib.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\snmp\msg_in.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\Library\source\91x_enet.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\semtest.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\Library\source\91x_it.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\dhcp.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\lwip\lwipWebServer\httpd.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\BlockQ.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\lwip\netif\ethernetif.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\snmp\msg_out.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\..\Source\portable\MemMang\heap_2.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\Library\source\91x_wdg.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\GenQTest.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\flop.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\inet.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\PollQ.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\netif.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\memp.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\api\err.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\ipv4\icmp.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\psock.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uip_arp.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\webserver\httpd.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\webserver\httpd-fs.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\webserver\httpd-cgi.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\apps\webserver\http-strings.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\QPeek.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\..\Source\tasks.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\..\Source\queue.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\..\Source\list.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\..\Source\portable\IAR\STR91x\port.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uip.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\timer.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
   </configuration>\r
 </project>\r
 \r

diff --git a/Demo/ARM9_STR91X_IAR/RTOSDemo.ewd b/Demo/ARM9_STR91X_IAR/RTOSDemo.ewd
index 5ece24bd555732fdb8b648668c2d06fc9b9fecb9..4fd4b847403ff01eb296bd9c64ad97ec36a594af 100644 (file)
--- a/Demo/ARM9_STR91X_IAR/RTOSDemo.ewd
+++ b/Demo/ARM9_STR91X_IAR/RTOSDemo.ewd
@@ -37,7 +37,7 @@
         </option>\r
         <option>\r
           <name>MacFile</name>\r
-          <state>$TOOLKIT_DIR$\config\flashloader\ST\FlashSTR91x.mac</state>\r
+          <state></state>\r
         </option>\r
         <option>\r
           <name>MemOverride</name>\r
@@ -81,7 +81,7 @@
         </option>\r
         <option>\r
           <name>OCProductVersion</name>\r
-          <state>4.31A</state>\r
+          <state>4.42A</state>\r
         </option>\r
         <option>\r
           <name>OCDynDriverList</name>\r
@@ -89,7 +89,7 @@
         </option>\r
         <option>\r
           <name>OCLastSavedByProductVersion</name>\r
-          <state>4.40A</state>\r
+          <state>4.42A</state>\r
         </option>\r
         <option>\r
           <name>OCDownloadAttachToProgram</name>\r
@@ -109,13 +109,25 @@
       <name>ARMSIM_ID</name>\r
       <archiveVersion>2</archiveVersion>\r
       <data>\r
-        <version>0</version>\r
+        <version>1</version>\r
         <wantNonLocal>1</wantNonLocal>\r
         <debug>1</debug>\r
         <option>\r
           <name>OCSimDriverInfo</name>\r
           <state>1</state>\r
         </option>\r
+        <option>\r
+          <name>OCSimEnablePSP</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>OCSimPspOverrideConfig</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>OCSimPspConfigFile</name>\r
+          <state></state>\r
+        </option>\r
       </data>\r
     </settings>\r
     <settings>\r
@@ -200,7 +212,7 @@
       <name>JLINK_ID</name>\r
       <archiveVersion>2</archiveVersion>\r
       <data>\r
-        <version>6</version>\r
+        <version>7</version>\r
         <wantNonLocal>1</wantNonLocal>\r
         <debug>1</debug>\r
         <option>\r
@@ -308,6 +320,51 @@
           <name>CCJLinkUpdateBreakpoints</name>\r
           <state>main</state>\r
         </option>\r
+        <option>\r
+          <name>CCJLinkInterfaceRadio</name>\r
+          <state>0</state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>LMIFTDI_ID</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>0</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>1</debug>\r
+        <option>\r
+          <name>OCDriverInfo</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>LmiftdiSpeed</name>\r
+          <state>500</state>\r
+        </option>\r
+        <option>\r
+          <name>CCLmiftdiResetRadio</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>CCLmiftdiDoLogfile</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCLmiftdiLogFile</name>\r
+          <state>$TOOLKIT_DIR$\cspycomm.log</state>\r
+        </option>\r
+        <option>\r
+          <name>CCLmiftdiBreakpointRadio</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCLmiftdiDoUpdateBreakpoints</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCLmiftdiUpdateBreakpoints</name>\r
+          <state>main</state>\r
+        </option>\r
       </data>\r
     </settings>\r
     <settings>\r
@@ -479,49 +536,53 @@
     </settings>\r
     <debuggerPlugins>\r
       <plugin>\r
-        <file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ewplugin</file>\r
+        <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CMXArmPlugin.ewplugin</file>\r
         <loadFlag>0</loadFlag>\r
       </plugin>\r
       <plugin>\r
-        <file>$EW_DIR$\common\plugins\Orti\Orti.ewplugin</file>\r
+        <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CMXTinyArmPlugin.ewplugin</file>\r
         <loadFlag>0</loadFlag>\r
       </plugin>\r
       <plugin>\r
-        <file>$EW_DIR$\common\plugins\Profiling\Profiling.ewplugin</file>\r
+        <file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>\r
         <loadFlag>0</loadFlag>\r
       </plugin>\r
       <plugin>\r
-        <file>$EW_DIR$\common\plugins\Stack\stack.ewplugin</file>\r
+        <file>$TOOLKIT_DIR$\plugins\rtos\OSE\OseEpsilonPlugin.ewplugin</file>\r
         <loadFlag>0</loadFlag>\r
       </plugin>\r
       <plugin>\r
-        <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CMXArmPlugin.ewplugin</file>\r
+        <file>$TOOLKIT_DIR$\plugins\rtos\PowerPac\PowerPacRTOS.ewplugin</file>\r
         <loadFlag>0</loadFlag>\r
       </plugin>\r
       <plugin>\r
-        <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CMXTinyArmPlugin.ewplugin</file>\r
+        <file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ewplugin</file>\r
         <loadFlag>0</loadFlag>\r
       </plugin>\r
       <plugin>\r
-        <file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>\r
+        <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>\r
         <loadFlag>0</loadFlag>\r
       </plugin>\r
       <plugin>\r
-        <file>$TOOLKIT_DIR$\plugins\rtos\OSE\OseEpsilonPlugin.ewplugin</file>\r
-        <loadFlag>0</loadFlag>\r
+        <file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>\r
+        <loadFlag>1</loadFlag>\r
       </plugin>\r
       <plugin>\r
-        <file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ewplugin</file>\r
+        <file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>\r
         <loadFlag>0</loadFlag>\r
       </plugin>\r
       <plugin>\r
-        <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>\r
-        <loadFlag>0</loadFlag>\r
+        <file>$EW_DIR$\common\plugins\Profiling\Profiling.ENU.ewplugin</file>\r
+        <loadFlag>1</loadFlag>\r
+      </plugin>\r
+      <plugin>\r
+        <file>$EW_DIR$\common\plugins\Stack\Stack.ENU.ewplugin</file>\r
+        <loadFlag>1</loadFlag>\r
       </plugin>\r
     </debuggerPlugins>\r
   </configuration>\r
   <configuration>\r
-    <name>ARM</name>\r
+    <name>ARM - uIP - D</name>\r
     <toolchain>\r
       <name>ARM</name>\r
     </toolchain>\r
@@ -555,7 +616,7 @@
         </option>\r
         <option>\r
           <name>MacFile</name>\r
-          <state>$TOOLKIT_DIR$\config\flashloader\ST\FlashSTR91x.mac</state>\r
+          <state></state>\r
         </option>\r
         <option>\r
           <name>MemOverride</name>\r
@@ -567,7 +628,7 @@
         </option>\r
         <option>\r
           <name>RunToEnable</name>\r
-          <state>0</state>\r
+          <state>1</state>\r
         </option>\r
         <option>\r
           <name>RunToName</name>\r
@@ -599,7 +660,7 @@
         </option>\r
         <option>\r
           <name>OCProductVersion</name>\r
-          <state>4.31A</state>\r
+          <state>4.42A</state>\r
         </option>\r
         <option>\r
           <name>OCDynDriverList</name>\r
@@ -607,7 +668,7 @@
         </option>\r
         <option>\r
           <name>OCLastSavedByProductVersion</name>\r
-          <state>4.40A</state>\r
+          <state>4.42A</state>\r
         </option>\r
         <option>\r
           <name>OCDownloadAttachToProgram</name>\r
@@ -627,13 +688,25 @@
       <name>ARMSIM_ID</name>\r
       <archiveVersion>2</archiveVersion>\r
       <data>\r
-        <version>0</version>\r
+        <version>1</version>\r
         <wantNonLocal>1</wantNonLocal>\r
         <debug>1</debug>\r
         <option>\r
           <name>OCSimDriverInfo</name>\r
           <state>1</state>\r
         </option>\r
+        <option>\r
+          <name>OCSimEnablePSP</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>OCSimPspOverrideConfig</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>OCSimPspConfigFile</name>\r
+          <state></state>\r
+        </option>\r
       </data>\r
     </settings>\r
     <settings>\r
@@ -718,7 +791,7 @@
       <name>JLINK_ID</name>\r
       <archiveVersion>2</archiveVersion>\r
       <data>\r
-        <version>6</version>\r
+        <version>7</version>\r
         <wantNonLocal>1</wantNonLocal>\r
         <debug>1</debug>\r
         <option>\r
@@ -816,7 +889,7 @@
         </option>\r
         <option>\r
           <name>CCJLinkBreakpointRadio</name>\r
-          <state>1</state>\r
+          <state>0</state>\r
         </option>\r
         <option>\r
           <name>CCJLinkDoUpdateBreakpoints</name>\r
@@ -826,6 +899,51 @@
           <name>CCJLinkUpdateBreakpoints</name>\r
           <state>main</state>\r
         </option>\r
+        <option>\r
+          <name>CCJLinkInterfaceRadio</name>\r
+          <state>0</state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>LMIFTDI_ID</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>0</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>1</debug>\r
+        <option>\r
+          <name>OCDriverInfo</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>LmiftdiSpeed</name>\r
+          <state>500</state>\r
+        </option>\r
+        <option>\r
+          <name>CCLmiftdiResetRadio</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>CCLmiftdiDoLogfile</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCLmiftdiLogFile</name>\r
+          <state>$TOOLKIT_DIR$\cspycomm.log</state>\r
+        </option>\r
+        <option>\r
+          <name>CCLmiftdiBreakpointRadio</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCLmiftdiDoUpdateBreakpoints</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCLmiftdiUpdateBreakpoints</name>\r
+          <state>main</state>\r
+        </option>\r
       </data>\r
     </settings>\r
     <settings>\r
@@ -997,44 +1115,1785 @@
     </settings>\r
     <debuggerPlugins>\r
       <plugin>\r
-        <file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ewplugin</file>\r
+        <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CMXArmPlugin.ewplugin</file>\r
         <loadFlag>0</loadFlag>\r
       </plugin>\r
       <plugin>\r
-        <file>$EW_DIR$\common\plugins\Orti\Orti.ewplugin</file>\r
+        <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CMXTinyArmPlugin.ewplugin</file>\r
         <loadFlag>0</loadFlag>\r
       </plugin>\r
       <plugin>\r
-        <file>$EW_DIR$\common\plugins\Profiling\Profiling.ewplugin</file>\r
+        <file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>\r
         <loadFlag>0</loadFlag>\r
       </plugin>\r
       <plugin>\r
-        <file>$EW_DIR$\common\plugins\Stack\stack.ewplugin</file>\r
+        <file>$TOOLKIT_DIR$\plugins\rtos\OSE\OseEpsilonPlugin.ewplugin</file>\r
         <loadFlag>0</loadFlag>\r
       </plugin>\r
       <plugin>\r
-        <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CMXArmPlugin.ewplugin</file>\r
+        <file>$TOOLKIT_DIR$\plugins\rtos\PowerPac\PowerPacRTOS.ewplugin</file>\r
         <loadFlag>0</loadFlag>\r
       </plugin>\r
       <plugin>\r
-        <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CMXTinyArmPlugin.ewplugin</file>\r
+        <file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ewplugin</file>\r
         <loadFlag>0</loadFlag>\r
       </plugin>\r
       <plugin>\r
-        <file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>\r
+        <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>\r
         <loadFlag>0</loadFlag>\r
       </plugin>\r
       <plugin>\r
-        <file>$TOOLKIT_DIR$\plugins\rtos\OSE\OseEpsilonPlugin.ewplugin</file>\r
-        <loadFlag>0</loadFlag>\r
+        <file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>\r
+        <loadFlag>1</loadFlag>\r
       </plugin>\r
       <plugin>\r
-        <file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ewplugin</file>\r
+        <file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>\r
         <loadFlag>0</loadFlag>\r
       </plugin>\r
       <plugin>\r
-        <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>\r
-        <loadFlag>0</loadFlag>\r
+        <file>$EW_DIR$\common\plugins\Profiling\Profiling.ENU.ewplugin</file>\r
+        <loadFlag>1</loadFlag>\r
+      </plugin>\r
+      <plugin>\r
+        <file>$EW_DIR$\common\plugins\Stack\Stack.ENU.ewplugin</file>\r
+        <loadFlag>1</loadFlag>\r
+      </plugin>\r
+    </debuggerPlugins>\r
+  </configuration>\r
+  <configuration>\r
+    <name>ARM - lwIP - D</name>\r
+    <toolchain>\r
+      <name>ARM</name>\r
+    </toolchain>\r
+    <debug>1</debug>\r
+    <settings>\r
+      <name>C-SPY</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>13</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>1</debug>\r
+        <option>\r
+          <name>CInput</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>CEndian</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>CProcessor</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>OCVariant</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>MacOverride</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>MacFile</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>MemOverride</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>MemFile</name>\r
+          <state>$TOOLKIT_DIR$\CONFIG\iostr912.ddf</state>\r
+        </option>\r
+        <option>\r
+          <name>RunToEnable</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>RunToName</name>\r
+          <state>main</state>\r
+        </option>\r
+        <option>\r
+          <name>CExtraOptionsCheck</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CExtraOptions</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>CFpuProcessor</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>OCDDFArgumentProducer</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>OCDownloadSuppressDownload</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>OCDownloadVerifyAll</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>OCProductVersion</name>\r
+          <state>4.42A</state>\r
+        </option>\r
+        <option>\r
+          <name>OCDynDriverList</name>\r
+          <state>JLINK_ID</state>\r
+        </option>\r
+        <option>\r
+          <name>OCLastSavedByProductVersion</name>\r
+          <state>4.42A</state>\r
+        </option>\r
+        <option>\r
+          <name>OCDownloadAttachToProgram</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>FlashLoaders</name>\r
+          <state>,,,,(default),</state>\r
+        </option>\r
+        <option>\r
+          <name>UseFlashLoader</name>\r
+          <state>1</state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>ARMSIM_ID</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>1</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>1</debug>\r
+        <option>\r
+          <name>OCSimDriverInfo</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>OCSimEnablePSP</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>OCSimPspOverrideConfig</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>OCSimPspConfigFile</name>\r
+          <state></state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>ANGEL_ID</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>0</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>1</debug>\r
+        <option>\r
+          <name>CCAngelHeartbeat</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>CAngelCommunication</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>CAngelCommBaud</name>\r
+          <version>0</version>\r
+          <state>3</state>\r
+        </option>\r
+        <option>\r
+          <name>CAngelCommPort</name>\r
+          <version>0</version>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>ANGELTCPIP</name>\r
+          <state>aaa.bbb.ccc.ddd</state>\r
+        </option>\r
+        <option>\r
+          <name>DoAngelLogfile</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>AngelLogFile</name>\r
+          <state>$TOOLKIT_DIR$\cspycomm.log</state>\r
+        </option>\r
+        <option>\r
+          <name>OCDriverInfo</name>\r
+          <state>1</state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>IARROM_ID</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>0</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>1</debug>\r
+        <option>\r
+          <name>CRomLogFileCheck</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CRomLogFileEditB</name>\r
+          <state>$TOOLKIT_DIR$\cspycomm.log</state>\r
+        </option>\r
+        <option>\r
+          <name>CRomCommunication</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CRomCommPort</name>\r
+          <version>0</version>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CRomCommBaud</name>\r
+          <version>0</version>\r
+          <state>7</state>\r
+        </option>\r
+        <option>\r
+          <name>OCDriverInfo</name>\r
+          <state>1</state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>JLINK_ID</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>7</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>1</debug>\r
+        <option>\r
+          <name>JLinkSpeed</name>\r
+          <state>32</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkDoLogfile</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkLogFile</name>\r
+          <state>$TOOLKIT_DIR$\cspycomm.log</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkHWResetDelay</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>OCDriverInfo</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>JLinkInitialSpeed</name>\r
+          <state>32</state>\r
+        </option>\r
+        <option>\r
+          <name>CCDoJlinkMultiTarget</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCScanChainNonARMDevices</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkMultiTarget</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkIRLength</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkCommRadio</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkTCPIP</name>\r
+          <state>aaa.bbb.ccc.ddd</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkResetRadio</name>\r
+          <state>2</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkResetInitSeq</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkSpeedRadioV2</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCUSBDevice</name>\r
+          <version>0</version>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchReset</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchUndef</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchSWI</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchData</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchPrefetch</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchIRQ</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchFIQ</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkBreakpointRadio</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkDoUpdateBreakpoints</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkUpdateBreakpoints</name>\r
+          <state>main</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkInterfaceRadio</name>\r
+          <state>0</state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>LMIFTDI_ID</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>0</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>1</debug>\r
+        <option>\r
+          <name>OCDriverInfo</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>LmiftdiSpeed</name>\r
+          <state>500</state>\r
+        </option>\r
+        <option>\r
+          <name>CCLmiftdiResetRadio</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>CCLmiftdiDoLogfile</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCLmiftdiLogFile</name>\r
+          <state>$TOOLKIT_DIR$\cspycomm.log</state>\r
+        </option>\r
+        <option>\r
+          <name>CCLmiftdiBreakpointRadio</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCLmiftdiDoUpdateBreakpoints</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCLmiftdiUpdateBreakpoints</name>\r
+          <state>main</state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>MACRAIGOR_ID</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>2</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>1</debug>\r
+        <option>\r
+          <name>jtag</name>\r
+          <version>0</version>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>EmuSpeed</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>TCPIP</name>\r
+          <state>aaa.bbb.ccc.ddd</state>\r
+        </option>\r
+        <option>\r
+          <name>DoLogfile</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>LogFile</name>\r
+          <state>$TOOLKIT_DIR$\cspycomm.log</state>\r
+        </option>\r
+        <option>\r
+          <name>DoEmuMultiTarget</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>EmuMultiTarget</name>\r
+          <state>0@ARM7TDMI</state>\r
+        </option>\r
+        <option>\r
+          <name>EmuHWReset</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CEmuCommBaud</name>\r
+          <version>0</version>\r
+          <state>4</state>\r
+        </option>\r
+        <option>\r
+          <name>CEmuCommPort</name>\r
+          <version>0</version>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>jtago</name>\r
+          <version>0</version>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>OCDriverInfo</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>UnusedAddr</name>\r
+          <state>0x00800000</state>\r
+        </option>\r
+        <option>\r
+          <name>CCMacraigorHWResetDelay</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>CCJTagBreakpointRadio</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJTagDoUpdateBreakpoints</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJTagUpdateBreakpoints</name>\r
+          <state>main</state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>RDI_ID</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>1</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>1</debug>\r
+        <option>\r
+          <name>CRDIDriverDll</name>\r
+          <state>Browse to your RDI driver</state>\r
+        </option>\r
+        <option>\r
+          <name>CRDILogFileCheck</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CRDILogFileEdit</name>\r
+          <state>$TOOLKIT_DIR$\cspycomm.log</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDIHWReset</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchReset</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchUndef</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchSWI</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchData</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchPrefetch</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchIRQ</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchFIQ</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDIUseETM</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>OCDriverInfo</name>\r
+          <state>1</state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>THIRDPARTY_ID</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>0</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>1</debug>\r
+        <option>\r
+          <name>CThirdPartyDriverDll</name>\r
+          <state>Browse to your third-party driver</state>\r
+        </option>\r
+        <option>\r
+          <name>CThirdPartyLogFileCheck</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CThirdPartyLogFileEditB</name>\r
+          <state>$TOOLKIT_DIR$\cspycomm.log</state>\r
+        </option>\r
+        <option>\r
+          <name>OCDriverInfo</name>\r
+          <state>1</state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <debuggerPlugins>\r
+      <plugin>\r
+        <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CMXArmPlugin.ewplugin</file>\r
+        <loadFlag>0</loadFlag>\r
+      </plugin>\r
+      <plugin>\r
+        <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CMXTinyArmPlugin.ewplugin</file>\r
+        <loadFlag>0</loadFlag>\r
+      </plugin>\r
+      <plugin>\r
+        <file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>\r
+        <loadFlag>0</loadFlag>\r
+      </plugin>\r
+      <plugin>\r
+        <file>$TOOLKIT_DIR$\plugins\rtos\OSE\OseEpsilonPlugin.ewplugin</file>\r
+        <loadFlag>0</loadFlag>\r
+      </plugin>\r
+      <plugin>\r
+        <file>$TOOLKIT_DIR$\plugins\rtos\PowerPac\PowerPacRTOS.ewplugin</file>\r
+        <loadFlag>0</loadFlag>\r
+      </plugin>\r
+      <plugin>\r
+        <file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ewplugin</file>\r
+        <loadFlag>0</loadFlag>\r
+      </plugin>\r
+      <plugin>\r
+        <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>\r
+        <loadFlag>0</loadFlag>\r
+      </plugin>\r
+      <plugin>\r
+        <file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>\r
+        <loadFlag>1</loadFlag>\r
+      </plugin>\r
+      <plugin>\r
+        <file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>\r
+        <loadFlag>0</loadFlag>\r
+      </plugin>\r
+      <plugin>\r
+        <file>$EW_DIR$\common\plugins\Profiling\Profiling.ENU.ewplugin</file>\r
+        <loadFlag>1</loadFlag>\r
+      </plugin>\r
+      <plugin>\r
+        <file>$EW_DIR$\common\plugins\Stack\Stack.ENU.ewplugin</file>\r
+        <loadFlag>1</loadFlag>\r
+      </plugin>\r
+    </debuggerPlugins>\r
+  </configuration>\r
+  <configuration>\r
+    <name>ARM - lwIP - R</name>\r
+    <toolchain>\r
+      <name>ARM</name>\r
+    </toolchain>\r
+    <debug>0</debug>\r
+    <settings>\r
+      <name>C-SPY</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>13</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>0</debug>\r
+        <option>\r
+          <name>CInput</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>CEndian</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>CProcessor</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>OCVariant</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>MacOverride</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>MacFile</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>MemOverride</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>MemFile</name>\r
+          <state>$TOOLKIT_DIR$\CONFIG\iostr912.ddf</state>\r
+        </option>\r
+        <option>\r
+          <name>RunToEnable</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>RunToName</name>\r
+          <state>main</state>\r
+        </option>\r
+        <option>\r
+          <name>CExtraOptionsCheck</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CExtraOptions</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>CFpuProcessor</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>OCDDFArgumentProducer</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>OCDownloadSuppressDownload</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>OCDownloadVerifyAll</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>OCProductVersion</name>\r
+          <state>4.42A</state>\r
+        </option>\r
+        <option>\r
+          <name>OCDynDriverList</name>\r
+          <state>JLINK_ID</state>\r
+        </option>\r
+        <option>\r
+          <name>OCLastSavedByProductVersion</name>\r
+          <state>4.42A</state>\r
+        </option>\r
+        <option>\r
+          <name>OCDownloadAttachToProgram</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>FlashLoaders</name>\r
+          <state>,,,,(default),</state>\r
+        </option>\r
+        <option>\r
+          <name>UseFlashLoader</name>\r
+          <state>1</state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>ARMSIM_ID</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>1</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>0</debug>\r
+        <option>\r
+          <name>OCSimDriverInfo</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>OCSimEnablePSP</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>OCSimPspOverrideConfig</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>OCSimPspConfigFile</name>\r
+          <state></state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>ANGEL_ID</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>0</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>0</debug>\r
+        <option>\r
+          <name>CCAngelHeartbeat</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>CAngelCommunication</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>CAngelCommBaud</name>\r
+          <version>0</version>\r
+          <state>3</state>\r
+        </option>\r
+        <option>\r
+          <name>CAngelCommPort</name>\r
+          <version>0</version>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>ANGELTCPIP</name>\r
+          <state>aaa.bbb.ccc.ddd</state>\r
+        </option>\r
+        <option>\r
+          <name>DoAngelLogfile</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>AngelLogFile</name>\r
+          <state>$TOOLKIT_DIR$\cspycomm.log</state>\r
+        </option>\r
+        <option>\r
+          <name>OCDriverInfo</name>\r
+          <state>1</state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>IARROM_ID</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>0</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>0</debug>\r
+        <option>\r
+          <name>CRomLogFileCheck</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CRomLogFileEditB</name>\r
+          <state>$TOOLKIT_DIR$\cspycomm.log</state>\r
+        </option>\r
+        <option>\r
+          <name>CRomCommunication</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CRomCommPort</name>\r
+          <version>0</version>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CRomCommBaud</name>\r
+          <version>0</version>\r
+          <state>7</state>\r
+        </option>\r
+        <option>\r
+          <name>OCDriverInfo</name>\r
+          <state>1</state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>JLINK_ID</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>7</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>0</debug>\r
+        <option>\r
+          <name>JLinkSpeed</name>\r
+          <state>32</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkDoLogfile</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkLogFile</name>\r
+          <state>$TOOLKIT_DIR$\cspycomm.log</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkHWResetDelay</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>OCDriverInfo</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>JLinkInitialSpeed</name>\r
+          <state>32</state>\r
+        </option>\r
+        <option>\r
+          <name>CCDoJlinkMultiTarget</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCScanChainNonARMDevices</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkMultiTarget</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkIRLength</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkCommRadio</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkTCPIP</name>\r
+          <state>aaa.bbb.ccc.ddd</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkResetRadio</name>\r
+          <state>2</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkResetInitSeq</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkSpeedRadioV2</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCUSBDevice</name>\r
+          <version>0</version>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchReset</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchUndef</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchSWI</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchData</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchPrefetch</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchIRQ</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchFIQ</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkBreakpointRadio</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkDoUpdateBreakpoints</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkUpdateBreakpoints</name>\r
+          <state>main</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkInterfaceRadio</name>\r
+          <state>0</state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>LMIFTDI_ID</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>0</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>0</debug>\r
+        <option>\r
+          <name>OCDriverInfo</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>LmiftdiSpeed</name>\r
+          <state>500</state>\r
+        </option>\r
+        <option>\r
+          <name>CCLmiftdiResetRadio</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>CCLmiftdiDoLogfile</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCLmiftdiLogFile</name>\r
+          <state>$TOOLKIT_DIR$\cspycomm.log</state>\r
+        </option>\r
+        <option>\r
+          <name>CCLmiftdiBreakpointRadio</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCLmiftdiDoUpdateBreakpoints</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCLmiftdiUpdateBreakpoints</name>\r
+          <state>main</state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>MACRAIGOR_ID</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>2</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>0</debug>\r
+        <option>\r
+          <name>jtag</name>\r
+          <version>0</version>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>EmuSpeed</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>TCPIP</name>\r
+          <state>aaa.bbb.ccc.ddd</state>\r
+        </option>\r
+        <option>\r
+          <name>DoLogfile</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>LogFile</name>\r
+          <state>$TOOLKIT_DIR$\cspycomm.log</state>\r
+        </option>\r
+        <option>\r
+          <name>DoEmuMultiTarget</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>EmuMultiTarget</name>\r
+          <state>0@ARM7TDMI</state>\r
+        </option>\r
+        <option>\r
+          <name>EmuHWReset</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CEmuCommBaud</name>\r
+          <version>0</version>\r
+          <state>4</state>\r
+        </option>\r
+        <option>\r
+          <name>CEmuCommPort</name>\r
+          <version>0</version>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>jtago</name>\r
+          <version>0</version>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>OCDriverInfo</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>UnusedAddr</name>\r
+          <state>0x00800000</state>\r
+        </option>\r
+        <option>\r
+          <name>CCMacraigorHWResetDelay</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>CCJTagBreakpointRadio</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJTagDoUpdateBreakpoints</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJTagUpdateBreakpoints</name>\r
+          <state>main</state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>RDI_ID</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>1</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>0</debug>\r
+        <option>\r
+          <name>CRDIDriverDll</name>\r
+          <state>Browse to your RDI driver</state>\r
+        </option>\r
+        <option>\r
+          <name>CRDILogFileCheck</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CRDILogFileEdit</name>\r
+          <state>$TOOLKIT_DIR$\cspycomm.log</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDIHWReset</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchReset</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchUndef</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchSWI</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchData</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchPrefetch</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchIRQ</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchFIQ</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDIUseETM</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>OCDriverInfo</name>\r
+          <state>1</state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>THIRDPARTY_ID</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>0</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>0</debug>\r
+        <option>\r
+          <name>CThirdPartyDriverDll</name>\r
+          <state>Browse to your third-party driver</state>\r
+        </option>\r
+        <option>\r
+          <name>CThirdPartyLogFileCheck</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CThirdPartyLogFileEditB</name>\r
+          <state>$TOOLKIT_DIR$\cspycomm.log</state>\r
+        </option>\r
+        <option>\r
+          <name>OCDriverInfo</name>\r
+          <state>1</state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <debuggerPlugins>\r
+      <plugin>\r
+        <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CMXArmPlugin.ewplugin</file>\r
+        <loadFlag>0</loadFlag>\r
+      </plugin>\r
+      <plugin>\r
+        <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CMXTinyArmPlugin.ewplugin</file>\r
+        <loadFlag>0</loadFlag>\r
+      </plugin>\r
+      <plugin>\r
+        <file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>\r
+        <loadFlag>0</loadFlag>\r
+      </plugin>\r
+      <plugin>\r
+        <file>$TOOLKIT_DIR$\plugins\rtos\OSE\OseEpsilonPlugin.ewplugin</file>\r
+        <loadFlag>0</loadFlag>\r
+      </plugin>\r
+      <plugin>\r
+        <file>$TOOLKIT_DIR$\plugins\rtos\PowerPac\PowerPacRTOS.ewplugin</file>\r
+        <loadFlag>0</loadFlag>\r
+      </plugin>\r
+      <plugin>\r
+        <file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ewplugin</file>\r
+        <loadFlag>0</loadFlag>\r
+      </plugin>\r
+      <plugin>\r
+        <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>\r
+        <loadFlag>0</loadFlag>\r
+      </plugin>\r
+      <plugin>\r
+        <file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>\r
+        <loadFlag>1</loadFlag>\r
+      </plugin>\r
+      <plugin>\r
+        <file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>\r
+        <loadFlag>0</loadFlag>\r
+      </plugin>\r
+      <plugin>\r
+        <file>$EW_DIR$\common\plugins\Profiling\Profiling.ENU.ewplugin</file>\r
+        <loadFlag>1</loadFlag>\r
+      </plugin>\r
+      <plugin>\r
+        <file>$EW_DIR$\common\plugins\Stack\Stack.ENU.ewplugin</file>\r
+        <loadFlag>1</loadFlag>\r
+      </plugin>\r
+    </debuggerPlugins>\r
+  </configuration>\r
+  <configuration>\r
+    <name>ARM - uIP - R</name>\r
+    <toolchain>\r
+      <name>ARM</name>\r
+    </toolchain>\r
+    <debug>0</debug>\r
+    <settings>\r
+      <name>C-SPY</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>13</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>0</debug>\r
+        <option>\r
+          <name>CInput</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>CEndian</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>CProcessor</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>OCVariant</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>MacOverride</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>MacFile</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>MemOverride</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>MemFile</name>\r
+          <state>$TOOLKIT_DIR$\CONFIG\iostr912.ddf</state>\r
+        </option>\r
+        <option>\r
+          <name>RunToEnable</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>RunToName</name>\r
+          <state>main</state>\r
+        </option>\r
+        <option>\r
+          <name>CExtraOptionsCheck</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CExtraOptions</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>CFpuProcessor</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>OCDDFArgumentProducer</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>OCDownloadSuppressDownload</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>OCDownloadVerifyAll</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>OCProductVersion</name>\r
+          <state>4.42A</state>\r
+        </option>\r
+        <option>\r
+          <name>OCDynDriverList</name>\r
+          <state>JLINK_ID</state>\r
+        </option>\r
+        <option>\r
+          <name>OCLastSavedByProductVersion</name>\r
+          <state>4.42A</state>\r
+        </option>\r
+        <option>\r
+          <name>OCDownloadAttachToProgram</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>FlashLoaders</name>\r
+          <state>,,,,(default),</state>\r
+        </option>\r
+        <option>\r
+          <name>UseFlashLoader</name>\r
+          <state>1</state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>ARMSIM_ID</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>1</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>0</debug>\r
+        <option>\r
+          <name>OCSimDriverInfo</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>OCSimEnablePSP</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>OCSimPspOverrideConfig</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>OCSimPspConfigFile</name>\r
+          <state></state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>ANGEL_ID</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>0</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>0</debug>\r
+        <option>\r
+          <name>CCAngelHeartbeat</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>CAngelCommunication</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>CAngelCommBaud</name>\r
+          <version>0</version>\r
+          <state>3</state>\r
+        </option>\r
+        <option>\r
+          <name>CAngelCommPort</name>\r
+          <version>0</version>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>ANGELTCPIP</name>\r
+          <state>aaa.bbb.ccc.ddd</state>\r
+        </option>\r
+        <option>\r
+          <name>DoAngelLogfile</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>AngelLogFile</name>\r
+          <state>$TOOLKIT_DIR$\cspycomm.log</state>\r
+        </option>\r
+        <option>\r
+          <name>OCDriverInfo</name>\r
+          <state>1</state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>IARROM_ID</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>0</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>0</debug>\r
+        <option>\r
+          <name>CRomLogFileCheck</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CRomLogFileEditB</name>\r
+          <state>$TOOLKIT_DIR$\cspycomm.log</state>\r
+        </option>\r
+        <option>\r
+          <name>CRomCommunication</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CRomCommPort</name>\r
+          <version>0</version>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CRomCommBaud</name>\r
+          <version>0</version>\r
+          <state>7</state>\r
+        </option>\r
+        <option>\r
+          <name>OCDriverInfo</name>\r
+          <state>1</state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>JLINK_ID</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>7</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>0</debug>\r
+        <option>\r
+          <name>JLinkSpeed</name>\r
+          <state>32</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkDoLogfile</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkLogFile</name>\r
+          <state>$TOOLKIT_DIR$\cspycomm.log</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkHWResetDelay</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>OCDriverInfo</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>JLinkInitialSpeed</name>\r
+          <state>32</state>\r
+        </option>\r
+        <option>\r
+          <name>CCDoJlinkMultiTarget</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCScanChainNonARMDevices</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkMultiTarget</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkIRLength</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkCommRadio</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkTCPIP</name>\r
+          <state>aaa.bbb.ccc.ddd</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkResetRadio</name>\r
+          <state>2</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkResetInitSeq</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkSpeedRadioV2</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCUSBDevice</name>\r
+          <version>0</version>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchReset</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchUndef</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchSWI</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchData</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchPrefetch</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchIRQ</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchFIQ</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkBreakpointRadio</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkDoUpdateBreakpoints</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkUpdateBreakpoints</name>\r
+          <state>main</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkInterfaceRadio</name>\r
+          <state>0</state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>LMIFTDI_ID</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>0</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>0</debug>\r
+        <option>\r
+          <name>OCDriverInfo</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>LmiftdiSpeed</name>\r
+          <state>500</state>\r
+        </option>\r
+        <option>\r
+          <name>CCLmiftdiResetRadio</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>CCLmiftdiDoLogfile</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCLmiftdiLogFile</name>\r
+          <state>$TOOLKIT_DIR$\cspycomm.log</state>\r
+        </option>\r
+        <option>\r
+          <name>CCLmiftdiBreakpointRadio</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCLmiftdiDoUpdateBreakpoints</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCLmiftdiUpdateBreakpoints</name>\r
+          <state>main</state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>MACRAIGOR_ID</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>2</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>0</debug>\r
+        <option>\r
+          <name>jtag</name>\r
+          <version>0</version>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>EmuSpeed</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>TCPIP</name>\r
+          <state>aaa.bbb.ccc.ddd</state>\r
+        </option>\r
+        <option>\r
+          <name>DoLogfile</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>LogFile</name>\r
+          <state>$TOOLKIT_DIR$\cspycomm.log</state>\r
+        </option>\r
+        <option>\r
+          <name>DoEmuMultiTarget</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>EmuMultiTarget</name>\r
+          <state>0@ARM7TDMI</state>\r
+        </option>\r
+        <option>\r
+          <name>EmuHWReset</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CEmuCommBaud</name>\r
+          <version>0</version>\r
+          <state>4</state>\r
+        </option>\r
+        <option>\r
+          <name>CEmuCommPort</name>\r
+          <version>0</version>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>jtago</name>\r
+          <version>0</version>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>OCDriverInfo</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>UnusedAddr</name>\r
+          <state>0x00800000</state>\r
+        </option>\r
+        <option>\r
+          <name>CCMacraigorHWResetDelay</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>CCJTagBreakpointRadio</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJTagDoUpdateBreakpoints</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJTagUpdateBreakpoints</name>\r
+          <state>main</state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>RDI_ID</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>1</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>0</debug>\r
+        <option>\r
+          <name>CRDIDriverDll</name>\r
+          <state>Browse to your RDI driver</state>\r
+        </option>\r
+        <option>\r
+          <name>CRDILogFileCheck</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CRDILogFileEdit</name>\r
+          <state>$TOOLKIT_DIR$\cspycomm.log</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDIHWReset</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchReset</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchUndef</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchSWI</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchData</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchPrefetch</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchIRQ</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchFIQ</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDIUseETM</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>OCDriverInfo</name>\r
+          <state>1</state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>THIRDPARTY_ID</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>0</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>0</debug>\r
+        <option>\r
+          <name>CThirdPartyDriverDll</name>\r
+          <state>Browse to your third-party driver</state>\r
+        </option>\r
+        <option>\r
+          <name>CThirdPartyLogFileCheck</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CThirdPartyLogFileEditB</name>\r
+          <state>$TOOLKIT_DIR$\cspycomm.log</state>\r
+        </option>\r
+        <option>\r
+          <name>OCDriverInfo</name>\r
+          <state>1</state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <debuggerPlugins>\r
+      <plugin>\r
+        <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CMXArmPlugin.ewplugin</file>\r
+        <loadFlag>0</loadFlag>\r
+      </plugin>\r
+      <plugin>\r
+        <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CMXTinyArmPlugin.ewplugin</file>\r
+        <loadFlag>0</loadFlag>\r
+      </plugin>\r
+      <plugin>\r
+        <file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>\r
+        <loadFlag>0</loadFlag>\r
+      </plugin>\r
+      <plugin>\r
+        <file>$TOOLKIT_DIR$\plugins\rtos\OSE\OseEpsilonPlugin.ewplugin</file>\r
+        <loadFlag>0</loadFlag>\r
+      </plugin>\r
+      <plugin>\r
+        <file>$TOOLKIT_DIR$\plugins\rtos\PowerPac\PowerPacRTOS.ewplugin</file>\r
+        <loadFlag>0</loadFlag>\r
+      </plugin>\r
+      <plugin>\r
+        <file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ewplugin</file>\r
+        <loadFlag>0</loadFlag>\r
+      </plugin>\r
+      <plugin>\r
+        <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>\r
+        <loadFlag>0</loadFlag>\r
+      </plugin>\r
+      <plugin>\r
+        <file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>\r
+        <loadFlag>1</loadFlag>\r
+      </plugin>\r
+      <plugin>\r
+        <file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>\r
+        <loadFlag>0</loadFlag>\r
+      </plugin>\r
+      <plugin>\r
+        <file>$EW_DIR$\common\plugins\Profiling\Profiling.ENU.ewplugin</file>\r
+        <loadFlag>1</loadFlag>\r
+      </plugin>\r
+      <plugin>\r
+        <file>$EW_DIR$\common\plugins\Stack\Stack.ENU.ewplugin</file>\r
+        <loadFlag>1</loadFlag>\r
       </plugin>\r
     </debuggerPlugins>\r
   </configuration>\r

diff --git a/Demo/ARM9_STR91X_IAR/RTOSDemo.ewp b/Demo/ARM9_STR91X_IAR/RTOSDemo.ewp
index 0281aab63df2b7e6b63f50283f06f614af949971..194a52cb4c053a6f6e8b91a108986be0a5d34acc 100644 (file)
--- a/Demo/ARM9_STR91X_IAR/RTOSDemo.ewp
+++ b/Demo/ARM9_STR91X_IAR/RTOSDemo.ewp
@@ -107,7 +107,7 @@
         </option>\r
         <option>\r
           <name>OGLastSavedByProductVersion</name>\r
-          <state>4.40A</state>\r
+          <state>4.42A</state>\r
         </option>\r
         <option>\r
           <name>GeneralMisraRules</name>\r
@@ -132,7 +132,7 @@
       <name>ICCARM</name>\r
       <archiveVersion>2</archiveVersion>\r
       <data>\r
-        <version>13</version>\r
+        <version>14</version>\r
         <wantNonLocal>1</wantNonLocal>\r
         <debug>1</debug>\r
         <option>\r
@@ -142,6 +142,7 @@
           <state>DONT_RUN_TASK_IN_ARM_MODE_</state>\r
           <state>PACK_STRUCT_END=</state>\r
           <state>ALIGN_STRUCT_END=</state>\r
+          <state>STACK_UIP</state>\r
         </option>\r
         <option>\r
           <name>CCPreprocFile</name>\r
@@ -201,7 +202,7 @@
         </option>\r
         <option>\r
           <name>CCOptSizeSpeed</name>\r
-          <state>1</state>\r
+          <state>0</state>\r
         </option>\r
         <option>\r
           <name>CCOptimization</name>\r
@@ -295,7 +296,7 @@
         </option>\r
         <option>\r
           <name>CCOptSizeSpeedSlave</name>\r
-          <state>1</state>\r
+          <state>0</state>\r
         </option>\r
         <option>\r
           <name>CCOptimizationSlave</name>\r
@@ -353,6 +354,11 @@
           <name>CCStdIncludePath</name>\r
           <state>$TOOLKIT_DIR$\INC\</state>\r
         </option>\r
+        <option>\r
+          <name>CCInlineThreshold</name>\r
+          <version>0</version>\r
+          <state>1</state>\r
+        </option>\r
       </data>\r
     </settings>\r
     <settings>\r
@@ -560,12 +566,12 @@
         <option>\r
           <name>OutputFormat</name>\r
           <version>11</version>\r
-          <state>16</state>\r
+          <state>57</state>\r
         </option>\r
         <option>\r
           <name>FormatVariant</name>\r
-          <version>7</version>\r
-          <state>16</state>\r
+          <version>8</version>\r
+          <state>2</state>\r
         </option>\r
         <option>\r
           <name>SecondaryOutputFile</name>\r
@@ -750,7 +756,7 @@
         </option>\r
         <option>\r
           <name>ExtraFormatVariant</name>\r
-          <version>7</version>\r
+          <version>8</version>\r
           <state>2</state>\r
         </option>\r
         <option>\r
@@ -831,7 +837,7 @@
     </settings>\r
   </configuration>\r
   <configuration>\r
-    <name>ARM</name>\r
+    <name>ARM - uIP - D</name>\r
     <toolchain>\r
       <name>ARM</name>\r
     </toolchain>\r
@@ -849,15 +855,15 @@
         </option>\r
         <option>\r
           <name>ExePath</name>\r
-          <state>ARM\Exe</state>\r
+          <state>ARM - uIP - D\Exe</state>\r
         </option>\r
         <option>\r
           <name>ObjPath</name>\r
-          <state>ARM\Obj</state>\r
+          <state>ARM - uIP - D\Obj</state>\r
         </option>\r
         <option>\r
           <name>ListPath</name>\r
-          <state>ARM\List</state>\r
+          <state>ARM - uIP - D\List</state>\r
         </option>\r
         <option>\r
           <name>Variant</name>\r
@@ -923,11 +929,11 @@
         </option>\r
         <option>\r
           <name>RTConfigPath</name>\r
-          <state>$TOOLKIT_DIR$\LIB\dl5tptinl8n.h</state>\r
+          <state>$TOOLKIT_DIR$\LIB\dl5tpainl8n.h</state>\r
         </option>\r
         <option>\r
           <name>RTLibraryPath</name>\r
-          <state>$TOOLKIT_DIR$\LIB\dl5tptinl8n.r79</state>\r
+          <state>$TOOLKIT_DIR$\LIB\dl5tpainl8n.r79</state>\r
         </option>\r
         <option>\r
           <name>OGProductVersion</name>\r
@@ -935,7 +941,7 @@
         </option>\r
         <option>\r
           <name>OGLastSavedByProductVersion</name>\r
-          <state>4.40A</state>\r
+          <state>4.42A</state>\r
         </option>\r
         <option>\r
           <name>GeneralMisraRules</name>\r
@@ -960,7 +966,7 @@
       <name>ICCARM</name>\r
       <archiveVersion>2</archiveVersion>\r
       <data>\r
-        <version>13</version>\r
+        <version>14</version>\r
         <wantNonLocal>1</wantNonLocal>\r
         <debug>1</debug>\r
         <option>\r
@@ -968,6 +974,9 @@
           <state>STR91X_IAR</state>\r
           <state>DEBUG</state>\r
           <state>_RUN_TASK_IN_ARM_MODE_</state>\r
+          <state>PACK_STRUCT_END=</state>\r
+          <state>ALIGN_STRUCT_END=</state>\r
+          <state>STACK_UIP</state>\r
         </option>\r
         <option>\r
           <name>CCPreprocFile</name>\r
@@ -1007,7 +1016,7 @@
         </option>\r
         <option>\r
           <name>CCDiagSuppress</name>\r
-          <state>pe191,pa082, pe144, pe550, pe513, pe167, pe177</state>\r
+          <state>pe191,pa082, pe144, pe550, pe513, pe167, pe177, pa039</state>\r
         </option>\r
         <option>\r
           <name>CCDiagRemark</name>\r
@@ -1027,17 +1036,17 @@
         </option>\r
         <option>\r
           <name>CCOptSizeSpeed</name>\r
-          <state>1</state>\r
+          <state>0</state>\r
         </option>\r
         <option>\r
           <name>CCOptimization</name>\r
           <version>0</version>\r
-          <state>2</state>\r
+          <state>0</state>\r
         </option>\r
         <option>\r
           <name>CCAllowList</name>\r
           <version>1</version>\r
-          <state>1001000</state>\r
+          <state>0000000</state>\r
         </option>\r
         <option>\r
           <name>CCObjUseModuleName</name>\r
@@ -1121,12 +1130,12 @@
         </option>\r
         <option>\r
           <name>CCOptSizeSpeedSlave</name>\r
-          <state>1</state>\r
+          <state>0</state>\r
         </option>\r
         <option>\r
           <name>CCOptimizationSlave</name>\r
           <version>0</version>\r
-          <state>2</state>\r
+          <state>0</state>\r
         </option>\r
         <option>\r
           <name>CCCodeFunctions</name>\r
@@ -1179,6 +1188,11 @@
           <name>CCStdIncludePath</name>\r
           <state>$TOOLKIT_DIR$\INC\</state>\r
         </option>\r
+        <option>\r
+          <name>CCInlineThreshold</name>\r
+          <version>0</version>\r
+          <state>1</state>\r
+        </option>\r
       </data>\r
     </settings>\r
     <settings>\r
@@ -1236,6 +1250,7 @@
         <option>\r
           <name>ADefines</name>\r
           <state>__REMAP_PREEMPTIVE_TICK_FUNC_</state>\r
+          <state>STACK_UIP</state>\r
         </option>\r
         <option>\r
           <name>AList</name>\r
@@ -1390,8 +1405,8 @@
         </option>\r
         <option>\r
           <name>FormatVariant</name>\r
-          <version>7</version>\r
-          <state>16</state>\r
+          <version>8</version>\r
+          <state>17</state>\r
         </option>\r
         <option>\r
           <name>SecondaryOutputFile</name>\r
@@ -1576,7 +1591,7 @@
         </option>\r
         <option>\r
           <name>ExtraFormatVariant</name>\r
-          <version>7</version>\r
+          <version>8</version>\r
           <state>2</state>\r
         </option>\r
         <option>\r
@@ -1656,230 +1671,3213 @@
       <data/>\r
     </settings>\r
   </configuration>\r
-  <group>\r
-    <name>Demo Source</name>\r
-    <file>\r
-      <name>$PROJ_DIR$\..\Common\Minimal\BlockQ.c</name>\r
-    </file>\r
-    <file>\r
-      <name>$PROJ_DIR$\..\Common\Minimal\comtest.c</name>\r
-    </file>\r
-    <file>\r
-      <name>$PROJ_DIR$\..\Common\Minimal\dynamic.c</name>\r
-    </file>\r
-    <file>\r
-      <name>$PROJ_DIR$\..\Common\Minimal\flash.c</name>\r
-    </file>\r
-    <file>\r
-      <name>$PROJ_DIR$\..\Common\Minimal\flop.c</name>\r
-    </file>\r
-    <file>\r
-      <name>$PROJ_DIR$\..\..\Source\portable\MemMang\heap_2.c</name>\r
-    </file>\r
-    <file>\r
-      <name>$PROJ_DIR$\..\Common\Minimal\integer.c</name>\r
-    </file>\r
-    <file>\r
-      <name>$PROJ_DIR$\STCode\lcd.c</name>\r
-    </file>\r
-    <file>\r
-      <name>$PROJ_DIR$\main.c</name>\r
-    </file>\r
-    <file>\r
-      <name>$PROJ_DIR$\ParTest\ParTest.c</name>\r
-    </file>\r
-    <file>\r
-      <name>$PROJ_DIR$\..\Common\Minimal\PollQ.c</name>\r
-    </file>\r
-    <file>\r
-      <name>$PROJ_DIR$\..\Common\Minimal\semtest.c</name>\r
-    </file>\r
-    <file>\r
-      <name>$PROJ_DIR$\serial\serial.c</name>\r
-    </file>\r
-    <file>\r
-      <name>$PROJ_DIR$\webserver\uIP_Task.c</name>\r
-    </file>\r
-  </group>\r
-  <group>\r
-    <name>Library Source</name>\r
-    <file>\r
-      <name>$PROJ_DIR$\Library\include\91x_conf.h</name>\r
-    </file>\r
-    <file>\r
-      <name>$PROJ_DIR$\Library\source\91x_enet.c</name>\r
-      <configuration>\r
-        <name>THUMB</name>\r
-        <settings>\r
-          <name>ICCARM</name>\r
-          <data>\r
-            <version>13</version>\r
-            <wantNonLocal>1</wantNonLocal>\r
-            <debug>1</debug>\r
-            <option>\r
-              <name>CCDefines</name>\r
-              <state>STR91X_IAR</state>\r
-              <state>DEBUG</state>\r
-              <state>__REMAP_PREEMPTIVE_TICK_FUNC_</state>\r
-              <state>__REMAP_IRQ_HANDLER</state>\r
-              <state>__REMAP_EMAC_INTERRUPT</state>\r
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-            <option>\r
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-            <option>\r
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-            <option>\r
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-            <option>\r
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-            <option>\r
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-            <option>\r
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-            <option>\r
-              <name>CCLibConfigHeader</name>\r
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-            </option>\r
-            <option>\r
-              <name>CCOptSizeSpeedSlave</name>\r
-              <state>1</state>\r
-            </option>\r
-            <option>\r
+  <configuration>\r
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+    <toolchain>\r
+      <name>ARM</name>\r
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+          <state>ARM - lwIP - D\List</state>\r
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+        <option>\r
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+          <version>1</version>\r
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+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing.</state>\r
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+          <version>0</version>\r
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+          <state>No specifier a, A, no specifier n, no float nor long long.</state>\r
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+          <name>GOutputBinary</name>\r
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+        <option>\r
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+        <option>\r
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+        <option>\r
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+        <option>\r
+          <name>GRuntimeLibSelectSlave</name>\r
+          <version>0</version>\r
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+        </option>\r
+        <option>\r
+          <name>RTDescription</name>\r
+          <state>Use the normal configuration of the C/C++ runtime library. No locale interface, C locale, no file descriptor support, no multibytes in printf and scanf, and no hex floats in strtod.</state>\r
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+        <option>\r
+          <name>GeneralMisraVerbose</name>\r
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+        <option>\r
+          <name>OGChipSelectEditMenu</name>\r
+          <state>STR912        ST STR912</state>\r
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+          <state>_RUN_TASK_IN_ARM_MODE_</state>\r
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+        <option>\r
+          <name>CCPreprocFile</name>\r
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+        <option>\r
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+          <state>1</state>\r
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+          <name>CCOptSizeSpeed</name>\r
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+          <version>1</version>\r
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+        <option>\r
+          <name>CCObjUseModuleName</name>\r
+          <state>0</state>\r
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+        <option>\r
+          <name>CCObjModuleName</name>\r
+          <state></state>\r
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+        <option>\r
+          <name>IExtraOptions</name>\r
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+          <state>1</state>\r
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+          <state>$FILE_BNAME$.r79</state>\r
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+        <option>\r
+          <name>CCLangSelect</name>\r
+          <state>0</state>\r
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+        <option>\r
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+          <state>1</state>\r
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+        <option>\r
+          <name>CCOptSizeSpeedSlave</name>\r
+          <state>0</state>\r
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+        <option>\r
+          <name>CCOptimizationSlave</name>\r
+          <version>0</version>\r
+          <state>0</state>\r
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+        <option>\r
+          <name>CCCodeFunctions</name>\r
+          <state>CODE</state>\r
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+        <option>\r
+          <name>CCData</name>\r
+          <state>DATA</state>\r
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+        <option>\r
+          <name>PreInclude</name>\r
+          <state></state>\r
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+          <state>0</state>\r
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+        <option>\r
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+          <state>0</state>\r
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+          <state>$PROJ_DIR$\</state>\r
+          <state>$PROJ_DIR$\library\include\</state>\r
+          <state>$PROJ_DIR$\..\common\include</state>\r
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+          <state>$PROJ_DIR$\lwip\include\lwIPWebServer</state>\r
+          <state>$PROJ_DIR$\lwip\include</state>\r
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+        <option>\r
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+          <state>0</state>\r
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+        <option>\r
+          <name>CCStdIncludePath</name>\r
+          <state>$TOOLKIT_DIR$\INC\</state>\r
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+          <version>0</version>\r
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+        <version>18</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>1</debug>\r
+        <option>\r
+          <name>XOutOverride</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>OutputFile</name>\r
+          <state>RTOSDemo.d79</state>\r
+        </option>\r
+        <option>\r
+          <name>OutputFormat</name>\r
+          <version>11</version>\r
+          <state>16</state>\r
+        </option>\r
+        <option>\r
+          <name>FormatVariant</name>\r
+          <version>8</version>\r
+          <state>17</state>\r
+        </option>\r
+        <option>\r
+          <name>SecondaryOutputFile</name>\r
+          <state>(None for the selected format)</state>\r
+        </option>\r
+        <option>\r
+          <name>XDefines</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>AlwaysOutput</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>OverlapWarnings</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>NoGlobalCheck</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>XList</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>SegmentMap</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>ListSymbols</name>\r
+          <state>2</state>\r
+        </option>\r
+        <option>\r
+          <name>PageLengthCheck</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>PageLength</name>\r
+          <state>80</state>\r
+        </option>\r
+        <option>\r
+          <name>XIncludes</name>\r
+          <state>$TOOLKIT_DIR$\LIB\</state>\r
+        </option>\r
+        <option>\r
+          <name>ModuleStatus</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>XclOverride</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>XclFile</name>\r
+          <state>$PROJ_DIR$\lnkarm_flash.xcl</state>\r
+        </option>\r
+        <option>\r
+          <name>XclFileSlave</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>DoFill</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>FillerByte</name>\r
+          <state>0xFF</state>\r
+        </option>\r
+        <option>\r
+          <name>DoCrc</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CrcSize</name>\r
+          <version>0</version>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>CrcAlgo</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>CrcPoly</name>\r
+          <state>0x11021</state>\r
+        </option>\r
+        <option>\r
+          <name>CrcCompl</name>\r
+          <version>0</version>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>RangeCheckAlternatives</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>SuppressAllWarn</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>SuppressDiags</name>\r
+          <state>w6</state>\r
+        </option>\r
+        <option>\r
+          <name>TreatAsWarn</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>TreatAsErr</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>ModuleLocalSym</name>\r
+          <version>0</version>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CrcBitOrder</name>\r
+          <version>0</version>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>XExtraOptionsCheck</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>XExtraOptions</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>IncludeSuppressed</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>OXLibIOConfig</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>ModuleSummary</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>xcProgramEntryLabel</name>\r
+          <state>__program_start</state>\r
+        </option>\r
+        <option>\r
+          <name>DebugInformation</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>RuntimeControl</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>IoEmulation</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>XcRTLibraryFile</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>AllowExtraOutput</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>GenerateExtraOutput</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>XExtraOutOverride</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>ExtraOutputFile</name>\r
+          <state>RTOSDemo.sim</state>\r
+        </option>\r
+        <option>\r
+          <name>ExtraOutputFormat</name>\r
+          <version>11</version>\r
+          <state>60</state>\r
+        </option>\r
+        <option>\r
+          <name>ExtraFormatVariant</name>\r
+          <version>8</version>\r
+          <state>2</state>\r
+        </option>\r
+        <option>\r
+          <name>xcOverrideProgramEntryLabel</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>xcProgramEntryLabelSelect</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>ListOutputFormat</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>BufferedTermOutput</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>OverlaySystemMap</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>RawBinaryFile</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>RawBinarySymbol</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>RawBinarySegment</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>RawBinaryAlign</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>XLinkMisraHandler</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CrcAlign</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>CrcInitialValue</name>\r
+          <state>0x0</state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>XAR</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>0</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>1</debug>\r
+        <option>\r
+          <name>XARInputs</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>XAROverride</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>XAROutput</name>\r
+          <state>###Unitialized###</state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>BILINK</name>\r
+      <archiveVersion>0</archiveVersion>\r
+      <data/>\r
+    </settings>\r
+  </configuration>\r
+  <configuration>\r
+    <name>ARM - lwIP - R</name>\r
+    <toolchain>\r
+      <name>ARM</name>\r
+    </toolchain>\r
+    <debug>0</debug>\r
+    <settings>\r
+      <name>General</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>9</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>0</debug>\r
+        <option>\r
+          <name>GProcessorMode</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>ExePath</name>\r
+          <state>ARM - lwIP - R\Exe</state>\r
+        </option>\r
+        <option>\r
+          <name>ObjPath</name>\r
+          <state>ARM - lwIP - R\Obj</state>\r
+        </option>\r
+        <option>\r
+          <name>ListPath</name>\r
+          <state>ARM - lwIP - R\List</state>\r
+        </option>\r
+        <option>\r
+          <name>Variant</name>\r
+          <version>5</version>\r
+          <state>13</state>\r
+        </option>\r
+        <option>\r
+          <name>GEndianMode</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>GInterwork</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>GStackAlign</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>Input variant</name>\r
+          <version>1</version>\r
+          <state>3</state>\r
+        </option>\r
+        <option>\r
+          <name>Input description</name>\r
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing.</state>\r
+        </option>\r
+        <option>\r
+          <name>Output variant</name>\r
+          <version>0</version>\r
+          <state>2</state>\r
+        </option>\r
+        <option>\r
+          <name>Output description</name>\r
+          <state>No specifier a, A, no specifier n, no float nor long long.</state>\r
+        </option>\r
+        <option>\r
+          <name>GOutputBinary</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>FPU</name>\r
+          <version>0</version>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>OGCoreOrChip</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>GRuntimeLibSelect</name>\r
+          <version>0</version>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>GRuntimeLibSelectSlave</name>\r
+          <version>0</version>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>RTDescription</name>\r
+          <state>Use the normal configuration of the C/C++ runtime library. No locale interface, C locale, no file descriptor support, no multibytes in printf and scanf, and no hex floats in strtod.</state>\r
+        </option>\r
+        <option>\r
+          <name>RTConfigPath</name>\r
+          <state>$TOOLKIT_DIR$\LIB\dl5tpainl8n.h</state>\r
+        </option>\r
+        <option>\r
+          <name>RTLibraryPath</name>\r
+          <state>$TOOLKIT_DIR$\LIB\dl5tpainl8n.r79</state>\r
+        </option>\r
+        <option>\r
+          <name>OGProductVersion</name>\r
+          <state>4.20A</state>\r
+        </option>\r
+        <option>\r
+          <name>OGLastSavedByProductVersion</name>\r
+          <state>4.42A</state>\r
+        </option>\r
+        <option>\r
+          <name>GeneralMisraRules</name>\r
+          <version>0</version>\r
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>\r
+        </option>\r
+        <option>\r
+          <name>GeneralEnableMisra</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>GeneralMisraVerbose</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>OGChipSelectEditMenu</name>\r
+          <state>STR912        ST STR912</state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>ICCARM</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>14</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>0</debug>\r
+        <option>\r
+          <name>CCDefines</name>\r
+          <state>STR91X_IAR</state>\r
+          <state>_RUN_TASK_IN_ARM_MODE_</state>\r
+          <state>STACK_LWIP</state>\r
+        </option>\r
+        <option>\r
+          <name>CCPreprocFile</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCPreprocComments</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCPreprocLine</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCListCFile</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCListCMnemonics</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCListCMessages</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCListAssFile</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCListAssSource</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCEnableRemarks</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCDiagSuppress</name>\r
+          <state>pe191,pa082, pe144, pe550, pe513, pe167, pe177</state>\r
+        </option>\r
+        <option>\r
+          <name>CCDiagRemark</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>CCDiagWarning</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>CCDiagError</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>CCObjPrefix</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>CCOptSizeSpeed</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>CCOptimization</name>\r
+          <version>0</version>\r
+          <state>2</state>\r
+        </option>\r
+        <option>\r
+          <name>CCAllowList</name>\r
+          <version>1</version>\r
+          <state>1001000</state>\r
+        </option>\r
+        <option>\r
+          <name>CCObjUseModuleName</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCObjModuleName</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>CCDebugInfo</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>IProcessorMode</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>IEndianMode</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>IProcessor</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>IStackAlign</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>IInterwork</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>IExtraOptionsCheck</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>IExtraOptions</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>CCLangConformance</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCSignedPlainChar</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRequirePrototypes</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCMultibyteSupport</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCDiagWarnAreErr</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCCompilerRuntimeInfo</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>IFpuProcessor</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>OutputFile</name>\r
+          <state>$FILE_BNAME$.r79</state>\r
+        </option>\r
+        <option>\r
+          <name>CCLangSelect</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCLibConfigHeader</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>CCOptSizeSpeedSlave</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>CCOptimizationSlave</name>\r
+          <version>0</version>\r
+          <state>2</state>\r
+        </option>\r
+        <option>\r
+          <name>CCCodeFunctions</name>\r
+          <state>CODE</state>\r
+        </option>\r
+        <option>\r
+          <name>CCData</name>\r
+          <state>DATA</state>\r
+        </option>\r
+        <option>\r
+          <name>PreInclude</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>CompilerMisraRules</name>\r
+          <version>0</version>\r
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>\r
+        </option>\r
+        <option>\r
+          <name>CompilerMisraOverride</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCModuleTypeOverride</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCModuleType</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCModuleTypeCmdlineProducer</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCIncludePath2</name>\r
+          <state>$PROJ_DIR$\</state>\r
+          <state>$PROJ_DIR$\library\include\</state>\r
+          <state>$PROJ_DIR$\..\common\include</state>\r
+          <state>$PROJ_DIR$\..\..\source\include</state>\r
+          <state>$PROJ_DIR$\STCode</state>\r
+          <state>$PROJ_DIR$\..\common\ethernet\lwip\include</state>\r
+          <state>$PROJ_DIR$\..\common\ethernet\lwip\include\ipv4</state>\r
+          <state>$PROJ_DIR$\..\common\ethernet\lwip\include\lwip</state>\r
+          <state>$PROJ_DIR$\..\common\ethernet\lwip\include\netif</state>\r
+          <state>$PROJ_DIR$\..\common\ethernet\lwip\include\ipv4\lwip</state>\r
+          <state>$PROJ_DIR$\lwip\include\lwIPWebServer</state>\r
+          <state>$PROJ_DIR$\lwip\include</state>\r
+        </option>\r
+        <option>\r
+          <name>CCStdIncCheck</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCStdIncludePath</name>\r
+          <state>$TOOLKIT_DIR$\INC\</state>\r
+        </option>\r
+        <option>\r
+          <name>CCInlineThreshold</name>\r
+          <version>0</version>\r
+          <state>1</state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>AARM</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>7</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>0</debug>\r
+        <option>\r
+          <name>AObjPrefix</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>AEndian</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>ACaseSensitivity</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>MacroChars</name>\r
+          <version>0</version>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>AWarnEnable</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>AWarnWhat</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>AWarnOne</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>AWarnRange1</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>AWarnRange2</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>ADebug</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>AltRegisterNames</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>ADefines</name>\r
+          <state>STACK_LWIP</state>\r
+        </option>\r
+        <option>\r
+          <name>AList</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>AListHeader</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>AListing</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>Includes</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>MacDefs</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>MacExps</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>MacExec</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>OnlyAssed</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>MultiLine</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>PageLengthCheck</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>PageLength</name>\r
+          <state>80</state>\r
+        </option>\r
+        <option>\r
+          <name>TabSpacing</name>\r
+          <state>8</state>\r
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+        <option>\r
+          <name>AXRef</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>AXRefDefines</name>\r
+          <state>0</state>\r
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+        <option>\r
+          <name>AXRefInternal</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>AXRefDual</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>AProcessor</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>AFpuProcessor</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>AOutputFile</name>\r
+          <state>$FILE_BNAME$.r79</state>\r
+        </option>\r
+        <option>\r
+          <name>AMultibyteSupport</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>ALimitErrorsCheck</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>ALimitErrorsEdit</name>\r
+          <state>100</state>\r
+        </option>\r
+        <option>\r
+          <name>AIgnoreStdInclude</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>AStdIncludes</name>\r
+          <state>$TOOLKIT_DIR$\INC\</state>\r
+        </option>\r
+        <option>\r
+          <name>AUserIncludes</name>\r
+          <state>$PROJ_DIR$\..\..\Source\portable\IAR\STR91x</state>\r
+        </option>\r
+        <option>\r
+          <name>AExtraOptionsCheckV2</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>AExtraOptionsV2</name>\r
+          <state></state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>CUSTOM</name>\r
+      <archiveVersion>3</archiveVersion>\r
+      <data>\r
+        <extensions></extensions>\r
+        <cmdline></cmdline>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>BICOMP</name>\r
+      <archiveVersion>0</archiveVersion>\r
+      <data/>\r
+    </settings>\r
+    <settings>\r
+      <name>BUILDACTION</name>\r
+      <archiveVersion>1</archiveVersion>\r
+      <data>\r
+        <prebuild></prebuild>\r
+        <postbuild></postbuild>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>XLINK</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>18</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>0</debug>\r
+        <option>\r
+          <name>XOutOverride</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>OutputFile</name>\r
+          <state>RTOSDemo.d79</state>\r
+        </option>\r
+        <option>\r
+          <name>OutputFormat</name>\r
+          <version>11</version>\r
+          <state>16</state>\r
+        </option>\r
+        <option>\r
+          <name>FormatVariant</name>\r
+          <version>8</version>\r
+          <state>17</state>\r
+        </option>\r
+        <option>\r
+          <name>SecondaryOutputFile</name>\r
+          <state>(None for the selected format)</state>\r
+        </option>\r
+        <option>\r
+          <name>XDefines</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>AlwaysOutput</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>OverlapWarnings</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>NoGlobalCheck</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>XList</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>SegmentMap</name>\r
+          <state>1</state>\r
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+        <option>\r
+          <name>ListSymbols</name>\r
+          <state>2</state>\r
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+        <option>\r
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+          <state>0</state>\r
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+        <option>\r
+          <name>PageLength</name>\r
+          <state>80</state>\r
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+        <option>\r
+          <name>XIncludes</name>\r
+          <state>$TOOLKIT_DIR$\LIB\</state>\r
+        </option>\r
+        <option>\r
+          <name>ModuleStatus</name>\r
+          <state>0</state>\r
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+        <option>\r
+          <name>XclOverride</name>\r
+          <state>1</state>\r
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+        <option>\r
+          <name>XclFile</name>\r
+          <state>$PROJ_DIR$\lnkarm_flash.xcl</state>\r
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+        <option>\r
+          <name>XclFileSlave</name>\r
+          <state></state>\r
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+        <option>\r
+          <name>DoFill</name>\r
+          <state>0</state>\r
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+        <option>\r
+          <name>FillerByte</name>\r
+          <state>0xFF</state>\r
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+        <option>\r
+          <name>DoCrc</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CrcSize</name>\r
+          <version>0</version>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>CrcAlgo</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>CrcPoly</name>\r
+          <state>0x11021</state>\r
+        </option>\r
+        <option>\r
+          <name>CrcCompl</name>\r
+          <version>0</version>\r
+          <state>0</state>\r
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+        <option>\r
+          <name>RangeCheckAlternatives</name>\r
+          <state>0</state>\r
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+        <option>\r
+          <name>SuppressAllWarn</name>\r
+          <state>0</state>\r
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+        <option>\r
+          <name>SuppressDiags</name>\r
+          <state>w6</state>\r
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+        <option>\r
+          <name>TreatAsWarn</name>\r
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+          <name>TreatAsErr</name>\r
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+        <option>\r
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+          <name>CrcBitOrder</name>\r
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+          <name>XExtraOptionsCheck</name>\r
+          <state>0</state>\r
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+        <option>\r
+          <name>XExtraOptions</name>\r
+          <state></state>\r
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+        <option>\r
+          <name>IncludeSuppressed</name>\r
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+          <state>1</state>\r
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+        <option>\r
+          <name>xcProgramEntryLabel</name>\r
+          <state>__program_start</state>\r
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+          <name>DebugInformation</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>RuntimeControl</name>\r
+          <state>1</state>\r
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+        <option>\r
+          <name>IoEmulation</name>\r
+          <state>1</state>\r
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+        <option>\r
+          <name>XcRTLibraryFile</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>AllowExtraOutput</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>GenerateExtraOutput</name>\r
+          <state>1</state>\r
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+        <option>\r
+          <name>XExtraOutOverride</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>ExtraOutputFile</name>\r
+          <state>RTOSDemo.sim</state>\r
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+        <option>\r
+          <name>ExtraOutputFormat</name>\r
+          <version>11</version>\r
+          <state>60</state>\r
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+        <option>\r
+          <name>ExtraFormatVariant</name>\r
+          <version>8</version>\r
+          <state>2</state>\r
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+        <option>\r
+          <name>xcOverrideProgramEntryLabel</name>\r
+          <state>0</state>\r
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+        <option>\r
+          <name>xcProgramEntryLabelSelect</name>\r
+          <state>0</state>\r
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+        <option>\r
+          <name>ListOutputFormat</name>\r
+          <state>1</state>\r
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+        <option>\r
+          <name>BufferedTermOutput</name>\r
+          <state>0</state>\r
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+        <option>\r
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+          <state>0</state>\r
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+          <state></state>\r
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+        <option>\r
+          <name>XLinkMisraHandler</name>\r
+          <state>0</state>\r
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+        <option>\r
+          <name>CrcAlign</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>CrcInitialValue</name>\r
+          <state>0x0</state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>XAR</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>0</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>0</debug>\r
+        <option>\r
+          <name>XARInputs</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>XAROverride</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>XAROutput</name>\r
+          <state>###Unitialized###</state>\r
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+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>BILINK</name>\r
+      <archiveVersion>0</archiveVersion>\r
+      <data/>\r
+    </settings>\r
+  </configuration>\r
+  <configuration>\r
+    <name>ARM - uIP - R</name>\r
+    <toolchain>\r
+      <name>ARM</name>\r
+    </toolchain>\r
+    <debug>0</debug>\r
+    <settings>\r
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+      <archiveVersion>2</archiveVersion>\r
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+        <version>9</version>\r
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+        <debug>0</debug>\r
+        <option>\r
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+          <state>0</state>\r
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+        <option>\r
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+        <option>\r
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+          <state>ARM - uIP - R\Obj</state>\r
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+        <option>\r
+          <name>ListPath</name>\r
+          <state>ARM - uIP - R\List</state>\r
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+        <option>\r
+          <name>Variant</name>\r
+          <version>5</version>\r
+          <state>13</state>\r
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+        <option>\r
+          <name>GEndianMode</name>\r
+          <state>0</state>\r
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+        <option>\r
+          <name>GInterwork</name>\r
+          <state>1</state>\r
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+        <option>\r
+          <name>GStackAlign</name>\r
+          <state>0</state>\r
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+        <option>\r
+          <name>Input variant</name>\r
+          <version>1</version>\r
+          <state>3</state>\r
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+        <option>\r
+          <name>Input description</name>\r
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing.</state>\r
+        </option>\r
+        <option>\r
+          <name>Output variant</name>\r
+          <version>0</version>\r
+          <state>2</state>\r
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+        <option>\r
+          <name>Output description</name>\r
+          <state>No specifier a, A, no specifier n, no float nor long long.</state>\r
+        </option>\r
+        <option>\r
+          <name>GOutputBinary</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>FPU</name>\r
+          <version>0</version>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>OGCoreOrChip</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>GRuntimeLibSelect</name>\r
+          <version>0</version>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>GRuntimeLibSelectSlave</name>\r
+          <version>0</version>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>RTDescription</name>\r
+          <state>Use the normal configuration of the C/C++ runtime library. No locale interface, C locale, no file descriptor support, no multibytes in printf and scanf, and no hex floats in strtod.</state>\r
+        </option>\r
+        <option>\r
+          <name>RTConfigPath</name>\r
+          <state>$TOOLKIT_DIR$\LIB\dl5tpainl8n.h</state>\r
+        </option>\r
+        <option>\r
+          <name>RTLibraryPath</name>\r
+          <state>$TOOLKIT_DIR$\LIB\dl5tpainl8n.r79</state>\r
+        </option>\r
+        <option>\r
+          <name>OGProductVersion</name>\r
+          <state>4.20A</state>\r
+        </option>\r
+        <option>\r
+          <name>OGLastSavedByProductVersion</name>\r
+          <state>4.42A</state>\r
+        </option>\r
+        <option>\r
+          <name>GeneralMisraRules</name>\r
+          <version>0</version>\r
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>\r
+        </option>\r
+        <option>\r
+          <name>GeneralEnableMisra</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>GeneralMisraVerbose</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>OGChipSelectEditMenu</name>\r
+          <state>STR912        ST STR912</state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>ICCARM</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>14</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>0</debug>\r
+        <option>\r
+          <name>CCDefines</name>\r
+          <state>STR91X_IAR</state>\r
+          <state>_RUN_TASK_IN_ARM_MODE_</state>\r
+          <state>PACK_STRUCT_END=</state>\r
+          <state>ALIGN_STRUCT_END=</state>\r
+          <state>STACK_UIP</state>\r
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+          <state>0</state>\r
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+        <option>\r
+          <name>CCPreprocComments</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCPreprocLine</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCListCFile</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCListCMnemonics</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCListCMessages</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCListAssFile</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCListAssSource</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCEnableRemarks</name>\r
+          <state>0</state>\r
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+        <option>\r
+          <name>CCDiagSuppress</name>\r
+          <state>pe191,pa082, pe144, pe550, pe513, pe167, pe177, pa039</state>\r
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+        <option>\r
+          <name>CCDiagRemark</name>\r
+          <state></state>\r
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+        <option>\r
+          <name>CCDiagWarning</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>CCDiagError</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>CCObjPrefix</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>CCOptSizeSpeed</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>CCOptimization</name>\r
+          <version>0</version>\r
+          <state>2</state>\r
+        </option>\r
+        <option>\r
+          <name>CCAllowList</name>\r
+          <version>1</version>\r
+          <state>1001000</state>\r
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+        <option>\r
+          <name>CCObjUseModuleName</name>\r
+          <state>0</state>\r
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+        <option>\r
+          <name>CCObjModuleName</name>\r
+          <state></state>\r
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+        <option>\r
+          <name>CCDebugInfo</name>\r
+          <state>1</state>\r
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+        <option>\r
+          <name>IProcessorMode</name>\r
+          <state>1</state>\r
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+        <option>\r
+          <name>IEndianMode</name>\r
+          <state>1</state>\r
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+        <option>\r
+          <name>IProcessor</name>\r
+          <state>1</state>\r
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+        <option>\r
+          <name>IStackAlign</name>\r
+          <state>1</state>\r
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+        <option>\r
+          <name>IInterwork</name>\r
+          <state>1</state>\r
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+        <option>\r
+          <name>IExtraOptionsCheck</name>\r
+          <state>0</state>\r
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+        <option>\r
+          <name>IExtraOptions</name>\r
+          <state></state>\r
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+        <option>\r
+          <name>CCLangConformance</name>\r
+          <state>0</state>\r
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+        <option>\r
+          <name>CCSignedPlainChar</name>\r
+          <state>1</state>\r
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+        <option>\r
+          <name>CCRequirePrototypes</name>\r
+          <state>0</state>\r
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+        <option>\r
+          <name>CCMultibyteSupport</name>\r
+          <state>0</state>\r
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+        <option>\r
+          <name>CCDiagWarnAreErr</name>\r
+          <state>0</state>\r
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+        <option>\r
+          <name>CCCompilerRuntimeInfo</name>\r
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+          <name>CCCodeFunctions</name>\r
+          <state>CODE</state>\r
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+        <option>\r
+          <name>CCData</name>\r
+          <state>DATA</state>\r
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+        <option>\r
+          <name>CCModuleTypeOverride</name>\r
+          <state>0</state>\r
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+        <option>\r
+          <name>CCModuleType</name>\r
+          <state>0</state>\r
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+        <option>\r
+          <name>CCModuleTypeCmdlineProducer</name>\r
+          <state>0</state>\r
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+        <option>\r
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+              <state>1</state>\r
+            </option>\r
+            <option>\r
+              <name>CCCodeFunctions</name>\r
+              <state>CODE</state>\r
+            </option>\r
+            <option>\r
+              <name>CCData</name>\r
+              <state>DATA</state>\r
+            </option>\r
+            <option>\r
+              <name>PreInclude</name>\r
+              <state></state>\r
+            </option>\r
+            <option>\r
+              <name>CompilerMisraRules</name>\r
+              <version>0</version>\r
+              <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>\r
+            </option>\r
+            <option>\r
+              <name>CompilerMisraOverride</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCModuleTypeOverride</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCModuleType</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCModuleTypeCmdlineProducer</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCIncludePath2</name>\r
+              <state>$PROJ_DIR$\</state>\r
+              <state>$PROJ_DIR$\library\include\</state>\r
+              <state>$PROJ_DIR$\..\common\include</state>\r
+              <state>$PROJ_DIR$\..\..\source\include</state>\r
+              <state>$PROJ_DIR$\STCode</state>\r
+              <state>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip</state>\r
+              <state>$PROJ_DIR$\webserver</state>\r
+            </option>\r
+            <option>\r
+              <name>CCStdIncCheck</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCStdIncludePath</name>\r
+              <state>$TOOLKIT_DIR$\INC\</state>\r
+            </option>\r
+            <option>\r
+              <name>CCInlineThreshold</name>\r
+              <version>0</version>\r
+              <state>1</state>\r
+            </option>\r
+          </data>\r
+        </settings>\r
+      </configuration>\r
+      <configuration>\r
+        <name>ARM - uIP - D</name>\r
+        <settings>\r
+          <name>ICCARM</name>\r
+          <data>\r
+            <version>14</version>\r
+            <wantNonLocal>1</wantNonLocal>\r
+            <debug>1</debug>\r
+            <option>\r
+              <name>CCDefines</name>\r
+              <state>STR91X_IAR</state>\r
+              <state>DEBUG</state>\r
+              <state>__REMAP_PREEMPTIVE_TICK_FUNC_</state>\r
+              <state>__REMAP_IRQ_HANDLER</state>\r
+              <state>__REMAP_EMAC_INTERRUPT</state>\r
+              <state>NOT__RUN_TASK_IN_ARM_MODE_</state>\r
+            </option>\r
+            <option>\r
+              <name>CCPreprocFile</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCPreprocComments</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCPreprocLine</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCListCFile</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCListCMnemonics</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCListCMessages</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCListAssFile</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCListAssSource</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCEnableRemarks</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCDiagSuppress</name>\r
+              <state>pe191,pa082, pe144, pe550, pe513, pe167</state>\r
+            </option>\r
+            <option>\r
+              <name>CCDiagRemark</name>\r
+              <state></state>\r
+            </option>\r
+            <option>\r
+              <name>CCDiagWarning</name>\r
+              <state></state>\r
+            </option>\r
+            <option>\r
+              <name>CCDiagError</name>\r
+              <state></state>\r
+            </option>\r
+            <option>\r
+              <name>CCObjPrefix</name>\r
+              <state>1</state>\r
+            </option>\r
+            <option>\r
+              <name>CCOptSizeSpeed</name>\r
+              <state>1</state>\r
+            </option>\r
+            <option>\r
+              <name>CCOptimization</name>\r
+              <version>0</version>\r
+              <state>1</state>\r
+            </option>\r
+            <option>\r
+              <name>CCAllowList</name>\r
+              <version>1</version>\r
+              <state>0000000</state>\r
+            </option>\r
+            <option>\r
+              <name>CCObjUseModuleName</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCObjModuleName</name>\r
+              <state></state>\r
+            </option>\r
+            <option>\r
+              <name>CCDebugInfo</name>\r
+              <state>1</state>\r
+            </option>\r
+            <option>\r
+              <name>IProcessorMode</name>\r
+              <state>1</state>\r
+            </option>\r
+            <option>\r
+              <name>IEndianMode</name>\r
+              <state>1</state>\r
+            </option>\r
+            <option>\r
+              <name>IProcessor</name>\r
+              <state>1</state>\r
+            </option>\r
+            <option>\r
+              <name>IStackAlign</name>\r
+              <state>1</state>\r
+            </option>\r
+            <option>\r
+              <name>IInterwork</name>\r
+              <state>1</state>\r
+            </option>\r
+            <option>\r
+              <name>IExtraOptionsCheck</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>IExtraOptions</name>\r
+              <state></state>\r
+            </option>\r
+            <option>\r
+              <name>CCLangConformance</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCSignedPlainChar</name>\r
+              <state>1</state>\r
+            </option>\r
+            <option>\r
+              <name>CCRequirePrototypes</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCMultibyteSupport</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCDiagWarnAreErr</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCCompilerRuntimeInfo</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>IFpuProcessor</name>\r
+              <state>1</state>\r
+            </option>\r
+            <option>\r
+              <name>OutputFile</name>\r
+              <state>$FILE_BNAME$.r79</state>\r
+            </option>\r
+            <option>\r
+              <name>CCLangSelect</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCLibConfigHeader</name>\r
+              <state>1</state>\r
+            </option>\r
+            <option>\r
+              <name>CCOptSizeSpeedSlave</name>\r
+              <state>1</state>\r
+            </option>\r
+            <option>\r
+              <name>CCOptimizationSlave</name>\r
+              <version>0</version>\r
+              <state>1</state>\r
+            </option>\r
+            <option>\r
+              <name>CCCodeFunctions</name>\r
+              <state>CODE</state>\r
+            </option>\r
+            <option>\r
+              <name>CCData</name>\r
+              <state>DATA</state>\r
+            </option>\r
+            <option>\r
+              <name>PreInclude</name>\r
+              <state></state>\r
+            </option>\r
+            <option>\r
+              <name>CompilerMisraRules</name>\r
+              <version>0</version>\r
+              <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>\r
+            </option>\r
+            <option>\r
+              <name>CompilerMisraOverride</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCModuleTypeOverride</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCModuleType</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCModuleTypeCmdlineProducer</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCIncludePath2</name>\r
+              <state>$PROJ_DIR$\</state>\r
+              <state>$PROJ_DIR$\library\include\</state>\r
+              <state>$PROJ_DIR$\..\common\include</state>\r
+              <state>$PROJ_DIR$\..\..\source\include</state>\r
+              <state>$PROJ_DIR$\STCode</state>\r
+              <state>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip</state>\r
+              <state>$PROJ_DIR$\webserver</state>\r
+            </option>\r
+            <option>\r
+              <name>CCStdIncCheck</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCStdIncludePath</name>\r
+              <state>$TOOLKIT_DIR$\INC\</state>\r
+            </option>\r
+            <option>\r
+              <name>CCInlineThreshold</name>\r
+              <version>0</version>\r
+              <state>1</state>\r
+            </option>\r
+          </data>\r
+        </settings>\r
+      </configuration>\r
+      <configuration>\r
+        <name>ARM - lwIP - D</name>\r
+        <settings>\r
+          <name>ICCARM</name>\r
+          <data>\r
+            <version>14</version>\r
+            <wantNonLocal>0</wantNonLocal>\r
+            <debug>1</debug>\r
+            <option>\r
+              <name>CCDefines</name>\r
+              <state>STR91X_IAR</state>\r
+              <state>DEBUG</state>\r
+              <state>_RUN_TASK_IN_ARM_MODE_</state>\r
+              <state>STACK_LWIP</state>\r
+            </option>\r
+            <option>\r
+              <name>CCPreprocFile</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCPreprocComments</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCPreprocLine</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCListCFile</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCListCMnemonics</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCListCMessages</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCListAssFile</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCListAssSource</name>\r
+              <state>1</state>\r
+            </option>\r
+            <option>\r
+              <name>CCEnableRemarks</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCDiagSuppress</name>\r
+              <state>pe191,pa082, pe144, pe550, pe513, pe167</state>\r
+            </option>\r
+            <option>\r
+              <name>CCDiagRemark</name>\r
+              <state></state>\r
+            </option>\r
+            <option>\r
+              <name>CCDiagWarning</name>\r
+              <state></state>\r
+            </option>\r
+            <option>\r
+              <name>CCDiagError</name>\r
+              <state></state>\r
+            </option>\r
+            <option>\r
+              <name>CCObjPrefix</name>\r
+              <state>1</state>\r
+            </option>\r
+            <option>\r
+              <name>CCOptSizeSpeed</name>\r
+              <state>1</state>\r
+            </option>\r
+            <option>\r
+              <name>CCOptimization</name>\r
+              <version>0</version>\r
+              <state>1</state>\r
+            </option>\r
+            <option>\r
+              <name>CCAllowList</name>\r
+              <version>1</version>\r
+              <state>0000000</state>\r
+            </option>\r
+            <option>\r
+              <name>CCObjUseModuleName</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCObjModuleName</name>\r
+              <state></state>\r
+            </option>\r
+            <option>\r
+              <name>CCDebugInfo</name>\r
+              <state>1</state>\r
+            </option>\r
+            <option>\r
+              <name>IProcessorMode</name>\r
+              <state>1</state>\r
+            </option>\r
+            <option>\r
+              <name>IEndianMode</name>\r
+              <state>1</state>\r
+            </option>\r
+            <option>\r
+              <name>IProcessor</name>\r
+              <state>1</state>\r
+            </option>\r
+            <option>\r
+              <name>IStackAlign</name>\r
+              <state>1</state>\r
+            </option>\r
+            <option>\r
+              <name>IInterwork</name>\r
+              <state>1</state>\r
+            </option>\r
+            <option>\r
+              <name>IExtraOptionsCheck</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>IExtraOptions</name>\r
+              <state></state>\r
+            </option>\r
+            <option>\r
+              <name>CCLangConformance</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCSignedPlainChar</name>\r
+              <state>1</state>\r
+            </option>\r
+            <option>\r
+              <name>CCRequirePrototypes</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCMultibyteSupport</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCDiagWarnAreErr</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCCompilerRuntimeInfo</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>IFpuProcessor</name>\r
+              <state>1</state>\r
+            </option>\r
+            <option>\r
+              <name>OutputFile</name>\r
+              <state>$FILE_BNAME$.r79</state>\r
+            </option>\r
+            <option>\r
+              <name>CCLangSelect</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCLibConfigHeader</name>\r
+              <state>1</state>\r
+            </option>\r
+            <option>\r
+              <name>CCOptSizeSpeedSlave</name>\r
+              <state>1</state>\r
+            </option>\r
+            <option>\r
               <name>CCOptimizationSlave</name>\r
               <version>0</version>\r
               <state>1</state>\r
@@ -1924,8 +4922,13 @@
               <state>$PROJ_DIR$\..\common\include</state>\r
               <state>$PROJ_DIR$\..\..\source\include</state>\r
               <state>$PROJ_DIR$\STCode</state>\r
-              <state>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip</state>\r
-              <state>$PROJ_DIR$\webserver</state>\r
+              <state>$PROJ_DIR$\..\common\ethernet\lwip\include</state>\r
+              <state>$PROJ_DIR$\..\common\ethernet\lwip\include\ipv4</state>\r
+              <state>$PROJ_DIR$\..\common\ethernet\lwip\include\lwip</state>\r
+              <state>$PROJ_DIR$\..\common\ethernet\lwip\include\netif</state>\r
+              <state>$PROJ_DIR$\..\common\ethernet\lwip\include\ipv4\lwip</state>\r
+              <state>$PROJ_DIR$\lwip\include\lwIPWebServer</state>\r
+              <state>$PROJ_DIR$\lwip\include</state>\r
             </option>\r
             <option>\r
               <name>CCStdIncCheck</name>\r
@@ -1935,25 +4938,263 @@
               <name>CCStdIncludePath</name>\r
               <state>$TOOLKIT_DIR$\INC\</state>\r
             </option>\r
+            <option>\r
+              <name>CCInlineThreshold</name>\r
+              <version>0</version>\r
+              <state>1</state>\r
+            </option>\r
           </data>\r
         </settings>\r
       </configuration>\r
       <configuration>\r
-        <name>ARM</name>\r
+        <name>ARM - lwIP - R</name>\r
         <settings>\r
           <name>ICCARM</name>\r
           <data>\r
-            <version>13</version>\r
+            <version>14</version>\r
             <wantNonLocal>1</wantNonLocal>\r
-            <debug>1</debug>\r
+            <debug>0</debug>\r
             <option>\r
               <name>CCDefines</name>\r
               <state>STR91X_IAR</state>\r
-              <state>DEBUG</state>\r
-              <state>__REMAP_PREEMPTIVE_TICK_FUNC_</state>\r
-              <state>__REMAP_IRQ_HANDLER</state>\r
-              <state>__REMAP_EMAC_INTERRUPT</state>\r
-              <state>NOT__RUN_TASK_IN_ARM_MODE_</state>\r
+              <state>_RUN_TASK_IN_ARM_MODE_</state>\r
+              <state>STACK_LWIP</state>\r
+            </option>\r
+            <option>\r
+              <name>CCPreprocFile</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCPreprocComments</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCPreprocLine</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCListCFile</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCListCMnemonics</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCListCMessages</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCListAssFile</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCListAssSource</name>\r
+              <state>1</state>\r
+            </option>\r
+            <option>\r
+              <name>CCEnableRemarks</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCDiagSuppress</name>\r
+              <state>pe191,pa082, pe144, pe550, pe513, pe167</state>\r
+            </option>\r
+            <option>\r
+              <name>CCDiagRemark</name>\r
+              <state></state>\r
+            </option>\r
+            <option>\r
+              <name>CCDiagWarning</name>\r
+              <state></state>\r
+            </option>\r
+            <option>\r
+              <name>CCDiagError</name>\r
+              <state></state>\r
+            </option>\r
+            <option>\r
+              <name>CCObjPrefix</name>\r
+              <state>1</state>\r
+            </option>\r
+            <option>\r
+              <name>CCOptSizeSpeed</name>\r
+              <state>1</state>\r
+            </option>\r
+            <option>\r
+              <name>CCOptimization</name>\r
+              <version>0</version>\r
+              <state>1</state>\r
+            </option>\r
+            <option>\r
+              <name>CCAllowList</name>\r
+              <version>1</version>\r
+              <state>0000000</state>\r
+            </option>\r
+            <option>\r
+              <name>CCObjUseModuleName</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCObjModuleName</name>\r
+              <state></state>\r
+            </option>\r
+            <option>\r
+              <name>CCDebugInfo</name>\r
+              <state>1</state>\r
+            </option>\r
+            <option>\r
+              <name>IProcessorMode</name>\r
+              <state>1</state>\r
+            </option>\r
+            <option>\r
+              <name>IEndianMode</name>\r
+              <state>1</state>\r
+            </option>\r
+            <option>\r
+              <name>IProcessor</name>\r
+              <state>1</state>\r
+            </option>\r
+            <option>\r
+              <name>IStackAlign</name>\r
+              <state>1</state>\r
+            </option>\r
+            <option>\r
+              <name>IInterwork</name>\r
+              <state>1</state>\r
+            </option>\r
+            <option>\r
+              <name>IExtraOptionsCheck</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>IExtraOptions</name>\r
+              <state></state>\r
+            </option>\r
+            <option>\r
+              <name>CCLangConformance</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCSignedPlainChar</name>\r
+              <state>1</state>\r
+            </option>\r
+            <option>\r
+              <name>CCRequirePrototypes</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCMultibyteSupport</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCDiagWarnAreErr</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCCompilerRuntimeInfo</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>IFpuProcessor</name>\r
+              <state>1</state>\r
+            </option>\r
+            <option>\r
+              <name>OutputFile</name>\r
+              <state>$FILE_BNAME$.r79</state>\r
+            </option>\r
+            <option>\r
+              <name>CCLangSelect</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCLibConfigHeader</name>\r
+              <state>1</state>\r
+            </option>\r
+            <option>\r
+              <name>CCOptSizeSpeedSlave</name>\r
+              <state>1</state>\r
+            </option>\r
+            <option>\r
+              <name>CCOptimizationSlave</name>\r
+              <version>0</version>\r
+              <state>1</state>\r
+            </option>\r
+            <option>\r
+              <name>CCCodeFunctions</name>\r
+              <state>CODE</state>\r
+            </option>\r
+            <option>\r
+              <name>CCData</name>\r
+              <state>DATA</state>\r
+            </option>\r
+            <option>\r
+              <name>PreInclude</name>\r
+              <state></state>\r
+            </option>\r
+            <option>\r
+              <name>CompilerMisraRules</name>\r
+              <version>0</version>\r
+              <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>\r
+            </option>\r
+            <option>\r
+              <name>CompilerMisraOverride</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCModuleTypeOverride</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCModuleType</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCModuleTypeCmdlineProducer</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCIncludePath2</name>\r
+              <state>$PROJ_DIR$\</state>\r
+              <state>$PROJ_DIR$\library\include\</state>\r
+              <state>$PROJ_DIR$\..\common\include</state>\r
+              <state>$PROJ_DIR$\..\..\source\include</state>\r
+              <state>$PROJ_DIR$\STCode</state>\r
+              <state>$PROJ_DIR$\..\common\ethernet\lwip\include</state>\r
+              <state>$PROJ_DIR$\..\common\ethernet\lwip\include\ipv4</state>\r
+              <state>$PROJ_DIR$\..\common\ethernet\lwip\include\lwip</state>\r
+              <state>$PROJ_DIR$\..\common\ethernet\lwip\include\netif</state>\r
+              <state>$PROJ_DIR$\..\common\ethernet\lwip\include\ipv4\lwip</state>\r
+              <state>$PROJ_DIR$\lwip\include\lwIPWebServer</state>\r
+              <state>$PROJ_DIR$\lwip\include</state>\r
+            </option>\r
+            <option>\r
+              <name>CCStdIncCheck</name>\r
+              <state>0</state>\r
+            </option>\r
+            <option>\r
+              <name>CCStdIncludePath</name>\r
+              <state>$TOOLKIT_DIR$\INC\</state>\r
+            </option>\r
+            <option>\r
+              <name>CCInlineThreshold</name>\r
+              <version>0</version>\r
+              <state>1</state>\r
+            </option>\r
+          </data>\r
+        </settings>\r
+      </configuration>\r
+      <configuration>\r
+        <name>ARM - uIP - R</name>\r
+        <settings>\r
+          <name>ICCARM</name>\r
+          <data>\r
+            <version>14</version>\r
+            <wantNonLocal>1</wantNonLocal>\r
+            <debug>0</debug>\r
+            <option>\r
+              <name>CCDefines</name>\r
+              <state>STR91X_IAR</state>\r
+              <state>__RUN_TASK_IN_ARM_MODE_</state>\r
             </option>\r
             <option>\r
               <name>CCPreprocFile</name>\r
@@ -2165,6 +5406,11 @@
               <name>CCStdIncludePath</name>\r
               <state>$TOOLKIT_DIR$\INC\</state>\r
             </option>\r
+            <option>\r
+              <name>CCInlineThreshold</name>\r
+              <version>0</version>\r
+              <state>1</state>\r
+            </option>\r
           </data>\r
         </settings>\r
       </configuration>\r
@@ -2184,6 +5430,9 @@
     <file>\r
       <name>$PROJ_DIR$\Library\source\91x_scu.c</name>\r
     </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\Library\source\91x_tim.c</name>\r
+    </file>\r
     <file>\r
       <name>$PROJ_DIR$\Library\source\91x_uart.c</name>\r
     </file>\r
@@ -2194,6 +5443,134 @@
       <name>$PROJ_DIR$\Library\source\91x_wdg.c</name>\r
     </file>\r
   </group>\r
+  <group>\r
+    <name>lwIP</name>\r
+    <excluded>\r
+      <configuration>THUMB</configuration>\r
+      <configuration>ARM - uIP - D</configuration>\r
+      <configuration>ARM - uIP - R</configuration>\r
+    </excluded>\r
+    <group>\r
+      <name>api</name>\r
+      <file>\r
+        <name>$PROJ_DIR$\..\Common\ethernet\lwIP\api\api_lib.c</name>\r
+      </file>\r
+      <file>\r
+        <name>$PROJ_DIR$\..\Common\ethernet\lwIP\api\api_msg.c</name>\r
+      </file>\r
+      <file>\r
+        <name>$PROJ_DIR$\..\Common\ethernet\lwIP\api\err.c</name>\r
+      </file>\r
+      <file>\r
+        <name>$PROJ_DIR$\..\Common\ethernet\lwIP\api\sockets.c</name>\r
+      </file>\r
+      <file>\r
+        <name>$PROJ_DIR$\lwip\api\sys_arch.c</name>\r
+      </file>\r
+      <file>\r
+        <name>$PROJ_DIR$\..\Common\ethernet\lwIP\api\tcpip.c</name>\r
+      </file>\r
+    </group>\r
+    <group>\r
+      <name>core</name>\r
+      <file>\r
+        <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\dhcp.c</name>\r
+      </file>\r
+      <file>\r
+        <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\inet.c</name>\r
+      </file>\r
+      <file>\r
+        <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\mem.c</name>\r
+      </file>\r
+      <file>\r
+        <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\memp.c</name>\r
+      </file>\r
+      <file>\r
+        <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\netif.c</name>\r
+      </file>\r
+      <file>\r
+        <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\pbuf.c</name>\r
+      </file>\r
+      <file>\r
+        <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\raw.c</name>\r
+      </file>\r
+      <file>\r
+        <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\stats.c</name>\r
+      </file>\r
+      <file>\r
+        <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\sys.c</name>\r
+      </file>\r
+      <file>\r
+        <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\tcp.c</name>\r
+      </file>\r
+      <file>\r
+        <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\tcp_in.c</name>\r
+      </file>\r
+      <file>\r
+        <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\tcp_out.c</name>\r
+      </file>\r
+      <file>\r
+        <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\udp.c</name>\r
+      </file>\r
+    </group>\r
+    <group>\r
+      <name>ipv4</name>\r
+      <file>\r
+        <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\ipv4\icmp.c</name>\r
+      </file>\r
+      <file>\r
+        <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\ipv4\ip.c</name>\r
+      </file>\r
+      <file>\r
+        <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\ipv4\ip_addr.c</name>\r
+      </file>\r
+      <file>\r
+        <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\ipv4\ip_frag.c</name>\r
+      </file>\r
+    </group>\r
+    <group>\r
+      <name>netif</name>\r
+      <file>\r
+        <name>$PROJ_DIR$\..\Common\ethernet\lwIP\netif\etharp.c</name>\r
+      </file>\r
+      <file>\r
+        <name>$PROJ_DIR$\lwip\netif\ethernetif.c</name>\r
+      </file>\r
+    </group>\r
+    <group>\r
+      <name>snmp</name>\r
+      <file>\r
+        <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\snmp\asn1_dec.c</name>\r
+      </file>\r
+      <file>\r
+        <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\snmp\asn1_enc.c</name>\r
+      </file>\r
+      <file>\r
+        <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\snmp\mib2.c</name>\r
+      </file>\r
+      <file>\r
+        <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\snmp\mib_structs.c</name>\r
+      </file>\r
+      <file>\r
+        <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\snmp\msg_in.c</name>\r
+      </file>\r
+      <file>\r
+        <name>$PROJ_DIR$\..\Common\ethernet\lwIP\core\snmp\msg_out.c</name>\r
+      </file>\r
+    </group>\r
+    <group>\r
+      <name>WebServer</name>\r
+      <file>\r
+        <name>$PROJ_DIR$\lwip\lwipWebServer\BasicWEB.c</name>\r
+      </file>\r
+      <file>\r
+        <name>$PROJ_DIR$\lwip\lwipWebServer\fs.c</name>\r
+      </file>\r
+      <file>\r
+        <name>$PROJ_DIR$\lwip\lwipWebServer\httpd.c</name>\r
+      </file>\r
+    </group>\r
+  </group>\r
   <group>\r
     <name>RTOS Source</name>\r
     <file>\r
@@ -2232,6 +5609,10 @@
   </group>\r
   <group>\r
     <name>uIP</name>\r
+    <excluded>\r
+      <configuration>ARM - lwIP - D</configuration>\r
+      <configuration>ARM - lwIP - R</configuration>\r
+    </excluded>\r
     <file>\r
       <name>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\apps\webserver\http-strings.c</name>\r
     </file>\r

diff --git a/Demo/ARM9_STR91X_IAR/STCode/lcd.c b/Demo/ARM9_STR91X_IAR/STCode/lcd.c
index 1d13b790fceb3c03f5a4c0f532572bef7579712f..f2f77736fa0bd1a7d6e566d5f9f27b9904d884dc 100644 (file)
--- a/Demo/ARM9_STR91X_IAR/STCode/lcd.c
+++ b/Demo/ARM9_STR91X_IAR/STCode/lcd.c
@@ -272,7 +272,7 @@ void LCD_CheckMasterStatus(void)
   /* Wait until BF is cleared */\r
   while ((MasterStatus & 0x80))\r
   {\r
-       vTaskDelay( 2 );  \r
+       vTaskDelay( 1 );\r
     LCD_CtrlLinesWrite(GPIO9, CtrlPin_E1, Bit_SET);   /* E1 = 1 */\r
     MasterStatus = GPIO_Read(GPIO8);\r
     LCD_CtrlLinesWrite(GPIO9, CtrlPin_E1, Bit_RESET); /* E1 = 0 */\r
@@ -303,7 +303,7 @@ void LCD_CheckSlaveStatus(void)
   /* Wait until BF is cleared */\r
   while ((SlaveStatus & 0x80))\r
   {\r
-       vTaskDelay( 2 );  \r
+       vTaskDelay( 1 );\r
     LCD_CtrlLinesWrite(GPIO9, CtrlPin_E2, Bit_SET);   /* E2 = 1 */\r
     SlaveStatus = GPIO_Read(GPIO8);\r
     LCD_CtrlLinesWrite(GPIO9, CtrlPin_E2, Bit_RESET); /* E2 = 0 */\r
@@ -812,7 +812,7 @@ void LCD_DisplayChar(u8 Line, u8 Column, u8 Ascii, TextColorMode_TypeDef CharMod
          }\r
          else\r
          {\r
-        DotBuffer[i] = ~AsciiDotsTable[Ascii*14+i+1];    \r
+        DotBuffer[i] = ~AsciiDotsTable[Ascii*14+i+1];  \r
          }\r
     }\r
     /* Character displayed as black Text on white buttom  */\r
@@ -820,11 +820,11 @@ void LCD_DisplayChar(u8 Line, u8 Column, u8 Ascii, TextColorMode_TypeDef CharMod
     {\r
          if( ( u8 ) i & 0x01 )\r
       {\r
-        DotBuffer[i] = AsciiDotsTable[Ascii*14+i-1];             \r
+        DotBuffer[i] = AsciiDotsTable[Ascii*14+i-1];           \r
       }\r
       else\r
       {\r
-        DotBuffer[i] = AsciiDotsTable[Ascii*14+i+1];                             \r
+        DotBuffer[i] = AsciiDotsTable[Ascii*14+i+1];                           \r
       }\r
     }\r
   }\r
@@ -903,24 +903,9 @@ void LCD_DisplayString(u8 Line, u8 *ptr, TextColorMode_TypeDef CharMode)
   /* Send the string character by character on lCD */\r
   while ((*ptr!=0)&(i<17))\r
   {\r
-       if( *ptr == ' ' )\r
-       {\r
-               if( ptr[1] == ' ')\r
-               {\r
-                       vTaskDelay( 3 );\r
-               }\r
-               else\r
-               {\r
-                       vTaskDelay( 16 );\r
-               }\r
-       }\r
+       vTaskDelay( 1 );\r
        \r
-       if( *ptr == '.' )\r
-       {\r
-               vTaskDelay( 16 );\r
-       }\r
-  \r
-  /* Display one character on LCD */\r
+       /* Display one character on LCD */\r
     LCD_DisplayChar(Line, RefColumn, *ptr, CharMode);\r
 \r
     /* Increment the column position by 7 */\r

diff --git a/Demo/ARM9_STR91X_IAR/lwip/api/sys_arch.c b/Demo/ARM9_STR91X_IAR/lwip/api/sys_arch.c
new file mode 100644 (file)
index 0000000..7bac5be
--- /dev/null
+++ b/Demo/ARM9_STR91X_IAR/lwip/api/sys_arch.c
@@ -0,0 +1,391 @@
+/*\r
+ * Copyright (c) 2001-2003 Swedish Institute of Computer Science.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without modification,\r
+ * are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ *    this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ *    this list of conditions and the following disclaimer in the documentation\r
+ *    and/or other materials provided with the distribution.\r
+ * 3. The name of the author may not be used to endorse or promote products\r
+ *    derived from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT\r
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,\r
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT\r
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\r
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\r
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING\r
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY\r
+ * OF SUCH DAMAGE.\r
+ *\r
+ * This file is part of the lwIP TCP/IP stack.\r
+ *\r
+ * Author: Adam Dunkels <adam@sics.se>\r
+ *\r
+ */\r
+\r
+/* lwIP includes. */\r
+#include "lwip/debug.h"\r
+#include "lwip/def.h"\r
+#include "lwip/sys.h"\r
+#include "lwip/mem.h"\r
+\r
+#include <stdio.h>\r
+\r
+/* Message queue constants. */\r
+#define archMESG_QUEUE_LENGTH  ( 6 )\r
+#define archPOST_BLOCK_TIME_MS ( ( unsigned portLONG ) 10000 )\r
+\r
+struct timeoutlist\r
+{\r
+       struct sys_timeouts timeouts;\r
+       xTaskHandle pid;\r
+};\r
+\r
+/* This is the number of threads that can be started with sys_thread_new() */\r
+#define SYS_THREAD_MAX 4\r
+\r
+static struct timeoutlist timeoutlist[SYS_THREAD_MAX];\r
+static u16_t nextthread = 0;\r
+int intlevel = 0;\r
+\r
+static sys_arch_state_t s_sys_arch_state;\r
+\r
+/*-----------------------------------------------------------------------------------*/\r
+//  Creates an empty mailbox.\r
+sys_mbox_t\r
+sys_mbox_new(void)\r
+{\r
+       xQueueHandle mbox;\r
+\r
+       mbox = xQueueCreate( archMESG_QUEUE_LENGTH, sizeof( void * ) );\r
+\r
+       return mbox;\r
+}\r
+\r
+/*-----------------------------------------------------------------------------------*/\r
+/*\r
+  Deallocates a mailbox. If there are messages still present in the\r
+  mailbox when the mailbox is deallocated, it is an indication of a\r
+  programming error in lwIP and the developer should be notified.\r
+*/\r
+void\r
+sys_mbox_free(sys_mbox_t mbox)\r
+{\r
+       if( uxQueueMessagesWaiting( mbox ) )\r
+       {\r
+               /* Line for breakpoint.  Should never break here! */\r
+//             __asm volatile ( "NOP" );\r
+       }\r
+\r
+       vQueueDelete( mbox );\r
+}\r
+\r
+/*-----------------------------------------------------------------------------------*/\r
+//   Posts the "msg" to the mailbox.\r
+void\r
+sys_mbox_post(sys_mbox_t mbox, void *data)\r
+{\r
+       xQueueSend( mbox, &data, ( portTickType ) ( archPOST_BLOCK_TIME_MS / portTICK_RATE_MS ) );\r
+}\r
+\r
+\r
+/*-----------------------------------------------------------------------------------*/\r
+/*\r
+  Blocks the thread until a message arrives in the mailbox, but does\r
+  not block the thread longer than "timeout" milliseconds (similar to\r
+  the sys_arch_sem_wait() function). The "msg" argument is a result\r
+  parameter that is set by the function (i.e., by doing "*msg =\r
+  ptr"). The "msg" parameter maybe NULL to indicate that the message\r
+  should be dropped.\r
+\r
+  The return values are the same as for the sys_arch_sem_wait() function:\r
+  Number of milliseconds spent waiting or SYS_ARCH_TIMEOUT if there was a\r
+  timeout.\r
+\r
+  Note that a function with a similar name, sys_mbox_fetch(), is\r
+  implemented by lwIP.\r
+*/\r
+u32_t sys_arch_mbox_fetch(sys_mbox_t mbox, void **msg, u32_t timeout)\r
+{\r
+void *dummyptr;\r
+portTickType StartTime, EndTime, Elapsed;\r
+\r
+       StartTime = xTaskGetTickCount();\r
+\r
+       if( msg == NULL )\r
+       {\r
+               msg = &dummyptr;\r
+       }\r
+               \r
+       if(     timeout != 0 )\r
+       {\r
+               if(pdTRUE == xQueueReceive( mbox, &(*msg), timeout ) )\r
+               {\r
+                       EndTime = xTaskGetTickCount();\r
+                       Elapsed = EndTime - StartTime;\r
+                       if( Elapsed == 0 )\r
+                       {\r
+                               Elapsed = 1;\r
+                       }\r
+                       return ( Elapsed );\r
+               }\r
+               else // timed out blocking for message\r
+               {\r
+                       *msg = NULL;\r
+                       return SYS_ARCH_TIMEOUT;\r
+               }\r
+       }\r
+       else // block forever for a message.\r
+       {\r
+               while( pdTRUE != xQueueReceive( mbox, &(*msg), 10000 ) ) // time is arbitrary\r
+               {\r
+                       ;\r
+               }\r
+               EndTime = xTaskGetTickCount();\r
+               Elapsed = EndTime - StartTime;\r
+               if( Elapsed == 0 )\r
+               {\r
+                       Elapsed = 1;\r
+               }\r
+               return ( Elapsed ); // return time blocked TBD test     \r
+       }\r
+}\r
+\r
+/*-----------------------------------------------------------------------------------*/\r
+//  Creates and returns a new semaphore. The "count" argument specifies\r
+//  the initial state of the semaphore. TBD finish and test\r
+sys_sem_t\r
+sys_sem_new(u8_t count)\r
+{\r
+       xSemaphoreHandle  xSemaphore;\r
+\r
+       portENTER_CRITICAL();\r
+       vSemaphoreCreateBinary( xSemaphore );\r
+       if(count == 0)  // Means it can't be taken\r
+       {\r
+               xSemaphoreTake(xSemaphore,1);\r
+       }\r
+       portEXIT_CRITICAL();\r
+\r
+       if( xSemaphore == NULL )\r
+       {\r
+               return NULL;    // TBD need assert\r
+       }\r
+       else\r
+       {\r
+               return xSemaphore;\r
+       }\r
+}\r
+\r
+/*-----------------------------------------------------------------------------------*/\r
+/*\r
+  Blocks the thread while waiting for the semaphore to be\r
+  signaled. If the "timeout" argument is non-zero, the thread should\r
+  only be blocked for the specified time (measured in\r
+  milliseconds).\r
+\r
+  If the timeout argument is non-zero, the return value is the number of\r
+  milliseconds spent waiting for the semaphore to be signaled. If the\r
+  semaphore wasn't signaled within the specified time, the return value is\r
+  SYS_ARCH_TIMEOUT. If the thread didn't have to wait for the semaphore\r
+  (i.e., it was already signaled), the function may return zero.\r
+\r
+  Notice that lwIP implements a function with a similar name,\r
+  sys_sem_wait(), that uses the sys_arch_sem_wait() function.\r
+*/\r
+u32_t\r
+sys_arch_sem_wait(sys_sem_t sem, u32_t timeout)\r
+{\r
+portTickType StartTime, EndTime, Elapsed;\r
+\r
+       StartTime = xTaskGetTickCount();\r
+\r
+       if(     timeout != 0)\r
+       {\r
+               if( xSemaphoreTake( sem, timeout ) == pdTRUE )\r
+               {\r
+                       EndTime = xTaskGetTickCount();\r
+                       Elapsed = EndTime - StartTime;\r
+                       if( Elapsed == 0 )\r
+                       {\r
+                               Elapsed = 1;\r
+                       }\r
+                       return (Elapsed); // return time blocked TBD test       \r
+               }\r
+               else\r
+               {\r
+                       return SYS_ARCH_TIMEOUT;\r
+               }\r
+       }\r
+       else // must block without a timeout\r
+       {\r
+               while( xSemaphoreTake( sem, 10000 ) != pdTRUE )\r
+               {\r
+                       ;\r
+               }\r
+               EndTime = xTaskGetTickCount();\r
+               Elapsed = EndTime - StartTime;\r
+               if( Elapsed == 0 )\r
+               {\r
+                       Elapsed = 1;\r
+               }\r
+\r
+               return ( Elapsed ); // return time blocked      \r
+               \r
+       }\r
+}\r
+\r
+/*-----------------------------------------------------------------------------------*/\r
+// Signals a semaphore\r
+void\r
+sys_sem_signal(sys_sem_t sem)\r
+{\r
+       xSemaphoreGive( sem );\r
+}\r
+\r
+/*-----------------------------------------------------------------------------------*/\r
+// Deallocates a semaphore\r
+void\r
+sys_sem_free(sys_sem_t sem)\r
+{\r
+       vQueueDelete( sem );\r
+}\r
+\r
+/*-----------------------------------------------------------------------------------*/\r
+// Initialize sys arch\r
+void\r
+sys_init(void)\r
+{\r
+\r
+       int i;\r
+\r
+       // Initialize the the per-thread sys_timeouts structures\r
+       // make sure there are no valid pids in the list\r
+       for(i = 0; i < SYS_THREAD_MAX; i++)\r
+       {\r
+               timeoutlist[i].pid = 0;\r
+       }\r
+\r
+       // keep track of how many threads have been created\r
+       nextthread = 0;\r
+       \r
+       s_sys_arch_state.nTaskCount = 0;\r
+       sys_set_default_state();\r
+}\r
+\r
+/*-----------------------------------------------------------------------------------*/\r
+/*\r
+  Returns a pointer to the per-thread sys_timeouts structure. In lwIP,\r
+  each thread has a list of timeouts which is represented as a linked\r
+  list of sys_timeout structures. The sys_timeouts structure holds a\r
+  pointer to a linked list of timeouts. This function is called by\r
+  the lwIP timeout scheduler and must not return a NULL value.\r
+\r
+  In a single threaded sys_arch implementation, this function will\r
+  simply return a pointer to a global sys_timeouts variable stored in\r
+  the sys_arch module.\r
+*/\r
+struct sys_timeouts *\r
+sys_arch_timeouts(void)\r
+{\r
+int i;\r
+xTaskHandle pid;\r
+struct timeoutlist *tl;\r
+\r
+       pid = xTaskGetCurrentTaskHandle( );\r
+\r
+       for(i = 0; i < nextthread; i++)\r
+       {\r
+               tl = &timeoutlist[i];\r
+               if(tl->pid == pid)\r
+               {\r
+                       return &(tl->timeouts);\r
+               }\r
+       }\r
+\r
+       // Error\r
+       return NULL;\r
+}\r
+\r
+/*-----------------------------------------------------------------------------------*/\r
+/*-----------------------------------------------------------------------------------*/\r
+// TBD\r
+/*-----------------------------------------------------------------------------------*/\r
+/*\r
+  Starts a new thread with priority "prio" that will begin its execution in the\r
+  function "thread()". The "arg" argument will be passed as an argument to the\r
+  thread() function. The id of the new thread is returned. Both the id and\r
+  the priority are system dependent.\r
+*/\r
+sys_thread_t sys_thread_new(void (* thread)(void *arg), void *arg, int prio)\r
+{\r
+xTaskHandle CreatedTask;\r
+int result;\r
+\r
+       result = xTaskCreate(thread, ( signed portCHAR * ) s_sys_arch_state.cTaskName, s_sys_arch_state.nStackDepth, arg, prio, &CreatedTask );\r
+\r
+       // For each task created, store the task handle (pid) in the timers array.\r
+       // This scheme doesn't allow for threads to be deleted\r
+       timeoutlist[nextthread++].pid = CreatedTask;\r
+\r
+       if(result == pdPASS)\r
+       {\r
+               ++s_sys_arch_state.nTaskCount;\r
+               \r
+               return CreatedTask;\r
+       }\r
+       else\r
+       {\r
+               return NULL;\r
+       }\r
+}\r
+\r
+/*\r
+  This optional function does a "fast" critical region protection and returns\r
+  the previous protection level. This function is only called during very short\r
+  critical regions. An embedded system which supports ISR-based drivers might\r
+  want to implement this function by disabling interrupts. Task-based systems\r
+  might want to implement this by using a mutex or disabling tasking. This\r
+  function should support recursive calls from the same task or interrupt. In\r
+  other words, sys_arch_protect() could be called while already protected. In\r
+  that case the return value indicates that it is already protected.\r
+\r
+  sys_arch_protect() is only required if your port is supporting an operating\r
+  system.\r
+*/\r
+sys_prot_t sys_arch_protect(void)\r
+{\r
+       vPortEnterCritical();\r
+       return 1;\r
+}\r
+\r
+/*\r
+  This optional function does a "fast" set of critical region protection to the\r
+  value specified by pval. See the documentation for sys_arch_protect() for\r
+  more information. This function is only required if your port is supporting\r
+  an operating system.\r
+*/\r
+void sys_arch_unprotect(sys_prot_t pval)\r
+{\r
+       ( void ) pval;\r
+       vPortExitCritical();\r
+}\r
+\r
+void sys_set_default_state()\r
+{\r
+       s_sys_arch_state.nStackDepth = configMINIMAL_STACK_SIZE;\r
+       sprintf(s_sys_arch_state.cTaskName, "thread%d", s_sys_arch_state.nTaskCount);\r
+}\r
+\r
+void sys_set_state(signed portCHAR *pTaskName, unsigned portSHORT nStackSize)\r
+{\r
+       s_sys_arch_state.nStackDepth = nStackSize;\r
+       sprintf(s_sys_arch_state.cTaskName, "%s", pTaskName);\r
+}\r

diff --git a/Demo/ARM9_STR91X_IAR/lwip/include/arch/cc.h b/Demo/ARM9_STR91X_IAR/lwip/include/arch/cc.h
new file mode 100644 (file)
index 0000000..1e401b0
--- /dev/null
+++ b/Demo/ARM9_STR91X_IAR/lwip/include/arch/cc.h
@@ -0,0 +1,78 @@
+/*\r
+ * Copyright (c) 2001-2003 Swedish Institute of Computer Science.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without modification,\r
+ * are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ *    this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ *    this list of conditions and the following disclaimer in the documentation\r
+ *    and/or other materials provided with the distribution.\r
+ * 3. The name of the author may not be used to endorse or promote products\r
+ *    derived from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT\r
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,\r
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT\r
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\r
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\r
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING\r
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY\r
+ * OF SUCH DAMAGE.\r
+ *\r
+ * This file is part of the lwIP TCP/IP stack.\r
+ *\r
+ * Author: Adam Dunkels <adam@sics.se>\r
+ * Author: Stefano Oliveri <stefano.oliveri@st.com>\r
+ *\r
+ */\r
+#ifndef __CC_H__\r
+#define __CC_H__\r
+\r
+#include "cpu.h"\r
+\r
+//#define LWIP_PROVIDE_ERRNO 1\r
+#include "lwip_errno.h"\r
+\r
+// Typedefs for the types used by lwip\r
+\r
+typedef unsigned   char    u8_t;\r
+typedef signed     char    s8_t;\r
+typedef unsigned   short   u16_t;\r
+typedef signed     short   s16_t;\r
+typedef unsigned   long    u32_t;\r
+typedef signed     long    s32_t;\r
+typedef u32_t mem_ptr_t;\r
+typedef int sys_prot_t;\r
+\r
+// Compiler hints for packing lwip's structures\r
+\r
+#define PACK_STRUCT_BEGIN\r
+//#define PACK_STRUCT_BEGIN _Pragma("pack(2)")\r
+#define PACK_STRUCT_STRUCT\r
+#define PACK_STRUCT_END\r
+//#define PACK_STRUCT_END _Pragma("pack()")\r
+#define PACK_STRUCT_FIELD(x) x\r
+\r
+// Platform specific diagnostic output\r
+\r
+// non-fatal, print a message.\r
+#define LWIP_PLATFORM_DIAG(x)\r
+// fatal, print message and abandon execution.\r
+#define LWIP_PLATFORM_ASSERT(x)\r
+\r
+// "lightweight" synchronization mechanisms\r
+\r
+// declare a protection state variable.\r
+#define SYS_ARCH_DECL_PROTECT(x)\r
+// enter protection mode.\r
+#define SYS_ARCH_PROTECT(x)\r
+// leave protection mode.\r
+#define SYS_ARCH_UNPROTECT(x)\r
+\r
+\r
+#endif /* __CC_H__ */\r

diff --git a/Demo/ARM9_STR91X_IAR/lwip/include/arch/cpu.h b/Demo/ARM9_STR91X_IAR/lwip/include/arch/cpu.h
new file mode 100644 (file)
index 0000000..2af31a8
--- /dev/null
+++ b/Demo/ARM9_STR91X_IAR/lwip/include/arch/cpu.h
@@ -0,0 +1,37 @@
+/*\r
+ * Copyright (c) 2001-2003 Swedish Institute of Computer Science.\r
+ * All rights reserved. \r
+ * \r
+ * Redistribution and use in source and binary forms, with or without modification, \r
+ * are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ *    this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ *    this list of conditions and the following disclaimer in the documentation\r
+ *    and/or other materials provided with the distribution.\r
+ * 3. The name of the author may not be used to endorse or promote products\r
+ *    derived from this software without specific prior written permission. \r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED \r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF \r
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT \r
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, \r
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT \r
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS \r
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN \r
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING \r
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY \r
+ * OF SUCH DAMAGE.\r
+ *\r
+ * This file is part of the lwIP TCP/IP stack.\r
+ * \r
+ * Author: Adam Dunkels <adam@sics.se>\r
+ *\r
+ */\r
+#ifndef __CPU_H__\r
+#define __CPU_H__\r
+\r
+#define BYTE_ORDER LITTLE_ENDIAN\r
+\r
+#endif /* __CPU_H__ */\r

diff --git a/Demo/ARM9_STR91X_IAR/lwip/include/arch/lwip_errno.h b/Demo/ARM9_STR91X_IAR/lwip/include/arch/lwip_errno.h
new file mode 100644 (file)
index 0000000..bae2407
--- /dev/null
+++ b/Demo/ARM9_STR91X_IAR/lwip/include/arch/lwip_errno.h
@@ -0,0 +1,153 @@
+#ifndef __LWIP_ERRNO_H_\r
+#define __LWIP_ERRNO_H_\r
+\r
+#define  EPERM     1  /* Operation not permitted */\r
+#define  ENOENT     2  /* No such file or directory */\r
+#define  ESRCH     3  /* No such process */\r
+#define  EINTR     4  /* Interrupted system call */\r
+#define  EIO     5  /* I/O error */\r
+#define  ENXIO     6  /* No such device or address */\r
+#define  E2BIG     7  /* Arg list too long */\r
+#define  ENOEXEC     8  /* Exec format error */\r
+#define  EBADF     9  /* Bad file number */\r
+#define  ECHILD    10  /* No child processes */\r
+#define  EAGAIN    11  /* Try again */\r
+#define  ENOMEM    12  /* Out of memory */\r
+#define  EACCES    13  /* Permission denied */\r
+#define  EFAULT    14  /* Bad address */\r
+#define  ENOTBLK    15  /* Block device required */\r
+#define  EBUSY    16  /* Device or resource busy */\r
+#define  EEXIST    17  /* File exists */\r
+#define  EXDEV    18  /* Cross-device link */\r
+#define  ENODEV    19  /* No such device */\r
+#define  ENOTDIR    20  /* Not a directory */\r
+#define  EISDIR    21  /* Is a directory */\r
+#define  EINVAL    22  /* Invalid argument */\r
+#define  ENFILE    23  /* File table overflow */\r
+#define  EMFILE    24  /* Too many open files */\r
+#define  ENOTTY    25  /* Not a typewriter */\r
+#define  ETXTBSY    26  /* Text file busy */\r
+#define  EFBIG    27  /* File too large */\r
+#define  ENOSPC    28  /* No space left on device */\r
+#define  ESPIPE    29  /* Illegal seek */\r
+#define  EROFS    30  /* Read-only file system */\r
+#define  EMLINK    31  /* Too many links */\r
+#define  EPIPE    32  /* Broken pipe */\r
+//#define  EDOM    33  /* Math argument out of domain of func */\r
+//#define  ERANGE    34  /* Math result not representable */\r
+#define  EDEADLK    35  /* Resource deadlock would occur */\r
+#define  ENAMETOOLONG  36  /* File name too long */\r
+#define  ENOLCK    37  /* No record locks available */\r
+#define  ENOSYS    38  /* Function not implemented */\r
+#define  ENOTEMPTY  39  /* Directory not empty */\r
+#define  ELOOP    40  /* Too many symbolic links encountered */\r
+#define  EWOULDBLOCK  EAGAIN  /* Operation would block */\r
+#define  ENOMSG    42  /* No message of desired type */\r
+#define  EIDRM    43  /* Identifier removed */\r
+#define  ECHRNG    44  /* Channel number out of range */\r
+#define  EL2NSYNC  45  /* Level 2 not synchronized */\r
+#define  EL3HLT    46  /* Level 3 halted */\r
+#define  EL3RST    47  /* Level 3 reset */\r
+#define  ELNRNG    48  /* Link number out of range */\r
+#define  EUNATCH    49  /* Protocol driver not attached */\r
+#define  ENOCSI    50  /* No CSI structure available */\r
+#define  EL2HLT    51  /* Level 2 halted */\r
+#define  EBADE    52  /* Invalid exchange */\r
+#define  EBADR    53  /* Invalid request descriptor */\r
+#define  EXFULL    54  /* Exchange full */\r
+#define  ENOANO    55  /* No anode */\r
+#define  EBADRQC    56  /* Invalid request code */\r
+#define  EBADSLT    57  /* Invalid slot */\r
+\r
+#define  EDEADLOCK  EDEADLK\r
+\r
+#define  EBFONT    59  /* Bad font file format */\r
+#define  ENOSTR    60  /* Device not a stream */\r
+#define  ENODATA    61  /* No data available */\r
+#define  ETIME    62  /* Timer expired */\r
+#define  ENOSR    63  /* Out of streams resources */\r
+#define  ENONET    64  /* Machine is not on the network */\r
+#define  ENOPKG    65  /* Package not installed */\r
+#define  EREMOTE    66  /* Object is remote */\r
+#define  ENOLINK    67  /* Link has been severed */\r
+#define  EADV    68  /* Advertise error */\r
+#define  ESRMNT    69  /* Srmount error */\r
+#define  ECOMM    70  /* Communication error on send */\r
+#define  EPROTO    71  /* Protocol error */\r
+#define  EMULTIHOP  72  /* Multihop attempted */\r
+#define  EDOTDOT    73  /* RFS specific error */\r
+#define  EBADMSG    74  /* Not a data message */\r
+#define  EOVERFLOW  75  /* Value too large for defined data type */\r
+#define  ENOTUNIQ  76  /* Name not unique on network */\r
+#define  EBADFD    77  /* File descriptor in bad state */\r
+#define  EREMCHG    78  /* Remote address changed */\r
+#define  ELIBACC    79  /* Can not access a needed shared library */\r
+#define  ELIBBAD    80  /* Accessing a corrupted shared library */\r
+#define  ELIBSCN    81  /* .lib section in a.out corrupted */\r
+#define  ELIBMAX    82  /* Attempting to link in too many shared libraries */\r
+#define  ELIBEXEC  83  /* Cannot exec a shared library directly */\r
+// #define  EILSEQ    84  /* Illegal byte sequence */\r
+#define  ERESTART  85  /* Interrupted system call should be restarted */\r
+#define  ESTRPIPE  86  /* Streams pipe error */\r
+#define  EUSERS    87  /* Too many users */\r
+#define  ENOTSOCK  88  /* Socket operation on non-socket */\r
+#define  EDESTADDRREQ  89  /* Destination address required */\r
+#define  EMSGSIZE  90  /* Message too long */\r
+#define  EPROTOTYPE  91  /* Protocol wrong type for socket */\r
+#define  ENOPROTOOPT  92  /* Protocol not available */\r
+#define  EPROTONOSUPPORT  93  /* Protocol not supported */\r
+#define  ESOCKTNOSUPPORT  94  /* Socket type not supported */\r
+#define  EOPNOTSUPP  95  /* Operation not supported on transport endpoint */\r
+#define  EPFNOSUPPORT  96  /* Protocol family not supported */\r
+#define  EAFNOSUPPORT  97  /* Address family not supported by protocol */\r
+#define  EADDRINUSE  98  /* Address already in use */\r
+#define  EADDRNOTAVAIL  99  /* Cannot assign requested address */\r
+#define  ENETDOWN  100  /* Network is down */\r
+#define  ENETUNREACH  101  /* Network is unreachable */\r
+#define  ENETRESET  102  /* Network dropped connection because of reset */\r
+#define  ECONNABORTED  103  /* Software caused connection abort */\r
+#define  ECONNRESET  104  /* Connection reset by peer */\r
+#define  ENOBUFS    105  /* No buffer space available */\r
+#define  EISCONN    106  /* Transport endpoint is already connected */\r
+#define  ENOTCONN  107  /* Transport endpoint is not connected */\r
+#define  ESHUTDOWN  108  /* Cannot send after transport endpoint shutdown */\r
+#define  ETOOMANYREFS  109  /* Too many references: cannot splice */\r
+#define  ETIMEDOUT  110  /* Connection timed out */\r
+#define  ECONNREFUSED  111  /* Connection refused */\r
+#define  EHOSTDOWN  112  /* Host is down */\r
+#define  EHOSTUNREACH  113  /* No route to host */\r
+#define  EALREADY  114  /* Operation already in progress */\r
+#define  EINPROGRESS  115  /* Operation now in progress */\r
+#define  ESTALE    116  /* Stale NFS file handle */\r
+#define  EUCLEAN    117  /* Structure needs cleaning */\r
+#define  ENOTNAM    118  /* Not a XENIX named type file */\r
+#define  ENAVAIL    119  /* No XENIX semaphores available */\r
+#define  EISNAM    120  /* Is a named type file */\r
+#define  EREMOTEIO  121  /* Remote I/O error */\r
+#define  EDQUOT    122  /* Quota exceeded */\r
+\r
+#define  ENOMEDIUM  123  /* No medium found */\r
+#define  EMEDIUMTYPE  124  /* Wrong medium type */\r
+\r
+\r
+#define        ENSROK          0       /* DNS server returned answer with no data */\r
+#define        ENSRNODATA      160     /* DNS server returned answer with no data */\r
+#define        ENSRFORMERR     161     /* DNS server claims query was misformatted */\r
+#define        ENSRSERVFAIL 162        /* DNS server returned general failure */\r
+#define        ENSRNOTFOUND 163        /* Domain name not found */\r
+#define        ENSRNOTIMP      164     /* DNS server does not implement requested operation */\r
+#define        ENSRREFUSED     165     /* DNS server refused query */\r
+#define        ENSRBADQUERY 166        /* Misformatted DNS query */\r
+#define        ENSRBADNAME     167     /* Misformatted domain name */\r
+#define        ENSRBADFAMILY 168       /* Unsupported address family */\r
+#define        ENSRBADRESP     169     /* Misformatted DNS reply */\r
+#define        ENSRCONNREFUSED 170     /* Could not contact DNS servers */\r
+#define        ENSRTIMEOUT     171     /* Timeout while contacting DNS servers */\r
+#define        ENSROF          172     /* End of file */\r
+#define        ENSRFILE        173     /* Error reading file */\r
+#define        ENSRNOMEM       174     /* Out of memory */\r
+#define        ENSRDESTRUCTION 175     /* Application terminated lookup */\r
+#define        ENSRQUERYDOMAINTOOLONG  176     /* Domain name is too long */\r
+#define        ENSRCNAMELOOP   177     /* Domain name is too long */\r
+\r
+#endif // __LWIP_ERRNO_H_\r

diff --git a/Demo/ARM9_STR91X_IAR/lwip/include/arch/perf.h b/Demo/ARM9_STR91X_IAR/lwip/include/arch/perf.h
new file mode 100644 (file)
index 0000000..68afdb5
--- /dev/null
+++ b/Demo/ARM9_STR91X_IAR/lwip/include/arch/perf.h
@@ -0,0 +1,38 @@
+/*\r
+ * Copyright (c) 2001-2003 Swedish Institute of Computer Science.\r
+ * All rights reserved. \r
+ * \r
+ * Redistribution and use in source and binary forms, with or without modification, \r
+ * are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ *    this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ *    this list of conditions and the following disclaimer in the documentation\r
+ *    and/or other materials provided with the distribution.\r
+ * 3. The name of the author may not be used to endorse or promote products\r
+ *    derived from this software without specific prior written permission. \r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED \r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF \r
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT \r
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, \r
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT \r
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS \r
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN \r
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING \r
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY \r
+ * OF SUCH DAMAGE.\r
+ *\r
+ * This file is part of the lwIP TCP/IP stack.\r
+ * \r
+ * Author: Adam Dunkels <adam@sics.se>\r
+ *\r
+ */\r
+#ifndef __PERF_H__\r
+#define __PERF_H__\r
+\r
+#define PERF_START    /* null definition */\r
+#define PERF_STOP(x)  /* null definition */\r
+\r
+#endif /* __PERF_H__ */\r

diff --git a/Demo/ARM9_STR91X_IAR/lwip/include/arch/sys_arch.h b/Demo/ARM9_STR91X_IAR/lwip/include/arch/sys_arch.h
new file mode 100644 (file)
index 0000000..6320c7f
--- /dev/null
+++ b/Demo/ARM9_STR91X_IAR/lwip/include/arch/sys_arch.h
@@ -0,0 +1,62 @@
+/*\r
+ * Copyright (c) 2001-2003 Swedish Institute of Computer Science.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without modification,\r
+ * are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ *    this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ *    this list of conditions and the following disclaimer in the documentation\r
+ *    and/or other materials provided with the distribution.\r
+ * 3. The name of the author may not be used to endorse or promote products\r
+ *    derived from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT\r
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,\r
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT\r
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\r
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\r
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING\r
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY\r
+ * OF SUCH DAMAGE.\r
+ *\r
+ * This file is part of the lwIP TCP/IP stack.\r
+ *\r
+ * Author: Adam Dunkels <adam@sics.se>\r
+ *\r
+ */\r
+#ifndef __SYS_RTXC_H__\r
+#define __SYS_RTXC_H__\r
+\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+#include "queue.h"\r
+#include "semphr.h"\r
+\r
+#define SYS_MBOX_NULL (xQueueHandle)0\r
+#define SYS_SEM_NULL  (xSemaphoreHandle)0\r
+#define SYS_DEFAULT_THREAD_STACK_DEPTH configMINIMAL_STACK_SIZE\r
+\r
+typedef xSemaphoreHandle sys_sem_t;\r
+typedef xQueueHandle sys_mbox_t;\r
+typedef xTaskHandle sys_thread_t;\r
+\r
+typedef struct _sys_arch_state_t\r
+{\r
+       // Task creation data.\r
+       portCHAR cTaskName[configMAX_TASK_NAME_LEN];\r
+       unsigned portSHORT nStackDepth;\r
+       unsigned short nTaskCount;\r
+} sys_arch_state_t;\r
+\r
+//extern sys_arch_state_t s_sys_arch_state;\r
+\r
+void sys_set_default_state();\r
+void sys_set_state(signed portCHAR *pTaskName, unsigned portSHORT nStackSize);\r
+\r
+#endif /* __SYS_RTXC_H__ */\r
+\r

diff --git a/Demo/ARM9_STR91X_IAR/lwip/include/lwIPWebServer/BasicWEB.h b/Demo/ARM9_STR91X_IAR/lwip/include/lwIPWebServer/BasicWEB.h
new file mode 100644 (file)
index 0000000..33c8322
--- /dev/null
+++ b/Demo/ARM9_STR91X_IAR/lwip/include/lwIPWebServer/BasicWEB.h
@@ -0,0 +1,90 @@
+/*\r
+       FreeRTOS.org V4.0.4 - copyright (C) 2003-2006 Richard Barry.\r
+\r
+       This file is part of the FreeRTOS.org distribution.\r
+\r
+       FreeRTOS.org is free software; you can redistribute it and/or modify\r
+       it under the terms of the GNU General Public License as published by\r
+       the Free Software Foundation; either version 2 of the License, or\r
+       (at your option) any later version.\r
+\r
+       FreeRTOS.org is distributed in the hope that it will be useful,\r
+       but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+       MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
+       GNU General Public License for more details.\r
+\r
+       You should have received a copy of the GNU General Public License\r
+       along with FreeRTOS.org; if not, write to the Free Software\r
+       Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
+\r
+       A special exception to the GPL can be applied should you wish to distribute\r
+       a combined work that includes FreeRTOS.org, without being obliged to provide\r
+       the source code for any proprietary components.  See the licensing section\r
+       of http://www.FreeRTOS.org for full details of how and when the exception\r
+       can be applied.\r
+\r
+       ***************************************************************************\r
+       See http://www.FreeRTOS.org for documentation, latest information, license\r
+       and contact details.  Please ensure to read the configuration and relevant\r
+       port sections of the online documentation.\r
+       ***************************************************************************\r
+*/\r
+\r
+#ifndef BASIC_WEB_SERVER_H\r
+#define BASIC_WEB_SERVER_H\r
+\r
+#include <91x_type.h>\r
+\r
+/*------------------------------------------------------------------------------*/\r
+/*                            MACROS                                             */\r
+/*------------------------------------------------------------------------------*/\r
+#define basicwebWEBSERVER_PRIORITY      ( tskIDLE_PRIORITY + 2 )\r
+\r
+/* The port on which we listen. */\r
+#define webHTTP_PORT           ( 80 )\r
+\r
+/* Delay on close error. */\r
+#define webSHORT_DELAY         ( 10 / portTICK_RATE_MS )\r
+\r
+/* The IP address being used. */\r
+#define emacIPADDR0                    172\r
+#define emacIPADDR1            25\r
+#define emacIPADDR2            218\r
+#define emacIPADDR3            17\r
+\r
+/* The gateway address being used. */\r
+#define emacGATEWAY_ADDR0   10\r
+#define emacGATEWAY_ADDR1   52\r
+#define emacGATEWAY_ADDR2   156\r
+#define emacGATEWAY_ADDR3   254\r
+\r
+/* The network mask being used. */\r
+#define emacNET_MASK0          255\r
+#define emacNET_MASK1          255\r
+#define emacNET_MASK2          255\r
+#define emacNET_MASK3          0\r
+\r
+#define STATIC_IP   1\r
+#define DHCP_IP     2\r
+\r
+#define lwipBASIC_SERVER_STACK_SIZE    250\r
+\r
+/*------------------------------------------------------------------------------*/\r
+/*                            PROTOTYPES                                        */\r
+/*------------------------------------------------------------------------------*/\r
+/* The function that implements the WEB server task. */\r
+void vBasicWEBServer( void *pvParameters );\r
+\r
+/* Initialisation required by lwIP. */\r
+void vlwIPInit( void );\r
+\r
+void  PrintIPOnLCD(unsigned int ipAddr);\r
+\r
+void ToDoAfterGettingIP(bool dhcpStaticFlag);\r
+\r
+void InitializeStaticIP(void);\r
+\r
+void DelayForDHCPToCome(void);\r
+\r
+#endif\r
+\r

diff --git a/Demo/ARM9_STR91X_IAR/lwip/include/lwIPWebServer/fs.h b/Demo/ARM9_STR91X_IAR/lwip/include/lwIPWebServer/fs.h
new file mode 100644 (file)
index 0000000..dc848a1
--- /dev/null
+++ b/Demo/ARM9_STR91X_IAR/lwip/include/lwIPWebServer/fs.h
@@ -0,0 +1,45 @@
+/*\r
+ * Copyright (c) 2001-2003 Swedish Institute of Computer Science.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without modification,\r
+ * are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ *    this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ *    this list of conditions and the following disclaimer in the documentation\r
+ *    and/or other materials provided with the distribution.\r
+ * 3. The name of the author may not be used to endorse or promote products\r
+ *    derived from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT\r
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,\r
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT\r
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\r
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\r
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING\r
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY\r
+ * OF SUCH DAMAGE.\r
+ *\r
+ * This file is part of the lwIP TCP/IP stack.\r
+ *\r
+ * Author: Adam Dunkels <adam@sics.se>\r
+ *\r
+ */\r
+#ifndef __FS_H__\r
+#define __FS_H__\r
+\r
+struct fs_file {\r
+  char *data;\r
+  int len;\r
+};\r
+\r
+/* file must be allocated by caller and will be filled in\r
+   by the function. */\r
+int fs_open(char *name, struct fs_file *file);\r
+\r
+#endif /* __FS_H__ */\r
+\r

diff --git a/Demo/ARM9_STR91X_IAR/lwip/include/lwIPWebServer/fsdata.h b/Demo/ARM9_STR91X_IAR/lwip/include/lwIPWebServer/fsdata.h
new file mode 100644 (file)
index 0000000..a8cbc84
--- /dev/null
+++ b/Demo/ARM9_STR91X_IAR/lwip/include/lwIPWebServer/fsdata.h
@@ -0,0 +1,50 @@
+/*\r
+ * Copyright (c) 2001-2003 Swedish Institute of Computer Science.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without modification,\r
+ * are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ *    this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ *    this list of conditions and the following disclaimer in the documentation\r
+ *    and/or other materials provided with the distribution.\r
+ * 3. The name of the author may not be used to endorse or promote products\r
+ *    derived from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT\r
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,\r
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT\r
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\r
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\r
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING\r
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY\r
+ * OF SUCH DAMAGE.\r
+ *\r
+ * This file is part of the lwIP TCP/IP stack.\r
+ *\r
+ * Author: Adam Dunkels <adam@sics.se>\r
+ *\r
+ */\r
+#ifndef __FSDATA_H__\r
+#define __FSDATA_H__\r
+\r
+struct httpd_fsdata_file {\r
+  const struct httpd_fsdata_file *next;\r
+  const unsigned char *name;\r
+  const unsigned char *data;\r
+  const int len;\r
+};\r
+\r
+struct httpd_fsdata_file_noconst {\r
+  struct httpd_fsdata_file *next;\r
+  unsigned char *name;\r
+  unsigned char *data;\r
+  int len;\r
+};\r
+\r
+#endif /* __FSDATA_H__ */\r
+\r

diff --git a/Demo/ARM9_STR91X_IAR/lwip/include/lwIPWebServer/httpd.h b/Demo/ARM9_STR91X_IAR/lwip/include/lwIPWebServer/httpd.h
new file mode 100644 (file)
index 0000000..60f74a9
--- /dev/null
+++ b/Demo/ARM9_STR91X_IAR/lwip/include/lwIPWebServer/httpd.h
@@ -0,0 +1,38 @@
+/*\r
+ * Copyright (c) 2001-2003 Swedish Institute of Computer Science.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without modification,\r
+ * are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ *    this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ *    this list of conditions and the following disclaimer in the documentation\r
+ *    and/or other materials provided with the distribution.\r
+ * 3. The name of the author may not be used to endorse or promote products\r
+ *    derived from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT\r
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,\r
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT\r
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\r
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\r
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING\r
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY\r
+ * OF SUCH DAMAGE.\r
+ *\r
+ * This file is part of the lwIP TCP/IP stack.\r
+ *\r
+ * Author: Adam Dunkels <adam@sics.se>\r
+ *\r
+ */\r
+#ifndef __HTTPD_H__\r
+#define __HTTPD_H__\r
+\r
+void httpd_init(void);\r
+\r
+#endif /* __HTTPD_H__ */\r
+\r

diff --git a/Demo/ARM9_STR91X_IAR/lwip/include/lwip/lwipopts.h b/Demo/ARM9_STR91X_IAR/lwip/include/lwip/lwipopts.h
new file mode 100644 (file)
index 0000000..6fb319d
--- /dev/null
+++ b/Demo/ARM9_STR91X_IAR/lwip/include/lwip/lwipopts.h
@@ -0,0 +1,194 @@
+/*\r
+ * Copyright (c) 2001-2003 Swedish Institute of Computer Science.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without modification,\r
+ * are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ *    this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ *    this list of conditions and the following disclaimer in the documentation\r
+ *    and/or other materials provided with the distribution.\r
+ * 3. The name of the author may not be used to endorse or promote products\r
+ *    derived from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT\r
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,\r
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT\r
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\r
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\r
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING\r
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY\r
+ * OF SUCH DAMAGE.\r
+ *\r
+ * This file is part of the lwIP TCP/IP stack.\r
+ *\r
+ * Author: Adam Dunkels <adam@sics.se>\r
+ *\r
+ */\r
+#ifndef __LWIPOPTS_H__\r
+#define __LWIPOPTS_H__\r
+\r
+#define LWIP_NOASSERT 1 // To suppress some errors for now (no debug output)\r
+#define SYS_LIGHTWEIGHT_PROT            1\r
+\r
+#define TCPIP_THREAD_PRIO      3\r
+\r
+#define ETH_PAD_SIZE 2\r
+\r
+/* ---------- Memory options ---------- */\r
+/* MEM_ALIGNMENT: should be set to the alignment of the CPU for which\r
+   lwIP is compiled. 4 byte alignment -> define MEM_ALIGNMENT to 4, 2\r
+   byte alignment -> define MEM_ALIGNMENT to 2. */\r
+#define MEM_ALIGNMENT           4\r
+\r
+/* MEM_SIZE: the size of the heap memory. If the application will send\r
+a lot of data that needs to be copied, this should be set high. */\r
+#define MEM_SIZE                8000\r
+\r
+/* MEMP_NUM_PBUF: the number of memp struct pbufs. If the application\r
+   sends a lot of data out of ROM (or other static memory), this\r
+   should be set high. */\r
+#define MEMP_NUM_PBUF           40\r
+/* MEMP_NUM_UDP_PCB: the number of UDP protocol control blocks. One\r
+   per active UDP "connection". */\r
+#define MEMP_NUM_UDP_PCB        4\r
+/* MEMP_NUM_TCP_PCB: the number of simulatenously active TCP\r
+   connections. */\r
+#define MEMP_NUM_TCP_PCB        10\r
+/* MEMP_NUM_TCP_PCB_LISTEN: the number of listening TCP\r
+   connections. */\r
+#define MEMP_NUM_TCP_PCB_LISTEN 8\r
+/* MEMP_NUM_TCP_SEG: the number of simultaneously queued TCP\r
+   segments. */\r
+#define MEMP_NUM_TCP_SEG        8\r
+/* MEMP_NUM_SYS_TIMEOUT: the number of simulateously active\r
+   timeouts. */\r
+#define MEMP_NUM_SYS_TIMEOUT    3\r
+\r
+\r
+/* The following four are used only with the sequential API and can be\r
+   set to 0 if the application only will use the raw API. */\r
+/* MEMP_NUM_NETBUF: the number of struct netbufs. */\r
+#define MEMP_NUM_NETBUF         4\r
+/* MEMP_NUM_NETCONN: the number of struct netconns. */\r
+#define MEMP_NUM_NETCONN        4\r
+/* MEMP_NUM_APIMSG: the number of struct api_msg, used for\r
+   communication between the TCP/IP stack and the sequential\r
+   programs. */\r
+#define MEMP_NUM_API_MSG        8\r
+/* MEMP_NUM_TCPIPMSG: the number of struct tcpip_msg, which is used\r
+   for sequential API communication and incoming packets. Used in\r
+   src/api/tcpip.c. */\r
+#define MEMP_NUM_TCPIP_MSG      8\r
+\r
+/* These two control is reclaimer functions should be compiled\r
+   in. Should always be turned on (1). */\r
+#define MEM_RECLAIM             1\r
+#define MEMP_RECLAIM            1\r
+\r
+/* ---------- Pbuf options ---------- */\r
+/* PBUF_POOL_SIZE: the number of buffers in the pbuf pool. */\r
+#define PBUF_POOL_SIZE          8\r
+\r
+/* PBUF_POOL_BUFSIZE: the size of each pbuf in the pbuf pool. */\r
+#define PBUF_POOL_BUFSIZE       1500\r
+\r
+/* PBUF_LINK_HLEN: the number of bytes that should be allocated for a\r
+   link level header. */\r
+#define PBUF_LINK_HLEN          16\r
+\r
+/* ---------- TCP options ---------- */\r
+#define LWIP_TCP                1\r
+#define TCP_TTL                 255\r
+\r
+/* Controls if TCP should queue segments that arrive out of\r
+   order. Define to 0 if your device is low on memory. */\r
+#define TCP_QUEUE_OOSEQ         1\r
+\r
+/* TCP Maximum segment size. */\r
+#define TCP_MSS                 1500\r
+\r
+/* TCP sender buffer space (bytes). */\r
+#define TCP_SND_BUF             1500\r
+\r
+/* TCP sender buffer space (pbufs). This must be at least = 2 *\r
+   TCP_SND_BUF/TCP_MSS for things to work. */\r
+#define TCP_SND_QUEUELEN        6 * TCP_SND_BUF/TCP_MSS\r
+\r
+/* TCP receive window. */\r
+#define TCP_WND                 1500\r
+\r
+/* Maximum number of retransmissions of data segments. */\r
+#define TCP_MAXRTX              12\r
+\r
+/* Maximum number of retransmissions of SYN segments. */\r
+#define TCP_SYNMAXRTX           4\r
+\r
+/* ---------- ARP options ---------- */\r
+#define ARP_TABLE_SIZE 10\r
+#define ARP_QUEUEING 1\r
+\r
+/* ---------- IP options ---------- */\r
+/* Define IP_FORWARD to 1 if you wish to have the ability to forward\r
+   IP packets across network interfaces. If you are going to run lwIP\r
+   on a device with only one network interface, define this to 0. */\r
+#define IP_FORWARD              1\r
+\r
+/* If defined to 1, IP options are allowed (but not parsed). If\r
+   defined to 0, all packets with IP options are dropped. */\r
+#define IP_OPTIONS              1\r
+\r
+/** IP reassembly and segmentation. Even if they both deal with IP\r
+ *  fragments, note that these are orthogonal, one dealing with incoming\r
+ *  packets, the other with outgoing packets\r
+ */\r
+\r
+/** Reassemble incoming fragmented IP packets */\r
+#define IP_REASSEMBLY                   0\r
+\r
+/** Fragment outgoing IP packets if their size exceeds MTU */\r
+#define IP_FRAG                         1\r
+\r
+/* IP reassemly default age in seconds */\r
+#define IP_REASS_MAXAGE                                                                30\r
+\r
+\r
+/* ---------- ICMP options ---------- */\r
+#define ICMP_TTL                255\r
+\r
+\r
+/* ---------- DHCP options ---------- */\r
+/* Define LWIP_DHCP to 1 if you want DHCP configuration of\r
+   interfaces. DHCP is not implemented in lwIP 0.5.1, however, so\r
+   turning this on does currently not work. */\r
+#define LWIP_DHCP               0\r
+\r
+/* 1 if you want to do an ARP check on the offered address\r
+   (recommended). */\r
+#define DHCP_DOES_ARP_CHECK     1\r
+\r
+/* ---------- UDP options ---------- */\r
+#define LWIP_UDP                1\r
+#define UDP_TTL                 255\r
+\r
+\r
+/* ---------- Statistics options ---------- */\r
+#define STATS\r
+\r
+#ifdef STATS\r
+#define LINK_STATS 1\r
+#define IP_STATS   1\r
+#define ICMP_STATS 1\r
+#define UDP_STATS  1\r
+#define TCP_STATS  1\r
+#define MEM_STATS  1\r
+#define MEMP_STATS 1\r
+#define PBUF_STATS 1\r
+#define SYS_STATS  1\r
+#endif /* STATS */\r
+\r
+#endif /* __LWIPOPTS_H__ */\r

diff --git a/Demo/ARM9_STR91X_IAR/lwip/include/lwip/opt.h b/Demo/ARM9_STR91X_IAR/lwip/include/lwip/opt.h
new file mode 100644 (file)
index 0000000..48b9996
--- /dev/null
+++ b/Demo/ARM9_STR91X_IAR/lwip/include/lwip/opt.h
@@ -0,0 +1,722 @@
+/*\r
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without modification,\r
+ * are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ *    this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ *    this list of conditions and the following disclaimer in the documentation\r
+ *    and/or other materials provided with the distribution.\r
+ * 3. The name of the author may not be used to endorse or promote products\r
+ *    derived from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT\r
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,\r
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT\r
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\r
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\r
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING\r
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY\r
+ * OF SUCH DAMAGE.\r
+ *\r
+ * This file is part of the lwIP TCP/IP stack.\r
+ *\r
+ * Author: Adam Dunkels <adam@sics.se>\r
+ *\r
+ */\r
+#ifndef __LWIP_OPT_H__\r
+#define __LWIP_OPT_H__\r
+\r
+/* Include user defined options first */\r
+#include "lwipopts.h"\r
+#include "lwip/debug.h"\r
+\r
+/* Define default values for unconfigured parameters. */\r
+\r
+/* Platform specific locking */\r
+\r
+/*\r
+ * enable SYS_LIGHTWEIGHT_PROT in lwipopts.h if you want inter-task protection\r
+ * for certain critical regions during buffer allocation, deallocation and memory\r
+ * allocation and deallocation.\r
+ */\r
+#ifndef SYS_LIGHTWEIGHT_PROT\r
+#define SYS_LIGHTWEIGHT_PROT            0\r
+#endif\r
+\r
+#ifndef NO_SYS\r
+#define NO_SYS                          0\r
+#endif\r
+/* ---------- Memory options ---------- */\r
+#ifndef MEM_LIBC_MALLOC\r
+#define MEM_LIBC_MALLOC                 0\r
+#endif\r
+\r
+/* MEM_ALIGNMENT: should be set to the alignment of the CPU for which\r
+   lwIP is compiled. 4 byte alignment -> define MEM_ALIGNMENT to 4, 2\r
+   byte alignment -> define MEM_ALIGNMENT to 2. */\r
+\r
+#ifndef MEM_ALIGNMENT\r
+#define MEM_ALIGNMENT                   1\r
+#endif\r
+\r
+/* MEM_SIZE: the size of the heap memory. If the application will send\r
+a lot of data that needs to be copied, this should be set high. */\r
+#ifndef MEM_SIZE\r
+#define MEM_SIZE                        1600\r
+#endif\r
+\r
+#ifndef MEMP_SANITY_CHECK\r
+#define MEMP_SANITY_CHECK       0\r
+#endif\r
+\r
+/* MEMP_NUM_PBUF: the number of memp struct pbufs. If the application\r
+   sends a lot of data out of ROM (or other static memory), this\r
+   should be set high. */\r
+#ifndef MEMP_NUM_PBUF\r
+#define MEMP_NUM_PBUF                   16\r
+#endif\r
+\r
+/* Number of raw connection PCBs */\r
+#ifndef MEMP_NUM_RAW_PCB\r
+#define MEMP_NUM_RAW_PCB                4\r
+#endif\r
+\r
+/* MEMP_NUM_UDP_PCB: the number of UDP protocol control blocks. One\r
+   per active UDP "connection". */\r
+#ifndef MEMP_NUM_UDP_PCB\r
+#define MEMP_NUM_UDP_PCB                4\r
+#endif\r
+/* MEMP_NUM_TCP_PCB: the number of simulatenously active TCP\r
+   connections. */\r
+#ifndef MEMP_NUM_TCP_PCB\r
+#define MEMP_NUM_TCP_PCB                5\r
+#endif\r
+/* MEMP_NUM_TCP_PCB_LISTEN: the number of listening TCP\r
+   connections. */\r
+#ifndef MEMP_NUM_TCP_PCB_LISTEN\r
+#define MEMP_NUM_TCP_PCB_LISTEN         8\r
+#endif\r
+/* MEMP_NUM_TCP_SEG: the number of simultaneously queued TCP\r
+   segments. */\r
+#ifndef MEMP_NUM_TCP_SEG\r
+#define MEMP_NUM_TCP_SEG                16\r
+#endif\r
+/* MEMP_NUM_SYS_TIMEOUT: the number of simulateously active\r
+   timeouts. */\r
+#ifndef MEMP_NUM_SYS_TIMEOUT\r
+#define MEMP_NUM_SYS_TIMEOUT            3\r
+#endif\r
+\r
+/* The following four are used only with the sequential API and can be\r
+   set to 0 if the application only will use the raw API. */\r
+/* MEMP_NUM_NETBUF: the number of struct netbufs. */\r
+#ifndef MEMP_NUM_NETBUF\r
+#define MEMP_NUM_NETBUF                 2\r
+#endif\r
+/* MEMP_NUM_NETCONN: the number of struct netconns. */\r
+#ifndef MEMP_NUM_NETCONN\r
+#define MEMP_NUM_NETCONN                4\r
+#endif\r
+/* MEMP_NUM_APIMSG: the number of struct api_msg, used for\r
+   communication between the TCP/IP stack and the sequential\r
+   programs. */\r
+#ifndef MEMP_NUM_API_MSG\r
+#define MEMP_NUM_API_MSG                8\r
+#endif\r
+/* MEMP_NUM_TCPIPMSG: the number of struct tcpip_msg, which is used\r
+   for sequential API communication and incoming packets. Used in\r
+   src/api/tcpip.c. */\r
+#ifndef MEMP_NUM_TCPIP_MSG\r
+#define MEMP_NUM_TCPIP_MSG              8\r
+#endif\r
+\r
+/* ---------- Pbuf options ---------- */\r
+/* PBUF_POOL_SIZE: the number of buffers in the pbuf pool. */\r
+\r
+#ifndef PBUF_POOL_SIZE\r
+#define PBUF_POOL_SIZE                  16\r
+#endif\r
+\r
+/* PBUF_POOL_BUFSIZE: the size of each pbuf in the pbuf pool. */\r
+\r
+#ifndef PBUF_POOL_BUFSIZE\r
+#define PBUF_POOL_BUFSIZE               128\r
+#endif\r
+\r
+/* PBUF_LINK_HLEN: the number of bytes that should be allocated for a\r
+   link level header. Defaults to 14 for Ethernet. */\r
+\r
+#ifndef PBUF_LINK_HLEN\r
+#define PBUF_LINK_HLEN                  14\r
+#endif\r
+\r
+\r
+\r
+/* ---------- ARP options ---------- */\r
+\r
+/** Number of active hardware address, IP address pairs cached */\r
+#ifndef ARP_TABLE_SIZE\r
+#define ARP_TABLE_SIZE                  10\r
+#endif\r
+\r
+/**\r
+ * If enabled, outgoing packets are queued during hardware address\r
+ * resolution.\r
+ *\r
+ * This feature has not stabilized yet. Single-packet queueing is\r
+ * believed to be stable, multi-packet queueing is believed to\r
+ * clash with the TCP segment queueing.\r
+ *\r
+ * As multi-packet-queueing is currently disabled, enabling this\r
+ * _should_ work, but we need your testing feedback on lwip-users.\r
+ *\r
+ */\r
+#ifndef ARP_QUEUEING\r
+#define ARP_QUEUEING                    1\r
+#endif\r
+\r
+/* This option is deprecated */\r
+#ifdef ETHARP_QUEUE_FIRST\r
+#error ETHARP_QUEUE_FIRST option is deprecated. Remove it from your lwipopts.h.\r
+#endif\r
+\r
+/* This option is removed to comply with the ARP standard */\r
+#ifdef ETHARP_ALWAYS_INSERT\r
+#error ETHARP_ALWAYS_INSERT option is deprecated. Remove it from your lwipopts.h.\r
+#endif\r
+\r
+/* ---------- IP options ---------- */\r
+/* Define IP_FORWARD to 1 if you wish to have the ability to forward\r
+   IP packets across network interfaces. If you are going to run lwIP\r
+   on a device with only one network interface, define this to 0. */\r
+#ifndef IP_FORWARD\r
+#define IP_FORWARD                      0\r
+#endif\r
+\r
+/* If defined to 1, IP options are allowed (but not parsed). If\r
+   defined to 0, all packets with IP options are dropped. */\r
+#ifndef IP_OPTIONS\r
+#define IP_OPTIONS                      1\r
+#endif\r
+\r
+/** IP reassembly and segmentation. Even if they both deal with IP\r
+ *  fragments, note that these are orthogonal, one dealing with incoming\r
+ *  packets, the other with outgoing packets\r
+ */\r
+\r
+/** Reassemble incoming fragmented IP packets */\r
+#ifndef IP_REASSEMBLY\r
+#define IP_REASSEMBLY                   1\r
+#endif\r
+\r
+/** Fragment outgoing IP packets if their size exceeds MTU */\r
+#ifndef IP_FRAG\r
+#define IP_FRAG                         1\r
+#endif\r
+\r
+/* IP reassemly default age in seconds */\r
+#ifndef IP_REASS_MAXAGE\r
+#define IP_REASS_MAXAGE 3\r
+#endif\r
+\r
+/* IP reassembly buffer size (minus IP header) */\r
+#ifndef IP_REASS_BUFSIZE\r
+#define IP_REASS_BUFSIZE 5760\r
+#endif\r
+\r
+/* Assumed max MTU on any interface for IP frag buffer */\r
+#ifndef IP_FRAG_MAX_MTU\r
+#define IP_FRAG_MAX_MTU 1500\r
+#endif\r
+\r
+/** Global default value for Time To Live used by transport layers. */\r
+#ifndef IP_DEFAULT_TTL\r
+#define IP_DEFAULT_TTL                  255\r
+#endif\r
+\r
+/* ---------- ICMP options ---------- */\r
+\r
+#ifndef ICMP_TTL\r
+#define ICMP_TTL                        (IP_DEFAULT_TTL)\r
+#endif\r
+\r
+/* ---------- RAW options ---------- */\r
+\r
+#ifndef LWIP_RAW\r
+#define LWIP_RAW                        1\r
+#endif\r
+\r
+#ifndef RAW_TTL\r
+#define RAW_TTL                        (IP_DEFAULT_TTL)\r
+#endif\r
+\r
+/* ---------- DHCP options ---------- */\r
+\r
+#ifndef LWIP_DHCP\r
+#define LWIP_DHCP                       0\r
+#endif\r
+\r
+/* 1 if you want to do an ARP check on the offered address\r
+   (recommended). */\r
+#ifndef DHCP_DOES_ARP_CHECK\r
+#define DHCP_DOES_ARP_CHECK             1\r
+#endif\r
+\r
+/* ---------- SNMP options ---------- */\r
+/** @note UDP must be available for SNMP transport */\r
+#ifndef LWIP_SNMP\r
+#define LWIP_SNMP                       0\r
+#endif\r
+\r
+/** @note At least one request buffer is required.  */\r
+#ifndef SNMP_CONCURRENT_REQUESTS\r
+#define SNMP_CONCURRENT_REQUESTS        1\r
+#endif\r
+\r
+/** @note At least one trap destination is required */\r
+#ifndef SNMP_TRAP_DESTINATIONS\r
+#define SNMP_TRAP_DESTINATIONS          1\r
+#endif\r
+\r
+#ifndef SNMP_PRIVATE_MIB\r
+#define SNMP_PRIVATE_MIB                0\r
+#endif\r
+\r
+/* ---------- UDP options ---------- */\r
+#ifndef LWIP_UDP\r
+#define LWIP_UDP                        1\r
+#endif\r
+\r
+#ifndef UDP_TTL\r
+#define UDP_TTL                         (IP_DEFAULT_TTL)\r
+#endif\r
+\r
+/* ---------- TCP options ---------- */\r
+#ifndef LWIP_TCP\r
+#define LWIP_TCP                        1\r
+#endif\r
+\r
+#ifndef TCP_TTL\r
+#define TCP_TTL                         (IP_DEFAULT_TTL)\r
+#endif\r
+\r
+#ifndef TCP_WND\r
+#define TCP_WND                         2048\r
+#endif\r
+\r
+#ifndef TCP_MAXRTX\r
+#define TCP_MAXRTX                      12\r
+#endif\r
+\r
+#ifndef TCP_SYNMAXRTX\r
+#define TCP_SYNMAXRTX                   6\r
+#endif\r
+\r
+\r
+/* Controls if TCP should queue segments that arrive out of\r
+   order. Define to 0 if your device is low on memory. */\r
+#ifndef TCP_QUEUE_OOSEQ\r
+#define TCP_QUEUE_OOSEQ                 1\r
+#endif\r
+\r
+/* TCP Maximum segment size. */\r
+#ifndef TCP_MSS\r
+#define TCP_MSS                         128 /* A *very* conservative default. */\r
+#endif\r
+\r
+/* TCP sender buffer space (bytes). */\r
+#ifndef TCP_SND_BUF\r
+#define TCP_SND_BUF                     256\r
+#endif\r
+\r
+/* TCP sender buffer space (pbufs). This must be at least = 2 *\r
+   TCP_SND_BUF/TCP_MSS for things to work. */\r
+#ifndef TCP_SND_QUEUELEN\r
+#define TCP_SND_QUEUELEN                4 * TCP_SND_BUF/TCP_MSS\r
+#endif\r
+\r
+\r
+/* Maximum number of retransmissions of data segments. */\r
+\r
+/* Maximum number of retransmissions of SYN segments. */\r
+\r
+/* TCP writable space (bytes). This must be less than or equal\r
+   to TCP_SND_BUF. It is the amount of space which must be\r
+   available in the tcp snd_buf for select to return writable */\r
+#ifndef TCP_SNDLOWAT\r
+#define TCP_SNDLOWAT                    TCP_SND_BUF/2\r
+#endif\r
+\r
+/* Support loop interface (127.0.0.1) */\r
+#ifndef LWIP_HAVE_LOOPIF\r
+#define LWIP_HAVE_LOOPIF                0\r
+#endif\r
+\r
+#ifndef LWIP_EVENT_API\r
+#define LWIP_EVENT_API                  0\r
+#define LWIP_CALLBACK_API               1\r
+#else\r
+#define LWIP_EVENT_API                  1\r
+#define LWIP_CALLBACK_API               0\r
+#endif\r
+\r
+#ifndef LWIP_COMPAT_SOCKETS\r
+#define LWIP_COMPAT_SOCKETS             1\r
+#endif\r
+\r
+\r
+#ifndef TCPIP_THREAD_PRIO\r
+#define TCPIP_THREAD_PRIO               1\r
+#endif\r
+\r
+#ifndef SLIPIF_THREAD_PRIO\r
+#define SLIPIF_THREAD_PRIO              1\r
+#endif\r
+\r
+#ifndef PPP_THREAD_PRIO\r
+#define PPP_THREAD_PRIO                 1\r
+#endif\r
+\r
+#ifndef DEFAULT_THREAD_PRIO\r
+#define DEFAULT_THREAD_PRIO             1\r
+#endif\r
+\r
+\r
+/* ---------- Socket Options ---------- */\r
+/* Enable SO_REUSEADDR and SO_REUSEPORT options */\r
+#ifdef SO_REUSE\r
+/* I removed the lot since this was an ugly hack. It broke the raw-API.\r
+   It also came with many ugly goto's, Christiaan Simons. */\r
+#error "SO_REUSE currently unavailable, this was a hack"\r
+#endif\r
+\r
+\r
+/* ---------- Statistics options ---------- */\r
+#ifndef LWIP_STATS\r
+#define LWIP_STATS                      1\r
+#endif\r
+\r
+#if LWIP_STATS\r
+\r
+#ifndef LWIP_STATS_DISPLAY\r
+#define LWIP_STATS_DISPLAY 0\r
+#endif\r
+\r
+#ifndef LINK_STATS\r
+#define LINK_STATS  1\r
+#endif\r
+\r
+#ifndef IP_STATS\r
+#define IP_STATS    1\r
+#endif\r
+\r
+#ifndef IPFRAG_STATS\r
+#define IPFRAG_STATS    1\r
+#endif\r
+\r
+#ifndef ICMP_STATS\r
+#define ICMP_STATS  1\r
+#endif\r
+\r
+#ifndef UDP_STATS\r
+#define UDP_STATS   1\r
+#endif\r
+\r
+#ifndef TCP_STATS\r
+#define TCP_STATS   1\r
+#endif\r
+\r
+#ifndef MEM_STATS\r
+#define MEM_STATS   1\r
+#endif\r
+\r
+#ifndef MEMP_STATS\r
+#define MEMP_STATS  1\r
+#endif\r
+\r
+#ifndef PBUF_STATS\r
+#define PBUF_STATS  1\r
+#endif\r
+\r
+#ifndef SYS_STATS\r
+#define SYS_STATS   1\r
+#endif\r
+\r
+#ifndef RAW_STATS\r
+#define RAW_STATS   0\r
+#endif\r
+\r
+#else\r
+\r
+#define LINK_STATS  0\r
+#define IP_STATS    0\r
+#define IPFRAG_STATS    0\r
+#define ICMP_STATS  0\r
+#define UDP_STATS   0\r
+#define TCP_STATS   0\r
+#define MEM_STATS   0\r
+#define MEMP_STATS  0\r
+#define PBUF_STATS  0\r
+#define SYS_STATS   0\r
+#define RAW_STATS   0\r
+#define LWIP_STATS_DISPLAY  0\r
+\r
+#endif /* LWIP_STATS */\r
+\r
+/* ---------- PPP options ---------- */\r
+\r
+#ifndef PPP_SUPPORT\r
+#define PPP_SUPPORT                     0      /* Set for PPP */\r
+#endif\r
+\r
+#if PPP_SUPPORT\r
+\r
+#define NUM_PPP                         1      /* Max PPP sessions. */\r
+\r
+\r
+\r
+#ifndef PAP_SUPPORT\r
+#define PAP_SUPPORT                     0      /* Set for PAP. */\r
+#endif\r
+\r
+#ifndef CHAP_SUPPORT\r
+#define CHAP_SUPPORT                    0      /* Set for CHAP. */\r
+#endif\r
+\r
+#define MSCHAP_SUPPORT                  0      /* Set for MSCHAP (NOT FUNCTIONAL!) */\r
+#define CBCP_SUPPORT                    0      /* Set for CBCP (NOT FUNCTIONAL!) */\r
+#define CCP_SUPPORT                     0      /* Set for CCP (NOT FUNCTIONAL!) */\r
+\r
+#ifndef VJ_SUPPORT\r
+#define VJ_SUPPORT                      0      /* Set for VJ header compression. */\r
+#endif\r
+\r
+#ifndef MD5_SUPPORT\r
+#define MD5_SUPPORT                     0      /* Set for MD5 (see also CHAP) */\r
+#endif\r
+\r
+\r
+/*\r
+ * Timeouts.\r
+ */\r
+#define FSM_DEFTIMEOUT                  6       /* Timeout time in seconds */\r
+#define FSM_DEFMAXTERMREQS              2       /* Maximum Terminate-Request transmissions */\r
+#define FSM_DEFMAXCONFREQS              10      /* Maximum Configure-Request transmissions */\r
+#define FSM_DEFMAXNAKLOOPS              5       /* Maximum number of nak loops */\r
+\r
+#define UPAP_DEFTIMEOUT                 6       /* Timeout (seconds) for retransmitting req */\r
+#define UPAP_DEFREQTIME                 30      /* Time to wait for auth-req from peer */\r
+\r
+#define CHAP_DEFTIMEOUT                 6       /* Timeout time in seconds */\r
+#define CHAP_DEFTRANSMITS               10      /* max # times to send challenge */\r
+\r
+\r
+/* Interval in seconds between keepalive echo requests, 0 to disable. */\r
+#if 1\r
+#define LCP_ECHOINTERVAL                0\r
+#else\r
+#define LCP_ECHOINTERVAL                10\r
+#endif\r
+\r
+/* Number of unanswered echo requests before failure. */\r
+#define LCP_MAXECHOFAILS                3\r
+\r
+/* Max Xmit idle time (in jiffies) before resend flag char. */\r
+#define PPP_MAXIDLEFLAG                 100\r
+\r
+/*\r
+ * Packet sizes\r
+ *\r
+ * Note - lcp shouldn't be allowed to negotiate stuff outside these\r
+ *    limits.  See lcp.h in the pppd directory.\r
+ * (XXX - these constants should simply be shared by lcp.c instead\r
+ *    of living in lcp.h)\r
+ */\r
+#define PPP_MTU                         1500     /* Default MTU (size of Info field) */\r
+#if 0\r
+#define PPP_MAXMTU  65535 - (PPP_HDRLEN + PPP_FCSLEN)\r
+#else\r
+#define PPP_MAXMTU                      1500 /* Largest MTU we allow */\r
+#endif\r
+#define PPP_MINMTU                      64\r
+#define PPP_MRU                         1500     /* default MRU = max length of info field */\r
+#define PPP_MAXMRU                      1500     /* Largest MRU we allow */\r
+#define PPP_DEFMRU                      296             /* Try for this */\r
+#define PPP_MINMRU                      128             /* No MRUs below this */\r
+\r
+\r
+#define MAXNAMELEN                      256     /* max length of hostname or name for auth */\r
+#define MAXSECRETLEN                    256     /* max length of password or secret */\r
+\r
+#endif /* PPP_SUPPORT */\r
+\r
+/* checksum options - set to zero for hardware checksum support */\r
+\r
+#ifndef CHECKSUM_GEN_IP\r
+#define CHECKSUM_GEN_IP                 1\r
+#endif\r
+\r
+#ifndef CHECKSUM_GEN_UDP\r
+#define CHECKSUM_GEN_UDP                1\r
+#endif\r
+\r
+#ifndef CHECKSUM_GEN_TCP\r
+#define CHECKSUM_GEN_TCP                1\r
+#endif\r
+\r
+#ifndef CHECKSUM_CHECK_IP\r
+#define CHECKSUM_CHECK_IP               1\r
+#endif\r
+\r
+#ifndef CHECKSUM_CHECK_UDP\r
+#define CHECKSUM_CHECK_UDP              1\r
+#endif\r
+\r
+#ifndef CHECKSUM_CHECK_TCP\r
+#define CHECKSUM_CHECK_TCP              1\r
+#endif\r
+\r
+/* Debugging options all default to off */\r
+\r
+#ifndef DBG_TYPES_ON\r
+#define DBG_TYPES_ON                    0\r
+#endif\r
+\r
+#ifndef ETHARP_DEBUG\r
+#define ETHARP_DEBUG                    DBG_OFF\r
+#endif\r
+\r
+#ifndef NETIF_DEBUG\r
+#define NETIF_DEBUG                     DBG_OFF\r
+#endif\r
+\r
+#ifndef PBUF_DEBUG\r
+#define PBUF_DEBUG                      DBG_OFF\r
+#endif\r
+\r
+#ifndef API_LIB_DEBUG\r
+#define API_LIB_DEBUG                   DBG_OFF\r
+#endif\r
+\r
+#ifndef API_MSG_DEBUG\r
+#define API_MSG_DEBUG                   DBG_OFF\r
+#endif\r
+\r
+#ifndef SOCKETS_DEBUG\r
+#define SOCKETS_DEBUG                   DBG_OFF\r
+#endif\r
+\r
+#ifndef ICMP_DEBUG\r
+#define ICMP_DEBUG                      DBG_OFF\r
+#endif\r
+\r
+#ifndef INET_DEBUG\r
+#define INET_DEBUG                      DBG_OFF\r
+#endif\r
+\r
+#ifndef IP_DEBUG\r
+#define IP_DEBUG                        DBG_OFF\r
+#endif\r
+\r
+#ifndef IP_REASS_DEBUG\r
+#define IP_REASS_DEBUG                  DBG_OFF\r
+#endif\r
+\r
+#ifndef RAW_DEBUG\r
+#define RAW_DEBUG                       DBG_OFF\r
+#endif\r
+\r
+#ifndef MEM_DEBUG\r
+#define MEM_DEBUG                       DBG_OFF\r
+#endif\r
+\r
+#ifndef MEMP_DEBUG\r
+#define MEMP_DEBUG                      DBG_OFF\r
+#endif\r
+\r
+#ifndef SYS_DEBUG\r
+#define SYS_DEBUG                       DBG_OFF\r
+#endif\r
+\r
+#ifndef TCP_DEBUG\r
+#define TCP_DEBUG                       DBG_OFF\r
+#endif\r
+\r
+#ifndef TCP_INPUT_DEBUG\r
+#define TCP_INPUT_DEBUG                 DBG_OFF\r
+#endif\r
+\r
+#ifndef TCP_FR_DEBUG\r
+#define TCP_FR_DEBUG                    DBG_OFF\r
+#endif\r
+\r
+#ifndef TCP_RTO_DEBUG\r
+#define TCP_RTO_DEBUG                   DBG_OFF\r
+#endif\r
+\r
+#ifndef TCP_REXMIT_DEBUG\r
+#define TCP_REXMIT_DEBUG                DBG_OFF\r
+#endif\r
+\r
+#ifndef TCP_CWND_DEBUG\r
+#define TCP_CWND_DEBUG                  DBG_OFF\r
+#endif\r
+\r
+#ifndef TCP_WND_DEBUG\r
+#define TCP_WND_DEBUG                   DBG_OFF\r
+#endif\r
+\r
+#ifndef TCP_OUTPUT_DEBUG\r
+#define TCP_OUTPUT_DEBUG                DBG_OFF\r
+#endif\r
+\r
+#ifndef TCP_RST_DEBUG\r
+#define TCP_RST_DEBUG                   DBG_OFF\r
+#endif\r
+\r
+#ifndef TCP_QLEN_DEBUG\r
+#define TCP_QLEN_DEBUG                  DBG_OFF\r
+#endif\r
+\r
+#ifndef UDP_DEBUG\r
+#define UDP_DEBUG                       DBG_OFF\r
+#endif\r
+\r
+#ifndef TCPIP_DEBUG\r
+#define TCPIP_DEBUG                     DBG_OFF\r
+#endif\r
+\r
+#ifndef PPP_DEBUG\r
+#define PPP_DEBUG                       DBG_OFF\r
+#endif\r
+\r
+#ifndef SLIP_DEBUG\r
+#define SLIP_DEBUG                      DBG_OFF\r
+#endif\r
+\r
+#ifndef DHCP_DEBUG\r
+#define DHCP_DEBUG                      DBG_OFF\r
+#endif\r
+\r
+#ifndef SNMP_MSG_DEBUG\r
+#define SNMP_MSG_DEBUG                  DBG_OFF\r
+#endif\r
+\r
+#ifndef SNMP_MIB_DEBUG\r
+#define SNMP_MIB_DEBUG                  DBG_OFF\r
+#endif\r
+\r
+#ifndef DBG_MIN_LEVEL\r
+#define DBG_MIN_LEVEL                   DBG_LEVEL_OFF\r
+#endif\r
+\r
+#endif /* __LWIP_OPT_H__ */\r
+\r
+\r
+\r

diff --git a/Demo/ARM9_STR91X_IAR/lwip/lwipWebServer/BasicWEB.c b/Demo/ARM9_STR91X_IAR/lwip/lwipWebServer/BasicWEB.c
new file mode 100644 (file)
index 0000000..85c0bd6
--- /dev/null
+++ b/Demo/ARM9_STR91X_IAR/lwip/lwipWebServer/BasicWEB.c
@@ -0,0 +1,121 @@
+\r
+/*\r
+       FreeRTOS.org V4.5.0 - copyright (C) 2003-2006 Richard Barry.\r
+\r
+       This file is part of the FreeRTOS.org distribution.\r
+\r
+       FreeRTOS.org is free software; you can redistribute it and/or modify\r
+       it under the terms of the GNU General Public License as published by\r
+       the Free Software Foundation; either version 2 of the License, or\r
+       (at your option) any later version.\r
+\r
+       FreeRTOS.org is distributed in the hope that it will be useful,\r
+       but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+       MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
+       GNU General Public License for more details.\r
+\r
+       You should have received a copy of the GNU General Public License\r
+       along with FreeRTOS.org; if not, write to the Free Software\r
+       Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
+\r
+       A special exception to the GPL can be applied should you wish to distribute\r
+       a combined work that includes FreeRTOS.org, without being obliged to provide\r
+       the source code for any proprietary components.  See the licensing section\r
+       of http://www.FreeRTOS.org for full details of how and when the exception\r
+       can be applied.\r
+\r
+       ***************************************************************************\r
+       See http://www.FreeRTOS.org for documentation, latest information, license\r
+       and contact details.  Please ensure to read the configuration and relevant\r
+       port sections of the online documentation.\r
+       ***************************************************************************\r
+*/\r
+\r
+/*\r
+       Implements a simplistic WEB server.  Every time a connection is made and\r
+       data is received a dynamic page that shows the current TCP/IP statistics\r
+       is generated and returned.  The connection is then closed.\r
+*/\r
+\r
+\r
+/*------------------------------------------------------------------------------*/\r
+/*                            PROTOTYPES                                        */\r
+/*------------------------------------------------------------------------------*/\r
+\r
+/* Standard includes. */\r
+#include <stdio.h>\r
+#include <string.h>\r
+\r
+/* Scheduler includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+#include "semphr.h"\r
+\r
+/* Demo includes. */\r
+#include "BasicWEB.h"\r
+\r
+/* lwIP includes. */\r
+#include "lwip/api.h"\r
+#include "lwip/tcpip.h"\r
+#include "lwip/memp.h"\r
+#include "lwip/stats.h"\r
+#include "netif/loopif.h"\r
+#include "lcd.h"\r
+#include "httpd.h"\r
+\r
+#define lwipTCP_STACK_SIZE                     600\r
+\r
+\r
+/*------------------------------------------------------------------------------*/\r
+/*                            GLOBALS                                          */\r
+/*------------------------------------------------------------------------------*/\r
+static struct netif EMAC_if;\r
+\r
+/*------------------------------------------------------------------------------*/\r
+/*                            FUNCTIONS                                         */\r
+/*------------------------------------------------------------------------------*/\r
+\r
+\r
+void vlwIPInit( void )\r
+{\r
+    /* Initialize lwIP and its interface layer. */\r
+       sys_init();\r
+       mem_init();                                                             \r
+       memp_init();\r
+       pbuf_init();\r
+       netif_init();\r
+       ip_init();\r
+       sys_set_state(( signed portCHAR * ) "lwIP", lwipTCP_STACK_SIZE);\r
+       tcpip_init( NULL, NULL );       \r
+       sys_set_default_state();\r
+}\r
+/*------------------------------------------------------------*/\r
+\r
+void vBasicWEBServer( void *pvParameters )\r
+{\r
+struct ip_addr xIpAddr, xNetMast, xGateway;\r
+extern err_t ethernetif_init( struct netif *netif );\r
+\r
+    /* Parameters are not used - suppress compiler error. */\r
+    ( void ) pvParameters;\r
+\r
+    /* Create and configure the EMAC interface. */\r
+    IP4_ADDR( &xIpAddr, emacIPADDR0, emacIPADDR1, emacIPADDR2, emacIPADDR3 );\r
+    IP4_ADDR( &xNetMast, emacNET_MASK0, emacNET_MASK1, emacNET_MASK2, emacNET_MASK3 );\r
+    IP4_ADDR( &xGateway, emacGATEWAY_ADDR0, emacGATEWAY_ADDR1, emacGATEWAY_ADDR2, emacGATEWAY_ADDR3 );\r
+    netif_add( &EMAC_if, &xIpAddr, &xNetMast, &xGateway, NULL, ethernetif_init, tcpip_input );\r
+\r
+    /* make it the default interface */\r
+    netif_set_default( &EMAC_if );\r
+\r
+    /* bring it up */\r
+    netif_set_up(&EMAC_if);\r
+\r
+    /* Initialize HTTP */\r
+    httpd_init();\r
+\r
+       /* Nothing else to do.  No point hanging around. */\r
+       vTaskDelete( NULL );\r
+}\r
+\r
+\r

diff --git a/Demo/ARM9_STR91X_IAR/lwip/lwipWebServer/fs.c b/Demo/ARM9_STR91X_IAR/lwip/lwipWebServer/fs.c
new file mode 100644 (file)
index 0000000..677155c
--- /dev/null
+++ b/Demo/ARM9_STR91X_IAR/lwip/lwipWebServer/fs.c
@@ -0,0 +1,61 @@
+/*\r
+ * Copyright (c) 2001-2003 Swedish Institute of Computer Science.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without modification,\r
+ * are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ *    this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ *    this list of conditions and the following disclaimer in the documentation\r
+ *    and/or other materials provided with the distribution.\r
+ * 3. The name of the author may not be used to endorse or promote products\r
+ *    derived from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT\r
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,\r
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT\r
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\r
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\r
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING\r
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY\r
+ * OF SUCH DAMAGE.\r
+ *\r
+ * This file is part of the lwIP TCP/IP stack.\r
+ *\r
+ * Author: Adam Dunkels <adam@sics.se>\r
+ *\r
+ */\r
+#include "lwip/def.h"\r
+#include "fs.h"\r
+#include "fsdata.h"\r
+#include "fsdata.c"\r
+\r
+// Standard lib include\r
+#include <string.h>\r
+\r
+/*-----------------------------------------------------------------------------------*/\r
+\r
+\r
+/*-----------------------------------------------------------------------------------*/\r
+int\r
+fs_open(char *name, struct fs_file *file)\r
+{\r
+  struct httpd_fsdata_file_noconst *f;\r
+\r
+  for(f = (struct httpd_fsdata_file_noconst *)HTTPD_FS_ROOT;\r
+      f != NULL;\r
+      f = (struct httpd_fsdata_file_noconst *)f->next) {\r
+    if (!strcmp(name, (char *)f->name)) {\r
+      file->data = (char *)f->data;\r
+      file->len = f->len;\r
+      return 1;\r
+    }\r
+  }\r
+  return 0;\r
+}\r
+/*-----------------------------------------------------------------------------------*/\r
+\r

diff --git a/Demo/ARM9_STR91X_IAR/lwip/lwipWebServer/fs/WS1/404.html b/Demo/ARM9_STR91X_IAR/lwip/lwipWebServer/fs/WS1/404.html
new file mode 100644 (file)
index 0000000..43e7f4c
--- /dev/null
+++ b/Demo/ARM9_STR91X_IAR/lwip/lwipWebServer/fs/WS1/404.html
@@ -0,0 +1,8 @@
+<html>\r
+  <body bgcolor="white">\r
+    <center>\r
+      <h1>404 - file not found</h1>\r
+      <h3>Go <a href="/">here</a> instead.</h3>\r
+    </center>\r
+  </body>\r
+</html>
\ No newline at end of file

diff --git a/Demo/ARM9_STR91X_IAR/lwip/lwipWebServer/fs/WS1/index.html b/Demo/ARM9_STR91X_IAR/lwip/lwipWebServer/fs/WS1/index.html
new file mode 100644 (file)
index 0000000..a41dad2
--- /dev/null
+++ b/Demo/ARM9_STR91X_IAR/lwip/lwipWebServer/fs/WS1/index.html
@@ -0,0 +1,50 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">\r
+<html>\r
+  <head>\r
+    <title>FreeRTOS.org STR9 lwIP WEB server demo</title>\r
+  </head>\r
+  <BODY onLoad="window.setTimeout(&quot;location.href='index.html'&quot;,2000)" bgcolor="#CCCCff">\r
+               <img src="logo.gif" align="right"><p><br><p><br><p><br>\r
+               <font face="arial">\r
+               FreeRTOS.org lwIP WEB server example running on an <a href="http://mcu.st.com/mcu/inchtml.php?fdir=pages&fnam=str9">STR912</a> from STMicroelectronics.  Page will refresh every 2 seconds (or there abouts).<p>\r
+               \r
+               \r
+               <br>\r
+                               FreeRTOS.org<SMALL><SUP>TM</SUP></SMALL> is a portable, open source, <i>mini</i> Real Time Kernel - a free to download and royalty free RTOS \r
+                               that <a href="http://www.freertos.org/a00114.html#gpl">can be used in commercial applications</a>. \r
+               <p>\r
+                               Ports exist for many different processor architectures and development tools.  Each official port includes a pre-configured\r
+                               example application demonstrating the kernel features, expediting learning, and permitting 'out of the box' development.<p>\r
+\r
+                               <a href="http://sourceforge.net/forum/forum.php?forum_id=382005" target="_blank">Free support</a> is provided by an active user community.  \r
+                               <a href="http://www.highintegritysystems.com/openrtos.html" target="_blank">Commercial support</a> along with a \r
+                               <a href="http://www.freertos.org/a00115.html">full development service</a> is also provided.<p>\r
+\r
+                               <a href="http://www.safertos.com/" target="_blank">SafeRTOS</a><small><sup>TM</sup></small> is a version that has been certified for use\r
+                               in safety critical applications. It is a functionally similar product for which complete \r
+                               <a href="http://www.iec.ch/zone/fsafety/fsafety_entry.htm" target="_blank">IEC 61508</a> compliant development/safety lifecyle documentation is available\r
+                               (conformance certified by TÜV SÜD, including compiler verification evidence). \r
+                               While FreeRTOS.org does not contain the same safety features as SafeRTOS there is still commonality - allowing FreeRTOS.org to benefit directly from the \r
+                               very rigorous SafeRTOS testing and validation activities.\r
+               <p>\r
+               \r
+               Here are some reasons why FreeRTOS.org is a good choice for your next application - FreeRTOS.org...\r
+\r
+               <ul type="disc">\r
+                               <li>Provides one solution for many different architectures and development tools.</li>\r
+                               <li>Is known to be reliable.  Confidence is assured by the activities undertaken by the SafeRTOS sister project.</li>\r
+                               <li>Is undergoing continuous active development.</li>\r
+                               <li>Has a minimal ROM, RAM and processing overhead.</li>\r
+                               <li>Is truly free for use in commercial applications (see license conditions for details).</li>\r
+                               <li>Comes with a porting, platform development, or application development service should it be required.</li>\r
+                               <li>Is well established with a large and ever growing user base.</li>\r
+                               <li>Contains a pre-configured example for each port.  No need to figure out how to setup a project - just download and compile!</li>\r
+                               <li>Has an excellent and active free support forum</a>.</li>\r
+                               <li>Has the assurance that commercial support is available should it be required.</li>\r
+                               <li>Provides ample documentation.</li>\r
+                               <li>Is very scalable, simple and easy to use.</li>\r
+               </ul>\r
+               </font>\r
+       </body>\r
+</html>\r
+\r

diff --git a/Demo/ARM9_STR91X_IAR/lwip/lwipWebServer/fs/WS1/logo.gif b/Demo/ARM9_STR91X_IAR/lwip/lwipWebServer/fs/WS1/logo.gif
new file mode 100644 (file)
index 0000000..1ca6d2e
Binary files /dev/null and b/Demo/ARM9_STR91X_IAR/lwip/lwipWebServer/fs/WS1/logo.gif differ

diff --git a/Demo/ARM9_STR91X_IAR/lwip/lwipWebServer/fsdata.c b/Demo/ARM9_STR91X_IAR/lwip/lwipWebServer/fsdata.c
new file mode 100644 (file)
index 0000000..36caa5d
--- /dev/null
+++ b/Demo/ARM9_STR91X_IAR/lwip/lwipWebServer/fsdata.c
@@ -0,0 +1,953 @@
+static const unsigned char data_404_html[] = {\r
+       /* /404.html */\r
+       0x2f, 0x34, 0x30, 0x34, 0x2e, 0x68, 0x74, 0x6d, 0x6c, 0,\r
+       0x3c, 0x68, 0x74, 0x6d, 0x6c, 0x3e, 0xd, 0xa, 0x20, 0x20,\r
+       0x3c, 0x62, 0x6f, 0x64, 0x79, 0x20, 0x62, 0x67, 0x63, 0x6f,\r
+       0x6c, 0x6f, 0x72, 0x3d, 0x22, 0x77, 0x68, 0x69, 0x74, 0x65,\r
+       0x22, 0x3e, 0xd, 0xa, 0x20, 0x20, 0x20, 0x20, 0x3c, 0x63,\r
+       0x65, 0x6e, 0x74, 0x65, 0x72, 0x3e, 0xd, 0xa, 0x20, 0x20,\r
+       0x20, 0x20, 0x20, 0x20, 0x3c, 0x68, 0x31, 0x3e, 0x34, 0x30,\r
+       0x34, 0x20, 0x2d, 0x20, 0x66, 0x69, 0x6c, 0x65, 0x20, 0x6e,\r
+       0x6f, 0x74, 0x20, 0x66, 0x6f, 0x75, 0x6e, 0x64, 0x3c, 0x2f,\r
+       0x68, 0x31, 0x3e, 0xd, 0xa, 0x20, 0x20, 0x20, 0x20, 0x20,\r
+       0x20, 0x3c, 0x68, 0x33, 0x3e, 0x47, 0x6f, 0x20, 0x3c, 0x61,\r
+       0x20, 0x68, 0x72, 0x65, 0x66, 0x3d, 0x22, 0x2f, 0x22, 0x3e,\r
+       0x68, 0x65, 0x72, 0x65, 0x3c, 0x2f, 0x61, 0x3e, 0x20, 0x69,\r
+       0x6e, 0x73, 0x74, 0x65, 0x61, 0x64, 0x2e, 0x3c, 0x2f, 0x68,\r
+       0x33, 0x3e, 0xd, 0xa, 0x20, 0x20, 0x20, 0x20, 0x3c, 0x2f,\r
+       0x63, 0x65, 0x6e, 0x74, 0x65, 0x72, 0x3e, 0xd, 0xa, 0x20,\r
+       0x20, 0x3c, 0x2f, 0x62, 0x6f, 0x64, 0x79, 0x3e, 0xd, 0xa,\r
+       0x3c, 0x2f, 0x68, 0x74, 0x6d, 0x6c, 0x3e, 0};\r
+\r
+static const unsigned char data_index_html[] = {\r
+       /* /index.html */\r
+       0x2f, 0x69, 0x6e, 0x64, 0x65, 0x78, 0x2e, 0x68, 0x74, 0x6d, 0x6c, 0,\r
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+       0x48, 0x54, 0x4d, 0x4c, 0x20, 0x50, 0x55, 0x42, 0x4c, 0x49,\r
+       0x43, 0x20, 0x22, 0x2d, 0x2f, 0x2f, 0x57, 0x33, 0x43, 0x2f,\r
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+       0x34, 0x2e, 0x30, 0x31, 0x20, 0x54, 0x72, 0x61, 0x6e, 0x73,\r
+       0x69, 0x74, 0x69, 0x6f, 0x6e, 0x61, 0x6c, 0x2f, 0x2f, 0x45,\r
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+       0x9, 0x3c, 0x2f, 0x66, 0x6f, 0x6e, 0x74, 0x3e, 0xd, 0xa,\r
+       0x9, 0x3c, 0x2f, 0x62, 0x6f, 0x64, 0x79, 0x3e, 0xd, 0xa,\r
+       0x3c, 0x2f, 0x68, 0x74, 0x6d, 0x6c, 0x3e, 0xd, 0xa, 0xd,\r
+       0xa, 0};\r
+\r
+static const unsigned char data_logo_gif[] = {\r
+       /* /logo.gif */\r
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+       0x34, 0x38, 0x38, 0x38, 0x3c, 0x3c, 0x3c, 0x40, 0x40, 0x40,\r
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+       0x5d, 0x7d, 0xea, 0x7d, 0xbe, 0xbe, 0xbe, 0x61, 0xff, 0x61,\r
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+       0xd6, 0xba, 0x69, 0xff, 0x69, 0x81, 0xee, 0x81, 0xc2, 0xc2,\r
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+       0xfb, 0xf8, 0xf3, 0xeb, 0xdf, 0xcf, 0xdf, 0x1c, 0x3a, 0x75,\r
+       00, 0x6, 0xa8, 0x8e, 0x39, 0xab, 0x60, 0x1, 0x1d, 0xa,\r
+       0x49, 0x10, 0x84, 0x40, 0x19, 0x3, 0x6d, 0x87, 0x80, 0x69,\r
+       0x2, 0x4d, 0x30, 0x41, 0x78, 0x31, 0xb8, 0xd0, 0xd5, 0xc,\r
+       0x83, 0x98, 0x23, 0xe0, 0x86, 0x1c, 0x76, 0xe8, 0xe1, 0x87,\r
+       0x20, 0x86, 0x28, 0xe2, 0x88, 0x24, 0x96, 0x68, 0xe2, 0x89,\r
+       0x28, 0xa6, 0xa8, 0x22, 0x8a, 0xe8, 0x44, 0x82, 0xc3, 0x9,\r
+       0x3f, 0xad, 0xa0, 0x20, 0x83, 0x2, 0x95, 0x81, 0xc0, 0x5,\r
+       0x1c, 0xc, 0x84, 00, 0x7, 0x14, 0xee, 0x85, 0x42, 0x11,\r
+       0xaf, 0xac, 0x28, 0xe4, 0x90, 0x44, 0x16, 0x69, 0xe4, 0x91,\r
+       0x48, 0x22, 0x29, 0xc, 0x14, 0x9a, 0xb9, 0x30, 0x63, 0x83,\r
+       0x8, 0x18, 0xd1, 0x5d, 0x2c, 0x2f, 0x5c, 00, 0x42, 0x8f,\r
+       0x3d, 0x29, 0x51, 0x4b, 0x92, 0x5c, 0x76, 0xe9, 0xe5, 0x97,\r
+       0x60, 0x86, 0x69, 0xc, 0x16, 0x4d, 0x3e, 0x59, 0x63, 0x77,\r
+       0xf, 0x4e, 0x97, 0xc5, 0x95, 0xb1, 0x54, 0xd8, 0x13, 0x12,\r
+       0x5b, 0x86, 0x29, 0xe7, 0x9c, 0x74, 0xd6, 0x49, 0xe7, 0x98,\r
+       0x65, 0xea, 0x48, 0xe3, 0x67, 0xdd, 0xe1, 0x18, 0x4b, 0x77,\r
+       0x6c, 0xba, 0x89, 0x2, 0x9c, 0x76, 0x16, 0x6a, 0xe8, 0xa1,\r
+       0x88, 0x92, 0x88, 0xa7, 0x4f, 0x4e, 0xea, 0x9, 0x65, 0x2c,\r
+       0x59, 0x20, 0xf0, 0x42, 0x8e, 0x81, 0xfa, 0x48, 0x68, 0xa2,\r
+       0x98, 0x66, 0xaa, 0xe9, 0x9c, 0x8b, 0xaa, 0xd0, 0xa8, 0x40,\r
+       0xb, 0x3e, 0xfa, 0x67, 0x9a, 0x95, 0xbe, 0x19, 0x27, 0x8a,\r
+       0xe7, 0x7c, 0x33, 0xd, 0x31, 0xae, 0xec, 0x61, 0x8d, 0x88,\r
+       0xe9, 0xc4, 0xff, 0x2a, 0xeb, 0xac, 0xb4, 0xd6, 0x2a, 0xab,\r
+       0x3a, 0xe9, 0xa0, 0x98, 0xe, 0x3a, 0xb6, 0xf6, 0xea, 0xeb,\r
+       0xaf, 0xb7, 0x9e, 0x18, 0x2b, 0x3a, 0xe3, 0x70, 0x83, 0xcd,\r
+       0x35, 0xd8, 0x54, 0x83, 0x2c, 0x36, 0xd9, 0x84, 0xe3, 0x5f,\r
+       0xae, 0x5f, 0xee, 0x4a, 0x6c, 0x36, 0xd8, 0x54, 0x4b, 0xcd,\r
+       0xb2, 0xd8, 0x70, 0xe3, 0x2c, 0xaf, 0xd0, 0x8a, 0xd8, 0xe9,\r
+       0xa7, 0x7f, 0xee, 0x69, 0xa3, 0x40, 0x1c, 0x38, 0x20, 0x50,\r
+       0xa9, 0x83, 0x9e, 0x5a, 0xe2, 0x39, 0xc0, 0x7c, 0x51, 0xc2,\r
+       0x7, 0x1b, 0x58, 0x10, 0xc1, 0x23, 0xea, 0x90, 0xa3, 0xcd,\r
+       0xbd, 0xe7, 0x8, 0x98, 0xe, 0x37, 0xc7, 0x14, 0xe3, 0xef,\r
+       0xbf, 00, 0x7, 0x2c, 0xb0, 0xbf, 0xd0, 0x54, 0x53, 0xcd,\r
+       0xb6, 0xdd, 0x82, 0xd8, 0xcd, 0x32, 0x3, 0x37, 0xec, 0xf0,\r
+       0xc3, 0xc5, 0x2c, 0xc3, 0x4d, 0xc2, 0x20, 0xee, 0xda, 0x4d,\r
+       0x33, 0xc5, 0x4, 0xa3, 0xb, 0x2a, 0x97, 0x50, 0x42, 0x89,\r
+       0x22, 0x1e, 0x53, 0x62, 0x8a, 0x2d, 0xbf, 0x44, 0x8c, 0x4d,\r
+       0x39, 0xff, 0x19, 0xb9, 0xeb, 0x38, 0xd5, 0x64, 0xfc, 0x8b,\r
+       0x2c, 0x9c, 0x84, 0xdc, 0x48, 0xc8, 0x97, 0xb4, 0xa2, 0x4b,\r
+       0xc9, 0xc5, 0x50, 0x3, 0x8e, 0x39, 0x14, 0x73, 0xf8, 0x2d,\r
+       0x45, 0x82, 0x5e, 0x5a, 0x22, 0x39, 0x73, 0x6c, 0x90, 00,\r
+       00, 0x48, 0x3, 0x60, 0xc0, 0x21, 0xe4, 0xe0, 0x11, 0xc2,\r
+       0x7, 0x22, 0x90, 0x22, 0x20, 0x3a, 0xc3, 0x8, 0xd2, 0x7,\r
+       0x20, 0x58, 0x67, 0xad, 0xf5, 0xd6, 0x5c, 0x3, 0x2, 0xf2,\r
+       0x25, 0xb2, 0xfc, 0x12, 0xc, 0x35, 0xe5, 0xf4, 0xbc, 0xe1,\r
+       0x32, 0x90, 0x74, 0xad, 0xf6, 0xda, 0x6c, 0x3, 0xd2, 0xc8,\r
+       0x31, 0x66, 0x6f, 0x88, 0x4e, 0x38, 0xcd, 0xfc, 0x82, 0x4a,\r
+       0x23, 0x5a, 0xb, 0xa2, 0xf7, 0xde, 0x82, 0x68, 0xff, 0xad,\r
+       0x8, 0x27, 0xb6, 0x4, 0x83, 0x8d, 0x86, 0x42, 0xa6, 0x63,\r
+       0xe, 0x35, 0xc1, 0xd8, 0x92, 0x76, 0xd6, 0x7c, 0x37, 0xbe,\r
+       0x35, 0x24, 0xb2, 0x4, 0x93, 0x4d, 0xdc, 00, 0xfe, 0x3c,\r
+       0x51, 0xd0, 0xea, 0x8a, 0x78, 0x8e, 0x1a, 0xd, 0x24, 0x9d,\r
+       0xf4, 0x1, 0x4c, 0x1f, 0x11, 00, 0xd2, 0x3f, 0x90, 0x13,\r
+       0x20, 0x3a, 0xc5, 0x14, 0x2, 0x48, 0xe3, 0xac, 0xb7, 0xde,\r
+       0x7a, 0xd6, 0x94, 0xc8, 0xd2, 0xcc, 0x38, 0x20, 0x2e, 0x43,\r
+       0x89, 0xeb, 0xb8, 0xe7, 0xee, 0x7a, 0x23, 0xcb, 0x50, 0x8e,\r
+       0x6b, 0x38, 0xc5, 0xc8, 0x82, 0xf7, 0xea, 0xba, 0xb3, 0xee,\r
+       0x35, 0x27, 0xbf, 0xc, 0xae, 0xe2, 0x38, 0xcd, 0xe8, 0x72,\r
+       0x49, 0xdf, 0xc5, 0xbb, 0xee, 0x35, 0x34, 0xbe, 0x5b, 0x2e,\r
+       0x11, 0xe6, 0x26, 0xba, 0x2, 0x81, 0xe7, 0x9f, 0x1f, 0xa2,\r
+       0xce, 0x1e, 0xb, 0x20, 0xad, 0x1, 0x31, 0xa7, 0xa7, 0x1e,\r
+       0xfd, 0xf9, 0x7a, 0x63, 0xd, 0x49, 0x2b, 0xd8, 0x7c, 0x68,\r
+       0x3b, 0xfa, 0xf0, 0xf3, 0xd, 0x49, 0xef, 0x1f, 0xa2, 0x3,\r
+       0x8d, 0xf0, 0xc4, 0xc7, 0xdf, 0xf8, 0xdf, 0xbf, 0x74, 0x23,\r
+       0x2c, 0x36, 0x8a, 0xc3, 0x9a, 0xfe, 0x1a, 0x7, 0x89, 0xf6,\r
+       0x81, 0xc8, 0x7a, 0x11, 0xc1, 0x1e, 0x89, 0xbe, 0xf1, 0x3,\r
+       0x1, 0x20, 0x4d, 00, 0xa, 0x50, 0x80, 0x3, 0x41, 0xa7,\r
+       0xe, 0x62, 0x6c, 0x60, 0x74, 0xa, 0xc8, 0x44, 0xf9, 0xa,\r
+       0x31, 0xc0, 0xf3, 0x5d, 0x82, 0x1a, 0x66, 0x7b, 0x5f, 0x7,\r
+       0xcf, 0x37, 0xbf, 0xb8, 0x99, 0xe3, 0x18, 0x90, 0x18, 0xe1,\r
+       0xeb, 0x14, 0x81, 0x8a, 0x6b, 0x94, 0x28, 0x1d, 0xd0, 0xe0,\r
+       0x84, 0xa, 0x9, 0x98, 0x8d, 0x10, 0x21, 0x10, 0x22, 0xa,\r
+       0x1c, 0x11, 0x30, 0x3a, 0x7, 0x80, 0x2, 0x74, 0xe0, 0xf,\r
+       0x6e, 0x38, 0xda, 0xd2, 0xff, 0xd4, 0x61, 0xd, 0x11, 0x38,\r
+       0x70, 00, 0xde, 0x3, 0x10, 0xea, 0x38, 0x38, 0x43, 0xdc,\r
+       0xb9, 0x8d, 0x1a, 0x1d, 0x12, 0x61, 0x13, 0x71, 0x57, 0xc2,\r
+       0xe, 0x8d, 0xe3, 0x17, 0x8d, 0x98, 0x62, 0xeb, 0x3e, 0x48,\r
+       0x22, 0x6a, 0x50, 0x22, 0x7f, 0x4d, 0xbc, 0x44, 0x38, 0x6c,\r
+       0x48, 0x26, 0x46, 0x1, 0xcd, 0x52, 0x99, 0x3, 0x91, 0x2b,\r
+       0x8, 00, 0x80, 00, 0x6c, 0x80, 0x7c, 0x99, 0x8, 0xdf,\r
+       0x10, 0xc9, 0x91, 0x82, 0x23, 0x26, 0x51, 0x1d, 0x4b, 0xd4,\r
+       0xa2, 0xf4, 0x1a, 0x1, 0xe, 0xe, 0x49, 0x51, 0x8f, 0x4,\r
+       0xa4, 0xdf, 0x86, 0xc6, 0xd1, 0xb, 0xd5, 0x1, 0x92, 0x6f,\r
+       0xd3, 0x13, 0x51, 0x36, 0xbe, 0x8, 0xc8, 0x4b, 0xd0, 0xee,\r
+       0x80, 0x65, 0xf4, 0xd4, 0x19, 0x4d, 0x55, 0x22, 0x52, 0xb0,\r
+       0x31, 00, 0x25, 0xc8, 0xd7, 0x23, 0x14, 0xa0, 0x34, 0xef,\r
+       0x15, 0xd1, 0x8e, 0x1b, 0x3c, 0x64, 0xeb, 0x64, 0x41, 0xb1,\r
+       0x3f, 0x8a, 0x52, 0x10, 0x55, 0x14, 0x90, 0x39, 0x7e, 0xc1,\r
+       0x44, 0xf4, 0x9, 0xd0, 0x95, 0x8a, 0x70, 0xe1, 0x87, 0xc2,\r
+       0x71, 0x9, 0x30, 0x9e, 0xef, 0x95, 0xad, 0xe3, 0xc4, 0x23,\r
+       0x3f, 0x74, 0xc3, 0x87, 0xe4, 0x50, 0x44, 0x96, 0x6c, 0xa3,\r
+       0x9, 0x34, 0xc9, 0xc9, 0x21, 0xe2, 0x22, 0x3, 0xa3, 0x13,\r
+       0xc0, 0x1d, 0xf3, 0x58, 0xbc, 0x42, 0x38, 0xd3, 0x99, 0xfa,\r
+       0x83, 0xc4, 0x2e, 0x1, 0xf4, 0xbe, 0xb5, 0xb9, 0x72, 0x6d,\r
+       0x6f, 0x2b, 0xa5, 0x21, 0xcf, 0xe7, 0xcc, 0x46, 0x40, 0x13,\r
+       0x7e, 0x97, 0xe8, 0xa3, 0x87, 0x52, 0x67, 0x4b, 0xdc, 0x3d,\r
+       0xb3, 0x10, 0xde, 0xfc, 0x66, 0xdf, 0x88, 0x7, 0x8a, 0x69,\r
+       0x76, 0xa8, 0x97, 0xe, 0xf9, 0x65, 0x88, 0x82, 0x19, 00,\r
+       0xf, 0x4c, 0x43, 0x1d, 0xa4, 0x8, 0xdf, 0x1, 0xe8, 0xf5,\r
+       0xff, 0x5, 0x3, 0x20, 0xed, 00, 0x1a, 0x54, 0xa2, 0xf9,\r
+       0x72, 0xc7, 0x9, 0x9b, 0xe9, 0x42, 0x63, 0xba, 0x68, 0x5,\r
+       0x27, 0x14, 0xb1, 0x4d, 0xdd, 0x15, 0x2, 0x6e, 0x2, 0x6a,\r
+       0xc6, 0x25, 0xce, 0x49, 0x51, 0x75, 0xe6, 0xae, 0xa2, 0x14,\r
+       0xa5, 0x84, 0x20, 0x1, 0xc4, 0xd, 0xbc, 0x45, 0xaf, 0x10,\r
+       0x9c, 0x38, 0x68, 0x30, 0x96, 0x31, 0x8c, 0x60, 0xf4, 0xc2,\r
+       0x14, 0x59, 0x3c, 0x5f, 0x2f, 0x52, 0xb6, 0x21, 0x73, 0x50,\r
+       0xa2, 0xf, 0xba, 0x3, 0x44, 0x21, 0x2e, 0x11, 0xb8, 0x60,\r
+       0xd8, 0x94, 0xa4, 0x36, 0xfd, 0x45, 0x2f, 0x64, 0x41, 0x9,\r
+       0xe, 0x2, 0x42, 0x97, 0x64, 0xcc, 0xd3, 0xf5, 0xd0, 0x58,\r
+       0x22, 0x57, 0x14, 00, 0x69, 0xa, 0xc8, 0x1, 0x30, 0xfe,\r
+       0x50, 0x4c, 0x35, 0xec, 0x1, 0x3, 0xa3, 0x3, 0xc0, 0xf8,\r
+       0x42, 0x69, 0xce, 0x61, 0x94, 0x43, 0x3d, 0x3, 0x32, 0x7,\r
+       0xcb, 0x8e, 0xd1, 0x8b, 0xdb, 0x45, 0xf, 0x15, 0x84, 0x3,\r
+       0x50, 0x37, 0x8e, 0x31, 0x8c, 0xb2, 0x9a, 0xf5, 0xac, 0xbd,\r
+       0x50, 0x84, 0xee, 0x1a, 0xf1, 0x8b, 0xb3, 0xba, 0x75, 0x18,\r
+       0x12, 0xeb, 0x56, 0x3a, 0x6c, 0xe1, 0xc1, 0x5e, 0x5c, 0x83,\r
+       0xa5, 0x1, 0x2, 0xc7, 0x32, 0x4c, 0xd1, 0x50, 0xdc, 0x35,\r
+       0x42, 0x96, 0x1b, 0xaa, 0x86, 0x47, 0x73, 0xd7, 0x8, 0x5d,\r
+       0x54, 0xa3, 0x1c, 0x20, 0x2a, 0xc7, 0x35, 0x8a, 0xa1, 0xb,\r
+       0x4a, 0xb4, 0x2, 0xb1, 0x90, 0x14, 0x6a, 0x2, 0x89, 0x4a,\r
+       0x22, 0x65, 0x58, 0xe0, 0x73, 0x1a, 0xd0, 00, 0x1b, 0x7,\r
+       0x40, 0x1, 0x8, 0x44, 0x55, 00, 0x54, 0x30, 0x9d, 0x40,\r
+       0x5b, 0xd9, 0xba, 0x42, 0x2c, 0xe3, 0x43, 0xe6, 0xa8, 0x6,\r
+       0x5f, 0x8b, 0x7, 0x8a, 0xb0, 0x8e, 0x8, 0x1c, 0x69, 0xcb,\r
+       0x1d, 0x28, 0xf0, 0x2a, 0x22, 0x6c, 0xff, 0xc, 0x96, 0xa0,\r
+       0xd0, 0x80, 0xac, 0x87, 0xb8, 0x21, 0xb, 0xd2, 0xe2, 0xce,\r
+       0x16, 0xae, 0x5, 0x10, 0x5d, 0x1d, 0x1a, 0xc, 0x77, 0x82,\r
+       0x8, 0x1d, 0xd7, 0x98, 0x5c, 0x50, 0xcd, 0x78, 0x39, 0xca,\r
+       0x8e, 0x88, 0x1c, 0x6a, 0x38, 0x2a, 0xf7, 0xa6, 0xb, 00,\r
+       0x6, 0xdc, 0x11, 0x8f, 0x3, 0x75, 0x9d, 0x69, 0x7d, 0x97,\r
+       0xd, 0x19, 0xea, 0xae, 0xb5, 0x26, 0xea, 0x46, 0x6c, 0x71,\r
+       0x7, 0x5e, 0x12, 0xcd, 0x35, 0x7a, 0x9c, 0xa8, 0xc6, 0x6b,\r
+       0x65, 0x11, 0xbd, 0x4b, 0x18, 0x50, 0x40, 0xa6, 0x28, 0x67,\r
+       0xe3, 0x38, 0xe1, 0x3f, 0x2e, 0xc1, 0xb3, 0x21, 0xf2, 0xc,\r
+       0x91, 0x5, 0xa3, 0x4a, 0x5d, 0xa4, 0x11, 0x20, 0x7, 0xda,\r
+       0x98, 0x5a, 0x76, 0x4b, 0xbb, 0x51, 0xf, 0xe9, 0xa2, 0x78,\r
+       0x94, 0x8, 0x6e, 0x88, 0xc4, 0x2b, 0xdf, 0xbd, 0x95, 0x77,\r
+       0x44, 0xd9, 0x78, 0x9e, 0xee, 0x52, 0x29, 0x22, 0x70, 0x70,\r
+       0xa2, 0xc1, 0x7b, 0x53, 0xc4, 0x4a, 0x37, 0x14, 0xdf, 0xef,\r
+       0xea, 0x16, 0x49, 0xf7, 0x65, 0x48, 0x7e, 0x43, 0xf4, 0x87,\r
+       0x8, 0xf0, 0x77, 0xba, 0x3, 0x8, 0x81, 0x32, 0xe4, 0x36,\r
+       0x60, 0xd6, 0x6d, 0x37, 0x44, 0xd4, 0x50, 0x4, 0x86, 0x5,\r
+       0x71, 0x9, 0x5, 0x2b, 0x6c, 0xbc, 0xae, 0x7b, 0xb0, 0x88,\r
+       0x82, 0xe1, 0xdb, 0xd6, 0x99, 0x62, 0x8c, 0x25, 0x82, 0x86,\r
+       0x8c, 0xbf, 0xb, 0xe4, 00, 0x5d, 0x58, 0x77, 0xa6, 0xb0,\r
+       0x31, 0x91, 0x42, 0xbc, 0x90, 0x11, 0x83, 0x88, 0x1c, 0x7f,\r
+       0xd8, 0xc0, 0x1, 0xa8, 0xbb, 00, 0x13, 0xac, 0x98, 0xc5,\r
+       0x3d, 0xe6, 0xdb, 0x8b, 0x41, 0xd4, 0xd1, 0x19, 0x27, 0x39,\r
+       0xbc, 0x38, 0x6e, 0x9d, 0x8e, 0x2b, 0xd6, 0x8a, 0x66, 0x42,\r
+       0xe3, 0x44, 0xe8, 0x38, 0x32, 0x61, 0xb, 0xac, 0x66, 0xdc,\r
+       0x85, 0xb3, 0xff, 0x4b, 0x4c, 0x56, 0x88, 0x93, 0x43, 0x64,\r
+       0xd, 0x35, 0x60, 0xe0, 0x1, 0xf, 0x80, 0x40, 0x9e, 0x3b,\r
+       0xc0, 0xb4, 0xe, 0x31, 0x53, 0xbb, 0x5, 0xee, 0x50, 0x31,\r
+       0xd4, 0x6a, 0xce, 0xd, 0x97, 0x88, 0xc1, 0xb2, 0x55, 0x32,\r
+       0x87, 0xba, 0x1, 0xa, 0x4, 0x7f, 0x98, 0x44, 0xc7, 0x18,\r
+       0x72, 0xee, 0xc, 0xd, 0xa0, 0x5a, 0x16, 0x4f, 0x16, 0x45,\r
+       0x3e, 0x52, 0x9c, 0x13, 0x22, 0x28, 0x2d, 0x9, 0xe9, 0x1c,\r
+       0xa0, 0x6, 0xf5, 0x71, 0x5b, 0xdc, 0xb8, 0x2d, 0x7b, 0x28,\r
+       0x1d, 0xec, 0xcd, 0x9d, 0x22, 0xde, 0x4b, 0x22, 0x44, 0x93,\r
+       0x57, 0xd1, 0x1b, 0x42, 0x61, 0xf1, 0x7e, 0x41, 0xdb, 0x11,\r
+       0x95, 0x83, 0x91, 0xb9, 0x3, 0xae, 0x80, 0x40, 0x31, 0xe3,\r
+       0xf4, 0xb5, 0xf0, 0xd1, 0x43, 0xda, 0x34, 0x42, 0x82, 0x16,\r
+       0x24, 0x39, 0xfd, 0x99, 0xc0, 0x21, 0x5a, 0x64, 0xee, 00,\r
+       0x51, 0xe3, 0x13, 0xb9, 0x3a, 0xc7, 0xb0, 0x16, 0xd0, 0x81,\r
+       0x1d, 0x5a, 0x5f, 0x61, 0xf1, 0x1a, 0xc9, 0x99, 0xe6, 0x71,\r
+       0xaf, 0xfb, 0x56, 0x8, 0x59, 0x40, 0x83, 0x1b, 0xd1, 0x56,\r
+       0x54, 0x24, 0xc1, 0x85, 0x43, 0x1f, 0xf9, 0x60, 0x14, 0xbe,\r
+       0x3, 0xd1, 0x39, 0xc8, 0x41, 0x8e, 0x69, 0x28, 0x23, 0x5f,\r
+       0xf5, 0x23, 0xb5, 0x96, 0x4f, 0xeb, 0x21, 0x74, 0x60, 0xa3,\r
+       0xd1, 0xba, 0xb, 0x46, 0xba, 0x17, 0x1d, 0x66, 0xd6, 0x8d,\r
+       0xf9, 0x43, 0xba, 0xc8, 0xb2, 0x96, 0x8d, 0x4b, 0x22, 0x1e,\r
+       0x7f, 0xb7, 0x86, 0x1, 0x7a, 0x76, 0x4c, 0xbd, 0xd6, 0x8b,\r
+       0x66, 0x5c, 0x23, 0x1c, 0xb5, 0x2e, 0x91, 0xb0, 0xf, 0x52,\r
+       0x21, 0x15, 0x9c, 0xa0, 0x5, 0x8e, 0xd8, 0x37, 0x87, 0xb4,\r
+       0xf1, 0x88, 0x26, 0xc0, 0x20, 0x5, 0x21, 0x18, 0x1, 0x30,\r
+       0xd4, 0xb1, 0x6e, 0x76, 0x63, 0xf9, 0xa2, 0xc1, 0xff, 0x8,\r
+       0xc7, 0x38, 0x56, 0xbe, 0xf2, 0x6e, 0x60, 0x3, 0x71, 0x12,\r
+       0xce, 0xdd, 0x97, 0x9d, 0xdd, 0xef, 0xc6, 0xfd, 0xbb, 0x43,\r
+       0xe6, 0x8, 0xb8, 0xee, 0x28, 0x1, 0x6c, 0x12, 0x5d, 0xe3,\r
+       0xb6, 0xad, 0x6b, 0x44, 0x33, 0xe4, 0xda, 0x61, 0xf8, 0x61,\r
+       0x4d, 0x11, 0xb2, 0x28, 0xc6, 0xb7, 0xc3, 0xed, 0xb3, 0x71,\r
+       0x9f, 0xd1, 0xe2, 0x18, 0xd7, 0x78, 0x80, 0xce, 0x91, 0x9,\r
+       0x13, 0x50, 0x60, 00, 0x49, 0x2b, 00, 0xd3, 0x32, 0x41,\r
+       0x85, 0x26, 0x50, 0x81, 0x7c, 0x54, 0xc5, 0x1d, 0xe0, 0x74,\r
+       0x61, 0x8b, 0xb2, 0xdb, 0x42, 0x16, 0x97, 0x90, 0x31, 0x86,\r
+       0x57, 0xc7, 0x9, 0x56, 0x1f, 0xba, 0xe6, 0x7c, 0xbb, 0x39,\r
+       0x87, 0xca, 0xd1, 0x5b, 0xdd, 0xb5, 0x82, 0xe9, 0x1d, 0x52,\r
+       0x78, 0xeb, 0x86, 0x81, 0x57, 0x68, 00, 0xfd, 0x9a, 0x85,\r
+       0x40, 0xc5, 0x2f, 0xae, 0xd1, 0x73, 0x5e, 0x3a, 0xbd, 0xb9,\r
+       0x50, 0xcf, 0xf8, 0xba, 0xe, 0x61, 0x1, 0x7, 0x7a, 0x6e,\r
+       0x69, 0xe4, 0xa0, 0x42, 0x2, 0x8, 0x90, 0x80, 0x31, 0xc0,\r
+       0x1b, 0xbb, 0x2, 0x47, 0x24, 0xd7, 0x16, 0xe, 0xd2, 0x33,\r
+       0xa7, 0x48, 0xef, 0x36, 0x67, 0x3a, 0x38, 0x50, 0x51, 0x3c,\r
+       0x4a, 0x9f, 0x68, 0x1c, 0xb8, 0xc6, 0x5d, 0x30, 0xf0, 0x8a,\r
+       0xe, 0x5b, 0xe0, 0x52, 0x7f, 0x58, 0xbb, 0x84, 0x61, 0xf1,\r
+       0x3e, 0x71, 0x83, 0x54, 0xfc, 0xe2, 0x8a, 0x27, 0x11, 0x31,\r
+       0x90, 0x39, 0x5d, 0xa, 0xba, 0x61, 0xca, 00, 0x8, 0xc1,\r
+       0x3d, 0x47, 0x7b, 0x48, 0x99, 0x52, 0xc2, 0xae, 0x11, 0x1f,\r
+       0x11, 0xe8, 0xe3, 0xce, 0xf4, 0x6b, 0x78, 0x37, 0x77, 0x81,\r
+       0x2e, 0x11, 0xea, 0x7b, 0xbd, 0xfa, 0xd, 0x75, 0xf7, 0xf5,\r
+       0x1d, 0xbc, 0x44, 0x2f, 0xc4, 0xb9, 0x5c, 0x49, 0x22, 0x1e,\r
+       0xf7, 0x52, 0x3f, 0xc7, 0xff, 0x18, 0xa4, 0xdb, 0x43, 0x3,\r
+       0x4c, 0xd0, 0x7b, 0xb8, 0x80, 0x2a, 00, 0x1e, 0xe0, 0x8a,\r
+       0xb0, 0x4f, 0x91, 0x7f, 0x84, 0x17, 0xd2, 0xf2, 0x1d, 0xcc,\r
+       0x74, 0x6a, 0xc4, 0x1c, 0x77, 0x9e, 0x4f, 0xd1, 0xf4, 0xf3,\r
+       0x5d, 0xeb, 0x6a, 0xc8, 0x70, 0xdb, 0xb, 0x67, 0xa, 0x8,\r
+       0x17, 0x59, 0xcc, 0x35, 0x54, 0x89, 0x27, 0x75, 0xc4, 0x40,\r
+       0x1, 0xf, 0x4, 0x1, 0x47, 0x70, 0x4, 0x53, 0x36, 0x44,\r
+       0xd6, 0x10, 0x2, 0xe, 0x44, 00, 0xf4, 0x42, 0x7c, 0x7a,\r
+       0xc4, 0x9, 0xb9, 0x45, 0x24, 0xf3, 0xa7, 0x37, 0x72, 0xb7,\r
+       0x21, 0xf6, 0x57, 0x3c, 0xf9, 0x87, 0x22, 0xfb, 0x97, 0x3b,\r
+       0xd5, 0xc7, 0x21, 0xd9, 0x60, 0xb, 0xc3, 0x33, 0x43, 0x3f,\r
+       0xc5, 0xd, 0xdd, 0x47, 0x6e, 0xbe, 0x64, 0x21, 0xe0, 0x47,\r
+       0x22, 0x46, 0xd5, 0x46, 0x14, 0xb0, 0x75, 0x72, 0xe4, 0x3d,\r
+       0x74, 0xe4, 0x40, 0xca, 0xe4, 0x7e, 0x53, 0x4, 0xa, 0xd4,\r
+       0x90, 0x7c, 0x6f, 0x37, 0x63, 0x1d, 0x28, 0x20, 0x1f, 0xa8,\r
+       0x3b, 0x50, 0xb4, 0x3c, 0xa9, 0xe7, 0x3a, 0x25, 0xc8, 0x21,\r
+       0xe6, 0xd0, 0xc, 0xa0, 0x50, 0x8, 0x57, 0x33, 0x43, 0x98,\r
+       0x46, 0x80, 0xde, 0x67, 0x80, 0x31, 0x38, 0x22, 0xf4, 0x34,\r
+       0x2, 0xc4, 0xd4, 0x49, 0xea, 0xf0, 0xd, 0x25, 00, 0x4a,\r
+       0x16, 0x8, 0x48, 0x1a, 0x5, 0x84, 0xca, 0x7, 0x77, 0xf4,\r
+       0x37, 0x22, 0xdc, 0x60, 0xa, 0xc5, 0x53, 0xc, 0x52, 0xc7,\r
+       0x21, 0x23, 0x88, 0x3b, 0xb4, 0x96, 0x58, 0xc5, 0x60, 0xa,\r
+       0x29, 0x84, 0x7d, 0xe8, 0xa3, 0x8, 0x4b, 0xd8, 0x74, 0x92,\r
+       0x55, 0x6e, 0x7, 0x48, 0x22, 0xf4, 0x34, 0x4c, 0xea, 0xb0,\r
+       0x49, 0x5c, 0x8, 0xc, 0x1a, 0x90, 0x4c, 0xcb, 0x24, 0x6f,\r
+       0xc6, 0x63, 0x87, 0xd2, 0xe3, 0x5e, 0xf2, 0x67, 0x86, 0x1c,\r
+       0xff, 0xc8, 0x74, 0xe5, 0x60, 0xb, 0x99, 0xa7, 0x37, 0x60,\r
+       0xa5, 0x22, 0xe1, 0xe0, 0x88, 0x82, 0x50, 0x8, 0x79, 0xf8,\r
+       0x21, 0xd8, 0xb0, 0x31, 0x29, 0xb4, 0x4e, 0x46, 0xf7, 0x63,\r
+       0x86, 0xb7, 0x87, 0x2f, 0xd8, 0x87, 0x58, 0x78, 0x49, 0x22,\r
+       0x60, 0x3a, 0x71, 0x4, 00, 0xfb, 0xa4, 0xe, 0x73, 0x10,\r
+       0x3e, 0x3d, 0x74, 0x88, 0x93, 0xa8, 0x37, 0x15, 0x75, 0x3e,\r
+       0x9b, 0x8, 0x66, 0x42, 0x8, 0x89, 0x92, 0xa8, 0x3b, 0x9c,\r
+       0x50, 0x78, 0xb5, 0xf5, 0x77, 0x8d, 0xf3, 0x36, 0x64, 0x28,\r
+       0x37, 0xd4, 0xf0, 0x32, 0x3d, 0xe5, 0x53, 0xe7, 0x23, 0x8c,\r
+       0x1e, 0x52, 0x7b, 0x5, 0x71, 0x7b, 0x51, 0xe7, 0x87, 0x6c,\r
+       0x4, 00, 0x11, 0x30, 0x7, 0xda, 0x70, 0x8, 0xc5, 0x84,\r
+       0x7, 0xb8, 0xd0, 0x1, 0x51, 0x25, 0x1, 0xb8, 0xc0, 0x83,\r
+       0xac, 0x63, 0xa, 0xc1, 0x50, 0x52, 0x25, 0xa5, 0x38, 0xd1,\r
+       0x3, 0x9, 0x2c, 0xa8, 0x22, 0x1b, 0x28, 0x8, 0x43, 0x78,\r
+       0x3a, 0xc3, 0x75, 0x51, 0x4, 0x37, 0x22, 0x91, 0x36, 0x63,\r
+       0x94, 00, 0x42, 0x28, 0x62, 0xe, 0xd7, 0x30, 0xc, 0xb6,\r
+       0xd0, 0x53, 00, 0x8, 0x8, 0xa6, 0x27, 0x20, 0xcc, 0x48,\r
+       0x10, 0xce, 0x98, 0x7b, 0x22, 0x42, 0xc, 0xdb, 0x83, 0x34,\r
+       0x10, 0x30, 0x2, 0x1f, 0x70, 0x54, 0x3, 0xb0, 0x1, 0x19,\r
+       0xe0, 0x78, 0x1, 00, 0x3, 0xdf, 0xe0, 0x8d, 0xf3, 0xd6,\r
+       0x52, 0xcd, 0xb0, 0x5a, 0xba, 0x13, 0x7d, 0xad, 0x86, 0x89,\r
+       0xeb, 0x18, 0x20, 0x85, 0x44, 0x6d, 0x29, 0x92, 0xe, 0xd7,\r
+       0x26, 0x73, 0xd5, 0x96, 0x22, 0xe5, 0x50, 0xd, 0xbf, 0x80,\r
+       0x89, 0x7b, 0xa3, 0xb, 0x85, 0xf7, 0x8f, 0x3, 0x11, 0x90,\r
+       0x52, 0x47, 0xe, 0x47, 0x80, 0x75, 0x49, 0x73, 0x62, 0x9e,\r
+       0x73, 00, 0x7b, 0x20, 0x60, 0x93, 0xff, 0x68, 0x5a, 0x1c,\r
+       0x92, 0xe, 0xd7, 0x80, 0x6f, 0xb2, 0xf5, 0x8e, 0x22, 0x92,\r
+       0x8e, 0x1b, 0x9, 0x20, 0xc7, 0x90, 0x52, 0xb9, 0xc3, 0x86,\r
+       0xf5, 0x98, 0x84, 0xad, 0xf3, 0x58, 0x44, 0x52, 0xe, 0xd0,\r
+       0x70, 0x7f, 0xb8, 0x83, 0xa, 0x23, 0xe9, 0x8f, 0x87, 0x67,\r
+       0x85, 0xcf, 0x28, 0x83, 0x11, 0xd0, 0x5f, 0x9e, 0x23, 00,\r
+       0x2a, 0x86, 0x93, 0x17, 0x15, 0x7d, 0xe9, 0x50, 0x94, 0xe,\r
+       0x35, 0x80, 0x34, 0x97, 0x8b, 0x3e, 0x7, 0x95, 0x62, 0xe6,\r
+       0x8b, 0x1f, 0x42, 0xd, 0xc0, 0xd8, 0x38, 0xba, 0x30, 0x8c,\r
+       0x41, 0xd6, 0x96, 0x7c, 0xd3, 0x76, 0xcb, 0x58, 0x95, 0x93,\r
+       0x65, 0x8a, 0xcf, 0xf5, 0x5, 0x47, 0xa3, 0x95, 0x1, 0x60,\r
+       0x1, 0x1, 0x25, 0x91, 0x7b, 0x63, 0x6a, 0x2, 0x12, 0xe,\r
+       0xed, 0xa8, 0x7a, 0x70, 0x99, 0x77, 0x1a, 0x89, 0x77, 0xe5,\r
+       0xa0, 0x86, 0x6b, 0x5, 0x58, 0x25, 0x52, 0x66, 0xba, 0xa3,\r
+       0x8, 0x48, 0x59, 0x24, 0xe6, 00, 0x99, 0x84, 0x35, 0x74,\r
+       0xef, 0x64, 0x97, 0x7c, 0x78, 0x85, 0xb, 0xa4, 0x5, 0x11,\r
+       0x20, 0x93, 0xdc, 0x53, 00, 0x1a, 0xf0, 0x7, 0xa2, 0x5,\r
+       0x98, 0xb4, 0x88, 0x91, 0xea, 0xd0, 0xc, 0x46, 0xe9, 0x3a,\r
+       0xd2, 0xf4, 0x79, 0x89, 0x59, 0x22, 0x85, 0x89, 0x3b, 0xb2,\r
+       0x80, 0x77, 00, 0x92, 0xd, 0x72, 0xb9, 0x37, 0xf4, 0x75,\r
+       0x24, 0xe9, 0xa0, 0x9a, 0xf2, 0x48, 0x8f, 0x7a, 0x58, 0x80,\r
+       0x77, 0xc9, 0x99, 0x25, 0x2, 0xc, 0x29, 00, 0x1, 0xb,\r
+       0x10, 0x41, 0xa, 0xd0, 00, 0x14, 0xd0, 0x4, 0xef, 0xc6,\r
+       0x21, 0xc7, 0xe6, 0x62, 0xa8, 0x19, 0xe, 0x96, 0xa9, 0x5d,\r
+       0xea, 0x85, 0x22, 0x42, 0x49, 0x9b, 0x6c, 0xd9, 0x6b, 0x8d,\r
+       0x10, 0x82, 0x21, 0x62, 0xe, 0xa4, 0x57, 0x3c, 0x77, 0x87,\r
+       0x24, 0xd9, 0xff, 0x99, 0x3b, 0x52, 0x59, 0x97, 0xa4, 0x18,\r
+       0x4f, 0x30, 0x78, 0x95, 0x22, 0x42, 0xe, 0x99, 0x90, 0x9,\r
+       0xb8, 0x40, 0xc, 0xd3, 0x60, 0xd, 0xc0, 0xf0, 0x8, 0x8f,\r
+       0x90, 0x9, 0xd6, 0x40, 0xe, 0x97, 0x77, 0x72, 0xe6, 0x84,\r
+       0x9a, 0xea, 0xc0, 0x4a, 0xdf, 0x75, 0x98, 0x1b, 0x72, 0x9d,\r
+       0x2f, 0x54, 0x74, 0x4, 0x75, 0x8e, 0xdd, 0xc9, 0x4a, 0xbd,\r
+       0x6, 0x9, 0xd4, 0xe3, 0x9c, 0xb4, 0xa9, 0x2f, 0x1d, 0x99,\r
+       0x3b, 0xad, 0xc0, 0x7d, 0x1b, 0xc2, 0x92, 0x2, 0xe1, 0x92,\r
+       0x7e, 0x38, 0x41, 0xf, 0x10, 0x5a, 0x25, 0xf2, 0x9c, 0xa5,\r
+       0xc6, 0x9f, 0xce, 0xb7, 0x6c, 0x85, 0x90, 0x69, 0x19, 0x69,\r
+       0x96, 0x25, 0x42, 0x4e, 0xc5, 0x83, 0xa, 0x6, 0xea, 0x21,\r
+       0xab, 0xd4, 0x57, 0xae, 0x53, 0x89, 0x26, 0xd8, 0xb, 0x87,\r
+       0x75, 0x22, 0xdc, 0x80, 0x92, 0xfd, 0x18, 0x20, 0x14, 0xda,\r
+       0x26, 0xe9, 0x29, 0x90, 0xf3, 0x14, 0x8d, 0x1, 0x90, 0x3,\r
+       0xf9, 0x19, 0x22, 0x1c, 0x3a, 0x6f, 0x94, 0x83, 0xe, 0xa9,\r
+       0x96, 0x3b, 0x10, 0x85, 0x8b, 0x89, 0x66, 0x22, 0x20, 0x9,\r
+       0x80, 0x3e, 0x68, 0x63, 0xe9, 0xd0, 0xd, 0x85, 0xb4, 0x6d,\r
+       0x85, 0x80, 0x99, 0x1c, 0x22, 0x64, 0x7d, 0x80, 0xa, 0xcd,\r
+       0x80, 0xd, 0x10, 0xe7, 0x3b, 0xe9, 0x90, 0xd, 0x8c, 0xc9,\r
+       0x7f, 0xe6, 0x9, 0x9c, 0x9b, 0xa9, 0x9e, 0x3b, 0x8a, 0x34,\r
+       0x1, 0x90, 0x2, 0x11, 0x49, 0x22, 0x41, 0x1a, 0x98, 0xfc,\r
+       0xa9, 0xe, 0xf, 0x2a, 0x76, 0xd, 0xaa, 0xe, 0x2, 0x6a,\r
+       0x22, 0xd4, 0x80, 0x92, 0x7d, 0xa3, 0x61, 0xd0, 0xc0, 0x2c,\r
+       0x2a, 0x97, 0xd, 0xd5, 0x70, 0xc, 0x5f, 0x7a, 0x69, 0xc9,\r
+       0x77, 0x60, 0xab, 0xe3, 0x35, 0xa8, 0x10, 0x31, 0xd0, 0x90,\r
+       0x5c, 0xe0, 0xc0, 0x72, 0xc6, 0x42, 0xd, 0xc7, 0xff, 0x80,\r
+       0x96, 0x5b, 0x74, 0xd, 0x71, 0x73, 0xa3, 0x16, 0xaa, 0x43,\r
+       0x3c, 0x14, 00, 0x19, 0x30, 0x72, 0x6a, 0x8a, 0x88, 0xa7,\r
+       0xe9, 0x3b, 0xd7, 0xe0, 0xa8, 0xf2, 0x33, 0x95, 0x41, 0xf9,\r
+       0x9a, 0x4a, 0xaa, 0x6d, 0xd1, 0xb3, 0x3a, 0x94, 00, 0x38,\r
+       0xb6, 0x70, 0x9, 0x59, 0xb4, 0x8f, 0x94, 0x90, 0xa2, 0x1b,\r
+       0x52, 0xa4, 0x7b, 0x3, 0x3b, 0x5, 0xd5, 0xb, 0xbd, 0xa0,\r
+       0xb, 0xa6, 0x30, 0x51, 00, 0x28, 0x8, 0x6f, 0x39, 0x8a,\r
+       0x62, 0x5a, 0x8a, 0xc2, 0x9, 0x22, 0xdf, 0xd0, 0x4, 0xfe,\r
+       0xa4, 0x34, 0x4d, 0x10, 0x60, 0x23, 0xb2, 0xa6, 0x9b, 0x7a,\r
+       0x5c, 0x3e, 0xa9, 0x5d, 0xbf, 0xd0, 0x86, 0x72, 0x2a, 0xaa,\r
+       0x26, 0x32, 0xe, 0xd3, 0x79, 0x4b, 0xb9, 0x9a, 0x3e, 0x8a,\r
+       0xc0, 0x9f, 0x97, 00, 0x53, 0xcb, 0xa6, 0x88, 0x4e, 0x44,\r
+       0x9, 0xd5, 0x40, 0x39, 0x92, 0x9a, 0xa3, 0x6d, 0xa8, 0xd,\r
+       0x29, 00, 0x7c, 0xd, 0x50, 0x2, 0x99, 0xa0, 0xc, 0xea,\r
+       0xba, 0xae, 0xea, 0x6a, 0xd, 0x97, 0x87, 0xac, 0x99, 0xd8,\r
+       0xa6, 0x6e, 0xca, 0x5a, 0x6a, 0xc9, 0x6f, 0x24, 0x7a, 0x22,\r
+       0xd8, 0xa0, 0x86, 0xd5, 0x1a, 0x3f, 0x5e, 0xa3, 0x6f, 0x20,\r
+       0x92, 0xad, 0xc5, 0x57, 0x8, 0x71, 0xc8, 0xab, 0x55, 0x18,\r
+       0x9c, 0x64, 0xfa, 0x64, 0xa4, 0xf0, 0x5, 0x16, 0x20, 0x93,\r
+       0x4, 00, 0x1, 0x14, 0xf0, 0xb0, 0x10, 0xfb, 0xb0, 0x23,\r
+       0x70, 0x65, 0x98, 0xf7, 0x95, 0xe9, 0x66, 0x9b, 0x33, 0x6,\r
+       0x9, 0xd5, 0x39, 0xa2, 0x49, 0xaa, 0x2b, 0xf9, 0xca, 0xa2,\r
+       0x53, 0xe4, 0x36, 0xc3, 00, 0x94, 0x95, 0xa6, 0xad, 0x7a,\r
+       0x54, 0x8, 0xb6, 0x20, 0xa1, 0x99, 0x79, 0x9e, 0xf8, 0x25,\r
+       0xae, 0x24, 0x32, 0xd, 0x1e, 0xb0, 00, 0x6, 0x40, 0x93,\r
+       0xd4, 0x5, 0x1, 0xed, 0xff, 0x17, 0x86, 0x4, 0x96, 0x6e,\r
+       0x69, 0xd6, 0x6b, 0xbb, 0xca, 0xb1, 0xaf, 0xa6, 0x22, 0x5d,\r
+       0xaa, 0xb, 0x92, 0x16, 0xb2, 0x80, 0x30, 0x3f, 0xc3, 0x68,\r
+       0xe, 0x96, 0xa6, 0x45, 0xab, 0x93, 0xb2, 0xde, 0xa2, 0x99,\r
+       0xbe, 0xda, 0x2, 0x8b, 0x20, 0x75, 0xca, 0xa0, 0x80, 0x5a,\r
+       0xc9, 0x3d, 0x36, 0x6b, 0x9a, 0xf1, 0x9a, 0x6e, 0xe9, 0x30,\r
+       0x6d, 0x32, 0x27, 0xa2, 0x37, 0x76, 0xaf, 0xfa, 0x37, 0xc,\r
+       0x8b, 0xa3, 0x82, 0x32, 0x85, 0xa, 0xd5, 00, 0x97, 0xe1,\r
+       0xa0, 0x94, 0x1d, 0x4, 0x8, 0x7d, 00, 0x9, 0xbd, 0xe0,\r
+       0xb5, 0x2b, 0xdb, 0xab, 0xe8, 0x9, 0x75, 0x51, 0x5b, 0x59,\r
+       0x54, 0x5b, 0xb5, 0x49, 0x73, 0xb5, 0xa3, 0xd5, 0x60, 0xab,\r
+       0x23, 0xaf, 0xea, 0xc0, 0xd, 0x43, 0xdb, 0x3a, 0x14, 0xb6,\r
+       0x60, 0xd0, 0xa, 0xb4, 0xd7, 0x10, 0x40, 0xdc, 0xba, 0xad,\r
+       0x33, 0x55, 0x5c, 0x24, 0x92, 0xd, 0x8a, 0x10, 0x85, 0x23,\r
+       0x84, 0x35, 0x8d, 0xc0, 0x9, 0x90, 0x2a, 0x6e, 0x2c, 0x2b,\r
+       0x62, 0xe9, 0x59, 0xb7, 0x23, 0x32, 0xb5, 0x78, 0xeb, 0x39,\r
+       0x7a, 0x8b, 0x79, 0x7c, 0x2b, 0x8, 0x47, 0x5a, 0x31, 0x6a,\r
+       0x1b, 0xab, 0x82, 0x10, 0x9e, 0xca, 0x77, 0x9b, 0x3f, 0x15,\r
+       0xa7, 0x1f, 0x52, 0xd, 0xa9, 0xa, 0xb2, 0xaf, 0xb3, 0x37,\r
+       0x8d, 0x80, 0xa, 0xc3, 00, 0xb7, 0xad, 0x8b, 0xa, 0x1f,\r
+       0x3, 0x3d, 0x89, 0x6b, 0xba, 0xdc, 0x46, 0x9, 0xa8, 0xf0,\r
+       0x83, 0x26, 0x12, 0xae, 0x74, 0x2b, 0x75, 0xd6, 0x30, 0x2,\r
+       0x11, 0x10, 0x1, 0x12, 0x90, 0xbc, 0xca, 0xbb, 0xbc, 0x12,\r
+       0x80, 0xbc, 0x21, 00, 0x76, 0x78, 0x54, 0xd, 0xb2, 0x80,\r
+       0xa, 0xad, 0x50, 0xbd, 0xd6, 0x7b, 0xbd, 0xdf, 0xa, 0x2b,\r
+       0xc1, 0x40, 0xbd, 0xd7, 0xdb, 0xbd, 0xad, 0x90, 0x72, 0x24,\r
+       0xff, 0x32, 0xe, 0xb6, 0xc0, 0xbd, 0xde, 0x5b, 0xbd, 0x35,\r
+       0x2a, 0x24, 0xe0, 0x30, 0xc, 0xb2, 0xd0, 0xa, 0xa0, 0x90,\r
+       0x4e, 0x18, 0xa5, 0x8, 0x8d, 00, 0xa, 0x36, 0xb3, 0xa0,\r
+       0x29, 0x2, 0xe, 0xc7, 0x70, 0x76, 0xad, 0xa0, 0xaa, 0xc,\r
+       0x85, 0x51, 0xcf, 0x14, 0xbf, 0xad, 0x10, 0x36, 0x64, 0x29,\r
+       0x71, 0x4e, 0x3b, 0xb7, 0x17, 0xa7, 0xb9, 0x2, 0x62, 0xd,\r
+       0x87, 0x80, 0x7, 0x73, 0x80, 0x7, 0x60, 0x77, 0xe, 0xab,\r
+       0x42, 0xc, 0x10, 0x1c, 0xc1, 0x12, 0x2c, 0xc1, 0xd3, 0x90,\r
+       0x9f, 0xe9, 0x50, 0xe, 0x18, 0x9c, 0xc1, 0x1a, 0x8c, 0xc1,\r
+       0x52, 0x67, 0xe, 0x1b, 0xfc, 0xc1, 0x18, 0xc, 0xa0, 0x3,\r
+       0x2, 0xc2, 0x1b, 0xec, 0x25, 0xe8, 0x90, 0xd, 0xc7, 0xf0,\r
+       0xb, 0x2a, 0xbc, 0xc2, 0x2b, 0x3c, 0xc, 0xdf, 0xe6, 0xac,\r
+       0x40, 0x9a, 0xd, 0xd0, 0x30, 0xc, 0x2c, 0x5c, 0xc3, 0x62,\r
+       0xf3, 0x6d, 0xf5, 0xda, 0x82, 0x4f, 0x57, 0xc0, 0x3d, 0x93,\r
+       0x9, 0x18, 0x90, 00, 0x9, 0xb0, 00, 0x5a, 0x50, 0x9a,\r
+       0x9b, 0x52, 0xc4, 0x46, 0x7c, 0xc4, 0x13, 0x3a, 0xc0, 0x2d,\r
+       0x3b, 0xbc, 0x1c, 0xf2, 0x7, 0x95, 0xfa, 0x3, 0x11, 0x99,\r
+       0x2a, 0xd6, 0x60, 0xd, 0xda, 0xf0, 0xa3, 0x48, 0x7c, 0xc5,\r
+       0x58, 0x2c, 0x27, 0xc2, 0xcb, 0xc3, 0x1c, 0x72, 0x8, 0x3c,\r
+       0x24, 00, 0x50, 0x4c, 0x44, 0x3f, 0xb0, 0x1, 0x1b, 0x50,\r
+       0x2, 0x52, 0x93, 0xc5, 0x68, 0x9c, 0xc6, 0x70, 0xa6, 0xc4,\r
+       0x98, 0xcb, 0xc4, 0x1b, 0xe2, 0xc5, 0xf, 0x74, 0x4, 0x11,\r
+       0xc9, 0xb9, 00, 0xa0, 00, 0x6e, 0xa0, 0xc6, 0x78, 0x9c,\r
+       0xc7, 0xc1, 0xc6, 0xc6, 0x4d, 0x96, 0xb9, 0x3d, 0xe3, 0xc4,\r
+       0xf, 0x4, 0x3, 0xf9, 0x32, 0xd, 0x15, 0x80, 0x34, 0xb,\r
+       0x30, 0x7, 0x7a, 0x9c, 0xc8, 0x8a, 0xff, 0x6c, 0xb9, 0x72,\r
+       0xbb, 0xc4, 0x5c, 0xfc, 0xc6, 0x5, 0x9, 00, 0x14, 0xf0,\r
+       0x8, 0xe7, 0x40, 0xc7, 0x76, 0x6c, 0xc5, 0x8b, 0x9c, 0xc9,\r
+       0x8b, 0xbc, 0xc5, 0x50, 0xdb, 0x33, 0xc7, 0x14, 0x55, 0x1,\r
+       0xd0, 00, 0x3f, 0x90, 0x3, 0x9c, 0x4, 00, 0x4, 0xe0,\r
+       0x1, 0x5a, 0xf0, 0x5, 0xaa, 0xbc, 0xca, 0xac, 0x8c, 0x7,\r
+       0x69, 0x5a, 0x2f, 0x9, 0x9b, 0xca, 0xac, 0x3c, 0xcb, 0xb4,\r
+       0x5c, 0xcb, 0xb6, 0x7c, 0xcb, 0xb8, 0x9c, 0xcb, 0xba, 0xbc,\r
+       0xcb, 0xbc, 0xdc, 0xcb, 0xbe, 0xfc, 0xcb, 0xc0, 0x5c, 0xcb,\r
+       0x6a, 00, 0xc, 0x98, 0xcc, 0xc9, 0x6, 0x1c, 0x20, 0xda,\r
+       0x30, 0x2, 0x34, 0x49, 0xb3, 0x55, 0x1b, 0x1, 0x37, 0x4b,\r
+       0x44, 0x75, 0xd4, 0xb9, 0xd2, 0x3c, 0xcd, 0xd4, 0x5c, 0xcd,\r
+       0xd6, 0x7c, 0xcd, 0xd8, 0x9c, 0xcd, 0xda, 0xac, 0x95, 0x7,\r
+       0xa0, 0x5, 0xc5, 0xcc, 0xc7, 0x72, 0xe6, 0xc7, 0x1d, 0xa2,\r
+       0x5, 0xe4, 0x87, 0xcd, 0x9f, 0x6b, 0xd, 0x26, 0xe0, 0x78,\r
+       0xdb, 0xbc, 0xce, 0xec, 0xdc, 0xce, 0xee, 0xfc, 0xce, 0xed,\r
+       0x6c, 00, 0x54, 0xf0, 0xcd, 0x97, 0xdb, 0xc7, 0x6e, 0xbc,\r
+       0x21, 0xc7, 0xa4, 0xce, 0xd7, 0x7c, 0xce, 0xe9, 0xc, 0xcf,\r
+       0xfe, 0xfc, 0xcf, 00, 0x1d, 0xd0, 0xec, 0x7c, 00, 0xf3,\r
+       0x1c, 0xb7, 0x5, 0x3b, 0xa6, 0xc7, 0x2c, 0x20, 0x7f, 0x80,\r
+       0x1, 0x6, 0x30, 00, 0xfa, 0x3c, 0xcd, 0xec, 0x17, 0x20,\r
+       0xd6, 0x50, 0x2, 0xcc, 0x2c, 0xd0, 0x16, 0x7d, 0xd1, 0x18,\r
+       0xed, 0xcf, 0x5, 0x50, 0xd0, 0xbf, 0x79, 0xd0, 0x4f, 0x9b,\r
+       0xd0, 0x2, 0x82, 0xb, 0x4d, 0x80, 0x90, 0x12, 0x50, 00,\r
+       0xa0, 0x3c, 00, 0x5, 0x90, 0xd2, 0x2a, 0xbd, 0xd2, 0x5,\r
+       0x50, 0x1, 0xdd, 0x8, 0x20, 0xd6, 0x90, 0x3, 0x7, 0x40,\r
+       00, 0x2c, 0xff, 0x5d, 0xd3, 0x36, 0x7d, 0xd3, 0x38, 0x9d,\r
+       0xd3, 0x3a, 0xbd, 0xd3, 0x3c, 0xdd, 0xd3, 0x3e, 0xfd, 0xd3,\r
+       0x40, 0x1d, 0xd4, 0x3b, 0xcd, 00, 0x5f, 0x40, 0xcf, 0x8d,\r
+       0xdc, 0xc6, 0x8f, 0xfc, 0x21, 0xed, 0xf6, 0x8, 0x3f, 00,\r
+       0x8b, 0x6, 0xf0, 0x1, 0x54, 0x10, 0xd5, 0x52, 0x3d, 0xd5,\r
+       0x54, 0x40, 0x8d, 0x1, 0x42, 0xe, 0xa4, 0xa0, 0x5, 0x54,\r
+       0xbd, 0xd5, 0x5c, 0xdd, 0xd5, 0x5e, 0xfd, 0xd5, 0x60, 0x1d,\r
+       0xd6, 0x62, 0x3d, 0xd6, 0x64, 0x5d, 0xd6, 0x66, 0x7d, 0xd6,\r
+       0x62, 0x3d, 0x6, 0xb8, 0x60, 0xd4, 0x1e, 0x4d, 0xc0, 0x9d,\r
+       0xfc, 0xb2, 0x54, 0xab, 00, 0x88, 0xac, 0xc9, 0x74, 0xad,\r
+       0xc9, 0xc6, 0x2c, 0xb5, 0x15, 0x30, 0x3a, 0xc, 0x30, 0xd7,\r
+       0x75, 0xdd, 0xd7, 0x7a, 0x7c, 0xd7, 0x24, 0x12, 0xd3, 0x1b,\r
+       0xa0, 0x1, 0x23, 0xf0, 0x97, 0x7e, 0x7d, 0xd8, 0x68, 0xc,\r
+       0xd8, 0xb, 0x34, 0xc5, 0xdf, 0x40, 0xc4, 0x88, 0xfd, 0xd8,\r
+       0x47, 0xac, 0xd8, 0x90, 0x3d, 0xd9, 0x7d, 0x2d, 0xd9, 0x94,\r
+       0x7d, 0xd9, 0x9b, 0xc, 0xce, 0x9, 0x1, 0x4, 0xe9, 0xe9,\r
+       0x7, 0x22, 0x8c, 0xd9, 0xa0, 0xbd, 0x29, 0xce, 00, 0x6,\r
+       0xcf, 0xe1, 0x82, 0xe, 0x61, 0x6, 0xab, 0xe1, 0x13, 0x67,\r
+       0x10, 0xd, 0xa1, 0xdd, 0xda, 0x6a, 0x9c, 0xe, 0xc2, 0x60,\r
+       0x20, 0x3e, 0x21, 0x23, 0x13, 0x51, 0x9, 0x3c, 00, 0x23,\r
+       0x28, 0xb0, 0x3, 0xa3, 0xf0, 0x1f, 0xd2, 0x82, 0xe, 0xbe,\r
+       0xfd, 0xdb, 0xc0, 0x1d, 0xdc, 0xc2, 0x3d, 0xdc, 0xc4, 0x5d,\r
+       0xdc, 0xc6, 0x7d, 0xdc, 0xc1, 0xed, 0xc1, 0x24, 0xbc, 0xdc,\r
+       0xcc, 0xdd, 0xdc, 0xce, 0xfd, 0xdc, 0xcc, 0x2d, 0xe, 0xd2,\r
+       0x3d, 0xdd, 0xd4, 0x5d, 0xdd, 0xd6, 0x7d, 0xdd, 0xd8, 0x9d,\r
+       0xdd, 0xda, 0xbd, 0xdd, 0xd4, 0xbd, 0xd, 0xaf, 0xff, 0x80,\r
+       0x6, 0x2d, 00, 0x23, 0x2a, 0x40, 0xdb, 0x12, 0x81, 0xc,\r
+       0x3b, 0xc0, 0x17, 0x2a, 0xc0, 0x5, 0xa3, 0x90, 0xc, 0xc2,\r
+       0x50, 0x9, 0xee, 0xfd, 0xde, 0xf0, 0x1d, 0xdf, 0xf2, 0x3d,\r
+       0xdf, 0xf4, 0x5d, 0xdf, 0xf6, 0x7d, 0xdf, 0xf3, 0xbd, 0x8,\r
+       0x7a, 0x90, 0x7, 0x7a, 0xd0, 0xdf, 0xfe, 0xfd, 0xdf, 00,\r
+       0x1e, 0xe0, 0x2, 0x3e, 0xe0, 0x4, 0x5e, 0xe0, 0x6, 0x1e,\r
+       0xe0, 0x77, 0x90, 0xe0, 0xa, 0xbe, 0xe0, 0xc, 0xde, 0xe0,\r
+       0xe, 0xfe, 0xe0, 0x10, 0x1e, 0xe1, 0x12, 0xbe, 0xe0, 0x6f,\r
+       0x80, 0x4, 0x9a, 0xd1, 0x15, 0x5b, 0x40, 0x11, 0xa5, 0xb0,\r
+       0x4, 0x7b, 0x1, 0x1d, 0x45, 0xc0, 0x5, 0x52, 0xe0, 0x3,\r
+       0x22, 0x3e, 0xe2, 0x24, 0x5e, 0xe2, 0x26, 0x7e, 0xe2, 0x28,\r
+       0x9e, 0xe2, 0x2a, 0xbe, 0xe2, 0x27, 0x6e, 0x3, 0x72, 0xf1,\r
+       0xe2, 0x30, 0x1e, 0xe3, 0x32, 0x3e, 0xe3, 0x61, 0x71, 0xe1,\r
+       0x28, 0x40, 0x3, 0x8c, 0x40, 0x11, 0xac, 0x90, 0x8, 0xb7,\r
+       0xbd, 0x19, 0x7d, 0xd1, 0x13, 0x40, 0x1e, 0xe4, 0x42, 0x3e,\r
+       0xe4, 0x44, 0x5e, 0xe4, 0x46, 0x7e, 0xe4, 0x48, 0x9e, 0xe4,\r
+       0x4a, 0xbe, 0xe4, 0x4c, 0xde, 0xe4, 0x4e, 0xfe, 0xe4, 0x50,\r
+       0x1e, 0xe5, 0x47, 0xbe, 0x19, 0x5b, 0x61, 0x7, 0xa7, 0x50,\r
+       0x11, 0xc8, 0x40, 0x7, 0x4e, 0xe0, 0x15, 0x3e, 0x2e, 0x15,\r
+       0x5e, 0xfe, 0xe5, 0x60, 0x1e, 0xe6, 0x62, 0xde, 0x15, 0x34,\r
+       0x5e, 0xe6, 0x30, 0x7e, 0x3, 0x4f, 0x10, 0x6, 0xb0, 0xb0,\r
+       0xb, 0x16, 0xc1, 0xc, 0x8c, 0x10, 0x5, 0x3d, 0x20, 0x13,\r
+       0x72, 0x3e, 0xe7, 0x74, 0x5e, 0xe7, 0x76, 0x2e, 0x12, 0x41,\r
+       0x30, 0x4, 0x7a, 0xbe, 0xe7, 0x7c, 0xde, 0xe7, 0x7e, 0xfe,\r
+       0xe7, 0x80, 0x1e, 0xe8, 0x82, 0x3e, 0xe8, 0x7f, 0x3e, 0x5,\r
+       0x57, 0x50, 0x5, 0x53, 0x4a, 0xe0, 0x5, 0x5d, 0x60, 0x9,\r
+       0xd2, 0xc0, 0xe6, 0x17, 0x11, 0xb, 0xaa, 0x40, 0x6, 0x44,\r
+       0x30, 0xe9, 0x94, 0x5e, 0xe9, 0x96, 0x7e, 0xe9, 0x98, 0x9e,\r
+       0xe9, 0x9a, 0xbe, 0xe9, 0x9c, 0xde, 0xe9, 0x9e, 0xfe, 0xe9,\r
+       0xa0, 0x1e, 0xea, 0x9b, 0x2e, 0x6, 0x6d, 0x50, 0xea, 0xa6,\r
+       0x7e, 0xea, 0xa8, 0x9e, 0xea, 0xaa, 0xbe, 0xea, 0xac, 0xde,\r
+       0xea, 0xae, 0x8e, 0xea, 0x6c, 0x10, 0x7, 0xa2, 0xe0, 0xb,\r
+       0xa9, 0xa0, 0x9, 0xcf, 0xe0, 0xe8, 0x16, 0x11, 0x10, 00,\r
+       0x3b, 0};\r
+\r
+const struct httpd_fsdata_file file_404_html[] = {{NULL, data_404_html, data_404_html + 10, sizeof(data_404_html) - 10}};\r
+\r
+const struct httpd_fsdata_file file_index_html[] = {{file_404_html, data_index_html, data_index_html + 12, sizeof(data_index_html) - 12}};\r
+\r
+const struct httpd_fsdata_file file_logo_gif[] = {{file_index_html, data_logo_gif, data_logo_gif + 10, sizeof(data_logo_gif) - 10}};\r
+\r
+#define HTTPD_FS_ROOT file_logo_gif\r
+\r
+#define HTTPD_FS_NUMFILES 3\r

diff --git a/Demo/ARM9_STR91X_IAR/lwip/lwipWebServer/httpd.c b/Demo/ARM9_STR91X_IAR/lwip/lwipWebServer/httpd.c
new file mode 100644 (file)
index 0000000..b9589d3
--- /dev/null
+++ b/Demo/ARM9_STR91X_IAR/lwip/lwipWebServer/httpd.c
@@ -0,0 +1,244 @@
+/*\r
+ * Copyright (c) 2001-2003 Swedish Institute of Computer Science.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without modification,\r
+ * are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ *    this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ *    this list of conditions and the following disclaimer in the documentation\r
+ *    and/or other materials provided with the distribution.\r
+ * 3. The name of the author may not be used to endorse or promote products\r
+ *    derived from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT\r
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,\r
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT\r
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\r
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\r
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING\r
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY\r
+ * OF SUCH DAMAGE.\r
+ *\r
+ * This file is part of the lwIP TCP/IP stack.\r
+ *\r
+ * Author: Adam Dunkels <adam@sics.se>\r
+ *\r
+ */\r
+\r
+#include "lwip/debug.h"\r
+#include "lwip/stats.h"\r
+#include "httpd.h"\r
+#include "lwip/tcp.h"\r
+#include "fs.h"\r
+\r
+#include <string.h>\r
+\r
+#pragma pack(2)\r
+struct http_state {\r
+  char *file;\r
+  u32_t left;\r
+  u8_t retries;\r
+};\r
+#pragma pack()\r
+\r
+/*-----------------------------------------------------------------------------------*/\r
+void conn_err(void *arg, err_t err)\r
+{\r
+  struct http_state *hs;\r
+\r
+  hs = arg;\r
+  mem_free(hs);\r
+}\r
+/*-----------------------------------------------------------------------------------*/\r
+static void\r
+close_conn(struct tcp_pcb *pcb, struct http_state *hs)\r
+{\r
+  tcp_arg(pcb, NULL);\r
+  tcp_sent(pcb, NULL);\r
+  tcp_recv(pcb, NULL);\r
+  mem_free(hs);\r
+  tcp_close(pcb);\r
+}\r
+/*-----------------------------------------------------------------------------------*/\r
+static void\r
+send_data(struct tcp_pcb *pcb, struct http_state *hs)\r
+{\r
+  err_t err;\r
+  u16_t len;\r
+\r
+  /* We cannot send more data than space available in the send\r
+     buffer. */\r
+  if (tcp_sndbuf(pcb) < hs->left) {\r
+    len = tcp_sndbuf(pcb);\r
+  } else {\r
+    len = hs->left;\r
+  }\r
+\r
+  do {\r
+    err = tcp_write(pcb, hs->file, len, 0);\r
+    if (err == ERR_MEM) {\r
+      len /= 2;\r
+    }\r
+  } while (err == ERR_MEM && len > 1);\r
+\r
+  if (err == ERR_OK) {\r
+    hs->file += len;\r
+    hs->left -= len;\r
+    /*  } else {\r
+       printf("send_data: error %s len %d %d\n", lwip_strerr(err), len, tcp_sndbuf(pcb));*/\r
+  }\r
+}\r
+/*-----------------------------------------------------------------------------------*/\r
+err_t http_poll(void *arg, struct tcp_pcb *pcb)\r
+{\r
+  struct http_state *hs;\r
+\r
+  hs = arg;\r
+\r
+  /*  printf("Polll\n");*/\r
+  if (hs == NULL) {\r
+    /*    printf("Null, close\n");*/\r
+    tcp_abort(pcb);\r
+    return ERR_ABRT;\r
+  } else {\r
+    ++hs->retries;\r
+    if (hs->retries == 4) {\r
+      tcp_abort(pcb);\r
+      return ERR_ABRT;\r
+    }\r
+    send_data(pcb, hs);\r
+  }\r
+\r
+  return ERR_OK;\r
+}\r
+/*-----------------------------------------------------------------------------------*/\r
+err_t http_sent(void *arg, struct tcp_pcb *pcb, u16_t len)\r
+{\r
+  struct http_state *hs;\r
+\r
+  hs = arg;\r
+\r
+  hs->retries = 0;\r
+\r
+  if (hs->left > 0) {\r
+    send_data(pcb, hs);\r
+  } else {\r
+    close_conn(pcb, hs);\r
+  }\r
+\r
+  return ERR_OK;\r
+}\r
+/*-----------------------------------------------------------------------------------*/\r
+err_t http_recv(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err)\r
+{\r
+  int i;\r
+  char *data;\r
+  struct fs_file file;\r
+  struct http_state *hs;\r
+\r
+  hs = arg;\r
+\r
+  if (err == ERR_OK && p != NULL) {\r
+\r
+    /* Inform TCP that we have taken the data. */\r
+    tcp_recved(pcb, p->tot_len);\r
+\r
+    if (hs->file == NULL) {\r
+      data = p->payload;\r
+\r
+      if (strncmp(data, "GET ", 4) == 0) {\r
+        for(i = 0; i < 40; i++) {\r
+          if (((char *)data + 4)[i] == ' ' ||\r
+             ((char *)data + 4)[i] == '\r' ||\r
+             ((char *)data + 4)[i] == '\n') {\r
+            ((char *)data + 4)[i] = 0;\r
+          }\r
+        }\r
+\r
+        if (*(char *)(data + 4) == '/' &&\r
+           *(char *)(data + 5) == 0) {\r
+          fs_open("/index.html", &file);\r
+        }\r
+        else {\r
+          if (!fs_open((char *)data + 4, &file)) {\r
+            fs_open("/404.html", &file);       \r
+          }\r
+        }\r
+        hs->file = file.data;\r
+        hs->left = file.len;\r
+        /*     printf("data %p len %ld\n", hs->file, hs->left);*/\r
+\r
+        pbuf_free(p);\r
+        send_data(pcb, hs);\r
+\r
+        /* Tell TCP that we wish be to informed of data that has been\r
+           successfully sent by a call to the http_sent() function. */\r
+        tcp_sent(pcb, http_sent);\r
+      } else {\r
+        pbuf_free(p);\r
+        close_conn(pcb, hs);\r
+      }\r
+    } else {\r
+      pbuf_free(p);\r
+   }\r
+  }\r
+\r
+  if (err == ERR_OK && p == NULL) {\r
+    close_conn(pcb, hs);\r
+  }\r
+  return ERR_OK;\r
+}\r
+/*-----------------------------------------------------------------------------------*/\r
+err_t http_accept(void *arg, struct tcp_pcb *pcb, err_t err)\r
+{\r
+  struct http_state *hs;\r
+\r
+  tcp_setprio(pcb, TCP_PRIO_MIN);\r
+\r
+  /* Allocate memory for the structure that holds the state of the\r
+     connection. */\r
+  hs = mem_malloc(sizeof(struct http_state));\r
+\r
+  if (hs == NULL) {\r
+//    printf("http_accept: Out of memory\n");\r
+    return ERR_MEM;\r
+  }\r
+\r
+  /* Initialize the structure. */\r
+  hs->file = NULL;\r
+  hs->left = 0;\r
+  hs->retries = 0;\r
+\r
+  /* Tell TCP that this is the structure we wish to be passed for our\r
+     callbacks. */\r
+  tcp_arg(pcb, hs);\r
+\r
+\r
+  /* Tell TCP that we wish to be informed of incoming data by a call\r
+     to the http_recv() function. */\r
+  tcp_recv(pcb, http_recv);\r
+\r
+  tcp_err(pcb, conn_err);\r
+\r
+  tcp_poll(pcb, http_poll, 4);\r
+\r
+  return ERR_OK;\r
+}\r
+\r
+/*-----------------------------------------------------------------------------------*/\r
+void httpd_init(void)\r
+{\r
+  struct tcp_pcb *pcb;\r
+\r
+  pcb = tcp_new();\r
+  tcp_bind(pcb, NULL, 80);\r
+  pcb = tcp_listen(pcb);\r
+  tcp_accept(pcb, http_accept);\r
+}\r
+/*-----------------------------------------------------------------------------------*/\r
+\r

diff --git a/Demo/ARM9_STR91X_IAR/lwip/netif/ethernetif.c b/Demo/ARM9_STR91X_IAR/lwip/netif/ethernetif.c
new file mode 100644 (file)
index 0000000..8279e35
--- /dev/null
+++ b/Demo/ARM9_STR91X_IAR/lwip/netif/ethernetif.c
@@ -0,0 +1,436 @@
+/*\r
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without modification,\r
+ * are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ *    this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ *    this list of conditions and the following disclaimer in the documentation\r
+ *    and/or other materials provided with the distribution.\r
+ * 3. The name of the author may not be used to endorse or promote products\r
+ *    derived from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT\r
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,\r
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT\r
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\r
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\r
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING\r
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY\r
+ * OF SUCH DAMAGE.\r
+ *\r
+ * This file is part of the lwIP TCP/IP stack.\r
+ *\r
+ * Author: Adam Dunkels <adam@sics.se>\r
+ *\r
+ */\r
+\r
+/*\r
+ * This file is a skeleton for developing Ethernet network interface\r
+ * drivers for lwIP. Add code to the low_level functions and do a\r
+ * search-and-replace for the word "ethernetif" to replace it with\r
+ * something that better describes your network interface.\r
+ */\r
+\r
+#include "lwip/opt.h"\r
+#include "lwip/def.h"\r
+#include "lwip/mem.h"\r
+#include "lwip/pbuf.h"\r
+#include "lwip/sys.h"\r
+#include <lwip/stats.h>\r
+\r
+#include "netif/etharp.h"\r
+#include "91x_enet.h"\r
+\r
+// Standard library include\r
+#include <string.h>\r
+\r
+#define netifMTU                               ( 1500 )\r
+#define netifINTERFACE_TASK_STACK_SIZE         ( 350 )\r
+#define netifINTERFACE_TASK_PRIORITY           ( configMAX_PRIORITIES - 1 )\r
+#define netifGUARD_BLOCK_TIME                  ( 250 )\r
+#define IFNAME0 'e'\r
+#define IFNAME1 'm'\r
+\r
+/* The time to block waiting for input. */\r
+#define emacBLOCK_TIME_WAITING_FOR_INPUT       ( ( portTickType ) 100 )\r
+\r
+/* Interrupt status bit definition. */\r
+#define DMI_RX_CURRENT_DONE 0x8000\r
+\r
+extern u8 TxBuff[1520];\r
+\r
+static u8_t s_rxBuff[1520];\r
+\r
+/* The semaphore used by the ISR to wake the lwIP task. */\r
+static xSemaphoreHandle s_xSemaphore = NULL;\r
+\r
+struct ethernetif {\r
+  struct eth_addr *ethaddr;\r
+  /* Add whatever per-interface state that is needed here. */\r
+};\r
+\r
+static struct netif *s_pxNetIf = NULL;\r
+\r
+/* Forward declarations. */\r
+static err_t ethernetif_output(struct netif *netif, struct pbuf *p, struct ip_addr *ipaddr);\r
+static void ethernetif_input( void * pvParameters );\r
+static void vEMACWaitForInput( void );\r
+\r
+\r
+\r
+static void low_level_init(struct netif *netif)\r
+{\r
+  /* set MAC hardware address length */\r
+  netif->hwaddr_len = 6;\r
+\r
+  /* set MAC hardware address */\r
+  netif->hwaddr[0] = MAC_ADDR0;\r
+  netif->hwaddr[1] = MAC_ADDR1;\r
+  netif->hwaddr[2] = MAC_ADDR2;\r
+  netif->hwaddr[3] = MAC_ADDR3;\r
+  netif->hwaddr[4] = MAC_ADDR4;\r
+  netif->hwaddr[5] = MAC_ADDR5;\r
+\r
+  /* maximum transfer unit */\r
+  netif->mtu = netifMTU;\r
+\r
+  /* broadcast capability */\r
+  netif->flags = NETIF_FLAG_BROADCAST;\r
+\r
+  s_pxNetIf = netif;\r
+\r
+  if( s_xSemaphore == NULL )\r
+  {\r
+      vSemaphoreCreateBinary( s_xSemaphore );\r
+      xSemaphoreTake( s_xSemaphore,  0);\r
+  }\r
+\r
+  /* Do whatever else is needed to initialize interface. */\r
+  /* Initialise the MAC. */\r
+  ENET_InitClocksGPIO();\r
+  ENET_Init();\r
+  ENET_Start();\r
+       \r
+  portENTER_CRITICAL();\r
+  {\r
+      /*set MAC physical*/\r
+      ENET_MAC->MAH = (MAC_ADDR5<<8) + MAC_ADDR4;\r
+      ENET_MAC->MAL = (MAC_ADDR3<<24) + (MAC_ADDR2<<16) + (MAC_ADDR1<<8) + MAC_ADDR0;\r
+       \r
+      VIC_Config( ENET_ITLine, VIC_IRQ, 1 );\r
+      VIC_ITCmd( ENET_ITLine, ENABLE );        \r
+      ENET_DMA->ISR = DMI_RX_CURRENT_DONE;\r
+      ENET_DMA->IER = DMI_RX_CURRENT_DONE;\r
+  }\r
+  portEXIT_CRITICAL();\r
+\r
+  /* Create the task that handles the EMAC. */\r
+  xTaskCreate( ethernetif_input, ( signed portCHAR * ) "ETH_INT", netifINTERFACE_TASK_STACK_SIZE, NULL, netifINTERFACE_TASK_PRIORITY, NULL );\r
+}      \r
+\r
+\r
+/*\r
+ * low_level_output():\r
+ *\r
+ * Should do the actual transmission of the packet. The packet is\r
+ * contained in the pbuf that is passed to the function. This pbuf\r
+ * might be chained.\r
+ *\r
+ */\r
+\r
+static err_t low_level_output(struct netif *netif, struct pbuf *p)\r
+{\r
+  static xSemaphoreHandle xTxSemaphore = NULL;\r
+  struct pbuf *q;\r
+  u32_t l = 0;\r
+\r
+  if( xTxSemaphore == NULL )\r
+  {\r
+      vSemaphoreCreateBinary( xTxSemaphore );\r
+  }\r
+\r
+\r
+#if ETH_PAD_SIZE\r
+  pbuf_header(p, -ETH_PAD_SIZE);                       /* drop the padding word */\r
+#endif\r
+\r
+\r
+  /* Access to the EMAC is guarded using a semaphore. */\r
+  if( xSemaphoreTake( xTxSemaphore, netifGUARD_BLOCK_TIME ) )\r
+  {\r
+      for(q = p; q != NULL; q = q->next) {\r
+        /* Send the data from the pbuf to the interface, one pbuf at a\r
+           time. The size of the data in each pbuf is kept in the ->len\r
+           variable. */\r
+        memcpy(&TxBuff[l], (u8_t*)q->payload, q->len);\r
+        l += q->len;\r
+      }\r
+\r
+      ENET_TxPkt(0, l);\r
+\r
+      #if ETH_PAD_SIZE\r
+        pbuf_header(p, ETH_PAD_SIZE);                  /* reclaim the padding word */\r
+      #endif\r
+\r
+      #if LINK_STATS\r
+        lwip_stats.link.xmit++;\r
+      #endif /* LINK_STATS */\r
+\r
+      xSemaphoreGive( xTxSemaphore );\r
+  }\r
+\r
+  return ERR_OK;\r
+}\r
+\r
+/*\r
+ * low_level_input():\r
+ *\r
+ * Should allocate a pbuf and transfer the bytes of the incoming\r
+ * packet from the interface into the pbuf.\r
+ *\r
+ */\r
+\r
+static struct pbuf *\r
+low_level_input(struct netif *netif)\r
+{\r
+  static xSemaphoreHandle xRxSemaphore = NULL;\r
+  struct pbuf *p, *q;\r
+  u16_t len, l;\r
+\r
+  l = 0;\r
+  p = NULL;\r
+\r
+  if( xRxSemaphore == NULL )\r
+  {\r
+    vSemaphoreCreateBinary( xRxSemaphore );\r
+  }\r
+\r
+  /* Access to the emac is guarded using a semaphore. */\r
+  if( xSemaphoreTake( xRxSemaphore, netifGUARD_BLOCK_TIME ) )\r
+  {\r
+        /* Obtain the size of the packet and put it into the "len"\r
+           variable. */\r
+        len = ENET_HandleRxPkt(s_rxBuff);\r
+\r
+        if(len)\r
+        {\r
+              #if ETH_PAD_SIZE\r
+                len += ETH_PAD_SIZE;                                           /* allow room for Ethernet padding */\r
+              #endif\r
+\r
+                /* We allocate a pbuf chain of pbufs from the pool. */\r
+                p = pbuf_alloc(PBUF_RAW, len, PBUF_POOL);\r
+\r
+                if (p != NULL) {\r
+\r
+              #if ETH_PAD_SIZE\r
+                  pbuf_header(p, -ETH_PAD_SIZE);                       /* drop the padding word */\r
+              #endif\r
+\r
+                  /* We iterate over the pbuf chain until we have read the entire\r
+                   * packet into the pbuf. */\r
+                  for(q = p; q != NULL; q = q->next) {\r
+                    /* Read enough bytes to fill this pbuf in the chain. The\r
+                     * available data in the pbuf is given by the q->len\r
+                     * variable. */\r
+                    memcpy((u8_t*)q->payload, &s_rxBuff[l], q->len);\r
+                    l = l + q->len;\r
+                  }\r
+\r
+\r
+              #if ETH_PAD_SIZE\r
+                  pbuf_header(p, ETH_PAD_SIZE);                        /* reclaim the padding word */\r
+              #endif\r
+\r
+              #if LINK_STATS\r
+                  lwip_stats.link.recv++;\r
+              #endif /* LINK_STATS */\r
+                } else {\r
+              #if LINK_STATS\r
+                  lwip_stats.link.memerr++;\r
+                  lwip_stats.link.drop++;\r
+              #endif /* LINK_STATS */\r
+                } /* End else */\r
+        } /* End if */\r
+\r
+       xSemaphoreGive( xRxSemaphore );\r
+  }\r
+\r
+  return p;\r
+}\r
+\r
+/*\r
+ * ethernetif_output():\r
+ *\r
+ * This function is called by the TCP/IP stack when an IP packet\r
+ * should be sent. It calls the function called low_level_output() to\r
+ * do the actual transmission of the packet.\r
+ *\r
+ */\r
+\r
+static err_t ethernetif_output(struct netif *netif, struct pbuf *p,  struct ip_addr *ipaddr)\r
+{\r
+\r
+ /* resolve hardware address, then send (or queue) packet */\r
+  return etharp_output(netif, ipaddr, p);\r
+\r
+}\r
+\r
+/*\r
+ * ethernetif_input():\r
+ *\r
+ * This function should be called when a packet is ready to be read\r
+ * from the interface. It uses the function low_level_input() that\r
+ * should handle the actual reception of bytes from the network\r
+ * interface.\r
+ *\r
+ */\r
+\r
+static void ethernetif_input( void * pvParameters )\r
+{\r
+  struct ethernetif *ethernetif;\r
+  struct eth_hdr *ethhdr;\r
+  struct pbuf *p;\r
+\r
+       for( ;; )\r
+       {\r
+               do\r
+               {\r
+                       ethernetif = s_pxNetIf->state;\r
+                       \r
+                       /* move received packet into a new pbuf */\r
+                       p = low_level_input( s_pxNetIf );\r
+                       \r
+                       if( p == NULL )\r
+                       {\r
+                               /* No packet could be read.  Wait a for an interrupt to tell us\r
+                               there is more data available. */\r
+                               vEMACWaitForInput();\r
+                       }\r
+               \r
+               } while( p == NULL );\r
+\r
+               /* points to packet payload, which starts with an Ethernet header */\r
+               ethhdr = p->payload;\r
+\r
+               #if LINK_STATS\r
+                       lwip_stats.link.recv++;\r
+               #endif /* LINK_STATS */\r
+\r
+               ethhdr = p->payload;\r
+\r
+               switch (htons(ethhdr->type))\r
+               {\r
+                       /* IP packet? */\r
+                       case ETHTYPE_IP:\r
+                               /* update ARP table */\r
+                               etharp_ip_input(s_pxNetIf, p);\r
+                               /* skip Ethernet header */\r
+                               pbuf_header(p, (s16_t)-sizeof(struct eth_hdr));\r
+                               /* pass to network layer */\r
+                               s_pxNetIf->input(p, s_pxNetIf);\r
+                               break;\r
+               \r
+                       case ETHTYPE_ARP:\r
+                                 /* pass p to ARP module  */\r
+                                 etharp_arp_input(s_pxNetIf, ethernetif->ethaddr, p);\r
+                                 break;\r
+                               \r
+                       default:\r
+                                 pbuf_free(p);\r
+                                 p = NULL;\r
+                                 break;\r
+               }\r
+       }\r
+}\r
+\r
+static void\r
+arp_timer(void *arg)\r
+{\r
+  etharp_tmr();\r
+  sys_timeout(ARP_TMR_INTERVAL, arp_timer, NULL);\r
+}\r
+\r
+/*\r
+ * ethernetif_init():\r
+ *\r
+ * Should be called at the beginning of the program to set up the\r
+ * network interface. It calls the function low_level_init() to do the\r
+ * actual setup of the hardware.\r
+ *\r
+ */\r
+\r
+err_t\r
+ethernetif_init(struct netif *netif)\r
+{\r
+  struct ethernetif *ethernetif;\r
+\r
+  ethernetif = mem_malloc(sizeof(struct ethernetif));\r
+\r
+  if (ethernetif == NULL)\r
+  {\r
+       LWIP_DEBUGF(NETIF_DEBUG, ("ethernetif_init: out of memory\n"));\r
+       return ERR_MEM;\r
+  }\r
+\r
+#if LWIP_SNMP\r
+       /* ifType ethernetCsmacd(6) @see RFC1213 */\r
+       netif->link_type = 6;\r
+       /* your link speed here */\r
+       netif->link_speed = ;\r
+       netif->ts = 0;\r
+       netif->ifinoctets = 0;\r
+       netif->ifinucastpkts = 0;\r
+       netif->ifinnucastpkts = 0;\r
+       netif->ifindiscards = 0;\r
+       netif->ifoutoctets = 0;\r
+       netif->ifoutucastpkts = 0;\r
+       netif->ifoutnucastpkts = 0;\r
+       netif->ifoutdiscards = 0;\r
+#endif\r
+       \r
+  netif->state = ethernetif;\r
+  netif->name[0] = IFNAME0;\r
+  netif->name[1] = IFNAME1;\r
+  netif->output = ethernetif_output;\r
+  netif->linkoutput = low_level_output;\r
+\r
+  ethernetif->ethaddr = (struct eth_addr *)&(netif->hwaddr[0]);\r
+\r
+  low_level_init(netif);\r
+\r
+  etharp_init();\r
+\r
+  sys_timeout(ARP_TMR_INTERVAL, arp_timer, NULL);\r
+\r
+  return ERR_OK;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void ENET_IRQHandler(void)\r
+{\r
+portBASE_TYPE xSwitchRequired;\r
+\r
+       /* Give the semaphore in case the lwIP task needs waking. */\r
+       xSwitchRequired = xSemaphoreGiveFromISR( s_xSemaphore, pdFALSE );\r
+       \r
+       /* Clear the interrupt. */\r
+       ENET_DMA->ISR = DMI_RX_CURRENT_DONE;\r
+       \r
+       /* Switch tasks if necessary. */        \r
+       portEND_SWITCHING_ISR( xSwitchRequired );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vEMACWaitForInput( void )\r
+{\r
+       /* Just wait until we are signled from an ISR that data is available, or\r
+       we simply time out. */\r
+       xSemaphoreTake( s_xSemaphore, emacBLOCK_TIME_WAITING_FOR_INPUT );\r
+}\r

diff --git a/Demo/ARM9_STR91X_IAR/main.c b/Demo/ARM9_STR91X_IAR/main.c
index bc344e4cac3b3bbca7df18e3abb90ea9cd7ea77c..ef3f32348133c69131d42312555ddd7d096cdcba 100644 (file)
--- a/Demo/ARM9_STR91X_IAR/main.c
+++ b/Demo/ARM9_STR91X_IAR/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS distribution.\r
 \r
@@ -46,27 +46,27 @@
  * documentation provides more details of the demo application tasks.\r
  *\r
  * A few tasks are created that are not part of the standard demo.  These are\r
- * the 'LCD' task, the 'LCD Message' task, a WEB server task and the 'Check' \r
+ * the 'LCD' task, the 'LCD Message' task, a WEB server task and the 'Check'\r
  * task.\r
  *\r
  * The LCD task is the only task that accesses the LCD directly, so mutual\r
  * exclusion is ensured.  Any task wishing to display text sends the LCD task\r
  * a message containing a pointer to the string that should be displayed.\r
- * The LCD task itself just blocks on a queue waiting for such a message to \r
+ * The LCD task itself just blocks on a queue waiting for such a message to\r
  * arrive - processing each in turn.\r
  *\r
  * The LCD Message task does nothing other than periodically send messages to\r
- * the LCD task.  The messages originating from the LCD Message task are \r
+ * the LCD task.  The messages originating from the LCD Message task are\r
  * displayed on the top row of the LCD.\r
  *\r
- * The Check task only executes every three seconds but has the highest \r
- * priority so is guaranteed to get processor time.  Its main function is to \r
- * check that all the other tasks are still operational. Most tasks maintain \r
- * a unique count that is incremented each time the task successfully completes \r
- * a cycle of its function.  Should any error occur within such a task the \r
+ * The Check task only executes every three seconds but has the highest\r
+ * priority so is guaranteed to get processor time.  Its main function is to\r
+ * check that all the other tasks are still operational. Most tasks maintain\r
+ * a unique count that is incremented each time the task successfully completes\r
+ * a cycle of its function.  Should any error occur within such a task the\r
  * count is permanently halted.  The check task sets a bit in an error status\r
  * flag should it find any counter variable at a value that indicates an\r
- * error has occurred.  The error flag value is converted to a string and sent \r
+ * error has occurred.  The error flag value is converted to a string and sent\r
  * to the LCD task for display on the bottom row on the LCD.\r
  */\r
 \r
@@ -93,6 +93,13 @@
 #include "flop.h"\r
 #include "comtest2.h"\r
 #include "serial.h"\r
+#include "GenQTest.h"\r
+#include "QPeek.h"\r
+\r
+#ifdef STACK_LWIP\r
+       #include "BasicWEB.h"\r
+       #include "sys.h"\r
+#endif\r
 \r
 /* Priorities for the demo application tasks. */\r
 #define mainLED_TASK_PRIORITY          ( tskIDLE_PRIORITY + 1 )\r
@@ -103,6 +110,7 @@
 #define mainCOM_TEST_PRIORITY          ( tskIDLE_PRIORITY + 3 )\r
 #define mainLCD_TASK_PRIORITY          ( tskIDLE_PRIORITY + 1 )\r
 #define mainMSG_TASK_PRIORITY          ( tskIDLE_PRIORITY + 1 )\r
+#define mainGENERIC_QUEUE_PRIORITY     ( tskIDLE_PRIORITY )\r
 \r
 /* Delays used by the various tasks defined in this file. */\r
 #define mainCHECK_PERIOD                       ( ( portTickType ) 3000 / portTICK_RATE_MS  )\r
@@ -145,11 +153,14 @@ static void prvSetupHardware( void );
  */\r
 static void prvCheckOtherTasksAreStillRunning( void );\r
 \r
-/*\r
- * The WEB server task prototype.  The task is created in this file but defined\r
- * elsewhere. \r
- */\r
-extern void vuIP_Task(void *pvParameters);\r
+#ifdef STACK_UIP\r
+       /*\r
+        * The WEB server task prototype.  The task is created in this file but defined\r
+        * elsewhere.  STACK_UIP is defined when the uIP stack is used in preference\r
+        * to the lwIP stack.\r
+        */\r
+       extern void vuIP_Task(void *pvParameters);\r
+#endif\r
 \r
 /*\r
  * The task that displays text on the LCD.\r
@@ -183,10 +194,9 @@ void main( void )
        /* Setup any hardware that has not already been configured by the low\r
        level init routines. */\r
        prvSetupHardware();\r
-\r
        /* Create the queue used to send data to the LCD task. */\r
        xLCDQueue = xQueueCreate( mainLCD_QUEUE_LEN, sizeof( xLCDMessage ) );\r
-\r
+       \r
        /* Start all the standard demo application tasks. */\r
        vStartIntegerMathTasks( tskIDLE_PRIORITY );\r
        vStartLEDFlashTasks( mainLED_TASK_PRIORITY );\r
@@ -196,15 +206,27 @@ void main( void )
        vStartDynamicPriorityTasks();\r
        vStartMathTasks( tskIDLE_PRIORITY );\r
        vAltStartComTestTasks( mainCOM_TEST_PRIORITY, mainCOM_TEST_BAUD_RATE, mainCOM_TEST_LED );\r
+       vStartGenericQueueTasks( mainGENERIC_QUEUE_PRIORITY );\r
+       vStartQueuePeekTasks(); \r
 \r
        /* Start the tasks which are defined in this file. */\r
        xTaskCreate( vErrorChecks, "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );\r
        xTaskCreate( prvLCDTask, "LCD", configMINIMAL_STACK_SIZE, ( void * ) &xLCDQueue, mainLCD_TASK_PRIORITY, NULL );\r
        xTaskCreate( prvLCDMessageTask, "MSG", configMINIMAL_STACK_SIZE, ( void * ) &xLCDQueue, mainMSG_TASK_PRIORITY, NULL );\r
 \r
-       /* Finally, create the WEB server task. */\r
-       xTaskCreate( vuIP_Task, "uIP", configMINIMAL_STACK_SIZE * 3, NULL, mainCHECK_TASK_PRIORITY - 1, NULL );\r
-       \r
+       /* Start either the uIP TCP/IP stack or the lwIP TCP/IP stack. */\r
+       #ifdef STACK_UIP\r
+               /* Finally, create the WEB server task. */\r
+               xTaskCreate( vuIP_Task, "uIP", configMINIMAL_STACK_SIZE * 3, NULL, mainCHECK_TASK_PRIORITY - 1, NULL );\r
+       #endif\r
+\r
+       #ifdef STACK_LWIP       \r
+               /* Create the lwIP task.  This uses the lwIP RTOS abstraction layer.*/\r
+               vlwIPInit();\r
+               sys_set_state(  ( signed portCHAR * ) "httpd", lwipBASIC_SERVER_STACK_SIZE );\r
+               sys_thread_new( vBasicWEBServer, ( void * ) NULL, basicwebWEBSERVER_PRIORITY );\r
+               sys_set_default_state();\r
+       #endif\r
 \r
        /* Start the scheduler.\r
 \r
@@ -226,14 +248,14 @@ static void prvSetupHardware( void )
        /* Configuration taken from the ST code.\r
 \r
        Set Flash banks size & address */\r
-       FMI_BankRemapConfig( 4, 2, 0, 0x80000 ); \r
+       FMI_BankRemapConfig( 4, 2, 0, 0x80000 );\r
 \r
        /* FMI Waite States */\r
-       FMI_Config( FMI_READ_WAIT_STATE_2, FMI_WRITE_WAIT_STATE_0, FMI_PWD_ENABLE, FMI_LVD_ENABLE, FMI_FREQ_HIGH ); \r
+       FMI_Config( FMI_READ_WAIT_STATE_2, FMI_WRITE_WAIT_STATE_0, FMI_PWD_ENABLE, FMI_LVD_ENABLE, FMI_FREQ_HIGH );\r
 \r
        /* Configure the FPLL = 96MHz, and APB to 48MHz. */\r
        SCU_PCLKDivisorConfig( SCU_PCLK_Div2 );\r
-       SCU_PLLFactorsConfig( 192, 25, 2 ); \r
+       SCU_PLLFactorsConfig( 192, 25, 2 );\r
        SCU_PLLCmd( ENABLE );\r
        SCU_MCLKSourceConfig( SCU_MCLK_PLL );\r
 \r
@@ -269,16 +291,15 @@ portCHAR *pcStringsToDisplay[] = {
 \r
        /* The parameters are not used in this task. */\r
        ( void ) pvParameters;\r
+       \r
        pcFlagString = &cCheckVal[ 0 ]; \r
 \r
-\r
        /* Initialise xLastWakeTime to ensure the first call to vTaskDelayUntil()\r
        functions correctly. */\r
        xLastWakeTime = xTaskGetTickCount();\r
 \r
        /* Cycle for ever, delaying then checking all the other tasks are still\r
        operating without error. */\r
-\r
        for( ;; )\r
        {\r
                /* Delay until it is time to execute again. */\r
@@ -339,6 +360,17 @@ static void prvCheckOtherTasksAreStillRunning( void )
        {\r
                ulErrorFlags |= 0x40;\r
        }\r
+       \r
+       if( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
+       {\r
+               ulErrorFlags |= 0x80;\r
+       }\r
+\r
+       if( xAreQueuePeekTasksStillRunning() != pdTRUE )\r
+       {\r
+               ulErrorFlags |= 0x100;\r
+       }\r
+       \r
 }\r
 /*-----------------------------------------------------------*/\r
 \r
@@ -401,7 +433,7 @@ portCHAR *pcString;
 \r
        LCD_Init();\r
 \r
-       for( ;; )    \r
+       for( ;; )\r
        {\r
                /* Wait for a message to arrive. */\r
                if( xQueueReceive( *pxLCDQueue, &xReceivedMessage, portMAX_DELAY ) )\r
@@ -411,11 +443,10 @@ portCHAR *pcString;
                        LCD_DisplayString(xReceivedMessage.xRow, pcString, BlackText);\r
 \r
                        /* The delay here is just to ensure the LCD task does not starve\r
-                       out lower priority tasks as writhing to the LCD can take a long\r
+                       out lower priority tasks as writing to the LCD can take a long\r
                        time. */\r
                        vTaskDelay( mainLCD_DELAY );\r
                }\r
        }\r
 }\r
 /*-----------------------------------------------------------*/\r
-\r

diff --git a/Demo/ARM9_STR91X_IAR/serial/serial.c b/Demo/ARM9_STR91X_IAR/serial/serial.c
index da8bc57608fcb8546b2cc4aeec73fd65b8b1ed6d..7ded75f0e5af9011af9f967505c05c52df25d6ca 100644 (file)
--- a/Demo/ARM9_STR91X_IAR/serial/serial.c
+++ b/Demo/ARM9_STR91X_IAR/serial/serial.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS distribution.\r
 \r
@@ -121,27 +121,27 @@ GPIO_InitTypeDef GPIO_InitStructure;
                /* Enable the GPIO3 Clock */\r
                SCU_APBPeriphClockConfig( __GPIO3, ENABLE );\r
                \r
-               /* Configure UART1_Rx pin GPIO3.2 */ \r
-               GPIO_InitStructure.GPIO_Direction = GPIO_PinInput; \r
-               GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2; \r
-               GPIO_InitStructure.GPIO_Type = GPIO_Type_PushPull ; \r
-               GPIO_InitStructure.GPIO_IPConnected = GPIO_IPConnected_Enable; \r
-               GPIO_InitStructure.GPIO_Alternate = GPIO_InputAlt1 ; \r
-               GPIO_Init( GPIO3, &GPIO_InitStructure ); \r
+               /* Configure UART1_Rx pin GPIO3.2 */\r
+               GPIO_InitStructure.GPIO_Direction = GPIO_PinInput;\r
+               GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2;\r
+               GPIO_InitStructure.GPIO_Type = GPIO_Type_PushPull ;\r
+               GPIO_InitStructure.GPIO_IPConnected = GPIO_IPConnected_Enable;\r
+               GPIO_InitStructure.GPIO_Alternate = GPIO_InputAlt1 ;\r
+               GPIO_Init( GPIO3, &GPIO_InitStructure );\r
                \r
-               /* Configure UART1_Tx pin GPIO3.3 */ \r
-               GPIO_InitStructure.GPIO_Direction = GPIO_PinOutput; \r
-               GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3; \r
-               GPIO_InitStructure.GPIO_Type = GPIO_Type_PushPull ; \r
-               GPIO_InitStructure.GPIO_IPConnected = GPIO_IPConnected_Enable; \r
-               GPIO_InitStructure.GPIO_Alternate = GPIO_OutputAlt2 ; \r
-               GPIO_Init( GPIO3, &GPIO_InitStructure ); \r
+               /* Configure UART1_Tx pin GPIO3.3 */\r
+               GPIO_InitStructure.GPIO_Direction = GPIO_PinOutput;\r
+               GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3;\r
+               GPIO_InitStructure.GPIO_Type = GPIO_Type_PushPull ;\r
+               GPIO_InitStructure.GPIO_IPConnected = GPIO_IPConnected_Enable;\r
+               GPIO_InitStructure.GPIO_Alternate = GPIO_OutputAlt2 ;\r
+               GPIO_Init( GPIO3, &GPIO_InitStructure );\r
                \r
                \r
                portENTER_CRITICAL();\r
                {               \r
                        /* Configure the UART itself. */\r
-                       UART_DeInit( UART1 );             \r
+                       UART_DeInit( UART1 );           \r
                        UART_Init( UART1, &xUART1_Init );\r
                        UART_ITConfig( UART1, UART_IT_Receive | UART_IT_Transmit, ENABLE );\r
                        UART1->ICR = serCLEAR_ALL_INTERRUPTS;\r
@@ -220,14 +220,14 @@ portBASE_TYPE xReturn;
                if( UART1->FR & serTX_FIFO_FULL )\r
                {\r
                        /* Wait for the interrupt letting us know there is space on the\r
-                       FIFO.  It is ok to block in a critical section, interrupts will be \r
+                       FIFO.  It is ok to block in a critical section, interrupts will be\r
                        enabled for other tasks once we force a switch. */\r
                        lTaskWaiting = pdTRUE;\r
                        \r
-                       /* Just to be a bit different this driver uses a semaphore to \r
+                       /* Just to be a bit different this driver uses a semaphore to\r
                        block the sending task when the FIFO is full.  The standard COMTest\r
                        task assumes a queue of adequate length exists so does not use\r
-                       a block time.  For this demo the block time is therefore hard \r
+                       a block time.  For this demo the block time is therefore hard\r
                        coded. */\r
                        xReturn = xSemaphoreTake( xTxFIFOSemaphore, serTX_BLOCK_TIME );\r
                        if( xReturn )\r

diff --git a/Demo/ARM9_STR91X_IAR/settings/RTOSDemo.cspy.bat b/Demo/ARM9_STR91X_IAR/settings/RTOSDemo.cspy.bat
new file mode 100644 (file)
index 0000000..05be143
--- /dev/null
+++ b/Demo/ARM9_STR91X_IAR/settings/RTOSDemo.cspy.bat
@@ -0,0 +1,32 @@
+@REM This bat file has been generated by the IAR Embeddded Workbench\r
+@REM C-SPY interactive debugger,as an aid to preparing a command\r
+@REM line for running the cspybat command line utility with the\r
+@REM appropriate settings.\r
+@REM\r
+@REM After making some adjustments to this file, you can launch cspybat\r
+@REM by typing the name of this file followed by the name of the debug\r
+@REM file (usually an ubrof file). Note that this file is generated\r
+@REM every time a new debug session is initialized, so you may want to\r
+@REM move or rename the file before making changes.\r
+@REM\r
+@REM Note: some command line arguments cannot be properly generated\r
+@REM by this process. Specifically, the plugin which is responsible\r
+@REM for the Terminal I/O window (and other C runtime functionality)\r
+@REM comes in a special version for cspybat, and the name of that\r
+@REM plugin dll is not known when generating this file. It resides in\r
+@REM the $TOOLKIT_DIR$\bin folder and is usually called XXXbat.dll or\r
+@REM XXXlibsupportbat.dll, where XXX is the name of the corresponding\r
+@REM tool chain. Replace the '<libsupport_plugin>' parameter\r
+@REM below with the appropriate file name. Other plugins loaded by\r
+@REM C-SPY are usually not needed by, or will not work in, cspybat\r
+@REM but they are listed at the end of this file for reference.\r
+\r
+\r
+"C:\Devtools\IAR Systems\Embedded Workbench 4.0\common\bin\cspybat" "C:\Devtools\IAR Systems\Embedded Workbench 4.0\ARM\bin\armproc.dll" "C:\Devtools\IAR Systems\Embedded Workbench 4.0\ARM\bin\armjlink.dll"  %1 --plugin "C:\Devtools\IAR Systems\Embedded Workbench 4.0\ARM\bin\<libsupport_plugin>" --backend -B "--endian" "little" "--cpu" "ARM966E-S" "--fpu" "None" "--proc_device_desc_file" "C:\Devtools\IAR Systems\Embedded Workbench 4.0\ARM\CONFIG\iostr912.ddf" "--drv_verify_download" "all" "--proc_driver" "jlink" "--jlink_connection" "USB:0" "--jlink_initial_speed" "32" "--jlink_catch_exceptions" "0x000" \r
+\r
+\r
+@REM Loaded plugins:\r
+@REM    armlibsupport.dll\r
+@REM    C:\Devtools\IAR Systems\Embedded Workbench 4.0\common\plugins\CodeCoverage\CodeCoverage.dll\r
+@REM    C:\Devtools\IAR Systems\Embedded Workbench 4.0\common\plugins\Profiling\Profiling.dll\r
+@REM    C:\Devtools\IAR Systems\Embedded Workbench 4.0\common\plugins\stack\stack.dll\r

diff --git a/Demo/ARM9_STR91X_IAR/settings/RTOSDemo.dbgdt b/Demo/ARM9_STR91X_IAR/settings/RTOSDemo.dbgdt
index 7690370e486cabcabc1257b5600ba2f7243669e3..cdeee7d6a111d91647afbd86a7449441f131f47b 100644 (file)
--- a/Demo/ARM9_STR91X_IAR/settings/RTOSDemo.dbgdt
+++ b/Demo/ARM9_STR91X_IAR/settings/RTOSDemo.dbgdt
@@ -3,20 +3,20 @@
 <Project>\r
   <Desktop>\r
     <Static>\r
-      <Debug-Log><PreferedWindows><Position>3</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows></Debug-Log>\r
+      <Debug-Log/>\r
+      <Build>\r
+        \r
+        \r
+        \r
+        \r
+      <ColumnWidth0>20</ColumnWidth0><ColumnWidth1>1006</ColumnWidth1><ColumnWidth2>268</ColumnWidth2><ColumnWidth3>67</ColumnWidth3></Build>\r
       <Workspace>\r
         <ColumnWidths>\r
           \r
           \r
           \r
           \r
-        <Column0>186</Column0><Column1>27</Column1><Column2>27</Column2><Column3>27</Column3></ColumnWidths>\r
-        <PreferedWindows>\r
-          \r
-          \r
-          \r
-          \r
-        <Position>1</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows>\r
+        <Column0>252</Column0><Column1>27</Column1><Column2>27</Column2><Column3>27</Column3></ColumnWidths>\r
       </Workspace>\r
       <Disassembly>\r
         <PreferedWindows>\r
@@ -29,48 +29,52 @@
         \r
         \r
       <MixedMode>1</MixedMode><CodeCovEnabled>0</CodeCovEnabled><CodeCovShow>0</CodeCovShow></Disassembly>\r
-      <Build>\r
-        <ColumnWidth0>20</ColumnWidth0>\r
-        <ColumnWidth1>1004</ColumnWidth1>\r
-        <ColumnWidth2>267</ColumnWidth2>\r
-        <ColumnWidth3>66</ColumnWidth3>\r
-      <PreferedWindows><Position>3</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows><Window><Factory>Debug-Log</Factory></Window><Window><Factory>Breakpoints</Factory></Window></Windows></PreferedWindows></Build>\r
-      <Register>\r
-        <PreferedWindows>\r
-          \r
-          \r
-          \r
-          \r
-        <Position>2</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows>\r
-      </Register>\r
-      <Watch>\r
-        <Format>\r
-          <struct_types><Fmt><Key>ENET_DMADSCRBase-dmaPackStatus</Key><Value>4</Value></Fmt><Fmt><Key>GPIO_TypeDef-DDR</Key><Value>4</Value></Fmt></struct_types>\r
-          <watch_formats><Fmt><Key>{W}Watch-0:ENET_DMA->ISR</Key><Value>4</Value></Fmt><Fmt><Key>{W}Watch-1:ENET_DMA->ISR</Key><Value>4</Value></Fmt><Fmt><Key>{W}Watch-1:ulLinkAbilityReg</Key><Value>4</Value></Fmt><Fmt><Key>{W}Watch-1:ulStatusReg</Key><Value>4</Value></Fmt><Fmt><Key>{W}Watch-2:        ulHigh</Key><Value>4</Value></Fmt><Fmt><Key>{W}Watch-2:ulLow</Key><Value>4</Value></Fmt></watch_formats>\r
-        </Format>\r
-        \r
-        \r
-        \r
-        \r
-      <PreferedWindows><Position>2</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows><Column0>145</Column0><Column1>102</Column1><Column2>133</Column2><Column3>100</Column3></Watch>\r
-    <Breakpoints><PreferedWindows><Position>3</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows></Breakpoints><Find-in-Files><PreferedWindows><Position>3</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows><ColumnWidth0>482</ColumnWidth0><ColumnWidth1>68</ColumnWidth1><ColumnWidth2>826</ColumnWidth2></Find-in-Files><CallStack><PreferedWindows><Position>1</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows><ViewArgs>1</ViewArgs></CallStack><Memory><PreferedWindows><Position>3</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows><FindDirection>1</FindDirection><FindAsHex>0</FindAsHex></Memory><QuickWatch><PreferedWindows><Position>2</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows><Column0>100</Column0><Column1>116</Column1><Column2>100</Column2><Column3>100</Column3></QuickWatch></Static>\r
+    <Register><PreferedWindows><Position>2</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows></Register><Find-in-Files><ColumnWidth0>482</ColumnWidth0><ColumnWidth1>68</ColumnWidth1><ColumnWidth2>826</ColumnWidth2></Find-in-Files></Static>\r
     <Windows>\r
       \r
       \r
-    <Wnd2><Tabs><Tab><Identity>TabID-14723-2909</Identity><TabName>Workspace</TabName><Factory>Workspace</Factory><Session><NodeDict><ExpandedNode>RTOSDemo</ExpandedNode><ExpandedNode>RTOSDemo/Demo Source</ExpandedNode><ExpandedNode>RTOSDemo/RTOS Source</ExpandedNode><ExpandedNode>RTOSDemo/System Files</ExpandedNode><ExpandedNode>RTOSDemo/uIP</ExpandedNode></NodeDict></Session></Tab></Tabs><SelectedTab>0</SelectedTab></Wnd2><Wnd3><Tabs><Tab><Identity>TabID-596-3113</Identity><TabName>Debug Log</TabName><Factory>Debug-Log</Factory><Session/></Tab></Tabs><SelectedTab>0</SelectedTab></Wnd3></Windows>\r
+    <Wnd1>\r
+        <Tabs>\r
+          <Tab>\r
+            <Identity>TabID-874-7293</Identity>\r
+            <TabName>Debug Log</TabName>\r
+            <Factory>Debug-Log</Factory>\r
+            <Session/>\r
+          </Tab>\r
+          <Tab>\r
+            <Identity>TabID-11099-7306</Identity>\r
+            <TabName>Build</TabName>\r
+            <Factory>Build</Factory>\r
+            <Session/>\r
+          </Tab>\r
+        <Tab><Identity>TabID-4501-4793</Identity><TabName>Find in Files</TabName><Factory>Find-in-Files</Factory><Session/></Tab><Tab><Identity>TabID-19328-10860</Identity><TabName>Breakpoints</TabName><Factory>Breakpoints</Factory></Tab></Tabs>\r
+        \r
+      <SelectedTab>0</SelectedTab></Wnd1><Wnd4>\r
+        <Tabs>\r
+          <Tab>\r
+            <Identity>TabID-11622-7296</Identity>\r
+            <TabName>Workspace</TabName>\r
+            <Factory>Workspace</Factory>\r
+            <Session>\r
+              \r
+            <NodeDict><ExpandedNode>RTOSDemo</ExpandedNode><ExpandedNode>RTOSDemo/Demo Source</ExpandedNode><ExpandedNode>RTOSDemo/Library Source</ExpandedNode><ExpandedNode>RTOSDemo/lwIP</ExpandedNode><ExpandedNode>RTOSDemo/lwIP/WebServer</ExpandedNode><ExpandedNode>RTOSDemo/lwIP/netif</ExpandedNode></NodeDict></Session>\r
+          </Tab>\r
+        </Tabs>\r
+        \r
+      <SelectedTab>0</SelectedTab></Wnd4><Wnd5><Tabs><Tab><Identity>TabID-21421-21055</Identity><TabName>Disassembly</TabName><Factory>Disassembly</Factory><Session/></Tab></Tabs><SelectedTab>0</SelectedTab></Wnd5></Windows>\r
     <Editor>\r
       \r
       \r
       \r
       \r
-    <Pane><Tab><Factory>TextEditor</Factory><Filename>C:\E\Dev\FreeRTOS\Source\portable\IAR\STR91x\port.c</Filename><XPos>0</XPos><YPos>262</YPos><SelStart>8272</SelStart><SelEnd>8272</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\E\Dev\FreeRTOS\Demo\ARM9_STR91X_IAR\91x_vect_IAR.s</Filename><XPos>0</XPos><YPos>99</YPos><SelStart>4979</SelStart><SelEnd>4979</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\E\Dev\FreeRTOS\Source\queue.c</Filename><XPos>0</XPos><YPos>420</YPos><SelStart>17603</SelStart><SelEnd>17603</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\E\Dev\FreeRTOS\Source\portable\IAR\STR91x\portasm.s79</Filename><XPos>0</XPos><YPos>21</YPos><SelStart>2470</SelStart><SelEnd>2470</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\E\Dev\FreeRTOS\Source\tasks.c</Filename><XPos>0</XPos><YPos>1018</YPos><SelStart>34281</SelStart><SelEnd>34281</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\E\Dev\FreeRTOS\Demo\ARM9_STR91X_IAR\FreeRTOSConfig.h</Filename><XPos>0</XPos><YPos>9</YPos><SelStart>1968</SelStart><SelEnd>1968</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\E\Dev\FreeRTOS\Demo\ARM9_STR91X_IAR\91x_init_IAR.s</Filename><XPos>0</XPos><YPos>70</YPos><SelStart>3703</SelStart><SelEnd>3703</SelEnd></Tab><ActiveTab>6</ActiveTab><Tab><Factory>TextEditor</Factory><Filename>C:\E\Dev\FreeRTOS\Demo\ARM9_STR91X_IAR\Library\source\91x_enet.c</Filename><XPos>1</XPos><YPos>409</YPos><SelStart>13997</SelStart><SelEnd>13997</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\E\Dev\FreeRTOS\Demo\ARM9_STR91X_IAR\webserver\uIP_Task.c</Filename><XPos>0</XPos><YPos>256</YPos><SelStart>7317</SelStart><SelEnd>7317</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\E\Dev\FreeRTOS\Demo\ARM9_STR91X_IAR\Library\include\91x_enet.h</Filename><XPos>0</XPos><YPos>126</YPos><SelStart>5481</SelStart><SelEnd>5481</SelEnd></Tab></Pane><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>\r
+    <Pane><Tab><Factory>TextEditor</Factory><Filename>C:\Temp\str9_test\FreeRTOS_v4.5.0_STR9_rc1\Demo\ARM9_STR91X_IAR\lwip\lwipWebServer\BasicWEB.c</Filename><XPos>0</XPos><YPos>105</YPos><SelStart>4173</SelStart><SelEnd>4173</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Temp\str9_test\FreeRTOS_v4.5.0_STR9_rc1\Demo\ARM9_STR91X_IAR\lwip\netif\ethernetif.c</Filename><XPos>0</XPos><YPos>39</YPos><SelStart>2184</SelStart><SelEnd>2184</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Temp\str9_test\FreeRTOS_v4.5.0_STR9_rc1\Demo\ARM9_STR91X_IAR\91x_init_IAR.s</Filename><XPos>0</XPos><YPos>66</YPos><SelStart>3533</SelStart><SelEnd>3533</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Temp\str9_test\FreeRTOS_v4.5.0_STR9_rc1\Demo\ARM9_STR91X_IAR\main.c</Filename><XPos>0</XPos><YPos>168</YPos><SelStart>6893</SelStart><SelEnd>6893</SelEnd></Tab><ActiveTab>3</ActiveTab><Tab><Factory>TextEditor</Factory><Filename>C:\Temp\str9_test\FreeRTOS_v4.5.0_STR9_rc1\Demo\Common\ethernet\lwIP\netif\etharp.c</Filename><XPos>0</XPos><YPos>103</YPos><SelStart>4348</SelStart><SelEnd>4348</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Temp\str9_test\FreeRTOS_v4.5.0_STR9_rc1\Demo\ARM9_STR91X_IAR\Library\source\91x_gpio.c</Filename><XPos>0</XPos><YPos>149</YPos><SelStart>5495</SelStart><SelEnd>5495</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Temp\str9_test\FreeRTOS_v4.5.0_STR9_rc1\Demo\Common\ethernet\lwIP\core\netif.c</Filename><XPos>0</XPos><YPos>75</YPos><SelStart>3644</SelStart><SelEnd>3644</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Temp\str9_test\FreeRTOS_v4.5.0_STR9_rc1\Source\portable\IAR\STR91x\port.c</Filename><XPos>0</XPos><YPos>393</YPos><SelStart>12049</SelStart><SelEnd>12049</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Temp\str9_test\FreeRTOS_v4.5.0_STR9_rc1\Demo\ARM9_STR91X_IAR\STCode\lcd.c</Filename><XPos>0</XPos><YPos>332</YPos><SelStart>20082</SelStart><SelEnd>20082</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Temp\str9_test\FreeRTOS_v4.5.0_STR9_rc1\Demo\Common\ethernet\lwIP\api\tcpip.c</Filename><XPos>0</XPos><YPos>174</YPos><SelStart>4850</SelStart><SelEnd>4867</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Temp\str9_test\FreeRTOS_v4.5.0_STR9_rc1\Source\tasks.c</Filename><XPos>0</XPos><YPos>516</YPos><SelStart>19652</SelStart><SelEnd>19662</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Temp\str9_test\FreeRTOS_v4.5.0_STR9_rc1\Demo\ARM9_STR91X_IAR\Library\source\91x_enet.c</Filename><XPos>0</XPos><YPos>397</YPos><SelStart>13417</SelStart><SelEnd>13417</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Temp\str9_test\FreeRTOS_v4.5.0_STR9_rc1\Demo\ARM9_STR91X_IAR\lwip\api\sys_arch.c</Filename><XPos>0</XPos><YPos>316</YPos><SelStart>9502</SelStart><SelEnd>9502</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Temp\str9_test\FreeRTOS_v4.5.0_STR9_rc1\Demo\ARM9_STR91X_IAR\FreeRTOSConfig.h</Filename><XPos>0</XPos><YPos>45</YPos><SelStart>2635</SelStart><SelEnd>2635</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Temp\str9_test\FreeRTOS_v4.5.0_STR9_rc1\Demo\ARM9_STR91X_IAR\lwip\include\lwip\lwipopts.h</Filename><XPos>0</XPos><YPos>18</YPos><SelStart>1789</SelStart><SelEnd>1789</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Temp\str9_test\FreeRTOS_v4.5.0_STR9_rc1\Demo\ARM9_STR91X_IAR\lwip\include\lwIPWebServer\BasicWEB.h</Filename><XPos>0</XPos><YPos>21</YPos><SelStart>1878</SelStart><SelEnd>1878</SelEnd></Tab></Pane><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>\r
     <Positions>\r
       \r
       \r
       \r
       \r
       \r
-    <Top><Row0><Sizes><Toolbar-00a0baa0><key>iaridepm1</key></Toolbar-00a0baa0><Toolbar-01af6ce0><key>debuggergui1</key></Toolbar-01af6ce0></Sizes></Row0></Top><Left><Row0><Sizes><Wnd2><Rect><Top>-2</Top><Left>-2</Left><Bottom>728</Bottom><Right>279</Right><x>-2</x><y>-2</y><xscreen>200</xscreen><yscreen>194</yscreen><sizeHorzCX>142857</sizeHorzCX><sizeHorzCY>199588</sizeHorzCY><sizeVertCX>200714</sizeVertCX><sizeVertCY>751029</sizeVertCY></Rect></Wnd2></Sizes></Row0></Left><Right><Row0><Sizes/></Row0></Right><Bottom><Row0><Sizes><Wnd3><Rect><Top>-2</Top><Left>-2</Left><Bottom>198</Bottom><Right>1402</Right><x>-2</x><y>-2</y><xscreen>1404</xscreen><yscreen>200</yscreen><sizeHorzCX>1002857</sizeHorzCX><sizeHorzCY>205761</sizeHorzCY><sizeVertCX>142857</sizeVertCX><sizeVertCY>205761</sizeVertCY></Rect></Wnd3></Sizes></Row0></Bottom><Float><Sizes/></Float></Positions>\r
+    <Top><Row0><Sizes><Toolbar-0087eff8><key>iaridepm.enu1</key></Toolbar-0087eff8><Toolbar-03d99498><key>debuggergui.enu1</key></Toolbar-03d99498></Sizes></Row0></Top><Left><Row0><Sizes><Wnd4><Rect><Top>-2</Top><Left>-2</Left><Bottom>740</Bottom><Right>342</Right><x>-2</x><y>-2</y><xscreen>200</xscreen><yscreen>200</yscreen><sizeHorzCX>142857</sizeHorzCX><sizeHorzCY>203666</sizeHorzCY><sizeVertCX>245714</sizeVertCX><sizeVertCY>755601</sizeVertCY></Rect></Wnd4></Sizes></Row0></Left><Right><Row0><Sizes><Wnd5><Rect><Top>-2</Top><Left>-2</Left><Bottom>740</Bottom><Right>198</Right><x>-2</x><y>-2</y><xscreen>200</xscreen><yscreen>200</yscreen><sizeHorzCX>142857</sizeHorzCX><sizeHorzCY>203666</sizeHorzCY><sizeVertCX>142857</sizeVertCX><sizeVertCY>755601</sizeVertCY></Rect></Wnd5></Sizes></Row0></Right><Bottom><Row0><Sizes><Wnd1><Rect><Top>-2</Top><Left>-2</Left><Bottom>198</Bottom><Right>1402</Right><x>-2</x><y>-2</y><xscreen>1404</xscreen><yscreen>200</yscreen><sizeHorzCX>1002857</sizeHorzCX><sizeHorzCY>203666</sizeHorzCY><sizeVertCX>142857</sizeVertCX><sizeVertCY>203666</sizeVertCY></Rect></Wnd1></Sizes></Row0></Bottom><Float><Sizes/></Float></Positions>\r
   </Desktop>\r
 </Project>\r
 \r

diff --git a/Demo/ARM9_STR91X_IAR/settings/RTOSDemo.dni b/Demo/ARM9_STR91X_IAR/settings/RTOSDemo.dni
index 6c72d9eb481bc2fa2ee85afb41da850231a0e6e4..76d294bfdf635ff0fbc6f31b9c11d0565ca47ce3 100644 (file)
--- a/Demo/ARM9_STR91X_IAR/settings/RTOSDemo.dni
+++ b/Demo/ARM9_STR91X_IAR/settings/RTOSDemo.dni
@@ -1,10 +1,24 @@
-[DisAssemblyWindow]\r
-NumStates=_ 1\r
-State 1=_ 1\r
 [JLinkDriver]\r
 WatchCond=_ 0\r
 Watch0=_ 0 "" 0 "" 0 "" 0 "" 0 0 0 0\r
 Watch1=_ 0 "" 0 "" 0 "" 0 "" 0 0 0 0\r
+[DisAssemblyWindow]\r
+NumStates=_ 1\r
+State 1=_ 1\r
+[Profiling]\r
+Enabled=0\r
+[StackPlugin]\r
+Enabled=1\r
+OverflowWarningsEnabled=1\r
+WarningThreshold=90\r
+SpWarningsEnabled=1\r
+WarnHow=0\r
+UseTrigger=1\r
+TriggerName=main\r
+LimitSize=0\r
+ByteLimit=50\r
+[BreakpointUsageDialog]\r
+Placement=_ 144 186 919 647\r
 [Log file]\r
 LoggingEnabled=_ 0\r
 LogFile=_ ""\r
@@ -13,7 +27,7 @@ Category=_ 0
 LoggingEnabled=_ 0\r
 LogFile=_ ""\r
 [Disassemble mode]\r
-mode=2\r
+mode=0\r
 [Breakpoints]\r
 Count=0\r
 [TraceHelper]\r

diff --git a/Demo/ARM9_STR91X_IAR/settings/RTOSDemo.wsdt b/Demo/ARM9_STR91X_IAR/settings/RTOSDemo.wsdt
index ab941bd4f8a53d1db2479ac110630a088adafc25..17b495ffc0b46c914c02739be87a81fc45fa3269 100644 (file)
--- a/Demo/ARM9_STR91X_IAR/settings/RTOSDemo.wsdt
+++ b/Demo/ARM9_STR91X_IAR/settings/RTOSDemo.wsdt
@@ -3,7 +3,7 @@
 <Workspace>\r
   <ConfigDictionary>\r
     \r
-  <CurrentConfigs><Project>RTOSDemo/THUMB</Project></CurrentConfigs></ConfigDictionary>\r
+  <CurrentConfigs><Project>RTOSDemo/ARM - lwIP - D</Project></CurrentConfigs></ConfigDictionary>\r
   <Desktop>\r
     <Static>\r
       <Workspace>\r
@@ -12,54 +12,56 @@
           \r
           \r
           \r
-        <Column0>236</Column0><Column1>27</Column1><Column2>27</Column2><Column3>27</Column3></ColumnWidths>\r
+        <Column0>328</Column0><Column1>27</Column1><Column2>27</Column2><Column3>27</Column3></ColumnWidths>\r
       </Workspace>\r
       <Build>\r
         \r
         \r
         \r
         \r
-      <ColumnWidth0>20</ColumnWidth0><ColumnWidth1>1004</ColumnWidth1><ColumnWidth2>267</ColumnWidth2><ColumnWidth3>66</ColumnWidth3></Build>\r
-    </Static>\r
+      <ColumnWidth0>20</ColumnWidth0><ColumnWidth1>1006</ColumnWidth1><ColumnWidth2>268</ColumnWidth2><ColumnWidth3>67</ColumnWidth3></Build>\r
+      <TerminalIO/>\r
+      <CodeCoveragePlugin/>\r
+    <Debug-Log/><Find-in-Files><ColumnWidth0>682</ColumnWidth0><ColumnWidth1>68</ColumnWidth1><ColumnWidth2>826</ColumnWidth2></Find-in-Files><Disassembly><MixedMode>1</MixedMode><CodeCovEnabled>0</CodeCovEnabled><CodeCovShow>0</CodeCovShow></Disassembly></Static>\r
     <Windows>\r
       \r
       \r
-    <Wnd2>\r
+    <Wnd0>\r
         <Tabs>\r
           <Tab>\r
-            <Identity>TabID-5518-19908</Identity>\r
+            <Identity>TabID-13420-7058</Identity>\r
             <TabName>Workspace</TabName>\r
             <Factory>Workspace</Factory>\r
             <Session>\r
               \r
-            <NodeDict><ExpandedNode>RTOSDemo</ExpandedNode><ExpandedNode>RTOSDemo/Demo Source</ExpandedNode></NodeDict></Session>\r
+            <NodeDict><ExpandedNode>RTOSDemo</ExpandedNode></NodeDict></Session>\r
           </Tab>\r
         </Tabs>\r
         \r
-      <SelectedTab>0</SelectedTab></Wnd2><Wnd3>\r
+      <SelectedTab>0</SelectedTab></Wnd0><Wnd2>\r
         <Tabs>\r
           <Tab>\r
-            <Identity>TabID-22895-20401</Identity>\r
+            <Identity>TabID-22078-7100</Identity>\r
             <TabName>Build</TabName>\r
             <Factory>Build</Factory>\r
             <Session/>\r
           </Tab>\r
-        </Tabs>\r
+        <Tab><Identity>TabID-3326-16295</Identity><TabName>Debug Log</TabName><Factory>Debug-Log</Factory><Session/></Tab><Tab><Identity>TabID-12949-6886</Identity><TabName>Find in Files</TabName><Factory>Find-in-Files</Factory><Session/></Tab></Tabs>\r
         \r
-      <SelectedTab>0</SelectedTab></Wnd3></Windows>\r
+      <SelectedTab>0</SelectedTab></Wnd2></Windows>\r
     <Editor>\r
       \r
       \r
       \r
       \r
-    <Pane><Tab><Factory>TextEditor</Factory><Filename>C:\E\Dev\FreeRTOS\Demo\ARM9_STR91X_IAR\webserver\uIP_Task.c</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>1913</SelStart><SelEnd>1925</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\E\Dev\FreeRTOS\Demo\ARM9_STR91X_IAR\main.c</Filename><XPos>0</XPos><YPos>27</YPos><SelStart>2708</SelStart><SelEnd>3382</SelEnd></Tab><ActiveTab>1</ActiveTab></Pane><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>\r
+    <Pane><Tab><Factory>TextEditor</Factory><Filename>C:\Temp\STR9\str9_test\FreeRTOS_v4.5.0_STR9_rc2\Demo\ARM9_STR91X_IAR\main.c</Filename><XPos>0</XPos><YPos>201</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd></Tab><ActiveTab>0</ActiveTab></Pane><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>\r
     <Positions>\r
       \r
       \r
       \r
       \r
       \r
-    <Top><Row0><Sizes><Toolbar-00a0baa0><key>iaridepm1</key></Toolbar-00a0baa0></Sizes></Row0></Top><Left><Row0><Sizes><Wnd2><Rect><Top>-2</Top><Left>-2</Left><Bottom>363</Bottom><Right>310</Right><x>-2</x><y>-2</y><xscreen>200</xscreen><yscreen>200</yscreen><sizeHorzCX>142857</sizeHorzCX><sizeHorzCY>205761</sizeHorzCY><sizeVertCX>222857</sizeVertCX><sizeVertCY>751029</sizeVertCY></Rect></Wnd2></Sizes></Row0></Left><Right><Row0><Sizes/></Row0></Right><Bottom><Row0><Sizes><Wnd3><Rect><Top>-2</Top><Left>-2</Left><Bottom>198</Bottom><Right>1402</Right><x>-2</x><y>-2</y><xscreen>1404</xscreen><yscreen>200</yscreen><sizeHorzCX>1002857</sizeHorzCX><sizeHorzCY>205761</sizeHorzCY><sizeVertCX>142857</sizeVertCX><sizeVertCY>205761</sizeVertCY></Rect></Wnd3></Sizes></Row0></Bottom><Float><Sizes/></Float></Positions>\r
+    <Top><Row0><Sizes><Toolbar-0087f048><key>iaridepm.enu1</key></Toolbar-0087f048></Sizes></Row0></Top><Left><Row0><Sizes><Wnd0><Rect><Top>-2</Top><Left>-2</Left><Bottom>606</Bottom><Right>402</Right><x>-2</x><y>-2</y><xscreen>200</xscreen><yscreen>200</yscreen><sizeHorzCX>142857</sizeHorzCX><sizeHorzCY>203666</sizeHorzCY><sizeVertCX>288571</sizeVertCX><sizeVertCY>619145</sizeVertCY></Rect></Wnd0></Sizes></Row0></Left><Right><Row0><Sizes/></Row0></Right><Bottom><Row0><Sizes><Wnd2><Rect><Top>-2</Top><Left>-2</Left><Bottom>332</Bottom><Right>1402</Right><x>-2</x><y>-2</y><xscreen>1404</xscreen><yscreen>334</yscreen><sizeHorzCX>1002857</sizeHorzCX><sizeHorzCY>340122</sizeHorzCY><sizeVertCX>142857</sizeVertCX><sizeVertCY>203666</sizeVertCY></Rect></Wnd2></Sizes></Row0></Bottom><Float><Sizes/></Float></Positions>\r
   </Desktop>\r
 </Workspace>\r
 \r

diff --git a/Demo/ARM9_STR91X_IAR/webserver/uIP_Task.c b/Demo/ARM9_STR91X_IAR/webserver/uIP_Task.c
index db0de05bbb292b5ce2119a51094bcd75ffb72f0b..89527542e98c3023e15520252d6e0002c45c8b6d 100644 (file)
--- a/Demo/ARM9_STR91X_IAR/webserver/uIP_Task.c
+++ b/Demo/ARM9_STR91X_IAR/webserver/uIP_Task.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r
@@ -59,13 +59,13 @@
 #define uipMAC_ADDR2   0x13\r
 #define uipMAC_ADDR3   0x14\r
 #define uipMAC_ADDR4   0x15\r
-#define uipMAC_ADDR5   0x16\r
+#define uipMAC_ADDR5   0x20\r
 \r
 /* IP address configuration. */\r
 #define uipIP_ADDR0            172\r
 #define uipIP_ADDR1            25\r
 #define uipIP_ADDR2            218\r
-#define uipIP_ADDR3            26      \r
+#define uipIP_ADDR3            11      \r
 \r
 /* Shortcut to the header within the Rx buffer. */\r
 #define xHeader ((struct uip_eth_hdr *) &uip_buf[ 0 ])\r
@@ -85,8 +85,8 @@
 \r
 /*-----------------------------------------------------------*/\r
 \r
-/* \r
- * Send the uIP buffer to the MAC. \r
+/*\r
+ * Send the uIP buffer to the MAC.\r
  */\r
 static void prvENET_Send(void);\r
 \r
@@ -143,7 +143,7 @@ struct timer periodic_timer, arp_timer;
        httpd_init();\r
 \r
        /* Initialise the MAC. */\r
-       ENET_InitClocksGPIO();   \r
+       ENET_InitClocksGPIO();\r
        ENET_Init();\r
        portENTER_CRITICAL();\r
        {\r
@@ -170,8 +170,8 @@ struct timer periodic_timer, arp_timer;
                                uip_arp_ipin();\r
                                uip_input();\r
 \r
-                               /* If the above function invocation resulted in data that \r
-                               should be sent out on the network, the global variable \r
+                               /* If the above function invocation resulted in data that\r
+                               should be sent out on the network, the global variable\r
                                uip_len is set to a value > 0. */\r
                                if( uip_len > 0 )\r
                                {\r
@@ -183,8 +183,8 @@ struct timer periodic_timer, arp_timer;
                        {\r
                                uip_arp_arpin();\r
 \r
-                               /* If the above function invocation resulted in data that \r
-                               should be sent out on the network, the global variable \r
+                               /* If the above function invocation resulted in data that\r
+                               should be sent out on the network, the global variable\r
                                uip_len is set to a value > 0. */\r
                                if( uip_len > 0 )\r
                                {\r
@@ -201,8 +201,8 @@ struct timer periodic_timer, arp_timer;
                                {\r
                                        uip_periodic( i );\r
        \r
-                                       /* If the above function invocation resulted in data that \r
-                                       should be sent out on the network, the global variable \r
+                                       /* If the above function invocation resulted in data that\r
+                                       should be sent out on the network, the global variable\r
                                        uip_len is set to a value > 0. */\r
                                        if( uip_len > 0 )\r
                                        {\r
@@ -250,7 +250,7 @@ static unsigned portCHAR *pcTxData;
                        vTaskDelay( uipBUFFER_WAIT_DELAY );\r
                }\r
        }\r
-        \r
+       \r
        if( pcTxData )\r
        {\r
                /* Copy the header into the Tx buffer. */\r

diff --git a/Demo/AVR32_UC3/AT32UC3A/GCC/Makefile b/Demo/AVR32_UC3/AT32UC3A/GCC/Makefile
index 55ee8bc9a3767a84f2f828a00e12a37ecdba604c..6f51ddb103528a38e9fb66f18ea698f47ec8c7fc 100644 (file)
--- a/Demo/AVR32_UC3/AT32UC3A/GCC/Makefile
+++ b/Demo/AVR32_UC3/AT32UC3A/GCC/Makefile
@@ -69,7 +69,6 @@ LastWord  = $(if $(1),$(word $(words $(1)),$(1)))
 MAKE      = make
 MAKECFG   = config.mk
 TGTTYPE   = $(suffix $(TARGET))
-TGTFILE   = $(PART)-$(TARGET)
 
 RM        = rm -Rf
 
@@ -99,14 +98,14 @@ LOADLIBES =
 LDLIBS    = $(LIBS:%=-l%)
 
 OBJDUMP   = avr32-objdump
-LSS       = $(TGTFILE:$(TGTTYPE)=.lss)
+LSS       = $(TARGET:$(TGTTYPE)=.lss)
 
 NM        = avr32-nm
-SYM       = $(TGTFILE:$(TGTTYPE)=.sym)
+SYM       = $(TARGET:$(TGTTYPE)=.sym)
 
 OBJCOPY   = avr32-objcopy
-HEX       = $(TGTFILE:$(TGTTYPE)=.hex)
-BIN       = $(TGTFILE:$(TGTTYPE)=.bin)
+HEX       = $(TARGET:$(TGTTYPE)=.hex)
+BIN       = $(TARGET:$(TGTTYPE)=.bin)
 
 SIZE      = avr32-size
 
@@ -142,7 +141,7 @@ MSG_GETTING_CPU_INFO  = Getting CPU information.
 MSG_HALTING           = Stopping CPU execution.
 MSG_ERASING_CHIP      = Performing a JTAG Chip Erase command.
 MSG_ERASING           = Performing a flash chip erase.
-MSG_PROGRAMMING       = Programming MCU memory from \`$(TGTFILE)\'.
+MSG_PROGRAMMING       = Programming MCU memory from \`$(TARGET)\'.
 MSG_SECURING_FLASH    = Protecting chip by setting security bit.
 MSG_RESETTING         = Resetting MCU.
 MSG_DEBUGGING         = Opening debug connection with MCU.
@@ -182,7 +181,7 @@ clean:
        -$(VERBOSE_CMD)$(RM) $(HEX)
        -$(VERBOSE_CMD)$(RM) $(SYM)
        -$(VERBOSE_CMD)$(RM) $(LSS)
-       -$(VERBOSE_CMD)$(RM) $(TGTFILE)
+       -$(VERBOSE_CMD)$(RM) $(TARGET)
        -$(VERBOSE_CMD)$(RM) $(OBJFILES)
        -$(VERBOSE_CMD)$(RM) $(ASFILES)
        -$(VERBOSE_CMD)$(RM) $(CPPFILES)
@@ -215,12 +214,12 @@ objfiles: $(OBJFILES)
 ifeq ($(TGTTYPE),.a)
 # Archive: create A output file from object files.
 .PHONY: a
-a: $(TGTFILE)
+a: $(TARGET)
 else
 ifeq ($(TGTTYPE),.elf)
 # Link: create ELF output file from object files.
 .PHONY: elf
-elf: $(TGTFILE)
+elf: $(TARGET)
 endif
 endif
 
@@ -246,7 +245,7 @@ endif
 
 # Display target size information.
 .PHONY: sizes
-sizes: $(TGTFILE)
+sizes: $(TARGET)
        @echo
        @echo
 ifeq ($(TGTTYPE),.a)
@@ -334,7 +333,7 @@ endif
 program: all
        @echo
        @echo $(MSG_PROGRAMMING)
-       $(VERBOSE_CMD)$(PROGRAM) program $(FLASH:%=-f%) $(PROG_CLOCK:%=-c%) -e -v -R $(if $(findstring run,$(MAKECMDGOALS)),-r) $(TGTFILE)
+       $(VERBOSE_CMD)$(PROGRAM) program $(FLASH:%=-f%) $(PROG_CLOCK:%=-c%) -e -v -R $(if $(findstring run,$(MAKECMDGOALS)),-r) $(TARGET)
 ifneq ($(call LastWord,$(filter cpuinfo chiperase program secureflash debug readregs,$(MAKECMDGOALS))),program)
        @$(SLEEP) $(SLEEPUSB)
 else
@@ -430,7 +429,7 @@ endif
 program: all
        @echo
        @echo $(MSG_PROGRAMMING)
-       $(VERBOSE_CMD)$(ISP) $(ISPFLAGS) erase f memory flash blankcheck loadbuffer $(TGTFILE) program verify $(if $(findstring run,$(MAKECMDGOALS)),$(if $(findstring secureflash,$(MAKECMDGOALS)),,start $(if $(findstring reset,$(MAKECMDGOALS)),,no)reset 0))
+       $(VERBOSE_CMD)$(ISP) $(ISPFLAGS) erase f memory flash blankcheck loadbuffer $(TARGET) program verify $(if $(findstring run,$(MAKECMDGOALS)),$(if $(findstring secureflash,$(MAKECMDGOALS)),,start $(if $(findstring reset,$(MAKECMDGOALS)),,no)reset 0))
 ifeq ($(call LastWord,$(filter program secureflash debug,$(MAKECMDGOALS))),program)
        @echo
 endif
@@ -528,7 +527,7 @@ $(CPPFILES) $(ASFILES) $(OBJFILES): Makefile $(MAKECFG)
 
 ifeq ($(TGTTYPE),.elf)
 # Files resulting from linking depend on linker script.
-$(TGTFILE): $(LINKER_SCRIPT)
+$(TARGET): $(LINKER_SCRIPT)
 endif
 
 # Preprocess: create preprocessed files from C source files.
@@ -574,16 +573,16 @@ endif
 .PRECIOUS: $(OBJFILES)
 ifeq ($(TGTTYPE),.a)
 # Archive: create A output file from object files.
-.SECONDARY: $(TGTFILE)
-$(TGTFILE): $(OBJFILES)
+.SECONDARY: $(TARGET)
+$(TARGET): $(OBJFILES)
        @echo $(MSG_ARCHIVING)
        $(VERBOSE_CMD)$(AR) $(ARFLAGS) $@ $(filter %.o,$+)
        $(VERBOSE_NL)
 else
 ifeq ($(TGTTYPE),.elf)
 # Link: create ELF output file from object files.
-.SECONDARY: $(TGTFILE)
-$(TGTFILE): $(OBJFILES)
+.SECONDARY: $(TARGET)
+$(TARGET): $(OBJFILES)
        @echo $(MSG_LINKING)
        $(VERBOSE_CMD)$(CC) $(LDFLAGS) $(filter %.o,$+) $(LOADLIBES) $(LDLIBS) -o $@
        $(VERBOSE_NL)
@@ -591,13 +590,13 @@ endif
 endif
 
 # Create extended listing from target output file.
-$(LSS): $(TGTFILE)
+$(LSS): $(TARGET)
        @echo $(MSG_EXTENDED_LISTING)
        $(VERBOSE_CMD)$(OBJDUMP) -h -S $< > $@
        $(VERBOSE_NL)
 
 # Create symbol table from target output file.
-$(SYM): $(TGTFILE)
+$(SYM): $(TARGET)
        @echo $(MSG_SYMBOL_TABLE)
        $(VERBOSE_CMD)$(NM) -n $< > $@
        $(VERBOSE_NL)
@@ -605,13 +604,13 @@ $(SYM): $(TGTFILE)
 ifeq ($(TGTTYPE),.elf)
 
 # Create Intel HEX image from ELF output file.
-$(HEX): $(TGTFILE)
+$(HEX): $(TARGET)
        @echo $(MSG_IHEX_IMAGE)
        $(VERBOSE_CMD)$(OBJCOPY) -O ihex $< $@
        $(VERBOSE_NL)
 
 # Create binary image from ELF output file.
-$(BIN): $(TGTFILE)
+$(BIN): $(TARGET)
        @echo $(MSG_BINARY_IMAGE)
        $(VERBOSE_CMD)$(OBJCOPY) -O binary $< $@
        $(VERBOSE_NL)

diff --git a/Demo/AVR32_UC3/AT32UC3A/GCC/config.mk b/Demo/AVR32_UC3/AT32UC3A/GCC/config.mk
index 2d5188542208bc459ae4cc576cae5c174a4c75cd..16d80054341250233f70612db050f8cdc362c977 100644 (file)
--- a/Demo/AVR32_UC3/AT32UC3A/GCC/config.mk
+++ b/Demo/AVR32_UC3/AT32UC3A/GCC/config.mk
@@ -56,7 +56,7 @@ PLATFORM_INC_PATH = \
   $(BRDS_PATH)/
 
 # Target name: {*.a|*.elf}
-TARGET = rtosdemo.elf
+TARGET = $(PART)-rtosdemo.elf
 
 # Definitions: [-D name[=definition]...] [-U name...]
 # Things that might be added to DEFS:

diff --git a/Demo/AVR32_UC3/AT32UC3A/IAR/Debug/Obj/rtosdemo.pbd b/Demo/AVR32_UC3/AT32UC3A/IAR/Debug/Obj/rtosdemo.pbd
new file mode 100644 (file)
index 0000000..235cec1
--- /dev/null
+++ b/Demo/AVR32_UC3/AT32UC3A/IAR/Debug/Obj/rtosdemo.pbd
@@ -0,0 +1,27 @@
+This is an internal working file generated by the Source Browser.\r
+20:15 21s\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\AVR32_UC3\AT32UC3A\IAR\Debug\Obj\BlockQ.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\AVR32_UC3\AT32UC3A\IAR\Debug\Obj\ParTest.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\AVR32_UC3\AT32UC3A\IAR\Debug\Obj\PollQ.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\AVR32_UC3\AT32UC3A\IAR\Debug\Obj\comtest.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\AVR32_UC3\AT32UC3A\IAR\Debug\Obj\death.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\AVR32_UC3\AT32UC3A\IAR\Debug\Obj\dynamic.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\AVR32_UC3\AT32UC3A\IAR\Debug\Obj\flash.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\AVR32_UC3\AT32UC3A\IAR\Debug\Obj\flop.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\AVR32_UC3\AT32UC3A\IAR\Debug\Obj\gpio.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\AVR32_UC3\AT32UC3A\IAR\Debug\Obj\heap_3.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\AVR32_UC3\AT32UC3A\IAR\Debug\Obj\intc.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\AVR32_UC3\AT32UC3A\IAR\Debug\Obj\integer.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\AVR32_UC3\AT32UC3A\IAR\Debug\Obj\led.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\AVR32_UC3\AT32UC3A\IAR\Debug\Obj\list.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\AVR32_UC3\AT32UC3A\IAR\Debug\Obj\main.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\AVR32_UC3\AT32UC3A\IAR\Debug\Obj\pm.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\AVR32_UC3\AT32UC3A\IAR\Debug\Obj\port.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\AVR32_UC3\AT32UC3A\IAR\Debug\Obj\queue.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\AVR32_UC3\AT32UC3A\IAR\Debug\Obj\read.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\AVR32_UC3\AT32UC3A\IAR\Debug\Obj\semtest.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\AVR32_UC3\AT32UC3A\IAR\Debug\Obj\serial.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\AVR32_UC3\AT32UC3A\IAR\Debug\Obj\tasks.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\AVR32_UC3\AT32UC3A\IAR\Debug\Obj\tc.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\AVR32_UC3\AT32UC3A\IAR\Debug\Obj\usart.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\AVR32_UC3\AT32UC3A\IAR\Debug\Obj\write.pbi\r

diff --git a/Demo/AVR32_UC3/AT32UC3A/IAR/rtosdemo.ewp b/Demo/AVR32_UC3/AT32UC3A/IAR/rtosdemo.ewp
index 0a9a40bb7b5c126b0cc3f5be78a26b0462e43deb..c2e97e8273ee3b3038f698a34d0d07e97f442bee 100644 (file)
--- a/Demo/AVR32_UC3/AT32UC3A/IAR/rtosdemo.ewp
+++ b/Demo/AVR32_UC3/AT32UC3A/IAR/rtosdemo.ewp
@@ -337,16 +337,16 @@
         </option>\r
         <option>\r
           <name>CCOptLevel</name>\r
-          <state>1</state>\r
+          <state>0</state>\r
         </option>\r
         <option>\r
           <name>CCOptStrategy</name>\r
           <version>0</version>\r
-          <state>0</state>\r
+          <state>2</state>\r
         </option>\r
         <option>\r
           <name>CCOptLevelSlave</name>\r
-          <state>1</state>\r
+          <state>0</state>\r
         </option>\r
       </data>\r
     </settings>\r

diff --git a/Demo/AVR32_UC3/AT32UC3B/GCC/Makefile b/Demo/AVR32_UC3/AT32UC3B/GCC/Makefile
index 55ee8bc9a3767a84f2f828a00e12a37ecdba604c..6f51ddb103528a38e9fb66f18ea698f47ec8c7fc 100644 (file)
--- a/Demo/AVR32_UC3/AT32UC3B/GCC/Makefile
+++ b/Demo/AVR32_UC3/AT32UC3B/GCC/Makefile
@@ -69,7 +69,6 @@ LastWord  = $(if $(1),$(word $(words $(1)),$(1)))
 MAKE      = make
 MAKECFG   = config.mk
 TGTTYPE   = $(suffix $(TARGET))
-TGTFILE   = $(PART)-$(TARGET)
 
 RM        = rm -Rf
 
@@ -99,14 +98,14 @@ LOADLIBES =
 LDLIBS    = $(LIBS:%=-l%)
 
 OBJDUMP   = avr32-objdump
-LSS       = $(TGTFILE:$(TGTTYPE)=.lss)
+LSS       = $(TARGET:$(TGTTYPE)=.lss)
 
 NM        = avr32-nm
-SYM       = $(TGTFILE:$(TGTTYPE)=.sym)
+SYM       = $(TARGET:$(TGTTYPE)=.sym)
 
 OBJCOPY   = avr32-objcopy
-HEX       = $(TGTFILE:$(TGTTYPE)=.hex)
-BIN       = $(TGTFILE:$(TGTTYPE)=.bin)
+HEX       = $(TARGET:$(TGTTYPE)=.hex)
+BIN       = $(TARGET:$(TGTTYPE)=.bin)
 
 SIZE      = avr32-size
 
@@ -142,7 +141,7 @@ MSG_GETTING_CPU_INFO  = Getting CPU information.
 MSG_HALTING           = Stopping CPU execution.
 MSG_ERASING_CHIP      = Performing a JTAG Chip Erase command.
 MSG_ERASING           = Performing a flash chip erase.
-MSG_PROGRAMMING       = Programming MCU memory from \`$(TGTFILE)\'.
+MSG_PROGRAMMING       = Programming MCU memory from \`$(TARGET)\'.
 MSG_SECURING_FLASH    = Protecting chip by setting security bit.
 MSG_RESETTING         = Resetting MCU.
 MSG_DEBUGGING         = Opening debug connection with MCU.
@@ -182,7 +181,7 @@ clean:
        -$(VERBOSE_CMD)$(RM) $(HEX)
        -$(VERBOSE_CMD)$(RM) $(SYM)
        -$(VERBOSE_CMD)$(RM) $(LSS)
-       -$(VERBOSE_CMD)$(RM) $(TGTFILE)
+       -$(VERBOSE_CMD)$(RM) $(TARGET)
        -$(VERBOSE_CMD)$(RM) $(OBJFILES)
        -$(VERBOSE_CMD)$(RM) $(ASFILES)
        -$(VERBOSE_CMD)$(RM) $(CPPFILES)
@@ -215,12 +214,12 @@ objfiles: $(OBJFILES)
 ifeq ($(TGTTYPE),.a)
 # Archive: create A output file from object files.
 .PHONY: a
-a: $(TGTFILE)
+a: $(TARGET)
 else
 ifeq ($(TGTTYPE),.elf)
 # Link: create ELF output file from object files.
 .PHONY: elf
-elf: $(TGTFILE)
+elf: $(TARGET)
 endif
 endif
 
@@ -246,7 +245,7 @@ endif
 
 # Display target size information.
 .PHONY: sizes
-sizes: $(TGTFILE)
+sizes: $(TARGET)
        @echo
        @echo
 ifeq ($(TGTTYPE),.a)
@@ -334,7 +333,7 @@ endif
 program: all
        @echo
        @echo $(MSG_PROGRAMMING)
-       $(VERBOSE_CMD)$(PROGRAM) program $(FLASH:%=-f%) $(PROG_CLOCK:%=-c%) -e -v -R $(if $(findstring run,$(MAKECMDGOALS)),-r) $(TGTFILE)
+       $(VERBOSE_CMD)$(PROGRAM) program $(FLASH:%=-f%) $(PROG_CLOCK:%=-c%) -e -v -R $(if $(findstring run,$(MAKECMDGOALS)),-r) $(TARGET)
 ifneq ($(call LastWord,$(filter cpuinfo chiperase program secureflash debug readregs,$(MAKECMDGOALS))),program)
        @$(SLEEP) $(SLEEPUSB)
 else
@@ -430,7 +429,7 @@ endif
 program: all
        @echo
        @echo $(MSG_PROGRAMMING)
-       $(VERBOSE_CMD)$(ISP) $(ISPFLAGS) erase f memory flash blankcheck loadbuffer $(TGTFILE) program verify $(if $(findstring run,$(MAKECMDGOALS)),$(if $(findstring secureflash,$(MAKECMDGOALS)),,start $(if $(findstring reset,$(MAKECMDGOALS)),,no)reset 0))
+       $(VERBOSE_CMD)$(ISP) $(ISPFLAGS) erase f memory flash blankcheck loadbuffer $(TARGET) program verify $(if $(findstring run,$(MAKECMDGOALS)),$(if $(findstring secureflash,$(MAKECMDGOALS)),,start $(if $(findstring reset,$(MAKECMDGOALS)),,no)reset 0))
 ifeq ($(call LastWord,$(filter program secureflash debug,$(MAKECMDGOALS))),program)
        @echo
 endif
@@ -528,7 +527,7 @@ $(CPPFILES) $(ASFILES) $(OBJFILES): Makefile $(MAKECFG)
 
 ifeq ($(TGTTYPE),.elf)
 # Files resulting from linking depend on linker script.
-$(TGTFILE): $(LINKER_SCRIPT)
+$(TARGET): $(LINKER_SCRIPT)
 endif
 
 # Preprocess: create preprocessed files from C source files.
@@ -574,16 +573,16 @@ endif
 .PRECIOUS: $(OBJFILES)
 ifeq ($(TGTTYPE),.a)
 # Archive: create A output file from object files.
-.SECONDARY: $(TGTFILE)
-$(TGTFILE): $(OBJFILES)
+.SECONDARY: $(TARGET)
+$(TARGET): $(OBJFILES)
        @echo $(MSG_ARCHIVING)
        $(VERBOSE_CMD)$(AR) $(ARFLAGS) $@ $(filter %.o,$+)
        $(VERBOSE_NL)
 else
 ifeq ($(TGTTYPE),.elf)
 # Link: create ELF output file from object files.
-.SECONDARY: $(TGTFILE)
-$(TGTFILE): $(OBJFILES)
+.SECONDARY: $(TARGET)
+$(TARGET): $(OBJFILES)
        @echo $(MSG_LINKING)
        $(VERBOSE_CMD)$(CC) $(LDFLAGS) $(filter %.o,$+) $(LOADLIBES) $(LDLIBS) -o $@
        $(VERBOSE_NL)
@@ -591,13 +590,13 @@ endif
 endif
 
 # Create extended listing from target output file.
-$(LSS): $(TGTFILE)
+$(LSS): $(TARGET)
        @echo $(MSG_EXTENDED_LISTING)
        $(VERBOSE_CMD)$(OBJDUMP) -h -S $< > $@
        $(VERBOSE_NL)
 
 # Create symbol table from target output file.
-$(SYM): $(TGTFILE)
+$(SYM): $(TARGET)
        @echo $(MSG_SYMBOL_TABLE)
        $(VERBOSE_CMD)$(NM) -n $< > $@
        $(VERBOSE_NL)
@@ -605,13 +604,13 @@ $(SYM): $(TGTFILE)
 ifeq ($(TGTTYPE),.elf)
 
 # Create Intel HEX image from ELF output file.
-$(HEX): $(TGTFILE)
+$(HEX): $(TARGET)
        @echo $(MSG_IHEX_IMAGE)
        $(VERBOSE_CMD)$(OBJCOPY) -O ihex $< $@
        $(VERBOSE_NL)
 
 # Create binary image from ELF output file.
-$(BIN): $(TGTFILE)
+$(BIN): $(TARGET)
        @echo $(MSG_BINARY_IMAGE)
        $(VERBOSE_CMD)$(OBJCOPY) -O binary $< $@
        $(VERBOSE_NL)

diff --git a/Demo/AVR32_UC3/AT32UC3B/GCC/config.mk b/Demo/AVR32_UC3/AT32UC3B/GCC/config.mk
index cdefc6a24d9fa758c8f9f0f4ad61b3330b969fb3..6caf8ef1c9374d0dfade378a882bccea0bbdc44d 100644 (file)
--- a/Demo/AVR32_UC3/AT32UC3B/GCC/config.mk
+++ b/Demo/AVR32_UC3/AT32UC3B/GCC/config.mk
@@ -56,7 +56,7 @@ PLATFORM_INC_PATH = \
   $(BRDS_PATH)/
 
 # Target name: {*.a|*.elf}
-TARGET = rtosdemo.elf
+TARGET = $(PART)-rtosdemo.elf
 
 # Definitions: [-D name[=definition]...] [-U name...]
 # Things that might be added to DEFS:

diff --git a/Demo/AVR32_UC3/DRIVERS/INTC/intc.c b/Demo/AVR32_UC3/DRIVERS/INTC/intc.c
index e6a64298a4010467011988a9b738d46eaba3f6c2..8bd9b880e2907c638f071dd6b82aefe113bc20de 100644 (file)
--- a/Demo/AVR32_UC3/DRIVERS/INTC/intc.c
+++ b/Demo/AVR32_UC3/DRIVERS/INTC/intc.c
@@ -53,8 +53,13 @@ extern const unsigned int ipr_val[AVR32_INTC_NUM_INT_LEVELS];
 \r
 //! Creates a table of interrupt line handlers per interrupt group in order to optimize RAM space.\r
 //! Each line handler table contains a set of pointers to interrupt handlers.\r
+#if __GNUC__\r
 #define DECL_INT_LINE_HANDLER_TABLE(GRP, unused) \\r
 static volatile __int_handler _int_line_handler_table_##GRP[Max(AVR32_INTC_NUM_IRQS_PER_GRP##GRP, 1)];\r
+#elif __ICCAVR32__\r
+#define DECL_INT_LINE_HANDLER_TABLE(GRP, unused) \\r
+static volatile __no_init __int_handler _int_line_handler_table_##GRP[Max(AVR32_INTC_NUM_IRQS_PER_GRP##GRP, 1)];\r
+#endif\r
 MREPEAT(AVR32_INTC_NUM_INT_GRPS, DECL_INT_LINE_HANDLER_TABLE, ~);\r
 #undef DECL_INT_LINE_HANDLER_TABLE\r
 \r

diff --git a/Demo/AVR32_UC3/DRIVERS/PM/pm.h b/Demo/AVR32_UC3/DRIVERS/PM/pm.h
index 616129b56fcf1789b29057d8dbd95118dbd73443..12ab46962ea840e9cd5cfdc8a2740d0bfa80eb26 100644 (file)
--- a/Demo/AVR32_UC3/DRIVERS/PM/pm.h
+++ b/Demo/AVR32_UC3/DRIVERS/PM/pm.h
@@ -212,7 +212,6 @@ extern void pm_enable_clk32_no_wait(volatile avr32_pm_t *pm, unsigned int startu
 extern void pm_wait_for_clk32_ready(volatile avr32_pm_t *pm);\r
 \r
 \r
-//FIXME update this header -SM\r
 /*!\r
  * \brief This function will select all the power manager clocks.\r
  * \param pm Base address of the Power Manager (i.e. &AVR32_PM)\r
@@ -254,20 +253,18 @@ extern void pm_gc_enable(volatile avr32_pm_t *pm, unsigned int gc);
 extern void pm_gc_disable(volatile avr32_pm_t *pm, unsigned int gc);\r
 \r
 \r
-//FIXME update this header -SM\r
 /*!\r
  * \brief This function will setup a PLL.\r
  * \param pm Base address of the Power Manager (i.e. &AVR32_PM)\r
  * \param pll PLL number(0 for PLL0, 1 for PLL1)\r
- * \param mul\r
- * \param div\r
- * \param osc\r
- * \param lockcount\r
+ * \param mul PLL MUL in the PLL formula\r
+ * \param div PLL DIV in the PLL formula\r
+ * \param osc OSC number (0 for osc0, 1 for osc1)\r
+ * \param lockcount PLL lockount\r
  */\r
 extern void pm_pll_setup(volatile avr32_pm_t *pm, unsigned int pll, unsigned int mul, unsigned int div, unsigned int osc, unsigned int lockcount);\r
 \r
 \r
-//FIXME update this header -SM\r
 /*!\r
  * \brief This function will set a PLL option.\r
  * \param pm Base address of the Power Manager (i.e. &AVR32_PM)\r
@@ -279,7 +276,6 @@ extern void pm_pll_setup(volatile avr32_pm_t *pm, unsigned int pll, unsigned int
 extern void pm_pll_set_option(volatile avr32_pm_t *pm, unsigned int pll, unsigned int  pll_freq, unsigned int  pll_div2, unsigned int  pll_wbwdisable);\r
 \r
 \r
-//FIXME update this header -SM\r
 /*!\r
  * \brief This function will get a PLL option.\r
  * \param pm Base address of the Power Manager (i.e. &AVR32_PM)\r

diff --git a/Demo/AVR32_UC3/FreeRTOSConfig.h b/Demo/AVR32_UC3/FreeRTOSConfig.h
index 3fc90ffff96aa4d9021ec0be476a24d543521405..723ffb952b8ab2f5741d31b974a0f8fbf332abce 100644 (file)
--- a/Demo/AVR32_UC3/FreeRTOSConfig.h
+++ b/Demo/AVR32_UC3/FreeRTOSConfig.h
@@ -65,7 +65,7 @@
 #define configMAX_PRIORITIES      ( ( unsigned portBASE_TYPE ) 8 )\r
 #define configMINIMAL_STACK_SIZE  ( ( unsigned portSHORT ) 128 )\r
 /* configTOTAL_HEAP_SIZE is not used when heap_3.c is used. */\r
-#define configTOTAL_HEAP_SIZE     ( ( size_t ) ( 1 ) )\r
+#define configTOTAL_HEAP_SIZE     ( ( size_t ) ( 1024*25 ) )\r
 #define configMAX_TASK_NAME_LEN   ( 16 )\r
 #define configUSE_TRACE_FACILITY  0\r
 #define configUSE_16_BIT_TICKS    0\r

diff --git a/Demo/AVR32_UC3/UTILS/compiler.h b/Demo/AVR32_UC3/UTILS/compiler.h
index 5d75c0937f9f8258758f761ed3937e6167b9af09..70cc8d05c6d6d40cf6fabd7ec78b7e02d895ddf8 100644 (file)
--- a/Demo/AVR32_UC3/UTILS/compiler.h
+++ b/Demo/AVR32_UC3/UTILS/compiler.h
@@ -45,7 +45,9 @@
 #ifndef _COMPILER_H_\r
 #define _COMPILER_H_\r
 \r
-#include <avr32/io.h>\r
+#if (__GNUC__ && __AVR32__) || (__ICCAVR32__ || __AAVR32__)\r
+#  include <avr32/io.h>\r
+#endif\r
 #if __ICCAVR32__\r
 #  include <intrinsics.h>\r
 #endif\r
@@ -509,7 +511,7 @@ typedef struct
     }\\r
   )\r
 #elif __ICCAVR32__\r
-  #define min(a, b)   Min(a, b)\r
+  #define min(a, b)   __min(a, b)\r
 #endif\r
 \r
 /*! \brief Takes the maximal value of \a a and \a b.\r
@@ -531,7 +533,7 @@ typedef struct
     }\\r
   )\r
 #elif __ICCAVR32__\r
-  #define max(a, b)   Max(a, b)\r
+  #define max(a, b)   __max(a, b)\r
 #endif\r
 \r
 //! @}\r
@@ -751,6 +753,36 @@ typedef struct
 \r
 //! @}\r
 \r
+\r
+/*! \name Debug Register Access\r
+ */\r
+//! @{\r
+\r
+/*! \brief Gets the value of the \a dbgreg debug register.\r
+ *\r
+ * \param dbgreg  Address of the debug register of which to get the value.\r
+ *\r
+ * \return Value of the \a dbgreg debug register.\r
+ */\r
+#if __GNUC__\r
+  #define Get_debug_register(dbgreg)          __builtin_mfdr(dbgreg)\r
+#elif __ICCAVR32__\r
+  #define Get_debug_register(dbgreg)          __get_debug_register(dbgreg)\r
+#endif\r
+\r
+/*! \brief Sets the value of the \a dbgreg debug register to \a value.\r
+ *\r
+ * \param dbgreg  Address of the debug register of which to set the value.\r
+ * \param value   Value to set the \a dbgreg debug register to.\r
+ */\r
+#if __GNUC__\r
+  #define Set_debug_register(dbgreg, value)   __builtin_mtdr(dbgreg, value)\r
+#elif __ICCAVR32__\r
+  #define Set_debug_register(dbgreg, value)   __set_debug_register(dbgreg, value)\r
+#endif\r
+\r
+//! @}\r
+\r
 #endif  // __AVR32_ABI_COMPILER__\r
 \r
 \r
@@ -919,9 +951,9 @@ typedef struct
  * \note More optimized if only used with values unknown at compile time.\r
  */\r
 #if __GNUC__\r
-  #define swap16(u16) __builtin_bswap_16(u16)\r
+  #define swap16(u16) ((U16)__builtin_bswap_16((U16)(u16)))\r
 #elif __ICCAVR32__\r
-  #define swap16(u16) Swap16(u16)\r
+  #define swap16(u16) ((U16)__swap_bytes_in_halfwords((U16)(u16)))\r
 #endif\r
 \r
 /*! \brief Toggles the endianism of \a u32 (by swapping its bytes).\r
@@ -933,9 +965,9 @@ typedef struct
  * \note More optimized if only used with values unknown at compile time.\r
  */\r
 #if __GNUC__\r
-  #define swap32(u32) __builtin_bswap_32(u32)\r
+  #define swap32(u32) ((U32)__builtin_bswap_32((U32)(u32)))\r
 #elif __ICCAVR32__\r
-  #define swap32(u32) Swap32(u32)\r
+  #define swap32(u32) ((U32)__swap_bytes((U32)(u32)))\r
 #endif\r
 \r
 /*! \brief Toggles the endianism of \a u64 (by swapping its bytes).\r

diff --git a/Demo/AVR32_UC3/main.c b/Demo/AVR32_UC3/main.c
index 9427ee43ace2f45e2f2974a8012e4cda929d4232..d008d42e3bee265bcdfc43729aa93521c46038b6 100644 (file)
--- a/Demo/AVR32_UC3/main.c
+++ b/Demo/AVR32_UC3/main.c
@@ -1,5 +1,3 @@
-/* This source file is part of the ATMEL FREERTOS-0.9.0 Release */\r
-\r
 /*This file has been prepared for Doxygen automatic documentation generation.*/\r
 /*! \file *********************************************************************\r
  *\r
@@ -27,12 +25,12 @@
  * - AppNote:\r
  *\r
  * \author               Atmel Corporation: http://www.atmel.com \n\r
- *                       Support email: avr32@atmel.com\r
+ *                       Support and FAQ: http://support.atmel.no/\r
  *\r
  *****************************************************************************/\r
 \r
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r
@@ -274,6 +272,12 @@ portBASE_TYPE bSuicidalTask = 0;
                /* Delay until it is time to execute again. */\r
                vTaskDelay( mainCHECK_PERIOD );\r
 \r
+               /* Delete the dynamically created task. */\r
+               if( xCreatedTask != mainNO_TASK )\r
+               {\r
+                       vTaskDelete( xCreatedTask );\r
+               }\r
+\r
                /* Perform a bit of 32bit maths to ensure the registers used by the\r
                integer tasks get some exercise. The result here is not important -\r
                see the demo application documentation for more info. */\r
@@ -294,12 +298,6 @@ portBASE_TYPE bSuicidalTask = 0;
                        /* Toggle the LED if everything is okay. */\r
                        vParTestToggleLED( mainCHECK_TASK_LED );\r
                }\r
-\r
-               /* Delete the dynamically created task. */\r
-               if( xCreatedTask != mainNO_TASK )\r
-               {\r
-                       vTaskDelete( xCreatedTask );\r
-               }\r
        }\r
 }\r
 /*-----------------------------------------------------------*/\r

diff --git a/Demo/AVR_ATMega323_IAR/FreeRTOSConfig.h b/Demo/AVR_ATMega323_IAR/FreeRTOSConfig.h
index 0604dc41804d7d80d500d25a6149ac6ac379d69c..6467216907535804cbdd4ffc2b8e4dde0c20a2cd 100644 (file)
--- a/Demo/AVR_ATMega323_IAR/FreeRTOSConfig.h
+++ b/Demo/AVR_ATMega323_IAR/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/AVR_ATMega323_IAR/ParTest/ParTest.c b/Demo/AVR_ATMega323_IAR/ParTest/ParTest.c
index 5a97ba54d5023e59467889ffd7917f4ecf4fa7ff..c654316883fe4352694002499123e8707bd38f50 100644 (file)
--- a/Demo/AVR_ATMega323_IAR/ParTest/ParTest.c
+++ b/Demo/AVR_ATMega323_IAR/ParTest/ParTest.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/AVR_ATMega323_IAR/main.c b/Demo/AVR_ATMega323_IAR/main.c
index 7592f135cacacf6e9696b7fd525f4a4eaa9e20d8..9322d4e143f2f71af070e6ad8bfae2c89ea38661 100644 (file)
--- a/Demo/AVR_ATMega323_IAR/main.c
+++ b/Demo/AVR_ATMega323_IAR/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/AVR_ATMega323_IAR/regtest.c b/Demo/AVR_ATMega323_IAR/regtest.c
index 582da7177e63a4f5b33cd763b1e92735731af9a3..f8a7ac21289f085ede5cef57f4dfa8cb2f7c475f 100644 (file)
--- a/Demo/AVR_ATMega323_IAR/regtest.c
+++ b/Demo/AVR_ATMega323_IAR/regtest.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/AVR_ATMega323_IAR/regtest.h b/Demo/AVR_ATMega323_IAR/regtest.h
index 78390891605c3c4988a0ff15747ec7605e219c1c..e74222e4338f2497f25951682377f55dcf794353 100644 (file)
--- a/Demo/AVR_ATMega323_IAR/regtest.h
+++ b/Demo/AVR_ATMega323_IAR/regtest.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/AVR_ATMega323_IAR/serial/serial.c b/Demo/AVR_ATMega323_IAR/serial/serial.c
index ecd2baa444dcf84effe4361d3ffde9df1fdd45fb..d164874a41dbcce3b7c1b19d1f3bee32dccd1e49 100644 (file)
--- a/Demo/AVR_ATMega323_IAR/serial/serial.c
+++ b/Demo/AVR_ATMega323_IAR/serial/serial.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/AVR_ATMega323_WinAVR/FreeRTOSConfig.h b/Demo/AVR_ATMega323_WinAVR/FreeRTOSConfig.h
index ed569a0d7c4c906c9d8099a89f6a4a5b54f760c0..5257d1e90acc9dbc433e7c2e30ba476aa8bc4f9e 100644 (file)
--- a/Demo/AVR_ATMega323_WinAVR/FreeRTOSConfig.h
+++ b/Demo/AVR_ATMega323_WinAVR/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/AVR_ATMega323_WinAVR/ParTest/ParTest.c b/Demo/AVR_ATMega323_WinAVR/ParTest/ParTest.c
index 5a97ba54d5023e59467889ffd7917f4ecf4fa7ff..c654316883fe4352694002499123e8707bd38f50 100644 (file)
--- a/Demo/AVR_ATMega323_WinAVR/ParTest/ParTest.c
+++ b/Demo/AVR_ATMega323_WinAVR/ParTest/ParTest.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/AVR_ATMega323_WinAVR/main.c b/Demo/AVR_ATMega323_WinAVR/main.c
index c4a746374c1cbef283f3b697fce740b603bb18b3..74269f94f28ca5215745ed632158b072dfc09bee 100644 (file)
--- a/Demo/AVR_ATMega323_WinAVR/main.c
+++ b/Demo/AVR_ATMega323_WinAVR/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/AVR_ATMega323_WinAVR/regtest.c b/Demo/AVR_ATMega323_WinAVR/regtest.c
index 582da7177e63a4f5b33cd763b1e92735731af9a3..f8a7ac21289f085ede5cef57f4dfa8cb2f7c475f 100644 (file)
--- a/Demo/AVR_ATMega323_WinAVR/regtest.c
+++ b/Demo/AVR_ATMega323_WinAVR/regtest.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/AVR_ATMega323_WinAVR/regtest.h b/Demo/AVR_ATMega323_WinAVR/regtest.h
index 78390891605c3c4988a0ff15747ec7605e219c1c..e74222e4338f2497f25951682377f55dcf794353 100644 (file)
--- a/Demo/AVR_ATMega323_WinAVR/regtest.h
+++ b/Demo/AVR_ATMega323_WinAVR/regtest.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/AVR_ATMega323_WinAVR/serial/serial.c b/Demo/AVR_ATMega323_WinAVR/serial/serial.c
index dea7003c3a647882bef9983058aa8ab5d5103c36..ba4e0df204dba2f5b4982ec653c2fa53f0df5098 100644 (file)
--- a/Demo/AVR_ATMega323_WinAVR/serial/serial.c
+++ b/Demo/AVR_ATMega323_WinAVR/serial/serial.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/CORTEX_LM3S102_GCC/Demo1/FreeRTOSConfig.h b/Demo/CORTEX_LM3S102_GCC/Demo1/FreeRTOSConfig.h
index 019623d2af3328e825d0ca1ab2f11e1f50837b17..d2f820c441887ed687f95183549912bc641b9693 100644 (file)
--- a/Demo/CORTEX_LM3S102_GCC/Demo1/FreeRTOSConfig.h
+++ b/Demo/CORTEX_LM3S102_GCC/Demo1/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/CORTEX_LM3S102_GCC/Demo1/main.c b/Demo/CORTEX_LM3S102_GCC/Demo1/main.c
index 4c811c54179be9f408af0d9999ccb3161a4381ab..92c387f89f3b8b9c48a4c7e187eac74f4a433c33 100644 (file)
--- a/Demo/CORTEX_LM3S102_GCC/Demo1/main.c
+++ b/Demo/CORTEX_LM3S102_GCC/Demo1/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/CORTEX_LM3S102_GCC/Demo2/FreeRTOSConfig.h b/Demo/CORTEX_LM3S102_GCC/Demo2/FreeRTOSConfig.h
index 32852bda4356aad4aeb588850213d66d7860a82f..f00b90feacc6ec9d7a87f5b8f126833a1d9adb60 100644 (file)
--- a/Demo/CORTEX_LM3S102_GCC/Demo2/FreeRTOSConfig.h
+++ b/Demo/CORTEX_LM3S102_GCC/Demo2/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/CORTEX_LM3S102_GCC/Demo2/main.c b/Demo/CORTEX_LM3S102_GCC/Demo2/main.c
index b2c63496773a49bdbe1d7a3fca27745025812e0d..d4ec846f663e2cfb1ba10aab1b1003b987b07b76 100644 (file)
--- a/Demo/CORTEX_LM3S102_GCC/Demo2/main.c
+++ b/Demo/CORTEX_LM3S102_GCC/Demo2/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/CORTEX_LM3S102_GCC/FreeRTOSConfig.h b/Demo/CORTEX_LM3S102_GCC/FreeRTOSConfig.h
index 019623d2af3328e825d0ca1ab2f11e1f50837b17..d2f820c441887ed687f95183549912bc641b9693 100644 (file)
--- a/Demo/CORTEX_LM3S102_GCC/FreeRTOSConfig.h
+++ b/Demo/CORTEX_LM3S102_GCC/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/CORTEX_LM3S102_GCC/ParTest/ParTest.c b/Demo/CORTEX_LM3S102_GCC/ParTest/ParTest.c
index 41d19b640dbc297131c5bb30103280e48bd2cd9e..06a4799f7b77f05d113ea8960981b0eda4403673 100644 (file)
--- a/Demo/CORTEX_LM3S102_GCC/ParTest/ParTest.c
+++ b/Demo/CORTEX_LM3S102_GCC/ParTest/ParTest.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/CORTEX_LM3S102_GCC/main.c b/Demo/CORTEX_LM3S102_GCC/main.c
index 4c811c54179be9f408af0d9999ccb3161a4381ab..92c387f89f3b8b9c48a4c7e187eac74f4a433c33 100644 (file)
--- a/Demo/CORTEX_LM3S102_GCC/main.c
+++ b/Demo/CORTEX_LM3S102_GCC/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/CORTEX_LM3S102_KEIL/Demo1/FreeRTOSConfig.h b/Demo/CORTEX_LM3S102_KEIL/Demo1/FreeRTOSConfig.h
index 019623d2af3328e825d0ca1ab2f11e1f50837b17..d2f820c441887ed687f95183549912bc641b9693 100644 (file)
--- a/Demo/CORTEX_LM3S102_KEIL/Demo1/FreeRTOSConfig.h
+++ b/Demo/CORTEX_LM3S102_KEIL/Demo1/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/CORTEX_LM3S102_KEIL/Demo1/main.c b/Demo/CORTEX_LM3S102_KEIL/Demo1/main.c
index d986948dfe6359ee795ae67d7905534c5c92afa8..e9a3a6e4ddb7a6e8ea2a798d543949c6613bfb2f 100644 (file)
--- a/Demo/CORTEX_LM3S102_KEIL/Demo1/main.c
+++ b/Demo/CORTEX_LM3S102_KEIL/Demo1/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/CORTEX_LM3S102_KEIL/Demo2/FreeRTOSConfig.h b/Demo/CORTEX_LM3S102_KEIL/Demo2/FreeRTOSConfig.h
index 32852bda4356aad4aeb588850213d66d7860a82f..f00b90feacc6ec9d7a87f5b8f126833a1d9adb60 100644 (file)
--- a/Demo/CORTEX_LM3S102_KEIL/Demo2/FreeRTOSConfig.h
+++ b/Demo/CORTEX_LM3S102_KEIL/Demo2/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/CORTEX_LM3S102_KEIL/Demo2/main.c b/Demo/CORTEX_LM3S102_KEIL/Demo2/main.c
index 92ec629332aba39f8569191157f81cc4a18302f5..eca1e66338b6cbb1a8b104639435e9a12426e0b7 100644 (file)
--- a/Demo/CORTEX_LM3S102_KEIL/Demo2/main.c
+++ b/Demo/CORTEX_LM3S102_KEIL/Demo2/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/CORTEX_LM3S102_KEIL/FreeRTOSConfig.h b/Demo/CORTEX_LM3S102_KEIL/FreeRTOSConfig.h
index 019623d2af3328e825d0ca1ab2f11e1f50837b17..d2f820c441887ed687f95183549912bc641b9693 100644 (file)
--- a/Demo/CORTEX_LM3S102_KEIL/FreeRTOSConfig.h
+++ b/Demo/CORTEX_LM3S102_KEIL/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/CORTEX_LM3S102_KEIL/ParTest/ParTest.c b/Demo/CORTEX_LM3S102_KEIL/ParTest/ParTest.c
index 41d19b640dbc297131c5bb30103280e48bd2cd9e..06a4799f7b77f05d113ea8960981b0eda4403673 100644 (file)
--- a/Demo/CORTEX_LM3S102_KEIL/ParTest/ParTest.c
+++ b/Demo/CORTEX_LM3S102_KEIL/ParTest/ParTest.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/CORTEX_LM3S102_KEIL/main.c b/Demo/CORTEX_LM3S102_KEIL/main.c
index d986948dfe6359ee795ae67d7905534c5c92afa8..e9a3a6e4ddb7a6e8ea2a798d543949c6613bfb2f 100644 (file)
--- a/Demo/CORTEX_LM3S102_KEIL/main.c
+++ b/Demo/CORTEX_LM3S102_KEIL/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/CORTEX_LM3S102_Rowley/Demo1/FreeRTOSConfig.h b/Demo/CORTEX_LM3S102_Rowley/Demo1/FreeRTOSConfig.h
index 019623d2af3328e825d0ca1ab2f11e1f50837b17..d2f820c441887ed687f95183549912bc641b9693 100644 (file)
--- a/Demo/CORTEX_LM3S102_Rowley/Demo1/FreeRTOSConfig.h
+++ b/Demo/CORTEX_LM3S102_Rowley/Demo1/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/CORTEX_LM3S102_Rowley/Demo1/ParTest.c b/Demo/CORTEX_LM3S102_Rowley/Demo1/ParTest.c
index 41d19b640dbc297131c5bb30103280e48bd2cd9e..06a4799f7b77f05d113ea8960981b0eda4403673 100644 (file)
--- a/Demo/CORTEX_LM3S102_Rowley/Demo1/ParTest.c
+++ b/Demo/CORTEX_LM3S102_Rowley/Demo1/ParTest.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/CORTEX_LM3S102_Rowley/Demo1/main.c b/Demo/CORTEX_LM3S102_Rowley/Demo1/main.c
index 8b660b48b08fef7ed85aa11f1886124b821b164e..73bc0244b1c8ffbd34d5724281a20aa076ebd656 100644 (file)
--- a/Demo/CORTEX_LM3S102_Rowley/Demo1/main.c
+++ b/Demo/CORTEX_LM3S102_Rowley/Demo1/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/CORTEX_LM3S102_Rowley/Demo2/FreeRTOSConfig.h b/Demo/CORTEX_LM3S102_Rowley/Demo2/FreeRTOSConfig.h
index 32852bda4356aad4aeb588850213d66d7860a82f..f00b90feacc6ec9d7a87f5b8f126833a1d9adb60 100644 (file)
--- a/Demo/CORTEX_LM3S102_Rowley/Demo2/FreeRTOSConfig.h
+++ b/Demo/CORTEX_LM3S102_Rowley/Demo2/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/CORTEX_LM3S102_Rowley/Demo2/ParTest.c b/Demo/CORTEX_LM3S102_Rowley/Demo2/ParTest.c
index 41d19b640dbc297131c5bb30103280e48bd2cd9e..06a4799f7b77f05d113ea8960981b0eda4403673 100644 (file)
--- a/Demo/CORTEX_LM3S102_Rowley/Demo2/ParTest.c
+++ b/Demo/CORTEX_LM3S102_Rowley/Demo2/ParTest.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/CORTEX_LM3S102_Rowley/Demo2/main.c b/Demo/CORTEX_LM3S102_Rowley/Demo2/main.c
index 8121d71806d832cc8b30b705f4e070209f3337ce..4a7b4055e89bb5a57dc8d9b662963decaa4536e5 100644 (file)
--- a/Demo/CORTEX_LM3S102_Rowley/Demo2/main.c
+++ b/Demo/CORTEX_LM3S102_Rowley/Demo2/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/CORTEX_LM3S102_Rowley/Demo3/FreeRTOSConfig.h b/Demo/CORTEX_LM3S102_Rowley/Demo3/FreeRTOSConfig.h
index 809a46ac5aa344f92aeb623ac4eed750b5f5b9f8..ed272ade82d7574913af35446c9c7d57450a3ec1 100644 (file)
--- a/Demo/CORTEX_LM3S102_Rowley/Demo3/FreeRTOSConfig.h
+++ b/Demo/CORTEX_LM3S102_Rowley/Demo3/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/CORTEX_LM3S102_Rowley/Demo3/ParTest.c b/Demo/CORTEX_LM3S102_Rowley/Demo3/ParTest.c
index c2f6aaee8201c93037ce18f7da172fdf5e71d300..c837be51b7ae36b0fadd115e10024eb82b1d7ea8 100644 (file)
--- a/Demo/CORTEX_LM3S102_Rowley/Demo3/ParTest.c
+++ b/Demo/CORTEX_LM3S102_Rowley/Demo3/ParTest.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/CORTEX_LM3S102_Rowley/Demo3/main.c b/Demo/CORTEX_LM3S102_Rowley/Demo3/main.c
index bfd5d54368ead68da99d4d0470b6438ddc4a6705..6a16eee9060d0cf925bdbaae162268b64b474f58 100644 (file)
--- a/Demo/CORTEX_LM3S102_Rowley/Demo3/main.c
+++ b/Demo/CORTEX_LM3S102_Rowley/Demo3/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/CORTEX_LM3S316_IAR/FreeRTOSConfig.h b/Demo/CORTEX_LM3S316_IAR/FreeRTOSConfig.h
index 572cb0ca40bde96a8bad95af852acde49f1f042e..d11af321ecf484a2a223e8579606a634b9daf5dd 100644 (file)
--- a/Demo/CORTEX_LM3S316_IAR/FreeRTOSConfig.h
+++ b/Demo/CORTEX_LM3S316_IAR/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/CORTEX_LM3S316_IAR/ParTest/ParTest.c b/Demo/CORTEX_LM3S316_IAR/ParTest/ParTest.c
index 41d19b640dbc297131c5bb30103280e48bd2cd9e..06a4799f7b77f05d113ea8960981b0eda4403673 100644 (file)
--- a/Demo/CORTEX_LM3S316_IAR/ParTest/ParTest.c
+++ b/Demo/CORTEX_LM3S316_IAR/ParTest/ParTest.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/CORTEX_LM3S316_IAR/commstest.c b/Demo/CORTEX_LM3S316_IAR/commstest.c
index eac2597aee7bd234ff9bd4004623fbeb99154f0d..0b9ca2fe919e754ec2bde96908bd94b986c161fa 100644 (file)
--- a/Demo/CORTEX_LM3S316_IAR/commstest.c
+++ b/Demo/CORTEX_LM3S316_IAR/commstest.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/CORTEX_LM3S316_IAR/commstest.h b/Demo/CORTEX_LM3S316_IAR/commstest.h
index 3881a14af0845e7b574b7c1d50c1743d33e88cb3..abe9567dfd1894541bfb89a0717c516c184d512c 100644 (file)
--- a/Demo/CORTEX_LM3S316_IAR/commstest.h
+++ b/Demo/CORTEX_LM3S316_IAR/commstest.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/CORTEX_LM3S316_IAR/main.c b/Demo/CORTEX_LM3S316_IAR/main.c
index 4124d1e5232b264fc46a464ef0c760d3fdbea4c7..960a04ce03e30d7c5999fafba72222f04488ef0b 100644 (file)
--- a/Demo/CORTEX_LM3S316_IAR/main.c
+++ b/Demo/CORTEX_LM3S316_IAR/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/CORTEX_LM3S811_GCC/FreeRTOSConfig.h b/Demo/CORTEX_LM3S811_GCC/FreeRTOSConfig.h
index 3ef236355e4d35ce7cc6ff8836c8848fff250511..75f7c2ef86bda42f0c214b878271106b5b03a22e 100644 (file)
--- a/Demo/CORTEX_LM3S811_GCC/FreeRTOSConfig.h
+++ b/Demo/CORTEX_LM3S811_GCC/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/CORTEX_LM3S811_GCC/main.c b/Demo/CORTEX_LM3S811_GCC/main.c
index 0b06044255befb476a7ac60a74568b458be5db82..3f1d3ad5bd4aa1d80d97e469509d98cd58da8682 100644 (file)
--- a/Demo/CORTEX_LM3S811_GCC/main.c
+++ b/Demo/CORTEX_LM3S811_GCC/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/CORTEX_LM3S811_IAR/FreeRTOSConfig.h b/Demo/CORTEX_LM3S811_IAR/FreeRTOSConfig.h
index 2f66d4a70ff73e6bc6985ab500d82eaec0df8a61..7d827ab741d77d7699cd8cb41128da9456ae8236 100644 (file)
--- a/Demo/CORTEX_LM3S811_IAR/FreeRTOSConfig.h
+++ b/Demo/CORTEX_LM3S811_IAR/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/CORTEX_LM3S811_IAR/main.c b/Demo/CORTEX_LM3S811_IAR/main.c
index a2bf9a7833ed129c4455970dc8f06fa73940d2de..fa23fbe887b587c385a7f2f6bc115461f403779f 100644 (file)
--- a/Demo/CORTEX_LM3S811_IAR/main.c
+++ b/Demo/CORTEX_LM3S811_IAR/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/CORTEX_LM3S811_KEIL/FreeRTOSConfig.h b/Demo/CORTEX_LM3S811_KEIL/FreeRTOSConfig.h
index 9248db631913d1685c381215bdd170b42f9917bd..b7aab8cf590751e8146f2bcd22bf0e5b8326d5bd 100644 (file)
--- a/Demo/CORTEX_LM3S811_KEIL/FreeRTOSConfig.h
+++ b/Demo/CORTEX_LM3S811_KEIL/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/CORTEX_LM3S811_KEIL/heap/heap_1.c b/Demo/CORTEX_LM3S811_KEIL/heap/heap_1.c
index 8df40ed89e41624264b0312c78b69d67c15fd6c5..02ce8d6824e194a112c70c780438b3e5ed059dfc 100644 (file)
--- a/Demo/CORTEX_LM3S811_KEIL/heap/heap_1.c
+++ b/Demo/CORTEX_LM3S811_KEIL/heap/heap_1.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/CORTEX_LM3S811_KEIL/main.c b/Demo/CORTEX_LM3S811_KEIL/main.c
index 069c83254c289391727dba58e8a2f6333d197c96..30dbc9f235107155e66ef1963f371cfbb051979d 100644 (file)
--- a/Demo/CORTEX_LM3S811_KEIL/main.c
+++ b/Demo/CORTEX_LM3S811_KEIL/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.lock b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.lock
new file mode 100644 (file)
index 0000000..e69de29

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.cdt.core/.log b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.cdt.core/.log
new file mode 100644 (file)
index 0000000..ad90e76
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.cdt.core/.log
@@ -0,0 +1,19 @@
+*** SESSION Aug 19, 2007 15:19:16.906 ------------------------------------------\r
+*** SESSION Aug 19, 2007 20:47:55.734 ------------------------------------------\r
+*** SESSION Aug 19, 2007 20:58:19.953 ------------------------------------------\r
+*** SESSION Aug 20, 2007 10:30:54.968 ------------------------------------------\r
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+*** SESSION Aug 21, 2007 13:05:50.828 ------------------------------------------\r
+*** SESSION Aug 21, 2007 19:01:46.812 ------------------------------------------\r
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+*** SESSION Aug 24, 2007 17:08:36.187 ------------------------------------------\r
+*** SESSION Aug 26, 2007 11:13:57.906 ------------------------------------------\r
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+*** SESSION Aug 26, 2007 17:35:44.937 ------------------------------------------\r
+*** SESSION Aug 27, 2007 10:56:42.953 ------------------------------------------\r
+*** SESSION Aug 27, 2007 13:13:37.593 ------------------------------------------\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.cdt.core/shareddefaults.xml b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.cdt.core/shareddefaults.xml
new file mode 100644 (file)
index 0000000..c4b91cf
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.cdt.core/shareddefaults.xml
@@ -0,0 +1 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?><SharedRoot><SharedProperty id="" value=""/></SharedRoot>
\ No newline at end of file

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.cdt.make.core/.log b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.cdt.make.core/.log
new file mode 100644 (file)
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diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.cdt.make.core/RTOSDemo.sc b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.cdt.make.core/RTOSDemo.sc
new file mode 100644 (file)
index 0000000..44e0a67
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.cdt.make.core/RTOSDemo.sc
@@ -0,0 +1,117 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>\r
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+\r
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diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.cdt.make.core/specs.c b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.cdt.make.core/specs.c
new file mode 100644 (file)
index 0000000..8b13789
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.cdt.make.core/specs.c
@@ -0,0 +1 @@
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diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.cdt.make.core/specs.cpp b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.cdt.make.core/specs.cpp
new file mode 100644 (file)
index 0000000..8b13789
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+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.cdt.make.core/specs.cpp
@@ -0,0 +1 @@
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diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.cdt.make.ui/dialog_settings.xml b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.cdt.make.ui/dialog_settings.xml
new file mode 100644 (file)
index 0000000..9e62c4b
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.cdt.make.ui/dialog_settings.xml
@@ -0,0 +1,5 @@
+<?xml version="1.0" encoding="UTF-8"?>\r
+<section name="Workbench">\r
+       <section name="org.eclipse.cdt.internal.ui.MakeView">\r
+       </section>\r
+</section>\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.cdt.ui/cHelpSettings.xml b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.cdt.ui/cHelpSettings.xml
new file mode 100644 (file)
index 0000000..5240b18
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.cdt.ui/cHelpSettings.xml
@@ -0,0 +1,4 @@
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+<cHelpSettings>\r
+<project name="RTOSDemo"/>\r
+</cHelpSettings>\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.cdt.ui/dialog_settings.xml b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.cdt.ui/dialog_settings.xml
new file mode 100644 (file)
index 0000000..ab95b05
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.cdt.ui/dialog_settings.xml
@@ -0,0 +1,12 @@
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+<section name="Workbench">\r
+       <item value="1" key="org.eclipse.cdt.uiformatter_page.line_wrapping_tab_page.last_category_index"/>\r
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+       <section name="completion_proposal_size">\r
+       </section>\r
+       <section name="PDOMSearchPage">\r
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index 0000000..ce0417d
Binary files /dev/null and b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/c5/5b/e7/7a/history.index differ

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/c5/a8/history.index b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/c5/a8/history.index
new file mode 100644 (file)
index 0000000..5c1d037
Binary files /dev/null and b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/c5/a8/history.index differ

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/c5/history.index b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/c5/history.index
new file mode 100644 (file)
index 0000000..20c1ad3
Binary files /dev/null and b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/c5/history.index differ

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/history.index b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/history.index
new file mode 100644 (file)
index 0000000..5dc7272
Binary files /dev/null and b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/history.index differ

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/properties.index b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/properties.index
new file mode 100644 (file)
index 0000000..edda6f9
Binary files /dev/null and b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/properties.index differ

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.root/.indexes/history.version b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.root/.indexes/history.version
new file mode 100644 (file)
index 0000000..25cb955
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.root/.indexes/history.version
@@ -0,0 +1 @@
+\ 2
\ No newline at end of file

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.root/.indexes/properties.index b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.root/.indexes/properties.index
new file mode 100644 (file)
index 0000000..f7f8c35
Binary files /dev/null and b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.root/.indexes/properties.index differ

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.root/.indexes/properties.version b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.root/.indexes/properties.version
new file mode 100644 (file)
index 0000000..6b2aaa7
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.root/.indexes/properties.version
@@ -0,0 +1 @@
+\ 1
\ No newline at end of file

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.root/19.tree b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.root/19.tree
new file mode 100644 (file)
index 0000000..c098a7c
Binary files /dev/null and b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.root/19.tree differ

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.safetable/org.eclipse.core.resources b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.safetable/org.eclipse.core.resources
new file mode 100644 (file)
index 0000000..71e1e8d
Binary files /dev/null and b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.safetable/org.eclipse.core.resources differ

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.core.prj-RTOSDemo.prefs b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.core.prj-RTOSDemo.prefs
new file mode 100644 (file)
index 0000000..bb305ff
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.core.prj-RTOSDemo.prefs
@@ -0,0 +1,3 @@
+#Sun Aug 19 15:20:24 BST 2007\r
+eclipse.preferences.version=1\r
+indexer/preferenceScope=0\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.debug.core.prefs b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.debug.core.prefs
new file mode 100644 (file)
index 0000000..1c0fdf1
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.debug.core.prefs
@@ -0,0 +1,3 @@
+#Sun Aug 19 15:19:23 BST 2007\r
+org.eclipse.cdt.debug.core.cDebug.common_source_containers=<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?>\r\n<sourceLookupDirector>\r\n<sourceContainers duplicates\="false"/>\r\n</sourceLookupDirector>\r\n\r
+eclipse.preferences.version=1\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.debug.ui.prefs b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.debug.ui.prefs
new file mode 100644 (file)
index 0000000..962a2b7
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.debug.ui.prefs
@@ -0,0 +1,5 @@
+#Sun Aug 19 23:06:50 BST 2007\r
+pref_state_memento.org.eclipse.cdt.debug.ui.ModulesView=<?xml version\="1.0" encoding\="UTF-8"?>\r\n<ModulesViewMemento org.eclipse.cdt.debug.ui.SASH_DETAILS_PART\="568" org.eclipse.cdt.debug.ui.SASH_VIEW_PART\="427"/>\r
+eclipse.preferences.version=1\r
+org.eclipse.debug.ui.DebugView.org.eclipse.cdt.debug.ui.cDebug.show_full_paths=true\r
+org.eclipse.debug.ui.BreakpointView.org.eclipse.cdt.debug.ui.cDebug.show_full_paths=true\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.managedbuilder.core.prefs b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.managedbuilder.core.prefs
new file mode 100644 (file)
index 0000000..614a480
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.managedbuilder.core.prefs
@@ -0,0 +1,3 @@
+#Sun Aug 26 14:26:57 BST 2007\r
+eclipse.preferences.version=1\r
+properties/RTOSDemo.null.976634949/0.1109417601=\#\r\n\#Sun Aug 26 14\:26\:57 BST 2007\r\n0.1109417601\=\\\#\\r\\n\\\#Sun Aug 26 14\\\:26\\\:57 BST 2007\\r\\nrcState\\\=0\\r\\nrebuildState\\\=false\\r\\n\r\norg.eclipse.cdt.build.core.settings.holder.1502006385\=\\\#\\r\\n\\\#Sun Aug 26 14\\\:26\\\:57 BST 2007\\r\\nrebuildState\\\=false\\r\\n\r\norg.eclipse.cdt.build.core.settings.holder.1021181093\=\\\#\\r\\n\\\#Sun Aug 26 14\\\:26\\\:57 BST 2007\\r\\nrebuildState\\\=false\\r\\n\r\norg.eclipse.cdt.build.core.settings.holder.164584712\=\\\#\\r\\n\\\#Sun Aug 26 14\\\:26\\\:57 BST 2007\\r\\nrebuildState\\\=false\\r\\n\r\norg.eclipse.cdt.build.core.settings.holder.libs.260784574\=\\\#\\r\\n\\\#Sun Aug 26 14\\\:26\\\:57 BST 2007\\r\\nrebuildState\\\=false\\r\\n\r\norg.eclipse.cdt.build.core.prefbase.toolchain.1816209921\=\\\#\\r\\n\\\#Sun Aug 26 14\\\:26\\\:57 BST 2007\\r\\nrebuildState\\\=false\\r\\n\r\n\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.ui.prefs b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.ui.prefs
new file mode 100644 (file)
index 0000000..8a970da
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.ui.prefs
@@ -0,0 +1,12 @@
+#Thu Aug 23 20:22:58 BST 2007\r
+useQuickDiffPrefPage=true\r
+closeBrackets=false\r
+ensureNewlineAtEOF=true\r
+useAnnotationsPrefPage=true\r
+closeAngularBrackets=false\r
+eclipse.preferences.version=1\r
+org.eclipse.cdt.ui.text.templates.custom=<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?><templates/>\r
+hoverModifierMasks=org.eclipse.cdt.ui.BestMatchHover;0;org.eclipse.cdt.ui.CSourceHover;131072;org.eclipse.cdt.debug.internal.ui.editors.DebugTextHover;0;org.eclipse.cdt.ui.CDocHover;0;org.eclipse.cdt.ui.AnnotationHover;0;\r
+hoverModifiers=org.eclipse.cdt.ui.BestMatchHover;0;org.eclipse.cdt.ui.CSourceHover;Shift;org.eclipse.cdt.debug.internal.ui.editors.DebugTextHover;\!0;org.eclipse.cdt.ui.CDocHover;\!0;org.eclipse.cdt.ui.AnnotationHover;\!0;\r
+closeBraces=false\r
+closeStrings=false\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.core.resources.prefs b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.core.resources.prefs
new file mode 100644 (file)
index 0000000..289e27f
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.core.resources.prefs
@@ -0,0 +1,5 @@
+#Mon Aug 27 13:15:37 BST 2007\r
+version=1\r
+eclipse.preferences.version=1\r
+pathvariable.FreeRTOS_ROOT=C\:/Dev/FreeRTOS\r
+description.autobuilding=false\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.debug.ui.prefs b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.debug.ui.prefs
new file mode 100644 (file)
index 0000000..42e9df6
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.debug.ui.prefs
@@ -0,0 +1,7 @@
+#Thu Aug 23 22:01:25 BST 2007\r
+pref_state_memento.org.eclipse.debug.ui.VariableView=<?xml version\="1.0" encoding\="UTF-8"?>\r\n<VariablesViewMemento org.eclipse.debug.ui.SASH_DETAILS_PART\="315" org.eclipse.debug.ui.SASH_VIEW_PART\="684"/>\r
+eclipse.preferences.version=1\r
+pref_state_memento.org.eclipse.debug.ui.RegisterView=<?xml version\="1.0" encoding\="UTF-8"?>\r\n<VariablesViewMemento org.eclipse.debug.ui.SASH_DETAILS_PART\="198" org.eclipse.debug.ui.SASH_VIEW_PART\="801"/>\r
+org.eclipse.debug.ui.BreakpointView+org.eclipse.debug.ui.ShowSupportedBreakpointsAction=true\r
+preferredDetailPanes=DefaultDetailPane\:DefaultDetailPane|\r
+org.eclipse.debug.ui.PREF_LAUNCH_PERSPECTIVES=<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?>\r\n<launchPerspectives/>\r\n\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.help.ui.prefs b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.help.ui.prefs
new file mode 100644 (file)
index 0000000..8d1b311
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.help.ui.prefs
@@ -0,0 +1,7 @@
+#Sun Aug 26 17:32:13 BST 2007\r
+browser.x=177\r
+browser.w=1024\r
+eclipse.preferences.version=1\r
+browser.h=768\r
+browser.maximized=false\r
+browser.y=128\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.search.prefs b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.search.prefs
new file mode 100644 (file)
index 0000000..2426c2b
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.search.prefs
@@ -0,0 +1,3 @@
+#Sun Aug 19 19:39:29 BST 2007\r
+org.eclipse.search.defaultPerspective=org.eclipse.search.defaultPerspective.none\r
+eclipse.preferences.version=1\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.editors.prefs b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.editors.prefs
new file mode 100644 (file)
index 0000000..1affd26
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.editors.prefs
@@ -0,0 +1,3 @@
+#Sun Aug 19 20:45:57 BST 2007\r
+eclipse.preferences.version=1\r
+overviewRuler_migration=migrated_3.1\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.ide.prefs b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.ide.prefs
new file mode 100644 (file)
index 0000000..18dcfbf
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.ide.prefs
@@ -0,0 +1,4 @@
+#Sun Aug 19 20:45:58 BST 2007\r
+eclipse.preferences.version=1\r
+tipsAndTricks=true\r
+platformState=1187207632220\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.prefs b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.prefs
new file mode 100644 (file)
index 0000000..3e5b2b1
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.prefs
@@ -0,0 +1,3 @@
+#Sun Aug 19 20:45:58 BST 2007\r
+eclipse.preferences.version=1\r
+showIntro=false\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.workbench.prefs b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.workbench.prefs
new file mode 100644 (file)
index 0000000..06cd1e9
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.workbench.prefs
@@ -0,0 +1,3 @@
+#Mon Aug 20 21:59:49 BST 2007\r
+eclipse.preferences.version=1\r
+org.eclipse.ui.commands=<?xml version\="1.0" encoding\="UTF-8"?>\r\n<org.eclipse.ui.commands>\r\n<keyBinding contextId\="org.eclipse.ui.contexts.window" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="CTRL+B"/>\r\n<keyBinding commandId\="org.eclipse.ui.project.buildAll" contextId\="org.eclipse.ui.contexts.window" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F7"/>\r\n<keyBinding contextId\="org.eclipse.ui.contexts.window" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F11"/>\r\n<keyBinding contextId\="org.eclipse.debug.ui.debugging" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F5"/>\r\n<keyBinding commandId\="org.eclipse.debug.ui.commands.StepInto" contextId\="org.eclipse.ui.contexts.window" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F11"/>\r\n<keyBinding contextId\="org.eclipse.debug.ui.debugging" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F6"/>\r\n<keyBinding commandId\="org.eclipse.debug.ui.commands.StepOver" contextId\="org.eclipse.ui.contexts.window" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F10"/>\r\n<keyBinding commandId\="org.eclipse.debug.ui.commands.DebugLast" contextId\="org.eclipse.ui.contexts.window" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="CTRL+D"/>\r\n<keyBinding contextId\="org.eclipse.ui.textEditorScope" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="CTRL+D"/>\r\n<keyBinding contextId\="org.eclipse.ui.contexts.window" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="CTRL+F11"/>\r\n<keyBinding commandId\="org.eclipse.debug.ui.commands.RunLast" contextId\="org.eclipse.ui.contexts.window" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F5"/>\r\n<keyBinding contextId\="org.eclipse.ui.contexts.window" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F5"/>\r\n<keyBinding contextId\="org.eclipse.ui.textEditorScope" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="CTRL+K"/>\r\n<keyBinding commandId\="org.eclipse.ui.edit.findNext" contextId\="org.eclipse.ui.contexts.window" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F3"/>\r\n<keyBinding contextId\="org.eclipse.cdt.make.ui.makefileEditorScope" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F3"/>\r\n<keyBinding contextId\="org.eclipse.cdt.ui.cEditorScope" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F3"/>\r\n<keyBinding contextId\="org.eclipse.cdt.ui.cViewScope" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F3"/>\r\n</org.eclipse.ui.commands>\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.debug.core/.launches/OpenOCD Programmer.launch b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.debug.core/.launches/OpenOCD Programmer.launch
new file mode 100644 (file)
index 0000000..ccfe3f5
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.debug.core/.launches/OpenOCD Programmer.launch
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>\r
+<launchConfiguration type="org.eclipse.ui.externaltools.ProgramLaunchConfigurationType">\r
+<booleanAttribute key="org.eclipse.debug.core.appendEnvironmentVariables" value="true"/>\r
+<stringAttribute key="org.eclipse.ui.externaltools.ATTR_LOCATION" value="${workspace_loc:}/../common/Drivers/OpenOCD/OpenOCD_ftdi.exe"/>\r
+<stringAttribute key="org.eclipse.ui.externaltools.ATTR_TOOL_ARGUMENTS" value="--file fury_ft2232_flash.cfg"/>\r
+<stringAttribute key="org.eclipse.ui.externaltools.ATTR_WORKING_DIRECTORY" value="${workspace_loc}"/>\r
+</launchConfiguration>\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.debug.core/.launches/OpenOCD Server.launch b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.debug.core/.launches/OpenOCD Server.launch
new file mode 100644 (file)
index 0000000..cdc0f17
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.debug.core/.launches/OpenOCD Server.launch
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>\r
+<launchConfiguration type="org.eclipse.ui.externaltools.ProgramLaunchConfigurationType">\r
+<booleanAttribute key="org.eclipse.debug.core.appendEnvironmentVariables" value="true"/>\r
+<stringAttribute key="org.eclipse.ui.externaltools.ATTR_LOCATION" value="${workspace_loc:}/../common/Drivers/OpenOCD/OpenOCD_ftdi.exe"/>\r
+<stringAttribute key="org.eclipse.ui.externaltools.ATTR_TOOL_ARGUMENTS" value="--file fury_ft2232.cfg"/>\r
+<stringAttribute key="org.eclipse.ui.externaltools.ATTR_WORKING_DIRECTORY" value="${workspace_loc}"/>\r
+</launchConfiguration>\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.debug.core/.launches/RTOSDemo.launch b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.debug.core/.launches/RTOSDemo.launch
new file mode 100644 (file)
index 0000000..1768f46
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.debug.core/.launches/RTOSDemo.launch
@@ -0,0 +1,26 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>\r
+<launchConfiguration type="org.eclipse.cdt.debug.gdbjtag.launchConfigurationType">\r
+<stringAttribute key="org.eclipse.cdt.debug.gdbremote.core.imageFileName" value="C:\E\Dev\FreeRTOS\Demo\CORTEX_LM3S8962_Eclipse\RTOSDemo\RTOSDemo.axf"/>\r
+<stringAttribute key="org.eclipse.cdt.debug.gdbremote.core.initCommands" value="target extended-remote localhost:3333&#13;&#10;b main&#13;&#10;monitor soft_reset_halt&#13;&#10;monitor sleep 500&#13;&#10;continue&#13;&#10;clear main&#13;&#10;&#13;&#10;"/>\r
+<stringAttribute key="org.eclipse.cdt.debug.gdbremote.core.ipAddress" value="localhost"/>\r
+<booleanAttribute key="org.eclipse.cdt.debug.gdbremote.core.loadImage" value="false"/>\r
+<intAttribute key="org.eclipse.cdt.debug.gdbremote.core.portNumber" value="3333"/>\r
+<stringAttribute key="org.eclipse.cdt.debug.gdbremote.core.runCommands" value=""/>\r
+<booleanAttribute key="org.eclipse.cdt.debug.gdbremote.core.useRemoteTarget" value="false"/>\r
+<stringAttribute key="org.eclipse.cdt.debug.mi.core.DEBUG_NAME" value="arm-none-eabi-gdb.exe"/>\r
+<stringAttribute key="org.eclipse.cdt.debug.mi.core.GDB_INIT" value=""/>\r
+<stringAttribute key="org.eclipse.cdt.debug.mi.core.commandFactory" value="Standard"/>\r
+<stringAttribute key="org.eclipse.cdt.debug.mi.core.protocol" value="mi"/>\r
+<booleanAttribute key="org.eclipse.cdt.debug.mi.core.verboseMode" value="false"/>\r
+<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value=""/>\r
+<stringAttribute key="org.eclipse.cdt.launch.GLOBAL_VARIABLES" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;globalVariableList/&gt;&#13;&#10;"/>\r
+<stringAttribute key="org.eclipse.cdt.launch.MEMORY_BLOCKS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;memoryBlockExpressionList/&gt;&#13;&#10;"/>\r
+<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="RTOSDemo.axf"/>\r
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="RTOSDemo"/>\r
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">\r
+<listEntry value="/RTOSDemo"/>\r
+</listAttribute>\r
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">\r
+<listEntry value="4"/>\r
+</listAttribute>\r
+</launchConfiguration>\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.debug.ui/dialog_settings.xml b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.debug.ui/dialog_settings.xml
new file mode 100644 (file)
index 0000000..c2bd2c7
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.debug.ui/dialog_settings.xml
@@ -0,0 +1,20 @@
+<?xml version="1.0" encoding="UTF-8"?>\r
+<section name="Workbench">\r
+       <section name="org.eclipse.debug.ui.LAUNCH_CONFIGURATIONS_DIALOG_SECTION">\r
+               <item value="944" key="DIALOG_WIDTH"/>\r
+               <item value="154" key="DIALOG_Y_ORIGIN"/>\r
+               <item value=", org.eclipse.cdt.debug.gdbjtag.launchConfigurationType, org.eclipse.ui.externaltools.ProgramLaunchConfigurationType, " key="org.eclipse.debug.ui.EXPANDED_NODES"/>\r
+               <item value="274" key="DIALOG_X_ORIGIN"/>\r
+               <item value="640" key="DIALOG_HEIGHT"/>\r
+               <item value="237" key="org.eclipse.debug.ui.DIALOG_SASH_WEIGHTS_1"/>\r
+               <item value="762" key="org.eclipse.debug.ui.DIALOG_SASH_WEIGHTS_2"/>\r
+               <item value="1|Tahoma|8.25|0|WINDOWS|1|-11|0|0|0|400|0|0|0|1|0|0|0|0|Tahoma" key="DIALOG_FONT_NAME"/>\r
+       </section>\r
+       <section name="org.eclipse.debug.ui.SELECT_CONFIGURATION_TYPE_DIALOG">\r
+               <item value="300" key="DIALOG_WIDTH"/>\r
+               <item value="46" key="DIALOG_Y_ORIGIN"/>\r
+               <item value="301" key="DIALOG_X_ORIGIN"/>\r
+               <item value="350" key="DIALOG_HEIGHT"/>\r
+               <item value="1|Tahoma|8.25|0|WINDOWS|1|-11|0|0|0|400|0|0|0|1|0|0|0|0|Tahoma" key="DIALOG_FONT_NAME"/>\r
+       </section>\r
+</section>\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.debug.ui/launchConfigurationHistory.xml b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.debug.ui/launchConfigurationHistory.xml
new file mode 100644 (file)
index 0000000..598b376
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.debug.ui/launchConfigurationHistory.xml
@@ -0,0 +1,24 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>\r
+<launchHistory>\r
+<launchGroup id="org.eclipse.ui.externaltools.launchGroup">\r
+<mruHistory>\r
+<launch memento="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;launchConfiguration local=&quot;true&quot; path=&quot;OpenOCD Programmer.launch&quot;/&gt;&#13;&#10;"/>\r
+<launch memento="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;launchConfiguration local=&quot;true&quot; path=&quot;OpenOCD Server.launch&quot;/&gt;&#13;&#10;"/>\r
+</mruHistory>\r
+<favorites/>\r
+</launchGroup>\r
+<launchGroup id="org.eclipse.debug.ui.launchGroup.profile">\r
+<mruHistory/>\r
+<favorites/>\r
+</launchGroup>\r
+<launchGroup id="org.eclipse.debug.ui.launchGroup.debug">\r
+<mruHistory>\r
+<launch memento="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;launchConfiguration local=&quot;true&quot; path=&quot;RTOSDemo.launch&quot;/&gt;&#13;&#10;"/>\r
+</mruHistory>\r
+<favorites/>\r
+</launchGroup>\r
+<launchGroup id="org.eclipse.debug.ui.launchGroup.run">\r
+<mruHistory/>\r
+<favorites/>\r
+</launchGroup>\r
+</launchHistory>\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.help.ui/dialog_settings.xml b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.help.ui/dialog_settings.xml
new file mode 100644 (file)
index 0000000..1ef2b05
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.help.ui/dialog_settings.xml
@@ -0,0 +1,3 @@
+<?xml version="1.0" encoding="UTF-8"?>\r
+<section name="Workbench">\r
+</section>\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.help.ui/scope_sets/Default.pref b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.help.ui/scope_sets/Default.pref
new file mode 100644 (file)
index 0000000..fc15817
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.help.ui/scope_sets/Default.pref
@@ -0,0 +1,2 @@
+#Sun Aug 26 17:54:18 BST 2007\r
+__DEFAULT__=true\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.help.ui/scope_sets/relative_path.hist b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.help.ui/scope_sets/relative_path.hist
new file mode 100644 (file)
index 0000000..713e721
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.help.ui/scope_sets/relative_path.hist
@@ -0,0 +1,4 @@
+#Sun Aug 26 17:36:29 BST 2007\r
+__DEFAULT__=false\r
+org.eclipse.help.ui.localSearch.master=true\r
+expression=relative path\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.help.ui/scope_sets/working_set.hist b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.help.ui/scope_sets/working_set.hist
new file mode 100644 (file)
index 0000000..197837b
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.help.ui/scope_sets/working_set.hist
@@ -0,0 +1,4 @@
+#Sun Aug 26 17:29:25 BST 2007\r
+__DEFAULT__=false\r
+org.eclipse.help.ui.localSearch.master=true\r
+expression=working set\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.help.ui/scope_sets/working_sets.hist b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.help.ui/scope_sets/working_sets.hist
new file mode 100644 (file)
index 0000000..a88e15e
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.help.ui/scope_sets/working_sets.hist
@@ -0,0 +1,4 @@
+#Sun Aug 26 17:54:21 BST 2007\r
+__DEFAULT__=false\r
+org.eclipse.help.ui.localSearch.master=true\r
+expression=working sets\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.ltk.ui.refactoring/dialog_settings.xml b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.ltk.ui.refactoring/dialog_settings.xml
new file mode 100644 (file)
index 0000000..ac67147
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.ltk.ui.refactoring/dialog_settings.xml
@@ -0,0 +1,6 @@
+<?xml version="1.0" encoding="UTF-8"?>\r
+<section name="Workbench">\r
+       <section name="RefactoringPropertyPage">\r
+               <item value="true" key="org.eclipse.ltk.ui.refactoring.sortRefactorings"/>\r
+       </section>\r
+</section>\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.search/dialog_settings.xml b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.search/dialog_settings.xml
new file mode 100644 (file)
index 0000000..839aca5
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.search/dialog_settings.xml
@@ -0,0 +1,46 @@
+<?xml version="1.0" encoding="UTF-8"?>\r
+<section name="Workbench">\r
+       <section name="">\r
+               <item value="1000" key="org.eclipse.search.resultpage.limit"/>\r
+       </section>\r
+       <section name="DialogBounds_SearchDialog">\r
+               <item value="519" key="DIALOG_WIDTH"/>\r
+               <item value="259" key="DIALOG_Y_ORIGIN"/>\r
+               <item value="385" key="DIALOG_HEIGHT"/>\r
+               <item value="445" key="DIALOG_X_ORIGIN"/>\r
+               <item value="1|Tahoma|8.25|0|WINDOWS|1|-11|0|0|0|400|0|0|0|1|0|0|0|0|Tahoma" key="DIALOG_FONT_NAME"/>\r
+       </section>\r
+       <section name="Search">\r
+               <list key="Search.processedPageIds">\r
+                       <item value="org.eclipse.search.internal.ui.text.TextSearchPage"/>\r
+                       <item value="org.eclipse.cdt.ui.pdomSearchPage"/>\r
+               </list>\r
+               <list key="Search.enabledPageIds">\r
+                       <item value="org.eclipse.search.internal.ui.text.TextSearchPage"/>\r
+                       <item value="org.eclipse.cdt.ui.pdomSearchPage"/>\r
+               </list>\r
+       </section>\r
+       <section name="org.eclipse.search.text.FileSearchResultPage">\r
+               <item value="1000" key="org.eclipse.search.resultpage.limit"/>\r
+       </section>\r
+       <section name="TextSearchPage">\r
+               <item value="false" key="CASE_SENSITIVE"/>\r
+               <item value="false" key="REG_EX_SEARCH"/>\r
+               <item value="false" key="SEARCH_DERIVED"/>\r
+               <item value="1" key="HISTORY_SIZE"/>\r
+               <section name="HISTORY0">\r
+                       <item value="false" key="isRegExSearch"/>\r
+                       <item value="struct timer" key="textPattern"/>\r
+                       <item value="0" key="scope"/>\r
+                       <item value="true" key="ignoreCase"/>\r
+                       <list key="fileNamePatterns">\r
+                               <item value="*.c *.h"/>\r
+                       </list>\r
+                       <list key="workingSets">\r
+                       </list>\r
+               </section>\r
+       </section>\r
+       <section name="SearchDialog.ScopePart">\r
+               <item value="0" key="scope"/>\r
+       </section>\r
+</section>\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.ui.cheatsheets/dialog_settings.xml b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.ui.cheatsheets/dialog_settings.xml
new file mode 100644 (file)
index 0000000..1df8b48
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.ui.cheatsheets/dialog_settings.xml
@@ -0,0 +1,10 @@
+<?xml version="1.0" encoding="UTF-8"?>\r
+<section name="Workbench">\r
+       <section name="CheatSheetCategoryBasedSelectionDialog">\r
+               <item value="326" key="DIALOG_WIDTH"/>\r
+               <item value="154" key="DIALOG_Y_ORIGIN"/>\r
+               <item value="542" key="DIALOG_HEIGHT"/>\r
+               <item value="541" key="DIALOG_X_ORIGIN"/>\r
+               <item value="1|Tahoma|8.25|0|WINDOWS|1|-11|0|0|0|400|0|0|0|1|0|0|0|0|Tahoma" key="DIALOG_FONT_NAME"/>\r
+       </section>\r
+</section>\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.ui.ide/dialog_settings.xml b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.ui.ide/dialog_settings.xml
new file mode 100644 (file)
index 0000000..bbc6392
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.ui.ide/dialog_settings.xml
@@ -0,0 +1,19 @@
+<?xml version="1.0" encoding="UTF-8"?>\r
+<section name="Workbench">\r
+       <section name="ResourceNavigator">\r
+               <item value="FreeRTOS_LM3S8962_Demo" key="ResourceWorkingSetFilter.STORE_WORKING_SET"/>\r
+               <item value="1" key="ResourceViewer.STORE_SORT_TYPE"/>\r
+       </section>\r
+       <section name="org.eclipse.ui.views.task">\r
+       </section>\r
+       <section name="org.eclipse.ui.views.problem">\r
+       </section>\r
+       <section name="CleanDialogSettings">\r
+               <item value="443" key="DIALOG_WIDTH"/>\r
+               <item value="true" key="BUILD_NOW"/>\r
+               <item value="251" key="DIALOG_Y_ORIGIN"/>\r
+               <item value="391" key="DIALOG_HEIGHT"/>\r
+               <item value="479" key="DIALOG_X_ORIGIN"/>\r
+               <item value="false" key="TOGGLE_SELECTED"/>\r
+       </section>\r
+</section>\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.ui.intro/dialog_settings.xml b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.ui.intro/dialog_settings.xml
new file mode 100644 (file)
index 0000000..d3014f5
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.ui.intro/dialog_settings.xml
@@ -0,0 +1,4 @@
+<?xml version="1.0" encoding="UTF-8"?>\r
+<section name="Workbench">\r
+       <item value="1024" key="introLaunchBar.location"/>\r
+</section>\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.ui.workbench.texteditor/dialog_settings.xml b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.ui.workbench.texteditor/dialog_settings.xml
new file mode 100644 (file)
index 0000000..bffa715
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.ui.workbench.texteditor/dialog_settings.xml
@@ -0,0 +1,31 @@
+<?xml version="1.0" encoding="UTF-8"?>\r
+<section name="Workbench">\r
+       <section name="org.eclipse.ui.texteditor.FindReplaceDialog_dialogBounds">\r
+               <item value="243" key="DIALOG_WIDTH"/>\r
+               <item value="421" key="DIALOG_Y_ORIGIN"/>\r
+               <item value="763" key="DIALOG_X_ORIGIN"/>\r
+               <item value="356" key="DIALOG_HEIGHT"/>\r
+               <item value="1|Tahoma|8.25|0|WINDOWS|1|-11|0|0|0|400|0|0|0|1|0|0|0|0|Tahoma" key="DIALOG_FONT_NAME"/>\r
+       </section>\r
+       <section name="org.eclipse.ui.texteditor.FindReplaceDialog">\r
+               <item value="false" key="wrap"/>\r
+               <item value="false" key="casesensitive"/>\r
+               <item value="false" key="isRegEx"/>\r
+               <item value="false" key="incremental"/>\r
+               <item value="false" key="wholeword"/>\r
+               <item value="libdriver" key="selection"/>\r
+               <list key="findhistory">\r
+                       <item value="libdriver"/>\r
+                       <item value="luminarydrivers"/>\r
+                       <item value="luminary"/>\r
+                       <item value="driverlil"/>\r
+                       <item value="main"/>\r
+                       <item value="vOLEDTask"/>\r
+                       <item value="cmess"/>\r
+                       <item value="cPassM"/>\r
+               </list>\r
+               <list key="replacehistory">\r
+                       <item value="prvCopyDataToQueue"/>\r
+               </list>\r
+       </section>\r
+</section>\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.ui.workbench/dialog_settings.xml b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.ui.workbench/dialog_settings.xml
new file mode 100644 (file)
index 0000000..77beade
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.ui.workbench/dialog_settings.xml
@@ -0,0 +1,19 @@
+<?xml version="1.0" encoding="UTF-8"?>\r
+<section name="Workbench">\r
+       <section name="WorkbenchPreferenceDialogSettings">\r
+               <item value="146" key="DIALOG_Y_ORIGIN"/>\r
+               <item value="269" key="DIALOG_X_ORIGIN"/>\r
+       </section>\r
+       <section name="org.eclipse.ui.preferences.keysPreferencePage">\r
+               <item value="true" key="uncategorizedFilter"/>\r
+               <item value="false" key="showAllField"/>\r
+               <item value="true" key="internalFilter"/>\r
+               <item value="true" key="actionSetFilter"/>\r
+       </section>\r
+       <section name="ImportExportAction">\r
+               <item value="org.eclipse.ui.wizards.import.FileSystem" key="ImportExportPage.STORE_SELECTED_IMPORT_WIZARD_ID"/>\r
+               <list key="ImportExportPage.STORE_EXPANDED_IMPORT_CATEGORIES">\r
+                       <item value="org.eclipse.ui.Basic"/>\r
+               </list>\r
+       </section>\r
+</section>\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.ui.workbench/workbench.xml b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.ui.workbench/workbench.xml
new file mode 100644 (file)
index 0000000..b1b44e2
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.ui.workbench/workbench.xml
@@ -0,0 +1,532 @@
+<?xml version="1.0" encoding="UTF-8"?>\r
+<workbench progressCount="20" version="2.0">\r
+<workbenchAdvisor/>\r
+<window height="768" maximized="true" width="1024" x="66" y="69">\r
+<fastViewData fastViewLocation="1024"/>\r
+<perspectiveBar>\r
+<itemSize x="160"/>\r
+</perspectiveBar>\r
+<coolbarLayout locked="0">\r
+<coolItem id="group.file" itemType="typeGroupMarker"/>\r
+<coolItem id="org.eclipse.ui.workbench.file" itemType="typeToolBarContribution" x="130" y="22"/>\r
+<coolItem id="additions" itemType="typeGroupMarker"/>\r
+<coolItem id="org.eclipse.cdt.ui.CElementCreationActionSet" itemType="typeToolBarContribution" x="161" y="22"/>\r
+<coolItem id="org.eclipse.cdt.ui.buildConfigActionSet" itemType="typeToolBarContribution" x="85" y="22"/>\r
+<coolItem id="org.eclipse.debug.ui.launchActionSet" itemType="typeToolBarContribution" x="124" y="22"/>\r
+<coolItem id="org.eclipse.search.searchActionSet" itemType="typeToolBarContribution" x="61" y="22"/>\r
+<coolItem id="org.eclipse.ui.edit.text.actionSet.presentation" itemType="typeToolBarContribution" x="61" y="22"/>\r
+<coolItem id="group.nav" itemType="typeGroupMarker"/>\r
+<coolItem id="org.eclipse.ui.workbench.navigate" itemType="typeToolBarContribution" x="185" y="22"/>\r
+<coolItem id="group.editor" itemType="typeGroupMarker"/>\r
+<coolItem id="org.eclipse.ui.DefaultTextEditor" itemType="typePlaceholder" x="-1" y="-1"/>\r
+<coolItem id="org.eclipse.cdt.ui.editor.CEditor" itemType="typeToolBarContribution" x="-1" y="-1"/>\r
+<coolItem id="org.eclipse.cdt.make.editor" itemType="typeToolBarContribution" x="-1" y="-1"/>\r
+<coolItem id="group.help" itemType="typeGroupMarker"/>\r
+<coolItem id="org.eclipse.ui.workbench.help" itemType="typeToolBarContribution" x="-1" y="-1"/>\r
+</coolbarLayout>\r
+<page aggregateWorkingSetId="Aggregate for window 1188147282312" focus="true" label="Workspace - C/C++">\r
+<editors>\r
+<editorArea activeWorkbook="DefaultEditorWorkbook">\r
+<info part="DefaultEditorWorkbook">\r
+<folder appearance="1" expanded="2">\r
+<presentation id="org.eclipse.ui.internal.presentations.r33.WorkbenchPresentationFactory_33">\r
+<part id="0"/>\r
+<part id="1"/>\r
+</presentation>\r
+</folder>\r
+</info>\r
+</editorArea>\r
+<editor focus="true" id="org.eclipse.cdt.ui.editor.CEditor" name="main.c" partName="main.c" path="C:/E/temp/_RC/5/Demo/CORTEX_LM3S8962_Eclipse/RTOSDemo/main.c" title="main.c" tooltip="RTOSDemo/main.c" workbook="DefaultEditorWorkbook">\r
+<input factoryID="org.eclipse.ui.part.FileEditorInputFactory" path="/RTOSDemo/main.c"/>\r
+<editorState selectionHPixel="0" selectionLength="0" selectionOffset="0"/>\r
+</editor>\r
+<editor id="org.eclipse.cdt.make.editor" name="Makefile" partName="Makefile" path="C:/E/temp/RC/2/Demo/CORTEX_LM3S8962_Eclipse/RTOSDemo/Makefile" title="Makefile" tooltip="RTOSDemo/Makefile" workbook="DefaultEditorWorkbook">\r
+<input factoryID="org.eclipse.ui.part.FileEditorInputFactory" path="/RTOSDemo/Makefile"/>\r
+<editorState selectionHPixel="0" selectionLength="0" selectionOffset="0"/>\r
+</editor>\r
+</editors>\r
+<views>\r
+<view id="org.eclipse.ui.navigator.ProjectExplorer" partName="Project Explorer">\r
+<viewState CommonNavigator.LINKING_ENABLED="0" CommonNavigator.LINKING_ENABLED.delayed="0" org.eclipse.cdt.ui.cview.groupincludes="false" org.eclipse.cdt.ui.editor.CUChildren="true" org.eclipse.ui.navigator.resources.workingSets.showTopLevelWorkingSets="0"/>\r
+</view>\r
+<view id="org.eclipse.ui.views.PropertySheet" partName="Properties">\r
+<viewState/>\r
+</view>\r
+<view id="org.eclipse.cdt.debug.ui.DisassemblyView" partName="Disassembly">\r
+<viewState/>\r
+</view>\r
+<view id="org.eclipse.search.ui.views.SearchView" partName="Search">\r
+<viewState isPinned="false">\r
+<view IMemento.internal.id="" org.eclipse.search.lastActivation="0"/>\r
+</viewState>\r
+</view>\r
+<view id="org.eclipse.ui.views.ResourceNavigator" partName="Navigator">\r
+<viewState LINK_NAVIGATOR_TO_EDITOR="0" sorter="1">\r
+<filters>\r
+<filter element=".*" isEnabled="false"/>\r
+</filters>\r
+<expanded>\r
+<element path="/RTOSDemo"/>\r
+</expanded>\r
+<selection>\r
+<element path="/RTOSDemo"/>\r
+</selection>\r
+</viewState>\r
+</view>\r
+<view id="org.eclipse.debug.ui.DebugView" partName="Debug">\r
+<viewState/>\r
+</view>\r
+<view id="org.eclipse.ui.views.ProblemView" partName="Problems">\r
+<viewState columnWidth0="781" columnWidth1="78" columnWidth2="153" columnWidth3="63" columnWidth4="0" horizontalPosition="0" verticalPosition="0">\r
+<columnOrder columnOrderIndex="0"/>\r
+<columnOrder columnOrderIndex="1"/>\r
+<columnOrder columnOrderIndex="2"/>\r
+<columnOrder columnOrderIndex="3"/>\r
+<columnOrder columnOrderIndex="4"/>\r
+</viewState>\r
+</view>\r
+<view id="org.eclipse.ui.console.ConsoleView" partName="Console">\r
+<viewState/>\r
+</view>\r
+<view id="org.eclipse.debug.ui.BreakpointView" partName="Breakpoints">\r
+<viewState>\r
+<isTrackingSelection value="false"/>\r
+</viewState>\r
+</view>\r
+<view id="org.eclipse.debug.ui.VariableView" partName="Variables">\r
+<viewState/>\r
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+</trimArea>\r
+</trimLayout>\r
+</window>\r
+<mruList>\r
+<file factoryID="org.eclipse.ui.part.FileEditorInputFactory" id="org.eclipse.ui.DefaultTextEditor" name=".cproject" tooltip="RTOSDemo/.cproject">\r
+<persistable path="/RTOSDemo/.cproject"/>\r
+</file>\r
+<file factoryID="org.eclipse.ui.part.FileEditorInputFactory" id="org.eclipse.ui.DefaultTextEditor" name=".project" tooltip="RTOSDemo/.project">\r
+<persistable path="/RTOSDemo/.project"/>\r
+</file>\r
+<file factoryID="org.eclipse.ui.part.FileEditorInputFactory" id="org.eclipse.cdt.make.editor" name="Makefile" tooltip="RTOSDemo/Makefile">\r
+<persistable path="/RTOSDemo/Makefile"/>\r
+</file>\r
+<file factoryID="org.eclipse.ui.part.FileEditorInputFactory" id="org.eclipse.cdt.ui.editor.CEditor" name="main.c" tooltip="RTOSDemo/main.c">\r
+<persistable path="/RTOSDemo/main.c"/>\r
+</file>\r
+<file factoryID="org.eclipse.ui.part.FileEditorInputFactory" id="org.eclipse.cdt.ui.editor.CEditor" name="portmacro.h" tooltip="RTOSDemo/Source/portable/GCC/ARM_CM3/portmacro.h">\r
+<persistable path="/RTOSDemo/Source/portable/GCC/ARM_CM3/portmacro.h"/>\r
+</file>\r
+<file factoryID="org.eclipse.ui.part.FileEditorInputFactory" id="org.eclipse.cdt.ui.editor.CEditor" name="QPeek.c" tooltip="RTOSDemo/Minimal/QPeek.c">\r
+<persistable path="/RTOSDemo/Minimal/QPeek.c"/>\r
+</file>\r
+<file factoryID="org.eclipse.ui.part.FileEditorInputFactory" id="org.eclipse.cdt.ui.editor.CEditor" name="startup.c" tooltip="RTOSDemo/startup.c">\r
+<persistable path="/RTOSDemo/startup.c"/>\r
+</file>\r
+<file factoryID="org.eclipse.ui.part.FileEditorInputFactory" id="org.eclipse.cdt.ui.editor.CEditor" name="timertest.c" tooltip="RTOSDemo/timertest.c">\r
+<persistable path="/RTOSDemo/timertest.c"/>\r
+</file>\r
+<file factoryID="org.eclipse.ui.part.FileEditorInputFactory" id="org.eclipse.cdt.ui.editor.CEditor" name="lcd_message.h" tooltip="RTOSDemo/lcd_message.h">\r
+<persistable path="/RTOSDemo/lcd_message.h"/>\r
+</file>\r
+<file factoryID="org.eclipse.ui.part.FileEditorInputFactory" id="org.eclipse.cdt.ui.editor.CEditor" name="tasks.c" tooltip="RTOSDemo/Source/tasks.c">\r
+<persistable path="/RTOSDemo/Source/tasks.c"/>\r
+</file>\r
+<file factoryID="org.eclipse.ui.part.FileEditorInputFactory" id="org.eclipse.cdt.ui.editor.CEditor" name="FreeRTOSConfig.h" tooltip="RTOSDemo/FreeRTOSConfig.h">\r
+<persistable path="/RTOSDemo/FreeRTOSConfig.h"/>\r
+</file>\r
+<file factoryID="org.eclipse.ui.part.FileEditorInputFactory" id="org.eclipse.cdt.ui.editor.CEditor" name="port.c" tooltip="RTOSDemo/Source/portable/GCC/ARM_CM3/port.c">\r
+<persistable path="/RTOSDemo/Source/portable/GCC/ARM_CM3/port.c"/>\r
+</file>\r
+<file factoryID="org.eclipse.ui.part.FileEditorInputFactory" id="org.eclipse.ui.DefaultTextEditor" name="standalone.ld" tooltip="RTOSDemo/standalone.ld">\r
+<persistable path="/RTOSDemo/standalone.ld"/>\r
+</file>\r
+<file factoryID="org.eclipse.ui.part.FileEditorInputFactory" id="org.eclipse.cdt.ui.editor.CEditor" name="semtest.c" tooltip="RTOSDemo/Minimal/semtest.c">\r
+<persistable path="/RTOSDemo/Minimal/semtest.c"/>\r
+</file>\r
+<file factoryID="org.eclipse.ui.part.FileEditorInputFactory" id="org.eclipse.cdt.ui.editor.CEditor" name="uIP_Task.c" tooltip="RTOSDemo/webserver/uIP_Task.c">\r
+<persistable path="/RTOSDemo/webserver/uIP_Task.c"/>\r
+</file>\r
+</mruList>\r
+</workbench>
\ No newline at end of file

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.ui.workbench/workingsets.xml b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.ui.workbench/workingsets.xml
new file mode 100644 (file)
index 0000000..d14870d
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.ui.workbench/workingsets.xml
@@ -0,0 +1,68 @@
+<?xml version="1.0" encoding="UTF-8"?>\r
+<workingSetManager>\r
+<workingSet editPageId="org.eclipse.cdt.ui.CElementWorkingSetPage" factoryID="org.eclipse.ui.internal.WorkingSetFactory" label="FreeRTOS_LM3S8962_Demo" name="FreeRTOS_LM3S8962_Demo">\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/FreeRTOSConfig.h" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/ParTest" type="2"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/bitmap.h" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/lcd_message.h" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/main.c" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/rit128x96x4.c" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/startup.c" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/timertest.c" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/webserver/clock-arch.h" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/webserver/emac.c" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/webserver/emac.h" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/webserver/http-strings.c" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/webserver/http-strings.h" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/webserver/httpd-cgi.c" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/webserver/httpd-cgi.h" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/webserver/httpd-fs" type="2"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/webserver/httpd-fs.c" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/webserver/httpd-fs.h" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/webserver/httpd-fsdata.c" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/webserver/httpd-fsdata.h" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/webserver/httpd.c" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/webserver/httpd.h" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/webserver/uIP_Task.c" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/webserver/uip-conf.h" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/webserver/webserver.h" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/osram128x64x4.c" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/FreeRTOS.org Source/include" type="2"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/FreeRTOS.org Source/list.c" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/FreeRTOS.org Source/portable/GCC/ARM_CM3" type="2"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/FreeRTOS.org Source/portable/MemMang/heap_2.c" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/FreeRTOS.org Source/queue.c" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/FreeRTOS.org Source/tasks.c" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/Common Demo Files/Minimal" type="2"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/Common Demo Files/ethernet/uIP/uip-1.0/uip/clock.h" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/Common Demo Files/ethernet/uIP/uip-1.0/uip/lc-addrlabels.h" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/Common Demo Files/ethernet/uIP/uip-1.0/uip/lc-switch.h" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/Common Demo Files/ethernet/uIP/uip-1.0/uip/lc.h" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/Common Demo Files/ethernet/uIP/uip-1.0/uip/psock.c" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/Common Demo Files/ethernet/uIP/uip-1.0/uip/psock.h" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/Common Demo Files/ethernet/uIP/uip-1.0/uip/pt.h" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/Common Demo Files/ethernet/uIP/uip-1.0/uip/timer.c" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/Common Demo Files/ethernet/uIP/uip-1.0/uip/timer.h" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/Common Demo Files/ethernet/uIP/uip-1.0/uip/uip-fw.c" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/Common Demo Files/ethernet/uIP/uip-1.0/uip/uip-fw.h" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/Common Demo Files/ethernet/uIP/uip-1.0/uip/uip-neighbor.c" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/Common Demo Files/ethernet/uIP/uip-1.0/uip/uip-neighbor.h" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/Common Demo Files/ethernet/uIP/uip-1.0/uip/uip-split.c" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/Common Demo Files/ethernet/uIP/uip-1.0/uip/uip-split.h" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/Common Demo Files/ethernet/uIP/uip-1.0/uip/uip.c" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/Common Demo Files/ethernet/uIP/uip-1.0/uip/uip.h" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/Common Demo Files/ethernet/uIP/uip-1.0/uip/uip_arch.h" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/Common Demo Files/ethernet/uIP/uip-1.0/uip/uip_arp.c" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/Common Demo Files/ethernet/uIP/uip-1.0/uip/uip_arp.h" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/Common Demo Files/ethernet/uIP/uip-1.0/uip/uiplib.c" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/Common Demo Files/ethernet/uIP/uip-1.0/uip/uiplib.h" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/Common Demo Files/ethernet/uIP/uip-1.0/uip/uipopt.h" type="1"/>\r
+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/Common Demo Files/include" type="2"/>\r
+<item factoryID="org.eclipse.ui.internal.model.ResourceFactory" path="/RTOSDemo/Makefile" type="1"/>\r
+<item factoryID="org.eclipse.ui.internal.model.ResourceFactory" path="/RTOSDemo/standalone.ld" type="1"/>\r
+</workingSet>\r
+<workingSet aggregate="true" factoryID="org.eclipse.ui.internal.WorkingSetFactory" label="Window Working Set" name="Aggregate for window 1188147282312">\r
+<workingSet IMemento.internal.id="FreeRTOS_LM3S8962_Demo"/>\r
+</workingSet>\r
+<mruList name="FreeRTOS_LM3S8962_Demo"/>\r
+</workingSetManager>
\ No newline at end of file

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.ui/dialog_settings.xml b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.ui/dialog_settings.xml
new file mode 100644 (file)
index 0000000..64561b6
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.ui/dialog_settings.xml
@@ -0,0 +1,10 @@
+<?xml version="1.0" encoding="UTF-8"?>\r
+<section name="Workbench">\r
+       <section name="FileSystemImportWizard">\r
+               <item value="false" key="WizardFileSystemResourceImportPage1.STORE_OVERWRITE_EXISTING_RESOURCES_ID"/>\r
+               <item value="false" key="WizardFileSystemResourceImportPage1.STORE_CREATE_CONTAINER_STRUCTURE_ID"/>\r
+               <list key="WizardFileSystemResourceImportPage1.STORE_SOURCE_NAMES_ID">\r
+                       <item value="C:\E\Dev\FreeRTOS\Demo\CORTEX_LM3S8962_Eclipse"/>\r
+               </list>\r
+       </section>\r
+</section>\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.update.ui/dialog_settings.xml b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.update.ui/dialog_settings.xml
new file mode 100644 (file)
index 0000000..86928e0
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/.plugins/org.eclipse.update.ui/dialog_settings.xml
@@ -0,0 +1,5 @@
+<?xml version="1.0" encoding="UTF-8"?>\r
+<section name="Workbench">\r
+       <section name="ModeSelectionPage">\r
+       </section>\r
+</section>\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/version.ini b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/version.ini
new file mode 100644 (file)
index 0000000..c51ff74
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/.metadata/version.ini
@@ -0,0 +1 @@
+org.eclipse.core.runtime=1
\ No newline at end of file

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/.cproject b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/.cproject
new file mode 100644 (file)
index 0000000..f030617
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/.cproject
@@ -0,0 +1,228 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>\r
+<?fileVersion 4.0.0?>\r
+\r
+<cproject>\r
+<storageModule moduleId="org.eclipse.cdt.core.settings">\r
+<cconfiguration id="0.1109417601">\r
+<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="0.1109417601" moduleId="org.eclipse.cdt.core.settings" name="Default">\r
+<externalSettings/>\r
+<extensions>\r
+<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>\r
+<extension id="org.eclipse.cdt.core.VCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>\r
+<extension id="org.eclipse.cdt.core.MakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>\r
+<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>\r
+<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>\r
+<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>\r
+</extensions>\r
+</storageModule>\r
+<storageModule moduleId="cdtBuildSystem" version="4.0.0">\r
+<configuration artifactExtension="" artifactName="RTOSDemo" buildProperties="" description="" id="0.1109417601" name="Default" parent="org.eclipse.cdt.build.core.prefbase.cfg">\r
+<folderInfo id="0.1109417601." name="/" resourcePath="">\r
+<toolChain id="org.eclipse.cdt.build.core.prefbase.toolchain.1816209921" name="No ToolChain" resourceTypeBasedDiscovery="false" superClass="org.eclipse.cdt.build.core.prefbase.toolchain">\r
+<targetPlatform binaryParser="org.eclipse.cdt.core.ELF" id="org.eclipse.cdt.build.core.prefbase.toolchain.1816209921.1299943801" name=""/>\r
+<builder autoBuildTarget="all" buildPath="${workspace_loc:/RTOSDemo}" cleanBuildTarget="clean" command="cs-make" enableAutoBuild="false" enableCleanBuild="true" enabledIncrementalBuild="true" id="org.eclipse.cdt.build.core.settings.default.builder.116472864" incrementalBuildTarget="all" keepEnvironmentInBuildfile="false" managedBuildOn="false" name="Gnu Make Builder" superClass="org.eclipse.cdt.build.core.settings.default.builder">\r
+<outputEntries>\r
+<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="outputPath" name=""/>\r
+</outputEntries>\r
+</builder>\r
+<tool id="org.eclipse.cdt.build.core.settings.holder.libs.260784574" name="holder for library settings" superClass="org.eclipse.cdt.build.core.settings.holder.libs"/>\r
+<tool id="org.eclipse.cdt.build.core.settings.holder.1502006385" name="Assembly" superClass="org.eclipse.cdt.build.core.settings.holder">\r
+<option id="org.eclipse.cdt.build.core.settings.holder.undef.incpaths.578007234" name="Undefined Include Paths" superClass="org.eclipse.cdt.build.core.settings.holder.undef.incpaths" valueType="undefIncludePath"/>\r
+<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.685511860" languageId="org.eclipse.cdt.core.assembly" languageName="Assembly" sourceContentType="org.eclipse.cdt.core.asmSource" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>\r
+</tool>\r
+<tool id="org.eclipse.cdt.build.core.settings.holder.1021181093" name="GNU C++" superClass="org.eclipse.cdt.build.core.settings.holder">\r
+<option id="org.eclipse.cdt.build.core.settings.holder.undef.incpaths.1567637665" name="Undefined Include Paths" superClass="org.eclipse.cdt.build.core.settings.holder.undef.incpaths" valueType="undefIncludePath"/>\r
+<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.1828415025" languageId="org.eclipse.cdt.core.g++" languageName="GNU C++" sourceContentType="org.eclipse.cdt.core.cxxSource,org.eclipse.cdt.core.cxxHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>\r
+</tool>\r
+<tool id="org.eclipse.cdt.build.core.settings.holder.164584712" name="GNU C" superClass="org.eclipse.cdt.build.core.settings.holder">\r
+<option id="org.eclipse.cdt.build.core.settings.holder.undef.incpaths.1309366258" name="Undefined Include Paths" superClass="org.eclipse.cdt.build.core.settings.holder.undef.incpaths" valueType="undefIncludePath"/>\r
+<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.1667472855" languageId="org.eclipse.cdt.core.gcc" languageName="GNU C" sourceContentType="org.eclipse.cdt.core.cSource,org.eclipse.cdt.core.cHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>\r
+</tool>\r
+</toolChain>\r
+</folderInfo>\r
+<sourceEntries>\r
+<entry excluding="Common Demo Files|FreeRTOS.org Source|Source|Minimal" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>\r
+<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="FreeRTOS.org Source"/>\r
+<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Common Demo Files"/>\r
+</sourceEntries>\r
+</configuration>\r
+</storageModule>\r
+<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>\r
+<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>\r
+\r
+\r
+<storageModule moduleId="scannerConfiguration">\r
+<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile"/>\r
+<profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">\r
+<buildOutputProvider>\r
+<openAction enabled="true" filePath=""/>\r
+<parser enabled="true"/>\r
+</buildOutputProvider>\r
+<scannerInfoProvider id="specsFile">\r
+<runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>\r
+<parser enabled="true"/>\r
+</scannerInfoProvider>\r
+</profile>\r
+<profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">\r
+<buildOutputProvider>\r
+<openAction enabled="true" filePath=""/>\r
+<parser enabled="true"/>\r
+</buildOutputProvider>\r
+<scannerInfoProvider id="makefileGenerator">\r
+<runAction arguments="-f ${project_name}_scd.mk" command="make" useDefault="true"/>\r
+<parser enabled="true"/>\r
+</scannerInfoProvider>\r
+</profile>\r
+<profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">\r
+<buildOutputProvider>\r
+<openAction enabled="false" filePath=""/>\r
+<parser enabled="false"/>\r
+</buildOutputProvider>\r
+<scannerInfoProvider id="specsFile">\r
+<runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>\r
+<parser enabled="true"/>\r
+</scannerInfoProvider>\r
+</profile>\r
+<profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">\r
+<buildOutputProvider>\r
+<openAction enabled="false" filePath=""/>\r
+<parser enabled="false"/>\r
+</buildOutputProvider>\r
+<scannerInfoProvider id="specsFile">\r
+<runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>\r
+<parser enabled="true"/>\r
+</scannerInfoProvider>\r
+</profile>\r
+<profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">\r
+<buildOutputProvider>\r
+<openAction enabled="false" filePath=""/>\r
+<parser enabled="false"/>\r
+</buildOutputProvider>\r
+<scannerInfoProvider id="specsFile">\r
+<runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>\r
+<parser enabled="true"/>\r
+</scannerInfoProvider>\r
+</profile>\r
+<profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">\r
+<buildOutputProvider>\r
+<openAction enabled="false" filePath=""/>\r
+<parser enabled="false"/>\r
+</buildOutputProvider>\r
+<scannerInfoProvider id="specsFile">\r
+<runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>\r
+<parser enabled="true"/>\r
+</scannerInfoProvider>\r
+</profile>\r
+<profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">\r
+<buildOutputProvider>\r
+<openAction enabled="false" filePath=""/>\r
+<parser enabled="false"/>\r
+</buildOutputProvider>\r
+<scannerInfoProvider id="specsFile">\r
+<runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>\r
+<parser enabled="true"/>\r
+</scannerInfoProvider>\r
+</profile>\r
+<profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">\r
+<buildOutputProvider>\r
+<openAction enabled="false" filePath=""/>\r
+<parser enabled="false"/>\r
+</buildOutputProvider>\r
+<scannerInfoProvider id="specsFile">\r
+<runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>\r
+<parser enabled="true"/>\r
+</scannerInfoProvider>\r
+</profile>\r
+<scannerConfigBuildInfo instanceId="0.1109417601">\r
+<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile"/>\r
+<profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">\r
+<buildOutputProvider>\r
+<openAction enabled="true" filePath=""/>\r
+<parser enabled="true"/>\r
+</buildOutputProvider>\r
+<scannerInfoProvider id="specsFile">\r
+<runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc.exe" useDefault="true"/>\r
+<parser enabled="true"/>\r
+</scannerInfoProvider>\r
+</profile>\r
+<profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">\r
+<buildOutputProvider>\r
+<openAction enabled="true" filePath=""/>\r
+<parser enabled="true"/>\r
+</buildOutputProvider>\r
+<scannerInfoProvider id="makefileGenerator">\r
+<runAction arguments="-f ${project_name}_scd.mk" command="make" useDefault="true"/>\r
+<parser enabled="true"/>\r
+</scannerInfoProvider>\r
+</profile>\r
+<profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">\r
+<buildOutputProvider>\r
+<openAction enabled="true" filePath=""/>\r
+<parser enabled="false"/>\r
+</buildOutputProvider>\r
+<scannerInfoProvider id="specsFile">\r
+<runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>\r
+<parser enabled="true"/>\r
+</scannerInfoProvider>\r
+</profile>\r
+<profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">\r
+<buildOutputProvider>\r
+<openAction enabled="true" filePath=""/>\r
+<parser enabled="false"/>\r
+</buildOutputProvider>\r
+<scannerInfoProvider id="specsFile">\r
+<runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>\r
+<parser enabled="true"/>\r
+</scannerInfoProvider>\r
+</profile>\r
+<profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">\r
+<buildOutputProvider>\r
+<openAction enabled="true" filePath=""/>\r
+<parser enabled="false"/>\r
+</buildOutputProvider>\r
+<scannerInfoProvider id="specsFile">\r
+<runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>\r
+<parser enabled="true"/>\r
+</scannerInfoProvider>\r
+</profile>\r
+<profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">\r
+<buildOutputProvider>\r
+<openAction enabled="true" filePath=""/>\r
+<parser enabled="false"/>\r
+</buildOutputProvider>\r
+<scannerInfoProvider id="specsFile">\r
+<runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>\r
+<parser enabled="true"/>\r
+</scannerInfoProvider>\r
+</profile>\r
+<profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">\r
+<buildOutputProvider>\r
+<openAction enabled="true" filePath=""/>\r
+<parser enabled="false"/>\r
+</buildOutputProvider>\r
+<scannerInfoProvider id="specsFile">\r
+<runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>\r
+<parser enabled="true"/>\r
+</scannerInfoProvider>\r
+</profile>\r
+<profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">\r
+<buildOutputProvider>\r
+<openAction enabled="true" filePath=""/>\r
+<parser enabled="false"/>\r
+</buildOutputProvider>\r
+<scannerInfoProvider id="specsFile">\r
+<runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>\r
+<parser enabled="true"/>\r
+</scannerInfoProvider>\r
+</profile>\r
+</scannerConfigBuildInfo>\r
+</storageModule>\r
+<storageModule moduleId="org.eclipse.cdt.core.language.mapping">\r
+<project-mappings/>\r
+</storageModule>\r
+</cconfiguration>\r
+</storageModule>\r
+<storageModule moduleId="cdtBuildSystem" version="4.0.0">\r
+<project id="RTOSDemo.null.976634949" name="RTOSDemo"/>\r
+</storageModule>\r
+</cproject>\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/.project b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/.project
new file mode 100644 (file)
index 0000000..e635b96
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/.project
@@ -0,0 +1,97 @@
+<?xml version="1.0" encoding="UTF-8"?>\r
+<projectDescription>\r
+       <name>RTOSDemo</name>\r
+       <comment></comment>\r
+       <projects>\r
+       </projects>\r
+       <buildSpec>\r
+               <buildCommand>\r
+                       <name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>\r
+                       <triggers>clean,full,incremental,</triggers>\r
+                       <arguments>\r
+                               <dictionary>\r
+                                       <key>org.eclipse.cdt.make.core.cleanBuildTarget</key>\r
+                                       <value>clean</value>\r
+                               </dictionary>\r
+                               <dictionary>\r
+                                       <key>org.eclipse.cdt.make.core.enableCleanBuild</key>\r
+                                       <value>true</value>\r
+                               </dictionary>\r
+                               <dictionary>\r
+                                       <key>?name?</key>\r
+                                       <value></value>\r
+                               </dictionary>\r
+                               <dictionary>\r
+                                       <key>org.eclipse.cdt.make.core.append_environment</key>\r
+                                       <value>true</value>\r
+                               </dictionary>\r
+                               <dictionary>\r
+                                       <key>org.eclipse.cdt.make.core.stopOnError</key>\r
+                                       <value>true</value>\r
+                               </dictionary>\r
+                               <dictionary>\r
+                                       <key>org.eclipse.cdt.make.core.buildCommand</key>\r
+                                       <value>cs-make</value>\r
+                               </dictionary>\r
+                               <dictionary>\r
+                                       <key>org.eclipse.cdt.make.core.contents</key>\r
+                                       <value>org.eclipse.cdt.make.core.activeConfigSettings</value>\r
+                               </dictionary>\r
+                               <dictionary>\r
+                                       <key>org.eclipse.cdt.make.core.buildLocation</key>\r
+                                       <value>${workspace_loc:/RTOSDemo}</value>\r
+                               </dictionary>\r
+                               <dictionary>\r
+                                       <key>org.eclipse.cdt.make.core.useDefaultBuildCmd</key>\r
+                                       <value>false</value>\r
+                               </dictionary>\r
+                               <dictionary>\r
+                                       <key>org.eclipse.cdt.make.core.enableAutoBuild</key>\r
+                                       <value>false</value>\r
+                               </dictionary>\r
+                               <dictionary>\r
+                                       <key>org.eclipse.cdt.make.core.enableFullBuild</key>\r
+                                       <value>true</value>\r
+                               </dictionary>\r
+                               <dictionary>\r
+                                       <key>org.eclipse.cdt.make.core.buildArguments</key>\r
+                                       <value></value>\r
+                               </dictionary>\r
+                               <dictionary>\r
+                                       <key>org.eclipse.cdt.make.core.fullBuildTarget</key>\r
+                                       <value>all</value>\r
+                               </dictionary>\r
+                               <dictionary>\r
+                                       <key>?children?</key>\r
+                                       <value>?name?=outputEntries\|?children?=?name?=entry\\\\\\\\\\\\\\\|\\\\\\\|\||</value>\r
+                               </dictionary>\r
+                               <dictionary>\r
+                                       <key>org.eclipse.cdt.make.core.autoBuildTarget</key>\r
+                                       <value>all</value>\r
+                               </dictionary>\r
+                       </arguments>\r
+               </buildCommand>\r
+               <buildCommand>\r
+                       <name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>\r
+                       <arguments>\r
+                       </arguments>\r
+               </buildCommand>\r
+       </buildSpec>\r
+       <natures>\r
+               <nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>\r
+               <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>\r
+               <nature>org.eclipse.cdt.core.cnature</nature>\r
+       </natures>\r
+       <linkedResources>\r
+               <link>\r
+                       <name>Common Demo Files</name>\r
+                       <type>2</type>\r
+                       <locationURI>FreeRTOS_ROOT/Demo/Common</locationURI>\r
+               </link>\r
+               <link>\r
+                       <name>FreeRTOS.org Source</name>\r
+                       <type>2</type>\r
+                       <locationURI>FreeRTOS_ROOT/Source</locationURI>\r
+               </link>\r
+       </linkedResources>\r
+</projectDescription>\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/.settings/org.eclipse.ltk.core.refactoring.prefs b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/.settings/org.eclipse.ltk.core.refactoring.prefs
new file mode 100644 (file)
index 0000000..a9f7e81
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/.settings/org.eclipse.ltk.core.refactoring.prefs
@@ -0,0 +1,3 @@
+#Sun Aug 19 20:36:58 BST 2007\r
+eclipse.preferences.version=1\r
+org.eclipse.ltk.core.refactoring.enable.project.refactoring.history=false\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/FreeRTOSConfig.h b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/FreeRTOSConfig.h
new file mode 100644 (file)
index 0000000..792c903
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/FreeRTOSConfig.h
@@ -0,0 +1,82 @@
+/*\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
+\r
+       This file is part of the FreeRTOS.org distribution.\r
+\r
+       FreeRTOS.org is free software; you can redistribute it and/or modify\r
+       it under the terms of the GNU General Public License as published by\r
+       the Free Software Foundation; either version 2 of the License, or\r
+       (at your option) any later version.\r
+\r
+       FreeRTOS.org is distributed in the hope that it will be useful,\r
+       but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+       MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
+       GNU General Public License for more details.\r
+\r
+       You should have received a copy of the GNU General Public License\r
+       along with FreeRTOS.org; if not, write to the Free Software\r
+       Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
+\r
+       A special exception to the GPL can be applied should you wish to distribute\r
+       a combined work that includes FreeRTOS.org, without being obliged to provide\r
+       the source code for any proprietary components.  See the licensing section\r
+       of http://www.FreeRTOS.org for full details of how and when the exception\r
+       can be applied.\r
+\r
+       ***************************************************************************\r
+       See http://www.FreeRTOS.org for documentation, latest information, license\r
+       and contact details.  Please ensure to read the configuration and relevant\r
+       port sections of the online documentation.\r
+\r
+       Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along\r
+       with commercial development and support options.\r
+       ***************************************************************************\r
+*/\r
+\r
+#ifndef FREERTOS_CONFIG_H\r
+#define FREERTOS_CONFIG_H\r
+\r
+/*-----------------------------------------------------------\r
+ * Application specific definitions.\r
+ *\r
+ * These definitions should be adjusted for your particular hardware and\r
+ * application requirements.\r
+ *\r
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE\r
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.\r
+ *----------------------------------------------------------*/\r
+\r
+#define configUSE_PREEMPTION           1\r
+#define configUSE_IDLE_HOOK                    1\r
+#define configUSE_TICK_HOOK                    1\r
+#define configCPU_CLOCK_HZ                     ( ( unsigned portLONG ) 50000000 )\r
+#define configTICK_RATE_HZ                     ( ( portTickType ) 1000 )\r
+#define configMINIMAL_STACK_SIZE       ( ( unsigned portSHORT ) 70 )\r
+#define configTOTAL_HEAP_SIZE          ( ( size_t ) ( 24000 ) )\r
+#define configMAX_TASK_NAME_LEN                ( 12 )\r
+#define configUSE_TRACE_FACILITY       1\r
+#define configUSE_16_BIT_TICKS         0\r
+#define configIDLE_SHOULD_YIELD                0\r
+#define configUSE_CO_ROUTINES          0\r
+#define configUSE_MUTEXES                      1\r
+\r
+#define configMAX_PRIORITIES           ( ( unsigned portBASE_TYPE ) 5 )\r
+#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )\r
+\r
+/* Set the following definitions to 1 to include the API function, or zero\r
+to exclude the API function. */\r
+\r
+#define INCLUDE_vTaskPrioritySet               1\r
+#define INCLUDE_uxTaskPriorityGet              1\r
+#define INCLUDE_vTaskDelete                            1\r
+#define INCLUDE_vTaskCleanUpResources  0\r
+#define INCLUDE_vTaskSuspend                   1\r
+#define INCLUDE_vTaskDelayUntil                        1\r
+#define INCLUDE_vTaskDelay                             1\r
+\r
+\r
+\r
+#define configKERNEL_INTERRUPT_PRIORITY 255\r
+\r
+\r
+#endif /* FREERTOS_CONFIG_H */\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/Makefile b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/Makefile
new file mode 100644 (file)
index 0000000..6c72b8c
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/Makefile
@@ -0,0 +1,106 @@
+#      FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
+#\r
+#      This file is part of the FreeRTOS.org distribution.\r
+#\r
+#      FreeRTOS.org is free software; you can redistribute it and/or modify\r
+#      it under the terms of the GNU General Public License as published by\r
+#      the Free Software Foundation; either version 2 of the License, or\r
+#      (at your option) any later version.\r
+#\r
+#      FreeRTOS.org is distributed in the hope that it will be useful,\r
+#      but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+#      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
+#      GNU General Public License for more details.\r
+#\r
+#      You should have received a copy of the GNU General Public License\r
+#      along with FreeRTOS.org; if not, write to the Free Software\r
+#      Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
+#\r
+#      A special exception to the GPL can be applied should you wish to distribute\r
+#      a combined work that includes FreeRTOS.org, without being obliged to provide\r
+#      the source code for any proprietary components.  See the licensing section \r
+#      of http://www.FreeRTOS.org for full details of how and when the exception\r
+#      can be applied.\r
+#\r
+#      ***************************************************************************\r
+#      See http://www.FreeRTOS.org for documentation, latest information, license \r
+#      and contact details.  Please ensure to read the configuration and relevant \r
+#      port sections of the online documentation.\r
+#      ***************************************************************************\r
+\r
+\r
+RTOS_SOURCE_DIR=../../../Source\r
+DEMO_COMMON_DIR=../../Common/Minimal\r
+DEMO_INCLUDE_DIR=../../Common/include\r
+UIP_COMMON_DIR=../../Common/ethernet/uIP/uip-1.0/uip\r
+LUMINARY_DRIVER_DIR=../../Common/drivers/LuminaryMicro\r
+\r
+CC=arm-none-eabi-gcc\r
+OBJCOPY=arm-none-eabi-objcopy\r
+LDSCRIPT=standalone.ld\r
+\r
+LINKER_FLAGS=-nostartfiles -Xlinker -oRTOSDemo.axf -Xlinker -M -Xlinker -Map=rtosdemo.map\r
+\r
+DEBUG=-g\r
+OPTIM=-O0\r
+\r
+\r
+CFLAGS=$(DEBUG) -I . -I $(RTOS_SOURCE_DIR)/include -I $(RTOS_SOURCE_DIR)/portable/GCC/ARM_CM3 \\r
+               -I $(DEMO_INCLUDE_DIR) -D GCC_ARMCM3_LM3S102 -D inline= -mthumb -mcpu=cortex-m3 $(OPTIM) -T$(LDSCRIPT) \\r
+               -D PACK_STRUCT_END=__attribute\(\(packed\)\) -D ALIGN_STRUCT_END=__attribute\(\(aligned\(4\)\)\) -D sprintf=usprintf -D snprintf=usnprintf -D printf=uipprintf \\r
+               -I $(UIP_COMMON_DIR) -I ./webserver -ffunction-sections -fdata-sections -Wl,--no-gc-sections -I $(LUMINARY_DRIVER_DIR)\r
+\r
+SOURCE=        main.c \\r
+               timertest.c \\r
+               ./ParTest/ParTest.c \\r
+               rit128x96x4.c \\r
+               osram128x64x4.c \\r
+               $(LUMINARY_DRIVER_DIR)/ustdlib.c \\r
+               $(DEMO_COMMON_DIR)/BlockQ.c \\r
+               $(DEMO_COMMON_DIR)/blocktim.c \\r
+               $(DEMO_COMMON_DIR)/death.c \\r
+               $(DEMO_COMMON_DIR)/integer.c \\r
+               $(DEMO_COMMON_DIR)/PollQ.c \\r
+               $(DEMO_COMMON_DIR)/semtest.c \\r
+               $(DEMO_COMMON_DIR)/GenQTest.c \\r
+               $(DEMO_COMMON_DIR)/QPeek.c \\r
+               ./webserver/uIP_Task.c \\r
+               ./webserver/emac.c \\r
+               ./webserver/httpd.c \\r
+               ./webserver/httpd-cgi.c \\r
+               ./webserver/httpd-fs.c \\r
+               ./webserver/http-strings.c \\r
+               $(UIP_COMMON_DIR)/uip_arp.c \\r
+               $(UIP_COMMON_DIR)/psock.c \\r
+               $(UIP_COMMON_DIR)/timer.c \\r
+               $(UIP_COMMON_DIR)/uip.c \\r
+               $(RTOS_SOURCE_DIR)/list.c \\r
+               $(RTOS_SOURCE_DIR)/queue.c \\r
+               $(RTOS_SOURCE_DIR)/tasks.c \\r
+               $(RTOS_SOURCE_DIR)/Portable/GCC/ARM_CM3/port.c \\r
+               $(RTOS_SOURCE_DIR)/Portable/MemMang/heap_2.c\r
+\r
+LIBS= $(LUMINARY_DRIVER_DIR)/arm-none-eabi-gcc/libdriver.a\r
+\r
+OBJS = $(SOURCE:.c=.o)\r
+\r
+all: RTOSDemo.bin\r
+        \r
+RTOSDemo.bin : RTOSDemo.axf\r
+       $(OBJCOPY) RTOSDemo.axf -O binary RTOSDemo.bin\r
+\r
+RTOSDemo.axf : $(OBJS) startup.o Makefile\r
+       $(CC) $(CFLAGS) $(OBJS) startup.o $(LIBS) $(LINKER_FLAGS)\r
+\r
+$(OBJS) : %.o : %.c Makefile FreeRTOSConfig.h\r
+       $(CC) -c $(CFLAGS) $< -o $@\r
+\r
+startup.o : startup.c Makefile\r
+       $(CC) -c $(CFLAGS) -O1 startup.c -o startup.o\r
+               \r
+clean :\r
+       cs-rm $(OBJS)\r
+       \r
+\r
+\r
+\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/ParTest/ParTest.c b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/ParTest/ParTest.c
new file mode 100644 (file)
index 0000000..3ef9799
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/ParTest/ParTest.c
@@ -0,0 +1,83 @@
+/*\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
+\r
+       This file is part of the FreeRTOS.org distribution.\r
+\r
+       FreeRTOS.org is free software; you can redistribute it and/or modify\r
+       it under the terms of the GNU General Public License as published by\r
+       the Free Software Foundation; either version 2 of the License, or\r
+       (at your option) any later version.\r
+\r
+       FreeRTOS.org is distributed in the hope that it will be useful,\r
+       but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+       MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
+       GNU General Public License for more details.\r
+\r
+       You should have received a copy of the GNU General Public License\r
+       along with FreeRTOS.org; if not, write to the Free Software\r
+       Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
+\r
+       A special exception to the GPL can be applied should you wish to distribute\r
+       a combined work that includes FreeRTOS.org, without being obliged to provide\r
+       the source code for any proprietary components.  See the licensing section\r
+       of http://www.FreeRTOS.org for full details of how and when the exception\r
+       can be applied.\r
+\r
+       ***************************************************************************\r
+       See http://www.FreeRTOS.org for documentation, latest information, license\r
+       and contact details.  Please ensure to read the configuration and relevant\r
+       port sections of the online documentation.\r
+\r
+       Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along\r
+       with commercial development and support options.\r
+       ***************************************************************************\r
+*/\r
+\r
+/*-----------------------------------------------------------\r
+ * Simple parallel port IO routines.\r
+ *-----------------------------------------------------------*/\r
+\r
+/*\r
+*/\r
+\r
+/* Scheduler includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+\r
+/* Demo includes. */\r
+#include "partest.h"\r
+\r
+/* Library includes. */\r
+#include "hw_types.h"\r
+#include "gpio.h"\r
+#include "hw_memmap.h"\r
+\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+void vParTestInitialise( void )\r
+{\r
+    GPIODirModeSet( GPIO_PORTF_BASE, GPIO_PIN_0, GPIO_DIR_MODE_OUT );\r
+    GPIOPadConfigSet( GPIO_PORTF_BASE, GPIO_PIN_0, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD );\r
+    GPIOPinWrite( GPIO_PORTF_BASE, GPIO_PIN_0, 0 );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vParTestSetLED( unsigned portBASE_TYPE uxLED, signed portBASE_TYPE xValue )\r
+{\r
+       /* There is only one LED. */\r
+       ( void ) uxLED;\r
+       \r
+    GPIOPinWrite( GPIO_PORTF_BASE, GPIO_PIN_0, xValue );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+unsigned portBASE_TYPE uxParTestGetLED( unsigned portBASE_TYPE uxLED )\r
+{\r
+       /* There is only one LED. */\r
+       ( void ) uxLED;\r
+\r
+       return GPIOPinRead( GPIO_PORTF_BASE, GPIO_PIN_0 );      \r
+}\r
+\r
+\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/bitmap.h b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/bitmap.h
new file mode 100644 (file)
index 0000000..02ce0b3
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/bitmap.h
@@ -0,0 +1,171 @@
+#ifndef BITMAP_H\r
+#define BITMAP_H\r
+\r
+const unsigned char pucImage[] =\r
+{\r
+0x00, 0x0a, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0x00, 0x0a, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xa0, 0x0a, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xaa, 0xaa, 0xaa, 0xaf, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfa, 0xaa,\r
+0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0xff, 0xf7,\r
+0x00, 0x8f, 0xff, 0xff, 0xf8, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0xff, 0xff, 0xff, 0xff, 0xf8, 0x88, 0x88, 0x88,\r
+0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x8f, 0xff, 0xff, 0xff, 0xff, 0xff, 0x88, 0x77, 0x77, 0x78, 0x8f, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xf8, 0x88, 0x77, 0x77, 0x88, 0x8f, 0xff, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff,\r
+0xff, 0xff, 0xf0, 0x00, 0x00, 0x8f, 0x00, 0xff, 0x87, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x78, 0xff, 0xff,\r
+0xf7, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x78, 0xff, 0xff, 0xff, 0x87, 0x77, 0x77, 0x77, 0x77, 0x77,\r
+0x77, 0x77, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x7f, 0xff, 0xff, 0xfa, 0xaa,\r
+0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0x70, 0x00, 0x00, 0x8f, 0x00, 0xff, 0x87, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77,\r
+0x77, 0x77, 0xff, 0xff, 0xf7, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x78, 0xff, 0xff, 0xf8, 0x77, 0x77,\r
+0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x78, 0xff, 0xff, 0xff, 0xff, 0x87, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x8f,\r
+0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0x70, 0x08, 0x00, 0x8f, 0x00, 0xff, 0x87, 0x77, 0x77, 0x77,\r
+0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x8f, 0xff, 0xf7, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x78, 0xff,\r
+0xff, 0x87, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x8f, 0xff, 0xff, 0xf8, 0x77, 0x77, 0x77, 0x77, 0x77,\r
+0x77, 0x77, 0x77, 0x8f, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0x00, 0x0f, 0x00, 0x8f, 0x00, 0xff,\r
+0x87, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x78, 0xff, 0xf7, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77,\r
+0x77, 0x77, 0x78, 0xff, 0xf8, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x78, 0xff, 0xff, 0xf8, 0x77,\r
+0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x8f, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0x70, 0x07,\r
+0x00, 0x70, 0x00, 0xff, 0x87, 0x77, 0x77, 0x77, 0xff, 0xff, 0xf8, 0x77, 0x77, 0x77, 0x77, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0x77, 0x77, 0x77, 0x7f, 0xff, 0xff, 0xff, 0xff, 0x87, 0x77, 0x77, 0x77, 0x78, 0xff, 0xff, 0xf8, 0x77, 0x77, 0x77, 0x77,\r
+0xff, 0xff, 0x87, 0x77, 0x77, 0x77, 0x8f, 0xff, 0xff, 0xff, 0x88, 0x8f, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff,\r
+0xff, 0xff, 0x80, 0x00, 0x00, 0x00, 0x07, 0xff, 0x87, 0x77, 0x77, 0x77, 0xff, 0xff, 0xff, 0x87, 0x77, 0x77, 0x77, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0x77, 0x77, 0x77, 0x7f, 0xff, 0xff, 0xff, 0xff, 0x77, 0x77, 0x77, 0x77, 0xff, 0xff, 0xff, 0xff,\r
+0x87, 0x77, 0x77, 0x77, 0xff, 0xff, 0x77, 0x77, 0x77, 0x77, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfa, 0xaa,\r
+0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0xf7, 0x00, 0x00, 0x00, 0x0f, 0xff, 0x87, 0x77, 0x77, 0x77, 0xff, 0xff, 0xff, 0xf8,\r
+0x77, 0x77, 0x77, 0xff, 0xff, 0xff, 0xff, 0xff, 0x77, 0x77, 0x77, 0x7f, 0xff, 0xff, 0xff, 0xff, 0x77, 0x77, 0x77, 0x77,\r
+0xff, 0xff, 0xff, 0xff, 0xf7, 0x77, 0x77, 0x77, 0x8f, 0xff, 0x77, 0x77, 0x77, 0x77, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0xff, 0x70, 0x00, 0x00, 0xff, 0xff, 0x87, 0x77, 0x77, 0x77,\r
+0xff, 0xff, 0xff, 0xf8, 0x77, 0x77, 0x77, 0xff, 0xff, 0xff, 0xff, 0xff, 0x77, 0x77, 0x77, 0x7f, 0xff, 0xff, 0xff, 0xff,\r
+0x77, 0x77, 0x77, 0x78, 0xff, 0xff, 0xff, 0xff, 0xf8, 0x77, 0x77, 0x77, 0x8f, 0xff, 0x77, 0x77, 0x77, 0x77, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0x87, 0x77, 0x77, 0x77, 0xff, 0xff, 0xff, 0xf7, 0x77, 0x77, 0x78, 0xff, 0xff, 0xff, 0xff, 0xff, 0x77, 0x77, 0x77, 0x7f,\r
+0xff, 0xff, 0xff, 0xf8, 0x77, 0x77, 0x77, 0x7f, 0xff, 0xff, 0xff, 0xff, 0xff, 0x87, 0x77, 0x77, 0x78, 0xff, 0x87, 0x77,\r
+0x77, 0x77, 0x78, 0x8f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0x88, 0xff, 0xff, 0xff, 0x87, 0x77, 0x77, 0x77, 0xff, 0xff, 0xf8, 0x87, 0x77, 0x77, 0x7f, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0x77, 0x77, 0x77, 0x7f, 0xff, 0xff, 0xff, 0xf8, 0x77, 0x77, 0x77, 0x8f, 0xff, 0xff, 0xff, 0xff, 0xff, 0x87, 0x77, 0x77,\r
+0x78, 0xff, 0x87, 0x77, 0x77, 0x77, 0x77, 0x77, 0x8f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0x80, 0x00, 0x8f, 0x8f, 0xff, 0x87, 0x77, 0x77, 0x77, 0x88, 0x88, 0x77, 0x77, 0x77, 0x77, 0x8f, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0x77, 0x77, 0x77, 0x7f, 0xff, 0xff, 0xff, 0xf8, 0x77, 0x77, 0x77, 0x8f, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0x87, 0x77, 0x77, 0x78, 0xff, 0xf7, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x88, 0xff, 0xff, 0xff, 0xff, 0xfa, 0xaa,\r
+0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0xf7, 0x00, 0x00, 0x8f, 0x07, 0xff, 0x87, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77,\r
+0x77, 0x77, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x77, 0x77, 0x77, 0x7f, 0xff, 0xff, 0xff, 0xf8, 0x77, 0x77, 0x77, 0x8f,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0x87, 0x77, 0x77, 0x78, 0xff, 0xf8, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x8f, 0xff,\r
+0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0x70, 0x07, 0x00, 0x8f, 0x00, 0xff, 0x87, 0x77, 0x77, 0x77,\r
+0x77, 0x77, 0x77, 0x77, 0x88, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x77, 0x77, 0x77, 0x7f, 0xff, 0xff, 0xff, 0xf8,\r
+0x77, 0x77, 0x77, 0x8f, 0xff, 0xff, 0xff, 0xff, 0xff, 0x87, 0x77, 0x77, 0x78, 0xff, 0xff, 0xf8, 0x77, 0x77, 0x77, 0x77,\r
+0x77, 0x77, 0x77, 0x8f, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0x70, 0x0f, 0x00, 0x8f, 0x00, 0xff,\r
+0x87, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x8f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x77, 0x77, 0x77, 0x7f,\r
+0xff, 0xff, 0xff, 0xf8, 0x77, 0x77, 0x77, 0x8f, 0xff, 0xff, 0xff, 0xff, 0xff, 0x87, 0x77, 0x77, 0x78, 0xff, 0xff, 0xff,\r
+0x87, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x78, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0x00, 0x0f,\r
+0x00, 0x8f, 0x00, 0xff, 0x87, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x78, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0x77, 0x77, 0x77, 0x7f, 0xff, 0xff, 0xff, 0xf8, 0x77, 0x77, 0x77, 0x8f, 0xff, 0xff, 0xff, 0xff, 0xff, 0x87, 0x77, 0x77,\r
+0x78, 0xff, 0xff, 0xff, 0xff, 0x88, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff,\r
+0xff, 0xff, 0x70, 0x08, 0x00, 0x88, 0x00, 0xff, 0x87, 0x77, 0x77, 0x77, 0x88, 0x88, 0x77, 0x77, 0x77, 0x78, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0x77, 0x77, 0x77, 0x7f, 0xff, 0xff, 0xff, 0xf8, 0x77, 0x77, 0x77, 0x8f, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0x87, 0x77, 0x77, 0x78, 0xff, 0xff, 0xff, 0xff, 0xff, 0x88, 0x77, 0x77, 0x77, 0x77, 0x77, 0xff, 0xff, 0xfa, 0xaa,\r
+0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0x70, 0x00, 0x00, 0x70, 0x07, 0xff, 0x87, 0x77, 0x77, 0x77, 0xff, 0xff, 0x77, 0x77,\r
+0x77, 0x77, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x77, 0x77, 0x77, 0x7f, 0xff, 0xff, 0xff, 0xf8, 0x77, 0x77, 0x77, 0x7f,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0x87, 0x77, 0x77, 0x78, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xf8, 0x77, 0x77, 0x77, 0x77,\r
+0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0xf8, 0x00, 0x00, 0x00, 0x7f, 0xff, 0x87, 0x77, 0x77, 0x77,\r
+0xff, 0xff, 0xf7, 0x77, 0x77, 0x77, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x77, 0x77, 0x77, 0x7f, 0xff, 0xff, 0xff, 0xff,\r
+0x77, 0x77, 0x77, 0x78, 0xff, 0xff, 0xff, 0xff, 0xf8, 0x77, 0x77, 0x77, 0x7f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0x87, 0x77, 0x77, 0x77, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0xff, 0x80, 0x00, 0x00, 0xff, 0xff,\r
+0x87, 0x77, 0x77, 0x77, 0xff, 0xff, 0xf8, 0x77, 0x77, 0x77, 0x8f, 0xff, 0xff, 0xff, 0xff, 0xff, 0x77, 0x77, 0x77, 0x7f,\r
+0xff, 0xff, 0xff, 0xff, 0x77, 0x77, 0x77, 0x77, 0xff, 0xff, 0xff, 0xff, 0xf7, 0x77, 0x77, 0x77, 0x8f, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0x87, 0x77, 0x77, 0x77, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0x87, 0x88,\r
+0x88, 0x8f, 0xff, 0xff, 0x87, 0x77, 0x77, 0x77, 0xff, 0xff, 0xff, 0x77, 0x77, 0x77, 0x8f, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0x77, 0x77, 0x77, 0x7f, 0xff, 0xff, 0xff, 0xff, 0x77, 0x77, 0x77, 0x77, 0xff, 0xff, 0xff, 0xff, 0x87, 0x77, 0x77, 0x77,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x87, 0x77, 0x77, 0x77, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff,\r
+0xff, 0xff, 0x00, 0x07, 0xff, 0xff, 0xff, 0xff, 0x87, 0x77, 0x77, 0x77, 0xff, 0xff, 0xff, 0x87, 0x77, 0x77, 0x7f, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0x77, 0x77, 0x77, 0x7f, 0xff, 0xff, 0xff, 0xff, 0x87, 0x77, 0x77, 0x77, 0x8f, 0xff, 0xff, 0xff,\r
+0x77, 0x77, 0x77, 0x77, 0xff, 0xff, 0xf7, 0x88, 0xff, 0xff, 0xff, 0xff, 0x87, 0x77, 0x77, 0x77, 0xff, 0xff, 0xfa, 0xaa,\r
+0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0x80, 0x00, 0xff, 0xff, 0xff, 0xff, 0x87, 0x77, 0x77, 0x77, 0xff, 0xff, 0xff, 0xf7,\r
+0x77, 0x77, 0x78, 0xff, 0xff, 0xff, 0xff, 0xff, 0x77, 0x77, 0x77, 0x7f, 0xff, 0xff, 0xff, 0xff, 0xf8, 0x77, 0x77, 0x77,\r
+0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x78, 0xff, 0xff, 0x87, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x78,\r
+0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0xf7, 0x00, 0x88, 0x88, 0x88, 0xff, 0x87, 0x77, 0x77, 0x77,\r
+0xff, 0xff, 0xff, 0xf8, 0x77, 0x77, 0x77, 0xff, 0xff, 0xff, 0xff, 0xff, 0x77, 0x77, 0x77, 0x7f, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0x87, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x8f, 0xff, 0xff, 0x87, 0x77, 0x77, 0x77, 0x77, 0x77,\r
+0x77, 0x77, 0x77, 0x7f, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0x70, 0x00, 0x00, 0x00, 0x00, 0xff,\r
+0x87, 0x77, 0x77, 0x77, 0xff, 0xff, 0xff, 0xf8, 0x77, 0x77, 0x77, 0x8f, 0xff, 0xff, 0xff, 0xff, 0x77, 0x77, 0x77, 0x7f,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xf8, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x78, 0xff, 0xff, 0xff, 0x87, 0x77,\r
+0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0xff, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0x70, 0x00,\r
+0x00, 0x00, 0x00, 0xff, 0x87, 0x77, 0x77, 0x77, 0xff, 0xff, 0xff, 0xff, 0x77, 0x77, 0x77, 0x7f, 0xff, 0xff, 0xff, 0xff,\r
+0x77, 0x77, 0x77, 0x7f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x87, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x8f, 0xff,\r
+0xff, 0xff, 0x87, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x8f, 0xff, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff,\r
+0xff, 0xff, 0x70, 0x00, 0x00, 0x00, 0x07, 0xff, 0x88, 0x88, 0x88, 0x88, 0xff, 0xff, 0xff, 0xff, 0x88, 0x88, 0x88, 0x88,\r
+0xff, 0xff, 0xff, 0xff, 0x88, 0x88, 0x88, 0x8f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xf8, 0x87, 0x77, 0x77, 0x77,\r
+0x88, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x88, 0x77, 0x77, 0x77, 0x77, 0x88, 0x8f, 0xff, 0xff, 0xff, 0xff, 0xfa, 0xaa,\r
+0xaa, 0xaf, 0xff, 0xff, 0x00, 0x0f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0x00, 0x0f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0x00, 0x0f, 0x70, 0x08, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0x00, 0x07, 0x70, 0x07,\r
+0x88, 0x88, 0x88, 0xff, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88,\r
+0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88,\r
+0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xfa, 0xaa,\r
+0xaa, 0xaf, 0xff, 0xff, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0xf7, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x70, 0x00, 0x00, 0x00,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0x70, 0x08, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0x70, 0x08,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfa, 0xaa,\r
+0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaa, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0x0a, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xa0, 0x00, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0x00,\r
+0x00 };\r
+\r
+#define bmpBITMAP_HEIGHT       50\r
+#define bmpBITMAP_WIDTH                128\r
+\r
+#endif\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/lcd_message.h b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/lcd_message.h
new file mode 100644 (file)
index 0000000..ced7a1d
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/lcd_message.h
@@ -0,0 +1,9 @@
+#ifndef LCD_MESSAGE_H\r
+#define LCD_MESSAGE_H\r
+\r
+typedef struct\r
+{\r
+       char *pcMessage;\r
+} xOLEDMessage;\r
+\r
+#endif /* LCD_MESSAGE_H */\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/main.c b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/main.c
new file mode 100644 (file)
index 0000000..8830354
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/main.c
@@ -0,0 +1,432 @@
+/*\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
+\r
+       This file is part of the FreeRTOS.org distribution.\r
+\r
+       FreeRTOS.org is free software; you can redistribute it and/or modify\r
+       it under the terms of the GNU General Public License as published by\r
+       the Free Software Foundation; either version 2 of the License, or\r
+       (at your option) any later version.\r
+\r
+       FreeRTOS.org is distributed in the hope that it will be useful,\r
+       but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+       MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
+       GNU General Public License for more details.\r
+\r
+       You should have received a copy of the GNU General Public License\r
+       along with FreeRTOS.org; if not, write to the Free Software\r
+       Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
+\r
+       A special exception to the GPL can be applied should you wish to distribute\r
+       a combined work that includes FreeRTOS.org, without being obliged to provide\r
+       the source code for any proprietary components.  See the licensing section\r
+       of http://www.FreeRTOS.org for full details of how and when the exception\r
+       can be applied.\r
+\r
+       ***************************************************************************\r
+       See http://www.FreeRTOS.org for documentation, latest information, license\r
+       and contact details.  Please ensure to read the configuration and relevant\r
+       port sections of the online documentation.\r
+       ***************************************************************************\r
+*/\r
+\r
+\r
+/*\r
+ * Creates all the demo application tasks, then starts the scheduler.  The WEB\r
+ * documentation provides more details of the standard demo application tasks.\r
+ * In addition to the standard demo tasks, the following tasks and tests are\r
+ * defined and/or created within this file:\r
+ *\r
+ * "Fast Interrupt Test" - A high frequency periodic interrupt is generated\r
+ * using a free running timer to demonstrate the use of the\r
+ * configKERNEL_INTERRUPT_PRIORITY configuration constant.  The interrupt\r
+ * service routine measures the number of processor clocks that occur between\r
+ * each interrupt - and in so doing measures the jitter in the interrupt timing.\r
+ * The maximum measured jitter time is latched in the ulMaxJitter variable, and\r
+ * displayed on the OLED display by the 'OLED' task as described below.  The\r
+ * fast interrupt is configured and handled in the timertest.c source file.\r
+ *\r
+ * "OLED" task - the OLED task is a 'gatekeeper' task.  It is the only task that\r
+ * is permitted to access the display directly.  Other tasks wishing to write a\r
+ * message to the OLED send the message on a queue to the OLED task instead of\r
+ * accessing the OLED themselves.  The OLED task just blocks on the queue waiting\r
+ * for messages - waking and displaying the messages as they arrive.\r
+ *\r
+ * "Check" hook -  This only executes every five seconds from the tick hook.\r
+ * Its main function is to check that all the standard demo tasks are still \r
+ * operational.  Should any unexpected behaviour within a demo task be discovered \r
+ * the tick hook will write an error to the OLED (via the OLED task).  If all the \r
+ * demo tasks are executing with their expected behaviour then the check task \r
+ * writes PASS to the OLED (again via the OLED task), as described above.\r
+ *\r
+ * "uIP" task -  This is the task that handles the uIP stack.  All TCP/IP\r
+ * processing is performed in this task.\r
+ */\r
+\r
+\r
+\r
+/* Standard includes. */\r
+#include <stdio.h>\r
+\r
+/* Scheduler includes. */\r
+#include "FreeRTOS.h"\r
+#include "Task.h"\r
+#include "queue.h"\r
+#include "semphr.h"\r
+\r
+/* Demo app includes. */\r
+#include "BlockQ.h"\r
+#include "death.h"\r
+#include "integer.h"\r
+#include "blocktim.h"\r
+#include "flash.h"\r
+#include "partest.h"\r
+#include "semtest.h"\r
+#include "pollq.h"\r
+#include "lcd_message.h"\r
+#include "bitmap.h"\r
+#include "GenQTest.h"\r
+#include "QPeek.h"\r
+\r
+/* Hardware library includes. */\r
+#include "hw_memmap.h"\r
+#include "hw_types.h"\r
+#include "hw_sysctl.h"\r
+#include "sysctl.h"\r
+#include "gpio.h"\r
+#include "rit128x96x4.h"\r
+#include "osram128x64x4.h"\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* The time between cycles of the 'check' functionality (defined within the\r
+tick hook. */\r
+#define mainCHECK_DELAY                                                ( ( portTickType ) 5000 / portTICK_RATE_MS )\r
+\r
+/* Size of the stack allocated to the uIP task. */\r
+#define mainBASIC_WEB_STACK_SIZE            ( configMINIMAL_STACK_SIZE * 3 )\r
+\r
+/* The OLED task uses the sprintf function so requires a little more stack too. */\r
+#define mainOLED_TASK_STACK_SIZE                       ( configMINIMAL_STACK_SIZE + 50 )\r
+\r
+/* Task priorities. */\r
+#define mainQUEUE_POLL_PRIORITY                                ( tskIDLE_PRIORITY + 2 )\r
+#define mainCHECK_TASK_PRIORITY                                ( tskIDLE_PRIORITY + 3 )\r
+#define mainSEM_TEST_PRIORITY                          ( tskIDLE_PRIORITY + 1 )\r
+#define mainBLOCK_Q_PRIORITY                           ( tskIDLE_PRIORITY + 2 )\r
+#define mainCREATOR_TASK_PRIORITY           ( tskIDLE_PRIORITY + 3 )\r
+#define mainINTEGER_TASK_PRIORITY           ( tskIDLE_PRIORITY )\r
+#define mainGEN_QUEUE_TASK_PRIORITY                    ( tskIDLE_PRIORITY )\r
+\r
+/* The maximum number of message that can be waiting for display at any one\r
+time. */\r
+#define mainOLED_QUEUE_SIZE                                    ( 3 )\r
+\r
+/* Dimensions the buffer into which the jitter time is written. */\r
+#define mainMAX_MSG_LEN                                                25\r
+\r
+/* The period of the system clock in nano seconds.  This is used to calculate\r
+the jitter time in nano seconds. */\r
+#define mainNS_PER_CLOCK                                       ( ( unsigned portLONG ) ( ( 1.0 / ( double ) configCPU_CLOCK_HZ ) * 1000000000.0 ) )\r
+\r
+/* Constants used when writing strings to the display. */\r
+#define mainCHARACTER_HEIGHT                           ( 9 )\r
+#define mainMAX_ROWS_96                                                ( mainCHARACTER_HEIGHT * 10 )\r
+#define mainMAX_ROWS_64                                                ( mainCHARACTER_HEIGHT * 7 )\r
+#define mainFULL_SCALE                                         ( 15 )\r
+#define ulSSI_FREQUENCY                                                ( 3500000UL )\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * The task that handles the uIP stack.  All TCP/IP processing is performed in\r
+ * this task.\r
+ */\r
+extern void vuIP_Task( void *pvParameters );\r
+\r
+/*\r
+ * The display is written two by more than one task so is controlled by a\r
+ * 'gatekeeper' task.  This is the only task that is actually permitted to\r
+ * access the display directly.  Other tasks wanting to display a message send\r
+ * the message to the gatekeeper.\r
+ */\r
+static void vOLEDTask( void *pvParameters );\r
+\r
+/*\r
+ * Configure the hardware for the demo.\r
+ */\r
+static void prvSetupHardware( void );\r
+\r
+/*\r
+ * Configures the high frequency timers - those used to measure the timing\r
+ * jitter while the real time kernel is executing.\r
+ */\r
+extern void vSetupTimer( void );\r
+\r
+/*\r
+ * The idle hook is used to run a test of the scheduler context switch\r
+ * mechanism.\r
+ */\r
+void vApplicationIdleHook( void ) __attribute__((naked));\r
+/*-----------------------------------------------------------*/\r
+\r
+/* The queue used to send messages to the OLED task. */\r
+xQueueHandle xOLEDQueue;\r
+\r
+/* The welcome text. */\r
+const portCHAR * const pcWelcomeMessage = "   www.FreeRTOS.org";\r
+\r
+/* Variables used to detect the test in the idle hook failing. */\r
+unsigned portLONG ulIdleError = pdFALSE;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+int main( void )\r
+{\r
+       prvSetupHardware();\r
+\r
+       /* Create the queue used by the OLED task.  Messages for display on the OLED\r
+       are received via this queue. */\r
+       xOLEDQueue = xQueueCreate( mainOLED_QUEUE_SIZE, sizeof( xOLEDMessage ) );\r
+\r
+       /* Create the uIP task if running on a processor that includes a MAC and \r
+       PHY. */\r
+       if( SysCtlPeripheralPresent( SYSCTL_PERIPH_ETH ) )\r
+       {\r
+               xTaskCreate( vuIP_Task, ( signed portCHAR * ) "uIP", mainBASIC_WEB_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY - 1, NULL );\r
+       }\r
+\r
+       /* Start the standard demo tasks. */\r
+       vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
+    vCreateBlockTimeTasks();\r
+    vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
+    vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );\r
+    vStartIntegerMathTasks( mainINTEGER_TASK_PRIORITY );\r
+    vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );\r
+    vStartQueuePeekTasks();\r
+\r
+       /* Start the tasks defined within this file/specific to this demo. */\r
+       xTaskCreate( vOLEDTask, ( signed portCHAR * ) "OLED", mainOLED_TASK_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );\r
+\r
+       /* The suicide tasks must be created last as they need to know how many\r
+       tasks were running prior to their creation in order to ascertain whether\r
+       or not the correct/expected number of tasks are running at any given time. */\r
+    vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY );\r
+\r
+       /* Configure the high frequency interrupt used to measure the interrupt\r
+       jitter time. */\r
+       vSetupTimer();\r
+       \r
+       /* Start the scheduler. */\r
+       vTaskStartScheduler();\r
+\r
+    /* Will only get here if there was insufficient memory to create the idle\r
+    task. */\r
+       return 0;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void prvSetupHardware( void )\r
+{\r
+    /* If running on Rev A2 silicon, turn the LDO voltage up to 2.75V.  This is\r
+    a workaround to allow the PLL to operate reliably. */\r
+    if( DEVICE_IS_REVA2 )\r
+    {\r
+        SysCtlLDOSet( SYSCTL_LDO_2_75V );\r
+    }\r
+       \r
+       /* Set the clocking to run from the PLL at 50 MHz */\r
+       SysCtlClockSet( SYSCTL_SYSDIV_4 | SYSCTL_USE_PLL | SYSCTL_OSC_MAIN | SYSCTL_XTAL_8MHZ );\r
+       \r
+       /*      Enable Port F for Ethernet LEDs\r
+               LED0        Bit 3   Output\r
+               LED1        Bit 2   Output */\r
+       SysCtlPeripheralEnable( SYSCTL_PERIPH_GPIOF );\r
+       GPIODirModeSet( GPIO_PORTF_BASE, (GPIO_PIN_2 | GPIO_PIN_3), GPIO_DIR_MODE_HW );\r
+       GPIOPadConfigSet( GPIO_PORTF_BASE, (GPIO_PIN_2 | GPIO_PIN_3 ), GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD );  \r
+       \r
+       vParTestInitialise();\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vApplicationTickHook( void )\r
+{\r
+static xOLEDMessage xMessage = { "PASS" };\r
+static unsigned portLONG ulTicksSinceLastDisplay = 0;\r
+\r
+       /* Called from every tick interrupt.  Have enough ticks passed to make it\r
+       time to perform our health status check again? */\r
+       ulTicksSinceLastDisplay++;\r
+       if( ulTicksSinceLastDisplay >= mainCHECK_DELAY )\r
+       {\r
+               ulTicksSinceLastDisplay = 0;\r
+               \r
+               /* Has an error been found in any task? */\r
+               if( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
+               {\r
+                       xMessage.pcMessage = "ERROR IN GEN Q";\r
+               }\r
+               else if( xAreQueuePeekTasksStillRunning() != pdTRUE )\r
+               {\r
+                       xMessage.pcMessage = "ERROR IN PEEK Q";\r
+               }\r
+               else if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
+               {\r
+                       xMessage.pcMessage = "ERROR IN BLOCK Q";\r
+               }\r
+               else if( xAreBlockTimeTestTasksStillRunning() != pdTRUE )\r
+               {\r
+                       xMessage.pcMessage = "ERROR IN BLOCK TIME";\r
+               }\r
+           else if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
+           {\r
+               xMessage.pcMessage = "ERROR IN SEMAPHORE";\r
+           }\r
+           else if( xArePollingQueuesStillRunning() != pdTRUE )\r
+           {\r
+               xMessage.pcMessage = "ERROR IN POLL Q";\r
+           }\r
+           else if( xIsCreateTaskStillRunning() != pdTRUE )\r
+           {\r
+               xMessage.pcMessage = "ERROR IN CREATE";\r
+           }\r
+           else if( xAreIntegerMathsTaskStillRunning() != pdTRUE )\r
+           {\r
+               xMessage.pcMessage = "ERROR IN MATH";\r
+           }\r
+               else if( ulIdleError != pdFALSE )\r
+               {\r
+                       xMessage.pcMessage = "ERROR IN HOOK";\r
+               }\r
+\r
+               /* Send the message to the OLED gatekeeper for display. */\r
+               xQueueSendFromISR( xOLEDQueue, &xMessage, pdFALSE );\r
+       }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vOLEDTask( void *pvParameters )\r
+{\r
+xOLEDMessage xMessage;\r
+unsigned portLONG ulY, ulMaxY;\r
+static portCHAR cMessage[ mainMAX_MSG_LEN ];\r
+extern unsigned portLONG ulMaxJitter;\r
+\r
+/* Functions to access the OLED.  The one used depends on the dev kit\r
+being used. */\r
+void ( *vOLEDInit )( unsigned portLONG );\r
+void ( *vOLEDStringDraw )( const portCHAR *, unsigned portLONG, unsigned portLONG, unsigned portCHAR );\r
+void ( *vOLEDImageDraw )( const unsigned portCHAR *, unsigned portLONG, unsigned portLONG, unsigned portLONG, unsigned portLONG );\r
+void ( *vOLEDClear )( void );\r
+\r
+       /* Map the OLED access functions to the driver functions that are appropriate\r
+       for the evaluation kit being used. */   \r
+       switch( HWREG( SYSCTL_DID1 ) & SYSCTL_DID1_PRTNO_MASK )\r
+       {\r
+               case SYSCTL_DID1_PRTNO_6965     :        \r
+               case SYSCTL_DID1_PRTNO_2965     :       vOLEDInit = OSRAM128x64x4Init;\r
+                                                                               vOLEDStringDraw = OSRAM128x64x4StringDraw;\r
+                                                                               vOLEDImageDraw = OSRAM128x64x4ImageDraw;\r
+                                                                               vOLEDClear = OSRAM128x64x4Clear;\r
+                                                                               ulMaxY = mainMAX_ROWS_64;\r
+                                                                               break;\r
+                                                                               \r
+               default                                         :       vOLEDInit = RIT128x96x4Init;\r
+                                                                               vOLEDStringDraw = RIT128x96x4StringDraw;\r
+                                                                               vOLEDImageDraw = RIT128x96x4ImageDraw;\r
+                                                                               vOLEDClear = RIT128x96x4Clear;\r
+                                                                               ulMaxY = mainMAX_ROWS_96;                                                                               \r
+                                                                               break;\r
+       }\r
+\r
+       ulY = ulMaxY;\r
+       \r
+       /* Initialise the OLED and display a startup message. */\r
+       vOLEDInit( ulSSI_FREQUENCY );   \r
+       vOLEDStringDraw( " POWERED BY FreeRTOS", 0, 0, mainFULL_SCALE );\r
+       vOLEDImageDraw( pucImage, 0, mainCHARACTER_HEIGHT + 1, bmpBITMAP_WIDTH, bmpBITMAP_HEIGHT );\r
+       \r
+       for( ;; )\r
+       {\r
+               /* Wait for a message to arrive that requires displaying. */\r
+               xQueueReceive( xOLEDQueue, &xMessage, portMAX_DELAY );\r
+       \r
+               /* Write the message on the next available row. */\r
+               ulY += mainCHARACTER_HEIGHT;\r
+               if( ulY >= ulMaxY )\r
+               {\r
+                       ulY = mainCHARACTER_HEIGHT;\r
+                       vOLEDClear();\r
+                       vOLEDStringDraw( pcWelcomeMessage, 0, 0, mainFULL_SCALE );                      \r
+               }\r
+\r
+               /* Display the message along with the maximum jitter time from the \r
+               high priority time test. */\r
+               sprintf( cMessage, "%s [%uns]", xMessage.pcMessage, ulMaxJitter * mainNS_PER_CLOCK );\r
+               vOLEDStringDraw( cMessage, 0, ulY, mainFULL_SCALE );\r
+       }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vApplicationIdleHook( void )\r
+{\r
+       /* This is just a sanity check function to test the port is\r
+       functioning correctly.  It can be removed from real applications.\r
+       \r
+       Fill the general purpose registers with known values. */\r
+       __asm volatile( "    mov r11, #10               \n"\r
+                                       "    add r0, r11, #1    \n"\r
+                                       "    add r1, r11, #2    \n"\r
+                           "    add r2, r11, #3        \n"\r
+                           "    add r3, r11, #4        \n"\r
+                           "    add r4, r11, #5        \n"\r
+                           "    add r5, r11, #6        \n"\r
+                           "    add r6, r11, #7        \n"\r
+                           "    add r7, r11, #8        \n"\r
+                           "    add r8, r11, #9        \n"\r
+                           "    add r9, r11, #10       \n"\r
+                           "    add r10, r11, #11      \n"\r
+                           "    add r12, r11, #12" );\r
+       \r
+       /* Check the values are as expected.  A context switch might\r
+       have occurred since setting the register values. */\r
+       __asm volatile( "    cmp r11, #10                       \n"\r
+                           "    bne set_error_flag             \n"\r
+                           "    cmp r0, #11                    \n"\r
+                           "    bne set_error_flag             \n"\r
+                           "    cmp r1, #12                    \n"\r
+                           "    bne set_error_flag             \n"\r
+                           "    cmp r2, #13                    \n"\r
+                           "    bne set_error_flag             \n"\r
+                           "    cmp r3, #14                    \n"\r
+                           "    bne set_error_flag             \n"\r
+                           "    cmp r4, #15                    \n"\r
+                           "    bne set_error_flag             \n"\r
+                           "    cmp r5, #16                    \n"\r
+                           "    bne set_error_flag             \n"\r
+                           "    cmp r6, #17                    \n"\r
+                           "    bne set_error_flag             \n"\r
+                           "    cmp r7, #18                    \n"\r
+                           "    bne set_error_flag             \n"\r
+                           "    cmp r8, #19                    \n"\r
+                           "    bne set_error_flag             \n"\r
+                           "    cmp r9, #20                    \n"\r
+                           "    bne set_error_flag             \n"\r
+                           "    cmp r10, #21                   \n"\r
+                           "    bne set_error_flag             \n"\r
+                           "    cmp r12, #22                   \n"\r
+                           "    bne set_error_flag             \n"\r
+                                       "        bx r14                                 \n"\r
+                                       "                                                       \n"     /* If an error is detected in the */                                    \r
+                                       "set_error_flag:                        \n" /* value of a register then the error */\r
+                                       "       ldr r1, ulIdleErrorConst\n" /* variable will be set to true.  This */\r
+                                       "       mov r0, #1                              \n" /* will cause       an error message to be */\r
+                                       "       str r0, [r1]                    \n" /* written to the OLED. */\r
+                                       "       bx r14                                  \n"\r
+                                       "                                                       \n"\r
+                                       "       .align 2                                \n"                     \r
+                                       "ulIdleErrorConst: .word ulIdleError" );\r
+}\r
+\r
+\r
+\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/osram128x64x4.c b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/osram128x64x4.c
new file mode 100644 (file)
index 0000000..3353a82
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/osram128x64x4.c
@@ -0,0 +1,933 @@
+//*****************************************************************************\r
+//\r
+// osram128x64x4.c - Driver for the OSRAM 128x64x4 graphical OLED display.\r
+//\r
+// Copyright (c) 2006-2007 Luminary Micro, Inc.  All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1408 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+//*****************************************************************************\r
+//\r
+//! \addtogroup ek_lm3sx965_api\r
+//! @{\r
+//\r
+//*****************************************************************************\r
+\r
+#include "hw_ssi.h"\r
+#include "hw_memmap.h"\r
+#include "hw_sysctl.h"\r
+#include "hw_types.h"\r
+#include "debug.h"\r
+#include "gpio.h"\r
+#include "ssi.h"\r
+#include "sysctl.h"\r
+#include "osram128x64x4.h"\r
+\r
+//*****************************************************************************\r
+//\r
+// Flag to indicate if SSI port is enabled for OSRAM usage.\r
+//\r
+//*****************************************************************************\r
+static volatile tBoolean g_bSSIEnabled = false;\r
+\r
+//*****************************************************************************\r
+//\r
+// Define the OSRAM 128x64x4 Remap Setting(s).  This will be used in\r
+// several places in the code to switch between vertical and horizontal\r
+// address incrementing.\r
+//\r
+// The Remap Command (0xA0) takes one 8-bit parameter.  The parameter is\r
+// defined as follows.\r
+//\r
+// Bit 7: Reserved\r
+// Bit 6: Disable(0)/Enable(1) COM Split Odd Even\r
+//        When enabled, the COM signals are split Odd on one side, even on\r
+//        the other.  Otherwise, they are split 0-39 on one side, 40-79 on\r
+//        the other.\r
+// Bit 5: Reserved\r
+// Bit 4: Disable(0)/Enable(1) COM Remap\r
+//        When Enabled, ROW 0-79 map to COM 79-0 (i.e. reverse row order)\r
+// Bit 3: Reserved\r
+// Bit 2: Horizontal(0)/Vertical(1) Address Increment\r
+//        When set, data RAM address will increment along the column rather\r
+//        than along the row.\r
+// Bit 1: Disable(0)/Enable(1) Nibble Remap\r
+//        When enabled, the upper and lower nibbles in the DATA bus for access\r
+//        to the data RAM are swapped.\r
+// Bit 0: Disable(0)/Enable(1) Column Address Remap\r
+//        When enabled, DATA RAM columns 0-63 are remapped to Segment Columns\r
+//        127-0.\r
+//\r
+//*****************************************************************************\r
+#define OSRAM_INIT_REMAP    0x52\r
+#define OSRAM_INIT_OFFSET   0x4C\r
+static const unsigned char g_pucOSRAM128x64x4VerticalInc[]   = { 0xA0, 0x56 };\r
+static const unsigned char g_pucOSRAM128x64x4HorizontalInc[] = { 0xA0, 0x52 };\r
+\r
+//*****************************************************************************\r
+//\r
+// A 5x7 font (in a 6x8 cell, where the sixth column is omitted from this\r
+// table) for displaying text on the OLED display.  The data is organized as\r
+// bytes from the left column to the right column, with each byte containing\r
+// the top row in the LSB and the bottom row in the MSB.\r
+//\r
+// Note:  This is the same font data that is used in the EK-LM3S811\r
+// osram96x16x1 driver.  The single bit-per-pixel is expaned in the StringDraw\r
+// function to the appropriate four bit-per-pixel gray scale format.\r
+//\r
+//*****************************************************************************\r
+static const unsigned char g_pucFont[96][5] =\r
+{\r
+    { 0x00, 0x00, 0x00, 0x00, 0x00 }, // " "\r
+    { 0x00, 0x00, 0x4f, 0x00, 0x00 }, // !\r
+    { 0x00, 0x07, 0x00, 0x07, 0x00 }, // "\r
+    { 0x14, 0x7f, 0x14, 0x7f, 0x14 }, // #\r
+    { 0x24, 0x2a, 0x7f, 0x2a, 0x12 }, // $\r
+    { 0x23, 0x13, 0x08, 0x64, 0x62 }, // %\r
+    { 0x36, 0x49, 0x55, 0x22, 0x50 }, // &\r
+    { 0x00, 0x05, 0x03, 0x00, 0x00 }, // '\r
+    { 0x00, 0x1c, 0x22, 0x41, 0x00 }, // (\r
+    { 0x00, 0x41, 0x22, 0x1c, 0x00 }, // )\r
+    { 0x14, 0x08, 0x3e, 0x08, 0x14 }, // *\r
+    { 0x08, 0x08, 0x3e, 0x08, 0x08 }, // +\r
+    { 0x00, 0x50, 0x30, 0x00, 0x00 }, // ,\r
+    { 0x08, 0x08, 0x08, 0x08, 0x08 }, // -\r
+    { 0x00, 0x60, 0x60, 0x00, 0x00 }, // .\r
+    { 0x20, 0x10, 0x08, 0x04, 0x02 }, // /\r
+    { 0x3e, 0x51, 0x49, 0x45, 0x3e }, // 0\r
+    { 0x00, 0x42, 0x7f, 0x40, 0x00 }, // 1\r
+    { 0x42, 0x61, 0x51, 0x49, 0x46 }, // 2\r
+    { 0x21, 0x41, 0x45, 0x4b, 0x31 }, // 3\r
+    { 0x18, 0x14, 0x12, 0x7f, 0x10 }, // 4\r
+    { 0x27, 0x45, 0x45, 0x45, 0x39 }, // 5\r
+    { 0x3c, 0x4a, 0x49, 0x49, 0x30 }, // 6\r
+    { 0x01, 0x71, 0x09, 0x05, 0x03 }, // 7\r
+    { 0x36, 0x49, 0x49, 0x49, 0x36 }, // 8\r
+    { 0x06, 0x49, 0x49, 0x29, 0x1e }, // 9\r
+    { 0x00, 0x36, 0x36, 0x00, 0x00 }, // :\r
+    { 0x00, 0x56, 0x36, 0x00, 0x00 }, // ;\r
+    { 0x08, 0x14, 0x22, 0x41, 0x00 }, // <\r
+    { 0x14, 0x14, 0x14, 0x14, 0x14 }, // =\r
+    { 0x00, 0x41, 0x22, 0x14, 0x08 }, // >\r
+    { 0x02, 0x01, 0x51, 0x09, 0x06 }, // ?\r
+    { 0x32, 0x49, 0x79, 0x41, 0x3e }, // @\r
+    { 0x7e, 0x11, 0x11, 0x11, 0x7e }, // A\r
+    { 0x7f, 0x49, 0x49, 0x49, 0x36 }, // B\r
+    { 0x3e, 0x41, 0x41, 0x41, 0x22 }, // C\r
+    { 0x7f, 0x41, 0x41, 0x22, 0x1c }, // D\r
+    { 0x7f, 0x49, 0x49, 0x49, 0x41 }, // E\r
+    { 0x7f, 0x09, 0x09, 0x09, 0x01 }, // F\r
+    { 0x3e, 0x41, 0x49, 0x49, 0x7a }, // G\r
+    { 0x7f, 0x08, 0x08, 0x08, 0x7f }, // H\r
+    { 0x00, 0x41, 0x7f, 0x41, 0x00 }, // I\r
+    { 0x20, 0x40, 0x41, 0x3f, 0x01 }, // J\r
+    { 0x7f, 0x08, 0x14, 0x22, 0x41 }, // K\r
+    { 0x7f, 0x40, 0x40, 0x40, 0x40 }, // L\r
+    { 0x7f, 0x02, 0x0c, 0x02, 0x7f }, // M\r
+    { 0x7f, 0x04, 0x08, 0x10, 0x7f }, // N\r
+    { 0x3e, 0x41, 0x41, 0x41, 0x3e }, // O\r
+    { 0x7f, 0x09, 0x09, 0x09, 0x06 }, // P\r
+    { 0x3e, 0x41, 0x51, 0x21, 0x5e }, // Q\r
+    { 0x7f, 0x09, 0x19, 0x29, 0x46 }, // R\r
+    { 0x46, 0x49, 0x49, 0x49, 0x31 }, // S\r
+    { 0x01, 0x01, 0x7f, 0x01, 0x01 }, // T\r
+    { 0x3f, 0x40, 0x40, 0x40, 0x3f }, // U\r
+    { 0x1f, 0x20, 0x40, 0x20, 0x1f }, // V\r
+    { 0x3f, 0x40, 0x38, 0x40, 0x3f }, // W\r
+    { 0x63, 0x14, 0x08, 0x14, 0x63 }, // X\r
+    { 0x07, 0x08, 0x70, 0x08, 0x07 }, // Y\r
+    { 0x61, 0x51, 0x49, 0x45, 0x43 }, // Z\r
+    { 0x00, 0x7f, 0x41, 0x41, 0x00 }, // [\r
+    { 0x02, 0x04, 0x08, 0x10, 0x20 }, // "\"\r
+    { 0x00, 0x41, 0x41, 0x7f, 0x00 }, // ]\r
+    { 0x04, 0x02, 0x01, 0x02, 0x04 }, // ^\r
+    { 0x40, 0x40, 0x40, 0x40, 0x40 }, // _\r
+    { 0x00, 0x01, 0x02, 0x04, 0x00 }, // `\r
+    { 0x20, 0x54, 0x54, 0x54, 0x78 }, // a\r
+    { 0x7f, 0x48, 0x44, 0x44, 0x38 }, // b\r
+    { 0x38, 0x44, 0x44, 0x44, 0x20 }, // c\r
+    { 0x38, 0x44, 0x44, 0x48, 0x7f }, // d\r
+    { 0x38, 0x54, 0x54, 0x54, 0x18 }, // e\r
+    { 0x08, 0x7e, 0x09, 0x01, 0x02 }, // f\r
+    { 0x0c, 0x52, 0x52, 0x52, 0x3e }, // g\r
+    { 0x7f, 0x08, 0x04, 0x04, 0x78 }, // h\r
+    { 0x00, 0x44, 0x7d, 0x40, 0x00 }, // i\r
+    { 0x20, 0x40, 0x44, 0x3d, 0x00 }, // j\r
+    { 0x7f, 0x10, 0x28, 0x44, 0x00 }, // k\r
+    { 0x00, 0x41, 0x7f, 0x40, 0x00 }, // l\r
+    { 0x7c, 0x04, 0x18, 0x04, 0x78 }, // m\r
+    { 0x7c, 0x08, 0x04, 0x04, 0x78 }, // n\r
+    { 0x38, 0x44, 0x44, 0x44, 0x38 }, // o\r
+    { 0x7c, 0x14, 0x14, 0x14, 0x08 }, // p\r
+    { 0x08, 0x14, 0x14, 0x18, 0x7c }, // q\r
+    { 0x7c, 0x08, 0x04, 0x04, 0x08 }, // r\r
+    { 0x48, 0x54, 0x54, 0x54, 0x20 }, // s\r
+    { 0x04, 0x3f, 0x44, 0x40, 0x20 }, // t\r
+    { 0x3c, 0x40, 0x40, 0x20, 0x7c }, // u\r
+    { 0x1c, 0x20, 0x40, 0x20, 0x1c }, // v\r
+    { 0x3c, 0x40, 0x30, 0x40, 0x3c }, // w\r
+    { 0x44, 0x28, 0x10, 0x28, 0x44 }, // x\r
+    { 0x0c, 0x50, 0x50, 0x50, 0x3c }, // y\r
+    { 0x44, 0x64, 0x54, 0x4c, 0x44 }, // z\r
+    { 0x00, 0x08, 0x36, 0x41, 0x00 }, // {\r
+    { 0x00, 0x00, 0x7f, 0x00, 0x00 }, // |\r
+    { 0x00, 0x41, 0x36, 0x08, 0x00 }, // }\r
+    { 0x02, 0x01, 0x02, 0x04, 0x02 }, // ~\r
+    { 0x02, 0x01, 0x02, 0x04, 0x02 }, // ~\r
+};\r
+\r
+//*****************************************************************************\r
+//\r
+// The sequence of commands used to initialize the SSD0303 controller.  Each\r
+// command is described as follows:  there is a byte specifying the number of\r
+// bytes in the command sequence, followed by that many bytes of command data.\r
+// Note:  This initialization sequence is derived from OSRAM App Note AN018.\r
+//\r
+//*****************************************************************************\r
+static const unsigned char g_pucOSRAM128x64x4Init[] =\r
+{\r
+    //\r
+    // Column Address\r
+    //\r
+    4, 0x15, 0, 63, 0xe3,\r
+\r
+    //\r
+    // Row Address\r
+    //\r
+    4, 0x75, 0, 63, 0xe3,\r
+\r
+    //\r
+    // Contrast Control\r
+    //\r
+    3, 0x81, 50, 0xe3,\r
+\r
+    //\r
+    // Half Current Range\r
+    //\r
+    2, 0x85, 0xe3,\r
+\r
+    //\r
+    // Display Re-map\r
+    //\r
+    3, 0xA0, OSRAM_INIT_REMAP, 0xe3,\r
+\r
+    //\r
+    // Display Start Line\r
+    //\r
+    3, 0xA1, 0, 0xe3,\r
+\r
+    //\r
+    // Display Offset\r
+    //\r
+    3, 0xA2, OSRAM_INIT_OFFSET, 0xe3,\r
+\r
+    //\r
+    // Display Mode Normal\r
+    //\r
+    2, 0xA4, 0xe3,\r
+\r
+    //\r
+    // Multiplex Ratio\r
+    //\r
+    3, 0xA8, 63, 0xe3,\r
+\r
+    //\r
+    // Phase Length\r
+    //\r
+    3, 0xB1, 0x22, 0xe3,\r
+\r
+    //\r
+    // Row Period\r
+    //\r
+    3, 0xB2, 70, 0xe3,\r
+\r
+    //\r
+    // Display Clock Divide\r
+    //\r
+    3, 0xB3, 0xF1, 0xe3,\r
+\r
+    //\r
+    // VSL\r
+    //\r
+    3, 0xBF, 0x0D, 0xe3,\r
+\r
+    //\r
+    // VCOMH\r
+    //\r
+    3, 0xBE, 0x02, 0xe3,\r
+\r
+    //\r
+    // VP\r
+    //\r
+    3, 0xBC, 0x10, 0xe3,\r
+\r
+    //\r
+    // Gamma\r
+    //\r
+    10, 0xB8, 0x01, 0x11, 0x22, 0x32, 0x43, 0x54, 0x65, 0x76, 0xe3,\r
+\r
+    //\r
+    // Set DC-DC\r
+    3, 0xAD, 0x03, 0xe3,\r
+\r
+    //\r
+    // Display ON/OFF\r
+    //\r
+    2, 0xAF, 0xe3,\r
+};\r
+\r
+//*****************************************************************************\r
+//\r
+//! \internal\r
+//!\r
+//! Write a sequence of command bytes to the SSD0323 controller.\r
+//!\r
+//! The data is written in a polled fashion; this function will not return\r
+//! until the entire byte sequence has been written to the controller.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+static void\r
+OSRAMWriteCommand(const unsigned char *pucBuffer, unsigned long ulCount)\r
+{\r
+    unsigned long ulTemp;\r
+\r
+    //\r
+    // Return iff SSI port is not enabled for OSRAM.\r
+    //\r
+    if(!g_bSSIEnabled)\r
+    {\r
+        return;\r
+    }\r
+\r
+    //\r
+    // Clear the command/control bit to enable command mode.\r
+    //\r
+    GPIOPinWrite(GPIO_PORTC_BASE, GPIO_PIN_7, 0);\r
+\r
+    //\r
+    // Loop while there are more bytes left to be transferred.\r
+    //\r
+    while(ulCount != 0)\r
+    {\r
+        //\r
+        // Write the next byte to the controller.\r
+        //\r
+        SSIDataPut(SSI0_BASE, *pucBuffer++);\r
+\r
+        //\r
+        // Dummy read to drain the fifo and time the GPIO signal.\r
+        //\r
+        SSIDataGet(SSI0_BASE, &ulTemp);\r
+\r
+        //\r
+        // Decrement the BYTE counter.\r
+        //\r
+        ulCount--;\r
+    }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! \internal\r
+//!\r
+//! Write a sequence of data bytes to the SSD0323 controller.\r
+//!\r
+//! The data is written in a polled fashion; this function will not return\r
+//! until the entire byte sequence has been written to the controller.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+static void\r
+OSRAMWriteData(const unsigned char *pucBuffer, unsigned long ulCount)\r
+{\r
+    unsigned long ulTemp;\r
+\r
+    //\r
+    // Return iff SSI port is not enabled for OSRAM.\r
+    //\r
+    if(!g_bSSIEnabled)\r
+    {\r
+        return;\r
+    }\r
+\r
+    //\r
+    // Set the command/control bit to enable data mode.\r
+    //\r
+    GPIOPinWrite(GPIO_PORTC_BASE, GPIO_PIN_7, GPIO_PIN_7);\r
+\r
+    //\r
+    // Loop while there are more bytes left to be transferred.\r
+    //\r
+    while(ulCount != 0)\r
+    {\r
+        //\r
+        // Write the next byte to the controller.\r
+        //\r
+        SSIDataPut(SSI0_BASE, *pucBuffer++);\r
+\r
+        //\r
+        // Dummy read to drain the fifo and time the GPIO signal.\r
+        //\r
+        SSIDataGet(SSI0_BASE, &ulTemp);\r
+\r
+        //\r
+        // Decrement the BYTE counter.\r
+        //\r
+        ulCount--;\r
+    }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Clears the OLED display.\r
+//!\r
+//! This function will clear the display RAM.  All pixels in the display will\r
+//! be turned off.\r
+//!\r
+//! This function is contained in <tt>osram128x64x4.c</tt>, with\r
+//! <tt>osram128x64x4.h</tt> containing the API definition for use by\r
+//! applications.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+OSRAM128x64x4Clear(void)\r
+{\r
+    static const unsigned char pucCommand1[] = { 0x15, 0, 63 };\r
+    static const unsigned char pucCommand2[] = { 0x75, 0, 79 };\r
+    unsigned long ulRow, ulColumn;\r
+    static unsigned char pucZeroBuffer[8] = { 0, 0, 0, 0, 0, 0, 0, 0};\r
+\r
+    //\r
+    // Set the window to fill the entire display.\r
+    //\r
+    OSRAMWriteCommand(pucCommand1, sizeof(pucCommand1));\r
+    OSRAMWriteCommand(pucCommand2, sizeof(pucCommand2));\r
+    OSRAMWriteCommand(g_pucOSRAM128x64x4VerticalInc,\r
+                      sizeof(g_pucOSRAM128x64x4VerticalInc));\r
+\r
+    //\r
+    // In vertical address increment mode, loop through each column, filling\r
+    // each row with 0.\r
+    //\r
+    for(ulColumn = 0; ulColumn < (128/2); ulColumn++)\r
+    {\r
+        //\r
+        // 8 rows (bytes) per row of text.\r
+        //\r
+        for(ulRow = 0; ulRow < 80; ulRow += 8)\r
+        {\r
+            OSRAMWriteData(pucZeroBuffer, sizeof(pucZeroBuffer));\r
+        }\r
+    }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Displays a string on the OLED display.\r
+//!\r
+//! \param pcStr is a pointer to the string to display.\r
+//! \param ulX is the horizontal position to display the string, specified in\r
+//! columns from the left edge of the display.\r
+//! \param ulY is the vertical position to display the string, specified in\r
+//! rows from the top edge of the display.\r
+//! \param ucLevel is the 4-bit grey scale value to be used for displayed text.\r
+//!\r
+//! This function will draw a string on the display.  Only the ASCII characters\r
+//! between 32 (space) and 126 (tilde) are supported; other characters will\r
+//! result in random data being draw on the display (based on whatever appears\r
+//! before/after the font in memory).  The font is mono-spaced, so characters\r
+//! such as "i" and "l" have more white space around them than characters such\r
+//! as "m" or "w".\r
+//!\r
+//! If the drawing of the string reaches the right edge of the display, no more\r
+//! characters will be drawn.  Therefore, special care is not required to avoid\r
+//! supplying a string that is "too long" to display.\r
+//!\r
+//! This function is contained in <tt>osram128x64x4.c</tt>, with\r
+//! <tt>osram128x64x4.h</tt> containing the API definition for use by\r
+//! applications.\r
+//!\r
+//! \note Because the OLED display packs 2 pixels of data in a single byte, the\r
+//! parameter \e ulX must be an even column number (e.g. 0, 2, 4, etc).\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+OSRAM128x64x4StringDraw(const char *pcStr, unsigned long ulX,\r
+                        unsigned long ulY, unsigned char ucLevel)\r
+{\r
+    static unsigned char pucBuffer[8];\r
+    unsigned long ulIdx1, ulIdx2;\r
+    unsigned char ucTemp;\r
+\r
+    //\r
+    // Check the arguments.\r
+    //\r
+    ASSERT(ulX < 128);\r
+    ASSERT((ulX & 1) == 0);\r
+    ASSERT(ulY < 64);\r
+    ASSERT(ucLevel < 16);\r
+\r
+    //\r
+    // Setup a window starting at the specified column and row, ending\r
+    // at the right edge of the display and 8 rows down (single character row).\r
+    //\r
+    pucBuffer[0] = 0x15;\r
+    pucBuffer[1] = ulX / 2;\r
+    pucBuffer[2] = 63;\r
+    OSRAMWriteCommand(pucBuffer, 3);\r
+    pucBuffer[0] = 0x75;\r
+    pucBuffer[1] = ulY;\r
+    pucBuffer[2] = ulY + 7;\r
+    OSRAMWriteCommand(pucBuffer, 3);\r
+    OSRAMWriteCommand(g_pucOSRAM128x64x4VerticalInc,\r
+                      sizeof(g_pucOSRAM128x64x4VerticalInc));\r
+\r
+    //\r
+    // Loop while there are more characters in the string.\r
+    //\r
+    while(*pcStr != 0)\r
+    {\r
+        //\r
+        // Get a working copy of the current character and convert to an\r
+        // index into the character bit-map array.\r
+        //\r
+        ucTemp = *pcStr;\r
+        ucTemp &= 0x7F;\r
+        if(ucTemp < ' ')\r
+        {\r
+            ucTemp = ' ';\r
+        }\r
+        else\r
+        {\r
+            ucTemp -= ' ';\r
+        }\r
+\r
+        //\r
+        // Build and display the character buffer.\r
+        //\r
+        for(ulIdx1 = 0; ulIdx1 < 3; ulIdx1++)\r
+        {\r
+            //\r
+            // Convert two columns of 1-bit font data into a single data\r
+            // byte column of 4-bit font data.\r
+            //\r
+            for(ulIdx2 = 0; ulIdx2 < 8; ulIdx2++)\r
+            {\r
+                pucBuffer[ulIdx2] = 0;\r
+                if(g_pucFont[ucTemp][ulIdx1*2] & (1 << ulIdx2))\r
+                {\r
+                    pucBuffer[ulIdx2] = ((ucLevel << 4) & 0xf0);\r
+                }\r
+                if((ulIdx1 < 2) &&\r
+                    (g_pucFont[ucTemp][ulIdx1*2+1] & (1 << ulIdx2)))\r
+                {\r
+                    pucBuffer[ulIdx2] |= ((ucLevel << 0) & 0x0f);\r
+                }\r
+            }\r
+\r
+            //\r
+            // If there is room, dump the single data byte column to the\r
+            // display.  Otherwise, bail out.\r
+            //\r
+            if(ulX < 126)\r
+            {\r
+                OSRAMWriteData(pucBuffer, 8);\r
+                ulX += 2;\r
+            }\r
+            else\r
+            {\r
+                return;\r
+            }\r
+        }\r
+\r
+        //\r
+        // Advance to the next character.\r
+        //\r
+        pcStr++;\r
+    }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Displays an image on the OLED display.\r
+//!\r
+//! \param pucImage is a pointer to the image data.\r
+//! \param ulX is the horizontal position to display this image, specified in\r
+//! columns from the left edge of the display.\r
+//! \param ulY is the vertical position to display this image, specified in\r
+//! rows from the top of the display.\r
+//! \param ulWidth is the width of the image, specified in columns.\r
+//! \param ulHeight is the height of the image, specified in rows.\r
+//!\r
+//! This function will display a bitmap graphic on the display.  Because of the\r
+//! format of the display RAM, the starting column (/e ulX) and the number of\r
+//! columns (/e ulWidth) must be an integer multiple of two.\r
+//!\r
+//! The image data is organized with the first row of image data appearing left\r
+//! to right, followed immediately by the second row of image data.  Each byte\r
+//! contains the data for two columns in the current row, with the leftmost\r
+//! column being contained in bits 7:4 and the rightmost column being contained\r
+//! in bits 3:0.\r
+//!\r
+//! For example, an image six columns wide and seven scan lines tall would\r
+//! be arranged as follows (showing how the twenty one bytes of the image would\r
+//! appear on the display):\r
+//!\r
+//! \verbatim\r
+//!     +-------------------+-------------------+-------------------+\r
+//!     |      Byte 0       |      Byte 1       |      Byte 2       |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     |      Byte 3       |      Byte 4       |      Byte 5       |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     |      Byte 6       |      Byte 7       |      Byte 8       |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     |      Byte 9       |      Byte 10      |      Byte 11      |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     |      Byte 12      |      Byte 13      |      Byte 14      |\r
+//!     +---------+---------+---------+--3------+---------+---------+\r
+//!     | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     |      Byte 15      |      Byte 16      |      Byte 17      |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     |      Byte 18      |      Byte 19      |      Byte 20      |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//! \endverbatim\r
+//!\r
+//! This function is contained in <tt>osram128x64x4.c</tt>, with\r
+//! <tt>osram128x64x4.h</tt> containing the API definition for use by`\r
+//! applications.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+OSRAM128x64x4ImageDraw(const unsigned char *pucImage, unsigned long ulX,\r
+               unsigned long ulY, unsigned long ulWidth,\r
+               unsigned long ulHeight)\r
+{\r
+    static unsigned char pucBuffer[8];\r
+\r
+    //\r
+    // Check the arguments.\r
+    //\r
+    ASSERT(ulX < 128);\r
+    ASSERT((ulX & 1) == 0);\r
+    ASSERT(ulY < 64);\r
+    ASSERT((ulX + ulWidth) <= 128);\r
+    ASSERT((ulY + ulHeight) <= 64);\r
+    ASSERT((ulWidth & 1) == 0);\r
+\r
+    //\r
+    // Setup a window starting at the specified column and row, and ending\r
+    // at the column + width and row+height.\r
+    //\r
+    pucBuffer[0] = 0x15;\r
+    pucBuffer[1] = ulX / 2;\r
+    pucBuffer[2] = (ulX + ulWidth - 2) / 2;\r
+    OSRAMWriteCommand(pucBuffer, 3);\r
+    pucBuffer[0] = 0x75;\r
+    pucBuffer[1] = ulY;\r
+    pucBuffer[2] = ulY + ulHeight - 1;\r
+    OSRAMWriteCommand(pucBuffer, 3);\r
+    OSRAMWriteCommand(g_pucOSRAM128x64x4HorizontalInc,\r
+                      sizeof(g_pucOSRAM128x64x4HorizontalInc));\r
+\r
+    //\r
+    // Loop while there are more rows to display.\r
+    //\r
+    while(ulHeight--)\r
+    {\r
+        //\r
+        // Write this row of image data.\r
+        //\r
+        OSRAMWriteData(pucImage, (ulWidth / 2));\r
+\r
+        //\r
+        // Advance to the next row of the image.\r
+        //\r
+        pucImage += (ulWidth / 2);\r
+    }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Enable the SSI component of the OLED display driver.\r
+//!\r
+//! \param ulFrequency specifies the SSI Clock Frequency to be used.\r
+//!\r
+//! This function initializes the SSI interface to the OLED display.\r
+//!\r
+//! This function is contained in <tt>osram128x64x4.c</tt>, with\r
+//! <tt>osram128x64x4.h</tt> containing the API definition for use by\r
+//! applications.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+OSRAM128x64x4Enable(unsigned long ulFrequency)\r
+{\r
+    unsigned long ulTemp;\r
+\r
+    //\r
+    // Disable the SSI port.\r
+    //\r
+    SSIDisable(SSI0_BASE);\r
+\r
+    //\r
+    // Configure the SSI0 port for master mode.\r
+    //\r
+    SSIConfig(SSI0_BASE, SSI_FRF_MOTO_MODE_2, SSI_MODE_MASTER, ulFrequency, 8);\r
+\r
+    //\r
+    // (Re)Enable SSI control of the FSS pin.\r
+    //\r
+    GPIOPinTypeSSI(GPIO_PORTA_BASE, GPIO_PIN_3);\r
+    GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_STRENGTH_8MA,\r
+                     GPIO_PIN_TYPE_STD_WPU);\r
+\r
+    //\r
+    // Enable the SSI port.\r
+    //\r
+    SSIEnable(SSI0_BASE);\r
+\r
+    //\r
+    // Drain the receive fifo.\r
+    //\r
+    while(SSIDataNonBlockingGet(SSI0_BASE, &ulTemp) != 0)\r
+    {\r
+    }\r
+\r
+    //\r
+    // Indicate that the OSRAM driver can use the SSI Port.\r
+    //\r
+    g_bSSIEnabled = true;\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Enable the SSI component of the OLED display driver.\r
+//!\r
+//! \param ulFrequency specifies the SSI Clock Frequency to be used.\r
+//!\r
+//! This function initializes the SSI interface to the OLED display.\r
+//!\r
+//! This function is contained in <tt>osram128x64x4.c</tt>, with\r
+//! <tt>osram128x64x4.h</tt> containing the API definition for use by\r
+//! applications.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+OSRAM128x64x4Disable(void)\r
+{\r
+    unsigned long ulTemp;\r
+\r
+    //\r
+    // Indicate that the OSRAM driver can no longer use the SSI Port.\r
+    //\r
+    g_bSSIEnabled = false;\r
+\r
+    //\r
+    // Drain the receive fifo.\r
+    //\r
+    while(SSIDataNonBlockingGet(SSI0_BASE, &ulTemp) != 0)\r
+    {\r
+    }\r
+\r
+    //\r
+    // Disable the SSI port.\r
+    //\r
+    SSIDisable(SSI0_BASE);\r
+\r
+    //\r
+    // Disable SSI control of the FSS pin.\r
+    //\r
+    GPIODirModeSet(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_DIR_MODE_OUT);\r
+    GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_STRENGTH_8MA,\r
+                     GPIO_PIN_TYPE_STD_WPU);\r
+    GPIOPinWrite(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_PIN_3);\r
+\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Initialize the OLED display.\r
+//!\r
+//! \param ulFrequency specifies the SSI Clock Frequency to be used.\r
+//!\r
+//! This function initializes the SSI interface to the OLED display and\r
+//! configures the SSD0323 controller on the panel.\r
+//!\r
+//! This function is contained in <tt>osram128x64x4.c</tt>, with\r
+//! <tt>osram128x64x4.h</tt> containing the API definition for use by\r
+//! applications.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+OSRAM128x64x4Init(unsigned long ulFrequency)\r
+{\r
+    unsigned long ulIdx;\r
+\r
+    //\r
+    // Enable the SSI0 and GPIO port  blocks as they are needed by this driver.\r
+    //\r
+    SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI0);\r
+    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);\r
+    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOC);\r
+\r
+    //\r
+    // Configure the SSI0CLK and SSIOTX pins for SSI operation.\r
+    //\r
+    GPIOPinTypeSSI(GPIO_PORTA_BASE, GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_5);\r
+    GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_2, GPIO_STRENGTH_8MA,\r
+                     GPIO_PIN_TYPE_STD_WPU);\r
+    GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_STRENGTH_8MA,\r
+                     GPIO_PIN_TYPE_STD_WPU);\r
+    GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_5, GPIO_STRENGTH_8MA,\r
+                     GPIO_PIN_TYPE_STD_WPU);\r
+\r
+    //\r
+    // Configure the PC7 pin as a D/Cn signal for OLED device.\r
+    //\r
+    GPIODirModeSet(GPIO_PORTC_BASE, GPIO_PIN_7, GPIO_DIR_MODE_OUT);\r
+    GPIOPadConfigSet(GPIO_PORTC_BASE, GPIO_PIN_7, GPIO_STRENGTH_8MA,\r
+                     GPIO_PIN_TYPE_STD);\r
+    GPIOPinWrite(GPIO_PORTC_BASE, GPIO_PIN_7, GPIO_PIN_7);\r
+\r
+    //\r
+    // Configure and enable the SSI0 port for master mode.\r
+    //\r
+    OSRAM128x64x4Enable(ulFrequency);\r
+\r
+    //\r
+    // Clear the frame buffer.\r
+    //\r
+    OSRAM128x64x4Clear();\r
+\r
+    //\r
+    // Initialize the SSD0323 controller.  Loop through the initialization\r
+    // sequence array, sending each command "string" to the controller.\r
+    //\r
+    for(ulIdx = 0; ulIdx < sizeof(g_pucOSRAM128x64x4Init);\r
+        ulIdx += g_pucOSRAM128x64x4Init[ulIdx] + 1)\r
+    {\r
+        //\r
+        // Send this command.\r
+        //\r
+        OSRAMWriteCommand(g_pucOSRAM128x64x4Init + ulIdx + 1,\r
+                          g_pucOSRAM128x64x4Init[ulIdx] - 1);\r
+    }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Turns on the OLED display.\r
+//!\r
+//! This function will turn on the OLED display, causing it to display the\r
+//! contents of its internal frame buffer.\r
+//!\r
+//! This function is contained in <tt>osram128x64x4.c</tt>, with\r
+//! <tt>osram128x64x4.h</tt> containing the API definition for use by\r
+//! applications.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+OSRAM128x64x4DisplayOn(void)\r
+{\r
+    unsigned long ulIdx;\r
+\r
+    //\r
+    // Initialize the SSD0323 controller.  Loop through the initialization\r
+    // sequence array, sending each command "string" to the controller.\r
+    //\r
+    for(ulIdx = 0; ulIdx < sizeof(g_pucOSRAM128x64x4Init);\r
+        ulIdx += g_pucOSRAM128x64x4Init[ulIdx] + 1)\r
+    {\r
+        //\r
+        // Send this command.\r
+        //\r
+        OSRAMWriteCommand(g_pucOSRAM128x64x4Init + ulIdx + 1,\r
+                          g_pucOSRAM128x64x4Init[ulIdx] - 1);\r
+    }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Turns off the OLED display.\r
+//!\r
+//! This function will turn off the OLED display.  This will stop the scanning\r
+//! of the panel and turn off the on-chip DC-DC converter, preventing damage to\r
+//! the panel due to burn-in (it has similar characters to a CRT in this\r
+//! respect).\r
+//!\r
+//! This function is contained in <tt>osram128x64x4.c</tt>, with\r
+//! <tt>osram128x64x4.h</tt> containing the API definition for use by\r
+//! applications.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+OSRAM128x64x4DisplayOff(void)\r
+{\r
+    static const unsigned char pucCommand1[] =\r
+    {\r
+        0xAE, 0xAD, 0x02\r
+    };\r
+\r
+    //\r
+    // Turn off the DC-DC converter and the display.\r
+    //\r
+    OSRAMWriteCommand(pucCommand1, sizeof(pucCommand1));\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+// Close the Doxygen group.\r
+//! @}\r
+//\r
+//*****************************************************************************\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/osram128x64x4.h b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/osram128x64x4.h
new file mode 100644 (file)
index 0000000..2ba7cb9
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/osram128x64x4.h
@@ -0,0 +1,63 @@
+//*****************************************************************************\r
+//\r
+// osram128x64x4.h - Prototypes for the driver for the OSRAM 128x64x4 graphical\r
+//                   OLED display.\r
+//\r
+// Copyright (c) 2006-2007 Luminary Micro, Inc.  All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1408 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+#ifndef __OSRAM128X64X4_H__\r
+#define __OSRAM128X64X4_H__\r
+\r
+//*****************************************************************************\r
+//\r
+// Prototypes for the driver APIs.\r
+//\r
+//*****************************************************************************\r
+extern void OSRAM128x64x4Clear(void);\r
+extern void OSRAM128x64x4StringDraw(const char *pcStr,\r
+                                    unsigned long ulX,\r
+                                    unsigned long ulY,\r
+                                    unsigned char ucLevel);\r
+extern void OSRAM128x64x4ImageDraw(const unsigned char *pucImage,\r
+                                   unsigned long ulX,\r
+                                   unsigned long ulY,\r
+                                   unsigned long ulWidth,\r
+                                   unsigned long ulHeight);\r
+extern void OSRAM128x64x4Init(unsigned long ulFrequency);\r
+extern void OSRAM128x64x4Enable(unsigned long ulFrequency);\r
+extern void OSRAM128x64x4Disable(void);\r
+extern void OSRAM128x64x4DisplayOn(void);\r
+extern void OSRAM128x64x4DisplayOff(void);\r
+\r
+//*****************************************************************************\r
+//\r
+// The following macro(s) map old names for the OSRAM functions to the new\r
+// names.  In new code, the new names should be used in favor of the old names.\r
+//\r
+//*****************************************************************************\r
+#ifndef DEPRECATED\r
+#define OSRAM128x64x1InitSSI    OSRAM128x64x4Enable\r
+#endif\r
+\r
+#endif // __OSRAM128X64X4_H__\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/rit128x96x4.c b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/rit128x96x4.c
new file mode 100644 (file)
index 0000000..cff38d5
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/rit128x96x4.c
@@ -0,0 +1,981 @@
+//*****************************************************************************\r
+//\r
+// rit128x96x4.c - Driver for the RIT 128x96x4 graphical OLED display.\r
+//\r
+// Copyright (c) 2007 Luminary Micro, Inc.  All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1504-conf of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+//*****************************************************************************\r
+//\r
+//! \addtogroup ek_lm3sLM3S8962_api\r
+//! @{\r
+//\r
+//*****************************************************************************\r
+\r
+#include "hw_ssi.h"\r
+#include "hw_memmap.h"\r
+#include "hw_sysctl.h"\r
+#include "hw_types.h"\r
+#include "debug.h"\r
+#include "gpio.h"\r
+#include "ssi.h"\r
+#include "sysctl.h"\r
+#include "rit128x96x4.h"\r
+\r
+//*****************************************************************************\r
+//\r
+// Macros that define the peripheral, port, and pin used for the OLEDDC\r
+// panel control signal.\r
+//\r
+//*****************************************************************************\r
+\r
+unsigned long ulGPIOId = 0, ulGPIOBase = 0, ulOLEDDC_PIN = 0, ulOLEDEN_PIN = 0;\r
+\r
+#define LM3S8962_SYSCTL_PERIPH_GPIO_OLEDDC   SYSCTL_PERIPH_GPIOA\r
+#define LM3S8962_GPIO_OLEDDC_BASE            GPIO_PORTA_BASE\r
+#define LM3S8962_GPIO_OLEDDC_PIN             GPIO_PIN_6\r
+#define LM3S8962_GPIO_OLEDEN_PIN             GPIO_PIN_7\r
+\r
+#define LM3S1968_SYSCTL_PERIPH_GPIO_OLEDDC   SYSCTL_PERIPH_GPIOH\r
+#define LM3S1968_GPIO_OLEDDC_BASE            GPIO_PORTH_BASE\r
+#define LM3S1968_GPIO_OLEDDC_PIN             GPIO_PIN_2\r
+#define LM3S1968_GPIO_OLEDEN_PIN             GPIO_PIN_3\r
+\r
+\r
+//*****************************************************************************\r
+//\r
+// Flag to indicate if SSI port is enabled for display usage.\r
+//\r
+//*****************************************************************************\r
+static volatile tBoolean g_bSSIEnabled = false;\r
+\r
+//*****************************************************************************\r
+//\r
+// Buffer for storing sequences of command and data for the display.\r
+//\r
+//*****************************************************************************\r
+static unsigned char g_pucBuffer[8];\r
+\r
+//*****************************************************************************\r
+//\r
+// Define the SSD1329 128x96x4 Remap Setting(s).  This will be used in\r
+// several places in the code to switch between vertical and horizontal\r
+// address incrementing.  Note that the controller support 128 rows while\r
+// the RIT display only uses 96.\r
+//\r
+// The Remap Command (0xA0) takes one 8-bit parameter.  The parameter is\r
+// defined as follows.\r
+//\r
+// Bit 7: Reserved\r
+// Bit 6: Disable(0)/Enable(1) COM Split Odd Even\r
+//        When enabled, the COM signals are split Odd on one side, even on\r
+//        the other.  Otherwise, they are split 0-63 on one side, 64-127 on\r
+//        the other.\r
+// Bit 5: Reserved\r
+// Bit 4: Disable(0)/Enable(1) COM Remap\r
+//        When Enabled, ROW 0-127 map to COM 127-0 (i.e. reverse row order)\r
+// Bit 3: Reserved\r
+// Bit 2: Horizontal(0)/Vertical(1) Address Increment\r
+//        When set, data RAM address will increment along the column rather\r
+//        than along the row.\r
+// Bit 1: Disable(0)/Enable(1) Nibble Remap\r
+//        When enabled, the upper and lower nibbles in the DATA bus for access\r
+//        to the data RAM are swapped.\r
+// Bit 0: Disable(0)/Enable(1) Column Address Remap\r
+//        When enabled, DATA RAM columns 0-63 are remapped to Segment Columns\r
+//        127-0.\r
+//\r
+//*****************************************************************************\r
+#define RIT_INIT_REMAP      0x52 // app note says 0x51\r
+#define RIT_INIT_OFFSET     0x00\r
+static const unsigned char g_pucRIT128x96x4VerticalInc[]   = { 0xA0, 0x56 };\r
+static const unsigned char g_pucRIT128x96x4HorizontalInc[] = { 0xA0, 0x52 };\r
+\r
+//*****************************************************************************\r
+//\r
+// A 5x7 font (in a 6x8 cell, where the sixth column is omitted from this\r
+// table) for displaying text on the OLED display.  The data is organized as\r
+// bytes from the left column to the right column, with each byte containing\r
+// the top row in the LSB and the bottom row in the MSB.\r
+//\r
+// Note:  This is the same font data that is used in the EK-LM3S811\r
+// osram96x16x1 driver.  The single bit-per-pixel is expaned in the StringDraw\r
+// function to the appropriate four bit-per-pixel gray scale format.\r
+//\r
+//*****************************************************************************\r
+static const unsigned char g_pucFont[96][5] =\r
+{\r
+    { 0x00, 0x00, 0x00, 0x00, 0x00 }, // " "\r
+    { 0x00, 0x00, 0x4f, 0x00, 0x00 }, // !\r
+    { 0x00, 0x07, 0x00, 0x07, 0x00 }, // "\r
+    { 0x14, 0x7f, 0x14, 0x7f, 0x14 }, // #\r
+    { 0x24, 0x2a, 0x7f, 0x2a, 0x12 }, // $\r
+    { 0x23, 0x13, 0x08, 0x64, 0x62 }, // %\r
+    { 0x36, 0x49, 0x55, 0x22, 0x50 }, // &\r
+    { 0x00, 0x05, 0x03, 0x00, 0x00 }, // '\r
+    { 0x00, 0x1c, 0x22, 0x41, 0x00 }, // (\r
+    { 0x00, 0x41, 0x22, 0x1c, 0x00 }, // )\r
+    { 0x14, 0x08, 0x3e, 0x08, 0x14 }, // *\r
+    { 0x08, 0x08, 0x3e, 0x08, 0x08 }, // +\r
+    { 0x00, 0x50, 0x30, 0x00, 0x00 }, // ,\r
+    { 0x08, 0x08, 0x08, 0x08, 0x08 }, // -\r
+    { 0x00, 0x60, 0x60, 0x00, 0x00 }, // .\r
+    { 0x20, 0x10, 0x08, 0x04, 0x02 }, // /\r
+    { 0x3e, 0x51, 0x49, 0x45, 0x3e }, // 0\r
+    { 0x00, 0x42, 0x7f, 0x40, 0x00 }, // 1\r
+    { 0x42, 0x61, 0x51, 0x49, 0x46 }, // 2\r
+    { 0x21, 0x41, 0x45, 0x4b, 0x31 }, // 3\r
+    { 0x18, 0x14, 0x12, 0x7f, 0x10 }, // 4\r
+    { 0x27, 0x45, 0x45, 0x45, 0x39 }, // 5\r
+    { 0x3c, 0x4a, 0x49, 0x49, 0x30 }, // 6\r
+    { 0x01, 0x71, 0x09, 0x05, 0x03 }, // 7\r
+    { 0x36, 0x49, 0x49, 0x49, 0x36 }, // 8\r
+    { 0x06, 0x49, 0x49, 0x29, 0x1e }, // 9\r
+    { 0x00, 0x36, 0x36, 0x00, 0x00 }, // :\r
+    { 0x00, 0x56, 0x36, 0x00, 0x00 }, // ;\r
+    { 0x08, 0x14, 0x22, 0x41, 0x00 }, // <\r
+    { 0x14, 0x14, 0x14, 0x14, 0x14 }, // =\r
+    { 0x00, 0x41, 0x22, 0x14, 0x08 }, // >\r
+    { 0x02, 0x01, 0x51, 0x09, 0x06 }, // ?\r
+    { 0x32, 0x49, 0x79, 0x41, 0x3e }, // @\r
+    { 0x7e, 0x11, 0x11, 0x11, 0x7e }, // A\r
+    { 0x7f, 0x49, 0x49, 0x49, 0x36 }, // B\r
+    { 0x3e, 0x41, 0x41, 0x41, 0x22 }, // C\r
+    { 0x7f, 0x41, 0x41, 0x22, 0x1c }, // D\r
+    { 0x7f, 0x49, 0x49, 0x49, 0x41 }, // E\r
+    { 0x7f, 0x09, 0x09, 0x09, 0x01 }, // F\r
+    { 0x3e, 0x41, 0x49, 0x49, 0x7a }, // G\r
+    { 0x7f, 0x08, 0x08, 0x08, 0x7f }, // H\r
+    { 0x00, 0x41, 0x7f, 0x41, 0x00 }, // I\r
+    { 0x20, 0x40, 0x41, 0x3f, 0x01 }, // J\r
+    { 0x7f, 0x08, 0x14, 0x22, 0x41 }, // K\r
+    { 0x7f, 0x40, 0x40, 0x40, 0x40 }, // L\r
+    { 0x7f, 0x02, 0x0c, 0x02, 0x7f }, // M\r
+    { 0x7f, 0x04, 0x08, 0x10, 0x7f }, // N\r
+    { 0x3e, 0x41, 0x41, 0x41, 0x3e }, // O\r
+    { 0x7f, 0x09, 0x09, 0x09, 0x06 }, // P\r
+    { 0x3e, 0x41, 0x51, 0x21, 0x5e }, // Q\r
+    { 0x7f, 0x09, 0x19, 0x29, 0x46 }, // R\r
+    { 0x46, 0x49, 0x49, 0x49, 0x31 }, // S\r
+    { 0x01, 0x01, 0x7f, 0x01, 0x01 }, // T\r
+    { 0x3f, 0x40, 0x40, 0x40, 0x3f }, // U\r
+    { 0x1f, 0x20, 0x40, 0x20, 0x1f }, // V\r
+    { 0x3f, 0x40, 0x38, 0x40, 0x3f }, // W\r
+    { 0x63, 0x14, 0x08, 0x14, 0x63 }, // X\r
+    { 0x07, 0x08, 0x70, 0x08, 0x07 }, // Y\r
+    { 0x61, 0x51, 0x49, 0x45, 0x43 }, // Z\r
+    { 0x00, 0x7f, 0x41, 0x41, 0x00 }, // [\r
+    { 0x02, 0x04, 0x08, 0x10, 0x20 }, // "\"\r
+    { 0x00, 0x41, 0x41, 0x7f, 0x00 }, // ]\r
+    { 0x04, 0x02, 0x01, 0x02, 0x04 }, // ^\r
+    { 0x40, 0x40, 0x40, 0x40, 0x40 }, // _\r
+    { 0x00, 0x01, 0x02, 0x04, 0x00 }, // `\r
+    { 0x20, 0x54, 0x54, 0x54, 0x78 }, // a\r
+    { 0x7f, 0x48, 0x44, 0x44, 0x38 }, // b\r
+    { 0x38, 0x44, 0x44, 0x44, 0x20 }, // c\r
+    { 0x38, 0x44, 0x44, 0x48, 0x7f }, // d\r
+    { 0x38, 0x54, 0x54, 0x54, 0x18 }, // e\r
+    { 0x08, 0x7e, 0x09, 0x01, 0x02 }, // f\r
+    { 0x0c, 0x52, 0x52, 0x52, 0x3e }, // g\r
+    { 0x7f, 0x08, 0x04, 0x04, 0x78 }, // h\r
+    { 0x00, 0x44, 0x7d, 0x40, 0x00 }, // i\r
+    { 0x20, 0x40, 0x44, 0x3d, 0x00 }, // j\r
+    { 0x7f, 0x10, 0x28, 0x44, 0x00 }, // k\r
+    { 0x00, 0x41, 0x7f, 0x40, 0x00 }, // l\r
+    { 0x7c, 0x04, 0x18, 0x04, 0x78 }, // m\r
+    { 0x7c, 0x08, 0x04, 0x04, 0x78 }, // n\r
+    { 0x38, 0x44, 0x44, 0x44, 0x38 }, // o\r
+    { 0x7c, 0x14, 0x14, 0x14, 0x08 }, // p\r
+    { 0x08, 0x14, 0x14, 0x18, 0x7c }, // q\r
+    { 0x7c, 0x08, 0x04, 0x04, 0x08 }, // r\r
+    { 0x48, 0x54, 0x54, 0x54, 0x20 }, // s\r
+    { 0x04, 0x3f, 0x44, 0x40, 0x20 }, // t\r
+    { 0x3c, 0x40, 0x40, 0x20, 0x7c }, // u\r
+    { 0x1c, 0x20, 0x40, 0x20, 0x1c }, // v\r
+    { 0x3c, 0x40, 0x30, 0x40, 0x3c }, // w\r
+    { 0x44, 0x28, 0x10, 0x28, 0x44 }, // x\r
+    { 0x0c, 0x50, 0x50, 0x50, 0x3c }, // y\r
+    { 0x44, 0x64, 0x54, 0x4c, 0x44 }, // z\r
+    { 0x00, 0x08, 0x36, 0x41, 0x00 }, // {\r
+    { 0x00, 0x00, 0x7f, 0x00, 0x00 }, // |\r
+    { 0x00, 0x41, 0x36, 0x08, 0x00 }, // }\r
+    { 0x02, 0x01, 0x02, 0x04, 0x02 }, // ~\r
+    { 0x02, 0x01, 0x02, 0x04, 0x02 }, // ~\r
+};\r
+\r
+//*****************************************************************************\r
+//\r
+// The sequence of commands used to initialize the SSD1329 controller.  Each\r
+// command is described as follows:  there is a byte specifying the number of\r
+// bytes in the command sequence, followed by that many bytes of command data.\r
+// Note:  This initialization sequence is derived from RIT App Note for\r
+// the P14201.  Values used are from the RIT app note, except where noted.\r
+//\r
+//*****************************************************************************\r
+static const unsigned char g_pucRIT128x96x4Init[] =\r
+{\r
+    //\r
+    // Unlock commands\r
+    //\r
+    3, 0xFD, 0x12, 0xe3,\r
+\r
+    //\r
+    // Display off\r
+    //\r
+    2, 0xAE, 0xe3,\r
+\r
+    //\r
+    // Icon off\r
+    //\r
+    3, 0x94, 0, 0xe3,\r
+\r
+    //\r
+    // Multiplex ratio\r
+    //\r
+    3, 0xA8, 95, 0xe3,\r
+\r
+    //\r
+    // Contrast\r
+    //\r
+    3, 0x81, 0xb7, 0xe3,\r
+\r
+    //\r
+    // Pre-charge current\r
+    //\r
+    3, 0x82, 0x3f, 0xe3,\r
+\r
+    //\r
+    // Display Re-map\r
+    //\r
+    3, 0xA0, RIT_INIT_REMAP, 0xe3,\r
+\r
+    //\r
+    // Display Start Line\r
+    //\r
+    3, 0xA1, 0, 0xe3,\r
+\r
+    //\r
+    // Display Offset\r
+    //\r
+    3, 0xA2, RIT_INIT_OFFSET, 0xe3,\r
+\r
+    //\r
+    // Display Mode Normal\r
+    //\r
+    2, 0xA4, 0xe3,\r
+\r
+    //\r
+    // Phase Length\r
+    //\r
+    3, 0xB1, 0x11, 0xe3,\r
+\r
+    //\r
+    // Frame frequency\r
+    //\r
+    3, 0xB2, 0x23, 0xe3,\r
+\r
+    //\r
+    // Front Clock Divider\r
+    //\r
+    3, 0xB3, 0xe2, 0xe3,\r
+\r
+    //\r
+    // Set gray scale table.  App note uses default command:\r
+    // 2, 0xB7, 0xe3\r
+    // This gray scale attempts some gamma correction to reduce the\r
+    // the brightness of the low levels.\r
+    //\r
+    17, 0xB8, 1, 2, 3, 4, 5, 6, 8, 10, 12, 14, 16, 19, 22, 26, 30, 0xe3,\r
+\r
+    //\r
+    // Second pre-charge period. App note uses value 0x04.\r
+    //\r
+    3, 0xBB, 0x01, 0xe3,\r
+\r
+    //\r
+    // Pre-charge voltage\r
+    //\r
+    3, 0xBC, 0x3f, 0xe3,\r
+\r
+    //\r
+    // Display ON\r
+    //\r
+    2, 0xAF, 0xe3,\r
+};\r
+\r
+//*****************************************************************************\r
+//\r
+//! \internal\r
+//!\r
+//! Write a sequence of command bytes to the SSD1329 controller.\r
+//!\r
+//! The data is written in a polled fashion; this function will not return\r
+//! until the entire byte sequence has been written to the controller.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+static void\r
+RITWriteCommand(const unsigned char *pucBuffer, unsigned long ulCount)\r
+{\r
+    unsigned long ulTemp;\r
+\r
+    //\r
+    // Return if SSI port is not enabled for RIT display.\r
+    //\r
+    if(!g_bSSIEnabled)\r
+    {\r
+        return;\r
+    }\r
+\r
+    //\r
+    // Clear the command/control bit to enable command mode.\r
+    //\r
+    GPIOPinWrite(ulGPIOBase, ulOLEDDC_PIN, 0); \r
+\r
+    //\r
+    // Loop while there are more bytes left to be transferred.\r
+    //\r
+    while(ulCount != 0)\r
+    {\r
+        //\r
+        // Write the next byte to the controller.\r
+        //\r
+        SSIDataPut(SSI0_BASE, *pucBuffer++);\r
+\r
+        //\r
+        // Dummy read to drain the fifo and time the GPIO signal.\r
+        //\r
+        SSIDataGet(SSI0_BASE, &ulTemp);\r
+\r
+        //\r
+        // Decrement the BYTE counter.\r
+        //\r
+        ulCount--;\r
+    }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! \internal\r
+//!\r
+//! Write a sequence of data bytes to the SSD1329 controller.\r
+//!\r
+//! The data is written in a polled fashion; this function will not return\r
+//! until the entire byte sequence has been written to the controller.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+static void\r
+RITWriteData(const unsigned char *pucBuffer, unsigned long ulCount)\r
+{\r
+    unsigned long ulTemp;\r
+\r
+    //\r
+    // Return if SSI port is not enabled for RIT display.\r
+    //\r
+    if(!g_bSSIEnabled)\r
+    {\r
+        return;\r
+    }\r
+\r
+    //\r
+    // Set the command/control bit to enable data mode.\r
+    //\r
+    GPIOPinWrite(ulGPIOBase, ulOLEDDC_PIN, ulOLEDDC_PIN);\r
+\r
+    //\r
+    // Loop while there are more bytes left to be transferred.\r
+    //\r
+    while(ulCount != 0)\r
+    {\r
+        //\r
+        // Write the next byte to the controller.\r
+        //\r
+        SSIDataPut(SSI0_BASE, *pucBuffer++);\r
+\r
+        //\r
+        // Dummy read to drain the fifo and time the GPIO signal.\r
+        //\r
+        SSIDataGet(SSI0_BASE, &ulTemp);\r
+\r
+        //\r
+        // Decrement the BYTE counter.\r
+        //\r
+        ulCount--;\r
+    }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Clears the OLED display.\r
+//!\r
+//! This function will clear the display RAM.  All pixels in the display will\r
+//! be turned off.\r
+//!\r
+//! This function is contained in <tt>rit128x96x4.c</tt>, with\r
+//! <tt>rit128x96x4.h</tt> containing the API definition for use by\r
+//! applications.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+RIT128x96x4Clear(void)\r
+{\r
+    static const unsigned char pucCommand1[] = { 0x15, 0, 63 };\r
+    static const unsigned char pucCommand2[] = { 0x75, 0, 127 };\r
+    unsigned long ulRow, ulColumn;\r
+\r
+    //\r
+    // Clear out the buffer used for sending bytes to the display.\r
+    *(unsigned long *)&g_pucBuffer[0] = 0;\r
+    *(unsigned long *)&g_pucBuffer[4] = 0;\r
+\r
+    //\r
+    // Set the window to fill the entire display.\r
+    //\r
+    RITWriteCommand(pucCommand1, sizeof(pucCommand1));\r
+    RITWriteCommand(pucCommand2, sizeof(pucCommand2));\r
+    RITWriteCommand(g_pucRIT128x96x4HorizontalInc,\r
+                    sizeof(g_pucRIT128x96x4HorizontalInc));\r
+\r
+    //\r
+    // Loop through the rows\r
+    //\r
+    for(ulRow = 0; ulRow < 96; ulRow++)\r
+    {\r
+        //\r
+        // Loop through the columns.  Each byte is two pixels,\r
+        // and the buffer hold 8 bytes, so 16 pixels are cleared\r
+        // at a time.\r
+        //\r
+        for(ulColumn = 0; ulColumn < 128; ulColumn += 8 * 2)\r
+        {\r
+            //\r
+            // Write 8 clearing bytes to the display, which will\r
+            // clear 16 pixels across.\r
+            //\r
+            RITWriteData(g_pucBuffer, sizeof(g_pucBuffer));\r
+        }\r
+    }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Displays a string on the OLED display.\r
+//!\r
+//! \param pcStr is a pointer to the string to display.\r
+//! \param ulX is the horizontal position to display the string, specified in\r
+//! columns from the left edge of the display.\r
+//! \param ulY is the vertical position to display the string, specified in\r
+//! rows from the top edge of the display.\r
+//! \param ucLevel is the 4-bit grey scale value to be used for displayed text.\r
+//!\r
+//! This function will draw a string on the display.  Only the ASCII characters\r
+//! between 32 (space) and 126 (tilde) are supported; other characters will\r
+//! result in random data being draw on the display (based on whatever appears\r
+//! before/after the font in memory).  The font is mono-spaced, so characters\r
+//! such as "i" and "l" have more white space around them than characters such\r
+//! as "m" or "w".\r
+//!\r
+//! If the drawing of the string reaches the right edge of the display, no more\r
+//! characters will be drawn.  Therefore, special care is not required to avoid\r
+//! supplying a string that is "too long" to display.\r
+//!\r
+//! This function is contained in <tt>rit128x96x4.c</tt>, with\r
+//! <tt>rit128x96x4.h</tt> containing the API definition for use by\r
+//! applications.\r
+//!\r
+//! \note Because the OLED display packs 2 pixels of data in a single byte, the\r
+//! parameter \e ulX must be an even column number (e.g. 0, 2, 4, etc).\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+RIT128x96x4StringDraw(const char *pcStr, unsigned long ulX,\r
+                      unsigned long ulY, unsigned char ucLevel)\r
+{\r
+    unsigned long ulIdx1, ulIdx2;\r
+    unsigned char ucTemp;\r
+\r
+    //\r
+    // Check the arguments.\r
+    //\r
+    ASSERT(ulX < 128);\r
+    ASSERT((ulX & 1) == 0);\r
+    ASSERT(ulY < 96);\r
+    ASSERT(ucLevel < 16);\r
+\r
+    //\r
+    // Setup a window starting at the specified column and row, ending\r
+    // at the right edge of the display and 8 rows down (single character row).\r
+    //\r
+    g_pucBuffer[0] = 0x15;\r
+    g_pucBuffer[1] = ulX / 2;\r
+    g_pucBuffer[2] = 63;\r
+    RITWriteCommand(g_pucBuffer, 3);\r
+    g_pucBuffer[0] = 0x75;\r
+    g_pucBuffer[1] = ulY;\r
+    g_pucBuffer[2] = ulY + 7;\r
+    RITWriteCommand(g_pucBuffer, 3);\r
+    RITWriteCommand(g_pucRIT128x96x4VerticalInc,\r
+                    sizeof(g_pucRIT128x96x4VerticalInc));\r
+\r
+    //\r
+    // Loop while there are more characters in the string.\r
+    //\r
+    while(*pcStr != 0)\r
+    {\r
+        //\r
+        // Get a working copy of the current character and convert to an\r
+        // index into the character bit-map array.\r
+        //\r
+        ucTemp = *pcStr;\r
+        ucTemp &= 0x7F;\r
+        if(ucTemp < ' ')\r
+        {\r
+            ucTemp = ' ';\r
+        }\r
+        else\r
+        {\r
+            ucTemp -= ' ';\r
+        }\r
+\r
+        //\r
+        // Build and display the character buffer.\r
+        //\r
+        for(ulIdx1 = 0; ulIdx1 < 3; ulIdx1++)\r
+        {\r
+            //\r
+            // Convert two columns of 1-bit font data into a single data\r
+            // byte column of 4-bit font data.\r
+            //\r
+            for(ulIdx2 = 0; ulIdx2 < 8; ulIdx2++)\r
+            {\r
+                g_pucBuffer[ulIdx2] = 0;\r
+                if(g_pucFont[ucTemp][ulIdx1*2] & (1 << ulIdx2))\r
+                {\r
+                    g_pucBuffer[ulIdx2] = ((ucLevel << 4) & 0xf0);\r
+                }\r
+                if((ulIdx1 < 2) &&\r
+                    (g_pucFont[ucTemp][ulIdx1*2+1] & (1 << ulIdx2)))\r
+                {\r
+                    g_pucBuffer[ulIdx2] |= ((ucLevel << 0) & 0x0f);\r
+                }\r
+            }\r
+\r
+            //\r
+            // If there is room, dump the single data byte column to the\r
+            // display.  Otherwise, bail out.\r
+            //\r
+            if(ulX < 126)\r
+            {\r
+                RITWriteData(g_pucBuffer, 8);\r
+                ulX += 2;\r
+            }\r
+            else\r
+            {\r
+                return;\r
+            }\r
+        }\r
+\r
+        //\r
+        // Advance to the next character.\r
+        //\r
+        pcStr++;\r
+    }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Displays an image on the OLED display.\r
+//!\r
+//! \param pucImage is a pointer to the image data.\r
+//! \param ulX is the horizontal position to display this image, specified in\r
+//! columns from the left edge of the display.\r
+//! \param ulY is the vertical position to display this image, specified in\r
+//! rows from the top of the display.\r
+//! \param ulWidth is the width of the image, specified in columns.\r
+//! \param ulHeight is the height of the image, specified in rows.\r
+//!\r
+//! This function will display a bitmap graphic on the display.  Because of the\r
+//! format of the display RAM, the starting column (\e ulX) and the number of\r
+//! columns (\e ulWidth) must be an integer multiple of two.\r
+//!\r
+//! The image data is organized with the first row of image data appearing left\r
+//! to right, followed immediately by the second row of image data.  Each byte\r
+//! contains the data for two columns in the current row, with the leftmost\r
+//! column being contained in bits 7:4 and the rightmost column being contained\r
+//! in bits 3:0.\r
+//!\r
+//! For example, an image six columns wide and seven scan lines tall would\r
+//! be arranged as follows (showing how the twenty one bytes of the image would\r
+//! appear on the display):\r
+//!\r
+//! \verbatim\r
+//!     +-------------------+-------------------+-------------------+\r
+//!     |      Byte 0       |      Byte 1       |      Byte 2       |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     |      Byte 3       |      Byte 4       |      Byte 5       |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     |      Byte 6       |      Byte 7       |      Byte 8       |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     |      Byte 9       |      Byte 10      |      Byte 11      |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     |      Byte 12      |      Byte 13      |      Byte 14      |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     |      Byte 15      |      Byte 16      |      Byte 17      |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     |      Byte 18      |      Byte 19      |      Byte 20      |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//! \endverbatim\r
+//!\r
+//! This function is contained in <tt>rit128x96x4.c</tt>, with\r
+//! <tt>rit128x96x4.h</tt> containing the API definition for use by\r
+//! applications.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+RIT128x96x4ImageDraw(const unsigned char *pucImage, unsigned long ulX,\r
+                     unsigned long ulY, unsigned long ulWidth,\r
+                     unsigned long ulHeight)\r
+{\r
+    //\r
+    // Check the arguments.\r
+    //\r
+    ASSERT(ulX < 128);\r
+    ASSERT((ulX & 1) == 0);\r
+    ASSERT(ulY < 96);\r
+    ASSERT((ulX + ulWidth) <= 128);\r
+    ASSERT((ulY + ulHeight) <= 96);\r
+    ASSERT((ulWidth & 1) == 0);\r
+\r
+    //\r
+    // Setup a window starting at the specified column and row, and ending\r
+    // at the column + width and row+height.\r
+    //\r
+    g_pucBuffer[0] = 0x15;\r
+    g_pucBuffer[1] = ulX / 2;\r
+    g_pucBuffer[2] = (ulX + ulWidth - 2) / 2;\r
+    RITWriteCommand(g_pucBuffer, 3);\r
+    g_pucBuffer[0] = 0x75;\r
+    g_pucBuffer[1] = ulY;\r
+    g_pucBuffer[2] = ulY + ulHeight - 1;\r
+    RITWriteCommand(g_pucBuffer, 3);\r
+    RITWriteCommand(g_pucRIT128x96x4HorizontalInc,\r
+                    sizeof(g_pucRIT128x96x4HorizontalInc));\r
+\r
+    //\r
+    // Loop while there are more rows to display.\r
+    //\r
+    while(ulHeight--)\r
+    {\r
+        //\r
+        // Write this row of image data.\r
+        //\r
+        RITWriteData(pucImage, (ulWidth / 2));\r
+\r
+        //\r
+        // Advance to the next row of the image.\r
+        //\r
+        pucImage += (ulWidth / 2);\r
+    }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Enable the SSI component of the OLED display driver.\r
+//!\r
+//! \param ulFrequency specifies the SSI Clock Frequency to be used.\r
+//!\r
+//! This function initializes the SSI interface to the OLED display.\r
+//!\r
+//! This function is contained in <tt>rit128x96x4.c</tt>, with\r
+//! <tt>rit128x96x4.h</tt> containing the API definition for use by\r
+//! applications.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+RIT128x96x4Enable(unsigned long ulFrequency)\r
+{\r
+    unsigned long ulTemp;\r
+\r
+    //\r
+    // Disable the SSI port.\r
+    //\r
+    SSIDisable(SSI0_BASE);\r
+\r
+    //\r
+    // Configure the SSI0 port for master mode.\r
+    //\r
+    SSIConfig(SSI0_BASE, SSI_FRF_MOTO_MODE_2, SSI_MODE_MASTER, ulFrequency, 8);\r
+\r
+    //\r
+    // (Re)Enable SSI control of the FSS pin.\r
+    //\r
+    GPIOPinTypeSSI(GPIO_PORTA_BASE, GPIO_PIN_3);\r
+    GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_STRENGTH_8MA,\r
+                     GPIO_PIN_TYPE_STD_WPU);\r
+\r
+    //\r
+    // Enable the SSI port.\r
+    //\r
+    SSIEnable(SSI0_BASE);\r
+\r
+    //\r
+    // Drain the receive fifo.\r
+    //\r
+    while(SSIDataNonBlockingGet(SSI0_BASE, &ulTemp) != 0)\r
+    {\r
+    }\r
+\r
+    //\r
+    // Indicate that the RIT driver can use the SSI Port.\r
+    //\r
+    g_bSSIEnabled = true;\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Enable the SSI component of the OLED display driver.\r
+//!\r
+//! This function initializes the SSI interface to the OLED display.\r
+//!\r
+//! This function is contained in <tt>rit128x96x4.c</tt>, with\r
+//! <tt>rit128x96x4.h</tt> containing the API definition for use by\r
+//! applications.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+RIT128x96x4Disable(void)\r
+{\r
+    unsigned long ulTemp;\r
+\r
+    //\r
+    // Indicate that the RIT driver can no longer use the SSI Port.\r
+    //\r
+    g_bSSIEnabled = false;\r
+\r
+    //\r
+    // Drain the receive fifo.\r
+    //\r
+    while(SSIDataNonBlockingGet(SSI0_BASE, &ulTemp) != 0)\r
+    {\r
+    }\r
+\r
+    //\r
+    // Disable the SSI port.\r
+    //\r
+    SSIDisable(SSI0_BASE);\r
+\r
+    //\r
+    // Disable SSI control of the FSS pin.\r
+    //\r
+    GPIOPinTypeGPIOOutput(GPIO_PORTA_BASE, GPIO_PIN_3);\r
+    GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_STRENGTH_8MA,\r
+                     GPIO_PIN_TYPE_STD_WPU);\r
+    GPIOPinWrite(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_PIN_3);\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Initialize the OLED display.\r
+//!\r
+//! \param ulFrequency specifies the SSI Clock Frequency to be used.\r
+//!\r
+//! This function initializes the SSI interface to the OLED display and\r
+//! configures the SSD1329 controller on the panel.\r
+//!\r
+//! This function is contained in <tt>rit128x96x4.c</tt>, with\r
+//! <tt>rit128x96x4.h</tt> containing the API definition for use by\r
+//! applications.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+RIT128x96x4Init(unsigned long ulFrequency)\r
+{\r
+    unsigned long ulIdx;\r
+\r
+\r
+       /* Determine which board is being used. */\r
+       if( SysCtlPeripheralPresent( SYSCTL_PERIPH_ETH ) )\r
+       {\r
+               /* Ethernet is present, we must be using the LM3S8962 EK. */\r
+               ulGPIOId = LM3S8962_SYSCTL_PERIPH_GPIO_OLEDDC;\r
+               ulGPIOBase = LM3S8962_GPIO_OLEDDC_BASE;\r
+               ulOLEDDC_PIN = GPIO_PIN_6;\r
+               ulOLEDEN_PIN = GPIO_PIN_7;\r
+       }\r
+       else\r
+       {\r
+               /* Ethernet is not present, we must be using the LM3S1968 EK. */\r
+               ulGPIOId = LM3S1968_SYSCTL_PERIPH_GPIO_OLEDDC;\r
+               ulGPIOBase = LM3S1968_GPIO_OLEDDC_BASE;\r
+               ulOLEDDC_PIN = GPIO_PIN_2;\r
+               ulOLEDEN_PIN = GPIO_PIN_3;\r
+       }\r
+\r
+    //\r
+    // Enable the SSI0 and GPIO port blocks as they are needed by this driver.\r
+    //\r
+    SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI0);\r
+    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);\r
+    SysCtlPeripheralEnable(ulGPIOId); \r
+\r
+    //\r
+    // Configure the SSI0CLK and SSIOTX pins for SSI operation.\r
+    //\r
+    GPIOPinTypeSSI(GPIO_PORTA_BASE, GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_5);\r
+    GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_5,\r
+                     GPIO_STRENGTH_8MA, GPIO_PIN_TYPE_STD_WPU);\r
+\r
+    //\r
+    // Configure the GPIO port pin used as a D/Cn signal for OLED device,\r
+    // and the port pin used to enable power to the OLED panel.\r
+    //\r
+    GPIOPinTypeGPIOOutput(ulGPIOBase, ulOLEDDC_PIN | ulOLEDEN_PIN);\r
+    GPIOPadConfigSet(ulGPIOBase, ulOLEDDC_PIN | ulOLEDEN_PIN,\r
+                     GPIO_STRENGTH_8MA, GPIO_PIN_TYPE_STD);\r
+    GPIOPinWrite(ulGPIOBase, ulOLEDDC_PIN | ulOLEDEN_PIN,\r
+                 ulOLEDDC_PIN | ulOLEDEN_PIN);\r
+\r
+    //\r
+    // Configure and enable the SSI0 port for master mode.\r
+    //\r
+    RIT128x96x4Enable(ulFrequency);\r
+\r
+    //\r
+    // Clear the frame buffer.\r
+    //\r
+    RIT128x96x4Clear();\r
+\r
+    //\r
+    // Initialize the SSD1329 controller.  Loop through the initialization\r
+    // sequence array, sending each command "string" to the controller.\r
+    //\r
+    for(ulIdx = 0; ulIdx < sizeof(g_pucRIT128x96x4Init);\r
+        ulIdx += g_pucRIT128x96x4Init[ulIdx] + 1)\r
+    {\r
+        //\r
+        // Send this command.\r
+        //\r
+        RITWriteCommand(g_pucRIT128x96x4Init + ulIdx + 1,\r
+                        g_pucRIT128x96x4Init[ulIdx] - 1);\r
+    }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Turns on the OLED display.\r
+//!\r
+//! This function will turn on the OLED display, causing it to display the\r
+//! contents of its internal frame buffer.\r
+//!\r
+//! This function is contained in <tt>rit128x96x4.c</tt>, with\r
+//! <tt>rit128x96x4.h</tt> containing the API definition for use by\r
+//! applications.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+RIT128x96x4DisplayOn(void)\r
+{\r
+    unsigned long ulIdx;\r
+\r
+    //\r
+    // Initialize the SSD1329 controller.  Loop through the initialization\r
+    // sequence array, sending each command "string" to the controller.\r
+    //\r
+    for(ulIdx = 0; ulIdx < sizeof(g_pucRIT128x96x4Init);\r
+        ulIdx += g_pucRIT128x96x4Init[ulIdx] + 1)\r
+    {\r
+        //\r
+        // Send this command.\r
+        //\r
+        RITWriteCommand(g_pucRIT128x96x4Init + ulIdx + 1,\r
+                        g_pucRIT128x96x4Init[ulIdx] - 1);\r
+    }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Turns off the OLED display.\r
+//!\r
+//! This function will turn off the OLED display.  This will stop the scanning\r
+//! of the panel and turn off the on-chip DC-DC converter, preventing damage to\r
+//! the panel due to burn-in (it has similar characters to a CRT in this\r
+//! respect).\r
+//!\r
+//! This function is contained in <tt>rit128x96x4.c</tt>, with\r
+//! <tt>rit128x96x4.h</tt> containing the API definition for use by\r
+//! applications.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+RIT128x96x4DisplayOff(void)\r
+{\r
+    static const unsigned char pucCommand1[] =\r
+    {\r
+        0xAE, 0xe3\r
+    };\r
+\r
+    //\r
+    // Put the display to sleep.\r
+    //\r
+    RITWriteCommand(pucCommand1, sizeof(pucCommand1));\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+// Close the Doxygen group.\r
+//! @}\r
+//\r
+//*****************************************************************************\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/standalone.ld b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/standalone.ld
new file mode 100644 (file)
index 0000000..3511144
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/standalone.ld
@@ -0,0 +1,60 @@
+/******************************************************************************\r
+ *\r
+ * standalone.ld - Linker script for applications using startup.c and\r
+ *                 DriverLib.\r
+ *\r
+ * Copyright (c) 2005-2007 Luminary Micro, Inc.  All rights reserved.\r
+ * \r
+ * Software License Agreement\r
+ * \r
+ * Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+ * exclusively on LMI's microcontroller products.\r
+ * \r
+ * The software is owned by LMI and/or its suppliers, and is protected under\r
+ * applicable copyright laws.  All rights are reserved.  Any use in violation\r
+ * of the foregoing restrictions may subject the user to criminal sanctions\r
+ * under applicable laws, as well as to civil liability for the breach of the\r
+ * terms and conditions of this license.\r
+ * \r
+ * THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+ * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+ * LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+ * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+ * \r
+ * This is part of revision 1392 of the Stellaris Peripheral Driver Library.\r
+ *\r
+ *****************************************************************************/\r
+\r
+MEMORY\r
+{\r
+    FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 256K\r
+    SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 64K\r
+}\r
+\r
+SECTIONS\r
+{\r
+    .text :\r
+    {\r
+        KEEP(*(.isr_vector))\r
+        *(.text*)\r
+        *(.rodata*)\r
+        _etext = .;\r
+    } > FLASH\r
+\r
+    .data : AT (ADDR(.text) + SIZEOF(.text))\r
+    {\r
+        _data = .;\r
+        *(vtable)\r
+        *(.data*)\r
+        _edata = .;\r
+    } > SRAM\r
+\r
+    .bss :\r
+    {\r
+        _bss = .;\r
+        *(.bss*)\r
+        *(COMMON)\r
+        _ebss = .;\r
+    } > SRAM\r
+}\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/startup.c b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/startup.c
new file mode 100644 (file)
index 0000000..4593d3f
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/startup.c
@@ -0,0 +1,248 @@
+//*****************************************************************************\r
+//\r
+// startup.c - Boot code for Stellaris.\r
+//\r
+// Copyright (c) 2005-2007 Luminary Micro, Inc.  All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1392 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+//*****************************************************************************\r
+//\r
+// Forward declaration of the default fault handlers.\r
+//\r
+//*****************************************************************************\r
+void ResetISR(void);\r
+static void NmiSR(void);\r
+static void FaultISR(void);\r
+static void IntDefaultHandler(void);\r
+\r
+//*****************************************************************************\r
+//\r
+// The entry point for the application.\r
+//\r
+//*****************************************************************************\r
+extern int main(void);\r
+extern void xPortPendSVHandler(void);\r
+extern void xPortSysTickHandler(void);\r
+extern void Timer0IntHandler( void );\r
+extern void vEMAC_ISR(void);\r
+\r
+//*****************************************************************************\r
+//\r
+// Reserve space for the system stack.\r
+//\r
+//*****************************************************************************\r
+#ifndef STACK_SIZE\r
+#define STACK_SIZE                              64\r
+#endif\r
+static unsigned long pulStack[STACK_SIZE];\r
+\r
+//*****************************************************************************\r
+//\r
+// The minimal vector table for a Cortex M3.  Note that the proper constructs\r
+// must be placed on this to ensure that it ends up at physical address\r
+// 0x0000.0000.\r
+//\r
+//*****************************************************************************\r
+__attribute__ ((section(".isr_vector")))\r
+void (* const g_pfnVectors[])(void) =\r
+{\r
+    (void (*)(void))((unsigned long)pulStack + sizeof(pulStack)),\r
+                                            // The initial stack pointer\r
+    ResetISR,                               // The reset handler\r
+    NmiSR,                                  // The NMI handler\r
+    FaultISR,                               // The hard fault handler\r
+    IntDefaultHandler,                      // The MPU fault handler\r
+    IntDefaultHandler,                      // The bus fault handler\r
+    IntDefaultHandler,                      // The usage fault handler\r
+    0,                                      // Reserved\r
+    0,                                      // Reserved\r
+    0,                                      // Reserved\r
+    0,                                      // Reserved\r
+    IntDefaultHandler,                      // SVCall handler\r
+    IntDefaultHandler,                      // Debug monitor handler\r
+    0,                                      // Reserved\r
+    xPortPendSVHandler,                     // The PendSV handler\r
+    xPortSysTickHandler,                    // The SysTick handler\r
+    IntDefaultHandler,                      // GPIO Port A\r
+    IntDefaultHandler,                      // GPIO Port B\r
+    IntDefaultHandler,                      // GPIO Port C\r
+    IntDefaultHandler,                      // GPIO Port D\r
+    IntDefaultHandler,                      // GPIO Port E\r
+    IntDefaultHandler,                      // UART0 Rx and Tx\r
+    IntDefaultHandler,                      // UART1 Rx and Tx\r
+    IntDefaultHandler,                      // SSI Rx and Tx\r
+    IntDefaultHandler,                      // I2C Master and Slave\r
+    IntDefaultHandler,                      // PWM Fault\r
+    IntDefaultHandler,                      // PWM Generator 0\r
+    IntDefaultHandler,                      // PWM Generator 1\r
+    IntDefaultHandler,                      // PWM Generator 2\r
+    IntDefaultHandler,                      // Quadrature Encoder\r
+    IntDefaultHandler,                      // ADC Sequence 0\r
+    IntDefaultHandler,                      // ADC Sequence 1\r
+    IntDefaultHandler,                      // ADC Sequence 2\r
+    IntDefaultHandler,                      // ADC Sequence 3\r
+    IntDefaultHandler,                      // Watchdog timer\r
+    Timer0IntHandler,                      // Timer 0 subtimer A\r
+    IntDefaultHandler,                      // Timer 0 subtimer B\r
+    IntDefaultHandler,                      // Timer 1 subtimer A\r
+    IntDefaultHandler,                      // Timer 1 subtimer B\r
+    IntDefaultHandler,                      // Timer 2 subtimer A\r
+    IntDefaultHandler,                      // Timer 2 subtimer B\r
+    IntDefaultHandler,                      // Analog Comparator 0\r
+    IntDefaultHandler,                      // Analog Comparator 1\r
+    IntDefaultHandler,                      // Analog Comparator 2\r
+    IntDefaultHandler,                      // System Control (PLL, OSC, BO)\r
+    IntDefaultHandler,                      // FLASH Control\r
+    IntDefaultHandler,                      // GPIO Port F\r
+    IntDefaultHandler,                      // GPIO Port G\r
+    IntDefaultHandler,                      // GPIO Port H\r
+    IntDefaultHandler,                      // UART2 Rx and Tx\r
+    IntDefaultHandler,                      // SSI1 Rx and Tx\r
+    IntDefaultHandler,                      // Timer 3 subtimer A\r
+    IntDefaultHandler,                      // Timer 3 subtimer B\r
+    IntDefaultHandler,                      // I2C1 Master and Slave\r
+    IntDefaultHandler,                      // Quadrature Encoder 1\r
+    IntDefaultHandler,                      // CAN0\r
+    IntDefaultHandler,                      // CAN1\r
+    0,                                      // Reserved\r
+    vEMAC_ISR,                              // Ethernet\r
+    IntDefaultHandler                       // Hibernate\r
+};\r
+\r
+//*****************************************************************************\r
+//\r
+// The following are constructs created by the linker, indicating where the\r
+// the "data" and "bss" segments reside in memory.  The initializers for the\r
+// for the "data" segment resides immediately following the "text" segment.\r
+//\r
+//*****************************************************************************\r
+extern unsigned long _etext;\r
+extern unsigned long _data;\r
+extern unsigned long _edata;\r
+extern unsigned long _bss;\r
+extern unsigned long _ebss;\r
+\r
+//*****************************************************************************\r
+//\r
+// This is the code that gets called when the processor first starts execution\r
+// following a reset event.  Only the absolutely necessary set is performed,\r
+// after which the application supplied main() routine is called.  Any fancy\r
+// actions (such as making decisions based on the reset cause register, and\r
+// resetting the bits in that register) are left solely in the hands of the\r
+// application.\r
+//\r
+//*****************************************************************************\r
+void\r
+ResetISR(void)\r
+{\r
+    unsigned long *pulSrc, *pulDest;\r
+\r
+    //\r
+    // Copy the data segment initializers from flash to SRAM.\r
+    //\r
+    pulSrc = &_etext;\r
+    for(pulDest = &_data; pulDest < &_edata; )\r
+    {\r
+        *pulDest++ = *pulSrc++;\r
+    }\r
+\r
+    //\r
+    // Zero fill the bss segment.\r
+    //\r
+    for(pulDest = &_bss; pulDest < &_ebss; )\r
+    {\r
+        *pulDest++ = 0;\r
+    }\r
+\r
+    //\r
+    // Call the application's entry point.\r
+    //\r
+    main();\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+// This is the code that gets called when the processor receives a NMI.  This\r
+// simply enters an infinite loop, preserving the system state for examination\r
+// by a debugger.\r
+//\r
+//*****************************************************************************\r
+static void\r
+NmiSR(void)\r
+{\r
+    //\r
+    // Enter an infinite loop.\r
+    //\r
+    while(1)\r
+    {\r
+    }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+// This is the code that gets called when the processor receives a fault\r
+// interrupt.  This simply enters an infinite loop, preserving the system state\r
+// for examination by a debugger.\r
+//\r
+//*****************************************************************************\r
+static void\r
+FaultISR(void)\r
+{\r
+    //\r
+    // Enter an infinite loop.\r
+    //\r
+    while(1)\r
+    {\r
+    }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+// This is the code that gets called when the processor receives an unexpected\r
+// interrupt.  This simply enters an infinite loop, preserving the system state\r
+// for examination by a debugger.\r
+//\r
+//*****************************************************************************\r
+static void\r
+IntDefaultHandler(void)\r
+{\r
+    //\r
+    // Go into an infinite loop.\r
+    //\r
+    while(1)\r
+    {\r
+    }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+// A dummy printf function to satisfy the calls to printf from uip.  This\r
+// avoids pulling in the run-time library.\r
+//\r
+//*****************************************************************************\r
+int\r
+uipprintf(const char *fmt, ...)\r
+{\r
+    return(0);\r
+}\r
+\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/timertest.c b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/timertest.c
new file mode 100644 (file)
index 0000000..adcc716
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/timertest.c
@@ -0,0 +1,133 @@
+/*\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
+\r
+       This file is part of the FreeRTOS.org distribution.\r
+\r
+       FreeRTOS.org is free software; you can redistribute it and/or modify\r
+       it under the terms of the GNU General Public License as published by\r
+       the Free Software Foundation; either version 2 of the License, or\r
+       (at your option) any later version.\r
+\r
+       FreeRTOS.org is distributed in the hope that it will be useful,\r
+       but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+       MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
+       GNU General Public License for more details.\r
+\r
+       You should have received a copy of the GNU General Public License\r
+       along with FreeRTOS.org; if not, write to the Free Software\r
+       Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
+\r
+       A special exception to the GPL can be applied should you wish to distribute\r
+       a combined work that includes FreeRTOS.org, without being obliged to provide\r
+       the source code for any proprietary components.  See the licensing section\r
+       of http://www.FreeRTOS.org for full details of how and when the exception\r
+       can be applied.\r
+\r
+       ***************************************************************************\r
+       See http://www.FreeRTOS.org for documentation, latest information, license\r
+       and contact details.  Please ensure to read the configuration and relevant\r
+       port sections of the online documentation.\r
+\r
+       Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along\r
+       with commercial development and support options.\r
+       ***************************************************************************\r
+*/\r
+\r
+/* High speed timer test as described in main.c. */\r
+\r
+/* Scheduler includes. */\r
+#include "FreeRTOS.h"\r
+\r
+/* Library includes. */\r
+#include "hw_ints.h"\r
+#include "hw_memmap.h"\r
+#include "hw_types.h"\r
+#include "interrupt.h"\r
+#include "sysctl.h"\r
+#include "lmi_timer.h"\r
+\r
+/* The set frequency of the interrupt.  Deviations from this are measured as\r
+the jitter. */\r
+#define timerINTERRUPT_FREQUENCY               ( 20000UL )\r
+\r
+/* The expected time between each of the timer interrupts - if the jitter was\r
+zero. */\r
+#define timerEXPECTED_DIFFERENCE_VALUE ( configCPU_CLOCK_HZ / timerINTERRUPT_FREQUENCY )\r
+\r
+/* The highest available interrupt priority. */\r
+#define timerHIGHEST_PRIORITY                  ( 0 )\r
+\r
+/* Misc defines. */\r
+#define timerMAX_32BIT_VALUE                   ( 0xffffffffUL )\r
+#define timerTIMER_1_COUNT_VALUE               ( * ( ( unsigned long * ) ( TIMER1_BASE + 0x48 ) ) )\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Interrupt handler in which the jitter is measured. */\r
+void Timer0IntHandler( void );\r
+\r
+/* Stores the value of the maximum recorded jitter between interrupts. */\r
+unsigned portLONG ulMaxJitter = 0;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+void vSetupTimer( void )\r
+{\r
+unsigned long ulFrequency;\r
+\r
+       /* Timer zero is used to generate the interrupts, and timer 1 is used\r
+       to measure the jitter. */\r
+       SysCtlPeripheralEnable( SYSCTL_PERIPH_TIMER0 );\r
+    SysCtlPeripheralEnable( SYSCTL_PERIPH_TIMER1 );\r
+    TimerConfigure( TIMER0_BASE, TIMER_CFG_32_BIT_PER );\r
+    TimerConfigure( TIMER1_BASE, TIMER_CFG_32_BIT_PER );\r
+       \r
+       /* Set the timer interrupt to be above the kernel - highest. */\r
+       IntPrioritySet( INT_TIMER0A, timerHIGHEST_PRIORITY );\r
+\r
+       /* Just used to measure time. */\r
+    TimerLoadSet(TIMER1_BASE, TIMER_A, timerMAX_32BIT_VALUE );\r
+       \r
+       /* The rate at which the timer will interrupt. */\r
+       ulFrequency = configCPU_CLOCK_HZ / timerINTERRUPT_FREQUENCY;    \r
+    TimerLoadSet( TIMER0_BASE, TIMER_A, ulFrequency );\r
+    IntEnable( INT_TIMER0A );\r
+    TimerIntEnable( TIMER0_BASE, TIMER_TIMA_TIMEOUT );\r
+\r
+       /* Enable both timers. */       \r
+    TimerEnable( TIMER0_BASE, TIMER_A );\r
+    TimerEnable( TIMER1_BASE, TIMER_A );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void Timer0IntHandler( void )\r
+{\r
+unsigned portLONG ulDifference, ulCurrentCount;\r
+static portLONG ulMaxDifference = 0, ulLastCount = 0;\r
+\r
+       /* We use the timer 1 counter value to measure the clock cycles between\r
+       the timer 0 interrupts. */\r
+       ulCurrentCount = timerTIMER_1_COUNT_VALUE;\r
+\r
+       if( ulCurrentCount < ulLastCount )\r
+       {       \r
+               /* How many times has timer 1 counted since the last interrupt? */\r
+               ulDifference =  ulLastCount - ulCurrentCount;\r
+       \r
+               /* Is this the largest difference we have measured yet? */\r
+               if( ulDifference > ulMaxDifference )\r
+               {\r
+                       ulMaxDifference = ulDifference;\r
+                       ulMaxJitter = ulMaxDifference - timerEXPECTED_DIFFERENCE_VALUE;\r
+               }\r
+       }\r
+       \r
+       ulLastCount = ulCurrentCount;\r
+\r
+    TimerIntClear( TIMER0_BASE, TIMER_TIMA_TIMEOUT );\r
+}\r
+\r
+\r
+\r
+\r
+\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/Makefile.webserver b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/Makefile.webserver
new file mode 100644 (file)
index 0000000..f38c47a
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/Makefile.webserver
@@ -0,0 +1 @@
+APP_SOURCES += httpd.c http-strings.c httpd-fs.c httpd-cgi.c\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/clock-arch.h b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/clock-arch.h
new file mode 100644 (file)
index 0000000..cde657b
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/clock-arch.h
@@ -0,0 +1,42 @@
+/*\r
+ * Copyright (c) 2006, Swedish Institute of Computer Science.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions\r
+ * are met:\r
+ * 1. Redistributions of source code must retain the above copyright\r
+ *    notice, this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright\r
+ *    notice, this list of conditions and the following disclaimer in the\r
+ *    documentation and/or other materials provided with the distribution.\r
+ * 3. Neither the name of the Institute nor the names of its contributors\r
+ *    may be used to endorse or promote products derived from this software\r
+ *    without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND\r
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE\r
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\r
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY\r
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF\r
+ * SUCH DAMAGE.\r
+ *\r
+ * This file is part of the uIP TCP/IP stack\r
+ *\r
+ * $Id: clock-arch.h,v 1.2 2006/06/12 08:00:31 adam Exp $\r
+ */\r
+\r
+#ifndef __CLOCK_ARCH_H__\r
+#define __CLOCK_ARCH_H__\r
+\r
+#include "FreeRTOS.h"\r
+\r
+typedef unsigned long clock_time_t;\r
+#define CLOCK_CONF_SECOND configTICK_RATE_HZ\r
+\r
+#endif /* __CLOCK_ARCH_H__ */\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/emac.c b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/emac.c
new file mode 100644 (file)
index 0000000..5fcb0aa
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/emac.c
@@ -0,0 +1,281 @@
+/*\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
+\r
+       This file is part of the FreeRTOS.org distribution.\r
+\r
+       FreeRTOS.org is free software; you can redistribute it and/or modify\r
+       it under the terms of the GNU General Public License as published by\r
+       the Free Software Foundation; either version 2 of the License, or\r
+       (at your option) any later version.\r
+\r
+       FreeRTOS.org is distributed in the hope that it will be useful,\r
+       but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+       MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
+       GNU General Public License for more details.\r
+\r
+       You should have received a copy of the GNU General Public License\r
+       along with FreeRTOS.org; if not, write to the Free Software\r
+       Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
+\r
+       A special exception to the GPL can be applied should you wish to distribute\r
+       a combined work that includes FreeRTOS.org, without being obliged to provide\r
+       the source code for any proprietary components.  See the licensing section\r
+       of http://www.FreeRTOS.org for full details of how and when the exception\r
+       can be applied.\r
+\r
+       ***************************************************************************\r
+       See http://www.FreeRTOS.org for documentation, latest information, license\r
+       and contact details.  Please ensure to read the configuration and relevant\r
+       port sections of the online documentation.\r
+       ***************************************************************************\r
+*/\r
+\r
+/* Kernel includes. */\r
+#include "FreeRTOS.h"\r
+#include "Semphr.h"\r
+#include "task.h"\r
+\r
+/* Demo includes. */\r
+#include "EMAC.h"\r
+\r
+/* uIP includes. */\r
+#include "uip.h"\r
+\r
+/* Hardware library includes. */\r
+#include "hw_types.h"\r
+#include "hw_memmap.h"\r
+#include "hw_ints.h"\r
+#include "hw_ethernet.h"\r
+#include "ethernet.h"\r
+#include "interrupt.h"\r
+\r
+#define emacNUM_RX_BUFFERS             5\r
+#define emacFRAM_SIZE_BYTES    2\r
+#define macNEGOTIATE_DELAY             2000\r
+#define macWAIT_SEND_TIME              ( 10 )\r
+\r
+/* The task that handles the MAC peripheral.  This is created at a high\r
+priority and is effectively a deferred interrupt handler.  The peripheral\r
+handling is deferred to a task to prevent the entire FIFO having to be read\r
+from within an ISR. */\r
+void vMACHandleTask( void *pvParameters );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* The semaphore used to wake the uIP task when data arrives. */\r
+xSemaphoreHandle xEMACSemaphore = NULL;\r
+\r
+/* The semaphore used to wake the interrupt handler task.  The peripheral\r
+is processed at the task level to prevent the need to read the entire FIFO from\r
+within the ISR itself. */\r
+xSemaphoreHandle xMACInterruptSemaphore = NULL;\r
+\r
+/* The buffer used by the uIP stack.  In this case the pointer is used to\r
+point to one of the Rx buffers. */\r
+unsigned portCHAR *uip_buf;\r
+\r
+/* Buffers into which Rx data is placed. */\r
+static unsigned portCHAR ucRxBuffers[ emacNUM_RX_BUFFERS ][ UIP_BUFSIZE + ( 4 * emacFRAM_SIZE_BYTES ) ];\r
+\r
+/* The length of the data within each of the Rx buffers. */\r
+static unsigned portLONG ulRxLength[ emacNUM_RX_BUFFERS ];\r
+\r
+/* Used to keep a track of the number of bytes to transmit. */\r
+static unsigned portLONG ulNextTxSpace;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+portBASE_TYPE vInitEMAC( void )\r
+{\r
+unsigned long ulTemp;\r
+portBASE_TYPE xReturn;\r
+\r
+       /* Ensure all interrupts are disabled. */\r
+       EthernetIntDisable( ETH_BASE, ( ETH_INT_PHY | ETH_INT_MDIO | ETH_INT_RXER | ETH_INT_RXOF | ETH_INT_TX | ETH_INT_TXER | ETH_INT_RX));\r
+\r
+       /* Clear any interrupts that were already pending. */\r
+    ulTemp = EthernetIntStatus( ETH_BASE, pdFALSE );\r
+    EthernetIntClear( ETH_BASE, ulTemp );\r
+\r
+       /* Initialise the MAC and connect. */\r
+    EthernetInit( ETH_BASE );\r
+    EthernetConfigSet( ETH_BASE, ( ETH_CFG_TX_DPLXEN | ETH_CFG_TX_CRCEN | ETH_CFG_TX_PADEN ) );\r
+    EthernetEnable( ETH_BASE );\r
+\r
+       /* Mark each Rx buffer as empty. */\r
+       for( ulTemp = 0; ulTemp < emacNUM_RX_BUFFERS; ulTemp++ )\r
+       {\r
+               ulRxLength[ ulTemp ] = 0;\r
+       }\r
+       \r
+       /* Create the queue and task used to defer the MAC processing to the\r
+       task level. */\r
+       vSemaphoreCreateBinary( xMACInterruptSemaphore );\r
+       xSemaphoreTake( xMACInterruptSemaphore, 0 );\r
+       xReturn = xTaskCreate( vMACHandleTask, ( signed portCHAR * ) "MAC", configMINIMAL_STACK_SIZE, NULL, configMAX_PRIORITIES - 1, NULL );\r
+       vTaskDelay( macNEGOTIATE_DELAY );\r
+       \r
+       /* We are only interested in Rx interrupts. */\r
+       IntPrioritySet( INT_ETH, configKERNEL_INTERRUPT_PRIORITY );\r
+    IntEnable( INT_ETH );\r
+    EthernetIntEnable(ETH_BASE, ETH_INT_RX);\r
+\r
+       return xReturn;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+unsigned int uiGetEMACRxData( unsigned char *ucBuffer )\r
+{\r
+static unsigned long ulNextRxBuffer = 0;\r
+unsigned int iLen;\r
+\r
+       iLen = ulRxLength[ ulNextRxBuffer ];\r
+\r
+       if( iLen != 0 )\r
+       {\r
+               /* Leave room for the size at the start of the buffer. */\r
+               uip_buf = &( ucRxBuffers[ ulNextRxBuffer ][ 2 ] );\r
+               \r
+               ulRxLength[ ulNextRxBuffer ] = 0;\r
+               \r
+               ulNextRxBuffer++;\r
+               if( ulNextRxBuffer >= emacNUM_RX_BUFFERS )\r
+               {\r
+                       ulNextRxBuffer = 0;\r
+               }\r
+       }\r
+\r
+    return iLen;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vInitialiseSend( void )\r
+{\r
+       /* Set the index to the first byte to send - skipping over the size\r
+       bytes. */\r
+       ulNextTxSpace = 2;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vIncrementTxLength( unsigned portLONG ulLength )\r
+{\r
+       ulNextTxSpace += ulLength;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vSendBufferToMAC( void )\r
+{\r
+unsigned long *pulSource;\r
+unsigned portSHORT * pus;\r
+unsigned portLONG ulNextWord;\r
+\r
+       /* Locate the data to be send. */\r
+       pus = ( unsigned portSHORT * ) uip_buf;\r
+\r
+       /* Add in the size of the data. */\r
+       pus--;\r
+       *pus = ulNextTxSpace;\r
+\r
+       /* Wait for data to be sent if there is no space immediately. */\r
+    while( !EthernetSpaceAvail( ETH_BASE ) )\r
+    {\r
+               vTaskDelay( macWAIT_SEND_TIME );\r
+    }\r
+       \r
+       pulSource = ( unsigned portLONG * ) pus;        \r
+       \r
+       for( ulNextWord = 0; ulNextWord < ulNextTxSpace; ulNextWord += sizeof( unsigned portLONG ) )\r
+       {\r
+               HWREG(ETH_BASE + MAC_O_DATA) = *pulSource;\r
+               pulSource++;\r
+       }\r
+\r
+       /* Go. */\r
+    HWREG( ETH_BASE + MAC_O_TR ) = MAC_TR_NEWTX;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vEMAC_ISR( void )\r
+{\r
+portBASE_TYPE xSwitchRequired = pdFALSE;\r
+unsigned portLONG ulTemp;\r
+\r
+       /* Clear the interrupt. */\r
+       ulTemp = EthernetIntStatus( ETH_BASE, pdFALSE );\r
+       EthernetIntClear( ETH_BASE, ulTemp );\r
+               \r
+       /* Was it an Rx interrupt? */\r
+       if( ulTemp & ETH_INT_RX )\r
+       {\r
+               xSwitchRequired = pdTRUE;\r
+               xSemaphoreGiveFromISR( xMACInterruptSemaphore, pdFALSE );\r
+               EthernetIntDisable( ETH_BASE, ETH_INT_RX );\r
+       }\r
+               \r
+    /* Switch to the uIP task. */\r
+       portEND_SWITCHING_ISR( xSwitchRequired );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vMACHandleTask( void *pvParameters )\r
+{\r
+unsigned long ulLen = 0, i;\r
+unsigned portLONG ulLength, ulInt;\r
+unsigned long *pulBuffer;\r
+static unsigned portLONG ulNextRxBuffer = 0;\r
+portBASE_TYPE xSwitchRequired = pdFALSE;\r
+\r
+       for( ;; )\r
+       {\r
+               /* Wait for something to do. */\r
+               xSemaphoreTake( xMACInterruptSemaphore, portMAX_DELAY );\r
+               \r
+               while( ( ulInt = ( EthernetIntStatus( ETH_BASE, pdFALSE ) & ETH_INT_RX ) ) != 0 )\r
+               {               \r
+                       ulLength = HWREG( ETH_BASE + MAC_O_DATA );\r
+                       \r
+                       /* Leave room at the start of the buffer for the size. */\r
+                       pulBuffer = ( unsigned long * ) &( ucRxBuffers[ ulNextRxBuffer ][ 2 ] );                        \r
+                       *pulBuffer = ( ulLength >> 16 );\r
+\r
+                       /* Get the size of the data. */                 \r
+                       pulBuffer = ( unsigned long * ) &( ucRxBuffers[ ulNextRxBuffer ][ 4 ] );                        \r
+                       ulLength &= 0xFFFF;\r
+                       \r
+                       if( ulLength > 4 )\r
+                       {\r
+                               ulLength -= 4;\r
+                               \r
+                               if( ulLength >= UIP_BUFSIZE )\r
+                               {\r
+                                       /* The data won't fit in our buffer.  Ensure we don't\r
+                                       try to write into the buffer. */\r
+                                       ulLength = 0;\r
+                               }\r
+\r
+                               /* Read out the data into our buffer. */\r
+                               for( i = 0; i < ulLength; i += sizeof( unsigned portLONG ) )\r
+                               {\r
+                                       *pulBuffer = HWREG( ETH_BASE + MAC_O_DATA );\r
+                                       pulBuffer++;\r
+                               }\r
+                               \r
+                               /* Store the length of the data into the separate array. */\r
+                               ulRxLength[ ulNextRxBuffer ] = ulLength;\r
+                               \r
+                               /* Use the next buffer the next time through. */\r
+                               ulNextRxBuffer++;\r
+                               if( ulNextRxBuffer >= emacNUM_RX_BUFFERS )\r
+                               {\r
+                                       ulNextRxBuffer = 0;\r
+                               }\r
+               \r
+                               /* Ensure the uIP task is not blocked as data has arrived. */\r
+                               xSemaphoreGive( xEMACSemaphore );\r
+                       }\r
+               }\r
+               \r
+               EthernetIntEnable( ETH_BASE, ETH_INT_RX );\r
+       }\r
+}\r
+\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/emac.h b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/emac.h
new file mode 100644 (file)
index 0000000..a49b598
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/emac.h
@@ -0,0 +1,322 @@
+/*----------------------------------------------------------------------------\r
+ *      LPC2378 Ethernet Definitions\r
+ *----------------------------------------------------------------------------\r
+ *      Name:    EMAC.H\r
+ *      Purpose: Philips LPC2378 EMAC hardware definitions\r
+ *----------------------------------------------------------------------------\r
+ *      Copyright (c) 2006 KEIL - An ARM Company. All rights reserved.\r
+ *---------------------------------------------------------------------------*/\r
+#ifndef __EMAC_H\r
+#define __EMAC_H\r
+\r
+/* MAC address definition.  The MAC address must be unique on the network. */\r
+#define emacETHADDR0 0\r
+#define emacETHADDR1 0xbd\r
+#define emacETHADDR2 0x33\r
+#define emacETHADDR3 0x02\r
+#define emacETHADDR4 0x64\r
+#define emacETHADDR5 0x24\r
+\r
+\r
+/* EMAC Memory Buffer configuration for 16K Ethernet RAM. */\r
+#define NUM_RX_FRAG         4           /* Num.of RX Fragments 4*1536= 6.0kB */\r
+#define NUM_TX_FRAG         2           /* Num.of TX Fragments 2*1536= 3.0kB */\r
+#define ETH_FRAG_SIZE       1536        /* Packet Fragment size 1536 Bytes   */\r
+\r
+#define ETH_MAX_FLEN        1536        /* Max. Ethernet Frame Size          */\r
+\r
+/* EMAC variables located in 16K Ethernet SRAM */\r
+#define RX_DESC_BASE        0x7FE00000\r
+#define RX_STAT_BASE        (RX_DESC_BASE + NUM_RX_FRAG*8)\r
+#define TX_DESC_BASE        (RX_STAT_BASE + NUM_RX_FRAG*8)\r
+#define TX_STAT_BASE        (TX_DESC_BASE + NUM_TX_FRAG*8)\r
+#define RX_BUF_BASE         (TX_STAT_BASE + NUM_TX_FRAG*4)\r
+#define TX_BUF_BASE         (RX_BUF_BASE  + NUM_RX_FRAG*ETH_FRAG_SIZE)\r
+\r
+/* RX and TX descriptor and status definitions. */\r
+#define RX_DESC_PACKET(i)   (*(unsigned int *)(RX_DESC_BASE   + 8*i))\r
+#define RX_DESC_CTRL(i)     (*(unsigned int *)(RX_DESC_BASE+4 + 8*i))\r
+#define RX_STAT_INFO(i)     (*(unsigned int *)(RX_STAT_BASE   + 8*i))\r
+#define RX_STAT_HASHCRC(i)  (*(unsigned int *)(RX_STAT_BASE+4 + 8*i))\r
+#define TX_DESC_PACKET(i)   (*(unsigned int *)(TX_DESC_BASE   + 8*i))\r
+#define TX_DESC_CTRL(i)     (*(unsigned int *)(TX_DESC_BASE+4 + 8*i))\r
+#define TX_STAT_INFO(i)     (*(unsigned int *)(TX_STAT_BASE   + 4*i))\r
+#define RX_BUF(i)           (RX_BUF_BASE + ETH_FRAG_SIZE*i)\r
+#define TX_BUF(i)           (TX_BUF_BASE + ETH_FRAG_SIZE*i)\r
+\r
+/* MAC Configuration Register 1 */\r
+#define MAC1_REC_EN         0x00000001  /* Receive Enable                    */\r
+#define MAC1_PASS_ALL       0x00000002  /* Pass All Receive Frames           */\r
+#define MAC1_RX_FLOWC       0x00000004  /* RX Flow Control                   */\r
+#define MAC1_TX_FLOWC       0x00000008  /* TX Flow Control                   */\r
+#define MAC1_LOOPB          0x00000010  /* Loop Back Mode                    */\r
+#define MAC1_RES_TX         0x00000100  /* Reset TX Logic                    */\r
+#define MAC1_RES_MCS_TX     0x00000200  /* Reset MAC TX Control Sublayer     */\r
+#define MAC1_RES_RX         0x00000400  /* Reset RX Logic                    */\r
+#define MAC1_RES_MCS_RX     0x00000800  /* Reset MAC RX Control Sublayer     */\r
+#define MAC1_SIM_RES        0x00004000  /* Simulation Reset                  */\r
+#define MAC1_SOFT_RES       0x00008000  /* Soft Reset MAC                    */\r
+\r
+/* MAC Configuration Register 2 */\r
+#define MAC2_FULL_DUP       0x00000001  /* Full Duplex Mode                  */\r
+#define MAC2_FRM_LEN_CHK    0x00000002  /* Frame Length Checking             */\r
+#define MAC2_HUGE_FRM_EN    0x00000004  /* Huge Frame Enable                 */\r
+#define MAC2_DLY_CRC        0x00000008  /* Delayed CRC Mode                  */\r
+#define MAC2_CRC_EN         0x00000010  /* Append CRC to every Frame         */\r
+#define MAC2_PAD_EN         0x00000020  /* Pad all Short Frames              */\r
+#define MAC2_VLAN_PAD_EN    0x00000040  /* VLAN Pad Enable                   */\r
+#define MAC2_ADET_PAD_EN    0x00000080  /* Auto Detect Pad Enable            */\r
+#define MAC2_PPREAM_ENF     0x00000100  /* Pure Preamble Enforcement         */\r
+#define MAC2_LPREAM_ENF     0x00000200  /* Long Preamble Enforcement         */\r
+#undef  MAC2_NO_BACKOFF /* Remove compiler warning. */\r
+#define MAC2_NO_BACKOFF     0x00001000  /* No Backoff Algorithm              */\r
+#define MAC2_BACK_PRESSURE  0x00002000  /* Backoff Presurre / No Backoff     */\r
+#define MAC2_EXCESS_DEF     0x00004000  /* Excess Defer                      */\r
+\r
+/* Back-to-Back Inter-Packet-Gap Register */\r
+#define IPGT_FULL_DUP       0x00000015  /* Recommended value for Full Duplex */\r
+#define IPGT_HALF_DUP       0x00000012  /* Recommended value for Half Duplex */\r
+\r
+/* Non Back-to-Back Inter-Packet-Gap Register */\r
+#define IPGR_DEF            0x00000012  /* Recommended value                 */\r
+\r
+/* Collision Window/Retry Register */\r
+#define CLRT_DEF            0x0000370F  /* Default value                     */\r
+\r
+/* PHY Support Register */\r
+#undef SUPP_SPEED   /* Remove compiler warning. */\r
+#define SUPP_SPEED          0x00000100  /* Reduced MII Logic Current Speed   */\r
+#define SUPP_RES_RMII       0x00000800  /* Reset Reduced MII Logic           */\r
+\r
+/* Test Register */\r
+#define TEST_SHCUT_PQUANTA  0x00000001  /* Shortcut Pause Quanta             */\r
+#define TEST_TST_PAUSE      0x00000002  /* Test Pause                        */\r
+#define TEST_TST_BACKP      0x00000004  /* Test Back Pressure                */\r
+\r
+/* MII Management Configuration Register */\r
+#define MCFG_SCAN_INC       0x00000001  /* Scan Increment PHY Address        */\r
+#define MCFG_SUPP_PREAM     0x00000002  /* Suppress Preamble                 */\r
+#define MCFG_CLK_SEL        0x0000001C  /* Clock Select Mask                 */\r
+#define MCFG_RES_MII        0x00008000  /* Reset MII Management Hardware     */\r
+\r
+/* MII Management Command Register */\r
+#undef MCMD_READ   /* Remove compiler warning. */\r
+#define MCMD_READ           0x00000001  /* MII Read                          */\r
+#undef MCMD_SCAN /* Remove compiler warning. */\r
+#define MCMD_SCAN           0x00000002  /* MII Scan continuously             */\r
+\r
+#define MII_WR_TOUT         0x00050000  /* MII Write timeout count           */\r
+#define MII_RD_TOUT         0x00050000  /* MII Read timeout count            */\r
+\r
+/* MII Management Address Register */\r
+#define MADR_REG_ADR        0x0000001F  /* MII Register Address Mask         */\r
+#define MADR_PHY_ADR        0x00001F00  /* PHY Address Mask                  */\r
+\r
+/* MII Management Indicators Register */\r
+#undef MIND_BUSY   /* Remove compiler warning. */\r
+#define MIND_BUSY           0x00000001  /* MII is Busy                       */\r
+#define MIND_SCAN           0x00000002  /* MII Scanning in Progress          */\r
+#define MIND_NOT_VAL        0x00000004  /* MII Read Data not valid           */\r
+#define MIND_MII_LINK_FAIL  0x00000008  /* MII Link Failed                   */\r
+\r
+/* Command Register */\r
+#define CR_RX_EN            0x00000001  /* Enable Receive                    */\r
+#define CR_TX_EN            0x00000002  /* Enable Transmit                   */\r
+#define CR_REG_RES          0x00000008  /* Reset Host Registers              */\r
+#define CR_TX_RES           0x00000010  /* Reset Transmit Datapath           */\r
+#define CR_RX_RES           0x00000020  /* Reset Receive Datapath            */\r
+#define CR_PASS_RUNT_FRM    0x00000040  /* Pass Runt Frames                  */\r
+#define CR_PASS_RX_FILT     0x00000080  /* Pass RX Filter                    */\r
+#define CR_TX_FLOW_CTRL     0x00000100  /* TX Flow Control                   */\r
+#define CR_RMII             0x00000200  /* Reduced MII Interface             */\r
+#define CR_FULL_DUP         0x00000400  /* Full Duplex                       */\r
+\r
+/* Status Register */\r
+#define SR_RX_EN            0x00000001  /* Enable Receive                    */\r
+#define SR_TX_EN            0x00000002  /* Enable Transmit                   */\r
+\r
+/* Transmit Status Vector 0 Register */\r
+#define TSV0_CRC_ERR        0x00000001  /* CRC error                         */\r
+#define TSV0_LEN_CHKERR     0x00000002  /* Length Check Error                */\r
+#define TSV0_LEN_OUTRNG     0x00000004  /* Length Out of Range               */\r
+#define TSV0_DONE           0x00000008  /* Tramsmission Completed            */\r
+#define TSV0_MCAST          0x00000010  /* Multicast Destination             */\r
+#define TSV0_BCAST          0x00000020  /* Broadcast Destination             */\r
+#define TSV0_PKT_DEFER      0x00000040  /* Packet Deferred                   */\r
+#define TSV0_EXC_DEFER      0x00000080  /* Excessive Packet Deferral         */\r
+#define TSV0_EXC_COLL       0x00000100  /* Excessive Collision               */\r
+#define TSV0_LATE_COLL      0x00000200  /* Late Collision Occured            */\r
+#define TSV0_GIANT          0x00000400  /* Giant Frame                       */\r
+#define TSV0_UNDERRUN       0x00000800  /* Buffer Underrun                   */\r
+#define TSV0_BYTES          0x0FFFF000  /* Total Bytes Transferred           */\r
+#define TSV0_CTRL_FRAME     0x10000000  /* Control Frame                     */\r
+#define TSV0_PAUSE          0x20000000  /* Pause Frame                       */\r
+#define TSV0_BACK_PRESS     0x40000000  /* Backpressure Method Applied       */\r
+#define TSV0_VLAN           0x80000000  /* VLAN Frame                        */\r
+\r
+/* Transmit Status Vector 1 Register */\r
+#define TSV1_BYTE_CNT       0x0000FFFF  /* Transmit Byte Count               */\r
+#define TSV1_COLL_CNT       0x000F0000  /* Transmit Collision Count          */\r
+\r
+/* Receive Status Vector Register */\r
+#define RSV_BYTE_CNT        0x0000FFFF  /* Receive Byte Count                */\r
+#define RSV_PKT_IGNORED     0x00010000  /* Packet Previously Ignored         */\r
+#define RSV_RXDV_SEEN       0x00020000  /* RXDV Event Previously Seen        */\r
+#define RSV_CARR_SEEN       0x00040000  /* Carrier Event Previously Seen     */\r
+#define RSV_REC_CODEV       0x00080000  /* Receive Code Violation            */\r
+#define RSV_CRC_ERR         0x00100000  /* CRC Error                         */\r
+#define RSV_LEN_CHKERR      0x00200000  /* Length Check Error                */\r
+#define RSV_LEN_OUTRNG      0x00400000  /* Length Out of Range               */\r
+#define RSV_REC_OK          0x00800000  /* Frame Received OK                 */\r
+#define RSV_MCAST           0x01000000  /* Multicast Frame                   */\r
+#define RSV_BCAST           0x02000000  /* Broadcast Frame                   */\r
+#define RSV_DRIB_NIBB       0x04000000  /* Dribble Nibble                    */\r
+#define RSV_CTRL_FRAME      0x08000000  /* Control Frame                     */\r
+#define RSV_PAUSE           0x10000000  /* Pause Frame                       */\r
+#define RSV_UNSUPP_OPC      0x20000000  /* Unsupported Opcode                */\r
+#define RSV_VLAN            0x40000000  /* VLAN Frame                        */\r
+\r
+/* Flow Control Counter Register */\r
+#define FCC_MIRR_CNT        0x0000FFFF  /* Mirror Counter                    */\r
+#define FCC_PAUSE_TIM       0xFFFF0000  /* Pause Timer                       */\r
+\r
+/* Flow Control Status Register */\r
+#define FCS_MIRR_CNT        0x0000FFFF  /* Mirror Counter Current            */\r
+\r
+/* Receive Filter Control Register */\r
+#define RFC_UCAST_EN        0x00000001  /* Accept Unicast Frames Enable      */\r
+#define RFC_BCAST_EN        0x00000002  /* Accept Broadcast Frames Enable    */\r
+#define RFC_MCAST_EN        0x00000004  /* Accept Multicast Frames Enable    */\r
+#define RFC_UCAST_HASH_EN   0x00000008  /* Accept Unicast Hash Filter Frames */\r
+#define RFC_MCAST_HASH_EN   0x00000010  /* Accept Multicast Hash Filter Fram.*/\r
+#define RFC_PERFECT_EN      0x00000020  /* Accept Perfect Match Enable       */\r
+#define RFC_MAGP_WOL_EN     0x00001000  /* Magic Packet Filter WoL Enable    */\r
+#define RFC_PFILT_WOL_EN    0x00002000  /* Perfect Filter WoL Enable         */\r
+\r
+/* Receive Filter WoL Status/Clear Registers */\r
+#define WOL_UCAST           0x00000001  /* Unicast Frame caused WoL          */\r
+#define WOL_BCAST           0x00000002  /* Broadcast Frame caused WoL        */\r
+#define WOL_MCAST           0x00000004  /* Multicast Frame caused WoL        */\r
+#define WOL_UCAST_HASH      0x00000008  /* Unicast Hash Filter Frame WoL     */\r
+#define WOL_MCAST_HASH      0x00000010  /* Multicast Hash Filter Frame WoL   */\r
+#define WOL_PERFECT         0x00000020  /* Perfect Filter WoL                */\r
+#define WOL_RX_FILTER       0x00000080  /* RX Filter caused WoL              */\r
+#define WOL_MAG_PACKET      0x00000100  /* Magic Packet Filter caused WoL    */\r
+\r
+/* Interrupt Status/Enable/Clear/Set Registers */\r
+#define INT_RX_OVERRUN      0x00000001  /* Overrun Error in RX Queue         */\r
+#define INT_RX_ERR          0x00000002  /* Receive Error                     */\r
+#define INT_RX_FIN          0x00000004  /* RX Finished Process Descriptors   */\r
+#define INT_RX_DONE         0x00000008  /* Receive Done                      */\r
+#define INT_TX_UNDERRUN     0x00000010  /* Transmit Underrun                 */\r
+#define INT_TX_ERR          0x00000020  /* Transmit Error                    */\r
+#define INT_TX_FIN          0x00000040  /* TX Finished Process Descriptors   */\r
+#define INT_TX_DONE         0x00000080  /* Transmit Done                     */\r
+#define INT_SOFT_INT        0x00001000  /* Software Triggered Interrupt      */\r
+#define INT_WAKEUP          0x00002000  /* Wakeup Event Interrupt            */\r
+\r
+/* Power Down Register */\r
+#define PD_POWER_DOWN       0x80000000  /* Power Down MAC                    */\r
+\r
+/* RX Descriptor Control Word */\r
+#define RCTRL_SIZE          0x000007FF  /* Buffer size mask                  */\r
+#define RCTRL_INT           0x80000000  /* Generate RxDone Interrupt         */\r
+\r
+/* RX Status Hash CRC Word */\r
+#define RHASH_SA            0x000001FF  /* Hash CRC for Source Address       */\r
+#define RHASH_DA            0x001FF000  /* Hash CRC for Destination Address  */\r
+\r
+/* RX Status Information Word */\r
+#define RINFO_SIZE          0x000007FF  /* Data size in bytes                */\r
+#define RINFO_CTRL_FRAME    0x00040000  /* Control Frame                     */\r
+#define RINFO_VLAN          0x00080000  /* VLAN Frame                        */\r
+#define RINFO_FAIL_FILT     0x00100000  /* RX Filter Failed                  */\r
+#define RINFO_MCAST         0x00200000  /* Multicast Frame                   */\r
+#define RINFO_BCAST         0x00400000  /* Broadcast Frame                   */\r
+#define RINFO_CRC_ERR       0x00800000  /* CRC Error in Frame                */\r
+#define RINFO_SYM_ERR       0x01000000  /* Symbol Error from PHY             */\r
+#define RINFO_LEN_ERR       0x02000000  /* Length Error                      */\r
+#define RINFO_RANGE_ERR     0x04000000  /* Range Error (exceeded max. size)  */\r
+#define RINFO_ALIGN_ERR     0x08000000  /* Alignment Error                   */\r
+#define RINFO_OVERRUN       0x10000000  /* Receive overrun                   */\r
+#define RINFO_NO_DESCR      0x20000000  /* No new Descriptor available       */\r
+#define RINFO_LAST_FLAG     0x40000000  /* Last Fragment in Frame            */\r
+#define RINFO_ERR           0x80000000  /* Error Occured (OR of all errors)  */\r
+\r
+#define RINFO_ERR_MASK     (RINFO_FAIL_FILT | RINFO_CRC_ERR   | RINFO_SYM_ERR | \\r
+                            RINFO_LEN_ERR   | RINFO_ALIGN_ERR | RINFO_OVERRUN)\r
+\r
+/* TX Descriptor Control Word */\r
+#define TCTRL_SIZE          0x000007FF  /* Size of data buffer in bytes      */\r
+#define TCTRL_OVERRIDE      0x04000000  /* Override Default MAC Registers    */\r
+#define TCTRL_HUGE          0x08000000  /* Enable Huge Frame                 */\r
+#define TCTRL_PAD           0x10000000  /* Pad short Frames to 64 bytes      */\r
+#define TCTRL_CRC           0x20000000  /* Append a hardware CRC to Frame    */\r
+#define TCTRL_LAST          0x40000000  /* Last Descriptor for TX Frame      */\r
+#define TCTRL_INT           0x80000000  /* Generate TxDone Interrupt         */\r
+\r
+/* TX Status Information Word */\r
+#define TINFO_COL_CNT       0x01E00000  /* Collision Count                   */\r
+#define TINFO_DEFER         0x02000000  /* Packet Deferred (not an error)    */\r
+#define TINFO_EXCESS_DEF    0x04000000  /* Excessive Deferral                */\r
+#define TINFO_EXCESS_COL    0x08000000  /* Excessive Collision               */\r
+#define TINFO_LATE_COL      0x10000000  /* Late Collision Occured            */\r
+#define TINFO_UNDERRUN      0x20000000  /* Transmit Underrun                 */\r
+#define TINFO_NO_DESCR      0x40000000  /* No new Descriptor available       */\r
+#define TINFO_ERR           0x80000000  /* Error Occured (OR of all errors)  */\r
+\r
+/* DP83848C PHY Registers */\r
+#define PHY_REG_BMCR        0x00        /* Basic Mode Control Register       */\r
+#define PHY_REG_BMSR        0x01        /* Basic Mode Status Register        */\r
+#define PHY_REG_IDR1        0x02        /* PHY Identifier 1                  */\r
+#define PHY_REG_IDR2        0x03        /* PHY Identifier 2                  */\r
+#define PHY_REG_ANAR        0x04        /* Auto-Negotiation Advertisement    */\r
+#define PHY_REG_ANLPAR      0x05        /* Auto-Neg. Link Partner Abitily    */\r
+#define PHY_REG_ANER        0x06        /* Auto-Neg. Expansion Register      */\r
+#define PHY_REG_ANNPTR      0x07        /* Auto-Neg. Next Page TX            */\r
+\r
+/* PHY Extended Registers */\r
+#define PHY_REG_STS         0x10        /* Status Register                   */\r
+#define PHY_REG_MICR        0x11        /* MII Interrupt Control Register    */\r
+#define PHY_REG_MISR        0x12        /* MII Interrupt Status Register     */\r
+#define PHY_REG_FCSCR       0x14        /* False Carrier Sense Counter       */\r
+#define PHY_REG_RECR        0x15        /* Receive Error Counter             */\r
+#define PHY_REG_PCSR        0x16        /* PCS Sublayer Config. and Status   */\r
+#define PHY_REG_RBR         0x17        /* RMII and Bypass Register          */\r
+#define PHY_REG_LEDCR       0x18        /* LED Direct Control Register       */\r
+#define PHY_REG_PHYCR       0x19        /* PHY Control Register              */\r
+#define PHY_REG_10BTSCR     0x1A        /* 10Base-T Status/Control Register  */\r
+#define PHY_REG_CDCTRL1     0x1B        /* CD Test Control and BIST Extens.  */\r
+#define PHY_REG_EDCR        0x1D        /* Energy Detect Control Register    */\r
+\r
+#define PHY_FULLD_100M      0x2100      /* Full Duplex 100Mbit               */\r
+#define PHY_HALFD_100M      0x2000      /* Half Duplex 100Mbit               */\r
+#define PHY_FULLD_10M       0x0100      /* Full Duplex 10Mbit                */\r
+#define PHY_HALFD_10M       0x0000      /* Half Duplex 10MBit                */\r
+#define PHY_AUTO_NEG        0x3000      /* Select Auto Negotiation           */\r
+\r
+#define DP83848C_DEF_ADR    0x0100      /* Default PHY device address        */\r
+#define DP83848C_ID         0x20005C90  /* PHY Identifier                    */\r
+\r
+// prototypes\r
+portBASE_TYPE  vInitEMAC(void);\r
+unsigned short ReadFrameBE_EMAC(void);\r
+void           vIncrementTxLength(unsigned long ulLength);\r
+void           CopyFromFrame_EMAC(void *Dest, unsigned short Size);\r
+void           DummyReadFrame_EMAC(unsigned short Size);\r
+unsigned short StartReadFrame(void);\r
+void           EndReadFrame(void);\r
+unsigned int   CheckFrameReceived(void);\r
+void           vInitialiseSend(void);\r
+unsigned int   Rdy4Tx(void);\r
+void           vSendBufferToMAC(void);\r
+void vEMACWaitForInput( void );\r
+unsigned int uiGetEMACRxData( unsigned char *ucBuffer );\r
+\r
+\r
+#endif\r
+\r
+/*----------------------------------------------------------------------------\r
+ * end of file\r
+ *---------------------------------------------------------------------------*/\r
+\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/http-strings b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/http-strings
new file mode 100644 (file)
index 0000000..0d3c30c
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/http-strings
@@ -0,0 +1,35 @@
+http_http "http://"\r
+http_200 "200 "\r
+http_301 "301 "\r
+http_302 "302 "\r
+http_get "GET "\r
+http_10 "HTTP/1.0"\r
+http_11 "HTTP/1.1"\r
+http_content_type "content-type: "\r
+http_texthtml "text/html"\r
+http_location "location: "\r
+http_host "host: "\r
+http_crnl "\r\n"\r
+http_index_html "/index.html"\r
+http_404_html "/404.html"\r
+http_referer "Referer:"\r
+http_header_200 "HTTP/1.0 200 OK\r\nServer: uIP/1.0 http://www.sics.se/~adam/uip/\r\nConnection: close\r\n"\r
+http_header_404 "HTTP/1.0 404 Not found\r\nServer: uIP/1.0 http://www.sics.se/~adam/uip/\r\nConnection: close\r\n"\r
+http_content_type_plain "Content-type: text/plain\r\n\r\n"\r
+http_content_type_html "Content-type: text/html\r\n\r\n"\r
+http_content_type_css  "Content-type: text/css\r\n\r\n"\r
+http_content_type_text "Content-type: text/text\r\n\r\n"\r
+http_content_type_png  "Content-type: image/png\r\n\r\n"\r
+http_content_type_gif  "Content-type: image/gif\r\n\r\n"\r
+http_content_type_jpg  "Content-type: image/jpeg\r\n\r\n"\r
+http_content_type_binary "Content-type: application/octet-stream\r\n\r\n"\r
+http_html ".html"\r
+http_shtml ".shtml"\r
+http_htm ".htm"\r
+http_css ".css"\r
+http_png ".png"\r
+http_gif ".gif"\r
+http_jpg ".jpg"\r
+http_text ".txt"\r
+http_txt ".txt"\r
+\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/http-strings.c b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/http-strings.c
new file mode 100644 (file)
index 0000000..ef7a41c
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/http-strings.c
@@ -0,0 +1,102 @@
+const char http_http[8] = \r
+/* "http://" */\r
+{0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, };\r
+const char http_200[5] = \r
+/* "200 " */\r
+{0x32, 0x30, 0x30, 0x20, };\r
+const char http_301[5] = \r
+/* "301 " */\r
+{0x33, 0x30, 0x31, 0x20, };\r
+const char http_302[5] = \r
+/* "302 " */\r
+{0x33, 0x30, 0x32, 0x20, };\r
+const char http_get[5] = \r
+/* "GET " */\r
+{0x47, 0x45, 0x54, 0x20, };\r
+const char http_10[9] = \r
+/* "HTTP/1.0" */\r
+{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x30, };\r
+const char http_11[9] = \r
+/* "HTTP/1.1" */\r
+{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x31, };\r
+const char http_content_type[15] = \r
+/* "content-type: " */\r
+{0x63, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, };\r
+const char http_texthtml[10] = \r
+/* "text/html" */\r
+{0x74, 0x65, 0x78, 0x74, 0x2f, 0x68, 0x74, 0x6d, 0x6c, };\r
+const char http_location[11] = \r
+/* "location: " */\r
+{0x6c, 0x6f, 0x63, 0x61, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, };\r
+const char http_host[7] = \r
+/* "host: " */\r
+{0x68, 0x6f, 0x73, 0x74, 0x3a, 0x20, };\r
+const char http_crnl[3] = \r
+/* "\r\n" */\r
+{0xd, 0xa, };\r
+const char http_index_html[12] = \r
+/* "/index.html" */\r
+{0x2f, 0x69, 0x6e, 0x64, 0x65, 0x78, 0x2e, 0x68, 0x74, 0x6d, 0x6c, };\r
+const char http_404_html[10] = \r
+/* "/404.html" */\r
+{0x2f, 0x34, 0x30, 0x34, 0x2e, 0x68, 0x74, 0x6d, 0x6c, };\r
+const char http_referer[9] = \r
+/* "Referer:" */\r
+{0x52, 0x65, 0x66, 0x65, 0x72, 0x65, 0x72, 0x3a, };\r
+const char http_header_200[84] = \r
+/* "HTTP/1.0 200 OK\r\nServer: uIP/1.0 http://www.sics.se/~adam/uip/\r\nConnection: close\r\n" */\r
+{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x32, 0x30, 0x30, 0x20, 0x4f, 0x4b, 0xd, 0xa, 0x53, 0x65, 0x72, 0x76, 0x65, 0x72, 0x3a, 0x20, 0x75, 0x49, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, 0x77, 0x77, 0x77, 0x2e, 0x73, 0x69, 0x63, 0x73, 0x2e, 0x73, 0x65, 0x2f, 0x7e, 0x61, 0x64, 0x61, 0x6d, 0x2f, 0x75, 0x69, 0x70, 0x2f, 0xd, 0xa, 0x43, 0x6f, 0x6e, 0x6e, 0x65, 0x63, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, 0x63, 0x6c, 0x6f, 0x73, 0x65, 0xd, 0xa, };\r
+const char http_header_404[91] = \r
+/* "HTTP/1.0 404 Not found\r\nServer: uIP/1.0 http://www.sics.se/~adam/uip/\r\nConnection: close\r\n" */\r
+{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x34, 0x30, 0x34, 0x20, 0x4e, 0x6f, 0x74, 0x20, 0x66, 0x6f, 0x75, 0x6e, 0x64, 0xd, 0xa, 0x53, 0x65, 0x72, 0x76, 0x65, 0x72, 0x3a, 0x20, 0x75, 0x49, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, 0x77, 0x77, 0x77, 0x2e, 0x73, 0x69, 0x63, 0x73, 0x2e, 0x73, 0x65, 0x2f, 0x7e, 0x61, 0x64, 0x61, 0x6d, 0x2f, 0x75, 0x69, 0x70, 0x2f, 0xd, 0xa, 0x43, 0x6f, 0x6e, 0x6e, 0x65, 0x63, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, 0x63, 0x6c, 0x6f, 0x73, 0x65, 0xd, 0xa, };\r
+const char http_content_type_plain[29] = \r
+/* "Content-type: text/plain\r\n\r\n" */\r
+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x70, 0x6c, 0x61, 0x69, 0x6e, 0xd, 0xa, 0xd, 0xa, };\r
+const char http_content_type_html[28] = \r
+/* "Content-type: text/html\r\n\r\n" */\r
+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x68, 0x74, 0x6d, 0x6c, 0xd, 0xa, 0xd, 0xa, };\r
+const char http_content_type_css [27] = \r
+/* "Content-type: text/css\r\n\r\n" */\r
+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x63, 0x73, 0x73, 0xd, 0xa, 0xd, 0xa, };\r
+const char http_content_type_text[28] = \r
+/* "Content-type: text/text\r\n\r\n" */\r
+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x74, 0x65, 0x78, 0x74, 0xd, 0xa, 0xd, 0xa, };\r
+const char http_content_type_png [28] = \r
+/* "Content-type: image/png\r\n\r\n" */\r
+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x70, 0x6e, 0x67, 0xd, 0xa, 0xd, 0xa, };\r
+const char http_content_type_gif [28] = \r
+/* "Content-type: image/gif\r\n\r\n" */\r
+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x67, 0x69, 0x66, 0xd, 0xa, 0xd, 0xa, };\r
+const char http_content_type_jpg [29] = \r
+/* "Content-type: image/jpeg\r\n\r\n" */\r
+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x6a, 0x70, 0x65, 0x67, 0xd, 0xa, 0xd, 0xa, };\r
+const char http_content_type_binary[43] = \r
+/* "Content-type: application/octet-stream\r\n\r\n" */\r
+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x61, 0x70, 0x70, 0x6c, 0x69, 0x63, 0x61, 0x74, 0x69, 0x6f, 0x6e, 0x2f, 0x6f, 0x63, 0x74, 0x65, 0x74, 0x2d, 0x73, 0x74, 0x72, 0x65, 0x61, 0x6d, 0xd, 0xa, 0xd, 0xa, };\r
+const char http_html[6] = \r
+/* ".html" */\r
+{0x2e, 0x68, 0x74, 0x6d, 0x6c, };\r
+const char http_shtml[7] = \r
+/* ".shtml" */\r
+{0x2e, 0x73, 0x68, 0x74, 0x6d, 0x6c, };\r
+const char http_htm[5] = \r
+/* ".htm" */\r
+{0x2e, 0x68, 0x74, 0x6d, };\r
+const char http_css[5] = \r
+/* ".css" */\r
+{0x2e, 0x63, 0x73, 0x73, };\r
+const char http_png[5] = \r
+/* ".png" */\r
+{0x2e, 0x70, 0x6e, 0x67, };\r
+const char http_gif[5] = \r
+/* ".gif" */\r
+{0x2e, 0x67, 0x69, 0x66, };\r
+const char http_jpg[5] = \r
+/* ".jpg" */\r
+{0x2e, 0x6a, 0x70, 0x67, };\r
+const char http_text[5] = \r
+/* ".txt" */\r
+{0x2e, 0x74, 0x78, 0x74, };\r
+const char http_txt[5] = \r
+/* ".txt" */\r
+{0x2e, 0x74, 0x78, 0x74, };\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/http-strings.h b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/http-strings.h
new file mode 100644 (file)
index 0000000..acbe7e1
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/http-strings.h
@@ -0,0 +1,34 @@
+extern const char http_http[8];\r
+extern const char http_200[5];\r
+extern const char http_301[5];\r
+extern const char http_302[5];\r
+extern const char http_get[5];\r
+extern const char http_10[9];\r
+extern const char http_11[9];\r
+extern const char http_content_type[15];\r
+extern const char http_texthtml[10];\r
+extern const char http_location[11];\r
+extern const char http_host[7];\r
+extern const char http_crnl[3];\r
+extern const char http_index_html[12];\r
+extern const char http_404_html[10];\r
+extern const char http_referer[9];\r
+extern const char http_header_200[84];\r
+extern const char http_header_404[91];\r
+extern const char http_content_type_plain[29];\r
+extern const char http_content_type_html[28];\r
+extern const char http_content_type_css [27];\r
+extern const char http_content_type_text[28];\r
+extern const char http_content_type_png [28];\r
+extern const char http_content_type_gif [28];\r
+extern const char http_content_type_jpg [29];\r
+extern const char http_content_type_binary[43];\r
+extern const char http_html[6];\r
+extern const char http_shtml[7];\r
+extern const char http_htm[5];\r
+extern const char http_css[5];\r
+extern const char http_png[5];\r
+extern const char http_gif[5];\r
+extern const char http_jpg[5];\r
+extern const char http_text[5];\r
+extern const char http_txt[5];\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/httpd-cgi.c b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/httpd-cgi.c
new file mode 100644 (file)
index 0000000..803b771
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/httpd-cgi.c
@@ -0,0 +1,269 @@
+/**\r
+ * \addtogroup httpd\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * \file\r
+ *         Web server script interface\r
+ * \author\r
+ *         Adam Dunkels <adam@sics.se>\r
+ *\r
+ */\r
+\r
+/*\r
+ * Copyright (c) 2001-2006, Adam Dunkels.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions\r
+ * are met:\r
+ * 1. Redistributions of source code must retain the above copyright\r
+ *    notice, this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright\r
+ *    notice, this list of conditions and the following disclaimer in the\r
+ *    documentation and/or other materials provided with the distribution.\r
+ * 3. The name of the author may not be used to endorse or promote\r
+ *    products derived from this software without specific prior\r
+ *    written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS\r
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\r
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY\r
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE\r
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\r
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,\r
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\r
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+ * This file is part of the uIP TCP/IP stack.\r
+ *\r
+ * $Id: httpd-cgi.c,v 1.2 2006/06/11 21:46:37 adam Exp $\r
+ *\r
+ */\r
+\r
+#include "uip.h"\r
+#include "psock.h"\r
+#include "httpd.h"\r
+#include "httpd-cgi.h"\r
+#include "httpd-fs.h"\r
+\r
+#include <stdio.h>\r
+#include <string.h>\r
+\r
+HTTPD_CGI_CALL(file, "file-stats", file_stats);\r
+HTTPD_CGI_CALL(tcp, "tcp-connections", tcp_stats);\r
+HTTPD_CGI_CALL(net, "net-stats", net_stats);\r
+HTTPD_CGI_CALL(rtos, "rtos-stats", rtos_stats );\r
+HTTPD_CGI_CALL(io, "led-io", led_io );\r
+\r
+\r
+static const struct httpd_cgi_call *calls[] = { &file, &tcp, &net, &rtos, &io, NULL };\r
+\r
+/*---------------------------------------------------------------------------*/\r
+static\r
+PT_THREAD(nullfunction(struct httpd_state *s, char *ptr))\r
+{\r
+  PSOCK_BEGIN(&s->sout);\r
+  PSOCK_END(&s->sout);\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+httpd_cgifunction\r
+httpd_cgi(char *name)\r
+{\r
+  const struct httpd_cgi_call **f;\r
+\r
+  /* Find the matching name in the table, return the function. */\r
+  for(f = calls; *f != NULL; ++f) {\r
+    if(strncmp((*f)->name, name, strlen((*f)->name)) == 0) {\r
+      return (*f)->function;\r
+    }\r
+  }\r
+  return nullfunction;\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static unsigned short\r
+generate_file_stats(void *arg)\r
+{\r
+  char *f = (char *)arg;\r
+  return snprintf((char *)uip_appdata, UIP_APPDATA_SIZE, "%5u", httpd_fs_count(f));\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static\r
+PT_THREAD(file_stats(struct httpd_state *s, char *ptr))\r
+{\r
+  PSOCK_BEGIN(&s->sout);\r
+\r
+  PSOCK_GENERATOR_SEND(&s->sout, generate_file_stats, strchr(ptr, ' ') + 1);\r
+\r
+  PSOCK_END(&s->sout);\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static const char closed[] =   /*  "CLOSED",*/\r
+{0x43, 0x4c, 0x4f, 0x53, 0x45, 0x44, 0};\r
+static const char syn_rcvd[] = /*  "SYN-RCVD",*/\r
+{0x53, 0x59, 0x4e, 0x2d, 0x52, 0x43, 0x56,\r
+ 0x44,  0};\r
+static const char syn_sent[] = /*  "SYN-SENT",*/\r
+{0x53, 0x59, 0x4e, 0x2d, 0x53, 0x45, 0x4e,\r
+ 0x54,  0};\r
+static const char established[] = /*  "ESTABLISHED",*/\r
+{0x45, 0x53, 0x54, 0x41, 0x42, 0x4c, 0x49, 0x53, 0x48,\r
+ 0x45, 0x44, 0};\r
+static const char fin_wait_1[] = /*  "FIN-WAIT-1",*/\r
+{0x46, 0x49, 0x4e, 0x2d, 0x57, 0x41, 0x49,\r
+ 0x54, 0x2d, 0x31, 0};\r
+static const char fin_wait_2[] = /*  "FIN-WAIT-2",*/\r
+{0x46, 0x49, 0x4e, 0x2d, 0x57, 0x41, 0x49,\r
+ 0x54, 0x2d, 0x32, 0};\r
+static const char closing[] = /*  "CLOSING",*/\r
+{0x43, 0x4c, 0x4f, 0x53, 0x49,\r
+ 0x4e, 0x47, 0};\r
+static const char time_wait[] = /*  "TIME-WAIT,"*/\r
+{0x54, 0x49, 0x4d, 0x45, 0x2d, 0x57, 0x41,\r
+ 0x49, 0x54, 0};\r
+static const char last_ack[] = /*  "LAST-ACK"*/\r
+{0x4c, 0x41, 0x53, 0x54, 0x2d, 0x41, 0x43,\r
+ 0x4b, 0};\r
+\r
+static const char *states[] = {\r
+  closed,\r
+  syn_rcvd,\r
+  syn_sent,\r
+  established,\r
+  fin_wait_1,\r
+  fin_wait_2,\r
+  closing,\r
+  time_wait,\r
+  last_ack};\r
+\r
+\r
+static unsigned short\r
+generate_tcp_stats(void *arg)\r
+{\r
+  struct uip_conn *conn;\r
+  struct httpd_state *s = (struct httpd_state *)arg;\r
+\r
+  conn = &uip_conns[s->count];\r
+  return snprintf((char *)uip_appdata, UIP_APPDATA_SIZE,\r
+                "<tr><td>%d</td><td>%u.%u.%u.%u:%u</td><td>%s</td><td>%u</td><td>%u</td><td>%c %c</td></tr>\r\n",\r
+                htons(conn->lport),\r
+                htons(conn->ripaddr[0]) >> 8,\r
+                htons(conn->ripaddr[0]) & 0xff,\r
+                htons(conn->ripaddr[1]) >> 8,\r
+                htons(conn->ripaddr[1]) & 0xff,\r
+                htons(conn->rport),\r
+                states[conn->tcpstateflags & UIP_TS_MASK],\r
+                conn->nrtx,\r
+                conn->timer,\r
+                (uip_outstanding(conn))? '*':' ',\r
+                (uip_stopped(conn))? '!':' ');\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static\r
+PT_THREAD(tcp_stats(struct httpd_state *s, char *ptr))\r
+{\r
+\r
+  PSOCK_BEGIN(&s->sout);\r
+\r
+  for(s->count = 0; s->count < UIP_CONNS; ++s->count) {\r
+    if((uip_conns[s->count].tcpstateflags & UIP_TS_MASK) != UIP_CLOSED) {\r
+      PSOCK_GENERATOR_SEND(&s->sout, generate_tcp_stats, s);\r
+    }\r
+  }\r
+\r
+  PSOCK_END(&s->sout);\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static unsigned short\r
+generate_net_stats(void *arg)\r
+{\r
+  struct httpd_state *s = (struct httpd_state *)arg;\r
+  return snprintf((char *)uip_appdata, UIP_APPDATA_SIZE,\r
+                 "%5u\n", ((uip_stats_t *)&uip_stat)[s->count]);\r
+}\r
+\r
+static\r
+PT_THREAD(net_stats(struct httpd_state *s, char *ptr))\r
+{\r
+  PSOCK_BEGIN(&s->sout);\r
+\r
+#if UIP_STATISTICS\r
+\r
+  for(s->count = 0; s->count < sizeof(uip_stat) / sizeof(uip_stats_t);\r
+      ++s->count) {\r
+    PSOCK_GENERATOR_SEND(&s->sout, generate_net_stats, s);\r
+  }\r
+\r
+#endif /* UIP_STATISTICS */\r
+\r
+  PSOCK_END(&s->sout);\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+\r
+extern void vTaskList( signed char *pcWriteBuffer );\r
+static char cCountBuf[ 32 ];\r
+long lRefreshCount = 0;\r
+static unsigned short\r
+generate_rtos_stats(void *arg)\r
+{\r
+       lRefreshCount++;\r
+       sprintf( cCountBuf, "<p><br>Refresh count = %d", lRefreshCount );\r
+    vTaskList( uip_appdata );\r
+       strcat( uip_appdata, cCountBuf );\r
+\r
+       return strlen( uip_appdata );\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+\r
+\r
+static\r
+PT_THREAD(rtos_stats(struct httpd_state *s, char *ptr))\r
+{\r
+  PSOCK_BEGIN(&s->sout);\r
+  PSOCK_GENERATOR_SEND(&s->sout, generate_rtos_stats, NULL);\r
+  PSOCK_END(&s->sout);\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+\r
+char *pcStatus;\r
+extern unsigned long uxParTestGetLED( unsigned long uxLED );\r
+\r
+static unsigned short generate_io_state( void *arg )\r
+{\r
+       if( uxParTestGetLED( 0 ) )\r
+       {\r
+               pcStatus = "checked";\r
+       }\r
+       else\r
+       {\r
+               pcStatus = "";\r
+       }\r
+\r
+       sprintf( uip_appdata,\r
+               "<input type=\"checkbox\" name=\"LED0\" value=\"1\" %s>LED"\\r
+               "<p>"\\r
+               "<input type=\"text\" name=\"LCD\" value=\"Enter LCD text\" size=\"16\">",\r
+               pcStatus );\r
+\r
+       return strlen( uip_appdata );\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+\r
+static PT_THREAD(led_io(struct httpd_state *s, char *ptr))\r
+{\r
+  PSOCK_BEGIN(&s->sout);\r
+  PSOCK_GENERATOR_SEND(&s->sout, generate_io_state, NULL);\r
+  PSOCK_END(&s->sout);\r
+}\r
+\r
+/** @} */\r
+\r
+\r
+\r
+\r
+\r
+\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/httpd-cgi.h b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/httpd-cgi.h
new file mode 100644 (file)
index 0000000..7ae9283
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/httpd-cgi.h
@@ -0,0 +1,84 @@
+/**\r
+ * \addtogroup httpd\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * \file\r
+ *         Web server script interface header file\r
+ * \author\r
+ *         Adam Dunkels <adam@sics.se>\r
+ *\r
+ */\r
+\r
+\r
+\r
+/*\r
+ * Copyright (c) 2001, Adam Dunkels.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions\r
+ * are met:\r
+ * 1. Redistributions of source code must retain the above copyright\r
+ *    notice, this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright\r
+ *    notice, this list of conditions and the following disclaimer in the\r
+ *    documentation and/or other materials provided with the distribution.\r
+ * 3. The name of the author may not be used to endorse or promote\r
+ *    products derived from this software without specific prior\r
+ *    written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS\r
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\r
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY\r
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE\r
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\r
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,\r
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\r
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+ * This file is part of the uIP TCP/IP stack.\r
+ *\r
+ * $Id: httpd-cgi.h,v 1.2 2006/06/11 21:46:38 adam Exp $\r
+ *\r
+ */\r
+\r
+#ifndef __HTTPD_CGI_H__\r
+#define __HTTPD_CGI_H__\r
+\r
+#include "psock.h"\r
+#include "httpd.h"\r
+\r
+typedef PT_THREAD((* httpd_cgifunction)(struct httpd_state *, char *));\r
+\r
+httpd_cgifunction httpd_cgi(char *name);\r
+\r
+struct httpd_cgi_call {\r
+  const char *name;\r
+  const httpd_cgifunction function;\r
+};\r
+\r
+/**\r
+ * \brief      HTTPD CGI function declaration\r
+ * \param name The C variable name of the function\r
+ * \param str  The string name of the function, used in the script file\r
+ * \param function A pointer to the function that implements it\r
+ *\r
+ *             This macro is used for declaring a HTTPD CGI\r
+ *             function. This function is then added to the list of\r
+ *             HTTPD CGI functions with the httpd_cgi_add() function.\r
+ *\r
+ * \hideinitializer\r
+ */\r
+#define HTTPD_CGI_CALL(name, str, function) \\r
+static PT_THREAD(function(struct httpd_state *, char *)); \\r
+static const struct httpd_cgi_call name = {str, function}\r
+\r
+void httpd_cgi_init(void);\r
+#endif /* __HTTPD_CGI_H__ */\r
+\r
+/** @} */\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/httpd-fs.c b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/httpd-fs.c
new file mode 100644 (file)
index 0000000..dc4aef0
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/httpd-fs.c
@@ -0,0 +1,132 @@
+/*\r
+ * Copyright (c) 2001, Swedish Institute of Computer Science.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions\r
+ * are met:\r
+ * 1. Redistributions of source code must retain the above copyright\r
+ *    notice, this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright\r
+ *    notice, this list of conditions and the following disclaimer in the\r
+ *    documentation and/or other materials provided with the distribution.\r
+ * 3. Neither the name of the Institute nor the names of its contributors\r
+ *    may be used to endorse or promote products derived from this software\r
+ *    without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND\r
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE\r
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\r
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY\r
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF\r
+ * SUCH DAMAGE.\r
+ *\r
+ * This file is part of the lwIP TCP/IP stack.\r
+ *\r
+ * Author: Adam Dunkels <adam@sics.se>\r
+ *\r
+ * $Id: httpd-fs.c,v 1.1 2006/06/07 09:13:08 adam Exp $\r
+ */\r
+\r
+#include "httpd.h"\r
+#include "httpd-fs.h"\r
+#include "httpd-fsdata.h"\r
+\r
+#ifndef NULL\r
+#define NULL 0\r
+#endif /* NULL */\r
+\r
+#include "httpd-fsdata.c"\r
+\r
+#if HTTPD_FS_STATISTICS\r
+static u16_t count[HTTPD_FS_NUMFILES];\r
+#endif /* HTTPD_FS_STATISTICS */\r
+\r
+/*-----------------------------------------------------------------------------------*/\r
+static u8_t\r
+httpd_fs_strcmp(const char *str1, const char *str2)\r
+{\r
+  u8_t i;\r
+  i = 0;\r
+ loop:\r
+\r
+  if(str2[i] == 0 ||\r
+     str1[i] == '\r' ||\r
+     str1[i] == '\n') {\r
+    return 0;\r
+  }\r
+\r
+  if(str1[i] != str2[i]) {\r
+    return 1;\r
+  }\r
+\r
+\r
+  ++i;\r
+  goto loop;\r
+}\r
+/*-----------------------------------------------------------------------------------*/\r
+int\r
+httpd_fs_open(const char *name, struct httpd_fs_file *file)\r
+{\r
+#if HTTPD_FS_STATISTICS\r
+  u16_t i = 0;\r
+#endif /* HTTPD_FS_STATISTICS */\r
+  struct httpd_fsdata_file_noconst *f;\r
+\r
+  for(f = (struct httpd_fsdata_file_noconst *)HTTPD_FS_ROOT;\r
+      f != NULL;\r
+      f = (struct httpd_fsdata_file_noconst *)f->next) {\r
+\r
+    if(httpd_fs_strcmp(name, f->name) == 0) {\r
+      file->data = f->data;\r
+      file->len = f->len;\r
+#if HTTPD_FS_STATISTICS\r
+      ++count[i];\r
+#endif /* HTTPD_FS_STATISTICS */\r
+      return 1;\r
+    }\r
+#if HTTPD_FS_STATISTICS\r
+    ++i;\r
+#endif /* HTTPD_FS_STATISTICS */\r
+\r
+  }\r
+  return 0;\r
+}\r
+/*-----------------------------------------------------------------------------------*/\r
+void\r
+httpd_fs_init(void)\r
+{\r
+#if HTTPD_FS_STATISTICS\r
+  u16_t i;\r
+  for(i = 0; i < HTTPD_FS_NUMFILES; i++) {\r
+    count[i] = 0;\r
+  }\r
+#endif /* HTTPD_FS_STATISTICS */\r
+}\r
+/*-----------------------------------------------------------------------------------*/\r
+#if HTTPD_FS_STATISTICS\r
+u16_t httpd_fs_count\r
+(char *name)\r
+{\r
+  struct httpd_fsdata_file_noconst *f;\r
+  u16_t i;\r
+\r
+  i = 0;\r
+  for(f = (struct httpd_fsdata_file_noconst *)HTTPD_FS_ROOT;\r
+      f != NULL;\r
+      f = (struct httpd_fsdata_file_noconst *)f->next) {\r
+\r
+    if(httpd_fs_strcmp(name, f->name) == 0) {\r
+      return count[i];\r
+    }\r
+    ++i;\r
+  }\r
+  return 0;\r
+}\r
+#endif /* HTTPD_FS_STATISTICS */\r
+/*-----------------------------------------------------------------------------------*/\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/httpd-fs.h b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/httpd-fs.h
new file mode 100644 (file)
index 0000000..b594eea
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/httpd-fs.h
@@ -0,0 +1,57 @@
+/*\r
+ * Copyright (c) 2001, Swedish Institute of Computer Science.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions\r
+ * are met:\r
+ * 1. Redistributions of source code must retain the above copyright\r
+ *    notice, this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright\r
+ *    notice, this list of conditions and the following disclaimer in the\r
+ *    documentation and/or other materials provided with the distribution.\r
+ * 3. Neither the name of the Institute nor the names of its contributors\r
+ *    may be used to endorse or promote products derived from this software\r
+ *    without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND\r
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE\r
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\r
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY\r
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF\r
+ * SUCH DAMAGE.\r
+ *\r
+ * This file is part of the lwIP TCP/IP stack.\r
+ *\r
+ * Author: Adam Dunkels <adam@sics.se>\r
+ *\r
+ * $Id: httpd-fs.h,v 1.1 2006/06/07 09:13:08 adam Exp $\r
+ */\r
+#ifndef __HTTPD_FS_H__\r
+#define __HTTPD_FS_H__\r
+\r
+#define HTTPD_FS_STATISTICS 1\r
+\r
+struct httpd_fs_file {\r
+  char *data;\r
+  int len;\r
+};\r
+\r
+/* file must be allocated by caller and will be filled in\r
+   by the function. */\r
+int httpd_fs_open(const char *name, struct httpd_fs_file *file);\r
+\r
+#ifdef HTTPD_FS_STATISTICS\r
+#if HTTPD_FS_STATISTICS == 1\r
+u16_t httpd_fs_count(char *name);\r
+#endif /* HTTPD_FS_STATISTICS */\r
+#endif /* HTTPD_FS_STATISTICS */\r
+\r
+void httpd_fs_init(void);\r
+\r
+#endif /* __HTTPD_FS_H__ */\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/httpd-fs/404.html b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/httpd-fs/404.html
new file mode 100644 (file)
index 0000000..43e7f4c
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/httpd-fs/404.html
@@ -0,0 +1,8 @@
+<html>\r
+  <body bgcolor="white">\r
+    <center>\r
+      <h1>404 - file not found</h1>\r
+      <h3>Go <a href="/">here</a> instead.</h3>\r
+    </center>\r
+  </body>\r
+</html>
\ No newline at end of file

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/httpd-fs/index.html b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/httpd-fs/index.html
new file mode 100644 (file)
index 0000000..1d3bbee
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/httpd-fs/index.html
@@ -0,0 +1,13 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">\r
+<html>\r
+  <head>\r
+    <title>FreeRTOS.org uIP WEB server demo</title>\r
+  </head>\r
+  <BODY onLoad="window.setTimeout(&quot;location.href='index.shtml'&quot;,100)"bgcolor="#CCCCff">\r
+<font face="arial">\r
+Loading index.shtml.  Click <a href="index.shtml">here</a> if not automatically redirected.\r
+</font>\r
+</font>\r
+</body>\r
+</html>\r
+\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/httpd-fs/index.shtml b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/httpd-fs/index.shtml
new file mode 100644 (file)
index 0000000..1923ea7
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/httpd-fs/index.shtml
@@ -0,0 +1,20 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">\r
+<html>\r
+  <head>\r
+    <title>FreeRTOS.org uIP WEB server demo</title>\r
+  </head>\r
+  <BODY onLoad="window.setTimeout(&quot;location.href='index.shtml'&quot;,2000)"bgcolor="#CCCCff">\r
+<font face="arial">\r
+<a href="index.shtml">RTOS Stats</a> <b>|</b> <a href="stats.shtml">TCP Stats</a> <b>|</b> <a href="tcp.shtml">Connections</a> <b>|</b> <a href="http://www.freertos.org/">FreeRTOS.org Homepage</a> <b>|</b> <a href="io.shtml">IO</a>\r
+<br><p>\r
+<hr>\r
+<br><p>\r
+<h2>Task statistics</h2>\r
+Page will refresh every 2 seconds.<p>\r
+<font face="courier"><pre>Task          State  Priority  Stack #<br>************************************************<br>\r
+%! rtos-stats\r
+</pre></font>\r
+</font>\r
+</body>\r
+</html>\r
+\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/httpd-fs/io.shtml b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/httpd-fs/io.shtml
new file mode 100644 (file)
index 0000000..07554bb
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/httpd-fs/io.shtml
@@ -0,0 +1,28 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">\r
+<html>\r
+  <head>\r
+    <title>FreeRTOS.org uIP WEB server demo</title>\r
+  </head>\r
+  <BODY bgcolor="#CCCCff">\r
+<font face="arial">\r
+<a href="index.shtml">RTOS Stats</a> <b>|</b> <a href="stats.shtml">TCP Stats</a> <b>|</b> <a href="tcp.shtml">Connections</a> <b>|</b> <a href="http://www.freertos.org/">FreeRTOS.org Homepage</a> <b>|</b> <a href="io.shtml">IO</a>\r
+<br><p>\r
+<hr>\r
+<b>LED and LCD IO</b><br>\r
+\r
+<p>\r
+\r
+Use the check box to turn on or off the LED, enter text to display on the OLED display, then click "Update IO".\r
+\r
+\r
+<p>\r
+<form name="aForm" action="/io.shtml" method="get">\r
+%! led-io\r
+<p>\r
+<input type="submit" value="Update IO">\r
+</form>\r
+<br><p>\r
+</font>\r
+</body>\r
+</html>\r
+\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/httpd-fs/stats.shtml b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/httpd-fs/stats.shtml
new file mode 100644 (file)
index 0000000..d762f40
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/httpd-fs/stats.shtml
@@ -0,0 +1,41 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">\r
+<html>\r
+  <head>\r
+    <title>FreeRTOS.org uIP WEB server demo</title>\r
+  </head>\r
+  <BODY bgcolor="#CCCCff">\r
+<font face="arial">\r
+<a href="index.shtml">RTOS Stats</a> <b>|</b> <a href="stats.shtml">TCP Stats</a> <b>|</b> <a href="tcp.shtml">Connections</a> <b>|</b> <a href="http://www.freertos.org/">FreeRTOS.org Homepage</a> <b>|</b> <a href="io.shtml">IO</a>\r
+<br><p>\r
+<hr>\r
+<br><p>\r
+<h2>Network statistics</h2>\r
+<table width="300" border="0">\r
+<tr><td align="left"><font face="courier"><pre>\r
+IP           Packets dropped\r
+             Packets received\r
+             Packets sent\r
+IP errors    IP version/header length\r
+             IP length, high byte\r
+             IP length, low byte\r
+             IP fragments\r
+             Header checksum\r
+             Wrong protocol\r
+ICMP        Packets dropped\r
+             Packets received\r
+             Packets sent\r
+             Type errors\r
+TCP          Packets dropped\r
+             Packets received\r
+             Packets sent\r
+             Checksum errors\r
+             Data packets without ACKs\r
+             Resets\r
+             Retransmissions\r
+            No connection avaliable\r
+            Connection attempts to closed ports\r
+</pre></font></td><td><pre>%! net-stats\r
+</pre></table>\r
+</font>\r
+</body>\r
+</html>\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/httpd-fs/tcp.shtml b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/httpd-fs/tcp.shtml
new file mode 100644 (file)
index 0000000..654d61f
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/httpd-fs/tcp.shtml
@@ -0,0 +1,21 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">\r
+<html>\r
+  <head>\r
+    <title>FreeRTOS.org uIP WEB server demo</title>\r
+  </head>\r
+  <BODY bgcolor="#CCCCff">\r
+<font face="arial">\r
+<a href="index.shtml">RTOS Stats</a> <b>|</b> <a href="stats.shtml">TCP Stats</a> <b>|</b> <a href="tcp.shtml">Connections</a> <b>|</b> <a href="http://www.freertos.org/">FreeRTOS.org Homepage</a> <b>|</b> <a href="io.shtml">IO</a>\r
+<br><p>\r
+<hr>\r
+<br>\r
+<h2>Network connections</h2>\r
+<p>\r
+<table>\r
+<tr><th>Local</th><th>Remote</th><th>State</th><th>Retransmissions</th><th>Timer</th><th>Flags</th></tr>\r
+%! tcp-connections\r
+</pre></font>\r
+</font>\r
+</body>\r
+</html>\r
+\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/httpd-fsdata.c b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/httpd-fsdata.c
new file mode 100644 (file)
index 0000000..a7fcfab
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/httpd-fsdata.c
@@ -0,0 +1,470 @@
+static const unsigned char data_404_html[] = {\r
+       /* /404.html */\r
+       0x2f, 0x34, 0x30, 0x34, 0x2e, 0x68, 0x74, 0x6d, 0x6c, 0,\r
+       0x3c, 0x68, 0x74, 0x6d, 0x6c, 0x3e, 0xd, 0xa, 0x20, 0x20, \r
+       0x3c, 0x62, 0x6f, 0x64, 0x79, 0x20, 0x62, 0x67, 0x63, 0x6f, \r
+       0x6c, 0x6f, 0x72, 0x3d, 0x22, 0x77, 0x68, 0x69, 0x74, 0x65, \r
+       0x22, 0x3e, 0xd, 0xa, 0x20, 0x20, 0x20, 0x20, 0x3c, 0x63, \r
+       0x65, 0x6e, 0x74, 0x65, 0x72, 0x3e, 0xd, 0xa, 0x20, 0x20, \r
+       0x20, 0x20, 0x20, 0x20, 0x3c, 0x68, 0x31, 0x3e, 0x34, 0x30, \r
+       0x34, 0x20, 0x2d, 0x20, 0x66, 0x69, 0x6c, 0x65, 0x20, 0x6e, \r
+       0x6f, 0x74, 0x20, 0x66, 0x6f, 0x75, 0x6e, 0x64, 0x3c, 0x2f, \r
+       0x68, 0x31, 0x3e, 0xd, 0xa, 0x20, 0x20, 0x20, 0x20, 0x20, \r
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+       0x69, 0x74, 0x68, 0x6f, 0x75, 0x74, 0x20, 0x41, 0x43, 0x4b, \r
+       0x73, 0xd, 0xa, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, \r
+       0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x52, 0x65, 0x73, 0x65, \r
+       0x74, 0x73, 0xd, 0xa, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, \r
+       0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x52, 0x65, 0x74, \r
+       0x72, 0x61, 0x6e, 0x73, 0x6d, 0x69, 0x73, 0x73, 0x69, 0x6f, \r
+       0x6e, 0x73, 0xd, 0xa, 0x9, 0x20, 0x20, 0x20, 0x20, 0x20, \r
+       0x4e, 0x6f, 0x20, 0x63, 0x6f, 0x6e, 0x6e, 0x65, 0x63, 0x74, \r
+       0x69, 0x6f, 0x6e, 0x20, 0x61, 0x76, 0x61, 0x6c, 0x69, 0x61, \r
+       0x62, 0x6c, 0x65, 0xd, 0xa, 0x9, 0x20, 0x20, 0x20, 0x20, \r
+       0x20, 0x43, 0x6f, 0x6e, 0x6e, 0x65, 0x63, 0x74, 0x69, 0x6f, \r
+       0x6e, 0x20, 0x61, 0x74, 0x74, 0x65, 0x6d, 0x70, 0x74, 0x73, \r
+       0x20, 0x74, 0x6f, 0x20, 0x63, 0x6c, 0x6f, 0x73, 0x65, 0x64, \r
+       0x20, 0x70, 0x6f, 0x72, 0x74, 0x73, 0xd, 0xa, 0x3c, 0x2f, \r
+       0x70, 0x72, 0x65, 0x3e, 0x3c, 0x2f, 0x66, 0x6f, 0x6e, 0x74, \r
+       0x3e, 0x3c, 0x2f, 0x74, 0x64, 0x3e, 0x3c, 0x74, 0x64, 0x3e, \r
+       0x3c, 0x70, 0x72, 0x65, 0x3e, 0x25, 0x21, 0x20, 0x6e, 0x65, \r
+       0x74, 0x2d, 0x73, 0x74, 0x61, 0x74, 0x73, 0xd, 0xa, 0x3c, \r
+       0x2f, 0x70, 0x72, 0x65, 0x3e, 0x3c, 0x2f, 0x74, 0x61, 0x62, \r
+       0x6c, 0x65, 0x3e, 0xd, 0xa, 0x3c, 0x2f, 0x66, 0x6f, 0x6e, \r
+       0x74, 0x3e, 0xd, 0xa, 0x3c, 0x2f, 0x62, 0x6f, 0x64, 0x79, \r
+       0x3e, 0xd, 0xa, 0x3c, 0x2f, 0x68, 0x74, 0x6d, 0x6c, 0x3e, \r
+       0xd, 0xa, 0};\r
+\r
+static const unsigned char data_tcp_shtml[] = {\r
+       /* /tcp.shtml */\r
+       0x2f, 0x74, 0x63, 0x70, 0x2e, 0x73, 0x68, 0x74, 0x6d, 0x6c, 0,\r
+       0x3c, 0x21, 0x44, 0x4f, 0x43, 0x54, 0x59, 0x50, 0x45, 0x20, \r
+       0x48, 0x54, 0x4d, 0x4c, 0x20, 0x50, 0x55, 0x42, 0x4c, 0x49, \r
+       0x43, 0x20, 0x22, 0x2d, 0x2f, 0x2f, 0x57, 0x33, 0x43, 0x2f, \r
+       0x2f, 0x44, 0x54, 0x44, 0x20, 0x48, 0x54, 0x4d, 0x4c, 0x20, \r
+       0x34, 0x2e, 0x30, 0x31, 0x20, 0x54, 0x72, 0x61, 0x6e, 0x73, \r
+       0x69, 0x74, 0x69, 0x6f, 0x6e, 0x61, 0x6c, 0x2f, 0x2f, 0x45, \r
+       0x4e, 0x22, 0x20, 0x22, 0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, \r
+       0x2f, 0x77, 0x77, 0x77, 0x2e, 0x77, 0x33, 0x2e, 0x6f, 0x72, \r
+       0x67, 0x2f, 0x54, 0x52, 0x2f, 0x68, 0x74, 0x6d, 0x6c, 0x34, \r
+       0x2f, 0x6c, 0x6f, 0x6f, 0x73, 0x65, 0x2e, 0x64, 0x74, 0x64, \r
+       0x22, 0x3e, 0xd, 0xa, 0x3c, 0x68, 0x74, 0x6d, 0x6c, 0x3e, \r
+       0xd, 0xa, 0x20, 0x20, 0x3c, 0x68, 0x65, 0x61, 0x64, 0x3e, \r
+       0xd, 0xa, 0x20, 0x20, 0x20, 0x20, 0x3c, 0x74, 0x69, 0x74, \r
+       0x6c, 0x65, 0x3e, 0x46, 0x72, 0x65, 0x65, 0x52, 0x54, 0x4f, \r
+       0x53, 0x2e, 0x6f, 0x72, 0x67, 0x20, 0x75, 0x49, 0x50, 0x20, \r
+       0x57, 0x45, 0x42, 0x20, 0x73, 0x65, 0x72, 0x76, 0x65, 0x72, \r
+       0x20, 0x64, 0x65, 0x6d, 0x6f, 0x3c, 0x2f, 0x74, 0x69, 0x74, \r
+       0x6c, 0x65, 0x3e, 0xd, 0xa, 0x20, 0x20, 0x3c, 0x2f, 0x68, \r
+       0x65, 0x61, 0x64, 0x3e, 0xd, 0xa, 0x20, 0x20, 0x3c, 0x42, \r
+       0x4f, 0x44, 0x59, 0x20, 0x62, 0x67, 0x63, 0x6f, 0x6c, 0x6f, \r
+       0x72, 0x3d, 0x22, 0x23, 0x43, 0x43, 0x43, 0x43, 0x66, 0x66, \r
+       0x22, 0x3e, 0xd, 0xa, 0x3c, 0x66, 0x6f, 0x6e, 0x74, 0x20, \r
+       0x66, 0x61, 0x63, 0x65, 0x3d, 0x22, 0x61, 0x72, 0x69, 0x61, \r
+       0x6c, 0x22, 0x3e, 0xd, 0xa, 0x3c, 0x61, 0x20, 0x68, 0x72, \r
+       0x65, 0x66, 0x3d, 0x22, 0x69, 0x6e, 0x64, 0x65, 0x78, 0x2e, \r
+       0x73, 0x68, 0x74, 0x6d, 0x6c, 0x22, 0x3e, 0x52, 0x54, 0x4f, \r
+       0x53, 0x20, 0x53, 0x74, 0x61, 0x74, 0x73, 0x3c, 0x2f, 0x61, \r
+       0x3e, 0x20, 0x3c, 0x62, 0x3e, 0x7c, 0x3c, 0x2f, 0x62, 0x3e, \r
+       0x20, 0x3c, 0x61, 0x20, 0x68, 0x72, 0x65, 0x66, 0x3d, 0x22, \r
+       0x73, 0x74, 0x61, 0x74, 0x73, 0x2e, 0x73, 0x68, 0x74, 0x6d, \r
+       0x6c, 0x22, 0x3e, 0x54, 0x43, 0x50, 0x20, 0x53, 0x74, 0x61, \r
+       0x74, 0x73, 0x3c, 0x2f, 0x61, 0x3e, 0x20, 0x3c, 0x62, 0x3e, \r
+       0x7c, 0x3c, 0x2f, 0x62, 0x3e, 0x20, 0x3c, 0x61, 0x20, 0x68, \r
+       0x72, 0x65, 0x66, 0x3d, 0x22, 0x74, 0x63, 0x70, 0x2e, 0x73, \r
+       0x68, 0x74, 0x6d, 0x6c, 0x22, 0x3e, 0x43, 0x6f, 0x6e, 0x6e, \r
+       0x65, 0x63, 0x74, 0x69, 0x6f, 0x6e, 0x73, 0x3c, 0x2f, 0x61, \r
+       0x3e, 0x20, 0x3c, 0x62, 0x3e, 0x7c, 0x3c, 0x2f, 0x62, 0x3e, \r
+       0x20, 0x3c, 0x61, 0x20, 0x68, 0x72, 0x65, 0x66, 0x3d, 0x22, \r
+       0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, 0x77, 0x77, 0x77, \r
+       0x2e, 0x66, 0x72, 0x65, 0x65, 0x72, 0x74, 0x6f, 0x73, 0x2e, \r
+       0x6f, 0x72, 0x67, 0x2f, 0x22, 0x3e, 0x46, 0x72, 0x65, 0x65, \r
+       0x52, 0x54, 0x4f, 0x53, 0x2e, 0x6f, 0x72, 0x67, 0x20, 0x48, \r
+       0x6f, 0x6d, 0x65, 0x70, 0x61, 0x67, 0x65, 0x3c, 0x2f, 0x61, \r
+       0x3e, 0x20, 0x3c, 0x62, 0x3e, 0x7c, 0x3c, 0x2f, 0x62, 0x3e, \r
+       0x20, 0x3c, 0x61, 0x20, 0x68, 0x72, 0x65, 0x66, 0x3d, 0x22, \r
+       0x69, 0x6f, 0x2e, 0x73, 0x68, 0x74, 0x6d, 0x6c, 0x22, 0x3e, \r
+       0x49, 0x4f, 0x3c, 0x2f, 0x61, 0x3e, 0xd, 0xa, 0x3c, 0x62, \r
+       0x72, 0x3e, 0x3c, 0x70, 0x3e, 0xd, 0xa, 0x3c, 0x68, 0x72, \r
+       0x3e, 0xd, 0xa, 0x3c, 0x62, 0x72, 0x3e, 0xd, 0xa, 0x3c, \r
+       0x68, 0x32, 0x3e, 0x4e, 0x65, 0x74, 0x77, 0x6f, 0x72, 0x6b, \r
+       0x20, 0x63, 0x6f, 0x6e, 0x6e, 0x65, 0x63, 0x74, 0x69, 0x6f, \r
+       0x6e, 0x73, 0x3c, 0x2f, 0x68, 0x32, 0x3e, 0xd, 0xa, 0x3c, \r
+       0x70, 0x3e, 0xd, 0xa, 0x3c, 0x74, 0x61, 0x62, 0x6c, 0x65, \r
+       0x3e, 0xd, 0xa, 0x3c, 0x74, 0x72, 0x3e, 0x3c, 0x74, 0x68, \r
+       0x3e, 0x4c, 0x6f, 0x63, 0x61, 0x6c, 0x3c, 0x2f, 0x74, 0x68, \r
+       0x3e, 0x3c, 0x74, 0x68, 0x3e, 0x52, 0x65, 0x6d, 0x6f, 0x74, \r
+       0x65, 0x3c, 0x2f, 0x74, 0x68, 0x3e, 0x3c, 0x74, 0x68, 0x3e, \r
+       0x53, 0x74, 0x61, 0x74, 0x65, 0x3c, 0x2f, 0x74, 0x68, 0x3e, \r
+       0x3c, 0x74, 0x68, 0x3e, 0x52, 0x65, 0x74, 0x72, 0x61, 0x6e, \r
+       0x73, 0x6d, 0x69, 0x73, 0x73, 0x69, 0x6f, 0x6e, 0x73, 0x3c, \r
+       0x2f, 0x74, 0x68, 0x3e, 0x3c, 0x74, 0x68, 0x3e, 0x54, 0x69, \r
+       0x6d, 0x65, 0x72, 0x3c, 0x2f, 0x74, 0x68, 0x3e, 0x3c, 0x74, \r
+       0x68, 0x3e, 0x46, 0x6c, 0x61, 0x67, 0x73, 0x3c, 0x2f, 0x74, \r
+       0x68, 0x3e, 0x3c, 0x2f, 0x74, 0x72, 0x3e, 0xd, 0xa, 0x25, \r
+       0x21, 0x20, 0x74, 0x63, 0x70, 0x2d, 0x63, 0x6f, 0x6e, 0x6e, \r
+       0x65, 0x63, 0x74, 0x69, 0x6f, 0x6e, 0x73, 0xd, 0xa, 0x3c, \r
+       0x2f, 0x70, 0x72, 0x65, 0x3e, 0x3c, 0x2f, 0x66, 0x6f, 0x6e, \r
+       0x74, 0x3e, 0xd, 0xa, 0x3c, 0x2f, 0x66, 0x6f, 0x6e, 0x74, \r
+       0x3e, 0xd, 0xa, 0x3c, 0x2f, 0x62, 0x6f, 0x64, 0x79, 0x3e, \r
+       0xd, 0xa, 0x3c, 0x2f, 0x68, 0x74, 0x6d, 0x6c, 0x3e, 0xd, \r
+       0xa, 0xd, 0xa, 0};\r
+\r
+const struct httpd_fsdata_file file_404_html[] = {{NULL, data_404_html, data_404_html + 10, sizeof(data_404_html) - 10}};\r
+\r
+const struct httpd_fsdata_file file_index_html[] = {{file_404_html, data_index_html, data_index_html + 12, sizeof(data_index_html) - 12}};\r
+\r
+const struct httpd_fsdata_file file_index_shtml[] = {{file_index_html, data_index_shtml, data_index_shtml + 13, sizeof(data_index_shtml) - 13}};\r
+\r
+const struct httpd_fsdata_file file_io_shtml[] = {{file_index_shtml, data_io_shtml, data_io_shtml + 10, sizeof(data_io_shtml) - 10}};\r
+\r
+const struct httpd_fsdata_file file_stats_shtml[] = {{file_io_shtml, data_stats_shtml, data_stats_shtml + 13, sizeof(data_stats_shtml) - 13}};\r
+\r
+const struct httpd_fsdata_file file_tcp_shtml[] = {{file_stats_shtml, data_tcp_shtml, data_tcp_shtml + 11, sizeof(data_tcp_shtml) - 11}};\r
+\r
+#define HTTPD_FS_ROOT file_tcp_shtml\r
+\r
+#define HTTPD_FS_NUMFILES 6\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/httpd-fsdata.h b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/httpd-fsdata.h
new file mode 100644 (file)
index 0000000..52d35c2
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/httpd-fsdata.h
@@ -0,0 +1,64 @@
+/*\r
+ * Copyright (c) 2001, Swedish Institute of Computer Science.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions\r
+ * are met:\r
+ * 1. Redistributions of source code must retain the above copyright\r
+ *    notice, this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright\r
+ *    notice, this list of conditions and the following disclaimer in the\r
+ *    documentation and/or other materials provided with the distribution.\r
+ * 3. Neither the name of the Institute nor the names of its contributors\r
+ *    may be used to endorse or promote products derived from this software\r
+ *    without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND\r
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE\r
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\r
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY\r
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF\r
+ * SUCH DAMAGE.\r
+ *\r
+ * This file is part of the lwIP TCP/IP stack.\r
+ *\r
+ * Author: Adam Dunkels <adam@sics.se>\r
+ *\r
+ * $Id: httpd-fsdata.h,v 1.1 2006/06/07 09:13:08 adam Exp $\r
+ */\r
+#ifndef __HTTPD_FSDATA_H__\r
+#define __HTTPD_FSDATA_H__\r
+\r
+#include "uip.h"\r
+\r
+struct httpd_fsdata_file {\r
+  const struct httpd_fsdata_file *next;\r
+  const char *name;\r
+  const char *data;\r
+  const int len;\r
+#ifdef HTTPD_FS_STATISTICS\r
+#if HTTPD_FS_STATISTICS == 1\r
+  u16_t count;\r
+#endif /* HTTPD_FS_STATISTICS */\r
+#endif /* HTTPD_FS_STATISTICS */\r
+};\r
+\r
+struct httpd_fsdata_file_noconst {\r
+  struct httpd_fsdata_file *next;\r
+  char *name;\r
+  char *data;\r
+  int len;\r
+#ifdef HTTPD_FS_STATISTICS\r
+#if HTTPD_FS_STATISTICS == 1\r
+  u16_t count;\r
+#endif /* HTTPD_FS_STATISTICS */\r
+#endif /* HTTPD_FS_STATISTICS */\r
+};\r
+\r
+#endif /* __HTTPD_FSDATA_H__ */\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/httpd.c b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/httpd.c
new file mode 100644 (file)
index 0000000..644cf16
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/httpd.c
@@ -0,0 +1,346 @@
+/**\r
+ * \addtogroup apps\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * \defgroup httpd Web server\r
+ * @{\r
+ * The uIP web server is a very simplistic implementation of an HTTP\r
+ * server. It can serve web pages and files from a read-only ROM\r
+ * filesystem, and provides a very small scripting language.\r
+\r
+ */\r
+\r
+/**\r
+ * \file\r
+ *         Web server\r
+ * \author\r
+ *         Adam Dunkels <adam@sics.se>\r
+ */\r
+\r
+\r
+/*\r
+ * Copyright (c) 2004, Adam Dunkels.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions\r
+ * are met:\r
+ * 1. Redistributions of source code must retain the above copyright\r
+ *    notice, this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright\r
+ *    notice, this list of conditions and the following disclaimer in the\r
+ *    documentation and/or other materials provided with the distribution.\r
+ * 3. Neither the name of the Institute nor the names of its contributors\r
+ *    may be used to endorse or promote products derived from this software\r
+ *    without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND\r
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE\r
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\r
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY\r
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF\r
+ * SUCH DAMAGE.\r
+ *\r
+ * This file is part of the uIP TCP/IP stack.\r
+ *\r
+ * Author: Adam Dunkels <adam@sics.se>\r
+ *\r
+ * $Id: httpd.c,v 1.2 2006/06/11 21:46:38 adam Exp $\r
+ */\r
+\r
+#include "uip.h"\r
+#include "httpd.h"\r
+#include "httpd-fs.h"\r
+#include "httpd-cgi.h"\r
+#include "http-strings.h"\r
+\r
+#include <string.h>\r
+\r
+#define STATE_WAITING 0\r
+#define STATE_OUTPUT  1\r
+\r
+#define ISO_nl      0x0a\r
+#define ISO_space   0x20\r
+#define ISO_bang    0x21\r
+#define ISO_percent 0x25\r
+#define ISO_period  0x2e\r
+#define ISO_slash   0x2f\r
+#define ISO_colon   0x3a\r
+\r
+\r
+/*---------------------------------------------------------------------------*/\r
+static unsigned short\r
+generate_part_of_file(void *state)\r
+{\r
+  struct httpd_state *s = (struct httpd_state *)state;\r
+\r
+  if(s->file.len > uip_mss()) {\r
+    s->len = uip_mss();\r
+  } else {\r
+    s->len = s->file.len;\r
+  }\r
+  memcpy(uip_appdata, s->file.data, s->len);\r
+  \r
+  return s->len;\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static\r
+PT_THREAD(send_file(struct httpd_state *s))\r
+{\r
+  PSOCK_BEGIN(&s->sout);\r
+  \r
+  do {\r
+    PSOCK_GENERATOR_SEND(&s->sout, generate_part_of_file, s);\r
+    s->file.len -= s->len;\r
+    s->file.data += s->len;\r
+  } while(s->file.len > 0);\r
+      \r
+  PSOCK_END(&s->sout);\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static\r
+PT_THREAD(send_part_of_file(struct httpd_state *s))\r
+{\r
+  PSOCK_BEGIN(&s->sout);\r
+\r
+  PSOCK_SEND(&s->sout, s->file.data, s->len);\r
+  \r
+  PSOCK_END(&s->sout);\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static void\r
+next_scriptstate(struct httpd_state *s)\r
+{\r
+  char *p;\r
+  p = strchr(s->scriptptr, ISO_nl) + 1;\r
+  s->scriptlen -= (unsigned short)(p - s->scriptptr);\r
+  s->scriptptr = p;\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static\r
+PT_THREAD(handle_script(struct httpd_state *s))\r
+{\r
+  char *ptr;\r
+  \r
+  PT_BEGIN(&s->scriptpt);\r
+\r
+\r
+  while(s->file.len > 0) {\r
+\r
+    /* Check if we should start executing a script. */\r
+    if(*s->file.data == ISO_percent &&\r
+       *(s->file.data + 1) == ISO_bang) {\r
+      s->scriptptr = s->file.data + 3;\r
+      s->scriptlen = s->file.len - 3;\r
+      if(*(s->scriptptr - 1) == ISO_colon) {\r
+       httpd_fs_open(s->scriptptr + 1, &s->file);\r
+       PT_WAIT_THREAD(&s->scriptpt, send_file(s));\r
+      } else {\r
+       PT_WAIT_THREAD(&s->scriptpt,\r
+                      httpd_cgi(s->scriptptr)(s, s->scriptptr));\r
+      }\r
+      next_scriptstate(s);\r
+      \r
+      /* The script is over, so we reset the pointers and continue\r
+        sending the rest of the file. */\r
+      s->file.data = s->scriptptr;\r
+      s->file.len = s->scriptlen;\r
+    } else {\r
+      /* See if we find the start of script marker in the block of HTML\r
+        to be sent. */\r
+\r
+      if(s->file.len > uip_mss()) {\r
+       s->len = uip_mss();\r
+      } else {\r
+       s->len = s->file.len;\r
+      }\r
+\r
+      if(*s->file.data == ISO_percent) {\r
+       ptr = strchr(s->file.data + 1, ISO_percent);\r
+      } else {\r
+       ptr = strchr(s->file.data, ISO_percent);\r
+      }\r
+      if(ptr != NULL &&\r
+        ptr != s->file.data) {\r
+       s->len = (int)(ptr - s->file.data);\r
+       if(s->len >= uip_mss()) {\r
+         s->len = uip_mss();\r
+       }\r
+      }\r
+      PT_WAIT_THREAD(&s->scriptpt, send_part_of_file(s));\r
+      s->file.data += s->len;\r
+      s->file.len -= s->len;\r
+      \r
+    }\r
+  }\r
+  \r
+  PT_END(&s->scriptpt);\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static\r
+PT_THREAD(send_headers(struct httpd_state *s, const char *statushdr))\r
+{\r
+  char *ptr;\r
+\r
+  PSOCK_BEGIN(&s->sout);\r
+\r
+  PSOCK_SEND_STR(&s->sout, statushdr);\r
+\r
+  ptr = strrchr(s->filename, ISO_period);\r
+  if(ptr == NULL) {\r
+    PSOCK_SEND_STR(&s->sout, http_content_type_binary);\r
+  } else if(strncmp(http_html, ptr, 5) == 0 ||\r
+           strncmp(http_shtml, ptr, 6) == 0) {\r
+    PSOCK_SEND_STR(&s->sout, http_content_type_html);\r
+  } else if(strncmp(http_css, ptr, 4) == 0) {\r
+    PSOCK_SEND_STR(&s->sout, http_content_type_css);\r
+  } else if(strncmp(http_png, ptr, 4) == 0) {\r
+    PSOCK_SEND_STR(&s->sout, http_content_type_png);\r
+  } else if(strncmp(http_gif, ptr, 4) == 0) {\r
+    PSOCK_SEND_STR(&s->sout, http_content_type_gif);\r
+  } else if(strncmp(http_jpg, ptr, 4) == 0) {\r
+    PSOCK_SEND_STR(&s->sout, http_content_type_jpg);\r
+  } else {\r
+    PSOCK_SEND_STR(&s->sout, http_content_type_plain);\r
+  }\r
+  PSOCK_END(&s->sout);\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static\r
+PT_THREAD(handle_output(struct httpd_state *s))\r
+{\r
+  char *ptr;\r
+  \r
+  PT_BEGIN(&s->outputpt);\r
+ \r
+  if(!httpd_fs_open(s->filename, &s->file)) {\r
+    httpd_fs_open(http_404_html, &s->file);\r
+    strcpy(s->filename, http_404_html);\r
+    PT_WAIT_THREAD(&s->outputpt,\r
+                  send_headers(s,\r
+                  http_header_404));\r
+    PT_WAIT_THREAD(&s->outputpt,\r
+                  send_file(s));\r
+  } else {\r
+    PT_WAIT_THREAD(&s->outputpt,\r
+                  send_headers(s,\r
+                  http_header_200));\r
+    ptr = strchr(s->filename, ISO_period);\r
+    if(ptr != NULL && strncmp(ptr, http_shtml, 6) == 0) {\r
+      PT_INIT(&s->scriptpt);\r
+      PT_WAIT_THREAD(&s->outputpt, handle_script(s));\r
+    } else {\r
+      PT_WAIT_THREAD(&s->outputpt,\r
+                    send_file(s));\r
+    }\r
+  }\r
+  PSOCK_CLOSE(&s->sout);\r
+  PT_END(&s->outputpt);\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static\r
+PT_THREAD(handle_input(struct httpd_state *s))\r
+{\r
+  PSOCK_BEGIN(&s->sin);\r
+\r
+  PSOCK_READTO(&s->sin, ISO_space);\r
+\r
+  \r
+  if(strncmp(s->inputbuf, http_get, 4) != 0) {\r
+    PSOCK_CLOSE_EXIT(&s->sin);\r
+  }\r
+  PSOCK_READTO(&s->sin, ISO_space);\r
+\r
+  if(s->inputbuf[0] != ISO_slash) {\r
+    PSOCK_CLOSE_EXIT(&s->sin);\r
+  }\r
+\r
+  if(s->inputbuf[1] == ISO_space) {\r
+    strncpy(s->filename, http_index_html, sizeof(s->filename));\r
+  } else {\r
+\r
+    s->inputbuf[PSOCK_DATALEN(&s->sin) - 1] = 0;\r
+\r
+    /* Process any form input being sent to the server. */\r
+    {\r
+        extern void vApplicationProcessFormInput( char *pcInputString, long xInputLength );\r
+        vApplicationProcessFormInput( s->inputbuf, PSOCK_DATALEN(&s->sin) );\r
+    }\r
+\r
+    strncpy(s->filename, &s->inputbuf[0], sizeof(s->filename));\r
+  }\r
+\r
+  /*  httpd_log_file(uip_conn->ripaddr, s->filename);*/\r
+  \r
+  s->state = STATE_OUTPUT;\r
+\r
+  while(1) {\r
+    PSOCK_READTO(&s->sin, ISO_nl);\r
+\r
+    if(strncmp(s->inputbuf, http_referer, 8) == 0) {\r
+      s->inputbuf[PSOCK_DATALEN(&s->sin) - 2] = 0;\r
+      /*      httpd_log(&s->inputbuf[9]);*/\r
+    }\r
+  }\r
+  \r
+  PSOCK_END(&s->sin);\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static void\r
+handle_connection(struct httpd_state *s)\r
+{\r
+  handle_input(s);\r
+  if(s->state == STATE_OUTPUT) {\r
+    handle_output(s);\r
+  }\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+void\r
+httpd_appcall(void)\r
+{\r
+  struct httpd_state *s = (struct httpd_state *)&(uip_conn->appstate);\r
+\r
+  if(uip_closed() || uip_aborted() || uip_timedout()) {\r
+  } else if(uip_connected()) {\r
+    PSOCK_INIT(&s->sin, s->inputbuf, sizeof(s->inputbuf) - 1);\r
+    PSOCK_INIT(&s->sout, s->inputbuf, sizeof(s->inputbuf) - 1);\r
+    PT_INIT(&s->outputpt);\r
+    s->state = STATE_WAITING;\r
+    /*    timer_set(&s->timer, CLOCK_SECOND * 100);*/\r
+    s->timer = 0;\r
+    handle_connection(s);\r
+  } else if(s != NULL) {\r
+    if(uip_poll()) {\r
+      ++s->timer;\r
+      if(s->timer >= 20) {\r
+       uip_abort();\r
+      }\r
+    } else {\r
+      s->timer = 0;\r
+    }\r
+    handle_connection(s);\r
+  } else {\r
+    uip_abort();\r
+  }\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+/**\r
+ * \brief      Initialize the web server\r
+ *\r
+ *             This function initializes the web server and should be\r
+ *             called at system boot-up.\r
+ */\r
+void\r
+httpd_init(void)\r
+{\r
+  uip_listen(HTONS(80));\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+/** @} */\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/httpd.h b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/httpd.h
new file mode 100644 (file)
index 0000000..7f7a666
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/httpd.h
@@ -0,0 +1,62 @@
+/*\r
+ * Copyright (c) 2001-2005, Adam Dunkels.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions\r
+ * are met:\r
+ * 1. Redistributions of source code must retain the above copyright\r
+ *    notice, this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright\r
+ *    notice, this list of conditions and the following disclaimer in the\r
+ *    documentation and/or other materials provided with the distribution.\r
+ * 3. The name of the author may not be used to endorse or promote\r
+ *    products derived from this software without specific prior\r
+ *    written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS\r
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\r
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY\r
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE\r
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\r
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,\r
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\r
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+ * This file is part of the uIP TCP/IP stack.\r
+ *\r
+ * $Id: httpd.h,v 1.2 2006/06/11 21:46:38 adam Exp $\r
+ *\r
+ */\r
+\r
+#ifndef __HTTPD_H__\r
+#define __HTTPD_H__\r
+\r
+#include "psock.h"\r
+#include "httpd-fs.h"\r
+\r
+struct httpd_state {\r
+  unsigned char timer;\r
+  struct psock sin, sout;\r
+  struct pt outputpt, scriptpt;\r
+  char inputbuf[50];\r
+  char filename[20];\r
+  char state;\r
+  struct httpd_fs_file file;\r
+  int len;\r
+  char *scriptptr;\r
+  int scriptlen;\r
+  \r
+  unsigned short count;\r
+};\r
+\r
+void httpd_init(void);\r
+void httpd_appcall(void);\r
+\r
+void httpd_log(char *msg);\r
+void httpd_log_file(u16_t *requester, char *file);\r
+\r
+#endif /* __HTTPD_H__ */\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/makefsdata b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/makefsdata
new file mode 100644 (file)
index 0000000..8d2715a
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/makefsdata
@@ -0,0 +1,78 @@
+#!/usr/bin/perl\r
+\r
+open(OUTPUT, "> httpd-fsdata.c");\r
+\r
+chdir("httpd-fs");\r
+\r
+opendir(DIR, ".");\r
+@files =  grep { !/^\./ && !/(CVS|~)/ } readdir(DIR);\r
+closedir(DIR);\r
+\r
+foreach $file (@files) {  \r
+   \r
+    if(-d $file && $file !~ /^\./) {\r
+       print "Processing directory $file\n";\r
+       opendir(DIR, $file);\r
+       @newfiles =  grep { !/^\./ && !/(CVS|~)/ } readdir(DIR);\r
+       closedir(DIR);\r
+       printf "Adding files @newfiles\n";\r
+       @files = (@files, map { $_ = "$file/$_" } @newfiles);\r
+       next;\r
+    }\r
+}\r
+\r
+foreach $file (@files) {\r
+    if(-f $file) {\r
+       \r
+       print "Adding file $file\n";\r
+       \r
+       open(FILE, $file) || die "Could not open file $file\n";\r
+\r
+       $file =~ s-^-/-;\r
+       $fvar = $file;\r
+       $fvar =~ s-/-_-g;\r
+       $fvar =~ s-\.-_-g;\r
+       # for AVR, add PROGMEM here\r
+       print(OUTPUT "static const unsigned char data".$fvar."[] = {\n");\r
+       print(OUTPUT "\t/* $file */\n\t");\r
+       for($j = 0; $j < length($file); $j++) {\r
+           printf(OUTPUT "%#02x, ", unpack("C", substr($file, $j, 1)));\r
+       }\r
+       printf(OUTPUT "0,\n");\r
+       \r
+       \r
+       $i = 0;        \r
+       while(read(FILE, $data, 1)) {\r
+           if($i == 0) {\r
+               print(OUTPUT "\t");\r
+           }\r
+           printf(OUTPUT "%#02x, ", unpack("C", $data));\r
+           $i++;\r
+           if($i == 10) {\r
+               print(OUTPUT "\n");\r
+               $i = 0;\r
+           }\r
+       }\r
+       print(OUTPUT "0};\n\n");\r
+       close(FILE);\r
+       push(@fvars, $fvar);\r
+       push(@pfiles, $file);\r
+    }\r
+}\r
+\r
+for($i = 0; $i < @fvars; $i++) {\r
+    $file = $pfiles[$i];\r
+    $fvar = $fvars[$i];\r
+\r
+    if($i == 0) {\r
+        $prevfile = "NULL";\r
+    } else {\r
+        $prevfile = "file" . $fvars[$i - 1];\r
+    }\r
+    print(OUTPUT "const struct httpd_fsdata_file file".$fvar."[] = {{$prevfile, data$fvar, ");\r
+    print(OUTPUT "data$fvar + ". (length($file) + 1) .", ");\r
+    print(OUTPUT "sizeof(data$fvar) - ". (length($file) + 1) ."}};\n\n");\r
+}\r
+\r
+print(OUTPUT "#define HTTPD_FS_ROOT file$fvars[$i - 1]\n\n");\r
+print(OUTPUT "#define HTTPD_FS_NUMFILES $i\n");\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/makestrings b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/makestrings
new file mode 100644 (file)
index 0000000..8a13c6d
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/makestrings
@@ -0,0 +1,40 @@
+#!/usr/bin/perl\r
+\r
+\r
+sub stringify {\r
+  my $name = shift(@_);\r
+  open(OUTPUTC, "> $name.c");\r
+  open(OUTPUTH, "> $name.h");\r
+  \r
+  open(FILE, "$name");\r
+  \r
+  while(<FILE>) {\r
+    if(/(.+) "(.+)"/) {\r
+      $var = $1;\r
+      $data = $2;\r
+      \r
+      $datan = $data;\r
+      $datan =~ s/\\r/\r/g;\r
+      $datan =~ s/\\n/\n/g;\r
+      $datan =~ s/\\01/\01/g;      \r
+      $datan =~ s/\\0/\0/g;\r
+      \r
+      printf(OUTPUTC "const char $var\[%d] = \n", length($datan) + 1);\r
+      printf(OUTPUTC "/* \"$data\" */\n");\r
+      printf(OUTPUTC "{");\r
+      for($j = 0; $j < length($datan); $j++) {\r
+       printf(OUTPUTC "%#02x, ", unpack("C", substr($datan, $j, 1)));\r
+      }\r
+      printf(OUTPUTC "};\n");\r
+      \r
+      printf(OUTPUTH "extern const char $var\[%d];\n", length($datan) + 1);\r
+      \r
+    }\r
+  }\r
+  close(OUTPUTC);\r
+  close(OUTPUTH);\r
+}\r
+stringify("http-strings");\r
+\r
+exit 0;\r
+\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/uIP_Task.c b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/uIP_Task.c
new file mode 100644 (file)
index 0000000..d63753f
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/uIP_Task.c
@@ -0,0 +1,305 @@
+/*\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
+\r
+       This file is part of the FreeRTOS.org distribution.\r
+\r
+       FreeRTOS.org is free software; you can redistribute it and/or modify\r
+       it under the terms of the GNU General Public License as published by\r
+       the Free Software Foundation; either version 2 of the License, or\r
+       (at your option) any later version.\r
+\r
+       FreeRTOS.org is distributed in the hope that it will be useful,\r
+       but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+       MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
+       GNU General Public License for more details.\r
+\r
+       You should have received a copy of the GNU General Public License\r
+       along with FreeRTOS.org; if not, write to the Free Software\r
+       Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
+\r
+       A special exception to the GPL can be applied should you wish to distribute\r
+       a combined work that includes FreeRTOS.org, without being obliged to provide\r
+       the source code for any proprietary components.  See the licensing section\r
+       of http://www.FreeRTOS.org for full details of how and when the exception\r
+       can be applied.\r
+\r
+       ***************************************************************************\r
+       See http://www.FreeRTOS.org for documentation, latest information, license\r
+       and contact details.  Please ensure to read the configuration and relevant\r
+       port sections of the online documentation.\r
+       ***************************************************************************\r
+*/\r
+/* Standard includes. */\r
+#include <string.h>\r
+\r
+/* Scheduler includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+#include "semphr.h"\r
+\r
+#include "lcd_message.h"\r
+\r
+/* uip includes. */\r
+#include "hw_types.h"\r
+\r
+#include "uip.h"\r
+#include "uip_arp.h"\r
+#include "httpd.h"\r
+#include "timer.h"\r
+#include "clock-arch.h"\r
+#include "hw_ethernet.h"\r
+#include "ethernet.h"\r
+#include "hw_memmap.h"\r
+#include "lmi_flash.h"\r
+#include "sysctl.h"\r
+\r
+/* Demo includes. */\r
+#include "emac.h"\r
+#include "partest.h"\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* IP address configuration. */\r
+#define uipIP_ADDR0            172\r
+#define uipIP_ADDR1            25\r
+#define uipIP_ADDR2            218\r
+#define uipIP_ADDR3            19      \r
+\r
+/* How long to wait before attempting to connect the MAC again. */\r
+#define uipINIT_WAIT    100\r
+\r
+/* Shortcut to the header within the Rx buffer. */\r
+#define xHeader ((struct uip_eth_hdr *) &uip_buf[ 0 ])\r
+\r
+/* Standard constant. */\r
+#define uipTOTAL_FRAME_HEADER_SIZE     54\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * Send the uIP buffer to the MAC.\r
+ */\r
+static void prvENET_Send(void);\r
+\r
+/*\r
+ * Setup the MAC address in the MAC itself, and in the uIP stack.\r
+ */\r
+static void prvSetMACAddress( void );\r
+\r
+/*\r
+ * Port functions required by the uIP stack.\r
+ */\r
+void clock_init( void );\r
+clock_time_t clock_time( void );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* The semaphore used by the ISR to wake the uIP task. */\r
+extern xSemaphoreHandle xEMACSemaphore;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+void clock_init(void)\r
+{\r
+       /* This is done when the scheduler starts. */\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+clock_time_t clock_time( void )\r
+{\r
+       return xTaskGetTickCount();\r
+}\r
+\r
+\r
+void vuIP_Task( void *pvParameters )\r
+{\r
+portBASE_TYPE i;\r
+uip_ipaddr_t xIPAddr;\r
+struct timer periodic_timer, arp_timer;\r
+extern void ( vEMAC_ISR )( void );\r
+\r
+       /* Enable/Reset the Ethernet Controller */\r
+       SysCtlPeripheralEnable( SYSCTL_PERIPH_ETH );\r
+       SysCtlPeripheralReset( SYSCTL_PERIPH_ETH );\r
+\r
+       /* Create the semaphore used by the ISR to wake this task. */\r
+       vSemaphoreCreateBinary( xEMACSemaphore );\r
+       \r
+       /* Initialise the uIP stack. */\r
+       timer_set( &periodic_timer, configTICK_RATE_HZ / 2 );\r
+       timer_set( &arp_timer, configTICK_RATE_HZ * 10 );\r
+       uip_init();\r
+       uip_ipaddr( xIPAddr, uipIP_ADDR0, uipIP_ADDR1, uipIP_ADDR2, uipIP_ADDR3 );\r
+       uip_sethostaddr( xIPAddr );\r
+       httpd_init();\r
+\r
+       while( vInitEMAC() != pdPASS )\r
+    {\r
+        vTaskDelay( uipINIT_WAIT );\r
+    }\r
+       prvSetMACAddress();     \r
+       \r
+\r
+       for( ;; )\r
+       {\r
+               /* Is there received data ready to be processed? */\r
+               uip_len = uiGetEMACRxData( uip_buf );\r
+               \r
+               if( uip_len > 0 )\r
+               {\r
+                       /* Standard uIP loop taken from the uIP manual. */\r
+\r
+                       if( xHeader->type == htons( UIP_ETHTYPE_IP ) )\r
+                       {\r
+                               uip_arp_ipin();\r
+                               uip_input();\r
+\r
+                               /* If the above function invocation resulted in data that\r
+                               should be sent out on the network, the global variable\r
+                               uip_len is set to a value > 0. */\r
+                               if( uip_len > 0 )\r
+                               {\r
+                                       uip_arp_out();\r
+                                       prvENET_Send();\r
+                               }\r
+                       }\r
+                       else if( xHeader->type == htons( UIP_ETHTYPE_ARP ) )\r
+                       {\r
+                               uip_arp_arpin();\r
+\r
+                               /* If the above function invocation resulted in data that\r
+                               should be sent out on the network, the global variable\r
+                               uip_len is set to a value > 0. */\r
+                               if( uip_len > 0 )\r
+                               {\r
+                                       prvENET_Send();\r
+                               }\r
+                       }\r
+               }\r
+               else\r
+               {\r
+                       if( timer_expired( &periodic_timer ) )\r
+                       {\r
+                               timer_reset( &periodic_timer );\r
+                               for( i = 0; i < UIP_CONNS; i++ )\r
+                               {\r
+                                       uip_periodic( i );\r
+       \r
+                                       /* If the above function invocation resulted in data that\r
+                                       should be sent out on the network, the global variable\r
+                                       uip_len is set to a value > 0. */\r
+                                       if( uip_len > 0 )\r
+                                       {\r
+                                               uip_arp_out();\r
+                                               prvENET_Send();\r
+                                       }\r
+                               }       \r
+       \r
+                               /* Call the ARP timer function every 10 seconds. */\r
+                               if( timer_expired( &arp_timer ) )\r
+                               {\r
+                                       timer_reset( &arp_timer );\r
+                                       uip_arp_timer();\r
+                               }\r
+                       }\r
+                       else\r
+                       {                       \r
+                               /* We did not receive a packet, and there was no periodic\r
+                               processing to perform.  Block for a fixed period.  If a packet\r
+                               is received during this period we will be woken by the ISR\r
+                               giving us the Semaphore. */\r
+                               xSemaphoreTake( xEMACSemaphore, configTICK_RATE_HZ / 2 );                       \r
+                       }\r
+               }\r
+       }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvENET_Send(void)\r
+{\r
+    vInitialiseSend();\r
+    vIncrementTxLength( uip_len );\r
+    vSendBufferToMAC();\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvSetMACAddress( void )\r
+{\r
+unsigned portLONG ulUser0, ulUser1;\r
+unsigned char pucMACArray[8];\r
+struct uip_eth_addr xAddr;\r
+\r
+       /* Get the device MAC address from flash */\r
+    FlashUserGet(&ulUser0, &ulUser1);\r
+\r
+       /* Convert the MAC address from flash into sequence of bytes. */\r
+    pucMACArray[0] = ((ulUser0 >>  0) & 0xff);\r
+    pucMACArray[1] = ((ulUser0 >>  8) & 0xff);\r
+    pucMACArray[2] = ((ulUser0 >> 16) & 0xff);\r
+    pucMACArray[3] = ((ulUser1 >>  0) & 0xff);\r
+    pucMACArray[4] = ((ulUser1 >>  8) & 0xff);\r
+    pucMACArray[5] = ((ulUser1 >> 16) & 0xff);\r
+\r
+       /* Program the MAC address. */\r
+    EthernetMACAddrSet(ETH_BASE, pucMACArray);\r
+\r
+       xAddr.addr[ 0 ] = pucMACArray[0];\r
+       xAddr.addr[ 1 ] = pucMACArray[1];\r
+       xAddr.addr[ 2 ] = pucMACArray[2];\r
+       xAddr.addr[ 3 ] = pucMACArray[3];\r
+       xAddr.addr[ 4 ] = pucMACArray[4];\r
+       xAddr.addr[ 5 ] = pucMACArray[5];\r
+       uip_setethaddr( xAddr );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vApplicationProcessFormInput( portCHAR *pcInputString, portBASE_TYPE xInputLength )\r
+{\r
+char *c, *pcText;\r
+static portCHAR cMessageForDisplay[ 32 ];\r
+extern xQueueHandle xOLEDQueue;\r
+xOLEDMessage xOLEDMessage;\r
+\r
+       /* Process the form input sent by the IO page of the served HTML. */\r
+\r
+       c = strstr( pcInputString, "?" );\r
+\r
+    if( c )\r
+    {\r
+               /* Turn LED's on or off in accordance with the check box status. */\r
+               if( strstr( c, "LED0=1" ) != NULL )\r
+               {\r
+                       vParTestSetLED( 0, 1 );\r
+               }\r
+               else\r
+               {\r
+                       vParTestSetLED( 0, 0 );\r
+               }               \r
+               \r
+               /* Find the start of the text to be displayed on the LCD. */\r
+        pcText = strstr( c, "LCD=" );\r
+        pcText += strlen( "LCD=" );\r
+\r
+        /* Terminate the file name for further processing within uIP. */\r
+        *c = 0x00;\r
+\r
+        /* Terminate the LCD string. */\r
+        c = strstr( pcText, " " );\r
+        if( c != NULL )\r
+        {\r
+            *c = 0x00;\r
+        }\r
+\r
+        /* Add required spaces. */\r
+        while( ( c = strstr( pcText, "+" ) ) != NULL )\r
+        {\r
+            *c = ' ';\r
+        }\r
+\r
+        /* Write the message to the LCD. */\r
+               strcpy( cMessageForDisplay, pcText );\r
+               xOLEDMessage.pcMessage = cMessageForDisplay;\r
+        xQueueSend( xOLEDQueue, &xOLEDMessage, portMAX_DELAY );\r
+    }\r
+}\r
+\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/uip-conf.h b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/uip-conf.h
new file mode 100644 (file)
index 0000000..664077d
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/uip-conf.h
@@ -0,0 +1,159 @@
+/**\r
+ * \addtogroup uipopt\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * \name Project-specific configuration options\r
+ * @{\r
+ *\r
+ * uIP has a number of configuration options that can be overridden\r
+ * for each project. These are kept in a project-specific uip-conf.h\r
+ * file and all configuration names have the prefix UIP_CONF.\r
+ */\r
+\r
+/*\r
+ * Copyright (c) 2006, Swedish Institute of Computer Science.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions\r
+ * are met:\r
+ * 1. Redistributions of source code must retain the above copyright\r
+ *    notice, this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright\r
+ *    notice, this list of conditions and the following disclaimer in the\r
+ *    documentation and/or other materials provided with the distribution.\r
+ * 3. Neither the name of the Institute nor the names of its contributors\r
+ *    may be used to endorse or promote products derived from this software\r
+ *    without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND\r
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE\r
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\r
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY\r
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF\r
+ * SUCH DAMAGE.\r
+ *\r
+ * This file is part of the uIP TCP/IP stack\r
+ *\r
+ * $Id: uip-conf.h,v 1.6 2006/06/12 08:00:31 adam Exp $\r
+ */\r
+\r
+/**\r
+ * \file\r
+ *         An example uIP configuration file\r
+ * \author\r
+ *         Adam Dunkels <adam@sics.se>\r
+ */\r
+\r
+#ifndef __UIP_CONF_H__\r
+#define __UIP_CONF_H__\r
+\r
+#include <stdint.h>\r
+\r
+/**\r
+ * 8 bit datatype\r
+ *\r
+ * This typedef defines the 8-bit type used throughout uIP.\r
+ *\r
+ * \hideinitializer\r
+ */\r
+typedef uint8_t u8_t;\r
+\r
+/**\r
+ * 16 bit datatype\r
+ *\r
+ * This typedef defines the 16-bit type used throughout uIP.\r
+ *\r
+ * \hideinitializer\r
+ */\r
+typedef uint16_t u16_t;\r
+\r
+/**\r
+ * Statistics datatype\r
+ *\r
+ * This typedef defines the dataype used for keeping statistics in\r
+ * uIP.\r
+ *\r
+ * \hideinitializer\r
+ */\r
+typedef unsigned short uip_stats_t;\r
+\r
+/**\r
+ * Maximum number of TCP connections.\r
+ *\r
+ * \hideinitializer\r
+ */\r
+#define UIP_CONF_MAX_CONNECTIONS 40\r
+\r
+/**\r
+ * Maximum number of listening TCP ports.\r
+ *\r
+ * \hideinitializer\r
+ */\r
+#define UIP_CONF_MAX_LISTENPORTS 40\r
+\r
+/**\r
+ * uIP buffer size.\r
+ *\r
+ * \hideinitializer\r
+ */\r
+#define UIP_CONF_BUFFER_SIZE     1500\r
+\r
+/**\r
+ * CPU byte order.\r
+ *\r
+ * \hideinitializer\r
+ */\r
+#define UIP_CONF_BYTE_ORDER      LITTLE_ENDIAN\r
+\r
+/**\r
+ * Logging on or off\r
+ *\r
+ * \hideinitializer\r
+ */\r
+#define UIP_CONF_LOGGING         0\r
+\r
+/**\r
+ * UDP support on or off\r
+ *\r
+ * \hideinitializer\r
+ */\r
+#define UIP_CONF_UDP             0\r
+\r
+/**\r
+ * UDP checksums on or off\r
+ *\r
+ * \hideinitializer\r
+ */\r
+#define UIP_CONF_UDP_CHECKSUMS   1\r
+\r
+/**\r
+ * uIP statistics on or off\r
+ *\r
+ * \hideinitializer\r
+ */\r
+#define UIP_CONF_STATISTICS      1\r
+\r
+/* Here we include the header file for the application(s) we use in\r
+   our project. */\r
+/*#include "smtp.h"*/\r
+/*#include "hello-world.h"*/\r
+/*#include "telnetd.h"*/\r
+#include "webserver.h"\r
+/*#include "dhcpc.h"*/\r
+/*#include "resolv.h"*/\r
+/*#include "webclient.h"*/\r
+\r
+#define UIP_CONF_EXTERNAL_BUFFER\r
+\r
+#endif /* __UIP_CONF_H__ */\r
+\r
+/** @} */\r
+/** @} */\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/webserver.h b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/webserver.h
new file mode 100644 (file)
index 0000000..1acb290
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver/webserver.h
@@ -0,0 +1,49 @@
+/*\r
+ * Copyright (c) 2002, Adam Dunkels.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions\r
+ * are met:\r
+ * 1. Redistributions of source code must retain the above copyright\r
+ *    notice, this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above\r
+ *    copyright notice, this list of conditions and the following\r
+ *    disclaimer in the documentation and/or other materials provided\r
+ *    with the distribution.\r
+ * 3. The name of the author may not be used to endorse or promote\r
+ *    products derived from this software without specific prior\r
+ *    written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS\r
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\r
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY\r
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE\r
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\r
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,\r
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\r
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+ * This file is part of the uIP TCP/IP stack\r
+ *\r
+ * $Id: webserver.h,v 1.2 2006/06/11 21:46:38 adam Exp $\r
+ *\r
+ */\r
+#ifndef __WEBSERVER_H__\r
+#define __WEBSERVER_H__\r
+\r
+#include "httpd.h"\r
+\r
+typedef struct httpd_state uip_tcp_appstate_t;\r
+/* UIP_APPCALL: the name of the application function. This function\r
+   must return void and take no arguments (i.e., C type "void\r
+   appfunc(void)"). */\r
+#ifndef UIP_APPCALL\r
+#define UIP_APPCALL     httpd_appcall\r
+#endif\r
+\r
+\r
+#endif /* __WEBSERVER_H__ */\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/fury_ft2232.cfg b/Demo/CORTEX_LM3Sxxxx_Eclipse/fury_ft2232.cfg
new file mode 100644 (file)
index 0000000..8f2b3ed
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/fury_ft2232.cfg
@@ -0,0 +1,28 @@
+#daemon configuration\r
+telnet_port 4444\r
+gdb_port 3333\r
+\r
+#interface\r
+interface ft2232\r
+ft2232_device_desc "Stellaris Evaluation Board A"\r
+ft2232_layout evb_lm3s811\r
+ft2232_vid_pid 0x0403 0xbcd9\r
+jtag_speed 40\r
+#LM3S811 Evaluation Board has only srst\r
+reset_config srst_only separate\r
+\r
+#jtag scan chain\r
+#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)\r
+jtag_device 4 0x1 0xf 0xe\r
+\r
+#target configuration\r
+daemon_startup attach\r
+#target <type> <startup mode>\r
+#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>\r
+target cortex_m3 little run_and_halt 0\r
+# 4k working area at base of ram\r
+working_area 0 0x20000800 0x1200 nobackup\r
+#target_script 0 reset ../doc/scripts/evb_lm3s811_test.script \r
+\r
+#flash configuration\r
+flash bank stellaris 0 0 0 0 0\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/fury_ft2232_flash.cfg b/Demo/CORTEX_LM3Sxxxx_Eclipse/fury_ft2232_flash.cfg
new file mode 100644 (file)
index 0000000..28ffaea
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/fury_ft2232_flash.cfg
@@ -0,0 +1,34 @@
+#daemon configuration\r
+telnet_port 4444\r
+gdb_port 3333\r
+\r
+#interface\r
+interface ft2232\r
+ft2232_device_desc "Stellaris Evaluation Board A"\r
+ft2232_layout evb_lm3s811\r
+ft2232_vid_pid 0x0403 0xbcd9\r
+jtag_speed 40\r
+#LM3S811 Evaluation Board has only srst\r
+reset_config srst_only separate\r
+\r
+#jtag scan chain\r
+#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)\r
+jtag_device 4 0x1 0xf 0xe\r
+\r
+#target configuration\r
+daemon_startup reset\r
+#target <type> <startup mode>\r
+#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>\r
+target cortex_m3 little run_and_init 0\r
+# 4k working area at base of ram\r
+working_area 0 0x20000800 0x1200 nobackup\r
+#target_script 0 reset ../doc/scripts/evb_lm3s811_test.script \r
+\r
+target_script 0 reset program.script\r
+\r
+\r
+#flash configuration\r
+flash bank stellaris 0 0 0 0 0\r
+\r
+\r
+\r

diff --git a/Demo/CORTEX_LM3Sxxxx_Eclipse/program.script b/Demo/CORTEX_LM3Sxxxx_Eclipse/program.script
new file mode 100644 (file)
index 0000000..314624b
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_Eclipse/program.script
@@ -0,0 +1,17 @@
+halt\r
+sleep 200\r
+wait_halt\r
+flash probe 0\r
+#sleep 500\r
+flash info 0\r
+#sleep 500\r
+#flash protect 0 0 31 off\r
+#sleep 500\r
+flash erase 0 0 255\r
+sleep 200\r
+flash write 0 ./RTOSDemo/RTOSDemo.bin 0\r
+sleep 200\r
+reset run\r
+shutdown\r
+\r
+\r

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/Debug/Obj/RTOSDemo.pbd b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/Debug/Obj/RTOSDemo.pbd
new file mode 100644 (file)
index 0000000..f8e3306
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/Debug/Obj/RTOSDemo.pbd
@@ -0,0 +1,32 @@
+This is an internal working file generated by the Source Browser.\r
+20:38 47s\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\CORTEX_LM3Sxxxx_IAR_Keil\Debug\Obj\BlockQ.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\CORTEX_LM3Sxxxx_IAR_Keil\Debug\Obj\GenQTest.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\CORTEX_LM3Sxxxx_IAR_Keil\Debug\Obj\ParTest.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\CORTEX_LM3Sxxxx_IAR_Keil\Debug\Obj\PollQ.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\CORTEX_LM3Sxxxx_IAR_Keil\Debug\Obj\QPeek.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\CORTEX_LM3Sxxxx_IAR_Keil\Debug\Obj\blocktim.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\CORTEX_LM3Sxxxx_IAR_Keil\Debug\Obj\death.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\CORTEX_LM3Sxxxx_IAR_Keil\Debug\Obj\emac.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\CORTEX_LM3Sxxxx_IAR_Keil\Debug\Obj\flash.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\CORTEX_LM3Sxxxx_IAR_Keil\Debug\Obj\heap_2.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\CORTEX_LM3Sxxxx_IAR_Keil\Debug\Obj\http-strings.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\CORTEX_LM3Sxxxx_IAR_Keil\Debug\Obj\httpd-cgi.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\CORTEX_LM3Sxxxx_IAR_Keil\Debug\Obj\httpd-fs.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\CORTEX_LM3Sxxxx_IAR_Keil\Debug\Obj\httpd.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\CORTEX_LM3Sxxxx_IAR_Keil\Debug\Obj\integer.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\CORTEX_LM3Sxxxx_IAR_Keil\Debug\Obj\list.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\CORTEX_LM3Sxxxx_IAR_Keil\Debug\Obj\main.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\CORTEX_LM3Sxxxx_IAR_Keil\Debug\Obj\osram128x64x4.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\CORTEX_LM3Sxxxx_IAR_Keil\Debug\Obj\port.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\CORTEX_LM3Sxxxx_IAR_Keil\Debug\Obj\psock.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\CORTEX_LM3Sxxxx_IAR_Keil\Debug\Obj\queue.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\CORTEX_LM3Sxxxx_IAR_Keil\Debug\Obj\rit128x96x4.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\CORTEX_LM3Sxxxx_IAR_Keil\Debug\Obj\semtest.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\CORTEX_LM3Sxxxx_IAR_Keil\Debug\Obj\startup_ewarm.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\CORTEX_LM3Sxxxx_IAR_Keil\Debug\Obj\tasks.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\CORTEX_LM3Sxxxx_IAR_Keil\Debug\Obj\timer.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\CORTEX_LM3Sxxxx_IAR_Keil\Debug\Obj\timertest.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\CORTEX_LM3Sxxxx_IAR_Keil\Debug\Obj\uIP_Task.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\CORTEX_LM3Sxxxx_IAR_Keil\Debug\Obj\uip.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\CORTEX_LM3Sxxxx_IAR_Keil\Debug\Obj\uip_arp.pbi\r

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/FreeRTOSConfig.h b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/FreeRTOSConfig.h
new file mode 100644 (file)
index 0000000..5bb2160
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/FreeRTOSConfig.h
@@ -0,0 +1,81 @@
+/*\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
+\r
+       This file is part of the FreeRTOS.org distribution.\r
+\r
+       FreeRTOS.org is free software; you can redistribute it and/or modify\r
+       it under the terms of the GNU General Public License as published by\r
+       the Free Software Foundation; either version 2 of the License, or\r
+       (at your option) any later version.\r
+\r
+       FreeRTOS.org is distributed in the hope that it will be useful,\r
+       but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+       MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
+       GNU General Public License for more details.\r
+\r
+       You should have received a copy of the GNU General Public License\r
+       along with FreeRTOS.org; if not, write to the Free Software\r
+       Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
+\r
+       A special exception to the GPL can be applied should you wish to distribute\r
+       a combined work that includes FreeRTOS.org, without being obliged to provide\r
+       the source code for any proprietary components.  See the licensing section\r
+       of http://www.FreeRTOS.org for full details of how and when the exception\r
+       can be applied.\r
+\r
+       ***************************************************************************\r
+       See http://www.FreeRTOS.org for documentation, latest information, license\r
+       and contact details.  Please ensure to read the configuration and relevant\r
+       port sections of the online documentation.\r
+\r
+       Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along\r
+       with commercial development and support options.\r
+       ***************************************************************************\r
+*/\r
+\r
+#ifndef FREERTOS_CONFIG_H\r
+#define FREERTOS_CONFIG_H\r
+\r
+/*-----------------------------------------------------------\r
+ * Application specific definitions.\r
+ *\r
+ * These definitions should be adjusted for your particular hardware and\r
+ * application requirements.\r
+ *\r
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE\r
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.\r
+ *----------------------------------------------------------*/\r
+\r
+#define configUSE_PREEMPTION           1\r
+#define configUSE_IDLE_HOOK                    0\r
+#define configUSE_TICK_HOOK                    1\r
+#define configCPU_CLOCK_HZ                     ( ( unsigned portLONG ) 50000000 )\r
+#define configTICK_RATE_HZ                     ( ( portTickType ) 1000 )\r
+#define configMINIMAL_STACK_SIZE       ( ( unsigned portSHORT ) 70 )\r
+#define configTOTAL_HEAP_SIZE          ( ( size_t ) ( 24000 ) )\r
+#define configMAX_TASK_NAME_LEN                ( 12 )\r
+#define configUSE_TRACE_FACILITY       1\r
+#define configUSE_16_BIT_TICKS         0\r
+#define configIDLE_SHOULD_YIELD                0\r
+#define configUSE_CO_ROUTINES          0\r
+#define configUSE_MUTEXES                      1\r
+\r
+#define configMAX_PRIORITIES           ( ( unsigned portBASE_TYPE ) 5 )\r
+#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )\r
+\r
+/* Set the following definitions to 1 to include the API function, or zero\r
+to exclude the API function. */\r
+\r
+#define INCLUDE_vTaskPrioritySet               1\r
+#define INCLUDE_uxTaskPriorityGet              1\r
+#define INCLUDE_vTaskDelete                            1\r
+#define INCLUDE_vTaskCleanUpResources  0\r
+#define INCLUDE_vTaskSuspend                   1\r
+#define INCLUDE_vTaskDelayUntil                        1\r
+#define INCLUDE_vTaskDelay                             1\r
+\r
+\r
+#define configKERNEL_INTERRUPT_PRIORITY 255\r
+\r
+\r
+#endif /* FREERTOS_CONFIG_H */\r

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/ParTest/ParTest.c b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/ParTest/ParTest.c
new file mode 100644 (file)
index 0000000..3ef9799
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/ParTest/ParTest.c
@@ -0,0 +1,83 @@
+/*\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
+\r
+       This file is part of the FreeRTOS.org distribution.\r
+\r
+       FreeRTOS.org is free software; you can redistribute it and/or modify\r
+       it under the terms of the GNU General Public License as published by\r
+       the Free Software Foundation; either version 2 of the License, or\r
+       (at your option) any later version.\r
+\r
+       FreeRTOS.org is distributed in the hope that it will be useful,\r
+       but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+       MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
+       GNU General Public License for more details.\r
+\r
+       You should have received a copy of the GNU General Public License\r
+       along with FreeRTOS.org; if not, write to the Free Software\r
+       Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
+\r
+       A special exception to the GPL can be applied should you wish to distribute\r
+       a combined work that includes FreeRTOS.org, without being obliged to provide\r
+       the source code for any proprietary components.  See the licensing section\r
+       of http://www.FreeRTOS.org for full details of how and when the exception\r
+       can be applied.\r
+\r
+       ***************************************************************************\r
+       See http://www.FreeRTOS.org for documentation, latest information, license\r
+       and contact details.  Please ensure to read the configuration and relevant\r
+       port sections of the online documentation.\r
+\r
+       Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along\r
+       with commercial development and support options.\r
+       ***************************************************************************\r
+*/\r
+\r
+/*-----------------------------------------------------------\r
+ * Simple parallel port IO routines.\r
+ *-----------------------------------------------------------*/\r
+\r
+/*\r
+*/\r
+\r
+/* Scheduler includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+\r
+/* Demo includes. */\r
+#include "partest.h"\r
+\r
+/* Library includes. */\r
+#include "hw_types.h"\r
+#include "gpio.h"\r
+#include "hw_memmap.h"\r
+\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+void vParTestInitialise( void )\r
+{\r
+    GPIODirModeSet( GPIO_PORTF_BASE, GPIO_PIN_0, GPIO_DIR_MODE_OUT );\r
+    GPIOPadConfigSet( GPIO_PORTF_BASE, GPIO_PIN_0, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD );\r
+    GPIOPinWrite( GPIO_PORTF_BASE, GPIO_PIN_0, 0 );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vParTestSetLED( unsigned portBASE_TYPE uxLED, signed portBASE_TYPE xValue )\r
+{\r
+       /* There is only one LED. */\r
+       ( void ) uxLED;\r
+       \r
+    GPIOPinWrite( GPIO_PORTF_BASE, GPIO_PIN_0, xValue );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+unsigned portBASE_TYPE uxParTestGetLED( unsigned portBASE_TYPE uxLED )\r
+{\r
+       /* There is only one LED. */\r
+       ( void ) uxLED;\r
+\r
+       return GPIOPinRead( GPIO_PORTF_BASE, GPIO_PIN_0 );      \r
+}\r
+\r
+\r

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/RTOSDemo.Opt b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/RTOSDemo.Opt
new file mode 100644 (file)
index 0000000..0302df7
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/RTOSDemo.Opt
@@ -0,0 +1,73 @@
+### uVision2 Project, (C) Keil Software\r
+### Do not modify !\r
+\r
+ cExt (*.c)\r
+ aExt (*.s*; *.src; *.a*)\r
+ oExt (*.obj)\r
+ lExt (*.lib)\r
+ tExt (*.txt; *.h; *.inc)\r
+ pExt (*.plm)\r
+ CppX (*.cpp)\r
+ DaveTm { 0,0,0,0,0,0,0,0 }\r
+\r
+Target (FreeRTOS_Demo), 0x0004 // Tools: 'ARM-ADS'\r
+GRPOPT 1,(Demo_Source),0,0,0\r
+GRPOPT 2,(Libraries),0,0,0\r
+GRPOPT 3,(RTOS_Source),0,0,0\r
+GRPOPT 4,(uIP_Source),0,0,0\r
+\r
+OPTFFF 1,1,1,0,0,0,0,0,<..\Common\Minimal\BlockQ.c><BlockQ.c> \r
+OPTFFF 1,2,1,0,0,0,0,0,<..\Common\Minimal\blocktim.c><blocktim.c> \r
+OPTFFF 1,3,1,0,0,0,0,0,<..\Common\Minimal\death.c><death.c> \r
+OPTFFF 1,4,1,0,0,0,0,0,<..\Common\Minimal\integer.c><integer.c> \r
+OPTFFF 1,5,1,2,0,1,1,0,<.\main.c><main.c> { 44,0,0,0,0,0,0,0,1,0,0,0,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,110,0,0,0,115,0,0,0,248,3,0,0,22,2,0,0 }\r
+OPTFFF 1,6,1,0,0,0,0,0,<.\ParTest\ParTest.c><ParTest.c> \r
+OPTFFF 1,7,1,0,0,0,0,0,<..\Common\Minimal\PollQ.c><PollQ.c> \r
+OPTFFF 1,8,1,0,0,0,0,0,<..\Common\Minimal\semtest.c><semtest.c> \r
+OPTFFF 1,9,2,0,0,0,0,0,<.\startup_rvmdk.S><startup_rvmdk.S> \r
+OPTFFF 1,10,1,0,0,0,0,0,<.\timertest.c><timertest.c> \r
+OPTFFF 1,11,5,0,0,0,0,0,<.\FreeRTOSConfig.h><FreeRTOSConfig.h> \r
+OPTFFF 1,12,1,0,0,0,0,0,<..\Common\Minimal\GenQTest.c><GenQTest.c> \r
+OPTFFF 1,13,1,0,0,0,0,0,<..\Common\Minimal\QPeek.c><QPeek.c> \r
+OPTFFF 2,14,1,0,0,0,0,0,<.\rit128x96x4.c><rit128x96x4.c> \r
+OPTFFF 2,15,1,0,0,0,0,0,<.\osram128x64x4.c><osram128x64x4.c> \r
+OPTFFF 2,16,4,0,0,0,0,0,<..\Common\drivers\LuminaryMicro\Keil\driverlib.lib><driverlib.lib> \r
+OPTFFF 3,17,1,0,0,0,0,0,<..\..\Source\tasks.c><tasks.c> \r
+OPTFFF 3,18,1,0,0,0,0,0,<..\..\Source\list.c><list.c> \r
+OPTFFF 3,19,1,0,0,0,0,0,<..\..\Source\queue.c><queue.c> \r
+OPTFFF 3,20,1,0,0,0,0,0,<..\..\Source\portable\RVDS\ARM_CM3\port.c><port.c> \r
+OPTFFF 3,21,1,0,0,0,0,0,<..\..\Source\portable\MemMang\heap_2.c><heap_2.c> \r
+OPTFFF 4,22,1,822083584,0,0,0,0,<.\webserver\uIP_Task.c><uIP_Task.c> \r
+OPTFFF 4,23,1,218103808,0,0,0,0,<.\webserver\emac.c><emac.c> \r
+OPTFFF 4,24,1,0,0,0,0,0,<.\webserver\httpd.c><httpd.c> \r
+OPTFFF 4,25,1,0,0,0,0,0,<.\webserver\httpd-cgi.c><httpd-cgi.c> \r
+OPTFFF 4,26,1,0,0,0,0,0,<.\webserver\httpd-fs.c><httpd-fs.c> \r
+OPTFFF 4,27,1,0,0,0,0,0,<.\webserver\http-strings.c><http-strings.c> \r
+OPTFFF 4,28,1,0,0,0,0,0,<..\Common\ethernet\uIP\uip-1.0\uip\uip_arp.c><uip_arp.c> \r
+OPTFFF 4,29,1,0,0,0,0,0,<..\Common\ethernet\uIP\uip-1.0\uip\psock.c><psock.c> \r
+OPTFFF 4,30,1,0,0,0,0,0,<..\Common\ethernet\uIP\uip-1.0\uip\timer.c><timer.c> \r
+OPTFFF 4,31,1,0,0,0,0,0,<..\Common\ethernet\uIP\uip-1.0\uip\uip.c><uip.c> \r
+\r
+\r
+TARGOPT 1, (FreeRTOS_Demo)\r
+ ADSCLK=8000000\r
+  OPTTT 1,1,1,0\r
+  OPTHX 1,65535,0,0,0\r
+  OPTLX 79,66,8,<.\rvmdk\>\r
+  OPTOX 16\r
+  OPTLT 1,1,1,0,1,1,0,1,0,0,0,0\r
+  OPTXL 1,1,1,1,1,1,1,0,0\r
+  OPTFL 1,0,1\r
+  OPTAX 255\r
+  OPTBL 0,(Data Sheet)<DATASHTS\Luminary\LM3S6965.PDF>\r
+  OPTDL (SARMCM3.DLL)()(DLM.DLL)(-pLM3S6965)(SARMCM3.DLL)()(TLM.DLL)(-pLM3S6965)\r
+  OPTDBG 48126,3,()()()()()()()()()() (BIN\lmidk-agdi.dll)()()()\r
+  OPTKEY 0,(DLGTARM)((1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)(100=-1,-1,-1,-1,0)(101=-1,-1,-1,-1,0)(102=-1,-1,-1,-1,0)(161=-1,-1,-1,-1,0)(162=-1,-1,-1,-1,0)(150=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)(1014=-1,-1,-1,-1,0)(1016=-1,-1,-1,-1,0))\r
+  OPTKEY 0,(ARMDBGFLAGS)()\r
+  OPTKEY 0,(lmidk-agdi)(-B0 -O1792)\r
+  OPTMM 1,2,(0)\r
+  OPTDF 0x84\r
+  OPTLE <>\r
+  OPTLC <>\r
+EndOpt\r
+\r

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/RTOSDemo.Uv2 b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/RTOSDemo.Uv2
new file mode 100644 (file)
index 0000000..6ea95c4
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/RTOSDemo.Uv2
@@ -0,0 +1,132 @@
+### uVision2 Project, (C) Keil Software\r
+### Do not modify !\r
+\r
+Target (FreeRTOS_Demo), 0x0004 // Tools: 'ARM-ADS'\r
+\r
+Group (Demo_Source)\r
+Group (Libraries)\r
+Group (RTOS_Source)\r
+Group (uIP_Source)\r
+\r
+File 1,1,<..\Common\Minimal\BlockQ.c><BlockQ.c> 0x46AC3C5D \r
+File 1,1,<..\Common\Minimal\blocktim.c><blocktim.c> 0x46AC3C5D \r
+File 1,1,<..\Common\Minimal\death.c><death.c> 0x46ADD531 \r
+File 1,1,<..\Common\Minimal\integer.c><integer.c> 0x46AC3C5A \r
+File 1,1,<.\main.c><main.c> 0x46D709ED \r
+File 1,1,<.\ParTest\ParTest.c><ParTest.c> 0x46AC3C69 \r
+File 1,1,<..\Common\Minimal\PollQ.c><PollQ.c> 0x46AC3C59 \r
+File 1,1,<..\Common\Minimal\semtest.c><semtest.c> 0x46AC3C59 \r
+File 1,2,<.\startup_rvmdk.S><startup_rvmdk.S> 0x466462F2 \r
+File 1,1,<.\timertest.c><timertest.c> 0x46D705A3 \r
+File 1,5,<.\FreeRTOSConfig.h><FreeRTOSConfig.h> 0x46D70622 \r
+File 1,1,<..\Common\Minimal\GenQTest.c><GenQTest.c> 0x46CB0603 \r
+File 1,1,<..\Common\Minimal\QPeek.c><QPeek.c> 0x46CDED45 \r
+File 2,1,<.\rit128x96x4.c><rit128x96x4.c> 0x46D28D06 \r
+File 2,1,<.\osram128x64x4.c><osram128x64x4.c> 0x46644906 \r
+File 2,4,<..\Common\drivers\LuminaryMicro\Keil\driverlib.lib><driverlib.lib> 0x46BC6EE4 \r
+File 3,1,<..\..\Source\tasks.c><tasks.c> 0x46CEC127 \r
+File 3,1,<..\..\Source\list.c><list.c> 0x46AC3BCE \r
+File 3,1,<..\..\Source\queue.c><queue.c> 0x46D2EA0D \r
+File 3,1,<..\..\Source\portable\RVDS\ARM_CM3\port.c><port.c> 0x46AC3CA9 \r
+File 3,1,<..\..\Source\portable\MemMang\heap_2.c><heap_2.c> 0x46AC3C8D \r
+File 4,1,<.\webserver\uIP_Task.c><uIP_Task.c> 0x46D71230 \r
+File 4,1,<.\webserver\emac.c><emac.c> 0x46D712B5 \r
+File 4,1,<.\webserver\httpd.c><httpd.c> 0x461135EB \r
+File 4,1,<.\webserver\httpd-cgi.c><httpd-cgi.c> 0x46515375 \r
+File 4,1,<.\webserver\httpd-fs.c><httpd-fs.c> 0x4560E5F3 \r
+File 4,1,<.\webserver\http-strings.c><http-strings.c> 0x4560E5F3 \r
+File 4,1,<..\Common\ethernet\uIP\uip-1.0\uip\uip_arp.c><uip_arp.c> 0x46516ADA \r
+File 4,1,<..\Common\ethernet\uIP\uip-1.0\uip\psock.c><psock.c> 0x4560E5E6 \r
+File 4,1,<..\Common\ethernet\uIP\uip-1.0\uip\timer.c><timer.c> 0x4560E5E6 \r
+File 4,1,<..\Common\ethernet\uIP\uip-1.0\uip\uip.c><uip.c> 0x46CEF877 \r
+\r
+\r
+Options 1,0,0  // Target 'FreeRTOS_Demo'\r
+ Device (LM3S6965)\r
+ Vendor (Luminary Micro)\r
+ Cpu (IRAM(0x20000000-0x2000FFFF) IROM(0-0x3FFFF) CLOCK(6000000) CPUTYPE("Cortex-M3"))\r
+ FlashUt ()\r
+ StupF ("STARTUP\Luminary\Startup.s" ("Luminary Startup Code"))\r
+ FlashDR (UL2CM3(-UU0101L5E -O14 -S0 -C0 -N00("ARM Cortex-M3") -D00(1BA00477) -L00(4) -FO7 -FD20000000 -FC800 -FN1 -FF0LM3S_256 -FS00 -FL040000))\r
+ DevID (4337)\r
+ Rgf (LM3Sxxxx.H)\r
+ Mem ()\r
+ C ()\r
+ A ()\r
+ RL ()\r
+ OH ()\r
+ DBC_IFX ()\r
+ DBC_CMS ()\r
+ DBC_AMS ()\r
+ DBC_LMS ()\r
+ UseEnv=0\r
+ EnvBin ()\r
+ EnvInc ()\r
+ EnvLib ()\r
+ EnvReg (ÿLuminary\)\r
+ OrgReg (ÿLuminary\)\r
+ TgStat=16\r
+ OutDir (.\rvmdk\)\r
+ OutName (RTOSDemo)\r
+ GenApp=1\r
+ GenLib=0\r
+ GenHex=0\r
+ Debug=1\r
+ Browse=1\r
+ LstDir (.\rvmdk\)\r
+ HexSel=1\r
+ MG32K=0\r
+ TGMORE=0\r
+ RunUsr 0 1 <fromelf --bin --output .\rvmdk\RTOSDemo.bin .\rvmdk\RTOSDemo.axf>\r
+ RunUsr 1 0 <>\r
+ BrunUsr 0 0 <>\r
+ BrunUsr 1 0 <>\r
+ CrunUsr 0 0 <>\r
+ CrunUsr 1 0 <>\r
+ SVCSID <>\r
+ GLFLAGS=1790\r
+ ADSFLGA { 16,3,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }\r
+ ACPUTYP ("Cortex-M3")\r
+ ADSTFLGA { 0,12,0,2,99,0,0,66,0,0,0,0,0,0,0,0,0,0,0,0 }\r
+ OCMADSOCM { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }\r
+ OCMADSIRAM { 0,0,0,0,32,0,0,1,0 }\r
+ OCMADSIROM { 1,0,0,0,0,0,0,4,0 }\r
+ OCMADSXRAM { 0,0,0,0,0,0,0,0,0 }\r
+ OCR_RVCT { 1,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,4,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,32,0,0,1,0,0,0,0,0,0,0,0,0,0 }\r
+ RV_STAVEC ()\r
+ ADSCCFLG { 9,32,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }\r
+ ADSCMISC (--diag_suppress 191,550,513,167,177,144)\r
+ ADSCDEFN (RVDS_ARMCM3_LM3S102, "PACK_STRUCT_END=","ALIGN_STRUCT_END=")\r
+ ADSCUDEF ()\r
+ ADSCINCD (.;.\..\Common\drivers\LuminaryMicro;..\..\Source\portable\RVDS\ARM_CM3;..\..\Source\include;..\Common\include;..\Common\ethernet\uIP\uip-1.0\uip;.\webserver)\r
+ ADSASFLG { 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }\r
+ ADSAMISC ()\r
+ ADSADEFN ()\r
+ ADSAUDEF ()\r
+ ADSAINCD ()\r
+ PropFld { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }\r
+ IncBld=1\r
+ AlwaysBuild=0\r
+ GenAsm=0\r
+ AsmAsm=0\r
+ PublicsOnly=0\r
+ StopCode=3\r
+ CustArgs ()\r
+ LibMods ()\r
+ ADSLDFG { 17,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }\r
+ ADSLDTA (0x00000000)\r
+ ADSLDDA (0x20000000)\r
+ ADSLDSC ()\r
+ ADSLDIB ()\r
+ ADSLDIC ()\r
+ ADSLDMC (--entry Reset_Handler)\r
+ ADSLDIF ()\r
+ ADSLDDW ()\r
+  OPTDL (SARMCM3.DLL)()(DLM.DLL)(-pLM3S6965)(SARMCM3.DLL)()(TLM.DLL)(-pLM3S6965)\r
+  OPTDBG 48126,3,()()()()()()()()()() (BIN\lmidk-agdi.dll)()()()\r
+ FLASH1 { 1,0,0,0,1,0,0,0,3,0,0,0,0,0,0,0,0,0,0,0 }\r
+ FLASH2 (BIN\lmidk-agdi.dll)\r
+ FLASH3 ("" ())\r
+ FLASH4 ()\r
+EndOpt\r
+\r

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/RTOSDemo.dep b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/RTOSDemo.dep
new file mode 100644 (file)
index 0000000..30f1301
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/RTOSDemo.dep
@@ -0,0 +1,960 @@
+<?xml version="1.0" encoding="iso-8859-1"?>\r
+\r
+<project>\r
+  <fileVersion>2</fileVersion>\r
+  <fileChecksum>612718357</fileChecksum>\r
+  <configuration>\r
+    <name>Debug</name>\r
+    <outputs>\r
+      <file>$PROJ_DIR$\Debug\Obj\uip_arp.pbi</file>\r
+      <file>$PROJ_DIR$\LuminaryDrivers\hw_types.h</file>\r
+      <file>$TOOLKIT_DIR$\inc\xencoding_limits.h</file>\r
+      <file>$PROJ_DIR$\..\..\Source\portable\IAR\ARM_CM3\portasm.s</file>\r
+      <file>$PROJ_DIR$\FreeRTOSConfig.h</file>\r
+      <file>$PROJ_DIR$\LuminaryDrivers\pdc.h</file>\r
+      <file>$PROJ_DIR$\webserver\httpd-fs.h</file>\r
+      <file>$PROJ_DIR$\startup_ewarm.c</file>\r
+      <file>$PROJ_DIR$\..\..\Source\portable\MemMang\heap_2.c</file>\r
+      <file>$PROJ_DIR$\..\Common\drivers\LuminaryMicro\hw_sysctl.h</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\tasks.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\QPeek.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\psock.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\http-strings.r79</file>\r
+      <file>$PROJ_DIR$\LuminaryDrivers\hw_sysctl.h</file>\r
+      <file>$PROJ_DIR$\..\Common\drivers\LuminaryMicro\debug.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\clock.h</file>\r
+      <file>$PROJ_DIR$\LuminaryDrivers\sysctl.h</file>\r
+      <file>$PROJ_DIR$\webserver\httpd.h</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\flash.r79</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\uIP_Task.pbi</file>\r
+      <file>$PROJ_DIR$\..\..\Source\list.c</file>\r
+      <file>$PROJ_DIR$\LuminaryDrivers\ssi.h</file>\r
+      <file>$PROJ_DIR$\webserver\httpd-fs.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\psock.c</file>\r
+      <file>$PROJ_DIR$\webserver\httpd-fsdata.c</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\semtest.c</file>\r
+      <file>$PROJ_DIR$\webserver\httpd-cgi.c</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\timer.r79</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\httpd.pbi</file>\r
+      <file>$PROJ_DIR$\webserver\uip-conf.h</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\BlockQ.r79</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\BlockQ.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\startup_ewarm.r79</file>\r
+      <file>$PROJ_DIR$\webserver\http-strings.h</file>\r
+      <file>$PROJ_DIR$\..\..\Source\include\task.h</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\GenQTest.c</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\death.r79</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\heap_2.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\include\semtest.h</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\httpd-cgi.r79</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\integer.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\drivers\LuminaryMicro\hw_memmap.h</file>\r
+      <file>$PROJ_DIR$\..\Common\drivers\LuminaryMicro\rit128x96x4.h</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\QPeek.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\drivers\LuminaryMicro\ethernet.h</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\death.pbi</file>\r
+      <file>$TOOLKIT_DIR$\lib\dl7mptnnl8n.r79</file>\r
+      <file>$PROJ_DIR$\timertest.c</file>\r
+      <file>$PROJ_DIR$\..\..\Source\include\projdefs.h</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\PollQ.c</file>\r
+      <file>$PROJ_DIR$\..\Common\drivers\LuminaryMicro\sysctl.h</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\semtest.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\QPeek.c</file>\r
+      <file>$PROJ_DIR$\..\Common\drivers\LuminaryMicro\hw_types.h</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\emac.r79</file>\r
+      <file>$PROJ_DIR$\webserver\uIP_Task.c</file>\r
+      <file>$PROJ_DIR$\..\Common\include\partest.h</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\port.pbi</file>\r
+      <file>$PROJ_DIR$\lcd_message.h</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\heap_2.pbi</file>\r
+      <file>$PROJ_DIR$\webserver\httpd.c</file>\r
+      <file>$PROJ_DIR$\..\..\Source\portable\IAR\ARM_CM3\portmacro.h</file>\r
+      <file>$PROJ_DIR$\..\Common\include\GenQTest.h</file>\r
+      <file>$PROJ_DIR$\webserver\clock-arch.h</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\ParTest.pbi</file>\r
+      <file>$PROJ_DIR$\LuminaryDrivers\hw_memmap.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uip_arp.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\pt.h</file>\r
+      <file>$PROJ_DIR$\RTOSDemo.xcl</file>\r
+      <file>$PROJ_DIR$\bitmap.h</file>\r
+      <file>$PROJ_DIR$\LuminaryDrivers\gpio.h</file>\r
+      <file>$PROJ_DIR$\..\Common\drivers\LuminaryMicro\lmi_flash.h</file>\r
+      <file>$PROJ_DIR$\..\Common\drivers\LuminaryMicro\hw_ssi.h</file>\r
+      <file>$PROJ_DIR$\rit128x96x4.c</file>\r
+      <file>$PROJ_DIR$\..\Common\include\death.h</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\rit128x96x4.pbi</file>\r
+      <file>$PROJ_DIR$\LuminaryDrivers\pdc.c</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\httpd-cgi.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\include\integer.h</file>\r
+      <file>$TOOLKIT_DIR$\inc\DLib_Defaults.h</file>\r
+      <file>$PROJ_DIR$\..\..\Source\include\portable.h</file>\r
+      <file>$TOOLKIT_DIR$\lib\dl7mptnnl8n.h</file>\r
+      <file>$PROJ_DIR$\webserver\httpd-fsdata.h</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\main.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\include\blocktim.h</file>\r
+      <file>$PROJ_DIR$\..\Common\drivers\LuminaryMicro\lmi_timer.h</file>\r
+      <file>$PROJ_DIR$\..\..\Source\include\croutine.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uipopt.h</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\osram128x64x4.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\pdc.pbi</file>\r
+      <file>$PROJ_DIR$\main.c</file>\r
+      <file>$PROJ_DIR$\..\Common\drivers\LuminaryMicro\timer.h</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\uip_arp.r79</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\PollQ.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\uip.r79</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\psock.r79</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\uIP_Task.r79</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\list.r79</file>\r
+      <file>$TOOLKIT_DIR$\inc\stdlib.h</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\timer.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\startup_ewarm.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\include\flash.h</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\integer.c</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\uip.pbi</file>\r
+      <file>$TOOLKIT_DIR$\inc\yvals.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\psock.h</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\ParTest.r79</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\portasm.r79</file>\r
+      <file>$PROJ_DIR$\..\..\Source\tasks.c</file>\r
+      <file>$PROJ_DIR$\webserver\webserver.h</file>\r
+      <file>$TOOLKIT_DIR$\inc\stdio.h</file>\r
+      <file>$PROJ_DIR$\..\Common\drivers\LuminaryMicro\IAR\driverlib.r79</file>\r
+      <file>$PROJ_DIR$\LuminaryDrivers\osram128x64x4.c</file>\r
+      <file>$TOOLKIT_DIR$\inc\DLib_Product.h</file>\r
+      <file>$PROJ_DIR$\ParTest\ParTest.c</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\timertest.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\drivers\LuminaryMicro\interrupt.h</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\blocktim.c</file>\r
+      <file>$PROJ_DIR$\LuminaryDrivers\debug.h</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\blocktim.r79</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\PollQ.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\drivers\LuminaryMicro\gpio.h</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\queue.pbi</file>\r
+      <file>$TOOLKIT_DIR$\inc\DLib_Threads.h</file>\r
+      <file>$PROJ_DIR$\webserver\emac.h</file>\r
+      <file>$PROJ_DIR$\osram128x64x4.c</file>\r
+      <file>$PROJ_DIR$\LuminaryDrivers\osram128x64x4.h</file>\r
+      <file>$PROJ_DIR$\..\Common\drivers\LuminaryMicro\hw_ints.h</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\timertest.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\lc-switch.h</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\GenQTest.r79</file>\r
+      <file>$TOOLKIT_DIR$\inc\ysizet.h</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\list.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\http-strings.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\httpd-fs.r79</file>\r
+      <file>$PROJ_DIR$\..\..\Source\include\queue.h</file>\r
+      <file>$PROJ_DIR$\webserver\httpd-cgi.h</file>\r
+      <file>$PROJ_DIR$\..\..\Source\queue.c</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\death.c</file>\r
+      <file>$PROJ_DIR$\webserver\emac.c</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uip_arch.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uip_arp.c</file>\r
+      <file>$PROJ_DIR$\Debug\Exe\RTOSDemo.sim</file>\r
+      <file>$PROJ_DIR$\..\..\Source\include\list.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\timer.h</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\tasks.r79</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\blocktim.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\timer.c</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\GenQTest.pbi</file>\r
+      <file>$TOOLKIT_DIR$\inc\stdint.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\lc.h</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uip.h</file>\r
+      <file>$PROJ_DIR$\LuminaryDrivers\hw_ssi.h</file>\r
+      <file>$PROJ_DIR$\..\Common\drivers\LuminaryMicro\hw_ethernet.h</file>\r
+      <file>$PROJ_DIR$\Debug\Exe\RTOSDemo.d79</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\queue.r79</file>\r
+      <file>$PROJ_DIR$\osram128x64x4.h</file>\r
+      <file>$PROJ_DIR$\..\Common\include\PollQ.h</file>\r
+      <file>$PROJ_DIR$\..\..\Source\include\FreeRTOS.h</file>\r
+      <file>$PROJ_DIR$\..\Common\include\BlockQ.h</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\flash.pbi</file>\r
+      <file>$PROJ_DIR$\..\Common\drivers\LuminaryMicro\ssi.h</file>\r
+      <file>$PROJ_DIR$\webserver\http-strings.c</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\main.pbi</file>\r
+      <file>$PROJ_DIR$\..\..\Source\include\semphr.h</file>\r
+      <file>$TOOLKIT_DIR$\inc\string.h</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\port.r79</file>\r
+      <file>$TOOLKIT_DIR$\inc\stddef.h</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\emac.pbi</file>\r
+      <file>$PROJ_DIR$\..\..\Source\portable\IAR\ARM_CM3\port.c</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\httpd-fs.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\semtest.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uip.c</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\osram128x64x4.r79</file>\r
+      <file>$PROJ_DIR$\..\Common\include\QPeek.h</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\BlockQ.c</file>\r
+      <file>$PROJ_DIR$\..\Common\Minimal\flash.c</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\RTOSDemo.pbd</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\rit128x96x4.r79</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\httpd.r79</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\pdc.r79</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\integer.r79</file>\r
+    </outputs>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\Source\portable\IAR\ARM_CM3\portasm.s</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>AARM</name>\r
+          <file> 108</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>AARM</name>\r
+          <file> 4</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\startup_ewarm.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 33</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 101</file>\r
+        </tool>\r
+      </outputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\Source\portable\MemMang\heap_2.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 38</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 60</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 99 105 80 82 114 2 124 132 159 168 49 4 81 62 35 144</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 99 105 80 114 2 124 132 159 168 49 4 81 62 35 144</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\Source\list.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 98</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 133</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 99 105 80 82 114 2 124 132 159 168 49 4 81 62 144</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 99 105 80 114 2 124 132 159 168 49 4 81 62 144</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\webserver\httpd-fs.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 135</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 171</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 18 106 88 30 150 105 80 82 114 2 124 110 68 151 130 6 83 152 25</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 18 106 88 30 150 105 80 114 2 124 110 68 151 130 6 83 152 25</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\psock.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 96</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 12</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 111 105 80 82 114 2 124 132 166 88 30 150 110 18 106 68 151 130 6 152</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 111 105 80 114 2 124 132 166 88 30 150 110 18 106 68 151 130 6 152</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\semtest.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 172</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 52</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 99 105 80 82 114 2 124 132 159 168 49 4 81 62 35 144 165 136 39</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 99 105 80 114 2 124 132 159 168 49 4 81 62 35 144 165 136 39</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\webserver\httpd-cgi.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 40</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 78</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 152 88 30 150 105 80 82 114 2 124 110 18 106 68 151 130 6 137 111 132 166</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 152 88 30 150 105 80 114 2 124 110 18 106 68 151 130 6 137 111 132 166</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\GenQTest.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 131</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 149</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 99 105 80 82 114 2 124 132 159 168 49 4 81 62 35 144 136 165 63</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 99 105 80 114 2 124 132 159 168 49 4 81 62 35 144 136 165 63</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\timertest.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 116</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 129</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 159 168 105 80 82 114 2 124 132 49 4 81 62 128 42 54 117 51 92</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 159 168 105 80 114 2 124 132 49 4 81 62 128 42 54 117 51 86</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\PollQ.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 121</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 94</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 99 105 80 82 114 2 124 132 159 168 49 4 81 62 35 144 136 158</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 99 105 80 114 2 124 132 159 168 49 4 81 62 35 144 136 158</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\QPeek.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 44</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 11</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 99 105 80 82 114 2 124 132 159 168 49 4 81 62 35 144 136 165 175</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 99 105 80 114 2 124 132 159 168 49 4 81 62 35 144 136 165 175</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\webserver\uIP_Task.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 97</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 20</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 166 105 80 82 114 2 124 132 159 168 49 4 81 62 35 144 165 136 54 152 88 30 150 110 18 106 68 151 130 6 67 92 64 154 45 42 72 51 125 57 59</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 166 105 80 114 2 124 132 159 168 49 4 81 62 35 144 165 136 54 152 88 30 150 110 18 106 68 151 130 6 67 92 64 154 45 51 42 72 125 57 59</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\webserver\httpd.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 180</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 29</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 152 88 30 150 105 80 82 114 2 124 110 18 106 68 151 130 6 137 34 166 132</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 152 88 30 150 105 80 114 2 124 110 18 106 68 151 130 6 137 34 166 132</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\rit128x96x4.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 179</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 76</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 73 42 9 54 15 122 162 51 43</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 73 42 9 54 15 122 162 51 43</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\LuminaryDrivers\pdc.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 181</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 90</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 66 1 119 71 22 17 5</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 66 1 119 71 22 17 5</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\main.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 84</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 164</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 111 105 80 82 114 2 124 132 159 168 49 4 81 62 35 144 136 165 160 75 79 85 102 57 39 158 59 70 63 175 42 54 9 51 122 43 157</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 111 105 80 114 2 124 132 159 168 49 4 81 62 35 144 136 165 160 75 79 85 102 57 39 158 59 70 63 175 42 54 9 51 122 43 157</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>[ROOT_NODE]</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>XLINK</name>\r
+          <file> 155 143</file>\r
+        </tool>\r
+      </outputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\integer.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 182</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 41</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 99 105 80 82 114 2 124 132 159 168 49 4 81 62 35 144 79</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 99 105 80 114 2 124 132 159 168 49 4 81 62 35 144 79</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\Source\tasks.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 146</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 10</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 111 105 80 82 114 2 124 132 99 166 159 168 49 4 81 62 35 144</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 111 105 80 114 2 124 132 99 166 159 168 49 4 81 62 35 144</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\LuminaryDrivers\osram128x64x4.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 174</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 89</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 153 66 14 1 119 71 22 17 127</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\ParTest\ParTest.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 107</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 65</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 159 168 105 80 82 114 2 124 132 49 4 81 62 35 144 57 54 122 42</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 159 168 105 80 114 2 124 132 49 4 81 62 35 144 57 54 122 42</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\blocktim.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 120</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 147</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 159 168 105 80 82 114 2 124 132 49 4 81 62 35 144 136 85</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 159 168 105 80 114 2 124 132 49 4 81 62 35 144 136 85</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\osram128x64x4.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 174</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 89</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 73 42 9 54 15 122 162 51 157</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 73 42 9 54 15 122 162 51 157</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\Source\queue.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 156</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 123</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 99 105 80 82 114 2 124 132 166 159 168 49 4 81 62 35 144 87</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 99 105 80 114 2 124 132 166 159 168 49 4 81 62 35 144 87</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\death.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 37</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 46</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 99 105 80 82 114 2 124 132 159 168 49 4 81 62 35 144 75</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 99 105 80 114 2 124 132 159 168 49 4 81 62 35 144 75</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\webserver\emac.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 55</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 169</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 159 168 105 80 82 114 2 124 132 49 4 81 62 165 136 35 144 125 152 88 30 150 110 18 106 68 151 130 6 54 42 128 154 45 117</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 159 168 105 80 114 2 124 132 49 4 81 62 165 136 35 144 125 152 88 30 150 110 18 106 68 151 130 6 54 42 128 154 45 51 117</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uip_arp.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 93</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 0</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 67 152 88 30 150 105 80 82 114 2 124 110 18 106 68 151 130 6 166 132</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 67 152 88 30 150 105 80 114 2 124 110 18 106 68 151 130 6 166 132</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\timer.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 28</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 100</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 16 64 159 168 105 80 82 114 2 124 132 49 4 81 62 145</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 16 64 159 168 105 80 114 2 124 132 49 4 81 62 145</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\Debug\Exe\RTOSDemo.d79</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>XLINK</name>\r
+          <file> 143</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>XLINK</name>\r
+          <file> 69 31 131 107 121 44 120 37 55 19 38 13 40 135 180 182 98 84 174 167 108 96 156 179 172 33 146 28 116 97 95 93 112 47</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\webserver\http-strings.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 13</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 134</file>\r
+        </tool>\r
+      </outputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\Source\portable\IAR\ARM_CM3\port.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 167</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 58</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 159 168 105 80 82 114 2 124 132 49 4 81 62 35 144</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 159 168 105 80 114 2 124 132 49 4 81 62 35 144</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uip.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 95</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 104</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 152 88 30 150 105 80 82 114 2 124 110 18 106 68 151 130 6 141 166 132</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 152 88 30 150 105 80 114 2 124 110 18 106 68 151 130 6 141 166 132</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\BlockQ.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 31</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 32</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 99 105 80 82 114 2 124 132 159 168 49 4 81 62 35 144 136 160</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 99 105 80 114 2 124 132 159 168 49 4 81 62 35 144 136 160</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\flash.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 19</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 161</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>ICCARM</name>\r
+          <file> 99 105 80 82 114 2 124 132 159 168 49 4 81 62 35 144 57 102</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 99 105 80 114 2 124 132 159 168 49 4 81 62 35 144 57 102</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\Debug\Obj\RTOSDemo.pbd</name>\r
+      <inputs>\r
+        <tool>\r
+          <name>BILINK</name>\r
+          <file> 32 149 65 94 11 147 46 169 161 60 134 78 171 29 41 133 164 89 58 12 123 76 52 101 10 100 129 20 104 0</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <forcedrebuild>\r
+      <name>$PROJ_DIR$\LuminaryDrivers\osram128x64x4.c</name>\r
+      <tool>ICCARM</tool>\r
+    </forcedrebuild>\r
+  </configuration>\r
+</project>\r
+\r
+\r

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/RTOSDemo.ewd b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/RTOSDemo.ewd
new file mode 100644 (file)
index 0000000..1d3a442
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/RTOSDemo.ewd
@@ -0,0 +1,586 @@
+<?xml version="1.0" encoding="iso-8859-1"?>\r
+\r
+<project>\r
+  <fileVersion>1</fileVersion>\r
+  <configuration>\r
+    <name>Debug</name>\r
+    <toolchain>\r
+      <name>ARM</name>\r
+    </toolchain>\r
+    <debug>1</debug>\r
+    <settings>\r
+      <name>C-SPY</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>13</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>1</debug>\r
+        <option>\r
+          <name>CInput</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>CEndian</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>CProcessor</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>OCVariant</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>MacOverride</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>MacFile</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>MemOverride</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>MemFile</name>\r
+          <state>$TOOLKIT_DIR$\CONFIG\iolm3sxxxx.ddf</state>\r
+        </option>\r
+        <option>\r
+          <name>RunToEnable</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>RunToName</name>\r
+          <state>main</state>\r
+        </option>\r
+        <option>\r
+          <name>CExtraOptionsCheck</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CExtraOptions</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>CFpuProcessor</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>OCDDFArgumentProducer</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>OCDownloadSuppressDownload</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>OCDownloadVerifyAll</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>OCProductVersion</name>\r
+          <state>4.41A</state>\r
+        </option>\r
+        <option>\r
+          <name>OCDynDriverList</name>\r
+          <state>LMIFTDI_ID</state>\r
+        </option>\r
+        <option>\r
+          <name>OCLastSavedByProductVersion</name>\r
+          <state>4.42A</state>\r
+        </option>\r
+        <option>\r
+          <name>OCDownloadAttachToProgram</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>FlashLoaders</name>\r
+          <state>,,,,(default),</state>\r
+        </option>\r
+        <option>\r
+          <name>UseFlashLoader</name>\r
+          <state>1</state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>ARMSIM_ID</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>1</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>1</debug>\r
+        <option>\r
+          <name>OCSimDriverInfo</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>OCSimEnablePSP</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>OCSimPspOverrideConfig</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>OCSimPspConfigFile</name>\r
+          <state></state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>ANGEL_ID</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>0</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>1</debug>\r
+        <option>\r
+          <name>CCAngelHeartbeat</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>CAngelCommunication</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>CAngelCommBaud</name>\r
+          <version>0</version>\r
+          <state>3</state>\r
+        </option>\r
+        <option>\r
+          <name>CAngelCommPort</name>\r
+          <version>0</version>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>ANGELTCPIP</name>\r
+          <state>aaa.bbb.ccc.ddd</state>\r
+        </option>\r
+        <option>\r
+          <name>DoAngelLogfile</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>AngelLogFile</name>\r
+          <state>$TOOLKIT_DIR$\cspycomm.log</state>\r
+        </option>\r
+        <option>\r
+          <name>OCDriverInfo</name>\r
+          <state>1</state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>IARROM_ID</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>0</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>1</debug>\r
+        <option>\r
+          <name>CRomLogFileCheck</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CRomLogFileEditB</name>\r
+          <state>$TOOLKIT_DIR$\cspycomm.log</state>\r
+        </option>\r
+        <option>\r
+          <name>CRomCommunication</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CRomCommPort</name>\r
+          <version>0</version>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CRomCommBaud</name>\r
+          <version>0</version>\r
+          <state>7</state>\r
+        </option>\r
+        <option>\r
+          <name>OCDriverInfo</name>\r
+          <state>1</state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>JLINK_ID</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>7</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>1</debug>\r
+        <option>\r
+          <name>JLinkSpeed</name>\r
+          <state>32</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkDoLogfile</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkLogFile</name>\r
+          <state>$TOOLKIT_DIR$\cspycomm.log</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkHWResetDelay</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>OCDriverInfo</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>JLinkInitialSpeed</name>\r
+          <state>32</state>\r
+        </option>\r
+        <option>\r
+          <name>CCDoJlinkMultiTarget</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCScanChainNonARMDevices</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkMultiTarget</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkIRLength</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkCommRadio</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkTCPIP</name>\r
+          <state>aaa.bbb.ccc.ddd</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkResetRadio</name>\r
+          <state>2</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkResetInitSeq</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkSpeedRadioV2</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCUSBDevice</name>\r
+          <version>0</version>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchReset</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchUndef</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchSWI</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchData</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchPrefetch</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchIRQ</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchFIQ</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkBreakpointRadio</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkDoUpdateBreakpoints</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkUpdateBreakpoints</name>\r
+          <state>main</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJLinkInterfaceRadio</name>\r
+          <state>0</state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>LMIFTDI_ID</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>0</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>1</debug>\r
+        <option>\r
+          <name>OCDriverInfo</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>LmiftdiSpeed</name>\r
+          <state>500</state>\r
+        </option>\r
+        <option>\r
+          <name>CCLmiftdiResetRadio</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>CCLmiftdiDoLogfile</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCLmiftdiLogFile</name>\r
+          <state>$TOOLKIT_DIR$\cspycomm.log</state>\r
+        </option>\r
+        <option>\r
+          <name>CCLmiftdiBreakpointRadio</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCLmiftdiDoUpdateBreakpoints</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCLmiftdiUpdateBreakpoints</name>\r
+          <state>main</state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>MACRAIGOR_ID</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>2</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>1</debug>\r
+        <option>\r
+          <name>jtag</name>\r
+          <version>0</version>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>EmuSpeed</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>TCPIP</name>\r
+          <state>aaa.bbb.ccc.ddd</state>\r
+        </option>\r
+        <option>\r
+          <name>DoLogfile</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>LogFile</name>\r
+          <state>$TOOLKIT_DIR$\cspycomm.log</state>\r
+        </option>\r
+        <option>\r
+          <name>DoEmuMultiTarget</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>EmuMultiTarget</name>\r
+          <state>0@ARM7TDMI</state>\r
+        </option>\r
+        <option>\r
+          <name>EmuHWReset</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CEmuCommBaud</name>\r
+          <version>0</version>\r
+          <state>4</state>\r
+        </option>\r
+        <option>\r
+          <name>CEmuCommPort</name>\r
+          <version>0</version>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>jtago</name>\r
+          <version>0</version>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>OCDriverInfo</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>UnusedAddr</name>\r
+          <state>0x00800000</state>\r
+        </option>\r
+        <option>\r
+          <name>CCMacraigorHWResetDelay</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>CCJTagBreakpointRadio</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJTagDoUpdateBreakpoints</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCJTagUpdateBreakpoints</name>\r
+          <state>main</state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>RDI_ID</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>1</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>1</debug>\r
+        <option>\r
+          <name>CRDIDriverDll</name>\r
+          <state>Browse to your RDI driver</state>\r
+        </option>\r
+        <option>\r
+          <name>CRDILogFileCheck</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CRDILogFileEdit</name>\r
+          <state>$TOOLKIT_DIR$\cspycomm.log</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDIHWReset</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchReset</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchUndef</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchSWI</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchData</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchPrefetch</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchIRQ</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDICatchFIQ</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRDIUseETM</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>OCDriverInfo</name>\r
+          <state>1</state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>THIRDPARTY_ID</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>0</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>1</debug>\r
+        <option>\r
+          <name>CThirdPartyDriverDll</name>\r
+          <state>Browse to your third-party driver</state>\r
+        </option>\r
+        <option>\r
+          <name>CThirdPartyLogFileCheck</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CThirdPartyLogFileEditB</name>\r
+          <state>$TOOLKIT_DIR$\cspycomm.log</state>\r
+        </option>\r
+        <option>\r
+          <name>OCDriverInfo</name>\r
+          <state>1</state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <debuggerPlugins>\r
+      <plugin>\r
+        <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CMXArmPlugin.ewplugin</file>\r
+        <loadFlag>0</loadFlag>\r
+      </plugin>\r
+      <plugin>\r
+        <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CMXTinyArmPlugin.ewplugin</file>\r
+        <loadFlag>0</loadFlag>\r
+      </plugin>\r
+      <plugin>\r
+        <file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>\r
+        <loadFlag>0</loadFlag>\r
+      </plugin>\r
+      <plugin>\r
+        <file>$TOOLKIT_DIR$\plugins\rtos\OSE\OseEpsilonPlugin.ewplugin</file>\r
+        <loadFlag>0</loadFlag>\r
+      </plugin>\r
+      <plugin>\r
+        <file>$TOOLKIT_DIR$\plugins\rtos\PowerPac\PowerPacRTOS.ewplugin</file>\r
+        <loadFlag>0</loadFlag>\r
+      </plugin>\r
+      <plugin>\r
+        <file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ewplugin</file>\r
+        <loadFlag>0</loadFlag>\r
+      </plugin>\r
+      <plugin>\r
+        <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>\r
+        <loadFlag>0</loadFlag>\r
+      </plugin>\r
+      <plugin>\r
+        <file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>\r
+        <loadFlag>1</loadFlag>\r
+      </plugin>\r
+      <plugin>\r
+        <file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>\r
+        <loadFlag>0</loadFlag>\r
+      </plugin>\r
+      <plugin>\r
+        <file>$EW_DIR$\common\plugins\Profiling\Profiling.ENU.ewplugin</file>\r
+        <loadFlag>1</loadFlag>\r
+      </plugin>\r
+      <plugin>\r
+        <file>$EW_DIR$\common\plugins\Stack\Stack.ENU.ewplugin</file>\r
+        <loadFlag>1</loadFlag>\r
+      </plugin>\r
+    </debuggerPlugins>\r
+  </configuration>\r
+</project>\r
+\r
+\r

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/RTOSDemo.ewp b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/RTOSDemo.ewp
new file mode 100644 (file)
index 0000000..a0a8e38
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/RTOSDemo.ewp
@@ -0,0 +1,947 @@
+<?xml version="1.0" encoding="iso-8859-1"?>\r
+\r
+<project>\r
+  <fileVersion>1</fileVersion>\r
+  <configuration>\r
+    <name>Debug</name>\r
+    <toolchain>\r
+      <name>ARM</name>\r
+    </toolchain>\r
+    <debug>1</debug>\r
+    <settings>\r
+      <name>General</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>9</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>1</debug>\r
+        <option>\r
+          <name>OGProductVersion</name>\r
+          <state>4.41A</state>\r
+        </option>\r
+        <option>\r
+          <name>GProcessorMode</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>ExePath</name>\r
+          <state>Debug\Exe</state>\r
+        </option>\r
+        <option>\r
+          <name>ObjPath</name>\r
+          <state>Debug\Obj</state>\r
+        </option>\r
+        <option>\r
+          <name>ListPath</name>\r
+          <state>Debug\List</state>\r
+        </option>\r
+        <option>\r
+          <name>Variant</name>\r
+          <version>5</version>\r
+          <state>25</state>\r
+        </option>\r
+        <option>\r
+          <name>GEndianMode</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>GInterwork</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>GStackAlign</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>Input variant</name>\r
+          <version>1</version>\r
+          <state>3</state>\r
+        </option>\r
+        <option>\r
+          <name>Input description</name>\r
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing.</state>\r
+        </option>\r
+        <option>\r
+          <name>Output variant</name>\r
+          <version>0</version>\r
+          <state>2</state>\r
+        </option>\r
+        <option>\r
+          <name>Output description</name>\r
+          <state>No specifier a, A, no specifier n, no float nor long long.</state>\r
+        </option>\r
+        <option>\r
+          <name>GOutputBinary</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>FPU</name>\r
+          <version>0</version>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>OGCoreOrChip</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>GRuntimeLibSelect</name>\r
+          <version>0</version>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>GRuntimeLibSelectSlave</name>\r
+          <version>0</version>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>RTDescription</name>\r
+          <state>Use the normal configuration of the C/C++ runtime library. No locale interface, C locale, no file descriptor support, no multibytes in printf and scanf, and no hex floats in strtod.</state>\r
+        </option>\r
+        <option>\r
+          <name>RTConfigPath</name>\r
+          <state>$TOOLKIT_DIR$\LIB\dl7mptnnl8n.h</state>\r
+        </option>\r
+        <option>\r
+          <name>RTLibraryPath</name>\r
+          <state>$TOOLKIT_DIR$\LIB\dl7mptnnl8n.r79</state>\r
+        </option>\r
+        <option>\r
+          <name>OGLastSavedByProductVersion</name>\r
+          <state>4.41A</state>\r
+        </option>\r
+        <option>\r
+          <name>GeneralMisraRules</name>\r
+          <version>0</version>\r
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>\r
+        </option>\r
+        <option>\r
+          <name>GeneralEnableMisra</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>GeneralMisraVerbose</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>OGChipSelectEditMenu</name>\r
+          <state>LM3Sx9xx      Luminary LM3Sx9xx</state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>ICCARM</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>14</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>1</debug>\r
+        <option>\r
+          <name>CCDefines</name>\r
+          <state>IAR_ARMCM3_LM</state>\r
+          <state>PACK_STRUCT_END=</state>\r
+        </option>\r
+        <option>\r
+          <name>CCPreprocFile</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCPreprocComments</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCPreprocLine</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCListCFile</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCListCMnemonics</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCListCMessages</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCListAssFile</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCListAssSource</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCEnableRemarks</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCDiagSuppress</name>\r
+          <state>pa082, pe513, pe167, pe550, pe144, pe191, pe177, pa039, pa050</state>\r
+        </option>\r
+        <option>\r
+          <name>CCDiagRemark</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>CCDiagWarning</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>CCDiagError</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>CCObjPrefix</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>CCOptSizeSpeed</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCOptimization</name>\r
+          <version>0</version>\r
+          <state>2</state>\r
+        </option>\r
+        <option>\r
+          <name>CCAllowList</name>\r
+          <version>1</version>\r
+          <state>1001000</state>\r
+        </option>\r
+        <option>\r
+          <name>CCObjUseModuleName</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCObjModuleName</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>CCDebugInfo</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>IProcessorMode</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>IEndianMode</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>IProcessor</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>IStackAlign</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>IInterwork</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>IExtraOptionsCheck</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>IExtraOptions</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>CCLangConformance</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCSignedPlainChar</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>CCRequirePrototypes</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCMultibyteSupport</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCDiagWarnAreErr</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCCompilerRuntimeInfo</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>IFpuProcessor</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>OutputFile</name>\r
+          <state>$FILE_BNAME$.r79</state>\r
+        </option>\r
+        <option>\r
+          <name>CCLangSelect</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCLibConfigHeader</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>CCOptSizeSpeedSlave</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCOptimizationSlave</name>\r
+          <version>0</version>\r
+          <state>2</state>\r
+        </option>\r
+        <option>\r
+          <name>CCCodeFunctions</name>\r
+          <state>CODE</state>\r
+        </option>\r
+        <option>\r
+          <name>CCData</name>\r
+          <state>DATA</state>\r
+        </option>\r
+        <option>\r
+          <name>PreInclude</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>CompilerMisraRules</name>\r
+          <version>0</version>\r
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>\r
+        </option>\r
+        <option>\r
+          <name>CompilerMisraOverride</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCModuleTypeOverride</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCModuleType</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCModuleTypeCmdlineProducer</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCIncludePath2</name>\r
+          <state>$PROJ_DIR$\</state>\r
+          <state>$PROJ_DIR$\..\Common\drivers\LuminaryMicro</state>\r
+          <state>$PROJ_DIR$\..\common\include</state>\r
+          <state>$PROJ_DIR$\..\..\source\include</state>\r
+          <state>$PROJ_DIR$\webserver</state>\r
+          <state>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip</state>\r
+        </option>\r
+        <option>\r
+          <name>CCStdIncCheck</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CCStdIncludePath</name>\r
+          <state>$TOOLKIT_DIR$\INC\</state>\r
+        </option>\r
+        <option>\r
+          <name>CCInlineThreshold</name>\r
+          <version>0</version>\r
+          <state>1</state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>AARM</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>7</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>1</debug>\r
+        <option>\r
+          <name>AObjPrefix</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>AEndian</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>ACaseSensitivity</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>MacroChars</name>\r
+          <version>0</version>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>AWarnEnable</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>AWarnWhat</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>AWarnOne</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>AWarnRange1</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>AWarnRange2</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>ADebug</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>AltRegisterNames</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>ADefines</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>AList</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>AListHeader</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>AListing</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>Includes</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>MacDefs</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>MacExps</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>MacExec</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>OnlyAssed</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>MultiLine</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>PageLengthCheck</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>PageLength</name>\r
+          <state>80</state>\r
+        </option>\r
+        <option>\r
+          <name>TabSpacing</name>\r
+          <state>8</state>\r
+        </option>\r
+        <option>\r
+          <name>AXRef</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>AXRefDefines</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>AXRefInternal</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>AXRefDual</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>AProcessor</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>AFpuProcessor</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>AOutputFile</name>\r
+          <state>$FILE_BNAME$.r79</state>\r
+        </option>\r
+        <option>\r
+          <name>AMultibyteSupport</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>ALimitErrorsCheck</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>ALimitErrorsEdit</name>\r
+          <state>100</state>\r
+        </option>\r
+        <option>\r
+          <name>AIgnoreStdInclude</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>AStdIncludes</name>\r
+          <state>$TOOLKIT_DIR$\INC\</state>\r
+        </option>\r
+        <option>\r
+          <name>AUserIncludes</name>\r
+          <state>$PROJ_DIR$\</state>\r
+        </option>\r
+        <option>\r
+          <name>AExtraOptionsCheckV2</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>AExtraOptionsV2</name>\r
+          <state></state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>CUSTOM</name>\r
+      <archiveVersion>3</archiveVersion>\r
+      <data>\r
+        <extensions></extensions>\r
+        <cmdline></cmdline>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>BICOMP</name>\r
+      <archiveVersion>0</archiveVersion>\r
+      <data/>\r
+    </settings>\r
+    <settings>\r
+      <name>BUILDACTION</name>\r
+      <archiveVersion>1</archiveVersion>\r
+      <data>\r
+        <prebuild></prebuild>\r
+        <postbuild></postbuild>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>XLINK</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>18</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>1</debug>\r
+        <option>\r
+          <name>XOutOverride</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>OutputFile</name>\r
+          <state>RTOSDemo.d79</state>\r
+        </option>\r
+        <option>\r
+          <name>OutputFormat</name>\r
+          <version>11</version>\r
+          <state>16</state>\r
+        </option>\r
+        <option>\r
+          <name>FormatVariant</name>\r
+          <version>8</version>\r
+          <state>17</state>\r
+        </option>\r
+        <option>\r
+          <name>SecondaryOutputFile</name>\r
+          <state>(None for the selected format)</state>\r
+        </option>\r
+        <option>\r
+          <name>XDefines</name>\r
+          <state>__vector_table=0</state>\r
+        </option>\r
+        <option>\r
+          <name>AlwaysOutput</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>OverlapWarnings</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>NoGlobalCheck</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>XList</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>SegmentMap</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>ListSymbols</name>\r
+          <state>2</state>\r
+        </option>\r
+        <option>\r
+          <name>PageLengthCheck</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>PageLength</name>\r
+          <state>80</state>\r
+        </option>\r
+        <option>\r
+          <name>XIncludes</name>\r
+          <state>$TOOLKIT_DIR$\LIB\</state>\r
+        </option>\r
+        <option>\r
+          <name>ModuleStatus</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>XclOverride</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>XclFile</name>\r
+          <state>$PROJ_DIR$\RTOSDemo.xcl</state>\r
+        </option>\r
+        <option>\r
+          <name>XclFileSlave</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>DoFill</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>FillerByte</name>\r
+          <state>0xFF</state>\r
+        </option>\r
+        <option>\r
+          <name>DoCrc</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CrcSize</name>\r
+          <version>0</version>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>CrcAlgo</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>CrcPoly</name>\r
+          <state>0x11021</state>\r
+        </option>\r
+        <option>\r
+          <name>CrcCompl</name>\r
+          <version>0</version>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>RangeCheckAlternatives</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>SuppressAllWarn</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>SuppressDiags</name>\r
+          <state>w6</state>\r
+        </option>\r
+        <option>\r
+          <name>TreatAsWarn</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>TreatAsErr</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>ModuleLocalSym</name>\r
+          <version>0</version>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CrcBitOrder</name>\r
+          <version>0</version>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>XExtraOptionsCheck</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>XExtraOptions</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>IncludeSuppressed</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>OXLibIOConfig</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>ModuleSummary</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>xcProgramEntryLabel</name>\r
+          <state>ResetISR</state>\r
+        </option>\r
+        <option>\r
+          <name>DebugInformation</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>RuntimeControl</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>IoEmulation</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>XcRTLibraryFile</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>AllowExtraOutput</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>GenerateExtraOutput</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>XExtraOutOverride</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>ExtraOutputFile</name>\r
+          <state>RTOSDemo.sim</state>\r
+        </option>\r
+        <option>\r
+          <name>ExtraOutputFormat</name>\r
+          <version>11</version>\r
+          <state>60</state>\r
+        </option>\r
+        <option>\r
+          <name>ExtraFormatVariant</name>\r
+          <version>8</version>\r
+          <state>2</state>\r
+        </option>\r
+        <option>\r
+          <name>xcOverrideProgramEntryLabel</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>xcProgramEntryLabelSelect</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>ListOutputFormat</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>BufferedTermOutput</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>OverlaySystemMap</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>RawBinaryFile</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>RawBinarySymbol</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>RawBinarySegment</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>RawBinaryAlign</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>XLinkMisraHandler</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>CrcAlign</name>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>CrcInitialValue</name>\r
+          <state>0x0</state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>XAR</name>\r
+      <archiveVersion>2</archiveVersion>\r
+      <data>\r
+        <version>0</version>\r
+        <wantNonLocal>1</wantNonLocal>\r
+        <debug>1</debug>\r
+        <option>\r
+          <name>XARInputs</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>XAROverride</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>XAROutput</name>\r
+          <state>###Unitialized###</state>\r
+        </option>\r
+      </data>\r
+    </settings>\r
+    <settings>\r
+      <name>BILINK</name>\r
+      <archiveVersion>0</archiveVersion>\r
+      <data/>\r
+    </settings>\r
+  </configuration>\r
+  <group>\r
+    <name>Demo files</name>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\BlockQ.c</name>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\blocktim.c</name>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\death.c</name>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\flash.c</name>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\GenQTest.c</name>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\integer.c</name>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\main.c</name>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\ParTest\ParTest.c</name>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\PollQ.c</name>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\QPeek.c</name>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\Minimal\semtest.c</name>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\timertest.c</name>\r
+    </file>\r
+  </group>\r
+  <group>\r
+    <name>Library files</name>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\drivers\LuminaryMicro\IAR\driverlib.r79</name>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\osram128x64x4.c</name>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\rit128x96x4.c</name>\r
+    </file>\r
+  </group>\r
+  <group>\r
+    <name>Scheduler files</name>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\Source\portable\MemMang\heap_2.c</name>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\Source\list.c</name>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\Source\portable\IAR\ARM_CM3\port.c</name>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\Source\portable\IAR\ARM_CM3\portasm.s</name>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\Source\queue.c</name>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\Source\tasks.c</name>\r
+    </file>\r
+  </group>\r
+  <group>\r
+    <name>System files</name>\r
+    <file>\r
+      <name>$PROJ_DIR$\startup_ewarm.c</name>\r
+    </file>\r
+  </group>\r
+  <group>\r
+    <name>uIP files</name>\r
+    <file>\r
+      <name>$PROJ_DIR$\webserver\emac.c</name>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\webserver\http-strings.c</name>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\webserver\httpd-cgi.c</name>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\webserver\httpd-fs.c</name>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\webserver\httpd.c</name>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\psock.c</name>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\timer.c</name>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uip.c</name>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\Common\ethernet\uIP\uip-1.0\uip\uip_arp.c</name>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\webserver\uIP_Task.c</name>\r
+    </file>\r
+  </group>\r
+</project>\r
+\r
+\r

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/RTOSDemo.eww b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/RTOSDemo.eww
new file mode 100644 (file)
index 0000000..239a938
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/RTOSDemo.eww
@@ -0,0 +1,10 @@
+<?xml version="1.0" encoding="iso-8859-1"?>\r
+\r
+<workspace>\r
+  <project>\r
+    <path>$WS_DIR$\RTOSDemo.ewp</path>\r
+  </project>\r
+  <batchBuild/>\r
+</workspace>\r
+\r
+\r

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/RTOSDemo.xcl b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/RTOSDemo.xcl
new file mode 100644 (file)
index 0000000..a7044e6
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/RTOSDemo.xcl
@@ -0,0 +1,56 @@
+//*****************************************************************************
+//
+// webserver-lwip.xcl - Linker script for EW-ARM.
+//
+// Copyright (c) 2006-2007 Luminary Micro, Inc.  All rights reserved.
+//
+// Software License Agreement
+//
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
+// exclusively on LMI's microcontroller products.
+//
+// The software is owned by LMI and/or its suppliers, and is protected under
+// applicable copyright laws.  All rights are reserved.  Any use in violation
+// of the foregoing restrictions may subject the user to criminal sanctions
+// under applicable laws, as well as to civil liability for the breach of the
+// terms and conditions of this license.
+//
+// THIS SOFTWARE IS PROVIDED AS IS.  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
+//
+//*****************************************************************************
+
+//
+// Set the CPU type to ARM.
+//
+-carm
+
+//
+// Define the size of flash and SRAM.
+//
+-DROMSTART=00000000
+-DROMEND=00040000
+-DRAMSTART=20000000
+-DRAMEND=20010000\r
+\r
+
+
+//
+// Define the sections to place into flash, and the order to place them.
+//
+-Z(CODE)INTVEC=ROMSTART-ROMEND
+-Z(CODE)ICODE,DIFUNCT=ROMSTART-ROMEND
+-Z(CODE)CODE=ROMSTART-ROMEND
+-Z(CONST)CODE_ID=ROMSTART-ROMEND
+-Z(CONST)INITTAB,DATA_ID,DATA_C=ROMSTART-ROMEND
+-Z(CONST)CHECKSUM=ROMSTART-ROMEND
+
+//
+// Define the sections to place into SRAM, and the order to place them.
+//
+-Z(DATA)VTABLE=RAMSTART-RAMEND
+-Z(DATA)DATA_I,DATA_Z,DATA_N=RAMSTART-RAMEND
+-Z(DATA)CODE_I=RAMSTART-RAMEND

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/bitmap.h b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/bitmap.h
new file mode 100644 (file)
index 0000000..02ce0b3
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/bitmap.h
@@ -0,0 +1,171 @@
+#ifndef BITMAP_H\r
+#define BITMAP_H\r
+\r
+const unsigned char pucImage[] =\r
+{\r
+0x00, 0x0a, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0x00, 0x0a, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xa0, 0x0a, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
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+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0x00, 0x0f, 0x70, 0x08, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0x00, 0x07, 0x70, 0x07,\r
+0x88, 0x88, 0x88, 0xff, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88,\r
+0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88,\r
+0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xfa, 0xaa,\r
+0xaa, 0xaf, 0xff, 0xff, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0xf7, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x70, 0x00, 0x00, 0x00,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0x70, 0x08, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0x70, 0x08,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfa, 0xaa,\r
+0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaa, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0x0a, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xa0, 0x00, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0x00,\r
+0x00 };\r
+\r
+#define bmpBITMAP_HEIGHT       50\r
+#define bmpBITMAP_WIDTH                128\r
+\r
+#endif\r

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/lcd_message.h b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/lcd_message.h
new file mode 100644 (file)
index 0000000..adfc18b
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/lcd_message.h
@@ -0,0 +1,9 @@
+#ifndef LCD_MESSAGE_H\r
+#define LCD_MESSAGE_H\r
+\r
+typedef struct\r
+{\r
+       signed char *pcMessage;\r
+} xOLEDMessage;\r
+\r
+#endif /* LCD_MESSAGE_H */\r

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/main.c b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/main.c
new file mode 100644 (file)
index 0000000..8572cd6
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/main.c
@@ -0,0 +1,361 @@
+/*\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
+\r
+       This file is part of the FreeRTOS.org distribution.\r
+\r
+       FreeRTOS.org is free software; you can redistribute it and/or modify\r
+       it under the terms of the GNU General Public License as published by\r
+       the Free Software Foundation; either version 2 of the License, or\r
+       (at your option) any later version.\r
+\r
+       FreeRTOS.org is distributed in the hope that it will be useful,\r
+       but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+       MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
+       GNU General Public License for more details.\r
+\r
+       You should have received a copy of the GNU General Public License\r
+       along with FreeRTOS.org; if not, write to the Free Software\r
+       Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
+\r
+       A special exception to the GPL can be applied should you wish to distribute\r
+       a combined work that includes FreeRTOS.org, without being obliged to provide\r
+       the source code for any proprietary components.  See the licensing section\r
+       of http://www.FreeRTOS.org for full details of how and when the exception\r
+       can be applied.\r
+\r
+       ***************************************************************************\r
+       See http://www.FreeRTOS.org for documentation, latest information, license\r
+       and contact details.  Please ensure to read the configuration and relevant\r
+       port sections of the online documentation.\r
+       ***************************************************************************\r
+*/\r
+\r
+\r
+/*\r
+ * Creates all the demo application tasks, then starts the scheduler.  The WEB\r
+ * documentation provides more details of the standard demo application tasks.\r
+ * In addition to the standard demo tasks, the following tasks and tests are\r
+ * defined and/or created within this file:\r
+ *\r
+ * "Fast Interrupt Test" - A high frequency periodic interrupt is generated\r
+ * using a free running timer to demonstrate the use of the\r
+ * configKERNEL_INTERRUPT_PRIORITY configuration constant.  The interrupt\r
+ * service routine measures the number of processor clocks that occur between\r
+ * each interrupt - and in so doing measures the jitter in the interrupt timing.\r
+ * The maximum measured jitter time is latched in the ulMaxJitter variable, and\r
+ * displayed on the OLED display by the 'OLED' task as described below.  The\r
+ * fast interrupt is configured and handled in the timertest.c source file.\r
+ *\r
+ * "OLED" task - the OLED task is a 'gatekeeper' task.  It is the only task that\r
+ * is permitted to access the display directly.  Other tasks wishing to write a\r
+ * message to the OLED send the message on a queue to the OLED task instead of\r
+ * accessing the OLED themselves.  The OLED task just blocks on the queue waiting\r
+ * for messages - waking and displaying the messages as they arrive.\r
+ *\r
+ * "Check" hook -  This only executes every five seconds from the tick hook.\r
+ * Its main function is to check that all the standard demo tasks are still\r
+ * operational.  Should any unexpected behaviour within a demo task be discovered\r
+ * the tick hook will write an error to the OLED (via the OLED task).  If all the\r
+ * demo tasks are executing with their expected behaviour then the check task\r
+ * writes PASS to the OLED (again via the OLED task), as described above.\r
+ *\r
+ * "uIP" task -  This is the task that handles the uIP stack.  All TCP/IP\r
+ * processing is performed in this task.\r
+ */\r
+\r
+\r
+\r
+/* Standard includes. */\r
+#include <stdio.h>\r
+\r
+/* Scheduler includes. */\r
+#include "FreeRTOS.h"\r
+#include "Task.h"\r
+#include "queue.h"\r
+#include "semphr.h"\r
+\r
+/* Demo app includes. */\r
+#include "BlockQ.h"\r
+#include "death.h"\r
+#include "integer.h"\r
+#include "blocktim.h"\r
+#include "flash.h"\r
+#include "partest.h"\r
+#include "semtest.h"\r
+#include "pollq.h"\r
+#include "lcd_message.h"\r
+#include "bitmap.h"\r
+#include "GenQTest.h"\r
+#include "QPeek.h"\r
+\r
+/* Hardware library includes. */\r
+#include "hw_memmap.h"\r
+#include "hw_types.h"\r
+#include "hw_sysctl.h"\r
+#include "sysctl.h"\r
+#include "gpio.h"\r
+#include "rit128x96x4.h"\r
+#include "osram128x64x4.h"\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* The time between cycles of the 'check' functionality (defined within the\r
+tick hook. */\r
+#define mainCHECK_DELAY                                                ( ( portTickType ) 5000 / portTICK_RATE_MS )\r
+\r
+/* Size of the stack allocated to the uIP task. */\r
+#define mainBASIC_WEB_STACK_SIZE            ( configMINIMAL_STACK_SIZE * 3 )\r
+\r
+/* The OLED task uses the sprintf function so requires a little more stack too. */\r
+#define mainOLED_TASK_STACK_SIZE                       ( configMINIMAL_STACK_SIZE + 50 )\r
+\r
+/* Task priorities. */\r
+#define mainQUEUE_POLL_PRIORITY                                ( tskIDLE_PRIORITY + 2 )\r
+#define mainCHECK_TASK_PRIORITY                                ( tskIDLE_PRIORITY + 3 )\r
+#define mainSEM_TEST_PRIORITY                          ( tskIDLE_PRIORITY + 1 )\r
+#define mainBLOCK_Q_PRIORITY                           ( tskIDLE_PRIORITY + 2 )\r
+#define mainCREATOR_TASK_PRIORITY           ( tskIDLE_PRIORITY + 3 )\r
+#define mainINTEGER_TASK_PRIORITY           ( tskIDLE_PRIORITY )\r
+#define mainGEN_QUEUE_TASK_PRIORITY                    ( tskIDLE_PRIORITY )\r
+\r
+/* The maximum number of message that can be waiting for display at any one\r
+time. */\r
+#define mainOLED_QUEUE_SIZE                                    ( 3 )\r
+\r
+/* Dimensions the buffer into which the jitter time is written. */\r
+#define mainMAX_MSG_LEN                                                25\r
+\r
+/* The period of the system clock in nano seconds.  This is used to calculate\r
+the jitter time in nano seconds. */\r
+#define mainNS_PER_CLOCK                                       ( ( unsigned portLONG ) ( ( 1.0 / ( double ) configCPU_CLOCK_HZ ) * 1000000000.0 ) )\r
+\r
+/* Constants used when writing strings to the display. */\r
+#define mainCHARACTER_HEIGHT                           ( 9 )\r
+#define mainMAX_ROWS_96                                                ( mainCHARACTER_HEIGHT * 10 )\r
+#define mainMAX_ROWS_64                                                ( mainCHARACTER_HEIGHT * 7 )\r
+#define mainFULL_SCALE                                         ( 15 )\r
+#define ulSSI_FREQUENCY                                                ( 3500000UL )\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * The task that handles the uIP stack.  All TCP/IP processing is performed in\r
+ * this task.\r
+ */\r
+extern void vuIP_Task( void *pvParameters );\r
+\r
+/*\r
+ * The display is written two by more than one task so is controlled by a\r
+ * 'gatekeeper' task.  This is the only task that is actually permitted to\r
+ * access the display directly.  Other tasks wanting to display a message send\r
+ * the message to the gatekeeper.\r
+ */\r
+static void vOLEDTask( void *pvParameters );\r
+\r
+/*\r
+ * Configure the hardware for the demo.\r
+ */\r
+static void prvSetupHardware( void );\r
+\r
+/*\r
+ * Configures the high frequency timers - those used to measure the timing\r
+ * jitter while the real time kernel is executing.\r
+ */\r
+extern void vSetupTimer( void );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* The queue used to send messages to the OLED task. */\r
+xQueueHandle xOLEDQueue;\r
+\r
+/* The welcome text. */\r
+const portCHAR * const pcWelcomeMessage = "   www.FreeRTOS.org";\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+int main( void )\r
+{\r
+       prvSetupHardware();\r
+\r
+       /* Create the queue used by the OLED task.  Messages for display on the OLED\r
+       are received via this queue. */\r
+       xOLEDQueue = xQueueCreate( mainOLED_QUEUE_SIZE, sizeof( xOLEDMessage ) );\r
+\r
+       /* Create the uIP task if running on a processor that includes a MAC and\r
+       PHY. */\r
+       if( SysCtlPeripheralPresent( SYSCTL_PERIPH_ETH ) )\r
+       {\r
+               xTaskCreate( vuIP_Task, ( signed portCHAR * ) "uIP", mainBASIC_WEB_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY - 1, NULL );\r
+       }\r
+\r
+       /* Start the standard demo tasks. */\r
+       vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
+    vCreateBlockTimeTasks();\r
+    vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
+    vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );\r
+    vStartIntegerMathTasks( mainINTEGER_TASK_PRIORITY );\r
+    vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );\r
+    vStartQueuePeekTasks();\r
+\r
+       /* Start the tasks defined within this file/specific to this demo. */\r
+       xTaskCreate( vOLEDTask, ( signed portCHAR * ) "OLED", mainOLED_TASK_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );\r
+\r
+       /* The suicide tasks must be created last as they need to know how many\r
+       tasks were running prior to their creation in order to ascertain whether\r
+       or not the correct/expected number of tasks are running at any given time. */\r
+    vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY );\r
+\r
+       /* Configure the high frequency interrupt used to measure the interrupt\r
+       jitter time.  The Keil port does not yet include the\r
+       configKERNEL_INTERRUPT_PRIORITY functionality so cannot perform this test. */\r
+       #ifndef RVDS_ARMCM3_LM3S102\r
+       {\r
+               vSetupTimer();\r
+       }\r
+       #endif\r
+       \r
+       /* Start the scheduler. */\r
+       vTaskStartScheduler();\r
+\r
+    /* Will only get here if there was insufficient memory to create the idle\r
+    task. */\r
+       return 0;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void prvSetupHardware( void )\r
+{\r
+    /* If running on Rev A2 silicon, turn the LDO voltage up to 2.75V.  This is\r
+    a workaround to allow the PLL to operate reliably. */\r
+    if( DEVICE_IS_REVA2 )\r
+    {\r
+        SysCtlLDOSet( SYSCTL_LDO_2_75V );\r
+    }\r
+       \r
+       /* Set the clocking to run from the PLL at 50 MHz */\r
+       SysCtlClockSet( SYSCTL_SYSDIV_4 | SYSCTL_USE_PLL | SYSCTL_OSC_MAIN | SYSCTL_XTAL_8MHZ );\r
+       \r
+       /*      Enable Port F for Ethernet LEDs\r
+               LED0        Bit 3   Output\r
+               LED1        Bit 2   Output */\r
+       SysCtlPeripheralEnable( SYSCTL_PERIPH_GPIOF );\r
+       GPIODirModeSet( GPIO_PORTF_BASE, (GPIO_PIN_2 | GPIO_PIN_3), GPIO_DIR_MODE_HW );\r
+       GPIOPadConfigSet( GPIO_PORTF_BASE, (GPIO_PIN_2 | GPIO_PIN_3 ), GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD );  \r
+       \r
+       vParTestInitialise();\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vApplicationTickHook( void )\r
+{\r
+static xOLEDMessage xMessage = { "PASS" };\r
+static unsigned portLONG ulTicksSinceLastDisplay = 0;\r
+\r
+       /* Called from every tick interrupt.  Have enough ticks passed to make it\r
+       time to perform our health status check again? */\r
+       ulTicksSinceLastDisplay++;\r
+       if( ulTicksSinceLastDisplay >= mainCHECK_DELAY )\r
+       {\r
+               ulTicksSinceLastDisplay = 0;\r
+               \r
+               /* Has an error been found in any task? */\r
+               if( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
+               {\r
+                       xMessage.pcMessage = "ERROR IN GEN Q";\r
+               }\r
+               else if( xAreQueuePeekTasksStillRunning() != pdTRUE )\r
+               {\r
+                       xMessage.pcMessage = "ERROR IN PEEK Q";\r
+               }\r
+               else if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
+               {\r
+                       xMessage.pcMessage = "ERROR IN BLOCK Q";\r
+               }\r
+               else if( xAreBlockTimeTestTasksStillRunning() != pdTRUE )\r
+               {\r
+                       xMessage.pcMessage = "ERROR IN BLOCK TIME";\r
+               }\r
+           else if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
+           {\r
+               xMessage.pcMessage = "ERROR IN SEMAPHORE";\r
+           }\r
+           else if( xArePollingQueuesStillRunning() != pdTRUE )\r
+           {\r
+               xMessage.pcMessage = "ERROR IN POLL Q";\r
+           }\r
+           else if( xIsCreateTaskStillRunning() != pdTRUE )\r
+           {\r
+               xMessage.pcMessage = "ERROR IN CREATE";\r
+           }\r
+           else if( xAreIntegerMathsTaskStillRunning() != pdTRUE )\r
+           {\r
+               xMessage.pcMessage = "ERROR IN MATH";\r
+           }\r
+       \r
+               /* Send the message to the OLED gatekeeper for display. */\r
+               xQueueSendFromISR( xOLEDQueue, &xMessage, pdFALSE );\r
+       }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vOLEDTask( void *pvParameters )\r
+{\r
+xOLEDMessage xMessage;\r
+unsigned portLONG ulY, ulMaxY;\r
+static portCHAR cMessage[ mainMAX_MSG_LEN ];\r
+extern unsigned portLONG ulMaxJitter;\r
+\r
+/* Functions to access the OLED.  The one used depends on the dev kit\r
+being used. */\r
+void ( *vOLEDInit )( unsigned portLONG );\r
+void ( *vOLEDStringDraw )( const portCHAR *, unsigned portLONG, unsigned portLONG, unsigned portCHAR );\r
+void ( *vOLEDImageDraw )( const unsigned portCHAR *, unsigned portLONG, unsigned portLONG, unsigned portLONG, unsigned portLONG );\r
+void ( *vOLEDClear )( void );\r
+\r
+       /* Map the OLED access functions to the driver functions that are appropriate\r
+       for the evaluation kit being used. */   \r
+       switch( HWREG( SYSCTL_DID1 ) & SYSCTL_DID1_PRTNO_MASK )\r
+       {\r
+               case SYSCTL_DID1_PRTNO_6965     :       \r
+               case SYSCTL_DID1_PRTNO_2965     :       vOLEDInit = OSRAM128x64x4Init;\r
+                                                                               vOLEDStringDraw = OSRAM128x64x4StringDraw;\r
+                                                                               vOLEDImageDraw = OSRAM128x64x4ImageDraw;\r
+                                                                               vOLEDClear = OSRAM128x64x4Clear;\r
+                                                                               ulMaxY = mainMAX_ROWS_64;\r
+                                                                               break;\r
+                                                                               \r
+               default                                         :       vOLEDInit = RIT128x96x4Init;\r
+                                                                               vOLEDStringDraw = RIT128x96x4StringDraw;\r
+                                                                               vOLEDImageDraw = RIT128x96x4ImageDraw;\r
+                                                                               vOLEDClear = RIT128x96x4Clear;\r
+                                                                               ulMaxY = mainMAX_ROWS_96;                                                                               \r
+                                                                               break;\r
+       }\r
+\r
+       ulY = ulMaxY;\r
+       \r
+       /* Initialise the OLED and display a startup message. */\r
+       vOLEDInit( ulSSI_FREQUENCY );   \r
+       vOLEDStringDraw( " POWERED BY FreeRTOS", 0, 0, mainFULL_SCALE );\r
+       vOLEDImageDraw( pucImage, 0, mainCHARACTER_HEIGHT + 1, bmpBITMAP_WIDTH, bmpBITMAP_HEIGHT );\r
+       \r
+       for( ;; )\r
+       {\r
+               /* Wait for a message to arrive that requires displaying. */\r
+               xQueueReceive( xOLEDQueue, &xMessage, portMAX_DELAY );\r
+       \r
+               /* Write the message on the next available row. */\r
+               ulY += mainCHARACTER_HEIGHT;\r
+               if( ulY >= ulMaxY )\r
+               {\r
+                       ulY = mainCHARACTER_HEIGHT;\r
+                       vOLEDClear();\r
+                       vOLEDStringDraw( pcWelcomeMessage, 0, 0, mainFULL_SCALE );                      \r
+               }\r
+\r
+               /* Display the message along with the maximum jitter time from the\r
+               high priority time test. */\r
+               sprintf( cMessage, "%s [%uns]", xMessage.pcMessage, ulMaxJitter * mainNS_PER_CLOCK );\r
+               vOLEDStringDraw( cMessage, 0, ulY, mainFULL_SCALE );\r
+       }\r
+}\r

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/osram128x64x4.c b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/osram128x64x4.c
new file mode 100644 (file)
index 0000000..3353a82
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/osram128x64x4.c
@@ -0,0 +1,933 @@
+//*****************************************************************************\r
+//\r
+// osram128x64x4.c - Driver for the OSRAM 128x64x4 graphical OLED display.\r
+//\r
+// Copyright (c) 2006-2007 Luminary Micro, Inc.  All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1408 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+//*****************************************************************************\r
+//\r
+//! \addtogroup ek_lm3sx965_api\r
+//! @{\r
+//\r
+//*****************************************************************************\r
+\r
+#include "hw_ssi.h"\r
+#include "hw_memmap.h"\r
+#include "hw_sysctl.h"\r
+#include "hw_types.h"\r
+#include "debug.h"\r
+#include "gpio.h"\r
+#include "ssi.h"\r
+#include "sysctl.h"\r
+#include "osram128x64x4.h"\r
+\r
+//*****************************************************************************\r
+//\r
+// Flag to indicate if SSI port is enabled for OSRAM usage.\r
+//\r
+//*****************************************************************************\r
+static volatile tBoolean g_bSSIEnabled = false;\r
+\r
+//*****************************************************************************\r
+//\r
+// Define the OSRAM 128x64x4 Remap Setting(s).  This will be used in\r
+// several places in the code to switch between vertical and horizontal\r
+// address incrementing.\r
+//\r
+// The Remap Command (0xA0) takes one 8-bit parameter.  The parameter is\r
+// defined as follows.\r
+//\r
+// Bit 7: Reserved\r
+// Bit 6: Disable(0)/Enable(1) COM Split Odd Even\r
+//        When enabled, the COM signals are split Odd on one side, even on\r
+//        the other.  Otherwise, they are split 0-39 on one side, 40-79 on\r
+//        the other.\r
+// Bit 5: Reserved\r
+// Bit 4: Disable(0)/Enable(1) COM Remap\r
+//        When Enabled, ROW 0-79 map to COM 79-0 (i.e. reverse row order)\r
+// Bit 3: Reserved\r
+// Bit 2: Horizontal(0)/Vertical(1) Address Increment\r
+//        When set, data RAM address will increment along the column rather\r
+//        than along the row.\r
+// Bit 1: Disable(0)/Enable(1) Nibble Remap\r
+//        When enabled, the upper and lower nibbles in the DATA bus for access\r
+//        to the data RAM are swapped.\r
+// Bit 0: Disable(0)/Enable(1) Column Address Remap\r
+//        When enabled, DATA RAM columns 0-63 are remapped to Segment Columns\r
+//        127-0.\r
+//\r
+//*****************************************************************************\r
+#define OSRAM_INIT_REMAP    0x52\r
+#define OSRAM_INIT_OFFSET   0x4C\r
+static const unsigned char g_pucOSRAM128x64x4VerticalInc[]   = { 0xA0, 0x56 };\r
+static const unsigned char g_pucOSRAM128x64x4HorizontalInc[] = { 0xA0, 0x52 };\r
+\r
+//*****************************************************************************\r
+//\r
+// A 5x7 font (in a 6x8 cell, where the sixth column is omitted from this\r
+// table) for displaying text on the OLED display.  The data is organized as\r
+// bytes from the left column to the right column, with each byte containing\r
+// the top row in the LSB and the bottom row in the MSB.\r
+//\r
+// Note:  This is the same font data that is used in the EK-LM3S811\r
+// osram96x16x1 driver.  The single bit-per-pixel is expaned in the StringDraw\r
+// function to the appropriate four bit-per-pixel gray scale format.\r
+//\r
+//*****************************************************************************\r
+static const unsigned char g_pucFont[96][5] =\r
+{\r
+    { 0x00, 0x00, 0x00, 0x00, 0x00 }, // " "\r
+    { 0x00, 0x00, 0x4f, 0x00, 0x00 }, // !\r
+    { 0x00, 0x07, 0x00, 0x07, 0x00 }, // "\r
+    { 0x14, 0x7f, 0x14, 0x7f, 0x14 }, // #\r
+    { 0x24, 0x2a, 0x7f, 0x2a, 0x12 }, // $\r
+    { 0x23, 0x13, 0x08, 0x64, 0x62 }, // %\r
+    { 0x36, 0x49, 0x55, 0x22, 0x50 }, // &\r
+    { 0x00, 0x05, 0x03, 0x00, 0x00 }, // '\r
+    { 0x00, 0x1c, 0x22, 0x41, 0x00 }, // (\r
+    { 0x00, 0x41, 0x22, 0x1c, 0x00 }, // )\r
+    { 0x14, 0x08, 0x3e, 0x08, 0x14 }, // *\r
+    { 0x08, 0x08, 0x3e, 0x08, 0x08 }, // +\r
+    { 0x00, 0x50, 0x30, 0x00, 0x00 }, // ,\r
+    { 0x08, 0x08, 0x08, 0x08, 0x08 }, // -\r
+    { 0x00, 0x60, 0x60, 0x00, 0x00 }, // .\r
+    { 0x20, 0x10, 0x08, 0x04, 0x02 }, // /\r
+    { 0x3e, 0x51, 0x49, 0x45, 0x3e }, // 0\r
+    { 0x00, 0x42, 0x7f, 0x40, 0x00 }, // 1\r
+    { 0x42, 0x61, 0x51, 0x49, 0x46 }, // 2\r
+    { 0x21, 0x41, 0x45, 0x4b, 0x31 }, // 3\r
+    { 0x18, 0x14, 0x12, 0x7f, 0x10 }, // 4\r
+    { 0x27, 0x45, 0x45, 0x45, 0x39 }, // 5\r
+    { 0x3c, 0x4a, 0x49, 0x49, 0x30 }, // 6\r
+    { 0x01, 0x71, 0x09, 0x05, 0x03 }, // 7\r
+    { 0x36, 0x49, 0x49, 0x49, 0x36 }, // 8\r
+    { 0x06, 0x49, 0x49, 0x29, 0x1e }, // 9\r
+    { 0x00, 0x36, 0x36, 0x00, 0x00 }, // :\r
+    { 0x00, 0x56, 0x36, 0x00, 0x00 }, // ;\r
+    { 0x08, 0x14, 0x22, 0x41, 0x00 }, // <\r
+    { 0x14, 0x14, 0x14, 0x14, 0x14 }, // =\r
+    { 0x00, 0x41, 0x22, 0x14, 0x08 }, // >\r
+    { 0x02, 0x01, 0x51, 0x09, 0x06 }, // ?\r
+    { 0x32, 0x49, 0x79, 0x41, 0x3e }, // @\r
+    { 0x7e, 0x11, 0x11, 0x11, 0x7e }, // A\r
+    { 0x7f, 0x49, 0x49, 0x49, 0x36 }, // B\r
+    { 0x3e, 0x41, 0x41, 0x41, 0x22 }, // C\r
+    { 0x7f, 0x41, 0x41, 0x22, 0x1c }, // D\r
+    { 0x7f, 0x49, 0x49, 0x49, 0x41 }, // E\r
+    { 0x7f, 0x09, 0x09, 0x09, 0x01 }, // F\r
+    { 0x3e, 0x41, 0x49, 0x49, 0x7a }, // G\r
+    { 0x7f, 0x08, 0x08, 0x08, 0x7f }, // H\r
+    { 0x00, 0x41, 0x7f, 0x41, 0x00 }, // I\r
+    { 0x20, 0x40, 0x41, 0x3f, 0x01 }, // J\r
+    { 0x7f, 0x08, 0x14, 0x22, 0x41 }, // K\r
+    { 0x7f, 0x40, 0x40, 0x40, 0x40 }, // L\r
+    { 0x7f, 0x02, 0x0c, 0x02, 0x7f }, // M\r
+    { 0x7f, 0x04, 0x08, 0x10, 0x7f }, // N\r
+    { 0x3e, 0x41, 0x41, 0x41, 0x3e }, // O\r
+    { 0x7f, 0x09, 0x09, 0x09, 0x06 }, // P\r
+    { 0x3e, 0x41, 0x51, 0x21, 0x5e }, // Q\r
+    { 0x7f, 0x09, 0x19, 0x29, 0x46 }, // R\r
+    { 0x46, 0x49, 0x49, 0x49, 0x31 }, // S\r
+    { 0x01, 0x01, 0x7f, 0x01, 0x01 }, // T\r
+    { 0x3f, 0x40, 0x40, 0x40, 0x3f }, // U\r
+    { 0x1f, 0x20, 0x40, 0x20, 0x1f }, // V\r
+    { 0x3f, 0x40, 0x38, 0x40, 0x3f }, // W\r
+    { 0x63, 0x14, 0x08, 0x14, 0x63 }, // X\r
+    { 0x07, 0x08, 0x70, 0x08, 0x07 }, // Y\r
+    { 0x61, 0x51, 0x49, 0x45, 0x43 }, // Z\r
+    { 0x00, 0x7f, 0x41, 0x41, 0x00 }, // [\r
+    { 0x02, 0x04, 0x08, 0x10, 0x20 }, // "\"\r
+    { 0x00, 0x41, 0x41, 0x7f, 0x00 }, // ]\r
+    { 0x04, 0x02, 0x01, 0x02, 0x04 }, // ^\r
+    { 0x40, 0x40, 0x40, 0x40, 0x40 }, // _\r
+    { 0x00, 0x01, 0x02, 0x04, 0x00 }, // `\r
+    { 0x20, 0x54, 0x54, 0x54, 0x78 }, // a\r
+    { 0x7f, 0x48, 0x44, 0x44, 0x38 }, // b\r
+    { 0x38, 0x44, 0x44, 0x44, 0x20 }, // c\r
+    { 0x38, 0x44, 0x44, 0x48, 0x7f }, // d\r
+    { 0x38, 0x54, 0x54, 0x54, 0x18 }, // e\r
+    { 0x08, 0x7e, 0x09, 0x01, 0x02 }, // f\r
+    { 0x0c, 0x52, 0x52, 0x52, 0x3e }, // g\r
+    { 0x7f, 0x08, 0x04, 0x04, 0x78 }, // h\r
+    { 0x00, 0x44, 0x7d, 0x40, 0x00 }, // i\r
+    { 0x20, 0x40, 0x44, 0x3d, 0x00 }, // j\r
+    { 0x7f, 0x10, 0x28, 0x44, 0x00 }, // k\r
+    { 0x00, 0x41, 0x7f, 0x40, 0x00 }, // l\r
+    { 0x7c, 0x04, 0x18, 0x04, 0x78 }, // m\r
+    { 0x7c, 0x08, 0x04, 0x04, 0x78 }, // n\r
+    { 0x38, 0x44, 0x44, 0x44, 0x38 }, // o\r
+    { 0x7c, 0x14, 0x14, 0x14, 0x08 }, // p\r
+    { 0x08, 0x14, 0x14, 0x18, 0x7c }, // q\r
+    { 0x7c, 0x08, 0x04, 0x04, 0x08 }, // r\r
+    { 0x48, 0x54, 0x54, 0x54, 0x20 }, // s\r
+    { 0x04, 0x3f, 0x44, 0x40, 0x20 }, // t\r
+    { 0x3c, 0x40, 0x40, 0x20, 0x7c }, // u\r
+    { 0x1c, 0x20, 0x40, 0x20, 0x1c }, // v\r
+    { 0x3c, 0x40, 0x30, 0x40, 0x3c }, // w\r
+    { 0x44, 0x28, 0x10, 0x28, 0x44 }, // x\r
+    { 0x0c, 0x50, 0x50, 0x50, 0x3c }, // y\r
+    { 0x44, 0x64, 0x54, 0x4c, 0x44 }, // z\r
+    { 0x00, 0x08, 0x36, 0x41, 0x00 }, // {\r
+    { 0x00, 0x00, 0x7f, 0x00, 0x00 }, // |\r
+    { 0x00, 0x41, 0x36, 0x08, 0x00 }, // }\r
+    { 0x02, 0x01, 0x02, 0x04, 0x02 }, // ~\r
+    { 0x02, 0x01, 0x02, 0x04, 0x02 }, // ~\r
+};\r
+\r
+//*****************************************************************************\r
+//\r
+// The sequence of commands used to initialize the SSD0303 controller.  Each\r
+// command is described as follows:  there is a byte specifying the number of\r
+// bytes in the command sequence, followed by that many bytes of command data.\r
+// Note:  This initialization sequence is derived from OSRAM App Note AN018.\r
+//\r
+//*****************************************************************************\r
+static const unsigned char g_pucOSRAM128x64x4Init[] =\r
+{\r
+    //\r
+    // Column Address\r
+    //\r
+    4, 0x15, 0, 63, 0xe3,\r
+\r
+    //\r
+    // Row Address\r
+    //\r
+    4, 0x75, 0, 63, 0xe3,\r
+\r
+    //\r
+    // Contrast Control\r
+    //\r
+    3, 0x81, 50, 0xe3,\r
+\r
+    //\r
+    // Half Current Range\r
+    //\r
+    2, 0x85, 0xe3,\r
+\r
+    //\r
+    // Display Re-map\r
+    //\r
+    3, 0xA0, OSRAM_INIT_REMAP, 0xe3,\r
+\r
+    //\r
+    // Display Start Line\r
+    //\r
+    3, 0xA1, 0, 0xe3,\r
+\r
+    //\r
+    // Display Offset\r
+    //\r
+    3, 0xA2, OSRAM_INIT_OFFSET, 0xe3,\r
+\r
+    //\r
+    // Display Mode Normal\r
+    //\r
+    2, 0xA4, 0xe3,\r
+\r
+    //\r
+    // Multiplex Ratio\r
+    //\r
+    3, 0xA8, 63, 0xe3,\r
+\r
+    //\r
+    // Phase Length\r
+    //\r
+    3, 0xB1, 0x22, 0xe3,\r
+\r
+    //\r
+    // Row Period\r
+    //\r
+    3, 0xB2, 70, 0xe3,\r
+\r
+    //\r
+    // Display Clock Divide\r
+    //\r
+    3, 0xB3, 0xF1, 0xe3,\r
+\r
+    //\r
+    // VSL\r
+    //\r
+    3, 0xBF, 0x0D, 0xe3,\r
+\r
+    //\r
+    // VCOMH\r
+    //\r
+    3, 0xBE, 0x02, 0xe3,\r
+\r
+    //\r
+    // VP\r
+    //\r
+    3, 0xBC, 0x10, 0xe3,\r
+\r
+    //\r
+    // Gamma\r
+    //\r
+    10, 0xB8, 0x01, 0x11, 0x22, 0x32, 0x43, 0x54, 0x65, 0x76, 0xe3,\r
+\r
+    //\r
+    // Set DC-DC\r
+    3, 0xAD, 0x03, 0xe3,\r
+\r
+    //\r
+    // Display ON/OFF\r
+    //\r
+    2, 0xAF, 0xe3,\r
+};\r
+\r
+//*****************************************************************************\r
+//\r
+//! \internal\r
+//!\r
+//! Write a sequence of command bytes to the SSD0323 controller.\r
+//!\r
+//! The data is written in a polled fashion; this function will not return\r
+//! until the entire byte sequence has been written to the controller.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+static void\r
+OSRAMWriteCommand(const unsigned char *pucBuffer, unsigned long ulCount)\r
+{\r
+    unsigned long ulTemp;\r
+\r
+    //\r
+    // Return iff SSI port is not enabled for OSRAM.\r
+    //\r
+    if(!g_bSSIEnabled)\r
+    {\r
+        return;\r
+    }\r
+\r
+    //\r
+    // Clear the command/control bit to enable command mode.\r
+    //\r
+    GPIOPinWrite(GPIO_PORTC_BASE, GPIO_PIN_7, 0);\r
+\r
+    //\r
+    // Loop while there are more bytes left to be transferred.\r
+    //\r
+    while(ulCount != 0)\r
+    {\r
+        //\r
+        // Write the next byte to the controller.\r
+        //\r
+        SSIDataPut(SSI0_BASE, *pucBuffer++);\r
+\r
+        //\r
+        // Dummy read to drain the fifo and time the GPIO signal.\r
+        //\r
+        SSIDataGet(SSI0_BASE, &ulTemp);\r
+\r
+        //\r
+        // Decrement the BYTE counter.\r
+        //\r
+        ulCount--;\r
+    }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! \internal\r
+//!\r
+//! Write a sequence of data bytes to the SSD0323 controller.\r
+//!\r
+//! The data is written in a polled fashion; this function will not return\r
+//! until the entire byte sequence has been written to the controller.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+static void\r
+OSRAMWriteData(const unsigned char *pucBuffer, unsigned long ulCount)\r
+{\r
+    unsigned long ulTemp;\r
+\r
+    //\r
+    // Return iff SSI port is not enabled for OSRAM.\r
+    //\r
+    if(!g_bSSIEnabled)\r
+    {\r
+        return;\r
+    }\r
+\r
+    //\r
+    // Set the command/control bit to enable data mode.\r
+    //\r
+    GPIOPinWrite(GPIO_PORTC_BASE, GPIO_PIN_7, GPIO_PIN_7);\r
+\r
+    //\r
+    // Loop while there are more bytes left to be transferred.\r
+    //\r
+    while(ulCount != 0)\r
+    {\r
+        //\r
+        // Write the next byte to the controller.\r
+        //\r
+        SSIDataPut(SSI0_BASE, *pucBuffer++);\r
+\r
+        //\r
+        // Dummy read to drain the fifo and time the GPIO signal.\r
+        //\r
+        SSIDataGet(SSI0_BASE, &ulTemp);\r
+\r
+        //\r
+        // Decrement the BYTE counter.\r
+        //\r
+        ulCount--;\r
+    }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Clears the OLED display.\r
+//!\r
+//! This function will clear the display RAM.  All pixels in the display will\r
+//! be turned off.\r
+//!\r
+//! This function is contained in <tt>osram128x64x4.c</tt>, with\r
+//! <tt>osram128x64x4.h</tt> containing the API definition for use by\r
+//! applications.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+OSRAM128x64x4Clear(void)\r
+{\r
+    static const unsigned char pucCommand1[] = { 0x15, 0, 63 };\r
+    static const unsigned char pucCommand2[] = { 0x75, 0, 79 };\r
+    unsigned long ulRow, ulColumn;\r
+    static unsigned char pucZeroBuffer[8] = { 0, 0, 0, 0, 0, 0, 0, 0};\r
+\r
+    //\r
+    // Set the window to fill the entire display.\r
+    //\r
+    OSRAMWriteCommand(pucCommand1, sizeof(pucCommand1));\r
+    OSRAMWriteCommand(pucCommand2, sizeof(pucCommand2));\r
+    OSRAMWriteCommand(g_pucOSRAM128x64x4VerticalInc,\r
+                      sizeof(g_pucOSRAM128x64x4VerticalInc));\r
+\r
+    //\r
+    // In vertical address increment mode, loop through each column, filling\r
+    // each row with 0.\r
+    //\r
+    for(ulColumn = 0; ulColumn < (128/2); ulColumn++)\r
+    {\r
+        //\r
+        // 8 rows (bytes) per row of text.\r
+        //\r
+        for(ulRow = 0; ulRow < 80; ulRow += 8)\r
+        {\r
+            OSRAMWriteData(pucZeroBuffer, sizeof(pucZeroBuffer));\r
+        }\r
+    }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Displays a string on the OLED display.\r
+//!\r
+//! \param pcStr is a pointer to the string to display.\r
+//! \param ulX is the horizontal position to display the string, specified in\r
+//! columns from the left edge of the display.\r
+//! \param ulY is the vertical position to display the string, specified in\r
+//! rows from the top edge of the display.\r
+//! \param ucLevel is the 4-bit grey scale value to be used for displayed text.\r
+//!\r
+//! This function will draw a string on the display.  Only the ASCII characters\r
+//! between 32 (space) and 126 (tilde) are supported; other characters will\r
+//! result in random data being draw on the display (based on whatever appears\r
+//! before/after the font in memory).  The font is mono-spaced, so characters\r
+//! such as "i" and "l" have more white space around them than characters such\r
+//! as "m" or "w".\r
+//!\r
+//! If the drawing of the string reaches the right edge of the display, no more\r
+//! characters will be drawn.  Therefore, special care is not required to avoid\r
+//! supplying a string that is "too long" to display.\r
+//!\r
+//! This function is contained in <tt>osram128x64x4.c</tt>, with\r
+//! <tt>osram128x64x4.h</tt> containing the API definition for use by\r
+//! applications.\r
+//!\r
+//! \note Because the OLED display packs 2 pixels of data in a single byte, the\r
+//! parameter \e ulX must be an even column number (e.g. 0, 2, 4, etc).\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+OSRAM128x64x4StringDraw(const char *pcStr, unsigned long ulX,\r
+                        unsigned long ulY, unsigned char ucLevel)\r
+{\r
+    static unsigned char pucBuffer[8];\r
+    unsigned long ulIdx1, ulIdx2;\r
+    unsigned char ucTemp;\r
+\r
+    //\r
+    // Check the arguments.\r
+    //\r
+    ASSERT(ulX < 128);\r
+    ASSERT((ulX & 1) == 0);\r
+    ASSERT(ulY < 64);\r
+    ASSERT(ucLevel < 16);\r
+\r
+    //\r
+    // Setup a window starting at the specified column and row, ending\r
+    // at the right edge of the display and 8 rows down (single character row).\r
+    //\r
+    pucBuffer[0] = 0x15;\r
+    pucBuffer[1] = ulX / 2;\r
+    pucBuffer[2] = 63;\r
+    OSRAMWriteCommand(pucBuffer, 3);\r
+    pucBuffer[0] = 0x75;\r
+    pucBuffer[1] = ulY;\r
+    pucBuffer[2] = ulY + 7;\r
+    OSRAMWriteCommand(pucBuffer, 3);\r
+    OSRAMWriteCommand(g_pucOSRAM128x64x4VerticalInc,\r
+                      sizeof(g_pucOSRAM128x64x4VerticalInc));\r
+\r
+    //\r
+    // Loop while there are more characters in the string.\r
+    //\r
+    while(*pcStr != 0)\r
+    {\r
+        //\r
+        // Get a working copy of the current character and convert to an\r
+        // index into the character bit-map array.\r
+        //\r
+        ucTemp = *pcStr;\r
+        ucTemp &= 0x7F;\r
+        if(ucTemp < ' ')\r
+        {\r
+            ucTemp = ' ';\r
+        }\r
+        else\r
+        {\r
+            ucTemp -= ' ';\r
+        }\r
+\r
+        //\r
+        // Build and display the character buffer.\r
+        //\r
+        for(ulIdx1 = 0; ulIdx1 < 3; ulIdx1++)\r
+        {\r
+            //\r
+            // Convert two columns of 1-bit font data into a single data\r
+            // byte column of 4-bit font data.\r
+            //\r
+            for(ulIdx2 = 0; ulIdx2 < 8; ulIdx2++)\r
+            {\r
+                pucBuffer[ulIdx2] = 0;\r
+                if(g_pucFont[ucTemp][ulIdx1*2] & (1 << ulIdx2))\r
+                {\r
+                    pucBuffer[ulIdx2] = ((ucLevel << 4) & 0xf0);\r
+                }\r
+                if((ulIdx1 < 2) &&\r
+                    (g_pucFont[ucTemp][ulIdx1*2+1] & (1 << ulIdx2)))\r
+                {\r
+                    pucBuffer[ulIdx2] |= ((ucLevel << 0) & 0x0f);\r
+                }\r
+            }\r
+\r
+            //\r
+            // If there is room, dump the single data byte column to the\r
+            // display.  Otherwise, bail out.\r
+            //\r
+            if(ulX < 126)\r
+            {\r
+                OSRAMWriteData(pucBuffer, 8);\r
+                ulX += 2;\r
+            }\r
+            else\r
+            {\r
+                return;\r
+            }\r
+        }\r
+\r
+        //\r
+        // Advance to the next character.\r
+        //\r
+        pcStr++;\r
+    }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Displays an image on the OLED display.\r
+//!\r
+//! \param pucImage is a pointer to the image data.\r
+//! \param ulX is the horizontal position to display this image, specified in\r
+//! columns from the left edge of the display.\r
+//! \param ulY is the vertical position to display this image, specified in\r
+//! rows from the top of the display.\r
+//! \param ulWidth is the width of the image, specified in columns.\r
+//! \param ulHeight is the height of the image, specified in rows.\r
+//!\r
+//! This function will display a bitmap graphic on the display.  Because of the\r
+//! format of the display RAM, the starting column (/e ulX) and the number of\r
+//! columns (/e ulWidth) must be an integer multiple of two.\r
+//!\r
+//! The image data is organized with the first row of image data appearing left\r
+//! to right, followed immediately by the second row of image data.  Each byte\r
+//! contains the data for two columns in the current row, with the leftmost\r
+//! column being contained in bits 7:4 and the rightmost column being contained\r
+//! in bits 3:0.\r
+//!\r
+//! For example, an image six columns wide and seven scan lines tall would\r
+//! be arranged as follows (showing how the twenty one bytes of the image would\r
+//! appear on the display):\r
+//!\r
+//! \verbatim\r
+//!     +-------------------+-------------------+-------------------+\r
+//!     |      Byte 0       |      Byte 1       |      Byte 2       |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     |      Byte 3       |      Byte 4       |      Byte 5       |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     |      Byte 6       |      Byte 7       |      Byte 8       |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     |      Byte 9       |      Byte 10      |      Byte 11      |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     |      Byte 12      |      Byte 13      |      Byte 14      |\r
+//!     +---------+---------+---------+--3------+---------+---------+\r
+//!     | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     |      Byte 15      |      Byte 16      |      Byte 17      |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     |      Byte 18      |      Byte 19      |      Byte 20      |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//! \endverbatim\r
+//!\r
+//! This function is contained in <tt>osram128x64x4.c</tt>, with\r
+//! <tt>osram128x64x4.h</tt> containing the API definition for use by`\r
+//! applications.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+OSRAM128x64x4ImageDraw(const unsigned char *pucImage, unsigned long ulX,\r
+               unsigned long ulY, unsigned long ulWidth,\r
+               unsigned long ulHeight)\r
+{\r
+    static unsigned char pucBuffer[8];\r
+\r
+    //\r
+    // Check the arguments.\r
+    //\r
+    ASSERT(ulX < 128);\r
+    ASSERT((ulX & 1) == 0);\r
+    ASSERT(ulY < 64);\r
+    ASSERT((ulX + ulWidth) <= 128);\r
+    ASSERT((ulY + ulHeight) <= 64);\r
+    ASSERT((ulWidth & 1) == 0);\r
+\r
+    //\r
+    // Setup a window starting at the specified column and row, and ending\r
+    // at the column + width and row+height.\r
+    //\r
+    pucBuffer[0] = 0x15;\r
+    pucBuffer[1] = ulX / 2;\r
+    pucBuffer[2] = (ulX + ulWidth - 2) / 2;\r
+    OSRAMWriteCommand(pucBuffer, 3);\r
+    pucBuffer[0] = 0x75;\r
+    pucBuffer[1] = ulY;\r
+    pucBuffer[2] = ulY + ulHeight - 1;\r
+    OSRAMWriteCommand(pucBuffer, 3);\r
+    OSRAMWriteCommand(g_pucOSRAM128x64x4HorizontalInc,\r
+                      sizeof(g_pucOSRAM128x64x4HorizontalInc));\r
+\r
+    //\r
+    // Loop while there are more rows to display.\r
+    //\r
+    while(ulHeight--)\r
+    {\r
+        //\r
+        // Write this row of image data.\r
+        //\r
+        OSRAMWriteData(pucImage, (ulWidth / 2));\r
+\r
+        //\r
+        // Advance to the next row of the image.\r
+        //\r
+        pucImage += (ulWidth / 2);\r
+    }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Enable the SSI component of the OLED display driver.\r
+//!\r
+//! \param ulFrequency specifies the SSI Clock Frequency to be used.\r
+//!\r
+//! This function initializes the SSI interface to the OLED display.\r
+//!\r
+//! This function is contained in <tt>osram128x64x4.c</tt>, with\r
+//! <tt>osram128x64x4.h</tt> containing the API definition for use by\r
+//! applications.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+OSRAM128x64x4Enable(unsigned long ulFrequency)\r
+{\r
+    unsigned long ulTemp;\r
+\r
+    //\r
+    // Disable the SSI port.\r
+    //\r
+    SSIDisable(SSI0_BASE);\r
+\r
+    //\r
+    // Configure the SSI0 port for master mode.\r
+    //\r
+    SSIConfig(SSI0_BASE, SSI_FRF_MOTO_MODE_2, SSI_MODE_MASTER, ulFrequency, 8);\r
+\r
+    //\r
+    // (Re)Enable SSI control of the FSS pin.\r
+    //\r
+    GPIOPinTypeSSI(GPIO_PORTA_BASE, GPIO_PIN_3);\r
+    GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_STRENGTH_8MA,\r
+                     GPIO_PIN_TYPE_STD_WPU);\r
+\r
+    //\r
+    // Enable the SSI port.\r
+    //\r
+    SSIEnable(SSI0_BASE);\r
+\r
+    //\r
+    // Drain the receive fifo.\r
+    //\r
+    while(SSIDataNonBlockingGet(SSI0_BASE, &ulTemp) != 0)\r
+    {\r
+    }\r
+\r
+    //\r
+    // Indicate that the OSRAM driver can use the SSI Port.\r
+    //\r
+    g_bSSIEnabled = true;\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Enable the SSI component of the OLED display driver.\r
+//!\r
+//! \param ulFrequency specifies the SSI Clock Frequency to be used.\r
+//!\r
+//! This function initializes the SSI interface to the OLED display.\r
+//!\r
+//! This function is contained in <tt>osram128x64x4.c</tt>, with\r
+//! <tt>osram128x64x4.h</tt> containing the API definition for use by\r
+//! applications.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+OSRAM128x64x4Disable(void)\r
+{\r
+    unsigned long ulTemp;\r
+\r
+    //\r
+    // Indicate that the OSRAM driver can no longer use the SSI Port.\r
+    //\r
+    g_bSSIEnabled = false;\r
+\r
+    //\r
+    // Drain the receive fifo.\r
+    //\r
+    while(SSIDataNonBlockingGet(SSI0_BASE, &ulTemp) != 0)\r
+    {\r
+    }\r
+\r
+    //\r
+    // Disable the SSI port.\r
+    //\r
+    SSIDisable(SSI0_BASE);\r
+\r
+    //\r
+    // Disable SSI control of the FSS pin.\r
+    //\r
+    GPIODirModeSet(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_DIR_MODE_OUT);\r
+    GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_STRENGTH_8MA,\r
+                     GPIO_PIN_TYPE_STD_WPU);\r
+    GPIOPinWrite(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_PIN_3);\r
+\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Initialize the OLED display.\r
+//!\r
+//! \param ulFrequency specifies the SSI Clock Frequency to be used.\r
+//!\r
+//! This function initializes the SSI interface to the OLED display and\r
+//! configures the SSD0323 controller on the panel.\r
+//!\r
+//! This function is contained in <tt>osram128x64x4.c</tt>, with\r
+//! <tt>osram128x64x4.h</tt> containing the API definition for use by\r
+//! applications.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+OSRAM128x64x4Init(unsigned long ulFrequency)\r
+{\r
+    unsigned long ulIdx;\r
+\r
+    //\r
+    // Enable the SSI0 and GPIO port  blocks as they are needed by this driver.\r
+    //\r
+    SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI0);\r
+    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);\r
+    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOC);\r
+\r
+    //\r
+    // Configure the SSI0CLK and SSIOTX pins for SSI operation.\r
+    //\r
+    GPIOPinTypeSSI(GPIO_PORTA_BASE, GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_5);\r
+    GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_2, GPIO_STRENGTH_8MA,\r
+                     GPIO_PIN_TYPE_STD_WPU);\r
+    GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_STRENGTH_8MA,\r
+                     GPIO_PIN_TYPE_STD_WPU);\r
+    GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_5, GPIO_STRENGTH_8MA,\r
+                     GPIO_PIN_TYPE_STD_WPU);\r
+\r
+    //\r
+    // Configure the PC7 pin as a D/Cn signal for OLED device.\r
+    //\r
+    GPIODirModeSet(GPIO_PORTC_BASE, GPIO_PIN_7, GPIO_DIR_MODE_OUT);\r
+    GPIOPadConfigSet(GPIO_PORTC_BASE, GPIO_PIN_7, GPIO_STRENGTH_8MA,\r
+                     GPIO_PIN_TYPE_STD);\r
+    GPIOPinWrite(GPIO_PORTC_BASE, GPIO_PIN_7, GPIO_PIN_7);\r
+\r
+    //\r
+    // Configure and enable the SSI0 port for master mode.\r
+    //\r
+    OSRAM128x64x4Enable(ulFrequency);\r
+\r
+    //\r
+    // Clear the frame buffer.\r
+    //\r
+    OSRAM128x64x4Clear();\r
+\r
+    //\r
+    // Initialize the SSD0323 controller.  Loop through the initialization\r
+    // sequence array, sending each command "string" to the controller.\r
+    //\r
+    for(ulIdx = 0; ulIdx < sizeof(g_pucOSRAM128x64x4Init);\r
+        ulIdx += g_pucOSRAM128x64x4Init[ulIdx] + 1)\r
+    {\r
+        //\r
+        // Send this command.\r
+        //\r
+        OSRAMWriteCommand(g_pucOSRAM128x64x4Init + ulIdx + 1,\r
+                          g_pucOSRAM128x64x4Init[ulIdx] - 1);\r
+    }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Turns on the OLED display.\r
+//!\r
+//! This function will turn on the OLED display, causing it to display the\r
+//! contents of its internal frame buffer.\r
+//!\r
+//! This function is contained in <tt>osram128x64x4.c</tt>, with\r
+//! <tt>osram128x64x4.h</tt> containing the API definition for use by\r
+//! applications.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+OSRAM128x64x4DisplayOn(void)\r
+{\r
+    unsigned long ulIdx;\r
+\r
+    //\r
+    // Initialize the SSD0323 controller.  Loop through the initialization\r
+    // sequence array, sending each command "string" to the controller.\r
+    //\r
+    for(ulIdx = 0; ulIdx < sizeof(g_pucOSRAM128x64x4Init);\r
+        ulIdx += g_pucOSRAM128x64x4Init[ulIdx] + 1)\r
+    {\r
+        //\r
+        // Send this command.\r
+        //\r
+        OSRAMWriteCommand(g_pucOSRAM128x64x4Init + ulIdx + 1,\r
+                          g_pucOSRAM128x64x4Init[ulIdx] - 1);\r
+    }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Turns off the OLED display.\r
+//!\r
+//! This function will turn off the OLED display.  This will stop the scanning\r
+//! of the panel and turn off the on-chip DC-DC converter, preventing damage to\r
+//! the panel due to burn-in (it has similar characters to a CRT in this\r
+//! respect).\r
+//!\r
+//! This function is contained in <tt>osram128x64x4.c</tt>, with\r
+//! <tt>osram128x64x4.h</tt> containing the API definition for use by\r
+//! applications.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+OSRAM128x64x4DisplayOff(void)\r
+{\r
+    static const unsigned char pucCommand1[] =\r
+    {\r
+        0xAE, 0xAD, 0x02\r
+    };\r
+\r
+    //\r
+    // Turn off the DC-DC converter and the display.\r
+    //\r
+    OSRAMWriteCommand(pucCommand1, sizeof(pucCommand1));\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+// Close the Doxygen group.\r
+//! @}\r
+//\r
+//*****************************************************************************\r

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/osram128x64x4.h b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/osram128x64x4.h
new file mode 100644 (file)
index 0000000..2ba7cb9
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/osram128x64x4.h
@@ -0,0 +1,63 @@
+//*****************************************************************************\r
+//\r
+// osram128x64x4.h - Prototypes for the driver for the OSRAM 128x64x4 graphical\r
+//                   OLED display.\r
+//\r
+// Copyright (c) 2006-2007 Luminary Micro, Inc.  All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1408 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+#ifndef __OSRAM128X64X4_H__\r
+#define __OSRAM128X64X4_H__\r
+\r
+//*****************************************************************************\r
+//\r
+// Prototypes for the driver APIs.\r
+//\r
+//*****************************************************************************\r
+extern void OSRAM128x64x4Clear(void);\r
+extern void OSRAM128x64x4StringDraw(const char *pcStr,\r
+                                    unsigned long ulX,\r
+                                    unsigned long ulY,\r
+                                    unsigned char ucLevel);\r
+extern void OSRAM128x64x4ImageDraw(const unsigned char *pucImage,\r
+                                   unsigned long ulX,\r
+                                   unsigned long ulY,\r
+                                   unsigned long ulWidth,\r
+                                   unsigned long ulHeight);\r
+extern void OSRAM128x64x4Init(unsigned long ulFrequency);\r
+extern void OSRAM128x64x4Enable(unsigned long ulFrequency);\r
+extern void OSRAM128x64x4Disable(void);\r
+extern void OSRAM128x64x4DisplayOn(void);\r
+extern void OSRAM128x64x4DisplayOff(void);\r
+\r
+//*****************************************************************************\r
+//\r
+// The following macro(s) map old names for the OSRAM functions to the new\r
+// names.  In new code, the new names should be used in favor of the old names.\r
+//\r
+//*****************************************************************************\r
+#ifndef DEPRECATED\r
+#define OSRAM128x64x1InitSSI    OSRAM128x64x4Enable\r
+#endif\r
+\r
+#endif // __OSRAM128X64X4_H__\r

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/rit128x96x4.c b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/rit128x96x4.c
new file mode 100644 (file)
index 0000000..cff38d5
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/rit128x96x4.c
@@ -0,0 +1,981 @@
+//*****************************************************************************\r
+//\r
+// rit128x96x4.c - Driver for the RIT 128x96x4 graphical OLED display.\r
+//\r
+// Copyright (c) 2007 Luminary Micro, Inc.  All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1504-conf of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+//*****************************************************************************\r
+//\r
+//! \addtogroup ek_lm3sLM3S8962_api\r
+//! @{\r
+//\r
+//*****************************************************************************\r
+\r
+#include "hw_ssi.h"\r
+#include "hw_memmap.h"\r
+#include "hw_sysctl.h"\r
+#include "hw_types.h"\r
+#include "debug.h"\r
+#include "gpio.h"\r
+#include "ssi.h"\r
+#include "sysctl.h"\r
+#include "rit128x96x4.h"\r
+\r
+//*****************************************************************************\r
+//\r
+// Macros that define the peripheral, port, and pin used for the OLEDDC\r
+// panel control signal.\r
+//\r
+//*****************************************************************************\r
+\r
+unsigned long ulGPIOId = 0, ulGPIOBase = 0, ulOLEDDC_PIN = 0, ulOLEDEN_PIN = 0;\r
+\r
+#define LM3S8962_SYSCTL_PERIPH_GPIO_OLEDDC   SYSCTL_PERIPH_GPIOA\r
+#define LM3S8962_GPIO_OLEDDC_BASE            GPIO_PORTA_BASE\r
+#define LM3S8962_GPIO_OLEDDC_PIN             GPIO_PIN_6\r
+#define LM3S8962_GPIO_OLEDEN_PIN             GPIO_PIN_7\r
+\r
+#define LM3S1968_SYSCTL_PERIPH_GPIO_OLEDDC   SYSCTL_PERIPH_GPIOH\r
+#define LM3S1968_GPIO_OLEDDC_BASE            GPIO_PORTH_BASE\r
+#define LM3S1968_GPIO_OLEDDC_PIN             GPIO_PIN_2\r
+#define LM3S1968_GPIO_OLEDEN_PIN             GPIO_PIN_3\r
+\r
+\r
+//*****************************************************************************\r
+//\r
+// Flag to indicate if SSI port is enabled for display usage.\r
+//\r
+//*****************************************************************************\r
+static volatile tBoolean g_bSSIEnabled = false;\r
+\r
+//*****************************************************************************\r
+//\r
+// Buffer for storing sequences of command and data for the display.\r
+//\r
+//*****************************************************************************\r
+static unsigned char g_pucBuffer[8];\r
+\r
+//*****************************************************************************\r
+//\r
+// Define the SSD1329 128x96x4 Remap Setting(s).  This will be used in\r
+// several places in the code to switch between vertical and horizontal\r
+// address incrementing.  Note that the controller support 128 rows while\r
+// the RIT display only uses 96.\r
+//\r
+// The Remap Command (0xA0) takes one 8-bit parameter.  The parameter is\r
+// defined as follows.\r
+//\r
+// Bit 7: Reserved\r
+// Bit 6: Disable(0)/Enable(1) COM Split Odd Even\r
+//        When enabled, the COM signals are split Odd on one side, even on\r
+//        the other.  Otherwise, they are split 0-63 on one side, 64-127 on\r
+//        the other.\r
+// Bit 5: Reserved\r
+// Bit 4: Disable(0)/Enable(1) COM Remap\r
+//        When Enabled, ROW 0-127 map to COM 127-0 (i.e. reverse row order)\r
+// Bit 3: Reserved\r
+// Bit 2: Horizontal(0)/Vertical(1) Address Increment\r
+//        When set, data RAM address will increment along the column rather\r
+//        than along the row.\r
+// Bit 1: Disable(0)/Enable(1) Nibble Remap\r
+//        When enabled, the upper and lower nibbles in the DATA bus for access\r
+//        to the data RAM are swapped.\r
+// Bit 0: Disable(0)/Enable(1) Column Address Remap\r
+//        When enabled, DATA RAM columns 0-63 are remapped to Segment Columns\r
+//        127-0.\r
+//\r
+//*****************************************************************************\r
+#define RIT_INIT_REMAP      0x52 // app note says 0x51\r
+#define RIT_INIT_OFFSET     0x00\r
+static const unsigned char g_pucRIT128x96x4VerticalInc[]   = { 0xA0, 0x56 };\r
+static const unsigned char g_pucRIT128x96x4HorizontalInc[] = { 0xA0, 0x52 };\r
+\r
+//*****************************************************************************\r
+//\r
+// A 5x7 font (in a 6x8 cell, where the sixth column is omitted from this\r
+// table) for displaying text on the OLED display.  The data is organized as\r
+// bytes from the left column to the right column, with each byte containing\r
+// the top row in the LSB and the bottom row in the MSB.\r
+//\r
+// Note:  This is the same font data that is used in the EK-LM3S811\r
+// osram96x16x1 driver.  The single bit-per-pixel is expaned in the StringDraw\r
+// function to the appropriate four bit-per-pixel gray scale format.\r
+//\r
+//*****************************************************************************\r
+static const unsigned char g_pucFont[96][5] =\r
+{\r
+    { 0x00, 0x00, 0x00, 0x00, 0x00 }, // " "\r
+    { 0x00, 0x00, 0x4f, 0x00, 0x00 }, // !\r
+    { 0x00, 0x07, 0x00, 0x07, 0x00 }, // "\r
+    { 0x14, 0x7f, 0x14, 0x7f, 0x14 }, // #\r
+    { 0x24, 0x2a, 0x7f, 0x2a, 0x12 }, // $\r
+    { 0x23, 0x13, 0x08, 0x64, 0x62 }, // %\r
+    { 0x36, 0x49, 0x55, 0x22, 0x50 }, // &\r
+    { 0x00, 0x05, 0x03, 0x00, 0x00 }, // '\r
+    { 0x00, 0x1c, 0x22, 0x41, 0x00 }, // (\r
+    { 0x00, 0x41, 0x22, 0x1c, 0x00 }, // )\r
+    { 0x14, 0x08, 0x3e, 0x08, 0x14 }, // *\r
+    { 0x08, 0x08, 0x3e, 0x08, 0x08 }, // +\r
+    { 0x00, 0x50, 0x30, 0x00, 0x00 }, // ,\r
+    { 0x08, 0x08, 0x08, 0x08, 0x08 }, // -\r
+    { 0x00, 0x60, 0x60, 0x00, 0x00 }, // .\r
+    { 0x20, 0x10, 0x08, 0x04, 0x02 }, // /\r
+    { 0x3e, 0x51, 0x49, 0x45, 0x3e }, // 0\r
+    { 0x00, 0x42, 0x7f, 0x40, 0x00 }, // 1\r
+    { 0x42, 0x61, 0x51, 0x49, 0x46 }, // 2\r
+    { 0x21, 0x41, 0x45, 0x4b, 0x31 }, // 3\r
+    { 0x18, 0x14, 0x12, 0x7f, 0x10 }, // 4\r
+    { 0x27, 0x45, 0x45, 0x45, 0x39 }, // 5\r
+    { 0x3c, 0x4a, 0x49, 0x49, 0x30 }, // 6\r
+    { 0x01, 0x71, 0x09, 0x05, 0x03 }, // 7\r
+    { 0x36, 0x49, 0x49, 0x49, 0x36 }, // 8\r
+    { 0x06, 0x49, 0x49, 0x29, 0x1e }, // 9\r
+    { 0x00, 0x36, 0x36, 0x00, 0x00 }, // :\r
+    { 0x00, 0x56, 0x36, 0x00, 0x00 }, // ;\r
+    { 0x08, 0x14, 0x22, 0x41, 0x00 }, // <\r
+    { 0x14, 0x14, 0x14, 0x14, 0x14 }, // =\r
+    { 0x00, 0x41, 0x22, 0x14, 0x08 }, // >\r
+    { 0x02, 0x01, 0x51, 0x09, 0x06 }, // ?\r
+    { 0x32, 0x49, 0x79, 0x41, 0x3e }, // @\r
+    { 0x7e, 0x11, 0x11, 0x11, 0x7e }, // A\r
+    { 0x7f, 0x49, 0x49, 0x49, 0x36 }, // B\r
+    { 0x3e, 0x41, 0x41, 0x41, 0x22 }, // C\r
+    { 0x7f, 0x41, 0x41, 0x22, 0x1c }, // D\r
+    { 0x7f, 0x49, 0x49, 0x49, 0x41 }, // E\r
+    { 0x7f, 0x09, 0x09, 0x09, 0x01 }, // F\r
+    { 0x3e, 0x41, 0x49, 0x49, 0x7a }, // G\r
+    { 0x7f, 0x08, 0x08, 0x08, 0x7f }, // H\r
+    { 0x00, 0x41, 0x7f, 0x41, 0x00 }, // I\r
+    { 0x20, 0x40, 0x41, 0x3f, 0x01 }, // J\r
+    { 0x7f, 0x08, 0x14, 0x22, 0x41 }, // K\r
+    { 0x7f, 0x40, 0x40, 0x40, 0x40 }, // L\r
+    { 0x7f, 0x02, 0x0c, 0x02, 0x7f }, // M\r
+    { 0x7f, 0x04, 0x08, 0x10, 0x7f }, // N\r
+    { 0x3e, 0x41, 0x41, 0x41, 0x3e }, // O\r
+    { 0x7f, 0x09, 0x09, 0x09, 0x06 }, // P\r
+    { 0x3e, 0x41, 0x51, 0x21, 0x5e }, // Q\r
+    { 0x7f, 0x09, 0x19, 0x29, 0x46 }, // R\r
+    { 0x46, 0x49, 0x49, 0x49, 0x31 }, // S\r
+    { 0x01, 0x01, 0x7f, 0x01, 0x01 }, // T\r
+    { 0x3f, 0x40, 0x40, 0x40, 0x3f }, // U\r
+    { 0x1f, 0x20, 0x40, 0x20, 0x1f }, // V\r
+    { 0x3f, 0x40, 0x38, 0x40, 0x3f }, // W\r
+    { 0x63, 0x14, 0x08, 0x14, 0x63 }, // X\r
+    { 0x07, 0x08, 0x70, 0x08, 0x07 }, // Y\r
+    { 0x61, 0x51, 0x49, 0x45, 0x43 }, // Z\r
+    { 0x00, 0x7f, 0x41, 0x41, 0x00 }, // [\r
+    { 0x02, 0x04, 0x08, 0x10, 0x20 }, // "\"\r
+    { 0x00, 0x41, 0x41, 0x7f, 0x00 }, // ]\r
+    { 0x04, 0x02, 0x01, 0x02, 0x04 }, // ^\r
+    { 0x40, 0x40, 0x40, 0x40, 0x40 }, // _\r
+    { 0x00, 0x01, 0x02, 0x04, 0x00 }, // `\r
+    { 0x20, 0x54, 0x54, 0x54, 0x78 }, // a\r
+    { 0x7f, 0x48, 0x44, 0x44, 0x38 }, // b\r
+    { 0x38, 0x44, 0x44, 0x44, 0x20 }, // c\r
+    { 0x38, 0x44, 0x44, 0x48, 0x7f }, // d\r
+    { 0x38, 0x54, 0x54, 0x54, 0x18 }, // e\r
+    { 0x08, 0x7e, 0x09, 0x01, 0x02 }, // f\r
+    { 0x0c, 0x52, 0x52, 0x52, 0x3e }, // g\r
+    { 0x7f, 0x08, 0x04, 0x04, 0x78 }, // h\r
+    { 0x00, 0x44, 0x7d, 0x40, 0x00 }, // i\r
+    { 0x20, 0x40, 0x44, 0x3d, 0x00 }, // j\r
+    { 0x7f, 0x10, 0x28, 0x44, 0x00 }, // k\r
+    { 0x00, 0x41, 0x7f, 0x40, 0x00 }, // l\r
+    { 0x7c, 0x04, 0x18, 0x04, 0x78 }, // m\r
+    { 0x7c, 0x08, 0x04, 0x04, 0x78 }, // n\r
+    { 0x38, 0x44, 0x44, 0x44, 0x38 }, // o\r
+    { 0x7c, 0x14, 0x14, 0x14, 0x08 }, // p\r
+    { 0x08, 0x14, 0x14, 0x18, 0x7c }, // q\r
+    { 0x7c, 0x08, 0x04, 0x04, 0x08 }, // r\r
+    { 0x48, 0x54, 0x54, 0x54, 0x20 }, // s\r
+    { 0x04, 0x3f, 0x44, 0x40, 0x20 }, // t\r
+    { 0x3c, 0x40, 0x40, 0x20, 0x7c }, // u\r
+    { 0x1c, 0x20, 0x40, 0x20, 0x1c }, // v\r
+    { 0x3c, 0x40, 0x30, 0x40, 0x3c }, // w\r
+    { 0x44, 0x28, 0x10, 0x28, 0x44 }, // x\r
+    { 0x0c, 0x50, 0x50, 0x50, 0x3c }, // y\r
+    { 0x44, 0x64, 0x54, 0x4c, 0x44 }, // z\r
+    { 0x00, 0x08, 0x36, 0x41, 0x00 }, // {\r
+    { 0x00, 0x00, 0x7f, 0x00, 0x00 }, // |\r
+    { 0x00, 0x41, 0x36, 0x08, 0x00 }, // }\r
+    { 0x02, 0x01, 0x02, 0x04, 0x02 }, // ~\r
+    { 0x02, 0x01, 0x02, 0x04, 0x02 }, // ~\r
+};\r
+\r
+//*****************************************************************************\r
+//\r
+// The sequence of commands used to initialize the SSD1329 controller.  Each\r
+// command is described as follows:  there is a byte specifying the number of\r
+// bytes in the command sequence, followed by that many bytes of command data.\r
+// Note:  This initialization sequence is derived from RIT App Note for\r
+// the P14201.  Values used are from the RIT app note, except where noted.\r
+//\r
+//*****************************************************************************\r
+static const unsigned char g_pucRIT128x96x4Init[] =\r
+{\r
+    //\r
+    // Unlock commands\r
+    //\r
+    3, 0xFD, 0x12, 0xe3,\r
+\r
+    //\r
+    // Display off\r
+    //\r
+    2, 0xAE, 0xe3,\r
+\r
+    //\r
+    // Icon off\r
+    //\r
+    3, 0x94, 0, 0xe3,\r
+\r
+    //\r
+    // Multiplex ratio\r
+    //\r
+    3, 0xA8, 95, 0xe3,\r
+\r
+    //\r
+    // Contrast\r
+    //\r
+    3, 0x81, 0xb7, 0xe3,\r
+\r
+    //\r
+    // Pre-charge current\r
+    //\r
+    3, 0x82, 0x3f, 0xe3,\r
+\r
+    //\r
+    // Display Re-map\r
+    //\r
+    3, 0xA0, RIT_INIT_REMAP, 0xe3,\r
+\r
+    //\r
+    // Display Start Line\r
+    //\r
+    3, 0xA1, 0, 0xe3,\r
+\r
+    //\r
+    // Display Offset\r
+    //\r
+    3, 0xA2, RIT_INIT_OFFSET, 0xe3,\r
+\r
+    //\r
+    // Display Mode Normal\r
+    //\r
+    2, 0xA4, 0xe3,\r
+\r
+    //\r
+    // Phase Length\r
+    //\r
+    3, 0xB1, 0x11, 0xe3,\r
+\r
+    //\r
+    // Frame frequency\r
+    //\r
+    3, 0xB2, 0x23, 0xe3,\r
+\r
+    //\r
+    // Front Clock Divider\r
+    //\r
+    3, 0xB3, 0xe2, 0xe3,\r
+\r
+    //\r
+    // Set gray scale table.  App note uses default command:\r
+    // 2, 0xB7, 0xe3\r
+    // This gray scale attempts some gamma correction to reduce the\r
+    // the brightness of the low levels.\r
+    //\r
+    17, 0xB8, 1, 2, 3, 4, 5, 6, 8, 10, 12, 14, 16, 19, 22, 26, 30, 0xe3,\r
+\r
+    //\r
+    // Second pre-charge period. App note uses value 0x04.\r
+    //\r
+    3, 0xBB, 0x01, 0xe3,\r
+\r
+    //\r
+    // Pre-charge voltage\r
+    //\r
+    3, 0xBC, 0x3f, 0xe3,\r
+\r
+    //\r
+    // Display ON\r
+    //\r
+    2, 0xAF, 0xe3,\r
+};\r
+\r
+//*****************************************************************************\r
+//\r
+//! \internal\r
+//!\r
+//! Write a sequence of command bytes to the SSD1329 controller.\r
+//!\r
+//! The data is written in a polled fashion; this function will not return\r
+//! until the entire byte sequence has been written to the controller.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+static void\r
+RITWriteCommand(const unsigned char *pucBuffer, unsigned long ulCount)\r
+{\r
+    unsigned long ulTemp;\r
+\r
+    //\r
+    // Return if SSI port is not enabled for RIT display.\r
+    //\r
+    if(!g_bSSIEnabled)\r
+    {\r
+        return;\r
+    }\r
+\r
+    //\r
+    // Clear the command/control bit to enable command mode.\r
+    //\r
+    GPIOPinWrite(ulGPIOBase, ulOLEDDC_PIN, 0); \r
+\r
+    //\r
+    // Loop while there are more bytes left to be transferred.\r
+    //\r
+    while(ulCount != 0)\r
+    {\r
+        //\r
+        // Write the next byte to the controller.\r
+        //\r
+        SSIDataPut(SSI0_BASE, *pucBuffer++);\r
+\r
+        //\r
+        // Dummy read to drain the fifo and time the GPIO signal.\r
+        //\r
+        SSIDataGet(SSI0_BASE, &ulTemp);\r
+\r
+        //\r
+        // Decrement the BYTE counter.\r
+        //\r
+        ulCount--;\r
+    }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! \internal\r
+//!\r
+//! Write a sequence of data bytes to the SSD1329 controller.\r
+//!\r
+//! The data is written in a polled fashion; this function will not return\r
+//! until the entire byte sequence has been written to the controller.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+static void\r
+RITWriteData(const unsigned char *pucBuffer, unsigned long ulCount)\r
+{\r
+    unsigned long ulTemp;\r
+\r
+    //\r
+    // Return if SSI port is not enabled for RIT display.\r
+    //\r
+    if(!g_bSSIEnabled)\r
+    {\r
+        return;\r
+    }\r
+\r
+    //\r
+    // Set the command/control bit to enable data mode.\r
+    //\r
+    GPIOPinWrite(ulGPIOBase, ulOLEDDC_PIN, ulOLEDDC_PIN);\r
+\r
+    //\r
+    // Loop while there are more bytes left to be transferred.\r
+    //\r
+    while(ulCount != 0)\r
+    {\r
+        //\r
+        // Write the next byte to the controller.\r
+        //\r
+        SSIDataPut(SSI0_BASE, *pucBuffer++);\r
+\r
+        //\r
+        // Dummy read to drain the fifo and time the GPIO signal.\r
+        //\r
+        SSIDataGet(SSI0_BASE, &ulTemp);\r
+\r
+        //\r
+        // Decrement the BYTE counter.\r
+        //\r
+        ulCount--;\r
+    }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Clears the OLED display.\r
+//!\r
+//! This function will clear the display RAM.  All pixels in the display will\r
+//! be turned off.\r
+//!\r
+//! This function is contained in <tt>rit128x96x4.c</tt>, with\r
+//! <tt>rit128x96x4.h</tt> containing the API definition for use by\r
+//! applications.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+RIT128x96x4Clear(void)\r
+{\r
+    static const unsigned char pucCommand1[] = { 0x15, 0, 63 };\r
+    static const unsigned char pucCommand2[] = { 0x75, 0, 127 };\r
+    unsigned long ulRow, ulColumn;\r
+\r
+    //\r
+    // Clear out the buffer used for sending bytes to the display.\r
+    *(unsigned long *)&g_pucBuffer[0] = 0;\r
+    *(unsigned long *)&g_pucBuffer[4] = 0;\r
+\r
+    //\r
+    // Set the window to fill the entire display.\r
+    //\r
+    RITWriteCommand(pucCommand1, sizeof(pucCommand1));\r
+    RITWriteCommand(pucCommand2, sizeof(pucCommand2));\r
+    RITWriteCommand(g_pucRIT128x96x4HorizontalInc,\r
+                    sizeof(g_pucRIT128x96x4HorizontalInc));\r
+\r
+    //\r
+    // Loop through the rows\r
+    //\r
+    for(ulRow = 0; ulRow < 96; ulRow++)\r
+    {\r
+        //\r
+        // Loop through the columns.  Each byte is two pixels,\r
+        // and the buffer hold 8 bytes, so 16 pixels are cleared\r
+        // at a time.\r
+        //\r
+        for(ulColumn = 0; ulColumn < 128; ulColumn += 8 * 2)\r
+        {\r
+            //\r
+            // Write 8 clearing bytes to the display, which will\r
+            // clear 16 pixels across.\r
+            //\r
+            RITWriteData(g_pucBuffer, sizeof(g_pucBuffer));\r
+        }\r
+    }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Displays a string on the OLED display.\r
+//!\r
+//! \param pcStr is a pointer to the string to display.\r
+//! \param ulX is the horizontal position to display the string, specified in\r
+//! columns from the left edge of the display.\r
+//! \param ulY is the vertical position to display the string, specified in\r
+//! rows from the top edge of the display.\r
+//! \param ucLevel is the 4-bit grey scale value to be used for displayed text.\r
+//!\r
+//! This function will draw a string on the display.  Only the ASCII characters\r
+//! between 32 (space) and 126 (tilde) are supported; other characters will\r
+//! result in random data being draw on the display (based on whatever appears\r
+//! before/after the font in memory).  The font is mono-spaced, so characters\r
+//! such as "i" and "l" have more white space around them than characters such\r
+//! as "m" or "w".\r
+//!\r
+//! If the drawing of the string reaches the right edge of the display, no more\r
+//! characters will be drawn.  Therefore, special care is not required to avoid\r
+//! supplying a string that is "too long" to display.\r
+//!\r
+//! This function is contained in <tt>rit128x96x4.c</tt>, with\r
+//! <tt>rit128x96x4.h</tt> containing the API definition for use by\r
+//! applications.\r
+//!\r
+//! \note Because the OLED display packs 2 pixels of data in a single byte, the\r
+//! parameter \e ulX must be an even column number (e.g. 0, 2, 4, etc).\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+RIT128x96x4StringDraw(const char *pcStr, unsigned long ulX,\r
+                      unsigned long ulY, unsigned char ucLevel)\r
+{\r
+    unsigned long ulIdx1, ulIdx2;\r
+    unsigned char ucTemp;\r
+\r
+    //\r
+    // Check the arguments.\r
+    //\r
+    ASSERT(ulX < 128);\r
+    ASSERT((ulX & 1) == 0);\r
+    ASSERT(ulY < 96);\r
+    ASSERT(ucLevel < 16);\r
+\r
+    //\r
+    // Setup a window starting at the specified column and row, ending\r
+    // at the right edge of the display and 8 rows down (single character row).\r
+    //\r
+    g_pucBuffer[0] = 0x15;\r
+    g_pucBuffer[1] = ulX / 2;\r
+    g_pucBuffer[2] = 63;\r
+    RITWriteCommand(g_pucBuffer, 3);\r
+    g_pucBuffer[0] = 0x75;\r
+    g_pucBuffer[1] = ulY;\r
+    g_pucBuffer[2] = ulY + 7;\r
+    RITWriteCommand(g_pucBuffer, 3);\r
+    RITWriteCommand(g_pucRIT128x96x4VerticalInc,\r
+                    sizeof(g_pucRIT128x96x4VerticalInc));\r
+\r
+    //\r
+    // Loop while there are more characters in the string.\r
+    //\r
+    while(*pcStr != 0)\r
+    {\r
+        //\r
+        // Get a working copy of the current character and convert to an\r
+        // index into the character bit-map array.\r
+        //\r
+        ucTemp = *pcStr;\r
+        ucTemp &= 0x7F;\r
+        if(ucTemp < ' ')\r
+        {\r
+            ucTemp = ' ';\r
+        }\r
+        else\r
+        {\r
+            ucTemp -= ' ';\r
+        }\r
+\r
+        //\r
+        // Build and display the character buffer.\r
+        //\r
+        for(ulIdx1 = 0; ulIdx1 < 3; ulIdx1++)\r
+        {\r
+            //\r
+            // Convert two columns of 1-bit font data into a single data\r
+            // byte column of 4-bit font data.\r
+            //\r
+            for(ulIdx2 = 0; ulIdx2 < 8; ulIdx2++)\r
+            {\r
+                g_pucBuffer[ulIdx2] = 0;\r
+                if(g_pucFont[ucTemp][ulIdx1*2] & (1 << ulIdx2))\r
+                {\r
+                    g_pucBuffer[ulIdx2] = ((ucLevel << 4) & 0xf0);\r
+                }\r
+                if((ulIdx1 < 2) &&\r
+                    (g_pucFont[ucTemp][ulIdx1*2+1] & (1 << ulIdx2)))\r
+                {\r
+                    g_pucBuffer[ulIdx2] |= ((ucLevel << 0) & 0x0f);\r
+                }\r
+            }\r
+\r
+            //\r
+            // If there is room, dump the single data byte column to the\r
+            // display.  Otherwise, bail out.\r
+            //\r
+            if(ulX < 126)\r
+            {\r
+                RITWriteData(g_pucBuffer, 8);\r
+                ulX += 2;\r
+            }\r
+            else\r
+            {\r
+                return;\r
+            }\r
+        }\r
+\r
+        //\r
+        // Advance to the next character.\r
+        //\r
+        pcStr++;\r
+    }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Displays an image on the OLED display.\r
+//!\r
+//! \param pucImage is a pointer to the image data.\r
+//! \param ulX is the horizontal position to display this image, specified in\r
+//! columns from the left edge of the display.\r
+//! \param ulY is the vertical position to display this image, specified in\r
+//! rows from the top of the display.\r
+//! \param ulWidth is the width of the image, specified in columns.\r
+//! \param ulHeight is the height of the image, specified in rows.\r
+//!\r
+//! This function will display a bitmap graphic on the display.  Because of the\r
+//! format of the display RAM, the starting column (\e ulX) and the number of\r
+//! columns (\e ulWidth) must be an integer multiple of two.\r
+//!\r
+//! The image data is organized with the first row of image data appearing left\r
+//! to right, followed immediately by the second row of image data.  Each byte\r
+//! contains the data for two columns in the current row, with the leftmost\r
+//! column being contained in bits 7:4 and the rightmost column being contained\r
+//! in bits 3:0.\r
+//!\r
+//! For example, an image six columns wide and seven scan lines tall would\r
+//! be arranged as follows (showing how the twenty one bytes of the image would\r
+//! appear on the display):\r
+//!\r
+//! \verbatim\r
+//!     +-------------------+-------------------+-------------------+\r
+//!     |      Byte 0       |      Byte 1       |      Byte 2       |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     |      Byte 3       |      Byte 4       |      Byte 5       |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     |      Byte 6       |      Byte 7       |      Byte 8       |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     |      Byte 9       |      Byte 10      |      Byte 11      |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     |      Byte 12      |      Byte 13      |      Byte 14      |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     |      Byte 15      |      Byte 16      |      Byte 17      |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     |      Byte 18      |      Byte 19      |      Byte 20      |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//!     | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
+//!     +---------+---------+---------+---------+---------+---------+\r
+//! \endverbatim\r
+//!\r
+//! This function is contained in <tt>rit128x96x4.c</tt>, with\r
+//! <tt>rit128x96x4.h</tt> containing the API definition for use by\r
+//! applications.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+RIT128x96x4ImageDraw(const unsigned char *pucImage, unsigned long ulX,\r
+                     unsigned long ulY, unsigned long ulWidth,\r
+                     unsigned long ulHeight)\r
+{\r
+    //\r
+    // Check the arguments.\r
+    //\r
+    ASSERT(ulX < 128);\r
+    ASSERT((ulX & 1) == 0);\r
+    ASSERT(ulY < 96);\r
+    ASSERT((ulX + ulWidth) <= 128);\r
+    ASSERT((ulY + ulHeight) <= 96);\r
+    ASSERT((ulWidth & 1) == 0);\r
+\r
+    //\r
+    // Setup a window starting at the specified column and row, and ending\r
+    // at the column + width and row+height.\r
+    //\r
+    g_pucBuffer[0] = 0x15;\r
+    g_pucBuffer[1] = ulX / 2;\r
+    g_pucBuffer[2] = (ulX + ulWidth - 2) / 2;\r
+    RITWriteCommand(g_pucBuffer, 3);\r
+    g_pucBuffer[0] = 0x75;\r
+    g_pucBuffer[1] = ulY;\r
+    g_pucBuffer[2] = ulY + ulHeight - 1;\r
+    RITWriteCommand(g_pucBuffer, 3);\r
+    RITWriteCommand(g_pucRIT128x96x4HorizontalInc,\r
+                    sizeof(g_pucRIT128x96x4HorizontalInc));\r
+\r
+    //\r
+    // Loop while there are more rows to display.\r
+    //\r
+    while(ulHeight--)\r
+    {\r
+        //\r
+        // Write this row of image data.\r
+        //\r
+        RITWriteData(pucImage, (ulWidth / 2));\r
+\r
+        //\r
+        // Advance to the next row of the image.\r
+        //\r
+        pucImage += (ulWidth / 2);\r
+    }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Enable the SSI component of the OLED display driver.\r
+//!\r
+//! \param ulFrequency specifies the SSI Clock Frequency to be used.\r
+//!\r
+//! This function initializes the SSI interface to the OLED display.\r
+//!\r
+//! This function is contained in <tt>rit128x96x4.c</tt>, with\r
+//! <tt>rit128x96x4.h</tt> containing the API definition for use by\r
+//! applications.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+RIT128x96x4Enable(unsigned long ulFrequency)\r
+{\r
+    unsigned long ulTemp;\r
+\r
+    //\r
+    // Disable the SSI port.\r
+    //\r
+    SSIDisable(SSI0_BASE);\r
+\r
+    //\r
+    // Configure the SSI0 port for master mode.\r
+    //\r
+    SSIConfig(SSI0_BASE, SSI_FRF_MOTO_MODE_2, SSI_MODE_MASTER, ulFrequency, 8);\r
+\r
+    //\r
+    // (Re)Enable SSI control of the FSS pin.\r
+    //\r
+    GPIOPinTypeSSI(GPIO_PORTA_BASE, GPIO_PIN_3);\r
+    GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_STRENGTH_8MA,\r
+                     GPIO_PIN_TYPE_STD_WPU);\r
+\r
+    //\r
+    // Enable the SSI port.\r
+    //\r
+    SSIEnable(SSI0_BASE);\r
+\r
+    //\r
+    // Drain the receive fifo.\r
+    //\r
+    while(SSIDataNonBlockingGet(SSI0_BASE, &ulTemp) != 0)\r
+    {\r
+    }\r
+\r
+    //\r
+    // Indicate that the RIT driver can use the SSI Port.\r
+    //\r
+    g_bSSIEnabled = true;\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Enable the SSI component of the OLED display driver.\r
+//!\r
+//! This function initializes the SSI interface to the OLED display.\r
+//!\r
+//! This function is contained in <tt>rit128x96x4.c</tt>, with\r
+//! <tt>rit128x96x4.h</tt> containing the API definition for use by\r
+//! applications.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+RIT128x96x4Disable(void)\r
+{\r
+    unsigned long ulTemp;\r
+\r
+    //\r
+    // Indicate that the RIT driver can no longer use the SSI Port.\r
+    //\r
+    g_bSSIEnabled = false;\r
+\r
+    //\r
+    // Drain the receive fifo.\r
+    //\r
+    while(SSIDataNonBlockingGet(SSI0_BASE, &ulTemp) != 0)\r
+    {\r
+    }\r
+\r
+    //\r
+    // Disable the SSI port.\r
+    //\r
+    SSIDisable(SSI0_BASE);\r
+\r
+    //\r
+    // Disable SSI control of the FSS pin.\r
+    //\r
+    GPIOPinTypeGPIOOutput(GPIO_PORTA_BASE, GPIO_PIN_3);\r
+    GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_STRENGTH_8MA,\r
+                     GPIO_PIN_TYPE_STD_WPU);\r
+    GPIOPinWrite(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_PIN_3);\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Initialize the OLED display.\r
+//!\r
+//! \param ulFrequency specifies the SSI Clock Frequency to be used.\r
+//!\r
+//! This function initializes the SSI interface to the OLED display and\r
+//! configures the SSD1329 controller on the panel.\r
+//!\r
+//! This function is contained in <tt>rit128x96x4.c</tt>, with\r
+//! <tt>rit128x96x4.h</tt> containing the API definition for use by\r
+//! applications.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+RIT128x96x4Init(unsigned long ulFrequency)\r
+{\r
+    unsigned long ulIdx;\r
+\r
+\r
+       /* Determine which board is being used. */\r
+       if( SysCtlPeripheralPresent( SYSCTL_PERIPH_ETH ) )\r
+       {\r
+               /* Ethernet is present, we must be using the LM3S8962 EK. */\r
+               ulGPIOId = LM3S8962_SYSCTL_PERIPH_GPIO_OLEDDC;\r
+               ulGPIOBase = LM3S8962_GPIO_OLEDDC_BASE;\r
+               ulOLEDDC_PIN = GPIO_PIN_6;\r
+               ulOLEDEN_PIN = GPIO_PIN_7;\r
+       }\r
+       else\r
+       {\r
+               /* Ethernet is not present, we must be using the LM3S1968 EK. */\r
+               ulGPIOId = LM3S1968_SYSCTL_PERIPH_GPIO_OLEDDC;\r
+               ulGPIOBase = LM3S1968_GPIO_OLEDDC_BASE;\r
+               ulOLEDDC_PIN = GPIO_PIN_2;\r
+               ulOLEDEN_PIN = GPIO_PIN_3;\r
+       }\r
+\r
+    //\r
+    // Enable the SSI0 and GPIO port blocks as they are needed by this driver.\r
+    //\r
+    SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI0);\r
+    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);\r
+    SysCtlPeripheralEnable(ulGPIOId); \r
+\r
+    //\r
+    // Configure the SSI0CLK and SSIOTX pins for SSI operation.\r
+    //\r
+    GPIOPinTypeSSI(GPIO_PORTA_BASE, GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_5);\r
+    GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_5,\r
+                     GPIO_STRENGTH_8MA, GPIO_PIN_TYPE_STD_WPU);\r
+\r
+    //\r
+    // Configure the GPIO port pin used as a D/Cn signal for OLED device,\r
+    // and the port pin used to enable power to the OLED panel.\r
+    //\r
+    GPIOPinTypeGPIOOutput(ulGPIOBase, ulOLEDDC_PIN | ulOLEDEN_PIN);\r
+    GPIOPadConfigSet(ulGPIOBase, ulOLEDDC_PIN | ulOLEDEN_PIN,\r
+                     GPIO_STRENGTH_8MA, GPIO_PIN_TYPE_STD);\r
+    GPIOPinWrite(ulGPIOBase, ulOLEDDC_PIN | ulOLEDEN_PIN,\r
+                 ulOLEDDC_PIN | ulOLEDEN_PIN);\r
+\r
+    //\r
+    // Configure and enable the SSI0 port for master mode.\r
+    //\r
+    RIT128x96x4Enable(ulFrequency);\r
+\r
+    //\r
+    // Clear the frame buffer.\r
+    //\r
+    RIT128x96x4Clear();\r
+\r
+    //\r
+    // Initialize the SSD1329 controller.  Loop through the initialization\r
+    // sequence array, sending each command "string" to the controller.\r
+    //\r
+    for(ulIdx = 0; ulIdx < sizeof(g_pucRIT128x96x4Init);\r
+        ulIdx += g_pucRIT128x96x4Init[ulIdx] + 1)\r
+    {\r
+        //\r
+        // Send this command.\r
+        //\r
+        RITWriteCommand(g_pucRIT128x96x4Init + ulIdx + 1,\r
+                        g_pucRIT128x96x4Init[ulIdx] - 1);\r
+    }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Turns on the OLED display.\r
+//!\r
+//! This function will turn on the OLED display, causing it to display the\r
+//! contents of its internal frame buffer.\r
+//!\r
+//! This function is contained in <tt>rit128x96x4.c</tt>, with\r
+//! <tt>rit128x96x4.h</tt> containing the API definition for use by\r
+//! applications.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+RIT128x96x4DisplayOn(void)\r
+{\r
+    unsigned long ulIdx;\r
+\r
+    //\r
+    // Initialize the SSD1329 controller.  Loop through the initialization\r
+    // sequence array, sending each command "string" to the controller.\r
+    //\r
+    for(ulIdx = 0; ulIdx < sizeof(g_pucRIT128x96x4Init);\r
+        ulIdx += g_pucRIT128x96x4Init[ulIdx] + 1)\r
+    {\r
+        //\r
+        // Send this command.\r
+        //\r
+        RITWriteCommand(g_pucRIT128x96x4Init + ulIdx + 1,\r
+                        g_pucRIT128x96x4Init[ulIdx] - 1);\r
+    }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Turns off the OLED display.\r
+//!\r
+//! This function will turn off the OLED display.  This will stop the scanning\r
+//! of the panel and turn off the on-chip DC-DC converter, preventing damage to\r
+//! the panel due to burn-in (it has similar characters to a CRT in this\r
+//! respect).\r
+//!\r
+//! This function is contained in <tt>rit128x96x4.c</tt>, with\r
+//! <tt>rit128x96x4.h</tt> containing the API definition for use by\r
+//! applications.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+RIT128x96x4DisplayOff(void)\r
+{\r
+    static const unsigned char pucCommand1[] =\r
+    {\r
+        0xAE, 0xe3\r
+    };\r
+\r
+    //\r
+    // Put the display to sleep.\r
+    //\r
+    RITWriteCommand(pucCommand1, sizeof(pucCommand1));\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+// Close the Doxygen group.\r
+//! @}\r
+//\r
+//*****************************************************************************\r

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/settings/RTOSDemo.cspy.bat b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/settings/RTOSDemo.cspy.bat
new file mode 100644 (file)
index 0000000..ba9287c
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/settings/RTOSDemo.cspy.bat
@@ -0,0 +1,32 @@
+@REM This bat file has been generated by the IAR Embeddded Workbench\r
+@REM C-SPY interactive debugger,as an aid to preparing a command\r
+@REM line for running the cspybat command line utility with the\r
+@REM appropriate settings.\r
+@REM\r
+@REM After making some adjustments to this file, you can launch cspybat\r
+@REM by typing the name of this file followed by the name of the debug\r
+@REM file (usually an ubrof file). Note that this file is generated\r
+@REM every time a new debug session is initialized, so you may want to\r
+@REM move or rename the file before making changes.\r
+@REM\r
+@REM Note: some command line arguments cannot be properly generated\r
+@REM by this process. Specifically, the plugin which is responsible\r
+@REM for the Terminal I/O window (and other C runtime functionality)\r
+@REM comes in a special version for cspybat, and the name of that\r
+@REM plugin dll is not known when generating this file. It resides in\r
+@REM the $TOOLKIT_DIR$\bin folder and is usually called XXXbat.dll or\r
+@REM XXXlibsupportbat.dll, where XXX is the name of the corresponding\r
+@REM tool chain. Replace the '<libsupport_plugin>' parameter\r
+@REM below with the appropriate file name. Other plugins loaded by\r
+@REM C-SPY are usually not needed by, or will not work in, cspybat\r
+@REM but they are listed at the end of this file for reference.\r
+\r
+\r
+"C:\Devtools\IAR Systems\Embedded Workbench 4.0\common\bin\cspybat" "C:\Devtools\IAR Systems\Embedded Workbench 4.0\ARM\bin\armproc.dll" "C:\Devtools\IAR Systems\Embedded Workbench 4.0\ARM\bin\armlmiftdi.dll"  %1 --plugin "C:\Devtools\IAR Systems\Embedded Workbench 4.0\ARM\bin\<libsupport_plugin>" --backend -B "--endian" "little" "--cpu" "cortex-M3" "--fpu" "None" "--proc_device_desc_file" "C:\Devtools\IAR Systems\Embedded Workbench 4.0\ARM\CONFIG\iolm3sxxxx.ddf" "--drv_verify_download" "all" "--proc_driver" "lmiftdi" "--lmiftdi_speed" "500" \r
+\r
+\r
+@REM Loaded plugins:\r
+@REM    armlibsupport.dll\r
+@REM    C:\Devtools\IAR Systems\Embedded Workbench 4.0\common\plugins\CodeCoverage\CodeCoverage.dll\r
+@REM    C:\Devtools\IAR Systems\Embedded Workbench 4.0\common\plugins\Profiling\Profiling.dll\r
+@REM    C:\Devtools\IAR Systems\Embedded Workbench 4.0\common\plugins\stack\stack.dll\r

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/settings/RTOSDemo.dbgdt b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/settings/RTOSDemo.dbgdt
new file mode 100644 (file)
index 0000000..33f4649
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/settings/RTOSDemo.dbgdt
@@ -0,0 +1,5 @@
+<?xml version="1.0" encoding="iso-8859-1"?>\r
+\r
+<Project/>\r
+\r
+\r

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/settings/RTOSDemo.dni b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/settings/RTOSDemo.dni
new file mode 100644 (file)
index 0000000..61d49c1
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/settings/RTOSDemo.dni
@@ -0,0 +1,4 @@
+[Disassemble mode]\r
+mode=1\r
+[Breakpoints]\r
+Count=0\r

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/settings/RTOSDemo.wsdt b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/settings/RTOSDemo.wsdt
new file mode 100644 (file)
index 0000000..c93053f
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/settings/RTOSDemo.wsdt
@@ -0,0 +1,97 @@
+<?xml version="1.0" encoding="iso-8859-1"?>\r
+\r
+<Workspace>\r
+  <ConfigDictionary>\r
+    <CurrentConfigs>\r
+      <Project>RTOSDemo/Debug</Project>\r
+    </CurrentConfigs>\r
+  </ConfigDictionary>\r
+  <Desktop>\r
+    <Static>\r
+      <Workspace>\r
+        <ColumnWidths>\r
+          <Column0>124</Column0>\r
+          <Column1>27</Column1>\r
+          <Column2>27</Column2>\r
+          <Column3>27</Column3>\r
+        </ColumnWidths>\r
+      </Workspace>\r
+    </Static>\r
+    <Windows>\r
+      <Wnd0>\r
+        <Tabs>\r
+          <Tab>\r
+            <Identity>TabID-18883-22024</Identity>\r
+            <TabName>Workspace</TabName>\r
+            <Factory>Workspace</Factory>\r
+            <Session>\r
+              <NodeDict>\r
+                <ExpandedNode>RTOSDemo</ExpandedNode>\r
+              </NodeDict>\r
+            </Session>\r
+          </Tab>\r
+        </Tabs>\r
+        <SelectedTab>0</SelectedTab>\r
+      </Wnd0>\r
+    </Windows>\r
+    <Editor>\r
+      <Pane/>\r
+      <ActivePane>0</ActivePane>\r
+      <Sizes>\r
+        <Pane>\r
+          <X>1000000</X>\r
+          <Y>1000000</Y>\r
+        </Pane>\r
+      </Sizes>\r
+      <SplitMode>1</SplitMode>\r
+    </Editor>\r
+    <Positions>\r
+      <Top>\r
+        <Row0>\r
+          <Sizes>\r
+            <Toolbar-0087c800>\r
+              <key>iaridepm.enu1</key>\r
+            </Toolbar-0087c800>\r
+          </Sizes>\r
+        </Row0>\r
+      </Top>\r
+      <Left>\r
+        <Row0>\r
+          <Sizes>\r
+            <Wnd0>\r
+              <Rect>\r
+                <Top>-2</Top>\r
+                <Left>-2</Left>\r
+                <Bottom>938</Bottom>\r
+                <Right>198</Right>\r
+                <x>-2</x>\r
+                <y>-2</y>\r
+                <xscreen>200</xscreen>\r
+                <yscreen>200</yscreen>\r
+                <sizeHorzCX>142857</sizeHorzCX>\r
+                <sizeHorzCY>203666</sizeHorzCY>\r
+                <sizeVertCX>142857</sizeVertCX>\r
+                <sizeVertCY>957230</sizeVertCY>\r
+              </Rect>\r
+            </Wnd0>\r
+          </Sizes>\r
+        </Row0>\r
+      </Left>\r
+      <Right>\r
+        <Row0>\r
+          <Sizes/>\r
+        </Row0>\r
+      </Right>\r
+      <Bottom>\r
+        <Row0>\r
+          <Sizes/>\r
+        </Row0>\r
+      </Bottom>\r
+      <Float>\r
+        <Sizes/>\r
+      </Float>\r
+    </Positions>\r
+  </Desktop>\r
+</Workspace>\r
+\r
+\r

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/startup_ewarm.c b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/startup_ewarm.c
new file mode 100644 (file)
index 0000000..af1c8ac
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/startup_ewarm.c
@@ -0,0 +1,265 @@
+//*****************************************************************************\r
+//\r
+// startup_ewarm.c - Boot code for Stellaris.\r
+//\r
+// Copyright (c) 2006-2007 Luminary Micro, Inc.  All rights reserved.\r
+//\r
+// Software License Agreement\r
+//\r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+//\r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+//\r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+//\r
+// This is part of revision 100 of the Stellaris Ethernet\r
+// Applications Library.\r
+//\r
+//*****************************************************************************\r
+\r
+//*****************************************************************************\r
+//\r
+// Enable the IAR extensions for this source file.\r
+//\r
+//*****************************************************************************\r
+#pragma language=extended\r
+\r
+//*****************************************************************************\r
+//\r
+// Forward declaration of the default fault handlers.\r
+//\r
+//*****************************************************************************\r
+void ResetISR(void);\r
+static void NmiSR(void);\r
+static void FaultISR(void);\r
+static void IntDefaultHandler(void);\r
+\r
+//*****************************************************************************\r
+//\r
+// External declaration for the interrupt handler used by the application.\r
+//\r
+//*****************************************************************************\r
+\r
+\r
+//*****************************************************************************\r
+//\r
+// The entry point for the application.\r
+//\r
+//*****************************************************************************\r
+extern int main(void);\r
+extern void xPortPendSVHandler(void);\r
+extern void xPortSysTickHandler(void);\r
+extern void vEMAC_ISR( void );\r
+extern Timer0IntHandler( void );\r
+\r
+//*****************************************************************************\r
+//\r
+// Reserve space for the system stack.\r
+//\r
+//*****************************************************************************\r
+#ifndef STACK_SIZE\r
+#define STACK_SIZE                              64\r
+#endif\r
+static unsigned long pulStack[STACK_SIZE];\r
+\r
+//*****************************************************************************\r
+//\r
+// A union that describes the entries of the vector table.  The union is needed\r
+// since the first entry is the stack pointer and the remainder are function\r
+// pointers.\r
+//\r
+//*****************************************************************************\r
+typedef union\r
+{\r
+    void (*pfnHandler)(void);\r
+    unsigned long ulPtr;\r
+}\r
+uVectorEntry;\r
+\r
+//*****************************************************************************\r
+//\r
+// The minimal vector table for a Cortex M3.  Note that the proper constructs\r
+// must be placed on this to ensure that it ends up at physical address\r
+// 0x0000.0000.\r
+//\r
+//*****************************************************************************\r
+__root const uVectorEntry g_pfnVectors[] @ "INTVEC" =\r
+{\r
+    { .ulPtr = (unsigned long)pulStack + sizeof(pulStack) },\r
+                                            // The initial stack pointer\r
+    ResetISR,                               // The reset handler\r
+    NmiSR,                                  // The NMI handler\r
+    FaultISR,                               // The hard fault handler\r
+    IntDefaultHandler,                      // The MPU fault handler\r
+    IntDefaultHandler,                      // The bus fault handler\r
+    IntDefaultHandler,                      // The usage fault handler\r
+    0,                                      // Reserved\r
+    0,                                      // Reserved\r
+    0,                                      // Reserved\r
+    0,                                      // Reserved\r
+    IntDefaultHandler,                      // SVCall handler\r
+    IntDefaultHandler,                      // Debug monitor handler\r
+    0,                                      // Reserved\r
+    xPortPendSVHandler,                     // The PendSV handler\r
+    xPortSysTickHandler,                    // The SysTick handler\r
+    IntDefaultHandler,                      // GPIO Port A\r
+    IntDefaultHandler,                      // GPIO Port B\r
+    IntDefaultHandler,                      // GPIO Port C\r
+    IntDefaultHandler,                      // GPIO Port D\r
+    IntDefaultHandler,                      // GPIO Port E\r
+    IntDefaultHandler,                      // UART0 Rx and Tx\r
+    IntDefaultHandler,                      // UART1 Rx and Tx\r
+    IntDefaultHandler,                      // SSI Rx and Tx\r
+    IntDefaultHandler,                      // I2C Master and Slave\r
+    IntDefaultHandler,                      // PWM Fault\r
+    IntDefaultHandler,                      // PWM Generator 0\r
+    IntDefaultHandler,                      // PWM Generator 1\r
+    IntDefaultHandler,                      // PWM Generator 2\r
+    IntDefaultHandler,                      // Quadrature Encoder\r
+    IntDefaultHandler,                      // ADC Sequence 0\r
+    IntDefaultHandler,                      // ADC Sequence 1\r
+    IntDefaultHandler,                      // ADC Sequence 2\r
+    IntDefaultHandler,                      // ADC Sequence 3\r
+    IntDefaultHandler,                      // Watchdog timer\r
+    Timer0IntHandler,                       // Timer 0 subtimer A\r
+    IntDefaultHandler,                      // Timer 0 subtimer B\r
+    IntDefaultHandler,                      // Timer 1 subtimer A\r
+    IntDefaultHandler,                      // Timer 1 subtimer B\r
+    IntDefaultHandler,                      // Timer 2 subtimer A\r
+    IntDefaultHandler,                      // Timer 2 subtimer B\r
+    IntDefaultHandler,                      // Analog Comparator 0\r
+    IntDefaultHandler,                      // Analog Comparator 1\r
+    IntDefaultHandler,                      // Analog Comparator 2\r
+    IntDefaultHandler,                      // System Control (PLL, OSC, BO)\r
+    IntDefaultHandler,                      // FLASH Control\r
+    IntDefaultHandler,                      // GPIO Port F\r
+    IntDefaultHandler,                      // GPIO Port G\r
+    IntDefaultHandler,                      // GPIO Port H\r
+    IntDefaultHandler,                      // UART2 Rx and Tx\r
+    IntDefaultHandler,                      // SSI1 Rx and Tx\r
+    IntDefaultHandler,                      // Timer 3 subtimer A\r
+    IntDefaultHandler,                      // Timer 3 subtimer B\r
+    IntDefaultHandler,                      // I2C1 Master and Slave\r
+    IntDefaultHandler,                      // Quadrature Encoder 1\r
+    IntDefaultHandler,                      // CAN0\r
+    IntDefaultHandler,                      // CAN1\r
+    IntDefaultHandler,                      // CAN2\r
+    vEMAC_ISR,                                         // Ethernet\r
+    IntDefaultHandler                       // Power Island\r
+};\r
+\r
+//*****************************************************************************\r
+//\r
+// The following are constructs created by the linker, indicating where the\r
+// the "data" and "bss" segments reside in memory.  The initializers for the\r
+// for the "data" segment resides immediately following the "text" segment.\r
+//\r
+//*****************************************************************************\r
+#pragma segment="DATA_ID"\r
+#pragma segment="DATA_I"\r
+#pragma segment="DATA_Z"\r
+\r
+//*****************************************************************************\r
+//\r
+// This is the code that gets called when the processor first starts execution\r
+// following a reset event.  Only the absolutely necessary set is performed,\r
+// after which the application supplied entry() routine is called.  Any fancy\r
+// actions (such as making decisions based on the reset cause register, and\r
+// resetting the bits in that register) are left solely in the hands of the\r
+// application.\r
+//\r
+//*****************************************************************************\r
+void\r
+ResetISR(void)\r
+{\r
+    unsigned long *pulSrc, *pulDest, *pulEnd;\r
+\r
+    //\r
+    // Copy the data segment initializers from flash to SRAM.\r
+    //\r
+    pulSrc = __segment_begin("DATA_ID");\r
+    pulDest = __segment_begin("DATA_I");\r
+    pulEnd = __segment_end("DATA_I");\r
+    while(pulDest < pulEnd)\r
+    {\r
+        *pulDest++ = *pulSrc++;\r
+    }\r
+\r
+    //\r
+    // Zero fill the bss segment.\r
+    //\r
+    pulDest = __segment_begin("DATA_Z");\r
+    pulEnd = __segment_end("DATA_Z");\r
+    while(pulDest < pulEnd)\r
+    {\r
+        *pulDest++ = 0;\r
+    }\r
+\r
+    //\r
+    // Call the application's entry point.\r
+    //\r
+    main();\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+// This is the code that gets called when the processor receives a NMI.  This\r
+// simply enters an infinite loop, preserving the system state for examination\r
+// by a debugger.\r
+//\r
+//*****************************************************************************\r
+static void\r
+NmiSR(void)\r
+{\r
+    //\r
+    // Enter an infinite loop.\r
+    //\r
+    while(1)\r
+    {\r
+    }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+// This is the code that gets called when the processor receives a fault\r
+// interrupt.  This simply enters an infinite loop, preserving the system state\r
+// for examination by a debugger.\r
+//\r
+//*****************************************************************************\r
+static void\r
+FaultISR(void)\r
+{\r
+    //\r
+    // Enter an infinite loop.\r
+    //\r
+    while(1)\r
+    {\r
+    }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+// This is the code that gets called when the processor receives an unexpected\r
+// interrupt.  This simply enters an infinite loop, preserving the system state\r
+// for examination by a debugger.\r
+//\r
+//*****************************************************************************\r
+static void\r
+IntDefaultHandler(void)\r
+{\r
+    //\r
+    // Go into an infinite loop.\r
+    //\r
+    while(1)\r
+    {\r
+    }\r
+}\r

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/startup_rvmdk.S b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/startup_rvmdk.S
new file mode 100644 (file)
index 0000000..ddedd9a
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/startup_rvmdk.S
@@ -0,0 +1,248 @@
+; <<< Use Configuration Wizard in Context Menu >>>\r
+;******************************************************************************\r
+;\r
+; startup_rvmdk.S - Startup code for use with Keil's uVision.\r
+;\r
+; Copyright (c) 2007 Luminary Micro, Inc.  All rights reserved.\r
+; \r
+; Software License Agreement\r
+; \r
+; Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+; exclusively on LMI's microcontroller products.\r
+; \r
+; The software is owned by LMI and/or its suppliers, and is protected under\r
+; applicable copyright laws.  All rights are reserved.  Any use in violation\r
+; of the foregoing restrictions may subject the user to criminal sanctions\r
+; under applicable laws, as well as to civil liability for the breach of the\r
+; terms and conditions of this license.\r
+; \r
+; THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+; OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+; MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+; LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+; CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+; \r
+; This is part of revision 1408 of the Stellaris Peripheral Driver Library.\r
+;\r
+;******************************************************************************\r
+\r
+;******************************************************************************\r
+;\r
+; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>\r
+;\r
+;******************************************************************************\r
+Stack   EQU     0x00000800\r
+\r
+;******************************************************************************\r
+;\r
+; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>\r
+;\r
+;******************************************************************************\r
+Heap    EQU     0x00000000\r
+\r
+;******************************************************************************\r
+;\r
+; Allocate space for the stack.\r
+;\r
+;******************************************************************************\r
+        AREA    STACK, NOINIT, READWRITE, ALIGN=3\r
+StackMem\r
+        SPACE   Stack\r
+__initial_sp\r
+\r
+;******************************************************************************\r
+;\r
+; Allocate space for the heap.\r
+;\r
+;******************************************************************************\r
+        AREA    HEAP, NOINIT, READWRITE, ALIGN=3\r
+__heap_base\r
+HeapMem\r
+        SPACE   Heap\r
+__heap_limit\r
+\r
+;******************************************************************************\r
+;\r
+; Indicate that the code in this file preserves 8-byte alignment of the stack.\r
+;\r
+;******************************************************************************\r
+        PRESERVE8\r
+\r
+;******************************************************************************\r
+;\r
+; Place code into the reset code section.\r
+;\r
+;******************************************************************************\r
+        AREA    RESET, CODE, READONLY\r
+        THUMB\r
+\r
+;******************************************************************************\r
+;\r
+; The vector table.\r
+;\r
+;******************************************************************************\r
+        EXPORT  __Vectors\r
+__Vectors\r
+        DCD     StackMem + Stack            ; Top of Stack\r
+        DCD     Reset_Handler               ; Reset Handler\r
+        DCD     NmiSR                       ; NMI Handler\r
+        DCD     FaultISR                    ; Hard Fault Handler\r
+        DCD     IntDefaultHandler           ; MPU Fault Handler\r
+        DCD     IntDefaultHandler           ; Bus Fault Handler\r
+        DCD     IntDefaultHandler           ; Usage Fault Handler\r
+        DCD     0                           ; Reserved\r
+        DCD     0                           ; Reserved\r
+        DCD     0                           ; Reserved\r
+        DCD     0                           ; Reserved\r
+        DCD     IntDefaultHandler           ; SVCall Handler\r
+        DCD     IntDefaultHandler           ; Debug Monitor Handler\r
+        DCD     0                           ; Reserved\r
+               EXTERN  xPortPendSVHandler\r
+        DCD     xPortPendSVHandler          ; PendSV Handler\r
+        EXTERN  xPortSysTickHandler\r
+        DCD     xPortSysTickHandler         ; SysTick Handler\r
+        DCD     IntDefaultHandler           ; GPIO Port A\r
+        DCD     IntDefaultHandler           ; GPIO Port B\r
+        DCD     IntDefaultHandler           ; GPIO Port C\r
+        DCD     IntDefaultHandler           ; GPIO Port D\r
+        DCD     IntDefaultHandler           ; GPIO Port E\r
+        DCD     IntDefaultHandler           ; UART0\r
+        DCD     IntDefaultHandler           ; UART1\r
+        DCD     IntDefaultHandler           ; SSI\r
+        DCD     IntDefaultHandler           ; I2C\r
+        DCD     IntDefaultHandler           ; PWM Fault\r
+        DCD     IntDefaultHandler           ; PWM Generator 0\r
+        DCD     IntDefaultHandler           ; PWM Generator 1\r
+        DCD     IntDefaultHandler           ; PWM Generator 2\r
+        DCD     IntDefaultHandler           ; Quadrature Encoder\r
+        DCD     IntDefaultHandler           ; ADC Sequence 0\r
+        DCD     IntDefaultHandler           ; ADC Sequence 1\r
+        DCD     IntDefaultHandler           ; ADC Sequence 2\r
+        DCD     IntDefaultHandler           ; ADC Sequence 3\r
+        DCD     IntDefaultHandler           ; Watchdog\r
+        EXTERN  Timer0IntHandler\r
+        DCD     Timer0IntHandler            ; Timer 0A\r
+        DCD     IntDefaultHandler           ; Timer 0B\r
+        DCD     IntDefaultHandler           ; Timer 1A\r
+        DCD     IntDefaultHandler           ; Timer 1B\r
+        DCD     IntDefaultHandler           ; Timer 2A\r
+        DCD     IntDefaultHandler           ; Timer 2B\r
+        DCD     IntDefaultHandler           ; Comp 0\r
+        DCD     IntDefaultHandler           ; Comp 1\r
+        DCD     IntDefaultHandler           ; Comp 2\r
+        DCD     IntDefaultHandler           ; System Control\r
+        DCD     IntDefaultHandler           ; Flash Control\r
+        DCD     IntDefaultHandler           ; GPIO Port F\r
+        DCD     IntDefaultHandler           ; GPIO Port G\r
+        DCD     IntDefaultHandler           ; GPIO Port H\r
+        DCD     IntDefaultHandler           ; UART2 Rx and Tx\r
+        DCD     IntDefaultHandler           ; SSI1 Rx and Tx\r
+        DCD     IntDefaultHandler           ; Timer 3 subtimer A\r
+        DCD     IntDefaultHandler           ; Timer 3 subtimer B\r
+        DCD     IntDefaultHandler           ; I2C1 Master and Slave\r
+        DCD     IntDefaultHandler           ; Quadrature Encoder 1\r
+        DCD     IntDefaultHandler           ; CAN0\r
+        DCD     IntDefaultHandler           ; CAN1\r
+        DCD     0                           ; Reserved\r
+        EXTERN  vEMAC_ISR\r
+        DCD     vEMAC_ISR                   ; Ethernet\r
+        DCD     IntDefaultHandler           ; Hibernate\r
+\r
+;******************************************************************************\r
+;\r
+; This is the code that gets called when the processor first starts execution\r
+; following a reset event.\r
+;\r
+;******************************************************************************\r
+        EXPORT  Reset_Handler\r
+Reset_Handler\r
+        ;\r
+        ; Call the C library enty point that handles startup.  This will copy\r
+        ; the .data section initializers from flash to SRAM and zero fill the\r
+        ; .bss section.  It will then call __rt_entry, which will be either the\r
+        ; C library version or the one supplied here depending on the\r
+        ; configured startup type.\r
+        ;\r
+        IMPORT  __main\r
+        B       __main\r
+\r
+;******************************************************************************\r
+;\r
+; This is the code that gets called when the processor receives a NMI.  This\r
+; simply enters an infinite loop, preserving the system state for examination\r
+; by a debugger.\r
+;\r
+;******************************************************************************\r
+NmiSR\r
+        B       NmiSR\r
+\r
+;******************************************************************************\r
+;\r
+; This is the code that gets called when the processor receives a fault\r
+; interrupt.  This simply enters an infinite loop, preserving the system state\r
+; for examination by a debugger.\r
+;\r
+;******************************************************************************\r
+FaultISR\r
+        B       FaultISR\r
+\r
+;******************************************************************************\r
+;\r
+; This is the code that gets called when the processor receives an unexpected\r
+; interrupt.  This simply enters an infinite loop, preserving the system state\r
+; for examination by a debugger.\r
+;\r
+;******************************************************************************\r
+IntDefaultHandler\r
+        B       IntDefaultHandler\r
+\r
+;******************************************************************************\r
+;\r
+; Make sure the end of this section is aligned.\r
+;\r
+;******************************************************************************\r
+        ALIGN\r
+\r
+;******************************************************************************\r
+;\r
+; Some code in the normal code section for initializing the heap and stack.\r
+;\r
+;******************************************************************************\r
+        AREA    |.text|, CODE, READONLY\r
+\r
+;******************************************************************************\r
+;\r
+; The function expected of the C library startup code for defining the stack\r
+; and heap memory locations.  For the C library version of the startup code,\r
+; provide this function so that the C library initialization code can find out\r
+; the location of the stack and heap.\r
+;\r
+;******************************************************************************\r
+    IF :DEF: __MICROLIB\r
+        EXPORT  __initial_sp\r
+        EXPORT  __heap_base\r
+        EXPORT  __heap_limit\r
+    ELSE\r
+        IMPORT  __use_two_region_memory\r
+        EXPORT  __user_initial_stackheap\r
+__user_initial_stackheap\r
+        LDR     R0, =HeapMem\r
+        LDR     R1, =(StackMem + Stack)\r
+        LDR     R2, =(HeapMem + Heap)\r
+        LDR     R3, =StackMem\r
+        BX      LR\r
+    ENDIF\r
+\r
+;******************************************************************************\r
+;\r
+; Make sure the end of this section is aligned.\r
+;\r
+;******************************************************************************\r
+        ALIGN\r
+\r
+;******************************************************************************\r
+;\r
+; Tell the assembler that we're done.\r
+;\r
+;******************************************************************************\r
+        END\r

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/timertest.c b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/timertest.c
new file mode 100644 (file)
index 0000000..adcc716
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/timertest.c
@@ -0,0 +1,133 @@
+/*\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
+\r
+       This file is part of the FreeRTOS.org distribution.\r
+\r
+       FreeRTOS.org is free software; you can redistribute it and/or modify\r
+       it under the terms of the GNU General Public License as published by\r
+       the Free Software Foundation; either version 2 of the License, or\r
+       (at your option) any later version.\r
+\r
+       FreeRTOS.org is distributed in the hope that it will be useful,\r
+       but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+       MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
+       GNU General Public License for more details.\r
+\r
+       You should have received a copy of the GNU General Public License\r
+       along with FreeRTOS.org; if not, write to the Free Software\r
+       Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
+\r
+       A special exception to the GPL can be applied should you wish to distribute\r
+       a combined work that includes FreeRTOS.org, without being obliged to provide\r
+       the source code for any proprietary components.  See the licensing section\r
+       of http://www.FreeRTOS.org for full details of how and when the exception\r
+       can be applied.\r
+\r
+       ***************************************************************************\r
+       See http://www.FreeRTOS.org for documentation, latest information, license\r
+       and contact details.  Please ensure to read the configuration and relevant\r
+       port sections of the online documentation.\r
+\r
+       Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along\r
+       with commercial development and support options.\r
+       ***************************************************************************\r
+*/\r
+\r
+/* High speed timer test as described in main.c. */\r
+\r
+/* Scheduler includes. */\r
+#include "FreeRTOS.h"\r
+\r
+/* Library includes. */\r
+#include "hw_ints.h"\r
+#include "hw_memmap.h"\r
+#include "hw_types.h"\r
+#include "interrupt.h"\r
+#include "sysctl.h"\r
+#include "lmi_timer.h"\r
+\r
+/* The set frequency of the interrupt.  Deviations from this are measured as\r
+the jitter. */\r
+#define timerINTERRUPT_FREQUENCY               ( 20000UL )\r
+\r
+/* The expected time between each of the timer interrupts - if the jitter was\r
+zero. */\r
+#define timerEXPECTED_DIFFERENCE_VALUE ( configCPU_CLOCK_HZ / timerINTERRUPT_FREQUENCY )\r
+\r
+/* The highest available interrupt priority. */\r
+#define timerHIGHEST_PRIORITY                  ( 0 )\r
+\r
+/* Misc defines. */\r
+#define timerMAX_32BIT_VALUE                   ( 0xffffffffUL )\r
+#define timerTIMER_1_COUNT_VALUE               ( * ( ( unsigned long * ) ( TIMER1_BASE + 0x48 ) ) )\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Interrupt handler in which the jitter is measured. */\r
+void Timer0IntHandler( void );\r
+\r
+/* Stores the value of the maximum recorded jitter between interrupts. */\r
+unsigned portLONG ulMaxJitter = 0;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+void vSetupTimer( void )\r
+{\r
+unsigned long ulFrequency;\r
+\r
+       /* Timer zero is used to generate the interrupts, and timer 1 is used\r
+       to measure the jitter. */\r
+       SysCtlPeripheralEnable( SYSCTL_PERIPH_TIMER0 );\r
+    SysCtlPeripheralEnable( SYSCTL_PERIPH_TIMER1 );\r
+    TimerConfigure( TIMER0_BASE, TIMER_CFG_32_BIT_PER );\r
+    TimerConfigure( TIMER1_BASE, TIMER_CFG_32_BIT_PER );\r
+       \r
+       /* Set the timer interrupt to be above the kernel - highest. */\r
+       IntPrioritySet( INT_TIMER0A, timerHIGHEST_PRIORITY );\r
+\r
+       /* Just used to measure time. */\r
+    TimerLoadSet(TIMER1_BASE, TIMER_A, timerMAX_32BIT_VALUE );\r
+       \r
+       /* The rate at which the timer will interrupt. */\r
+       ulFrequency = configCPU_CLOCK_HZ / timerINTERRUPT_FREQUENCY;    \r
+    TimerLoadSet( TIMER0_BASE, TIMER_A, ulFrequency );\r
+    IntEnable( INT_TIMER0A );\r
+    TimerIntEnable( TIMER0_BASE, TIMER_TIMA_TIMEOUT );\r
+\r
+       /* Enable both timers. */       \r
+    TimerEnable( TIMER0_BASE, TIMER_A );\r
+    TimerEnable( TIMER1_BASE, TIMER_A );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void Timer0IntHandler( void )\r
+{\r
+unsigned portLONG ulDifference, ulCurrentCount;\r
+static portLONG ulMaxDifference = 0, ulLastCount = 0;\r
+\r
+       /* We use the timer 1 counter value to measure the clock cycles between\r
+       the timer 0 interrupts. */\r
+       ulCurrentCount = timerTIMER_1_COUNT_VALUE;\r
+\r
+       if( ulCurrentCount < ulLastCount )\r
+       {       \r
+               /* How many times has timer 1 counted since the last interrupt? */\r
+               ulDifference =  ulLastCount - ulCurrentCount;\r
+       \r
+               /* Is this the largest difference we have measured yet? */\r
+               if( ulDifference > ulMaxDifference )\r
+               {\r
+                       ulMaxDifference = ulDifference;\r
+                       ulMaxJitter = ulMaxDifference - timerEXPECTED_DIFFERENCE_VALUE;\r
+               }\r
+       }\r
+       \r
+       ulLastCount = ulCurrentCount;\r
+\r
+    TimerIntClear( TIMER0_BASE, TIMER_TIMA_TIMEOUT );\r
+}\r
+\r
+\r
+\r
+\r
+\r

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/Makefile.webserver b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/Makefile.webserver
new file mode 100644 (file)
index 0000000..f38c47a
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/Makefile.webserver
@@ -0,0 +1 @@
+APP_SOURCES += httpd.c http-strings.c httpd-fs.c httpd-cgi.c\r

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/clock-arch.h b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/clock-arch.h
new file mode 100644 (file)
index 0000000..cde657b
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/clock-arch.h
@@ -0,0 +1,42 @@
+/*\r
+ * Copyright (c) 2006, Swedish Institute of Computer Science.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions\r
+ * are met:\r
+ * 1. Redistributions of source code must retain the above copyright\r
+ *    notice, this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright\r
+ *    notice, this list of conditions and the following disclaimer in the\r
+ *    documentation and/or other materials provided with the distribution.\r
+ * 3. Neither the name of the Institute nor the names of its contributors\r
+ *    may be used to endorse or promote products derived from this software\r
+ *    without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND\r
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE\r
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\r
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY\r
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF\r
+ * SUCH DAMAGE.\r
+ *\r
+ * This file is part of the uIP TCP/IP stack\r
+ *\r
+ * $Id: clock-arch.h,v 1.2 2006/06/12 08:00:31 adam Exp $\r
+ */\r
+\r
+#ifndef __CLOCK_ARCH_H__\r
+#define __CLOCK_ARCH_H__\r
+\r
+#include "FreeRTOS.h"\r
+\r
+typedef unsigned long clock_time_t;\r
+#define CLOCK_CONF_SECOND configTICK_RATE_HZ\r
+\r
+#endif /* __CLOCK_ARCH_H__ */\r

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/emac.c b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/emac.c
new file mode 100644 (file)
index 0000000..5fcb0aa
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/emac.c
@@ -0,0 +1,281 @@
+/*\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
+\r
+       This file is part of the FreeRTOS.org distribution.\r
+\r
+       FreeRTOS.org is free software; you can redistribute it and/or modify\r
+       it under the terms of the GNU General Public License as published by\r
+       the Free Software Foundation; either version 2 of the License, or\r
+       (at your option) any later version.\r
+\r
+       FreeRTOS.org is distributed in the hope that it will be useful,\r
+       but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+       MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
+       GNU General Public License for more details.\r
+\r
+       You should have received a copy of the GNU General Public License\r
+       along with FreeRTOS.org; if not, write to the Free Software\r
+       Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
+\r
+       A special exception to the GPL can be applied should you wish to distribute\r
+       a combined work that includes FreeRTOS.org, without being obliged to provide\r
+       the source code for any proprietary components.  See the licensing section\r
+       of http://www.FreeRTOS.org for full details of how and when the exception\r
+       can be applied.\r
+\r
+       ***************************************************************************\r
+       See http://www.FreeRTOS.org for documentation, latest information, license\r
+       and contact details.  Please ensure to read the configuration and relevant\r
+       port sections of the online documentation.\r
+       ***************************************************************************\r
+*/\r
+\r
+/* Kernel includes. */\r
+#include "FreeRTOS.h"\r
+#include "Semphr.h"\r
+#include "task.h"\r
+\r
+/* Demo includes. */\r
+#include "EMAC.h"\r
+\r
+/* uIP includes. */\r
+#include "uip.h"\r
+\r
+/* Hardware library includes. */\r
+#include "hw_types.h"\r
+#include "hw_memmap.h"\r
+#include "hw_ints.h"\r
+#include "hw_ethernet.h"\r
+#include "ethernet.h"\r
+#include "interrupt.h"\r
+\r
+#define emacNUM_RX_BUFFERS             5\r
+#define emacFRAM_SIZE_BYTES    2\r
+#define macNEGOTIATE_DELAY             2000\r
+#define macWAIT_SEND_TIME              ( 10 )\r
+\r
+/* The task that handles the MAC peripheral.  This is created at a high\r
+priority and is effectively a deferred interrupt handler.  The peripheral\r
+handling is deferred to a task to prevent the entire FIFO having to be read\r
+from within an ISR. */\r
+void vMACHandleTask( void *pvParameters );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* The semaphore used to wake the uIP task when data arrives. */\r
+xSemaphoreHandle xEMACSemaphore = NULL;\r
+\r
+/* The semaphore used to wake the interrupt handler task.  The peripheral\r
+is processed at the task level to prevent the need to read the entire FIFO from\r
+within the ISR itself. */\r
+xSemaphoreHandle xMACInterruptSemaphore = NULL;\r
+\r
+/* The buffer used by the uIP stack.  In this case the pointer is used to\r
+point to one of the Rx buffers. */\r
+unsigned portCHAR *uip_buf;\r
+\r
+/* Buffers into which Rx data is placed. */\r
+static unsigned portCHAR ucRxBuffers[ emacNUM_RX_BUFFERS ][ UIP_BUFSIZE + ( 4 * emacFRAM_SIZE_BYTES ) ];\r
+\r
+/* The length of the data within each of the Rx buffers. */\r
+static unsigned portLONG ulRxLength[ emacNUM_RX_BUFFERS ];\r
+\r
+/* Used to keep a track of the number of bytes to transmit. */\r
+static unsigned portLONG ulNextTxSpace;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+portBASE_TYPE vInitEMAC( void )\r
+{\r
+unsigned long ulTemp;\r
+portBASE_TYPE xReturn;\r
+\r
+       /* Ensure all interrupts are disabled. */\r
+       EthernetIntDisable( ETH_BASE, ( ETH_INT_PHY | ETH_INT_MDIO | ETH_INT_RXER | ETH_INT_RXOF | ETH_INT_TX | ETH_INT_TXER | ETH_INT_RX));\r
+\r
+       /* Clear any interrupts that were already pending. */\r
+    ulTemp = EthernetIntStatus( ETH_BASE, pdFALSE );\r
+    EthernetIntClear( ETH_BASE, ulTemp );\r
+\r
+       /* Initialise the MAC and connect. */\r
+    EthernetInit( ETH_BASE );\r
+    EthernetConfigSet( ETH_BASE, ( ETH_CFG_TX_DPLXEN | ETH_CFG_TX_CRCEN | ETH_CFG_TX_PADEN ) );\r
+    EthernetEnable( ETH_BASE );\r
+\r
+       /* Mark each Rx buffer as empty. */\r
+       for( ulTemp = 0; ulTemp < emacNUM_RX_BUFFERS; ulTemp++ )\r
+       {\r
+               ulRxLength[ ulTemp ] = 0;\r
+       }\r
+       \r
+       /* Create the queue and task used to defer the MAC processing to the\r
+       task level. */\r
+       vSemaphoreCreateBinary( xMACInterruptSemaphore );\r
+       xSemaphoreTake( xMACInterruptSemaphore, 0 );\r
+       xReturn = xTaskCreate( vMACHandleTask, ( signed portCHAR * ) "MAC", configMINIMAL_STACK_SIZE, NULL, configMAX_PRIORITIES - 1, NULL );\r
+       vTaskDelay( macNEGOTIATE_DELAY );\r
+       \r
+       /* We are only interested in Rx interrupts. */\r
+       IntPrioritySet( INT_ETH, configKERNEL_INTERRUPT_PRIORITY );\r
+    IntEnable( INT_ETH );\r
+    EthernetIntEnable(ETH_BASE, ETH_INT_RX);\r
+\r
+       return xReturn;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+unsigned int uiGetEMACRxData( unsigned char *ucBuffer )\r
+{\r
+static unsigned long ulNextRxBuffer = 0;\r
+unsigned int iLen;\r
+\r
+       iLen = ulRxLength[ ulNextRxBuffer ];\r
+\r
+       if( iLen != 0 )\r
+       {\r
+               /* Leave room for the size at the start of the buffer. */\r
+               uip_buf = &( ucRxBuffers[ ulNextRxBuffer ][ 2 ] );\r
+               \r
+               ulRxLength[ ulNextRxBuffer ] = 0;\r
+               \r
+               ulNextRxBuffer++;\r
+               if( ulNextRxBuffer >= emacNUM_RX_BUFFERS )\r
+               {\r
+                       ulNextRxBuffer = 0;\r
+               }\r
+       }\r
+\r
+    return iLen;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vInitialiseSend( void )\r
+{\r
+       /* Set the index to the first byte to send - skipping over the size\r
+       bytes. */\r
+       ulNextTxSpace = 2;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vIncrementTxLength( unsigned portLONG ulLength )\r
+{\r
+       ulNextTxSpace += ulLength;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vSendBufferToMAC( void )\r
+{\r
+unsigned long *pulSource;\r
+unsigned portSHORT * pus;\r
+unsigned portLONG ulNextWord;\r
+\r
+       /* Locate the data to be send. */\r
+       pus = ( unsigned portSHORT * ) uip_buf;\r
+\r
+       /* Add in the size of the data. */\r
+       pus--;\r
+       *pus = ulNextTxSpace;\r
+\r
+       /* Wait for data to be sent if there is no space immediately. */\r
+    while( !EthernetSpaceAvail( ETH_BASE ) )\r
+    {\r
+               vTaskDelay( macWAIT_SEND_TIME );\r
+    }\r
+       \r
+       pulSource = ( unsigned portLONG * ) pus;        \r
+       \r
+       for( ulNextWord = 0; ulNextWord < ulNextTxSpace; ulNextWord += sizeof( unsigned portLONG ) )\r
+       {\r
+               HWREG(ETH_BASE + MAC_O_DATA) = *pulSource;\r
+               pulSource++;\r
+       }\r
+\r
+       /* Go. */\r
+    HWREG( ETH_BASE + MAC_O_TR ) = MAC_TR_NEWTX;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vEMAC_ISR( void )\r
+{\r
+portBASE_TYPE xSwitchRequired = pdFALSE;\r
+unsigned portLONG ulTemp;\r
+\r
+       /* Clear the interrupt. */\r
+       ulTemp = EthernetIntStatus( ETH_BASE, pdFALSE );\r
+       EthernetIntClear( ETH_BASE, ulTemp );\r
+               \r
+       /* Was it an Rx interrupt? */\r
+       if( ulTemp & ETH_INT_RX )\r
+       {\r
+               xSwitchRequired = pdTRUE;\r
+               xSemaphoreGiveFromISR( xMACInterruptSemaphore, pdFALSE );\r
+               EthernetIntDisable( ETH_BASE, ETH_INT_RX );\r
+       }\r
+               \r
+    /* Switch to the uIP task. */\r
+       portEND_SWITCHING_ISR( xSwitchRequired );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vMACHandleTask( void *pvParameters )\r
+{\r
+unsigned long ulLen = 0, i;\r
+unsigned portLONG ulLength, ulInt;\r
+unsigned long *pulBuffer;\r
+static unsigned portLONG ulNextRxBuffer = 0;\r
+portBASE_TYPE xSwitchRequired = pdFALSE;\r
+\r
+       for( ;; )\r
+       {\r
+               /* Wait for something to do. */\r
+               xSemaphoreTake( xMACInterruptSemaphore, portMAX_DELAY );\r
+               \r
+               while( ( ulInt = ( EthernetIntStatus( ETH_BASE, pdFALSE ) & ETH_INT_RX ) ) != 0 )\r
+               {               \r
+                       ulLength = HWREG( ETH_BASE + MAC_O_DATA );\r
+                       \r
+                       /* Leave room at the start of the buffer for the size. */\r
+                       pulBuffer = ( unsigned long * ) &( ucRxBuffers[ ulNextRxBuffer ][ 2 ] );                        \r
+                       *pulBuffer = ( ulLength >> 16 );\r
+\r
+                       /* Get the size of the data. */                 \r
+                       pulBuffer = ( unsigned long * ) &( ucRxBuffers[ ulNextRxBuffer ][ 4 ] );                        \r
+                       ulLength &= 0xFFFF;\r
+                       \r
+                       if( ulLength > 4 )\r
+                       {\r
+                               ulLength -= 4;\r
+                               \r
+                               if( ulLength >= UIP_BUFSIZE )\r
+                               {\r
+                                       /* The data won't fit in our buffer.  Ensure we don't\r
+                                       try to write into the buffer. */\r
+                                       ulLength = 0;\r
+                               }\r
+\r
+                               /* Read out the data into our buffer. */\r
+                               for( i = 0; i < ulLength; i += sizeof( unsigned portLONG ) )\r
+                               {\r
+                                       *pulBuffer = HWREG( ETH_BASE + MAC_O_DATA );\r
+                                       pulBuffer++;\r
+                               }\r
+                               \r
+                               /* Store the length of the data into the separate array. */\r
+                               ulRxLength[ ulNextRxBuffer ] = ulLength;\r
+                               \r
+                               /* Use the next buffer the next time through. */\r
+                               ulNextRxBuffer++;\r
+                               if( ulNextRxBuffer >= emacNUM_RX_BUFFERS )\r
+                               {\r
+                                       ulNextRxBuffer = 0;\r
+                               }\r
+               \r
+                               /* Ensure the uIP task is not blocked as data has arrived. */\r
+                               xSemaphoreGive( xEMACSemaphore );\r
+                       }\r
+               }\r
+               \r
+               EthernetIntEnable( ETH_BASE, ETH_INT_RX );\r
+       }\r
+}\r
+\r

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/emac.h b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/emac.h
new file mode 100644 (file)
index 0000000..a49b598
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/emac.h
@@ -0,0 +1,322 @@
+/*----------------------------------------------------------------------------\r
+ *      LPC2378 Ethernet Definitions\r
+ *----------------------------------------------------------------------------\r
+ *      Name:    EMAC.H\r
+ *      Purpose: Philips LPC2378 EMAC hardware definitions\r
+ *----------------------------------------------------------------------------\r
+ *      Copyright (c) 2006 KEIL - An ARM Company. All rights reserved.\r
+ *---------------------------------------------------------------------------*/\r
+#ifndef __EMAC_H\r
+#define __EMAC_H\r
+\r
+/* MAC address definition.  The MAC address must be unique on the network. */\r
+#define emacETHADDR0 0\r
+#define emacETHADDR1 0xbd\r
+#define emacETHADDR2 0x33\r
+#define emacETHADDR3 0x02\r
+#define emacETHADDR4 0x64\r
+#define emacETHADDR5 0x24\r
+\r
+\r
+/* EMAC Memory Buffer configuration for 16K Ethernet RAM. */\r
+#define NUM_RX_FRAG         4           /* Num.of RX Fragments 4*1536= 6.0kB */\r
+#define NUM_TX_FRAG         2           /* Num.of TX Fragments 2*1536= 3.0kB */\r
+#define ETH_FRAG_SIZE       1536        /* Packet Fragment size 1536 Bytes   */\r
+\r
+#define ETH_MAX_FLEN        1536        /* Max. Ethernet Frame Size          */\r
+\r
+/* EMAC variables located in 16K Ethernet SRAM */\r
+#define RX_DESC_BASE        0x7FE00000\r
+#define RX_STAT_BASE        (RX_DESC_BASE + NUM_RX_FRAG*8)\r
+#define TX_DESC_BASE        (RX_STAT_BASE + NUM_RX_FRAG*8)\r
+#define TX_STAT_BASE        (TX_DESC_BASE + NUM_TX_FRAG*8)\r
+#define RX_BUF_BASE         (TX_STAT_BASE + NUM_TX_FRAG*4)\r
+#define TX_BUF_BASE         (RX_BUF_BASE  + NUM_RX_FRAG*ETH_FRAG_SIZE)\r
+\r
+/* RX and TX descriptor and status definitions. */\r
+#define RX_DESC_PACKET(i)   (*(unsigned int *)(RX_DESC_BASE   + 8*i))\r
+#define RX_DESC_CTRL(i)     (*(unsigned int *)(RX_DESC_BASE+4 + 8*i))\r
+#define RX_STAT_INFO(i)     (*(unsigned int *)(RX_STAT_BASE   + 8*i))\r
+#define RX_STAT_HASHCRC(i)  (*(unsigned int *)(RX_STAT_BASE+4 + 8*i))\r
+#define TX_DESC_PACKET(i)   (*(unsigned int *)(TX_DESC_BASE   + 8*i))\r
+#define TX_DESC_CTRL(i)     (*(unsigned int *)(TX_DESC_BASE+4 + 8*i))\r
+#define TX_STAT_INFO(i)     (*(unsigned int *)(TX_STAT_BASE   + 4*i))\r
+#define RX_BUF(i)           (RX_BUF_BASE + ETH_FRAG_SIZE*i)\r
+#define TX_BUF(i)           (TX_BUF_BASE + ETH_FRAG_SIZE*i)\r
+\r
+/* MAC Configuration Register 1 */\r
+#define MAC1_REC_EN         0x00000001  /* Receive Enable                    */\r
+#define MAC1_PASS_ALL       0x00000002  /* Pass All Receive Frames           */\r
+#define MAC1_RX_FLOWC       0x00000004  /* RX Flow Control                   */\r
+#define MAC1_TX_FLOWC       0x00000008  /* TX Flow Control                   */\r
+#define MAC1_LOOPB          0x00000010  /* Loop Back Mode                    */\r
+#define MAC1_RES_TX         0x00000100  /* Reset TX Logic                    */\r
+#define MAC1_RES_MCS_TX     0x00000200  /* Reset MAC TX Control Sublayer     */\r
+#define MAC1_RES_RX         0x00000400  /* Reset RX Logic                    */\r
+#define MAC1_RES_MCS_RX     0x00000800  /* Reset MAC RX Control Sublayer     */\r
+#define MAC1_SIM_RES        0x00004000  /* Simulation Reset                  */\r
+#define MAC1_SOFT_RES       0x00008000  /* Soft Reset MAC                    */\r
+\r
+/* MAC Configuration Register 2 */\r
+#define MAC2_FULL_DUP       0x00000001  /* Full Duplex Mode                  */\r
+#define MAC2_FRM_LEN_CHK    0x00000002  /* Frame Length Checking             */\r
+#define MAC2_HUGE_FRM_EN    0x00000004  /* Huge Frame Enable                 */\r
+#define MAC2_DLY_CRC        0x00000008  /* Delayed CRC Mode                  */\r
+#define MAC2_CRC_EN         0x00000010  /* Append CRC to every Frame         */\r
+#define MAC2_PAD_EN         0x00000020  /* Pad all Short Frames              */\r
+#define MAC2_VLAN_PAD_EN    0x00000040  /* VLAN Pad Enable                   */\r
+#define MAC2_ADET_PAD_EN    0x00000080  /* Auto Detect Pad Enable            */\r
+#define MAC2_PPREAM_ENF     0x00000100  /* Pure Preamble Enforcement         */\r
+#define MAC2_LPREAM_ENF     0x00000200  /* Long Preamble Enforcement         */\r
+#undef  MAC2_NO_BACKOFF /* Remove compiler warning. */\r
+#define MAC2_NO_BACKOFF     0x00001000  /* No Backoff Algorithm              */\r
+#define MAC2_BACK_PRESSURE  0x00002000  /* Backoff Presurre / No Backoff     */\r
+#define MAC2_EXCESS_DEF     0x00004000  /* Excess Defer                      */\r
+\r
+/* Back-to-Back Inter-Packet-Gap Register */\r
+#define IPGT_FULL_DUP       0x00000015  /* Recommended value for Full Duplex */\r
+#define IPGT_HALF_DUP       0x00000012  /* Recommended value for Half Duplex */\r
+\r
+/* Non Back-to-Back Inter-Packet-Gap Register */\r
+#define IPGR_DEF            0x00000012  /* Recommended value                 */\r
+\r
+/* Collision Window/Retry Register */\r
+#define CLRT_DEF            0x0000370F  /* Default value                     */\r
+\r
+/* PHY Support Register */\r
+#undef SUPP_SPEED   /* Remove compiler warning. */\r
+#define SUPP_SPEED          0x00000100  /* Reduced MII Logic Current Speed   */\r
+#define SUPP_RES_RMII       0x00000800  /* Reset Reduced MII Logic           */\r
+\r
+/* Test Register */\r
+#define TEST_SHCUT_PQUANTA  0x00000001  /* Shortcut Pause Quanta             */\r
+#define TEST_TST_PAUSE      0x00000002  /* Test Pause                        */\r
+#define TEST_TST_BACKP      0x00000004  /* Test Back Pressure                */\r
+\r
+/* MII Management Configuration Register */\r
+#define MCFG_SCAN_INC       0x00000001  /* Scan Increment PHY Address        */\r
+#define MCFG_SUPP_PREAM     0x00000002  /* Suppress Preamble                 */\r
+#define MCFG_CLK_SEL        0x0000001C  /* Clock Select Mask                 */\r
+#define MCFG_RES_MII        0x00008000  /* Reset MII Management Hardware     */\r
+\r
+/* MII Management Command Register */\r
+#undef MCMD_READ   /* Remove compiler warning. */\r
+#define MCMD_READ           0x00000001  /* MII Read                          */\r
+#undef MCMD_SCAN /* Remove compiler warning. */\r
+#define MCMD_SCAN           0x00000002  /* MII Scan continuously             */\r
+\r
+#define MII_WR_TOUT         0x00050000  /* MII Write timeout count           */\r
+#define MII_RD_TOUT         0x00050000  /* MII Read timeout count            */\r
+\r
+/* MII Management Address Register */\r
+#define MADR_REG_ADR        0x0000001F  /* MII Register Address Mask         */\r
+#define MADR_PHY_ADR        0x00001F00  /* PHY Address Mask                  */\r
+\r
+/* MII Management Indicators Register */\r
+#undef MIND_BUSY   /* Remove compiler warning. */\r
+#define MIND_BUSY           0x00000001  /* MII is Busy                       */\r
+#define MIND_SCAN           0x00000002  /* MII Scanning in Progress          */\r
+#define MIND_NOT_VAL        0x00000004  /* MII Read Data not valid           */\r
+#define MIND_MII_LINK_FAIL  0x00000008  /* MII Link Failed                   */\r
+\r
+/* Command Register */\r
+#define CR_RX_EN            0x00000001  /* Enable Receive                    */\r
+#define CR_TX_EN            0x00000002  /* Enable Transmit                   */\r
+#define CR_REG_RES          0x00000008  /* Reset Host Registers              */\r
+#define CR_TX_RES           0x00000010  /* Reset Transmit Datapath           */\r
+#define CR_RX_RES           0x00000020  /* Reset Receive Datapath            */\r
+#define CR_PASS_RUNT_FRM    0x00000040  /* Pass Runt Frames                  */\r
+#define CR_PASS_RX_FILT     0x00000080  /* Pass RX Filter                    */\r
+#define CR_TX_FLOW_CTRL     0x00000100  /* TX Flow Control                   */\r
+#define CR_RMII             0x00000200  /* Reduced MII Interface             */\r
+#define CR_FULL_DUP         0x00000400  /* Full Duplex                       */\r
+\r
+/* Status Register */\r
+#define SR_RX_EN            0x00000001  /* Enable Receive                    */\r
+#define SR_TX_EN            0x00000002  /* Enable Transmit                   */\r
+\r
+/* Transmit Status Vector 0 Register */\r
+#define TSV0_CRC_ERR        0x00000001  /* CRC error                         */\r
+#define TSV0_LEN_CHKERR     0x00000002  /* Length Check Error                */\r
+#define TSV0_LEN_OUTRNG     0x00000004  /* Length Out of Range               */\r
+#define TSV0_DONE           0x00000008  /* Tramsmission Completed            */\r
+#define TSV0_MCAST          0x00000010  /* Multicast Destination             */\r
+#define TSV0_BCAST          0x00000020  /* Broadcast Destination             */\r
+#define TSV0_PKT_DEFER      0x00000040  /* Packet Deferred                   */\r
+#define TSV0_EXC_DEFER      0x00000080  /* Excessive Packet Deferral         */\r
+#define TSV0_EXC_COLL       0x00000100  /* Excessive Collision               */\r
+#define TSV0_LATE_COLL      0x00000200  /* Late Collision Occured            */\r
+#define TSV0_GIANT          0x00000400  /* Giant Frame                       */\r
+#define TSV0_UNDERRUN       0x00000800  /* Buffer Underrun                   */\r
+#define TSV0_BYTES          0x0FFFF000  /* Total Bytes Transferred           */\r
+#define TSV0_CTRL_FRAME     0x10000000  /* Control Frame                     */\r
+#define TSV0_PAUSE          0x20000000  /* Pause Frame                       */\r
+#define TSV0_BACK_PRESS     0x40000000  /* Backpressure Method Applied       */\r
+#define TSV0_VLAN           0x80000000  /* VLAN Frame                        */\r
+\r
+/* Transmit Status Vector 1 Register */\r
+#define TSV1_BYTE_CNT       0x0000FFFF  /* Transmit Byte Count               */\r
+#define TSV1_COLL_CNT       0x000F0000  /* Transmit Collision Count          */\r
+\r
+/* Receive Status Vector Register */\r
+#define RSV_BYTE_CNT        0x0000FFFF  /* Receive Byte Count                */\r
+#define RSV_PKT_IGNORED     0x00010000  /* Packet Previously Ignored         */\r
+#define RSV_RXDV_SEEN       0x00020000  /* RXDV Event Previously Seen        */\r
+#define RSV_CARR_SEEN       0x00040000  /* Carrier Event Previously Seen     */\r
+#define RSV_REC_CODEV       0x00080000  /* Receive Code Violation            */\r
+#define RSV_CRC_ERR         0x00100000  /* CRC Error                         */\r
+#define RSV_LEN_CHKERR      0x00200000  /* Length Check Error                */\r
+#define RSV_LEN_OUTRNG      0x00400000  /* Length Out of Range               */\r
+#define RSV_REC_OK          0x00800000  /* Frame Received OK                 */\r
+#define RSV_MCAST           0x01000000  /* Multicast Frame                   */\r
+#define RSV_BCAST           0x02000000  /* Broadcast Frame                   */\r
+#define RSV_DRIB_NIBB       0x04000000  /* Dribble Nibble                    */\r
+#define RSV_CTRL_FRAME      0x08000000  /* Control Frame                     */\r
+#define RSV_PAUSE           0x10000000  /* Pause Frame                       */\r
+#define RSV_UNSUPP_OPC      0x20000000  /* Unsupported Opcode                */\r
+#define RSV_VLAN            0x40000000  /* VLAN Frame                        */\r
+\r
+/* Flow Control Counter Register */\r
+#define FCC_MIRR_CNT        0x0000FFFF  /* Mirror Counter                    */\r
+#define FCC_PAUSE_TIM       0xFFFF0000  /* Pause Timer                       */\r
+\r
+/* Flow Control Status Register */\r
+#define FCS_MIRR_CNT        0x0000FFFF  /* Mirror Counter Current            */\r
+\r
+/* Receive Filter Control Register */\r
+#define RFC_UCAST_EN        0x00000001  /* Accept Unicast Frames Enable      */\r
+#define RFC_BCAST_EN        0x00000002  /* Accept Broadcast Frames Enable    */\r
+#define RFC_MCAST_EN        0x00000004  /* Accept Multicast Frames Enable    */\r
+#define RFC_UCAST_HASH_EN   0x00000008  /* Accept Unicast Hash Filter Frames */\r
+#define RFC_MCAST_HASH_EN   0x00000010  /* Accept Multicast Hash Filter Fram.*/\r
+#define RFC_PERFECT_EN      0x00000020  /* Accept Perfect Match Enable       */\r
+#define RFC_MAGP_WOL_EN     0x00001000  /* Magic Packet Filter WoL Enable    */\r
+#define RFC_PFILT_WOL_EN    0x00002000  /* Perfect Filter WoL Enable         */\r
+\r
+/* Receive Filter WoL Status/Clear Registers */\r
+#define WOL_UCAST           0x00000001  /* Unicast Frame caused WoL          */\r
+#define WOL_BCAST           0x00000002  /* Broadcast Frame caused WoL        */\r
+#define WOL_MCAST           0x00000004  /* Multicast Frame caused WoL        */\r
+#define WOL_UCAST_HASH      0x00000008  /* Unicast Hash Filter Frame WoL     */\r
+#define WOL_MCAST_HASH      0x00000010  /* Multicast Hash Filter Frame WoL   */\r
+#define WOL_PERFECT         0x00000020  /* Perfect Filter WoL                */\r
+#define WOL_RX_FILTER       0x00000080  /* RX Filter caused WoL              */\r
+#define WOL_MAG_PACKET      0x00000100  /* Magic Packet Filter caused WoL    */\r
+\r
+/* Interrupt Status/Enable/Clear/Set Registers */\r
+#define INT_RX_OVERRUN      0x00000001  /* Overrun Error in RX Queue         */\r
+#define INT_RX_ERR          0x00000002  /* Receive Error                     */\r
+#define INT_RX_FIN          0x00000004  /* RX Finished Process Descriptors   */\r
+#define INT_RX_DONE         0x00000008  /* Receive Done                      */\r
+#define INT_TX_UNDERRUN     0x00000010  /* Transmit Underrun                 */\r
+#define INT_TX_ERR          0x00000020  /* Transmit Error                    */\r
+#define INT_TX_FIN          0x00000040  /* TX Finished Process Descriptors   */\r
+#define INT_TX_DONE         0x00000080  /* Transmit Done                     */\r
+#define INT_SOFT_INT        0x00001000  /* Software Triggered Interrupt      */\r
+#define INT_WAKEUP          0x00002000  /* Wakeup Event Interrupt            */\r
+\r
+/* Power Down Register */\r
+#define PD_POWER_DOWN       0x80000000  /* Power Down MAC                    */\r
+\r
+/* RX Descriptor Control Word */\r
+#define RCTRL_SIZE          0x000007FF  /* Buffer size mask                  */\r
+#define RCTRL_INT           0x80000000  /* Generate RxDone Interrupt         */\r
+\r
+/* RX Status Hash CRC Word */\r
+#define RHASH_SA            0x000001FF  /* Hash CRC for Source Address       */\r
+#define RHASH_DA            0x001FF000  /* Hash CRC for Destination Address  */\r
+\r
+/* RX Status Information Word */\r
+#define RINFO_SIZE          0x000007FF  /* Data size in bytes                */\r
+#define RINFO_CTRL_FRAME    0x00040000  /* Control Frame                     */\r
+#define RINFO_VLAN          0x00080000  /* VLAN Frame                        */\r
+#define RINFO_FAIL_FILT     0x00100000  /* RX Filter Failed                  */\r
+#define RINFO_MCAST         0x00200000  /* Multicast Frame                   */\r
+#define RINFO_BCAST         0x00400000  /* Broadcast Frame                   */\r
+#define RINFO_CRC_ERR       0x00800000  /* CRC Error in Frame                */\r
+#define RINFO_SYM_ERR       0x01000000  /* Symbol Error from PHY             */\r
+#define RINFO_LEN_ERR       0x02000000  /* Length Error                      */\r
+#define RINFO_RANGE_ERR     0x04000000  /* Range Error (exceeded max. size)  */\r
+#define RINFO_ALIGN_ERR     0x08000000  /* Alignment Error                   */\r
+#define RINFO_OVERRUN       0x10000000  /* Receive overrun                   */\r
+#define RINFO_NO_DESCR      0x20000000  /* No new Descriptor available       */\r
+#define RINFO_LAST_FLAG     0x40000000  /* Last Fragment in Frame            */\r
+#define RINFO_ERR           0x80000000  /* Error Occured (OR of all errors)  */\r
+\r
+#define RINFO_ERR_MASK     (RINFO_FAIL_FILT | RINFO_CRC_ERR   | RINFO_SYM_ERR | \\r
+                            RINFO_LEN_ERR   | RINFO_ALIGN_ERR | RINFO_OVERRUN)\r
+\r
+/* TX Descriptor Control Word */\r
+#define TCTRL_SIZE          0x000007FF  /* Size of data buffer in bytes      */\r
+#define TCTRL_OVERRIDE      0x04000000  /* Override Default MAC Registers    */\r
+#define TCTRL_HUGE          0x08000000  /* Enable Huge Frame                 */\r
+#define TCTRL_PAD           0x10000000  /* Pad short Frames to 64 bytes      */\r
+#define TCTRL_CRC           0x20000000  /* Append a hardware CRC to Frame    */\r
+#define TCTRL_LAST          0x40000000  /* Last Descriptor for TX Frame      */\r
+#define TCTRL_INT           0x80000000  /* Generate TxDone Interrupt         */\r
+\r
+/* TX Status Information Word */\r
+#define TINFO_COL_CNT       0x01E00000  /* Collision Count                   */\r
+#define TINFO_DEFER         0x02000000  /* Packet Deferred (not an error)    */\r
+#define TINFO_EXCESS_DEF    0x04000000  /* Excessive Deferral                */\r
+#define TINFO_EXCESS_COL    0x08000000  /* Excessive Collision               */\r
+#define TINFO_LATE_COL      0x10000000  /* Late Collision Occured            */\r
+#define TINFO_UNDERRUN      0x20000000  /* Transmit Underrun                 */\r
+#define TINFO_NO_DESCR      0x40000000  /* No new Descriptor available       */\r
+#define TINFO_ERR           0x80000000  /* Error Occured (OR of all errors)  */\r
+\r
+/* DP83848C PHY Registers */\r
+#define PHY_REG_BMCR        0x00        /* Basic Mode Control Register       */\r
+#define PHY_REG_BMSR        0x01        /* Basic Mode Status Register        */\r
+#define PHY_REG_IDR1        0x02        /* PHY Identifier 1                  */\r
+#define PHY_REG_IDR2        0x03        /* PHY Identifier 2                  */\r
+#define PHY_REG_ANAR        0x04        /* Auto-Negotiation Advertisement    */\r
+#define PHY_REG_ANLPAR      0x05        /* Auto-Neg. Link Partner Abitily    */\r
+#define PHY_REG_ANER        0x06        /* Auto-Neg. Expansion Register      */\r
+#define PHY_REG_ANNPTR      0x07        /* Auto-Neg. Next Page TX            */\r
+\r
+/* PHY Extended Registers */\r
+#define PHY_REG_STS         0x10        /* Status Register                   */\r
+#define PHY_REG_MICR        0x11        /* MII Interrupt Control Register    */\r
+#define PHY_REG_MISR        0x12        /* MII Interrupt Status Register     */\r
+#define PHY_REG_FCSCR       0x14        /* False Carrier Sense Counter       */\r
+#define PHY_REG_RECR        0x15        /* Receive Error Counter             */\r
+#define PHY_REG_PCSR        0x16        /* PCS Sublayer Config. and Status   */\r
+#define PHY_REG_RBR         0x17        /* RMII and Bypass Register          */\r
+#define PHY_REG_LEDCR       0x18        /* LED Direct Control Register       */\r
+#define PHY_REG_PHYCR       0x19        /* PHY Control Register              */\r
+#define PHY_REG_10BTSCR     0x1A        /* 10Base-T Status/Control Register  */\r
+#define PHY_REG_CDCTRL1     0x1B        /* CD Test Control and BIST Extens.  */\r
+#define PHY_REG_EDCR        0x1D        /* Energy Detect Control Register    */\r
+\r
+#define PHY_FULLD_100M      0x2100      /* Full Duplex 100Mbit               */\r
+#define PHY_HALFD_100M      0x2000      /* Half Duplex 100Mbit               */\r
+#define PHY_FULLD_10M       0x0100      /* Full Duplex 10Mbit                */\r
+#define PHY_HALFD_10M       0x0000      /* Half Duplex 10MBit                */\r
+#define PHY_AUTO_NEG        0x3000      /* Select Auto Negotiation           */\r
+\r
+#define DP83848C_DEF_ADR    0x0100      /* Default PHY device address        */\r
+#define DP83848C_ID         0x20005C90  /* PHY Identifier                    */\r
+\r
+// prototypes\r
+portBASE_TYPE  vInitEMAC(void);\r
+unsigned short ReadFrameBE_EMAC(void);\r
+void           vIncrementTxLength(unsigned long ulLength);\r
+void           CopyFromFrame_EMAC(void *Dest, unsigned short Size);\r
+void           DummyReadFrame_EMAC(unsigned short Size);\r
+unsigned short StartReadFrame(void);\r
+void           EndReadFrame(void);\r
+unsigned int   CheckFrameReceived(void);\r
+void           vInitialiseSend(void);\r
+unsigned int   Rdy4Tx(void);\r
+void           vSendBufferToMAC(void);\r
+void vEMACWaitForInput( void );\r
+unsigned int uiGetEMACRxData( unsigned char *ucBuffer );\r
+\r
+\r
+#endif\r
+\r
+/*----------------------------------------------------------------------------\r
+ * end of file\r
+ *---------------------------------------------------------------------------*/\r
+\r

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/http-strings b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/http-strings
new file mode 100644 (file)
index 0000000..0d3c30c
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/http-strings
@@ -0,0 +1,35 @@
+http_http "http://"\r
+http_200 "200 "\r
+http_301 "301 "\r
+http_302 "302 "\r
+http_get "GET "\r
+http_10 "HTTP/1.0"\r
+http_11 "HTTP/1.1"\r
+http_content_type "content-type: "\r
+http_texthtml "text/html"\r
+http_location "location: "\r
+http_host "host: "\r
+http_crnl "\r\n"\r
+http_index_html "/index.html"\r
+http_404_html "/404.html"\r
+http_referer "Referer:"\r
+http_header_200 "HTTP/1.0 200 OK\r\nServer: uIP/1.0 http://www.sics.se/~adam/uip/\r\nConnection: close\r\n"\r
+http_header_404 "HTTP/1.0 404 Not found\r\nServer: uIP/1.0 http://www.sics.se/~adam/uip/\r\nConnection: close\r\n"\r
+http_content_type_plain "Content-type: text/plain\r\n\r\n"\r
+http_content_type_html "Content-type: text/html\r\n\r\n"\r
+http_content_type_css  "Content-type: text/css\r\n\r\n"\r
+http_content_type_text "Content-type: text/text\r\n\r\n"\r
+http_content_type_png  "Content-type: image/png\r\n\r\n"\r
+http_content_type_gif  "Content-type: image/gif\r\n\r\n"\r
+http_content_type_jpg  "Content-type: image/jpeg\r\n\r\n"\r
+http_content_type_binary "Content-type: application/octet-stream\r\n\r\n"\r
+http_html ".html"\r
+http_shtml ".shtml"\r
+http_htm ".htm"\r
+http_css ".css"\r
+http_png ".png"\r
+http_gif ".gif"\r
+http_jpg ".jpg"\r
+http_text ".txt"\r
+http_txt ".txt"\r
+\r

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/http-strings.c b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/http-strings.c
new file mode 100644 (file)
index 0000000..ef7a41c
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/http-strings.c
@@ -0,0 +1,102 @@
+const char http_http[8] = \r
+/* "http://" */\r
+{0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, };\r
+const char http_200[5] = \r
+/* "200 " */\r
+{0x32, 0x30, 0x30, 0x20, };\r
+const char http_301[5] = \r
+/* "301 " */\r
+{0x33, 0x30, 0x31, 0x20, };\r
+const char http_302[5] = \r
+/* "302 " */\r
+{0x33, 0x30, 0x32, 0x20, };\r
+const char http_get[5] = \r
+/* "GET " */\r
+{0x47, 0x45, 0x54, 0x20, };\r
+const char http_10[9] = \r
+/* "HTTP/1.0" */\r
+{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x30, };\r
+const char http_11[9] = \r
+/* "HTTP/1.1" */\r
+{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x31, };\r
+const char http_content_type[15] = \r
+/* "content-type: " */\r
+{0x63, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, };\r
+const char http_texthtml[10] = \r
+/* "text/html" */\r
+{0x74, 0x65, 0x78, 0x74, 0x2f, 0x68, 0x74, 0x6d, 0x6c, };\r
+const char http_location[11] = \r
+/* "location: " */\r
+{0x6c, 0x6f, 0x63, 0x61, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, };\r
+const char http_host[7] = \r
+/* "host: " */\r
+{0x68, 0x6f, 0x73, 0x74, 0x3a, 0x20, };\r
+const char http_crnl[3] = \r
+/* "\r\n" */\r
+{0xd, 0xa, };\r
+const char http_index_html[12] = \r
+/* "/index.html" */\r
+{0x2f, 0x69, 0x6e, 0x64, 0x65, 0x78, 0x2e, 0x68, 0x74, 0x6d, 0x6c, };\r
+const char http_404_html[10] = \r
+/* "/404.html" */\r
+{0x2f, 0x34, 0x30, 0x34, 0x2e, 0x68, 0x74, 0x6d, 0x6c, };\r
+const char http_referer[9] = \r
+/* "Referer:" */\r
+{0x52, 0x65, 0x66, 0x65, 0x72, 0x65, 0x72, 0x3a, };\r
+const char http_header_200[84] = \r
+/* "HTTP/1.0 200 OK\r\nServer: uIP/1.0 http://www.sics.se/~adam/uip/\r\nConnection: close\r\n" */\r
+{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x32, 0x30, 0x30, 0x20, 0x4f, 0x4b, 0xd, 0xa, 0x53, 0x65, 0x72, 0x76, 0x65, 0x72, 0x3a, 0x20, 0x75, 0x49, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, 0x77, 0x77, 0x77, 0x2e, 0x73, 0x69, 0x63, 0x73, 0x2e, 0x73, 0x65, 0x2f, 0x7e, 0x61, 0x64, 0x61, 0x6d, 0x2f, 0x75, 0x69, 0x70, 0x2f, 0xd, 0xa, 0x43, 0x6f, 0x6e, 0x6e, 0x65, 0x63, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, 0x63, 0x6c, 0x6f, 0x73, 0x65, 0xd, 0xa, };\r
+const char http_header_404[91] = \r
+/* "HTTP/1.0 404 Not found\r\nServer: uIP/1.0 http://www.sics.se/~adam/uip/\r\nConnection: close\r\n" */\r
+{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x34, 0x30, 0x34, 0x20, 0x4e, 0x6f, 0x74, 0x20, 0x66, 0x6f, 0x75, 0x6e, 0x64, 0xd, 0xa, 0x53, 0x65, 0x72, 0x76, 0x65, 0x72, 0x3a, 0x20, 0x75, 0x49, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, 0x77, 0x77, 0x77, 0x2e, 0x73, 0x69, 0x63, 0x73, 0x2e, 0x73, 0x65, 0x2f, 0x7e, 0x61, 0x64, 0x61, 0x6d, 0x2f, 0x75, 0x69, 0x70, 0x2f, 0xd, 0xa, 0x43, 0x6f, 0x6e, 0x6e, 0x65, 0x63, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, 0x63, 0x6c, 0x6f, 0x73, 0x65, 0xd, 0xa, };\r
+const char http_content_type_plain[29] = \r
+/* "Content-type: text/plain\r\n\r\n" */\r
+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x70, 0x6c, 0x61, 0x69, 0x6e, 0xd, 0xa, 0xd, 0xa, };\r
+const char http_content_type_html[28] = \r
+/* "Content-type: text/html\r\n\r\n" */\r
+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x68, 0x74, 0x6d, 0x6c, 0xd, 0xa, 0xd, 0xa, };\r
+const char http_content_type_css [27] = \r
+/* "Content-type: text/css\r\n\r\n" */\r
+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x63, 0x73, 0x73, 0xd, 0xa, 0xd, 0xa, };\r
+const char http_content_type_text[28] = \r
+/* "Content-type: text/text\r\n\r\n" */\r
+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x74, 0x65, 0x78, 0x74, 0xd, 0xa, 0xd, 0xa, };\r
+const char http_content_type_png [28] = \r
+/* "Content-type: image/png\r\n\r\n" */\r
+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x70, 0x6e, 0x67, 0xd, 0xa, 0xd, 0xa, };\r
+const char http_content_type_gif [28] = \r
+/* "Content-type: image/gif\r\n\r\n" */\r
+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x67, 0x69, 0x66, 0xd, 0xa, 0xd, 0xa, };\r
+const char http_content_type_jpg [29] = \r
+/* "Content-type: image/jpeg\r\n\r\n" */\r
+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x6a, 0x70, 0x65, 0x67, 0xd, 0xa, 0xd, 0xa, };\r
+const char http_content_type_binary[43] = \r
+/* "Content-type: application/octet-stream\r\n\r\n" */\r
+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x61, 0x70, 0x70, 0x6c, 0x69, 0x63, 0x61, 0x74, 0x69, 0x6f, 0x6e, 0x2f, 0x6f, 0x63, 0x74, 0x65, 0x74, 0x2d, 0x73, 0x74, 0x72, 0x65, 0x61, 0x6d, 0xd, 0xa, 0xd, 0xa, };\r
+const char http_html[6] = \r
+/* ".html" */\r
+{0x2e, 0x68, 0x74, 0x6d, 0x6c, };\r
+const char http_shtml[7] = \r
+/* ".shtml" */\r
+{0x2e, 0x73, 0x68, 0x74, 0x6d, 0x6c, };\r
+const char http_htm[5] = \r
+/* ".htm" */\r
+{0x2e, 0x68, 0x74, 0x6d, };\r
+const char http_css[5] = \r
+/* ".css" */\r
+{0x2e, 0x63, 0x73, 0x73, };\r
+const char http_png[5] = \r
+/* ".png" */\r
+{0x2e, 0x70, 0x6e, 0x67, };\r
+const char http_gif[5] = \r
+/* ".gif" */\r
+{0x2e, 0x67, 0x69, 0x66, };\r
+const char http_jpg[5] = \r
+/* ".jpg" */\r
+{0x2e, 0x6a, 0x70, 0x67, };\r
+const char http_text[5] = \r
+/* ".txt" */\r
+{0x2e, 0x74, 0x78, 0x74, };\r
+const char http_txt[5] = \r
+/* ".txt" */\r
+{0x2e, 0x74, 0x78, 0x74, };\r

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/http-strings.h b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/http-strings.h
new file mode 100644 (file)
index 0000000..acbe7e1
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/http-strings.h
@@ -0,0 +1,34 @@
+extern const char http_http[8];\r
+extern const char http_200[5];\r
+extern const char http_301[5];\r
+extern const char http_302[5];\r
+extern const char http_get[5];\r
+extern const char http_10[9];\r
+extern const char http_11[9];\r
+extern const char http_content_type[15];\r
+extern const char http_texthtml[10];\r
+extern const char http_location[11];\r
+extern const char http_host[7];\r
+extern const char http_crnl[3];\r
+extern const char http_index_html[12];\r
+extern const char http_404_html[10];\r
+extern const char http_referer[9];\r
+extern const char http_header_200[84];\r
+extern const char http_header_404[91];\r
+extern const char http_content_type_plain[29];\r
+extern const char http_content_type_html[28];\r
+extern const char http_content_type_css [27];\r
+extern const char http_content_type_text[28];\r
+extern const char http_content_type_png [28];\r
+extern const char http_content_type_gif [28];\r
+extern const char http_content_type_jpg [29];\r
+extern const char http_content_type_binary[43];\r
+extern const char http_html[6];\r
+extern const char http_shtml[7];\r
+extern const char http_htm[5];\r
+extern const char http_css[5];\r
+extern const char http_png[5];\r
+extern const char http_gif[5];\r
+extern const char http_jpg[5];\r
+extern const char http_text[5];\r
+extern const char http_txt[5];\r

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/httpd-cgi.c b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/httpd-cgi.c
new file mode 100644 (file)
index 0000000..803b771
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/httpd-cgi.c
@@ -0,0 +1,269 @@
+/**\r
+ * \addtogroup httpd\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * \file\r
+ *         Web server script interface\r
+ * \author\r
+ *         Adam Dunkels <adam@sics.se>\r
+ *\r
+ */\r
+\r
+/*\r
+ * Copyright (c) 2001-2006, Adam Dunkels.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions\r
+ * are met:\r
+ * 1. Redistributions of source code must retain the above copyright\r
+ *    notice, this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright\r
+ *    notice, this list of conditions and the following disclaimer in the\r
+ *    documentation and/or other materials provided with the distribution.\r
+ * 3. The name of the author may not be used to endorse or promote\r
+ *    products derived from this software without specific prior\r
+ *    written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS\r
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\r
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY\r
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE\r
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\r
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,\r
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\r
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+ * This file is part of the uIP TCP/IP stack.\r
+ *\r
+ * $Id: httpd-cgi.c,v 1.2 2006/06/11 21:46:37 adam Exp $\r
+ *\r
+ */\r
+\r
+#include "uip.h"\r
+#include "psock.h"\r
+#include "httpd.h"\r
+#include "httpd-cgi.h"\r
+#include "httpd-fs.h"\r
+\r
+#include <stdio.h>\r
+#include <string.h>\r
+\r
+HTTPD_CGI_CALL(file, "file-stats", file_stats);\r
+HTTPD_CGI_CALL(tcp, "tcp-connections", tcp_stats);\r
+HTTPD_CGI_CALL(net, "net-stats", net_stats);\r
+HTTPD_CGI_CALL(rtos, "rtos-stats", rtos_stats );\r
+HTTPD_CGI_CALL(io, "led-io", led_io );\r
+\r
+\r
+static const struct httpd_cgi_call *calls[] = { &file, &tcp, &net, &rtos, &io, NULL };\r
+\r
+/*---------------------------------------------------------------------------*/\r
+static\r
+PT_THREAD(nullfunction(struct httpd_state *s, char *ptr))\r
+{\r
+  PSOCK_BEGIN(&s->sout);\r
+  PSOCK_END(&s->sout);\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+httpd_cgifunction\r
+httpd_cgi(char *name)\r
+{\r
+  const struct httpd_cgi_call **f;\r
+\r
+  /* Find the matching name in the table, return the function. */\r
+  for(f = calls; *f != NULL; ++f) {\r
+    if(strncmp((*f)->name, name, strlen((*f)->name)) == 0) {\r
+      return (*f)->function;\r
+    }\r
+  }\r
+  return nullfunction;\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static unsigned short\r
+generate_file_stats(void *arg)\r
+{\r
+  char *f = (char *)arg;\r
+  return snprintf((char *)uip_appdata, UIP_APPDATA_SIZE, "%5u", httpd_fs_count(f));\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static\r
+PT_THREAD(file_stats(struct httpd_state *s, char *ptr))\r
+{\r
+  PSOCK_BEGIN(&s->sout);\r
+\r
+  PSOCK_GENERATOR_SEND(&s->sout, generate_file_stats, strchr(ptr, ' ') + 1);\r
+\r
+  PSOCK_END(&s->sout);\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static const char closed[] =   /*  "CLOSED",*/\r
+{0x43, 0x4c, 0x4f, 0x53, 0x45, 0x44, 0};\r
+static const char syn_rcvd[] = /*  "SYN-RCVD",*/\r
+{0x53, 0x59, 0x4e, 0x2d, 0x52, 0x43, 0x56,\r
+ 0x44,  0};\r
+static const char syn_sent[] = /*  "SYN-SENT",*/\r
+{0x53, 0x59, 0x4e, 0x2d, 0x53, 0x45, 0x4e,\r
+ 0x54,  0};\r
+static const char established[] = /*  "ESTABLISHED",*/\r
+{0x45, 0x53, 0x54, 0x41, 0x42, 0x4c, 0x49, 0x53, 0x48,\r
+ 0x45, 0x44, 0};\r
+static const char fin_wait_1[] = /*  "FIN-WAIT-1",*/\r
+{0x46, 0x49, 0x4e, 0x2d, 0x57, 0x41, 0x49,\r
+ 0x54, 0x2d, 0x31, 0};\r
+static const char fin_wait_2[] = /*  "FIN-WAIT-2",*/\r
+{0x46, 0x49, 0x4e, 0x2d, 0x57, 0x41, 0x49,\r
+ 0x54, 0x2d, 0x32, 0};\r
+static const char closing[] = /*  "CLOSING",*/\r
+{0x43, 0x4c, 0x4f, 0x53, 0x49,\r
+ 0x4e, 0x47, 0};\r
+static const char time_wait[] = /*  "TIME-WAIT,"*/\r
+{0x54, 0x49, 0x4d, 0x45, 0x2d, 0x57, 0x41,\r
+ 0x49, 0x54, 0};\r
+static const char last_ack[] = /*  "LAST-ACK"*/\r
+{0x4c, 0x41, 0x53, 0x54, 0x2d, 0x41, 0x43,\r
+ 0x4b, 0};\r
+\r
+static const char *states[] = {\r
+  closed,\r
+  syn_rcvd,\r
+  syn_sent,\r
+  established,\r
+  fin_wait_1,\r
+  fin_wait_2,\r
+  closing,\r
+  time_wait,\r
+  last_ack};\r
+\r
+\r
+static unsigned short\r
+generate_tcp_stats(void *arg)\r
+{\r
+  struct uip_conn *conn;\r
+  struct httpd_state *s = (struct httpd_state *)arg;\r
+\r
+  conn = &uip_conns[s->count];\r
+  return snprintf((char *)uip_appdata, UIP_APPDATA_SIZE,\r
+                "<tr><td>%d</td><td>%u.%u.%u.%u:%u</td><td>%s</td><td>%u</td><td>%u</td><td>%c %c</td></tr>\r\n",\r
+                htons(conn->lport),\r
+                htons(conn->ripaddr[0]) >> 8,\r
+                htons(conn->ripaddr[0]) & 0xff,\r
+                htons(conn->ripaddr[1]) >> 8,\r
+                htons(conn->ripaddr[1]) & 0xff,\r
+                htons(conn->rport),\r
+                states[conn->tcpstateflags & UIP_TS_MASK],\r
+                conn->nrtx,\r
+                conn->timer,\r
+                (uip_outstanding(conn))? '*':' ',\r
+                (uip_stopped(conn))? '!':' ');\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static\r
+PT_THREAD(tcp_stats(struct httpd_state *s, char *ptr))\r
+{\r
+\r
+  PSOCK_BEGIN(&s->sout);\r
+\r
+  for(s->count = 0; s->count < UIP_CONNS; ++s->count) {\r
+    if((uip_conns[s->count].tcpstateflags & UIP_TS_MASK) != UIP_CLOSED) {\r
+      PSOCK_GENERATOR_SEND(&s->sout, generate_tcp_stats, s);\r
+    }\r
+  }\r
+\r
+  PSOCK_END(&s->sout);\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static unsigned short\r
+generate_net_stats(void *arg)\r
+{\r
+  struct httpd_state *s = (struct httpd_state *)arg;\r
+  return snprintf((char *)uip_appdata, UIP_APPDATA_SIZE,\r
+                 "%5u\n", ((uip_stats_t *)&uip_stat)[s->count]);\r
+}\r
+\r
+static\r
+PT_THREAD(net_stats(struct httpd_state *s, char *ptr))\r
+{\r
+  PSOCK_BEGIN(&s->sout);\r
+\r
+#if UIP_STATISTICS\r
+\r
+  for(s->count = 0; s->count < sizeof(uip_stat) / sizeof(uip_stats_t);\r
+      ++s->count) {\r
+    PSOCK_GENERATOR_SEND(&s->sout, generate_net_stats, s);\r
+  }\r
+\r
+#endif /* UIP_STATISTICS */\r
+\r
+  PSOCK_END(&s->sout);\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+\r
+extern void vTaskList( signed char *pcWriteBuffer );\r
+static char cCountBuf[ 32 ];\r
+long lRefreshCount = 0;\r
+static unsigned short\r
+generate_rtos_stats(void *arg)\r
+{\r
+       lRefreshCount++;\r
+       sprintf( cCountBuf, "<p><br>Refresh count = %d", lRefreshCount );\r
+    vTaskList( uip_appdata );\r
+       strcat( uip_appdata, cCountBuf );\r
+\r
+       return strlen( uip_appdata );\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+\r
+\r
+static\r
+PT_THREAD(rtos_stats(struct httpd_state *s, char *ptr))\r
+{\r
+  PSOCK_BEGIN(&s->sout);\r
+  PSOCK_GENERATOR_SEND(&s->sout, generate_rtos_stats, NULL);\r
+  PSOCK_END(&s->sout);\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+\r
+char *pcStatus;\r
+extern unsigned long uxParTestGetLED( unsigned long uxLED );\r
+\r
+static unsigned short generate_io_state( void *arg )\r
+{\r
+       if( uxParTestGetLED( 0 ) )\r
+       {\r
+               pcStatus = "checked";\r
+       }\r
+       else\r
+       {\r
+               pcStatus = "";\r
+       }\r
+\r
+       sprintf( uip_appdata,\r
+               "<input type=\"checkbox\" name=\"LED0\" value=\"1\" %s>LED"\\r
+               "<p>"\\r
+               "<input type=\"text\" name=\"LCD\" value=\"Enter LCD text\" size=\"16\">",\r
+               pcStatus );\r
+\r
+       return strlen( uip_appdata );\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+\r
+static PT_THREAD(led_io(struct httpd_state *s, char *ptr))\r
+{\r
+  PSOCK_BEGIN(&s->sout);\r
+  PSOCK_GENERATOR_SEND(&s->sout, generate_io_state, NULL);\r
+  PSOCK_END(&s->sout);\r
+}\r
+\r
+/** @} */\r
+\r
+\r
+\r
+\r
+\r
+\r

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/httpd-cgi.h b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/httpd-cgi.h
new file mode 100644 (file)
index 0000000..7ae9283
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/httpd-cgi.h
@@ -0,0 +1,84 @@
+/**\r
+ * \addtogroup httpd\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * \file\r
+ *         Web server script interface header file\r
+ * \author\r
+ *         Adam Dunkels <adam@sics.se>\r
+ *\r
+ */\r
+\r
+\r
+\r
+/*\r
+ * Copyright (c) 2001, Adam Dunkels.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions\r
+ * are met:\r
+ * 1. Redistributions of source code must retain the above copyright\r
+ *    notice, this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright\r
+ *    notice, this list of conditions and the following disclaimer in the\r
+ *    documentation and/or other materials provided with the distribution.\r
+ * 3. The name of the author may not be used to endorse or promote\r
+ *    products derived from this software without specific prior\r
+ *    written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS\r
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\r
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY\r
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE\r
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\r
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,\r
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\r
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+ * This file is part of the uIP TCP/IP stack.\r
+ *\r
+ * $Id: httpd-cgi.h,v 1.2 2006/06/11 21:46:38 adam Exp $\r
+ *\r
+ */\r
+\r
+#ifndef __HTTPD_CGI_H__\r
+#define __HTTPD_CGI_H__\r
+\r
+#include "psock.h"\r
+#include "httpd.h"\r
+\r
+typedef PT_THREAD((* httpd_cgifunction)(struct httpd_state *, char *));\r
+\r
+httpd_cgifunction httpd_cgi(char *name);\r
+\r
+struct httpd_cgi_call {\r
+  const char *name;\r
+  const httpd_cgifunction function;\r
+};\r
+\r
+/**\r
+ * \brief      HTTPD CGI function declaration\r
+ * \param name The C variable name of the function\r
+ * \param str  The string name of the function, used in the script file\r
+ * \param function A pointer to the function that implements it\r
+ *\r
+ *             This macro is used for declaring a HTTPD CGI\r
+ *             function. This function is then added to the list of\r
+ *             HTTPD CGI functions with the httpd_cgi_add() function.\r
+ *\r
+ * \hideinitializer\r
+ */\r
+#define HTTPD_CGI_CALL(name, str, function) \\r
+static PT_THREAD(function(struct httpd_state *, char *)); \\r
+static const struct httpd_cgi_call name = {str, function}\r
+\r
+void httpd_cgi_init(void);\r
+#endif /* __HTTPD_CGI_H__ */\r
+\r
+/** @} */\r

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/httpd-fs.c b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/httpd-fs.c
new file mode 100644 (file)
index 0000000..dc4aef0
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/httpd-fs.c
@@ -0,0 +1,132 @@
+/*\r
+ * Copyright (c) 2001, Swedish Institute of Computer Science.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions\r
+ * are met:\r
+ * 1. Redistributions of source code must retain the above copyright\r
+ *    notice, this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright\r
+ *    notice, this list of conditions and the following disclaimer in the\r
+ *    documentation and/or other materials provided with the distribution.\r
+ * 3. Neither the name of the Institute nor the names of its contributors\r
+ *    may be used to endorse or promote products derived from this software\r
+ *    without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND\r
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE\r
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\r
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY\r
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF\r
+ * SUCH DAMAGE.\r
+ *\r
+ * This file is part of the lwIP TCP/IP stack.\r
+ *\r
+ * Author: Adam Dunkels <adam@sics.se>\r
+ *\r
+ * $Id: httpd-fs.c,v 1.1 2006/06/07 09:13:08 adam Exp $\r
+ */\r
+\r
+#include "httpd.h"\r
+#include "httpd-fs.h"\r
+#include "httpd-fsdata.h"\r
+\r
+#ifndef NULL\r
+#define NULL 0\r
+#endif /* NULL */\r
+\r
+#include "httpd-fsdata.c"\r
+\r
+#if HTTPD_FS_STATISTICS\r
+static u16_t count[HTTPD_FS_NUMFILES];\r
+#endif /* HTTPD_FS_STATISTICS */\r
+\r
+/*-----------------------------------------------------------------------------------*/\r
+static u8_t\r
+httpd_fs_strcmp(const char *str1, const char *str2)\r
+{\r
+  u8_t i;\r
+  i = 0;\r
+ loop:\r
+\r
+  if(str2[i] == 0 ||\r
+     str1[i] == '\r' ||\r
+     str1[i] == '\n') {\r
+    return 0;\r
+  }\r
+\r
+  if(str1[i] != str2[i]) {\r
+    return 1;\r
+  }\r
+\r
+\r
+  ++i;\r
+  goto loop;\r
+}\r
+/*-----------------------------------------------------------------------------------*/\r
+int\r
+httpd_fs_open(const char *name, struct httpd_fs_file *file)\r
+{\r
+#if HTTPD_FS_STATISTICS\r
+  u16_t i = 0;\r
+#endif /* HTTPD_FS_STATISTICS */\r
+  struct httpd_fsdata_file_noconst *f;\r
+\r
+  for(f = (struct httpd_fsdata_file_noconst *)HTTPD_FS_ROOT;\r
+      f != NULL;\r
+      f = (struct httpd_fsdata_file_noconst *)f->next) {\r
+\r
+    if(httpd_fs_strcmp(name, f->name) == 0) {\r
+      file->data = f->data;\r
+      file->len = f->len;\r
+#if HTTPD_FS_STATISTICS\r
+      ++count[i];\r
+#endif /* HTTPD_FS_STATISTICS */\r
+      return 1;\r
+    }\r
+#if HTTPD_FS_STATISTICS\r
+    ++i;\r
+#endif /* HTTPD_FS_STATISTICS */\r
+\r
+  }\r
+  return 0;\r
+}\r
+/*-----------------------------------------------------------------------------------*/\r
+void\r
+httpd_fs_init(void)\r
+{\r
+#if HTTPD_FS_STATISTICS\r
+  u16_t i;\r
+  for(i = 0; i < HTTPD_FS_NUMFILES; i++) {\r
+    count[i] = 0;\r
+  }\r
+#endif /* HTTPD_FS_STATISTICS */\r
+}\r
+/*-----------------------------------------------------------------------------------*/\r
+#if HTTPD_FS_STATISTICS\r
+u16_t httpd_fs_count\r
+(char *name)\r
+{\r
+  struct httpd_fsdata_file_noconst *f;\r
+  u16_t i;\r
+\r
+  i = 0;\r
+  for(f = (struct httpd_fsdata_file_noconst *)HTTPD_FS_ROOT;\r
+      f != NULL;\r
+      f = (struct httpd_fsdata_file_noconst *)f->next) {\r
+\r
+    if(httpd_fs_strcmp(name, f->name) == 0) {\r
+      return count[i];\r
+    }\r
+    ++i;\r
+  }\r
+  return 0;\r
+}\r
+#endif /* HTTPD_FS_STATISTICS */\r
+/*-----------------------------------------------------------------------------------*/\r

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/httpd-fs.h b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/httpd-fs.h
new file mode 100644 (file)
index 0000000..b594eea
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/httpd-fs.h
@@ -0,0 +1,57 @@
+/*\r
+ * Copyright (c) 2001, Swedish Institute of Computer Science.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions\r
+ * are met:\r
+ * 1. Redistributions of source code must retain the above copyright\r
+ *    notice, this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright\r
+ *    notice, this list of conditions and the following disclaimer in the\r
+ *    documentation and/or other materials provided with the distribution.\r
+ * 3. Neither the name of the Institute nor the names of its contributors\r
+ *    may be used to endorse or promote products derived from this software\r
+ *    without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND\r
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE\r
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\r
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY\r
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF\r
+ * SUCH DAMAGE.\r
+ *\r
+ * This file is part of the lwIP TCP/IP stack.\r
+ *\r
+ * Author: Adam Dunkels <adam@sics.se>\r
+ *\r
+ * $Id: httpd-fs.h,v 1.1 2006/06/07 09:13:08 adam Exp $\r
+ */\r
+#ifndef __HTTPD_FS_H__\r
+#define __HTTPD_FS_H__\r
+\r
+#define HTTPD_FS_STATISTICS 1\r
+\r
+struct httpd_fs_file {\r
+  char *data;\r
+  int len;\r
+};\r
+\r
+/* file must be allocated by caller and will be filled in\r
+   by the function. */\r
+int httpd_fs_open(const char *name, struct httpd_fs_file *file);\r
+\r
+#ifdef HTTPD_FS_STATISTICS\r
+#if HTTPD_FS_STATISTICS == 1\r
+u16_t httpd_fs_count(char *name);\r
+#endif /* HTTPD_FS_STATISTICS */\r
+#endif /* HTTPD_FS_STATISTICS */\r
+\r
+void httpd_fs_init(void);\r
+\r
+#endif /* __HTTPD_FS_H__ */\r

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/httpd-fs/404.html b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/httpd-fs/404.html
new file mode 100644 (file)
index 0000000..43e7f4c
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/httpd-fs/404.html
@@ -0,0 +1,8 @@
+<html>\r
+  <body bgcolor="white">\r
+    <center>\r
+      <h1>404 - file not found</h1>\r
+      <h3>Go <a href="/">here</a> instead.</h3>\r
+    </center>\r
+  </body>\r
+</html>
\ No newline at end of file

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/httpd-fs/index.html b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/httpd-fs/index.html
new file mode 100644 (file)
index 0000000..1d3bbee
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/httpd-fs/index.html
@@ -0,0 +1,13 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">\r
+<html>\r
+  <head>\r
+    <title>FreeRTOS.org uIP WEB server demo</title>\r
+  </head>\r
+  <BODY onLoad="window.setTimeout(&quot;location.href='index.shtml'&quot;,100)"bgcolor="#CCCCff">\r
+<font face="arial">\r
+Loading index.shtml.  Click <a href="index.shtml">here</a> if not automatically redirected.\r
+</font>\r
+</font>\r
+</body>\r
+</html>\r
+\r

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/httpd-fs/index.shtml b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/httpd-fs/index.shtml
new file mode 100644 (file)
index 0000000..1923ea7
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/httpd-fs/index.shtml
@@ -0,0 +1,20 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">\r
+<html>\r
+  <head>\r
+    <title>FreeRTOS.org uIP WEB server demo</title>\r
+  </head>\r
+  <BODY onLoad="window.setTimeout(&quot;location.href='index.shtml'&quot;,2000)"bgcolor="#CCCCff">\r
+<font face="arial">\r
+<a href="index.shtml">RTOS Stats</a> <b>|</b> <a href="stats.shtml">TCP Stats</a> <b>|</b> <a href="tcp.shtml">Connections</a> <b>|</b> <a href="http://www.freertos.org/">FreeRTOS.org Homepage</a> <b>|</b> <a href="io.shtml">IO</a>\r
+<br><p>\r
+<hr>\r
+<br><p>\r
+<h2>Task statistics</h2>\r
+Page will refresh every 2 seconds.<p>\r
+<font face="courier"><pre>Task          State  Priority  Stack #<br>************************************************<br>\r
+%! rtos-stats\r
+</pre></font>\r
+</font>\r
+</body>\r
+</html>\r
+\r

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/httpd-fs/io.shtml b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/httpd-fs/io.shtml
new file mode 100644 (file)
index 0000000..07554bb
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/httpd-fs/io.shtml
@@ -0,0 +1,28 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">\r
+<html>\r
+  <head>\r
+    <title>FreeRTOS.org uIP WEB server demo</title>\r
+  </head>\r
+  <BODY bgcolor="#CCCCff">\r
+<font face="arial">\r
+<a href="index.shtml">RTOS Stats</a> <b>|</b> <a href="stats.shtml">TCP Stats</a> <b>|</b> <a href="tcp.shtml">Connections</a> <b>|</b> <a href="http://www.freertos.org/">FreeRTOS.org Homepage</a> <b>|</b> <a href="io.shtml">IO</a>\r
+<br><p>\r
+<hr>\r
+<b>LED and LCD IO</b><br>\r
+\r
+<p>\r
+\r
+Use the check box to turn on or off the LED, enter text to display on the OLED display, then click "Update IO".\r
+\r
+\r
+<p>\r
+<form name="aForm" action="/io.shtml" method="get">\r
+%! led-io\r
+<p>\r
+<input type="submit" value="Update IO">\r
+</form>\r
+<br><p>\r
+</font>\r
+</body>\r
+</html>\r
+\r

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/httpd-fs/stats.shtml b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/httpd-fs/stats.shtml
new file mode 100644 (file)
index 0000000..d762f40
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/httpd-fs/stats.shtml
@@ -0,0 +1,41 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">\r
+<html>\r
+  <head>\r
+    <title>FreeRTOS.org uIP WEB server demo</title>\r
+  </head>\r
+  <BODY bgcolor="#CCCCff">\r
+<font face="arial">\r
+<a href="index.shtml">RTOS Stats</a> <b>|</b> <a href="stats.shtml">TCP Stats</a> <b>|</b> <a href="tcp.shtml">Connections</a> <b>|</b> <a href="http://www.freertos.org/">FreeRTOS.org Homepage</a> <b>|</b> <a href="io.shtml">IO</a>\r
+<br><p>\r
+<hr>\r
+<br><p>\r
+<h2>Network statistics</h2>\r
+<table width="300" border="0">\r
+<tr><td align="left"><font face="courier"><pre>\r
+IP           Packets dropped\r
+             Packets received\r
+             Packets sent\r
+IP errors    IP version/header length\r
+             IP length, high byte\r
+             IP length, low byte\r
+             IP fragments\r
+             Header checksum\r
+             Wrong protocol\r
+ICMP        Packets dropped\r
+             Packets received\r
+             Packets sent\r
+             Type errors\r
+TCP          Packets dropped\r
+             Packets received\r
+             Packets sent\r
+             Checksum errors\r
+             Data packets without ACKs\r
+             Resets\r
+             Retransmissions\r
+            No connection avaliable\r
+            Connection attempts to closed ports\r
+</pre></font></td><td><pre>%! net-stats\r
+</pre></table>\r
+</font>\r
+</body>\r
+</html>\r

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/httpd-fs/tcp.shtml b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/httpd-fs/tcp.shtml
new file mode 100644 (file)
index 0000000..654d61f
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/httpd-fs/tcp.shtml
@@ -0,0 +1,21 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">\r
+<html>\r
+  <head>\r
+    <title>FreeRTOS.org uIP WEB server demo</title>\r
+  </head>\r
+  <BODY bgcolor="#CCCCff">\r
+<font face="arial">\r
+<a href="index.shtml">RTOS Stats</a> <b>|</b> <a href="stats.shtml">TCP Stats</a> <b>|</b> <a href="tcp.shtml">Connections</a> <b>|</b> <a href="http://www.freertos.org/">FreeRTOS.org Homepage</a> <b>|</b> <a href="io.shtml">IO</a>\r
+<br><p>\r
+<hr>\r
+<br>\r
+<h2>Network connections</h2>\r
+<p>\r
+<table>\r
+<tr><th>Local</th><th>Remote</th><th>State</th><th>Retransmissions</th><th>Timer</th><th>Flags</th></tr>\r
+%! tcp-connections\r
+</pre></font>\r
+</font>\r
+</body>\r
+</html>\r
+\r

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/httpd-fsdata.c b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/httpd-fsdata.c
new file mode 100644 (file)
index 0000000..a7fcfab
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/httpd-fsdata.c
@@ -0,0 +1,470 @@
+static const unsigned char data_404_html[] = {\r
+       /* /404.html */\r
+       0x2f, 0x34, 0x30, 0x34, 0x2e, 0x68, 0x74, 0x6d, 0x6c, 0,\r
+       0x3c, 0x68, 0x74, 0x6d, 0x6c, 0x3e, 0xd, 0xa, 0x20, 0x20, \r
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+       0x3c, 0x2f, 0x68, 0x74, 0x6d, 0x6c, 0x3e, 0};\r
+\r
+static const unsigned char data_index_html[] = {\r
+       /* /index.html */\r
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+       0x6d, 0x6c, 0x3e, 0xd, 0xa, 0xd, 0xa, 0};\r
+\r
+static const unsigned char data_index_shtml[] = {\r
+       /* /index.shtml */\r
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+\r
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+       0x74, 0x2d, 0x73, 0x74, 0x61, 0x74, 0x73, 0xd, 0xa, 0x3c, \r
+       0x2f, 0x70, 0x72, 0x65, 0x3e, 0x3c, 0x2f, 0x74, 0x61, 0x62, \r
+       0x6c, 0x65, 0x3e, 0xd, 0xa, 0x3c, 0x2f, 0x66, 0x6f, 0x6e, \r
+       0x74, 0x3e, 0xd, 0xa, 0x3c, 0x2f, 0x62, 0x6f, 0x64, 0x79, \r
+       0x3e, 0xd, 0xa, 0x3c, 0x2f, 0x68, 0x74, 0x6d, 0x6c, 0x3e, \r
+       0xd, 0xa, 0};\r
+\r
+static const unsigned char data_tcp_shtml[] = {\r
+       /* /tcp.shtml */\r
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+       0x43, 0x20, 0x22, 0x2d, 0x2f, 0x2f, 0x57, 0x33, 0x43, 0x2f, \r
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+       0x34, 0x2e, 0x30, 0x31, 0x20, 0x54, 0x72, 0x61, 0x6e, 0x73, \r
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+       0x65, 0x63, 0x74, 0x69, 0x6f, 0x6e, 0x73, 0x3c, 0x2f, 0x61, \r
+       0x3e, 0x20, 0x3c, 0x62, 0x3e, 0x7c, 0x3c, 0x2f, 0x62, 0x3e, \r
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+       0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, 0x77, 0x77, 0x77, \r
+       0x2e, 0x66, 0x72, 0x65, 0x65, 0x72, 0x74, 0x6f, 0x73, 0x2e, \r
+       0x6f, 0x72, 0x67, 0x2f, 0x22, 0x3e, 0x46, 0x72, 0x65, 0x65, \r
+       0x52, 0x54, 0x4f, 0x53, 0x2e, 0x6f, 0x72, 0x67, 0x20, 0x48, \r
+       0x6f, 0x6d, 0x65, 0x70, 0x61, 0x67, 0x65, 0x3c, 0x2f, 0x61, \r
+       0x3e, 0x20, 0x3c, 0x62, 0x3e, 0x7c, 0x3c, 0x2f, 0x62, 0x3e, \r
+       0x20, 0x3c, 0x61, 0x20, 0x68, 0x72, 0x65, 0x66, 0x3d, 0x22, \r
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+       0x3e, 0xd, 0xa, 0x3c, 0x62, 0x72, 0x3e, 0xd, 0xa, 0x3c, \r
+       0x68, 0x32, 0x3e, 0x4e, 0x65, 0x74, 0x77, 0x6f, 0x72, 0x6b, \r
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+       0x6e, 0x73, 0x3c, 0x2f, 0x68, 0x32, 0x3e, 0xd, 0xa, 0x3c, \r
+       0x70, 0x3e, 0xd, 0xa, 0x3c, 0x74, 0x61, 0x62, 0x6c, 0x65, \r
+       0x3e, 0xd, 0xa, 0x3c, 0x74, 0x72, 0x3e, 0x3c, 0x74, 0x68, \r
+       0x3e, 0x4c, 0x6f, 0x63, 0x61, 0x6c, 0x3c, 0x2f, 0x74, 0x68, \r
+       0x3e, 0x3c, 0x74, 0x68, 0x3e, 0x52, 0x65, 0x6d, 0x6f, 0x74, \r
+       0x65, 0x3c, 0x2f, 0x74, 0x68, 0x3e, 0x3c, 0x74, 0x68, 0x3e, \r
+       0x53, 0x74, 0x61, 0x74, 0x65, 0x3c, 0x2f, 0x74, 0x68, 0x3e, \r
+       0x3c, 0x74, 0x68, 0x3e, 0x52, 0x65, 0x74, 0x72, 0x61, 0x6e, \r
+       0x73, 0x6d, 0x69, 0x73, 0x73, 0x69, 0x6f, 0x6e, 0x73, 0x3c, \r
+       0x2f, 0x74, 0x68, 0x3e, 0x3c, 0x74, 0x68, 0x3e, 0x54, 0x69, \r
+       0x6d, 0x65, 0x72, 0x3c, 0x2f, 0x74, 0x68, 0x3e, 0x3c, 0x74, \r
+       0x68, 0x3e, 0x46, 0x6c, 0x61, 0x67, 0x73, 0x3c, 0x2f, 0x74, \r
+       0x68, 0x3e, 0x3c, 0x2f, 0x74, 0x72, 0x3e, 0xd, 0xa, 0x25, \r
+       0x21, 0x20, 0x74, 0x63, 0x70, 0x2d, 0x63, 0x6f, 0x6e, 0x6e, \r
+       0x65, 0x63, 0x74, 0x69, 0x6f, 0x6e, 0x73, 0xd, 0xa, 0x3c, \r
+       0x2f, 0x70, 0x72, 0x65, 0x3e, 0x3c, 0x2f, 0x66, 0x6f, 0x6e, \r
+       0x74, 0x3e, 0xd, 0xa, 0x3c, 0x2f, 0x66, 0x6f, 0x6e, 0x74, \r
+       0x3e, 0xd, 0xa, 0x3c, 0x2f, 0x62, 0x6f, 0x64, 0x79, 0x3e, \r
+       0xd, 0xa, 0x3c, 0x2f, 0x68, 0x74, 0x6d, 0x6c, 0x3e, 0xd, \r
+       0xa, 0xd, 0xa, 0};\r
+\r
+const struct httpd_fsdata_file file_404_html[] = {{NULL, data_404_html, data_404_html + 10, sizeof(data_404_html) - 10}};\r
+\r
+const struct httpd_fsdata_file file_index_html[] = {{file_404_html, data_index_html, data_index_html + 12, sizeof(data_index_html) - 12}};\r
+\r
+const struct httpd_fsdata_file file_index_shtml[] = {{file_index_html, data_index_shtml, data_index_shtml + 13, sizeof(data_index_shtml) - 13}};\r
+\r
+const struct httpd_fsdata_file file_io_shtml[] = {{file_index_shtml, data_io_shtml, data_io_shtml + 10, sizeof(data_io_shtml) - 10}};\r
+\r
+const struct httpd_fsdata_file file_stats_shtml[] = {{file_io_shtml, data_stats_shtml, data_stats_shtml + 13, sizeof(data_stats_shtml) - 13}};\r
+\r
+const struct httpd_fsdata_file file_tcp_shtml[] = {{file_stats_shtml, data_tcp_shtml, data_tcp_shtml + 11, sizeof(data_tcp_shtml) - 11}};\r
+\r
+#define HTTPD_FS_ROOT file_tcp_shtml\r
+\r
+#define HTTPD_FS_NUMFILES 6\r

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/httpd-fsdata.h b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/httpd-fsdata.h
new file mode 100644 (file)
index 0000000..52d35c2
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/httpd-fsdata.h
@@ -0,0 +1,64 @@
+/*\r
+ * Copyright (c) 2001, Swedish Institute of Computer Science.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions\r
+ * are met:\r
+ * 1. Redistributions of source code must retain the above copyright\r
+ *    notice, this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright\r
+ *    notice, this list of conditions and the following disclaimer in the\r
+ *    documentation and/or other materials provided with the distribution.\r
+ * 3. Neither the name of the Institute nor the names of its contributors\r
+ *    may be used to endorse or promote products derived from this software\r
+ *    without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND\r
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE\r
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\r
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY\r
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF\r
+ * SUCH DAMAGE.\r
+ *\r
+ * This file is part of the lwIP TCP/IP stack.\r
+ *\r
+ * Author: Adam Dunkels <adam@sics.se>\r
+ *\r
+ * $Id: httpd-fsdata.h,v 1.1 2006/06/07 09:13:08 adam Exp $\r
+ */\r
+#ifndef __HTTPD_FSDATA_H__\r
+#define __HTTPD_FSDATA_H__\r
+\r
+#include "uip.h"\r
+\r
+struct httpd_fsdata_file {\r
+  const struct httpd_fsdata_file *next;\r
+  const char *name;\r
+  const char *data;\r
+  const int len;\r
+#ifdef HTTPD_FS_STATISTICS\r
+#if HTTPD_FS_STATISTICS == 1\r
+  u16_t count;\r
+#endif /* HTTPD_FS_STATISTICS */\r
+#endif /* HTTPD_FS_STATISTICS */\r
+};\r
+\r
+struct httpd_fsdata_file_noconst {\r
+  struct httpd_fsdata_file *next;\r
+  char *name;\r
+  char *data;\r
+  int len;\r
+#ifdef HTTPD_FS_STATISTICS\r
+#if HTTPD_FS_STATISTICS == 1\r
+  u16_t count;\r
+#endif /* HTTPD_FS_STATISTICS */\r
+#endif /* HTTPD_FS_STATISTICS */\r
+};\r
+\r
+#endif /* __HTTPD_FSDATA_H__ */\r

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/httpd.c b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/httpd.c
new file mode 100644 (file)
index 0000000..644cf16
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/httpd.c
@@ -0,0 +1,346 @@
+/**\r
+ * \addtogroup apps\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * \defgroup httpd Web server\r
+ * @{\r
+ * The uIP web server is a very simplistic implementation of an HTTP\r
+ * server. It can serve web pages and files from a read-only ROM\r
+ * filesystem, and provides a very small scripting language.\r
+\r
+ */\r
+\r
+/**\r
+ * \file\r
+ *         Web server\r
+ * \author\r
+ *         Adam Dunkels <adam@sics.se>\r
+ */\r
+\r
+\r
+/*\r
+ * Copyright (c) 2004, Adam Dunkels.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions\r
+ * are met:\r
+ * 1. Redistributions of source code must retain the above copyright\r
+ *    notice, this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright\r
+ *    notice, this list of conditions and the following disclaimer in the\r
+ *    documentation and/or other materials provided with the distribution.\r
+ * 3. Neither the name of the Institute nor the names of its contributors\r
+ *    may be used to endorse or promote products derived from this software\r
+ *    without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND\r
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE\r
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\r
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY\r
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF\r
+ * SUCH DAMAGE.\r
+ *\r
+ * This file is part of the uIP TCP/IP stack.\r
+ *\r
+ * Author: Adam Dunkels <adam@sics.se>\r
+ *\r
+ * $Id: httpd.c,v 1.2 2006/06/11 21:46:38 adam Exp $\r
+ */\r
+\r
+#include "uip.h"\r
+#include "httpd.h"\r
+#include "httpd-fs.h"\r
+#include "httpd-cgi.h"\r
+#include "http-strings.h"\r
+\r
+#include <string.h>\r
+\r
+#define STATE_WAITING 0\r
+#define STATE_OUTPUT  1\r
+\r
+#define ISO_nl      0x0a\r
+#define ISO_space   0x20\r
+#define ISO_bang    0x21\r
+#define ISO_percent 0x25\r
+#define ISO_period  0x2e\r
+#define ISO_slash   0x2f\r
+#define ISO_colon   0x3a\r
+\r
+\r
+/*---------------------------------------------------------------------------*/\r
+static unsigned short\r
+generate_part_of_file(void *state)\r
+{\r
+  struct httpd_state *s = (struct httpd_state *)state;\r
+\r
+  if(s->file.len > uip_mss()) {\r
+    s->len = uip_mss();\r
+  } else {\r
+    s->len = s->file.len;\r
+  }\r
+  memcpy(uip_appdata, s->file.data, s->len);\r
+  \r
+  return s->len;\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static\r
+PT_THREAD(send_file(struct httpd_state *s))\r
+{\r
+  PSOCK_BEGIN(&s->sout);\r
+  \r
+  do {\r
+    PSOCK_GENERATOR_SEND(&s->sout, generate_part_of_file, s);\r
+    s->file.len -= s->len;\r
+    s->file.data += s->len;\r
+  } while(s->file.len > 0);\r
+      \r
+  PSOCK_END(&s->sout);\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static\r
+PT_THREAD(send_part_of_file(struct httpd_state *s))\r
+{\r
+  PSOCK_BEGIN(&s->sout);\r
+\r
+  PSOCK_SEND(&s->sout, s->file.data, s->len);\r
+  \r
+  PSOCK_END(&s->sout);\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static void\r
+next_scriptstate(struct httpd_state *s)\r
+{\r
+  char *p;\r
+  p = strchr(s->scriptptr, ISO_nl) + 1;\r
+  s->scriptlen -= (unsigned short)(p - s->scriptptr);\r
+  s->scriptptr = p;\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static\r
+PT_THREAD(handle_script(struct httpd_state *s))\r
+{\r
+  char *ptr;\r
+  \r
+  PT_BEGIN(&s->scriptpt);\r
+\r
+\r
+  while(s->file.len > 0) {\r
+\r
+    /* Check if we should start executing a script. */\r
+    if(*s->file.data == ISO_percent &&\r
+       *(s->file.data + 1) == ISO_bang) {\r
+      s->scriptptr = s->file.data + 3;\r
+      s->scriptlen = s->file.len - 3;\r
+      if(*(s->scriptptr - 1) == ISO_colon) {\r
+       httpd_fs_open(s->scriptptr + 1, &s->file);\r
+       PT_WAIT_THREAD(&s->scriptpt, send_file(s));\r
+      } else {\r
+       PT_WAIT_THREAD(&s->scriptpt,\r
+                      httpd_cgi(s->scriptptr)(s, s->scriptptr));\r
+      }\r
+      next_scriptstate(s);\r
+      \r
+      /* The script is over, so we reset the pointers and continue\r
+        sending the rest of the file. */\r
+      s->file.data = s->scriptptr;\r
+      s->file.len = s->scriptlen;\r
+    } else {\r
+      /* See if we find the start of script marker in the block of HTML\r
+        to be sent. */\r
+\r
+      if(s->file.len > uip_mss()) {\r
+       s->len = uip_mss();\r
+      } else {\r
+       s->len = s->file.len;\r
+      }\r
+\r
+      if(*s->file.data == ISO_percent) {\r
+       ptr = strchr(s->file.data + 1, ISO_percent);\r
+      } else {\r
+       ptr = strchr(s->file.data, ISO_percent);\r
+      }\r
+      if(ptr != NULL &&\r
+        ptr != s->file.data) {\r
+       s->len = (int)(ptr - s->file.data);\r
+       if(s->len >= uip_mss()) {\r
+         s->len = uip_mss();\r
+       }\r
+      }\r
+      PT_WAIT_THREAD(&s->scriptpt, send_part_of_file(s));\r
+      s->file.data += s->len;\r
+      s->file.len -= s->len;\r
+      \r
+    }\r
+  }\r
+  \r
+  PT_END(&s->scriptpt);\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static\r
+PT_THREAD(send_headers(struct httpd_state *s, const char *statushdr))\r
+{\r
+  char *ptr;\r
+\r
+  PSOCK_BEGIN(&s->sout);\r
+\r
+  PSOCK_SEND_STR(&s->sout, statushdr);\r
+\r
+  ptr = strrchr(s->filename, ISO_period);\r
+  if(ptr == NULL) {\r
+    PSOCK_SEND_STR(&s->sout, http_content_type_binary);\r
+  } else if(strncmp(http_html, ptr, 5) == 0 ||\r
+           strncmp(http_shtml, ptr, 6) == 0) {\r
+    PSOCK_SEND_STR(&s->sout, http_content_type_html);\r
+  } else if(strncmp(http_css, ptr, 4) == 0) {\r
+    PSOCK_SEND_STR(&s->sout, http_content_type_css);\r
+  } else if(strncmp(http_png, ptr, 4) == 0) {\r
+    PSOCK_SEND_STR(&s->sout, http_content_type_png);\r
+  } else if(strncmp(http_gif, ptr, 4) == 0) {\r
+    PSOCK_SEND_STR(&s->sout, http_content_type_gif);\r
+  } else if(strncmp(http_jpg, ptr, 4) == 0) {\r
+    PSOCK_SEND_STR(&s->sout, http_content_type_jpg);\r
+  } else {\r
+    PSOCK_SEND_STR(&s->sout, http_content_type_plain);\r
+  }\r
+  PSOCK_END(&s->sout);\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static\r
+PT_THREAD(handle_output(struct httpd_state *s))\r
+{\r
+  char *ptr;\r
+  \r
+  PT_BEGIN(&s->outputpt);\r
+ \r
+  if(!httpd_fs_open(s->filename, &s->file)) {\r
+    httpd_fs_open(http_404_html, &s->file);\r
+    strcpy(s->filename, http_404_html);\r
+    PT_WAIT_THREAD(&s->outputpt,\r
+                  send_headers(s,\r
+                  http_header_404));\r
+    PT_WAIT_THREAD(&s->outputpt,\r
+                  send_file(s));\r
+  } else {\r
+    PT_WAIT_THREAD(&s->outputpt,\r
+                  send_headers(s,\r
+                  http_header_200));\r
+    ptr = strchr(s->filename, ISO_period);\r
+    if(ptr != NULL && strncmp(ptr, http_shtml, 6) == 0) {\r
+      PT_INIT(&s->scriptpt);\r
+      PT_WAIT_THREAD(&s->outputpt, handle_script(s));\r
+    } else {\r
+      PT_WAIT_THREAD(&s->outputpt,\r
+                    send_file(s));\r
+    }\r
+  }\r
+  PSOCK_CLOSE(&s->sout);\r
+  PT_END(&s->outputpt);\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static\r
+PT_THREAD(handle_input(struct httpd_state *s))\r
+{\r
+  PSOCK_BEGIN(&s->sin);\r
+\r
+  PSOCK_READTO(&s->sin, ISO_space);\r
+\r
+  \r
+  if(strncmp(s->inputbuf, http_get, 4) != 0) {\r
+    PSOCK_CLOSE_EXIT(&s->sin);\r
+  }\r
+  PSOCK_READTO(&s->sin, ISO_space);\r
+\r
+  if(s->inputbuf[0] != ISO_slash) {\r
+    PSOCK_CLOSE_EXIT(&s->sin);\r
+  }\r
+\r
+  if(s->inputbuf[1] == ISO_space) {\r
+    strncpy(s->filename, http_index_html, sizeof(s->filename));\r
+  } else {\r
+\r
+    s->inputbuf[PSOCK_DATALEN(&s->sin) - 1] = 0;\r
+\r
+    /* Process any form input being sent to the server. */\r
+    {\r
+        extern void vApplicationProcessFormInput( char *pcInputString, long xInputLength );\r
+        vApplicationProcessFormInput( s->inputbuf, PSOCK_DATALEN(&s->sin) );\r
+    }\r
+\r
+    strncpy(s->filename, &s->inputbuf[0], sizeof(s->filename));\r
+  }\r
+\r
+  /*  httpd_log_file(uip_conn->ripaddr, s->filename);*/\r
+  \r
+  s->state = STATE_OUTPUT;\r
+\r
+  while(1) {\r
+    PSOCK_READTO(&s->sin, ISO_nl);\r
+\r
+    if(strncmp(s->inputbuf, http_referer, 8) == 0) {\r
+      s->inputbuf[PSOCK_DATALEN(&s->sin) - 2] = 0;\r
+      /*      httpd_log(&s->inputbuf[9]);*/\r
+    }\r
+  }\r
+  \r
+  PSOCK_END(&s->sin);\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static void\r
+handle_connection(struct httpd_state *s)\r
+{\r
+  handle_input(s);\r
+  if(s->state == STATE_OUTPUT) {\r
+    handle_output(s);\r
+  }\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+void\r
+httpd_appcall(void)\r
+{\r
+  struct httpd_state *s = (struct httpd_state *)&(uip_conn->appstate);\r
+\r
+  if(uip_closed() || uip_aborted() || uip_timedout()) {\r
+  } else if(uip_connected()) {\r
+    PSOCK_INIT(&s->sin, s->inputbuf, sizeof(s->inputbuf) - 1);\r
+    PSOCK_INIT(&s->sout, s->inputbuf, sizeof(s->inputbuf) - 1);\r
+    PT_INIT(&s->outputpt);\r
+    s->state = STATE_WAITING;\r
+    /*    timer_set(&s->timer, CLOCK_SECOND * 100);*/\r
+    s->timer = 0;\r
+    handle_connection(s);\r
+  } else if(s != NULL) {\r
+    if(uip_poll()) {\r
+      ++s->timer;\r
+      if(s->timer >= 20) {\r
+       uip_abort();\r
+      }\r
+    } else {\r
+      s->timer = 0;\r
+    }\r
+    handle_connection(s);\r
+  } else {\r
+    uip_abort();\r
+  }\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+/**\r
+ * \brief      Initialize the web server\r
+ *\r
+ *             This function initializes the web server and should be\r
+ *             called at system boot-up.\r
+ */\r
+void\r
+httpd_init(void)\r
+{\r
+  uip_listen(HTONS(80));\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+/** @} */\r

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/httpd.h b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/httpd.h
new file mode 100644 (file)
index 0000000..7f7a666
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/httpd.h
@@ -0,0 +1,62 @@
+/*\r
+ * Copyright (c) 2001-2005, Adam Dunkels.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions\r
+ * are met:\r
+ * 1. Redistributions of source code must retain the above copyright\r
+ *    notice, this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright\r
+ *    notice, this list of conditions and the following disclaimer in the\r
+ *    documentation and/or other materials provided with the distribution.\r
+ * 3. The name of the author may not be used to endorse or promote\r
+ *    products derived from this software without specific prior\r
+ *    written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS\r
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\r
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY\r
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE\r
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\r
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,\r
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\r
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+ * This file is part of the uIP TCP/IP stack.\r
+ *\r
+ * $Id: httpd.h,v 1.2 2006/06/11 21:46:38 adam Exp $\r
+ *\r
+ */\r
+\r
+#ifndef __HTTPD_H__\r
+#define __HTTPD_H__\r
+\r
+#include "psock.h"\r
+#include "httpd-fs.h"\r
+\r
+struct httpd_state {\r
+  unsigned char timer;\r
+  struct psock sin, sout;\r
+  struct pt outputpt, scriptpt;\r
+  char inputbuf[50];\r
+  char filename[20];\r
+  char state;\r
+  struct httpd_fs_file file;\r
+  int len;\r
+  char *scriptptr;\r
+  int scriptlen;\r
+  \r
+  unsigned short count;\r
+};\r
+\r
+void httpd_init(void);\r
+void httpd_appcall(void);\r
+\r
+void httpd_log(char *msg);\r
+void httpd_log_file(u16_t *requester, char *file);\r
+\r
+#endif /* __HTTPD_H__ */\r

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/makefsdata b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/makefsdata
new file mode 100644 (file)
index 0000000..8d2715a
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/makefsdata
@@ -0,0 +1,78 @@
+#!/usr/bin/perl\r
+\r
+open(OUTPUT, "> httpd-fsdata.c");\r
+\r
+chdir("httpd-fs");\r
+\r
+opendir(DIR, ".");\r
+@files =  grep { !/^\./ && !/(CVS|~)/ } readdir(DIR);\r
+closedir(DIR);\r
+\r
+foreach $file (@files) {  \r
+   \r
+    if(-d $file && $file !~ /^\./) {\r
+       print "Processing directory $file\n";\r
+       opendir(DIR, $file);\r
+       @newfiles =  grep { !/^\./ && !/(CVS|~)/ } readdir(DIR);\r
+       closedir(DIR);\r
+       printf "Adding files @newfiles\n";\r
+       @files = (@files, map { $_ = "$file/$_" } @newfiles);\r
+       next;\r
+    }\r
+}\r
+\r
+foreach $file (@files) {\r
+    if(-f $file) {\r
+       \r
+       print "Adding file $file\n";\r
+       \r
+       open(FILE, $file) || die "Could not open file $file\n";\r
+\r
+       $file =~ s-^-/-;\r
+       $fvar = $file;\r
+       $fvar =~ s-/-_-g;\r
+       $fvar =~ s-\.-_-g;\r
+       # for AVR, add PROGMEM here\r
+       print(OUTPUT "static const unsigned char data".$fvar."[] = {\n");\r
+       print(OUTPUT "\t/* $file */\n\t");\r
+       for($j = 0; $j < length($file); $j++) {\r
+           printf(OUTPUT "%#02x, ", unpack("C", substr($file, $j, 1)));\r
+       }\r
+       printf(OUTPUT "0,\n");\r
+       \r
+       \r
+       $i = 0;        \r
+       while(read(FILE, $data, 1)) {\r
+           if($i == 0) {\r
+               print(OUTPUT "\t");\r
+           }\r
+           printf(OUTPUT "%#02x, ", unpack("C", $data));\r
+           $i++;\r
+           if($i == 10) {\r
+               print(OUTPUT "\n");\r
+               $i = 0;\r
+           }\r
+       }\r
+       print(OUTPUT "0};\n\n");\r
+       close(FILE);\r
+       push(@fvars, $fvar);\r
+       push(@pfiles, $file);\r
+    }\r
+}\r
+\r
+for($i = 0; $i < @fvars; $i++) {\r
+    $file = $pfiles[$i];\r
+    $fvar = $fvars[$i];\r
+\r
+    if($i == 0) {\r
+        $prevfile = "NULL";\r
+    } else {\r
+        $prevfile = "file" . $fvars[$i - 1];\r
+    }\r
+    print(OUTPUT "const struct httpd_fsdata_file file".$fvar."[] = {{$prevfile, data$fvar, ");\r
+    print(OUTPUT "data$fvar + ". (length($file) + 1) .", ");\r
+    print(OUTPUT "sizeof(data$fvar) - ". (length($file) + 1) ."}};\n\n");\r
+}\r
+\r
+print(OUTPUT "#define HTTPD_FS_ROOT file$fvars[$i - 1]\n\n");\r
+print(OUTPUT "#define HTTPD_FS_NUMFILES $i\n");\r

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/makestrings b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/makestrings
new file mode 100644 (file)
index 0000000..8a13c6d
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/makestrings
@@ -0,0 +1,40 @@
+#!/usr/bin/perl\r
+\r
+\r
+sub stringify {\r
+  my $name = shift(@_);\r
+  open(OUTPUTC, "> $name.c");\r
+  open(OUTPUTH, "> $name.h");\r
+  \r
+  open(FILE, "$name");\r
+  \r
+  while(<FILE>) {\r
+    if(/(.+) "(.+)"/) {\r
+      $var = $1;\r
+      $data = $2;\r
+      \r
+      $datan = $data;\r
+      $datan =~ s/\\r/\r/g;\r
+      $datan =~ s/\\n/\n/g;\r
+      $datan =~ s/\\01/\01/g;      \r
+      $datan =~ s/\\0/\0/g;\r
+      \r
+      printf(OUTPUTC "const char $var\[%d] = \n", length($datan) + 1);\r
+      printf(OUTPUTC "/* \"$data\" */\n");\r
+      printf(OUTPUTC "{");\r
+      for($j = 0; $j < length($datan); $j++) {\r
+       printf(OUTPUTC "%#02x, ", unpack("C", substr($datan, $j, 1)));\r
+      }\r
+      printf(OUTPUTC "};\n");\r
+      \r
+      printf(OUTPUTH "extern const char $var\[%d];\n", length($datan) + 1);\r
+      \r
+    }\r
+  }\r
+  close(OUTPUTC);\r
+  close(OUTPUTH);\r
+}\r
+stringify("http-strings");\r
+\r
+exit 0;\r
+\r

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/uIP_Task.c b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/uIP_Task.c
new file mode 100644 (file)
index 0000000..69325a6
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/uIP_Task.c
@@ -0,0 +1,316 @@
+/*\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
+\r
+       This file is part of the FreeRTOS.org distribution.\r
+\r
+       FreeRTOS.org is free software; you can redistribute it and/or modify\r
+       it under the terms of the GNU General Public License as published by\r
+       the Free Software Foundation; either version 2 of the License, or\r
+       (at your option) any later version.\r
+\r
+       FreeRTOS.org is distributed in the hope that it will be useful,\r
+       but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+       MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
+       GNU General Public License for more details.\r
+\r
+       You should have received a copy of the GNU General Public License\r
+       along with FreeRTOS.org; if not, write to the Free Software\r
+       Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
+\r
+       A special exception to the GPL can be applied should you wish to distribute\r
+       a combined work that includes FreeRTOS.org, without being obliged to provide\r
+       the source code for any proprietary components.  See the licensing section\r
+       of http://www.FreeRTOS.org for full details of how and when the exception\r
+       can be applied.\r
+\r
+       ***************************************************************************\r
+       See http://www.FreeRTOS.org for documentation, latest information, license\r
+       and contact details.  Please ensure to read the configuration and relevant\r
+       port sections of the online documentation.\r
+       ***************************************************************************\r
+*/\r
+/* Standard includes. */\r
+#include <string.h>\r
+\r
+/* Scheduler includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+#include "semphr.h"\r
+\r
+/* uip includes. */\r
+#include "hw_types.h"\r
+#include "uip.h"\r
+#include "uip_arp.h"\r
+#include "httpd.h"\r
+#include "timer.h"\r
+#include "clock-arch.h"\r
+#include "hw_ethernet.h"\r
+#include "ethernet.h"\r
+#include "hw_memmap.h"\r
+#include "lmi_flash.h"\r
+#include "sysctl.h"\r
+\r
+/* Demo includes. */\r
+#include "emac.h"\r
+#include "partest.h"\r
+#include "lcd_message.h"\r
+\r
+struct timer {\r
+  clock_time_t start;\r
+  clock_time_t interval;\r
+};\r
+\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* IP address configuration. */\r
+#define uipIP_ADDR0            172\r
+#define uipIP_ADDR1            25\r
+#define uipIP_ADDR2            218\r
+#define uipIP_ADDR3            19      \r
+\r
+/* How long to wait before attempting to connect the MAC again. */\r
+#define uipINIT_WAIT    100\r
+\r
+/* Shortcut to the header within the Rx buffer. */\r
+#define xHeader ((struct uip_eth_hdr *) &uip_buf[ 0 ])\r
+\r
+/* Standard constant. */\r
+#define uipTOTAL_FRAME_HEADER_SIZE     54\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * Send the uIP buffer to the MAC.\r
+ */\r
+static void prvENET_Send(void);\r
+\r
+/*\r
+ * Setup the MAC address in the MAC itself, and in the uIP stack.\r
+ */\r
+static void prvSetMACAddress( void );\r
+\r
+/*\r
+ * Port functions required by the uIP stack.\r
+ */\r
+void clock_init( void );\r
+clock_time_t clock_time( void );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* The semaphore used by the ISR to wake the uIP task. */\r
+extern xSemaphoreHandle xEMACSemaphore;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+void clock_init(void)\r
+{\r
+       /* This is done when the scheduler starts. */\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Define clock functions here to avoid header file name clash between uIP\r
+and the Luminary Micro driver library. */\r
+clock_time_t clock_time( void )\r
+{\r
+       return xTaskGetTickCount();\r
+}\r
+extern void timer_set(struct timer *t, clock_time_t interval);\r
+extern int timer_expired(struct timer *t);\r
+extern void timer_reset(struct timer *t);\r
+\r
+\r
+\r
+\r
+void vuIP_Task( void *pvParameters )\r
+{\r
+portBASE_TYPE i;\r
+uip_ipaddr_t xIPAddr;\r
+struct timer periodic_timer, arp_timer;\r
+extern void ( vEMAC_ISR )( void );\r
+\r
+       /* Enable/Reset the Ethernet Controller */\r
+       SysCtlPeripheralEnable( SYSCTL_PERIPH_ETH );\r
+       SysCtlPeripheralReset( SYSCTL_PERIPH_ETH );\r
+\r
+       /* Create the semaphore used by the ISR to wake this task. */\r
+       vSemaphoreCreateBinary( xEMACSemaphore );\r
+       \r
+       /* Initialise the uIP stack. */\r
+       timer_set( &periodic_timer, configTICK_RATE_HZ / 2 );\r
+       timer_set( &arp_timer, configTICK_RATE_HZ * 10 );\r
+       uip_init();\r
+       uip_ipaddr( xIPAddr, uipIP_ADDR0, uipIP_ADDR1, uipIP_ADDR2, uipIP_ADDR3 );\r
+       uip_sethostaddr( xIPAddr );\r
+       httpd_init();\r
+\r
+       while( vInitEMAC() != pdPASS )\r
+    {\r
+        vTaskDelay( uipINIT_WAIT );\r
+    }\r
+       prvSetMACAddress();     \r
+       \r
+\r
+       for( ;; )\r
+       {\r
+               /* Is there received data ready to be processed? */\r
+               uip_len = uiGetEMACRxData( uip_buf );\r
+               \r
+               if( uip_len > 0 )\r
+               {\r
+                       /* Standard uIP loop taken from the uIP manual. */\r
+\r
+                       if( xHeader->type == htons( UIP_ETHTYPE_IP ) )\r
+                       {\r
+                               uip_arp_ipin();\r
+                               uip_input();\r
+\r
+                               /* If the above function invocation resulted in data that\r
+                               should be sent out on the network, the global variable\r
+                               uip_len is set to a value > 0. */\r
+                               if( uip_len > 0 )\r
+                               {\r
+                                       uip_arp_out();\r
+                                       prvENET_Send();\r
+                               }\r
+                       }\r
+                       else if( xHeader->type == htons( UIP_ETHTYPE_ARP ) )\r
+                       {\r
+                               uip_arp_arpin();\r
+\r
+                               /* If the above function invocation resulted in data that\r
+                               should be sent out on the network, the global variable\r
+                               uip_len is set to a value > 0. */\r
+                               if( uip_len > 0 )\r
+                               {\r
+                                       prvENET_Send();\r
+                               }\r
+                       }\r
+               }\r
+               else\r
+               {\r
+                       if( timer_expired( &periodic_timer ) )\r
+                       {\r
+                               timer_reset( &periodic_timer );\r
+                               for( i = 0; i < UIP_CONNS; i++ )\r
+                               {\r
+                                       uip_periodic( i );\r
+       \r
+                                       /* If the above function invocation resulted in data that\r
+                                       should be sent out on the network, the global variable\r
+                                       uip_len is set to a value > 0. */\r
+                                       if( uip_len > 0 )\r
+                                       {\r
+                                               uip_arp_out();\r
+                                               prvENET_Send();\r
+                                       }\r
+                               }       \r
+       \r
+                               /* Call the ARP timer function every 10 seconds. */\r
+                               if( timer_expired( &arp_timer ) )\r
+                               {\r
+                                       timer_reset( &arp_timer );\r
+                                       uip_arp_timer();\r
+                               }\r
+                       }\r
+                       else\r
+                       {                       \r
+                               /* We did not receive a packet, and there was no periodic\r
+                               processing to perform.  Block for a fixed period.  If a packet\r
+                               is received during this period we will be woken by the ISR\r
+                               giving us the Semaphore. */\r
+                               xSemaphoreTake( xEMACSemaphore, configTICK_RATE_HZ / 2 );                       \r
+                       }\r
+               }\r
+       }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvENET_Send(void)\r
+{\r
+       vInitialiseSend();\r
+       vIncrementTxLength( uip_len );\r
+       vSendBufferToMAC();\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvSetMACAddress( void )\r
+{\r
+unsigned portLONG ulUser0, ulUser1;\r
+unsigned char pucMACArray[8];\r
+struct uip_eth_addr xAddr;\r
+\r
+       /* Get the device MAC address from flash */\r
+    FlashUserGet(&ulUser0, &ulUser1);\r
+\r
+       /* Convert the MAC address from flash into sequence of bytes. */\r
+    pucMACArray[0] = ((ulUser0 >>  0) & 0xff);\r
+    pucMACArray[1] = ((ulUser0 >>  8) & 0xff);\r
+    pucMACArray[2] = ((ulUser0 >> 16) & 0xff);\r
+    pucMACArray[3] = ((ulUser1 >>  0) & 0xff);\r
+    pucMACArray[4] = ((ulUser1 >>  8) & 0xff);\r
+    pucMACArray[5] = ((ulUser1 >> 16) & 0xff);\r
+\r
+       /* Program the MAC address. */\r
+    EthernetMACAddrSet(ETH_BASE, pucMACArray);\r
+\r
+       xAddr.addr[ 0 ] = pucMACArray[0];\r
+       xAddr.addr[ 1 ] = pucMACArray[1];\r
+       xAddr.addr[ 2 ] = pucMACArray[2];\r
+       xAddr.addr[ 3 ] = pucMACArray[3];\r
+       xAddr.addr[ 4 ] = pucMACArray[4];\r
+       xAddr.addr[ 5 ] = pucMACArray[5];\r
+       uip_setethaddr( xAddr );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vApplicationProcessFormInput( portCHAR *pcInputString, portBASE_TYPE xInputLength )\r
+{\r
+char *c, *pcText;\r
+static portCHAR cMessageForDisplay[ 32 ];\r
+extern xQueueHandle xOLEDQueue;\r
+xOLEDMessage xOLEDMessage;\r
+\r
+       /* Process the form input sent by the IO page of the served HTML. */\r
+\r
+       c = strstr( pcInputString, "?" );\r
+\r
+    if( c )\r
+    {\r
+               /* Turn LED's on or off in accordance with the check box status. */\r
+               if( strstr( c, "LED0=1" ) != NULL )\r
+               {\r
+                       vParTestSetLED( 0, 1 );\r
+               }\r
+               else\r
+               {\r
+                       vParTestSetLED( 0, 0 );\r
+               }               \r
+               \r
+               /* Find the start of the text to be displayed on the LCD. */\r
+        pcText = strstr( c, "LCD=" );\r
+        pcText += strlen( "LCD=" );\r
+\r
+        /* Terminate the file name for further processing within uIP. */\r
+        *c = 0x00;\r
+\r
+        /* Terminate the LCD string. */\r
+        c = strstr( pcText, " " );\r
+        if( c != NULL )\r
+        {\r
+            *c = 0x00;\r
+        }\r
+\r
+        /* Add required spaces. */\r
+        while( ( c = strstr( pcText, "+" ) ) != NULL )\r
+        {\r
+            *c = ' ';\r
+        }\r
+\r
+        /* Write the message to the LCD. */\r
+               strcpy( cMessageForDisplay, pcText );\r
+               xOLEDMessage.pcMessage = cMessageForDisplay;\r
+        xQueueSend( xOLEDQueue, &xOLEDMessage, portMAX_DELAY );\r
+    }\r
+}\r
+\r

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/uip-conf.h b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/uip-conf.h
new file mode 100644 (file)
index 0000000..455540d
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/uip-conf.h
@@ -0,0 +1,159 @@
+/**\r
+ * \addtogroup uipopt\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * \name Project-specific configuration options\r
+ * @{\r
+ *\r
+ * uIP has a number of configuration options that can be overridden\r
+ * for each project. These are kept in a project-specific uip-conf.h\r
+ * file and all configuration names have the prefix UIP_CONF.\r
+ */\r
+\r
+/*\r
+ * Copyright (c) 2006, Swedish Institute of Computer Science.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions\r
+ * are met:\r
+ * 1. Redistributions of source code must retain the above copyright\r
+ *    notice, this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright\r
+ *    notice, this list of conditions and the following disclaimer in the\r
+ *    documentation and/or other materials provided with the distribution.\r
+ * 3. Neither the name of the Institute nor the names of its contributors\r
+ *    may be used to endorse or promote products derived from this software\r
+ *    without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND\r
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE\r
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\r
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY\r
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF\r
+ * SUCH DAMAGE.\r
+ *\r
+ * This file is part of the uIP TCP/IP stack\r
+ *\r
+ * $Id: uip-conf.h,v 1.6 2006/06/12 08:00:31 adam Exp $\r
+ */\r
+\r
+/**\r
+ * \file\r
+ *         An example uIP configuration file\r
+ * \author\r
+ *         Adam Dunkels <adam@sics.se>\r
+ */\r
+\r
+#ifndef __UIP_CONF_H__\r
+#define __UIP_CONF_H__\r
+\r
+#include <stdint.h>\r
+\r
+/**\r
+ * 8 bit datatype\r
+ *\r
+ * This typedef defines the 8-bit type used throughout uIP.\r
+ *\r
+ * \hideinitializer\r
+ */\r
+typedef uint8_t u8_t;\r
+\r
+/**\r
+ * 16 bit datatype\r
+ *\r
+ * This typedef defines the 16-bit type used throughout uIP.\r
+ *\r
+ * \hideinitializer\r
+ */\r
+typedef uint16_t u16_t;\r
+\r
+/**\r
+ * Statistics datatype\r
+ *\r
+ * This typedef defines the dataype used for keeping statistics in\r
+ * uIP.\r
+ *\r
+ * \hideinitializer\r
+ */\r
+typedef unsigned short uip_stats_t;\r
+\r
+/**\r
+ * Maximum number of TCP connections.\r
+ *\r
+ * \hideinitializer\r
+ */\r
+#define UIP_CONF_MAX_CONNECTIONS 40\r
+\r
+/**\r
+ * Maximum number of listening TCP ports.\r
+ *\r
+ * \hideinitializer\r
+ */\r
+#define UIP_CONF_MAX_LISTENPORTS 40\r
+\r
+/**\r
+ * uIP buffer size.\r
+ *\r
+ * \hideinitializer\r
+ */\r
+#define UIP_CONF_BUFFER_SIZE     1480\r
+\r
+/**\r
+ * CPU byte order.\r
+ *\r
+ * \hideinitializer\r
+ */\r
+#define UIP_CONF_BYTE_ORDER      LITTLE_ENDIAN\r
+\r
+/**\r
+ * Logging on or off\r
+ *\r
+ * \hideinitializer\r
+ */\r
+#define UIP_CONF_LOGGING         0\r
+\r
+/**\r
+ * UDP support on or off\r
+ *\r
+ * \hideinitializer\r
+ */\r
+#define UIP_CONF_UDP             0\r
+\r
+/**\r
+ * UDP checksums on or off\r
+ *\r
+ * \hideinitializer\r
+ */\r
+#define UIP_CONF_UDP_CHECKSUMS   1\r
+\r
+/**\r
+ * uIP statistics on or off\r
+ *\r
+ * \hideinitializer\r
+ */\r
+#define UIP_CONF_STATISTICS      1\r
+\r
+/* Here we include the header file for the application(s) we use in\r
+   our project. */\r
+/*#include "smtp.h"*/\r
+/*#include "hello-world.h"*/\r
+/*#include "telnetd.h"*/\r
+#include "webserver.h"\r
+/*#include "dhcpc.h"*/\r
+/*#include "resolv.h"*/\r
+/*#include "webclient.h"*/\r
+\r
+#define UIP_CONF_EXTERNAL_BUFFER\r
+\r
+#endif /* __UIP_CONF_H__ */\r
+\r
+/** @} */\r
+/** @} */\r

diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/webserver.h b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/webserver.h
new file mode 100644 (file)
index 0000000..1acb290
--- /dev/null
+++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/webserver.h
@@ -0,0 +1,49 @@
+/*\r
+ * Copyright (c) 2002, Adam Dunkels.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions\r
+ * are met:\r
+ * 1. Redistributions of source code must retain the above copyright\r
+ *    notice, this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above\r
+ *    copyright notice, this list of conditions and the following\r
+ *    disclaimer in the documentation and/or other materials provided\r
+ *    with the distribution.\r
+ * 3. The name of the author may not be used to endorse or promote\r
+ *    products derived from this software without specific prior\r
+ *    written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS\r
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\r
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY\r
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE\r
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\r
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,\r
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\r
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+ * This file is part of the uIP TCP/IP stack\r
+ *\r
+ * $Id: webserver.h,v 1.2 2006/06/11 21:46:38 adam Exp $\r
+ *\r
+ */\r
+#ifndef __WEBSERVER_H__\r
+#define __WEBSERVER_H__\r
+\r
+#include "httpd.h"\r
+\r
+typedef struct httpd_state uip_tcp_appstate_t;\r
+/* UIP_APPCALL: the name of the application function. This function\r
+   must return void and take no arguments (i.e., C type "void\r
+   appfunc(void)"). */\r
+#ifndef UIP_APPCALL\r
+#define UIP_APPCALL     httpd_appcall\r
+#endif\r
+\r
+\r
+#endif /* __WEBSERVER_H__ */\r

diff --git a/Demo/CORTEX_STM32F103_IAR/FreeRTOSConfig.h b/Demo/CORTEX_STM32F103_IAR/FreeRTOSConfig.h
index e51b352b6c67a898042b972031a603fba7b3bbb8..e572b8d96bb7cdea4e36c948507a96b33b27c766 100644 (file)
--- a/Demo/CORTEX_STM32F103_IAR/FreeRTOSConfig.h
+++ b/Demo/CORTEX_STM32F103_IAR/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/CORTEX_STM32F103_IAR/ParTest/ParTest.c b/Demo/CORTEX_STM32F103_IAR/ParTest/ParTest.c
index 87cb631c11fb1482d4b67695fbcebda6f9a2d827..e266ae6d9225381a73779facd3eafefd7831965e 100644 (file)
--- a/Demo/CORTEX_STM32F103_IAR/ParTest/ParTest.c
+++ b/Demo/CORTEX_STM32F103_IAR/ParTest/ParTest.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/CORTEX_STM32F103_IAR/main.c b/Demo/CORTEX_STM32F103_IAR/main.c
index c55a2b7b225dad064687ca223c9b50925c32dc2f..b8a803161ea9c21149e5bac587176841e5240a2c 100644 (file)
--- a/Demo/CORTEX_STM32F103_IAR/main.c
+++ b/Demo/CORTEX_STM32F103_IAR/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/CORTEX_STM32F103_IAR/serial/serial.c b/Demo/CORTEX_STM32F103_IAR/serial/serial.c
index 8b19d668ad98d354935dda38a6459dd3f3d62047..31a7c32bb2572e74760485fd8281ecbcd7265338 100644 (file)
--- a/Demo/CORTEX_STM32F103_IAR/serial/serial.c
+++ b/Demo/CORTEX_STM32F103_IAR/serial/serial.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS distribution.\r
 \r

diff --git a/Demo/CORTEX_STM32F103_IAR/timertest.c b/Demo/CORTEX_STM32F103_IAR/timertest.c
index c176f48f3bc6e5b2a099eaaf2bb866b376e4918f..e1b434e1d23b4726628445381af796130d3ec9df 100644 (file)
--- a/Demo/CORTEX_STM32F103_IAR/timertest.c
+++ b/Demo/CORTEX_STM32F103_IAR/timertest.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Common/Full/BlockQ.c b/Demo/Common/Full/BlockQ.c
index e7688ae33540527277365d6e556421c6de6eb8fc..2eedb5c2ab590ae3a9c1dea35c5dd4a5e7656b90 100644 (file)
--- a/Demo/Common/Full/BlockQ.c
+++ b/Demo/Common/Full/BlockQ.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Common/Full/PollQ.c b/Demo/Common/Full/PollQ.c
index cfd1cba37ba23ed842825966669402ef30dea532..63437387fabdc6da3528cab91340924515bc5481 100644 (file)
--- a/Demo/Common/Full/PollQ.c
+++ b/Demo/Common/Full/PollQ.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Common/Full/comtest.c b/Demo/Common/Full/comtest.c
index 90dd8320abd3fe15467d668351390580717bbbfd..ba14a0496b2eced1f5f78ca80a941fe694a9375d 100644 (file)
--- a/Demo/Common/Full/comtest.c
+++ b/Demo/Common/Full/comtest.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Common/Full/death.c b/Demo/Common/Full/death.c
index 7b0f8701c7e3befea437474a2558e605ea4c38f1..951b5b3e87685182a713b5f920e58b0e03558a12 100644 (file)
--- a/Demo/Common/Full/death.c
+++ b/Demo/Common/Full/death.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Common/Full/dynamic.c b/Demo/Common/Full/dynamic.c
index 454e7524ac53dc705c9ad368611d4a8897449e9f..b959b0ae622fe8a304422b5c1e809c1fc5482f3e 100644 (file)
--- a/Demo/Common/Full/dynamic.c
+++ b/Demo/Common/Full/dynamic.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Common/Full/events.c b/Demo/Common/Full/events.c
index ab39bacfdad30f277b3c0e7319cd93edd3bb3e37..351fa32dfb4dbfbd0326e128768aedcd4a7dfb71 100644 (file)
--- a/Demo/Common/Full/events.c
+++ b/Demo/Common/Full/events.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Common/Full/flash.c b/Demo/Common/Full/flash.c
index 30c51bb73679b73e456fefdb0f18da2fa588f2b5..5b43e9a4be8299d9d94c1b7ba818d9fb2bd93b97 100644 (file)
--- a/Demo/Common/Full/flash.c
+++ b/Demo/Common/Full/flash.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Common/Full/flop.c b/Demo/Common/Full/flop.c
index 9edb6468ced1cd74220c6bdc0417c166eb6e3fe5..229d946636aa229b097dc7c0e90bcd4ff2ceb918 100644 (file)
--- a/Demo/Common/Full/flop.c
+++ b/Demo/Common/Full/flop.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Common/Full/integer.c b/Demo/Common/Full/integer.c
index 375b307fc82b2bacfae2dc20d62c4d65409e3afe..47bec204747eb56d9b1340c1f7ff27f4b1cf1e4f 100644 (file)
--- a/Demo/Common/Full/integer.c
+++ b/Demo/Common/Full/integer.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Common/Full/print.c b/Demo/Common/Full/print.c
index 444088c6c2a72f1b4f0184c9d664650fa771d958..3d5accd6a2819df915f6ce4c44153989d1750e66 100644 (file)
--- a/Demo/Common/Full/print.c
+++ b/Demo/Common/Full/print.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Common/Full/semtest.c b/Demo/Common/Full/semtest.c
index f0ad9ce0bcf478e9b9c61880dafe2ce63f0dcd6d..5dcdbf8499a2c572de1a84d0032a5b77531a3cd7 100644 (file)
--- a/Demo/Common/Full/semtest.c
+++ b/Demo/Common/Full/semtest.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Common/Minimal/BlockQ.c b/Demo/Common/Minimal/BlockQ.c
index 2e0ebf5639f39791325bfba6c702777c41ba492e..f4c94bd0d477c4773c648063d805f0b81856618e 100644 (file)
--- a/Demo/Common/Minimal/BlockQ.c
+++ b/Demo/Common/Minimal/BlockQ.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Common/Minimal/GenQTest.c b/Demo/Common/Minimal/GenQTest.c
index 275b814d3348b35f3dcc4de1e92b0b131194ac2f..1c64d0c4733c99f28a2e26828d14150c003214ae 100644 (file)
--- a/Demo/Common/Minimal/GenQTest.c
+++ b/Demo/Common/Minimal/GenQTest.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Common/Minimal/PollQ.c b/Demo/Common/Minimal/PollQ.c
index fad5af1d98df268c5c3b7188965f44e089e9cd36..247b9662a2cbf58389790f5a130bb75a75ff3459 100644 (file)
--- a/Demo/Common/Minimal/PollQ.c
+++ b/Demo/Common/Minimal/PollQ.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Common/Minimal/QPeek.c b/Demo/Common/Minimal/QPeek.c
index c36e515106602145297830b4d11e4dc8459618fa..3cd2526d848502476fd6a8adc548747db12196f4 100644 (file)
--- a/Demo/Common/Minimal/QPeek.c
+++ b/Demo/Common/Minimal/QPeek.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r
@@ -96,10 +96,10 @@ xQueueHandle xQueue;
        /* Create the demo tasks and pass it the queue just created.  We are\r
        passing the queue handle by value so it does not matter that it is declared\r
        on the stack here. */\r
-       xTaskCreate( prvLowPriorityPeekTask, "PeekLow", configMINIMAL_STACK_SIZE, ( void * ) xQueue, qpeekLOW_PRIORITY, NULL );\r
-       xTaskCreate( prvMediumPriorityPeekTask, "PeekMed", configMINIMAL_STACK_SIZE, ( void * ) xQueue, qpeekMEDIUM_PRIORITY, &xMediumPriorityTask );\r
-       xTaskCreate( prvHighPriorityPeekTask, "PeekHigh", configMINIMAL_STACK_SIZE, ( void * ) xQueue, qpeekHIGH_PRIORITY, &xHighPriorityTask );\r
-       xTaskCreate( prvHighestPriorityPeekTask, "PeekHighest", configMINIMAL_STACK_SIZE, ( void * ) xQueue, qpeekHIGHEST_PRIORITY, &xHighestPriorityTask );\r
+       xTaskCreate( prvLowPriorityPeekTask, "PeekL", configMINIMAL_STACK_SIZE, ( void * ) xQueue, qpeekLOW_PRIORITY, NULL );\r
+       xTaskCreate( prvMediumPriorityPeekTask, "PeekM", configMINIMAL_STACK_SIZE, ( void * ) xQueue, qpeekMEDIUM_PRIORITY, &xMediumPriorityTask );\r
+       xTaskCreate( prvHighPriorityPeekTask, "PeekH1", configMINIMAL_STACK_SIZE, ( void * ) xQueue, qpeekHIGH_PRIORITY, &xHighPriorityTask );\r
+       xTaskCreate( prvHighestPriorityPeekTask, "PeekH2", configMINIMAL_STACK_SIZE, ( void * ) xQueue, qpeekHIGHEST_PRIORITY, &xHighestPriorityTask );\r
 }\r
 /*-----------------------------------------------------------*/\r
 \r

diff --git a/Demo/Common/Minimal/blocktim.c b/Demo/Common/Minimal/blocktim.c
index e1e74d5e1a0216a4b5a0b62168e521680f7ac4b6..34b5a45ea337aa0fae8a3e6ee7d77a63f3770472 100644 (file)
--- a/Demo/Common/Minimal/blocktim.c
+++ b/Demo/Common/Minimal/blocktim.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Common/Minimal/comtest.c b/Demo/Common/Minimal/comtest.c
index 3d9c28a3266a36a58ccd71642ed8f345622ba3ec..e291beef3c0ed8c04241f12628436986bf3f5022 100644 (file)
--- a/Demo/Common/Minimal/comtest.c
+++ b/Demo/Common/Minimal/comtest.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Common/Minimal/crflash.c b/Demo/Common/Minimal/crflash.c
index f5bf9387ce0d3bb8cd46089f36f3ef648476eda3..7bf4c20bf63d1e20a943b1faabe352d94de1226b 100644 (file)
--- a/Demo/Common/Minimal/crflash.c
+++ b/Demo/Common/Minimal/crflash.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Common/Minimal/crhook.c b/Demo/Common/Minimal/crhook.c
index e58854ed2d200d3eba86603775b7b369cc12f87e..982d32f8ce581e38c831d8fc736e037d869295fa 100644 (file)
--- a/Demo/Common/Minimal/crhook.c
+++ b/Demo/Common/Minimal/crhook.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Common/Minimal/death.c b/Demo/Common/Minimal/death.c
index d59ffec1105ccd7f381e224fc8b9b9291fa3cc4f..084c4a58be4cebdc504bb9fd9e5662a36de4e8c5 100644 (file)
--- a/Demo/Common/Minimal/death.c
+++ b/Demo/Common/Minimal/death.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Common/Minimal/dynamic.c b/Demo/Common/Minimal/dynamic.c
index 6298889081e904da9011739f9f17d9e3f36b5a8b..5d664732882a077cfc42c019e807723ebeefe81c 100644 (file)
--- a/Demo/Common/Minimal/dynamic.c
+++ b/Demo/Common/Minimal/dynamic.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r
@@ -114,7 +114,7 @@ static portTASK_FUNCTION_PROTO( vQueueSendWhenSuspendedTask, pvParameters );
 \r
 /* Demo task specific constants. */\r
 #define priSTACK_SIZE                          ( configMINIMAL_STACK_SIZE )\r
-#define priSLEEP_TIME                          ( ( portTickType ) 128 )\r
+#define priSLEEP_TIME                          ( ( portTickType ) 128 / portTICK_RATE_MS )\r
 #define priLOOPS                                       ( 5 )\r
 #define priMAX_COUNT                           ( ( unsigned portLONG ) 0xff )\r
 #define priNO_BLOCK                                    ( ( portTickType ) 0 )\r

diff --git a/Demo/Common/Minimal/flash.c b/Demo/Common/Minimal/flash.c
index 95bde4040c6c042488dd5aeec4afa59d7b599038..370596eced36cf69eefa5d3d3c6b7e68fb1b8c43 100644 (file)
--- a/Demo/Common/Minimal/flash.c
+++ b/Demo/Common/Minimal/flash.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Common/Minimal/flop.c b/Demo/Common/Minimal/flop.c
index 879e3e081e2456fb6693dd073ef2689144fc2442..28ba567235bf54afa72e45856925af022d4c5754 100644 (file)
--- a/Demo/Common/Minimal/flop.c
+++ b/Demo/Common/Minimal/flop.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Common/Minimal/integer.c b/Demo/Common/Minimal/integer.c
index 638e3c0d0d7b0199e9f1351104904e6098a7be8e..ef82278a3f0a45df0b1269a7a25711a697545c8e 100644 (file)
--- a/Demo/Common/Minimal/integer.c
+++ b/Demo/Common/Minimal/integer.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Common/Minimal/semtest.c b/Demo/Common/Minimal/semtest.c
index f0855e7cb9a86fd896b2df8197f8cd374a3807f9..8e482c5c269901bbcf46b35aa24b8fb36a45cc66 100644 (file)
--- a/Demo/Common/Minimal/semtest.c
+++ b/Demo/Common/Minimal/semtest.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Common/drivers/LuminaryMicro/EULA.txt b/Demo/Common/drivers/LuminaryMicro/EULA.txt
new file mode 100644 (file)
index 0000000..e282076
--- /dev/null
+++ b/Demo/Common/drivers/LuminaryMicro/EULA.txt
@@ -0,0 +1,131 @@
+IMPORTANT. Read the following LMI Software License Agreement ("Agreement")\r
+completely.\r
+\r
+In summary, this license agreement allows you to use this software only on\r
+Luminary Micro microcontrollers, on an as-is basis, with no warranties.\r
+\r
+LUMINARY MICRO SOFTWARE LICENSE AGREEMENT\r
+\r
+This is a legal agreement between you (either as an individual or as an\r
+authorized representative of your employer) and Luminary Micro, Inc. ("LMI").\r
+It concerns your rights to use this file and any accompanying written materials\r
+(the "Software"). In consideration for LMI allowing you to access the Software,\r
+you are agreeing to be bound by the terms of this Agreement. If you do not\r
+agree to all of the terms of this Agreement, do not download the Software. If\r
+you change your mind later, stop using the Software and delete all copies of\r
+the Software in your possession or control. Any copies of the Software that you\r
+have already distributed, where permitted, and do not destroy will continue to\r
+be governed by this Agreement. Your prior use will also continue to be governed\r
+by this Agreement.\r
+\r
+1. LICENSE GRANT. LMI grants to you, free of charge, the non-exclusive,\r
+non-transferable right (1) to use the Software solely and exclusively on LMI's\r
+microcontroller products, (2) to reproduce the Software, (3) to prepare\r
+derivative works of the Software, (4) to distribute the Software and derivative\r
+works thereof in source (human-readable) form and object (machine-readable)\r
+form, and (5) to sublicense to others the right to use the distributed\r
+Software. If you violate any of the terms or restrictions of this Agreement,\r
+LMI may immediately terminate this Agreement, and require that you stop using\r
+and delete all copies of the Software in your possession or control.\r
+\r
+2. COPYRIGHT. The Software is licensed to you, not sold. LMI owns the Software,\r
+and United States copyright laws and international treaty provisions protect\r
+the Software. Therefore, you must treat the Software like any other copyrighted\r
+material (e.g. a book or musical recording). You may not use or copy the\r
+Software for any other purpose than what is described in this Agreement. Except\r
+as expressly provided herein, LMI does not grant to you any express or implied\r
+rights under any LMI or third-party patents, copyrights, trademarks, or trade\r
+secrets. Additionally, you must reproduce and apply any copyright or other\r
+proprietary rights notices included on or embedded in the Software to any\r
+copies or derivative works made thereof, in whole or in part, if any.\r
+\r
+3. SUPPORT. LMI is NOT obligated to provide any support, upgrades or new\r
+releases of the Software. If you wish, you may contact LMI and report problems\r
+and provide suggestions regarding the Software. LMI has no obligation\r
+whatsoever to respond in any way to such a problem report or suggestion. LMI\r
+may make changes to the Software at any time, without any obligation to notify\r
+or provide updated versions of the Software to you.\r
+\r
+4. INDEMNITY. You agree to fully defend and indemnify LMI from any and all\r
+claims, liabilities, and costs (including reasonable attorney's fees) related\r
+to (1) your use (including your sub-licensee's use, if permitted) of the\r
+Software or (2) your violation of the terms and conditions of this Agreement.\r
+\r
+5. HIGH RISK ACTIVITIES. You acknowledge that the Software is not fault\r
+tolerant and is not designed, manufactured or intended by LMI for incorporation\r
+into products intended for use or resale in on-line control equipment in\r
+hazardous, dangerous to life or potentially life-threatening environments\r
+requiring fail-safe performance, such as in the operation of nuclear\r
+facilities, aircraft navigation or communication systems, air traffic control,\r
+direct life support machines or weapons systems, in which the failure of\r
+products could lead directly to death, personal injury or severe physical or\r
+environmental damage ("High Risk Activities"). You specifically represent and\r
+warrant that you will not use the Software or any derivative work of the\r
+Software for High Risk Activities.\r
+\r
+6. PRODUCT LABELING. You are not authorized to use any LMI trademarks, brand\r
+names, or logos.\r
+\r
+7. COMPLIANCE WITH LAWS; EXPORT RESTRICTIONS. You must use the Software in\r
+accordance with all applicable U.S. laws, regulations and statutes. You agree\r
+that neither you nor your licensees (if any) intend to or will, directly or\r
+indirectly, export or transmit the Software to any country in violation of U.S.\r
+export restrictions.\r
+\r
+8. GOVERNMENT USE. Use of the Software and any corresponding documentation, if\r
+any, is provided with RESTRICTED RIGHTS. Use, duplication or disclosure by the\r
+Government is subject to restrictions as set forth in subparagraph (c)(1)(ii)\r
+of The Rights in Technical Data and Computer Software clause at DFARS\r
+252.227-7013 or subparagraphs (c)(l) and (2) of the Commercial Computer\r
+Software--Restricted Rights at 48 CFR 52.227-19, as applicable. Manufacturer is\r
+Luminary Micro, Inc., 108 Wild Basin Road, Ste 350, Austin, Texas 78746.\r
+\r
+9. DISCLAIMER OF WARRANTY. TO THE MAXIMUM EXTENT PERMITTED BY LAW, LMI\r
+EXPRESSLY DISCLAIMS ANY WARRANTY FOR THE SOFTWARE. THE SOFTWARE IS PROVIDED "AS\r
+IS", WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING,\r
+WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A\r
+PARTICULAR PURPOSE, OR NON-INFRINGEMENT. YOU ASSUME THE ENTIRE RISK ARISING OUT\r
+OF THE USE OR PERFORMANCE OF THE SOFTWARE, OR ANY SYSTEMS YOU DESIGN USING THE\r
+SOFTWARE (IF ANY). NOTHING IN THIS AGREEMENT MAY BE CONSTRUED AS A WARRANTY OR\r
+REPRESENTATION BY LMI THAT THE SOFTWARE OR ANY DERIVATIVE WORK DEVELOPED WITH\r
+OR INCORPORATING THE SOFTWARE WILL BE FREE FROM INFRINGEMENT OF THE\r
+INTELLECTUAL PROPERTY RIGHTS OF THIRD PARTIES.\r
+\r
+10. LIMITATION OF LIABILITY. IN NO EVENT WILL LMI BE LIABLE, WHETHER IN\r
+CONTRACT, TORT, OR OTHERWISE, FOR ANY INCIDENTAL, SPECIAL, INDIRECT,\r
+CONSEQUENTIAL OR PUNITIVE DAMAGES, INCLUDING, BUT NOT LIMITED TO, DAMAGES FOR\r
+ANY LOSS OF USE, LOSS OF TIME, INCONVENIENCE, COMMERCIAL LOSS, OR LOST PROFITS,\r
+SAVINGS, OR REVENUES TO THE FULL EXTENT SUCH MAY BE DISCLAIMED BY LAW.\r
+\r
+11. CHOICE OF LAW; VENUE; LIMITATIONS. You agree that the statutes and laws of\r
+the United States and the State of Texas, USA, without regard to conflicts of\r
+laws principles, will apply to all matters relating to this Agreement or the\r
+Software, and you agree that any litigation will be subject to the exclusive\r
+jurisdiction of the state or federal courts in Austin, Travis County, Texas,\r
+USA. You agree that regardless of any statute or law to the contrary, any claim\r
+or cause of action arising out of or related to this Agreement or the Software\r
+must be filed within one (1) year after such claim or cause of action arose or\r
+be forever barred. YOU EXPRESSLY AGREE THAT YOU WAIVE YOUR INDIVIDUAL RIGHT TO\r
+A TRIAL BY JURY IN ANY COURT OF COMPETENT JURISDICTION FOR ANY ACTION, DISPUTE,\r
+CLAIM, OR CONTROVERSY CONCERNING THIS AGREEMENT OR FOR ANY ACTION, DISPUTE,\r
+CLAIM, OR CONTROVERSY ARISING OUT OF OR RELATING TO ANY INTERPRETATION,\r
+CONSTRUCTION, PERFORMANCE OR BREACH OF THIS AGREEMENT.\r
+\r
+12. ENTIRE AGREEMENT. This Agreement constitutes the entire agreement between\r
+you and LMI regarding the subject matter of this Agreement, and supersedes all\r
+prior communications, negotiations, understandings, agreements or\r
+representations, either written or oral, if any. This Agreement may only be\r
+amended in written form, executed by you and LMI.\r
+\r
+13. SEVERABILITY. If any provision of this Agreement is held for any reason to\r
+be invalid or unenforceable, then the remaining provisions of this Agreement\r
+will be unimpaired and, unless a modification or replacement of the invalid or\r
+unenforceable provision is further held to deprive you or LMI of a material\r
+benefit, in which case the Agreement will immediately terminate, the invalid or\r
+unenforceable provision will be replaced with a provision that is valid and\r
+enforceable and that comes closest to the intention underlying the invalid or\r
+unenforceable provision.\r
+\r
+14. NO WAIVER. The waiver by LMI of any breach of any provision of this\r
+Agreement will not operate or be construed as a waiver of any other or a\r
+subsequent breach of the same or a different provision.\r

diff --git a/Demo/Common/drivers/LuminaryMicro/IAR/driverlib.r79 b/Demo/Common/drivers/LuminaryMicro/IAR/driverlib.r79
new file mode 100644 (file)
index 0000000..c471c60
Binary files /dev/null and b/Demo/Common/drivers/LuminaryMicro/IAR/driverlib.r79 differ

diff --git a/Demo/Common/drivers/LuminaryMicro/Keil/driverlib.lib b/Demo/Common/drivers/LuminaryMicro/Keil/driverlib.lib
new file mode 100644 (file)
index 0000000..f5ab521
Binary files /dev/null and b/Demo/Common/drivers/LuminaryMicro/Keil/driverlib.lib differ

diff --git a/Demo/Common/drivers/LuminaryMicro/adc.h b/Demo/Common/drivers/LuminaryMicro/adc.h
new file mode 100644 (file)
index 0000000..d8239b7
--- /dev/null
+++ b/Demo/Common/drivers/LuminaryMicro/adc.h
@@ -0,0 +1,130 @@
+//*****************************************************************************\r
+//\r
+// adc.h - ADC headers for using the ADC driver functions.\r
+//\r
+// Copyright (c) 2005-2007 Luminary Micro, Inc.  All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1582 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+#ifndef __ADC_H__\r
+#define __ADC_H__\r
+\r
+#ifdef __cplusplus\r
+extern "C"\r
+{\r
+#endif\r
+\r
+//*****************************************************************************\r
+//\r
+// Values that can be passed to ADCSequenceConfigure as the ulTrigger\r
+// parameter.\r
+//\r
+//*****************************************************************************\r
+#define ADC_TRIGGER_PROCESSOR   0x00000000  // Processor event\r
+#define ADC_TRIGGER_COMP0       0x00000001  // Analog comparator 0 event\r
+#define ADC_TRIGGER_COMP1       0x00000002  // Analog comparator 1 event\r
+#define ADC_TRIGGER_COMP2       0x00000003  // Analog comparator 2 event\r
+#define ADC_TRIGGER_EXTERNAL    0x00000004  // External event\r
+#define ADC_TRIGGER_TIMER       0x00000005  // Timer event\r
+#define ADC_TRIGGER_PWM0        0x00000006  // PWM0 event\r
+#define ADC_TRIGGER_PWM1        0x00000007  // PWM1 event\r
+#define ADC_TRIGGER_PWM2        0x00000008  // PWM2 event\r
+#define ADC_TRIGGER_ALWAYS      0x0000000F  // Always event\r
+\r
+//*****************************************************************************\r
+//\r
+// Values that can be passed to ADCSequenceStepConfigure as the ulConfig\r
+// parameter.\r
+//\r
+//*****************************************************************************\r
+#define ADC_CTL_TS              0x00000080  // Temperature sensor select\r
+#define ADC_CTL_IE              0x00000040  // Interrupt enable\r
+#define ADC_CTL_END             0x00000020  // Sequence end select\r
+#define ADC_CTL_D               0x00000010  // Differential select\r
+#define ADC_CTL_CH0             0x00000000  // Input channel 0\r
+#define ADC_CTL_CH1             0x00000001  // Input channel 1\r
+#define ADC_CTL_CH2             0x00000002  // Input channel 2\r
+#define ADC_CTL_CH3             0x00000003  // Input channel 3\r
+#define ADC_CTL_CH4             0x00000004  // Input channel 4\r
+#define ADC_CTL_CH5             0x00000005  // Input channel 5\r
+#define ADC_CTL_CH6             0x00000006  // Input channel 6\r
+#define ADC_CTL_CH7             0x00000007  // Input channel 7\r
+\r
+//*****************************************************************************\r
+//\r
+// Prototypes for the APIs.\r
+//\r
+//*****************************************************************************\r
+extern void ADCIntRegister(unsigned long ulBase, unsigned long ulSequenceNum,\r
+                           void (*pfnHandler)(void));\r
+extern void ADCIntUnregister(unsigned long ulBase,\r
+                             unsigned long ulSequenceNum);\r
+extern void ADCIntDisable(unsigned long ulBase, unsigned long ulSequenceNum);\r
+extern void ADCIntEnable(unsigned long ulBase, unsigned long ulSequenceNum);\r
+extern unsigned long ADCIntStatus(unsigned long ulBase,\r
+                                  unsigned long ulSequenceNum,\r
+                                  tBoolean bMasked);\r
+extern void ADCIntClear(unsigned long ulBase, unsigned long ulSequenceNum);\r
+extern void ADCSequenceEnable(unsigned long ulBase,\r
+                              unsigned long ulSequenceNum);\r
+extern void ADCSequenceDisable(unsigned long ulBase,\r
+                               unsigned long ulSequenceNum);\r
+extern void ADCSequenceConfigure(unsigned long ulBase,\r
+                                 unsigned long ulSequenceNum,\r
+                                 unsigned long ulTrigger,\r
+                                 unsigned long ulPriority);\r
+extern void ADCSequenceStepConfigure(unsigned long ulBase,\r
+                                     unsigned long ulSequenceNum,\r
+                                     unsigned long ulStep,\r
+                                     unsigned long ulConfig);\r
+extern long ADCSequenceOverflow(unsigned long ulBase,\r
+                                unsigned long ulSequenceNum);\r
+extern void ADCSequenceOverflowClear(unsigned long ulBase,\r
+                                     unsigned long ulSequenceNum);\r
+extern long ADCSequenceUnderflow(unsigned long ulBase,\r
+                                 unsigned long ulSequenceNum);\r
+extern void ADCSequenceUnderflowClear(unsigned long ulBase,\r
+                                      unsigned long ulSequenceNum);\r
+extern long ADCSequenceDataGet(unsigned long ulBase,\r
+                               unsigned long ulSequenceNum,\r
+                               unsigned long *pulBuffer);\r
+extern void ADCProcessorTrigger(unsigned long ulBase,\r
+                                unsigned long ulSequenceNum);\r
+extern void ADCSoftwareOversampleConfigure(unsigned long ulBase,\r
+                                           unsigned long ulSequenceNum,\r
+                                           unsigned long ulFactor);\r
+extern void ADCSoftwareOversampleStepConfigure(unsigned long ulBase,\r
+                                               unsigned long ulSequenceNum,\r
+                                               unsigned long ulStep,\r
+                                               unsigned long ulConfig);\r
+extern void ADCSoftwareOversampleDataGet(unsigned long ulBase,\r
+                                         unsigned long ulSequenceNum,\r
+                                         unsigned long *pulBuffer,\r
+                                         unsigned long ulCount);\r
+extern void ADCHardwareOversampleConfigure(unsigned long ulBase,\r
+                                           unsigned long ulFactor);\r
+\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+\r
+#endif // __ADC_H__\r

diff --git a/Demo/Common/drivers/LuminaryMicro/arm-none-eabi-gcc/libdriver.a b/Demo/Common/drivers/LuminaryMicro/arm-none-eabi-gcc/libdriver.a
new file mode 100644 (file)
index 0000000..0464e5a
Binary files /dev/null and b/Demo/Common/drivers/LuminaryMicro/arm-none-eabi-gcc/libdriver.a differ

diff --git a/Demo/Common/drivers/LuminaryMicro/can.h b/Demo/Common/drivers/LuminaryMicro/can.h
new file mode 100644 (file)
index 0000000..0df5c45
--- /dev/null
+++ b/Demo/Common/drivers/LuminaryMicro/can.h
@@ -0,0 +1,441 @@
+//*****************************************************************************\r
+//\r
+// can.h - Defines and Macros for the CAN controller.\r
+//\r
+// Copyright (c) 2006-2007 Luminary Micro, Inc.  All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1582 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+#ifndef __CAN_H__\r
+#define __CAN_H__\r
+\r
+#ifdef __cplusplus\r
+extern "C"\r
+{\r
+#endif\r
+\r
+//*****************************************************************************\r
+//\r
+//! \addtogroup can_api\r
+//! @{\r
+//\r
+//*****************************************************************************\r
+\r
+//*****************************************************************************\r
+//\r
+// Miscellaneous defines for Message ID Types\r
+//\r
+//*****************************************************************************\r
+\r
+//*****************************************************************************\r
+//\r
+//! These are the flags used by the tCANMsgObject variable when calling the\r
+//! the CANMessageSet() and CANMessageGet() APIs.\r
+//\r
+//*****************************************************************************\r
+typedef enum\r
+{\r
+    //\r
+    //! This indicates that transmit interrupts should be enabled, or are\r
+    //! enabled.\r
+    //\r
+    MSG_OBJ_TX_INT_ENABLE =     0x00000001,\r
+\r
+    //\r
+    //! This indicates that receive interrupts should be enabled or are\r
+    //! enabled.\r
+    //\r
+    MSG_OBJ_RX_INT_ENABLE =     0x00000002,\r
+\r
+    //\r
+    //! This indicates that a message object will use or is using an extended\r
+    //! identifier.\r
+    //\r
+    MSG_OBJ_EXTENDED_ID =       0x00000004,\r
+\r
+    //\r
+    //! This indicates that a message object will use or is using filtering\r
+    //! based on the object's message Identifier.\r
+    //\r
+    MSG_OBJ_USE_ID_FILTER =     0x00000008,\r
+\r
+    //\r
+    //! This indicates that new data was available in the message object.\r
+    //\r
+    MSG_OBJ_NEW_DATA =          0x00000080,\r
+\r
+    //\r
+    //! This indicates that data was lost since this message object was last\r
+    //! read.\r
+    //\r
+    MSG_OBJ_DATA_LOST =         0x00000100,\r
+\r
+    //\r
+    //! This indicates that a message object will use or is using filtering\r
+    //! based on the direction of the transfer. If the direction filtering is\r
+    //! used then ID filtering must also be enabled.\r
+    //\r
+    MSG_OBJ_USE_DIR_FILTER =    (0x00000010 | MSG_OBJ_USE_ID_FILTER),\r
+\r
+    //\r
+    //! This indicates that a message object will use or is using message\r
+    //! identifier filtering based of the the extended identifier.\r
+    //! If the extended identifier filtering is used then ID filtering must\r
+    //! also be enabled.\r
+    //\r
+    MSG_OBJ_USE_EXT_FILTER =    (0x00000020 | MSG_OBJ_USE_ID_FILTER),\r
+\r
+    //\r
+    //! This indicates that a message object is a remote frame.\r
+    //\r
+    MSG_OBJ_REMOTE_FRAME =      0x00000040,\r
+\r
+    //\r
+    //! This indicates that a message object has no flags set.\r
+    //\r
+    MSG_OBJ_NO_FLAGS =          0x00000000\r
+}\r
+tCANObjFlags;\r
+\r
+//*****************************************************************************\r
+//\r
+//! This define is used with the #tCANObjFlags enumerated values to allow\r
+//! checking only status flags and not configuration flags.\r
+//\r
+//*****************************************************************************\r
+#define MSG_OBJ_STATUS_MASK     (MSG_OBJ_NEW_DATA | MSG_OBJ_DATA_LOST)\r
+\r
+//*****************************************************************************\r
+//\r
+//! This structure used for encapsulating all the items associated with a CAN\r
+//! message object in the CAN controller.\r
+//\r
+//*****************************************************************************\r
+typedef struct\r
+{\r
+    //\r
+    //! The CAN message identifier used for 11 or 29 bit identifiers.\r
+    //\r
+    unsigned long ulMsgID;\r
+\r
+    //\r
+    //! The message identifier mask used when identifier filtering is enabled.\r
+    //\r
+    unsigned long ulMsgIDMask;\r
+\r
+    //\r
+    //! This value holds various status flags and settings specified by\r
+    //! tCANObjFlags.\r
+    //\r
+    unsigned long ulFlags;\r
+\r
+    //\r
+    //! This value is the number of bytes of data in the message object.\r
+    //\r
+    unsigned long ulMsgLen;\r
+\r
+    //\r
+    //! This is a pointer to the message object's data.\r
+    //\r
+    unsigned char *pucMsgData;\r
+}\r
+tCANMsgObject;\r
+\r
+//*****************************************************************************\r
+//\r
+//! This structure is used for encapsulating the values associated with setting\r
+//! up the bit timing for a CAN controller. The structure is used when calling\r
+//! the CANGetBitTiming and CANSetBitTiming functions.\r
+//\r
+//*****************************************************************************\r
+typedef struct\r
+{\r
+    //\r
+    //! This value holds the sum of the Synchronization, Propagation, and Phase\r
+    //! Buffer 1 segments, measured in time quanta.  The valid values for this\r
+    //! setting range from 2 to 16.\r
+    //\r
+    unsigned int uSyncPropPhase1Seg;\r
+\r
+    //\r
+    //! This value holds the Phase Buffer 2 segment in time quanta. The valid\r
+    //! values for this setting range from 1 to 8.\r
+    //\r
+    unsigned int uPhase2Seg;\r
+\r
+    //\r
+    //! This value holds the Resynchronization Jump Width in time quanta. The\r
+    //! valid values for this setting range from 1 to 4.\r
+    //\r
+    unsigned int uSJW;\r
+\r
+    //\r
+    //! This value holds the CAN_CLK divider used to determine time quanta.\r
+    //! The valid values for this setting range from 1 to 1023.\r
+    //\r
+    unsigned int uQuantumPrescaler;\r
+\r
+}\r
+tCANBitClkParms;\r
+\r
+//*****************************************************************************\r
+//\r
+//! This data type is used to identify the interrupt status register.  This is\r
+//! used when calling the a CANIntStatus() function.\r
+//\r
+//*****************************************************************************\r
+typedef enum\r
+{\r
+    //\r
+    //! Read the CAN interrupt status information.\r
+    //\r
+    CAN_INT_STS_CAUSE,\r
+\r
+    //\r
+    //! Read a message object's interrupt status.\r
+    //\r
+    CAN_INT_STS_OBJECT\r
+}\r
+tCANIntStsReg;\r
+\r
+//*****************************************************************************\r
+//\r
+//! This data type is used to identify which of the several status registers\r
+//! to read when calling the CANStatusGet() function.\r
+//\r
+//*****************************************************************************\r
+typedef enum\r
+{\r
+    //\r
+    //! Read the full CAN controller status.\r
+    //\r
+    CAN_STS_CONTROL,\r
+\r
+    //\r
+    //! Read the full 32 bit mask of message objects with a transmit request\r
+    //! set.\r
+    //\r
+    CAN_STS_TXREQUEST,\r
+\r
+    //\r
+    //! Read the full 32 bit mask of message objects with a new data available.\r
+    //\r
+    CAN_STS_NEWDAT,\r
+\r
+    //\r
+    //! Read the full 32 bit mask of message objects that are enabled.\r
+    //\r
+    CAN_STS_MSGVAL\r
+}\r
+tCANStsReg;\r
+\r
+//*****************************************************************************\r
+//\r
+//! These definitions are used to specify interrupt sources to CANIntEnable()\r
+//! and CANIntDisable().\r
+//\r
+//*****************************************************************************\r
+typedef enum\r
+{\r
+    //\r
+    //! This flag is used to allow a CAN controller to generate error\r
+    //! interrupts.\r
+    //\r
+    CAN_INT_ERROR =             0x00000008,\r
+\r
+    //\r
+    //! This flag is used to allow a CAN controller to generate status\r
+    //! interrupts.\r
+    //\r
+    CAN_INT_STATUS =            0x00000004,\r
+\r
+    //\r
+    //! This flag is used to allow a CAN controller to generate any CAN\r
+    //! interrupts. If this is not set then no interrupts will be generated by\r
+    //! the CAN controller.\r
+    //\r
+    CAN_INT_MASTER =            0x00000002\r
+}\r
+tCANIntFlags;\r
+\r
+//*****************************************************************************\r
+//\r
+//! This definition is used to determine the type of message object that will\r
+//! be set up via a call to the CANMessageSet() API.\r
+//\r
+//*****************************************************************************\r
+typedef enum\r
+{\r
+    //\r
+    //! Transmit message object.\r
+    //\r
+    MSG_OBJ_TYPE_TX,\r
+\r
+    //\r
+    //! Transmit remote request message object\r
+    //\r
+    MSG_OBJ_TYPE_TX_REMOTE,\r
+\r
+    //\r
+    //! Receive message object.\r
+    //\r
+    MSG_OBJ_TYPE_RX,\r
+\r
+    //\r
+    //! Receive remote request message object.\r
+    //\r
+    MSG_OBJ_TYPE_RX_REMOTE,\r
+\r
+    //\r
+    //! Remote frame receive remote, with auto-transmit message object.\r
+    //\r
+    MSG_OBJ_TYPE_RXTX_REMOTE\r
+}\r
+tMsgObjType;\r
+\r
+//*****************************************************************************\r
+//\r
+//! The following enumeration contains all error or status indicators that\r
+//! can be returned when calling the CANStatusGet() API.\r
+//\r
+//*****************************************************************************\r
+typedef enum\r
+{\r
+    //\r
+    //! CAN controller has entered a Bus Off state.\r
+    //\r
+    CAN_STATUS_BUS_OFF =        0x00000080,\r
+\r
+    //\r
+    //! CAN controller error level has reached warning level.\r
+    //\r
+    CAN_STATUS_EWARN =          0x00000040,\r
+\r
+    //\r
+    //! CAN controller error level has reached error passive level.\r
+    //\r
+    CAN_STATUS_EPASS =          0x00000020,\r
+\r
+    //\r
+    //! A message was received successfully since the last read of this status.\r
+    //\r
+    CAN_STATUS_RXOK =           0x00000010,\r
+\r
+    //\r
+    //! A message was transmitted successfully since the last read of this\r
+    //! status.\r
+    //\r
+    CAN_STATUS_TXOK =           0x00000008,\r
+\r
+    //\r
+    //! This is the mask for the last error code field.\r
+    //\r
+    CAN_STATUS_LEC_MSK =        0x00000007,\r
+\r
+    //\r
+    //! There was no error.\r
+    //\r
+    CAN_STATUS_LEC_NONE =       0x00000000,\r
+\r
+    //\r
+    //! A bit stuffing error has occurred.\r
+    //\r
+    CAN_STATUS_LEC_STUFF =      0x00000001,\r
+\r
+    //\r
+    //! A formatting error has occurred.\r
+    //\r
+    CAN_STATUS_LEC_FORM =       0x00000002,\r
+\r
+    //\r
+    //! An acknowledge error has occurred.\r
+    //\r
+    CAN_STATUS_LEC_ACK =        0x00000003,\r
+\r
+    //\r
+    //! The bus remained a bit level of 1 for longer than is allowed.\r
+    //\r
+    CAN_STATUS_LEC_BIT1 =       0x00000004,\r
+\r
+    //\r
+    //! The bus remained a bit level of 0 for longer than is allowed.\r
+    //\r
+    CAN_STATUS_LEC_BIT0 =       0x00000005,\r
+\r
+    //\r
+    //! A CRC error has occurred.\r
+    //\r
+    CAN_STATUS_LEC_CRC =        0x00000006,\r
+\r
+    //\r
+    //! This is the mask for the CAN Last Error Code (LEC).\r
+    //\r
+    CAN_STATUS_LEC_MASK =       0x00000007\r
+}\r
+tCANStatusCtrl;\r
+\r
+//*****************************************************************************\r
+//\r
+// API Function prototypes\r
+//\r
+//*****************************************************************************\r
+extern void CANInit(unsigned long ulBase);\r
+extern void CANEnable(unsigned long ulBase);\r
+extern void CANDisable(unsigned long ulBase);\r
+extern void CANSetBitTiming(unsigned long ulBase, tCANBitClkParms *pClkParms);\r
+extern void CANGetBitTiming(unsigned long ulBase, tCANBitClkParms *pClkParms);\r
+extern unsigned long CANReadReg(unsigned long ulRegAddress);\r
+extern void CANWriteReg(unsigned long ulRegAddress, unsigned long ulRegValue);\r
+extern void CANMessageSet(unsigned long ulBase, unsigned long ulObjID,\r
+                          tCANMsgObject *pMsgObject, tMsgObjType eMsgType);\r
+extern void CANMessageGet(unsigned long ulBase, unsigned long ulObjID,\r
+                          tCANMsgObject *pMsgObject, tBoolean bClrPendingInt);\r
+extern unsigned long CANStatusGet(unsigned long ulBase, tCANStsReg eStatusReg);\r
+extern void CANMessageClear(unsigned long ulBase, unsigned long ulObjID);\r
+extern void CANIntRegister(unsigned long ulBase, void (*pfnHandler)(void));\r
+extern void CANIntEnable(unsigned long ulBase, unsigned long ulIntFlags);\r
+extern void CANIntDisable(unsigned long ulBase, unsigned long ulIntFlags);\r
+extern void CANIntClear(unsigned long ulBase, unsigned long ulIntClr);\r
+extern unsigned long CANIntStatus(unsigned long ulBase,\r
+                                  tCANIntStsReg eIntStsReg);\r
+extern tBoolean CANRetryGet(unsigned long ulBase);\r
+extern void CANRetrySet(unsigned long ulBase, tBoolean bAutoRetry);\r
+extern tBoolean CANErrCntrGet(unsigned long ulBase, unsigned long *pulRxCount,\r
+                              unsigned long *pulTxCount);\r
+extern long CANGetIntNumber(unsigned long ulBase);\r
+extern void CANReadDataReg(unsigned char *pucData, unsigned long *pulRegister,\r
+                           int iSize);\r
+extern void CANWriteDataReg(unsigned char *pucData, unsigned long *pulRegister,\r
+                            int iSize);\r
+\r
+//*****************************************************************************\r
+//\r
+// Close the Doxygen group.\r
+//! @}\r
+//\r
+//*****************************************************************************\r
+\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+\r
+#endif //  __CAN_H__\r

diff --git a/Demo/Common/drivers/LuminaryMicro/comp.h b/Demo/Common/drivers/LuminaryMicro/comp.h
new file mode 100644 (file)
index 0000000..be88edb
--- /dev/null
+++ b/Demo/Common/drivers/LuminaryMicro/comp.h
@@ -0,0 +1,122 @@
+//*****************************************************************************\r
+//\r
+// comp.h - Prototypes for the analog comparator driver.\r
+//\r
+// Copyright (c) 2005-2007 Luminary Micro, Inc.  All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1582 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+#ifndef __COMP_H__\r
+#define __COMP_H__\r
+\r
+#ifdef __cplusplus\r
+extern "C"\r
+{\r
+#endif\r
+\r
+//*****************************************************************************\r
+//\r
+// Values that can be passed to ComparatorConfigure() as the ulConfig\r
+// parameter.  For each group (i.e. COMP_TRIG_xxx, COMP_INT_xxx, etc.), one of\r
+// the values may be selected and ORed together will values from the other\r
+// groups.\r
+//\r
+//*****************************************************************************\r
+#define COMP_TRIG_NONE          0x00000000  // No ADC trigger\r
+#define COMP_TRIG_HIGH          0x00000880  // Trigger when high\r
+#define COMP_TRIG_LOW           0x00000800  // Trigger when low\r
+#define COMP_TRIG_FALL          0x00000820  // Trigger on falling edge\r
+#define COMP_TRIG_RISE          0x00000840  // Trigger on rising edge\r
+#define COMP_TRIG_BOTH          0x00000860  // Trigger on both edges\r
+#define COMP_INT_HIGH           0x00000010  // Interrupt when high\r
+#define COMP_INT_LOW            0x00000000  // Interrupt when low\r
+#define COMP_INT_FALL           0x00000004  // Interrupt on falling edge\r
+#define COMP_INT_RISE           0x00000008  // Interrupt on rising edge\r
+#define COMP_INT_BOTH           0x0000000C  // Interrupt on both edges\r
+#define COMP_ASRCP_PIN          0x00000000  // Dedicated Comp+ pin\r
+#define COMP_ASRCP_PIN0         0x00000200  // Comp0+ pin\r
+#define COMP_ASRCP_REF          0x00000400  // Internal voltage reference\r
+#ifndef DEPRECATED\r
+#define COMP_OUTPUT_NONE        0x00000000  // No comparator output\r
+#endif\r
+#define COMP_OUTPUT_NORMAL      0x00000000  // Comparator output normal\r
+#define COMP_OUTPUT_INVERT      0x00000002  // Comparator output inverted\r
+\r
+//*****************************************************************************\r
+//\r
+// Values that can be passed to ComparatorSetRef() as the ulRef parameter.\r
+//\r
+//*****************************************************************************\r
+#define COMP_REF_OFF            0x00000000  // Turn off the internal reference\r
+#define COMP_REF_0V             0x00000300  // Internal reference of 0V\r
+#define COMP_REF_0_1375V        0x00000301  // Internal reference of 0.1375V\r
+#define COMP_REF_0_275V         0x00000302  // Internal reference of 0.275V\r
+#define COMP_REF_0_4125V        0x00000303  // Internal reference of 0.4125V\r
+#define COMP_REF_0_55V          0x00000304  // Internal reference of 0.55V\r
+#define COMP_REF_0_6875V        0x00000305  // Internal reference of 0.6875V\r
+#define COMP_REF_0_825V         0x00000306  // Internal reference of 0.825V\r
+#define COMP_REF_0_928125V      0x00000201  // Internal reference of 0.928125V\r
+#define COMP_REF_0_9625V        0x00000307  // Internal reference of 0.9625V\r
+#define COMP_REF_1_03125V       0x00000202  // Internal reference of 1.03125V\r
+#define COMP_REF_1_134375V      0x00000203  // Internal reference of 1.134375V\r
+#define COMP_REF_1_1V           0x00000308  // Internal reference of 1.1V\r
+#define COMP_REF_1_2375V        0x00000309  // Internal reference of 1.2375V\r
+#define COMP_REF_1_340625V      0x00000205  // Internal reference of 1.340625V\r
+#define COMP_REF_1_375V         0x0000030A  // Internal reference of 1.375V\r
+#define COMP_REF_1_44375V       0x00000206  // Internal reference of 1.44375V\r
+#define COMP_REF_1_5125V        0x0000030B  // Internal reference of 1.5125V\r
+#define COMP_REF_1_546875V      0x00000207  // Internal reference of 1.546875V\r
+#define COMP_REF_1_65V          0x0000030C  // Internal reference of 1.65V\r
+#define COMP_REF_1_753125V      0x00000209  // Internal reference of 1.753125V\r
+#define COMP_REF_1_7875V        0x0000030D  // Internal reference of 1.7875V\r
+#define COMP_REF_1_85625V       0x0000020A  // Internal reference of 1.85625V\r
+#define COMP_REF_1_925V         0x0000030E  // Internal reference of 1.925V\r
+#define COMP_REF_1_959375V      0x0000020B  // Internal reference of 1.959375V\r
+#define COMP_REF_2_0625V        0x0000030F  // Internal reference of 2.0625V\r
+#define COMP_REF_2_165625V      0x0000020D  // Internal reference of 2.165625V\r
+#define COMP_REF_2_26875V       0x0000020E  // Internal reference of 2.26875V\r
+#define COMP_REF_2_371875V      0x0000020F  // Internal reference of 2.371875V\r
+\r
+//*****************************************************************************\r
+//\r
+// Prototypes for the APIs.\r
+//\r
+//*****************************************************************************\r
+extern void ComparatorConfigure(unsigned long ulBase, unsigned long ulComp,\r
+                                unsigned long ulConfig);\r
+extern void ComparatorRefSet(unsigned long ulBase, unsigned long ulRef);\r
+extern tBoolean ComparatorValueGet(unsigned long ulBase, unsigned long ulComp);\r
+extern void ComparatorIntRegister(unsigned long ulBase, unsigned long ulComp,\r
+                                  void (*pfnHandler)(void));\r
+extern void ComparatorIntUnregister(unsigned long ulBase,\r
+                                    unsigned long ulComp);\r
+extern void ComparatorIntEnable(unsigned long ulBase, unsigned long ulComp);\r
+extern void ComparatorIntDisable(unsigned long ulBase, unsigned long ulComp);\r
+extern tBoolean ComparatorIntStatus(unsigned long ulBase, unsigned long ulComp,\r
+                                    tBoolean bMasked);\r
+extern void ComparatorIntClear(unsigned long ulBase, unsigned long ulComp);\r
+\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+\r
+#endif // __COMP_H__\r

diff --git a/Demo/Common/drivers/LuminaryMicro/cpu.h b/Demo/Common/drivers/LuminaryMicro/cpu.h
new file mode 100644 (file)
index 0000000..6cabc33
--- /dev/null
+++ b/Demo/Common/drivers/LuminaryMicro/cpu.h
@@ -0,0 +1,40 @@
+//*****************************************************************************\r
+//\r
+// cpu.h - Prototypes for the CPU instruction wrapper functions.\r
+//\r
+// Copyright (c) 2006-2007 Luminary Micro, Inc.  All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1582 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+#ifndef __CPU_H__\r
+#define __CPU_H__\r
+\r
+//*****************************************************************************\r
+//\r
+// Prototypes.\r
+//\r
+//*****************************************************************************\r
+extern void CPUcpsid(void);\r
+extern void CPUcpsie(void);\r
+extern void CPUwfi(void);\r
+\r
+#endif // __CPU_H__\r

diff --git a/Demo/Common/drivers/LuminaryMicro/debug.h b/Demo/Common/drivers/LuminaryMicro/debug.h
new file mode 100644 (file)
index 0000000..0843731
--- /dev/null
+++ b/Demo/Common/drivers/LuminaryMicro/debug.h
@@ -0,0 +1,56 @@
+//*****************************************************************************\r
+//\r
+// debug.h - Macros for assisting debug of the driver library.\r
+//\r
+// Copyright (c) 2006-2007 Luminary Micro, Inc.  All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1582 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+#ifndef __DEBUG_H__\r
+#define __DEBUG_H__\r
+\r
+//*****************************************************************************\r
+//\r
+// Prototype for the function that is called when an invalid argument is passed\r
+// to an API.  This is only used when doing a DEBUG build.\r
+//\r
+//*****************************************************************************\r
+extern void __error__(char *pcFilename, unsigned long ulLine);\r
+\r
+//*****************************************************************************\r
+//\r
+// The ASSERT macro, which does the actual assertion checking.  Typically, this\r
+// will be for procedure arguments.\r
+//\r
+//*****************************************************************************\r
+#ifdef DEBUG\r
+#define ASSERT(expr) {                                      \\r
+                         if(!(expr))                        \\r
+                         {                                  \\r
+                             __error__(__FILE__, __LINE__); \\r
+                         }                                  \\r
+                     }\r
+#else\r
+#define ASSERT(expr)\r
+#endif\r
+\r
+#endif // __DEBUG_H__\r

diff --git a/Demo/Common/drivers/LuminaryMicro/ethernet.h b/Demo/Common/drivers/LuminaryMicro/ethernet.h
new file mode 100644 (file)
index 0000000..268a5e7
--- /dev/null
+++ b/Demo/Common/drivers/LuminaryMicro/ethernet.h
@@ -0,0 +1,271 @@
+//*****************************************************************************\r
+//\r
+// ethernet.h - Defines and Macros for the ethernet module.\r
+//\r
+// Copyright (c) 2006-2007 Luminary Micro, Inc.  All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1582 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+#ifndef __ETHERNET_H__\r
+#define __ETHERNET_H__\r
+\r
+#ifdef __cplusplus\r
+extern "C"\r
+{\r
+#endif\r
+\r
+//*****************************************************************************\r
+//\r
+// Values that can be passed to EthernetConfigSet as the ulConfig value, and\r
+// returned from EthernetConfigGet.\r
+//\r
+//*****************************************************************************\r
+#define ETH_CFG_TS_TSEN         0x010000    // Enable Timestamp (CCP)\r
+#define ETH_CFG_RX_BADCRCDIS    0x000800    // Disable RX BAD CRC Packets\r
+#define ETH_CFG_RX_PRMSEN       0x000400    // Enable RX Promiscuous\r
+#define ETH_CFG_RX_AMULEN       0x000200    // Enable RX Multicast\r
+#define ETH_CFG_TX_DPLXEN       0x000010    // Enable TX Duplex Mode\r
+#define ETH_CFG_TX_CRCEN        0x000004    // Enable TX CRC Generation\r
+#define ETH_CFG_TX_PADEN        0x000002    // Enable TX Padding\r
+\r
+//*****************************************************************************\r
+//\r
+// Values that can be passed to EthernetIntEnable, EthernetIntDisable, and\r
+// EthernetIntClear as the ulIntFlags parameter, and returned from\r
+// EthernetIntStatus.\r
+//\r
+//*****************************************************************************\r
+#define ETH_INT_PHY             0x040       // PHY Event/Interrupt\r
+#define ETH_INT_MDIO            0x020       // Management Transaction\r
+#define ETH_INT_RXER            0x010       // RX Error\r
+#define ETH_INT_RXOF            0x008       // RX FIFO Overrun\r
+#define ETH_INT_TX              0x004       // TX Complete\r
+#define ETH_INT_TXER            0x002       // TX Error\r
+#define ETH_INT_RX              0x001       // RX Complete\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define values that can be passed as register addresses to\r
+// EthernetPHYRead and EthernetPHYWrite.\r
+//\r
+//*****************************************************************************\r
+#define PHY_MR0                  0          // Control\r
+#define PHY_MR1                  1          // Status\r
+#define PHY_MR2                  2          // PHY Identifier 1\r
+#define PHY_MR3                  3          // PHY Identifier 2\r
+#define PHY_MR4                  4          // Auto-Neg. Advertisement\r
+#define PHY_MR5                  5          // Auto-Neg. Link Partner Ability\r
+#define PHY_MR6                  6          // Auto-Neg. Expansion\r
+                                            // 7-15 Reserved/Not Implemented\r
+#define PHY_MR16                16          // Vendor Specific\r
+#define PHY_MR17                17          // Interrupt Control/Status\r
+#define PHY_MR18                18          // Diagnostic Register\r
+#define PHY_MR19                19          // Transceiver Control\r
+                                            // 20-22 Reserved\r
+#define PHY_MR23                23          // LED Configuration Register\r
+#define PHY_MR24                24          // MDI/MDIX Control Register\r
+                                            // 25-31 Reserved/Not Implemented\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define bit fields in the ETH_MR0 register\r
+//\r
+//*****************************************************************************\r
+#define PHY_MR0_RESET           0x8000      // Reset the PHY\r
+#define PHY_MR0_LOOPBK          0x4000      // TXD to RXD Loopback\r
+#define PHY_MR0_SPEEDSL         0x2000      // Speed Selection\r
+#define PHY_MR0_SPEEDSL_10      0x0000      // Speed Selection 10BASE-T\r
+#define PHY_MR0_SPEEDSL_100     0x2000      // Speed Selection 100BASE-T\r
+#define PHY_MR0_ANEGEN          0x1000      // Auto-Negotiation Enable\r
+#define PHY_MR0_PWRDN           0x0800      // Power Down\r
+#define PHY_MR0_RANEG           0x0200      // Restart Auto-Negotiation\r
+#define PHY_MR0_DUPLEX          0x0100      // Enable full duplex\r
+#define PHY_MR0_DUPLEX_HALF     0x0000      // Enable half duplex mode\r
+#define PHY_MR0_DUPLEX_FULL     0x0100      // Enable full duplex mode\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define bit fields in the ETH_MR1 register\r
+//\r
+//*****************************************************************************\r
+#define PHY_MR1_ANEGC           0x0020      // Auto-Negotiate Complete\r
+#define PHY_MR1_RFAULT          0x0010      // Remove Fault Detected\r
+#define PHY_MR1_LINK            0x0004      // Link Established\r
+#define PHY_MR1_JAB             0x0002      // Jabber Condition Detected\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define bit fields in the ETH_MR17 register\r
+//\r
+//*****************************************************************************\r
+#define PHY_MR17_RXER_IE        0x4000      // Enable Receive Error Interrupt\r
+#define PHY_MR17_LSCHG_IE       0x0400      // Enable Link Status Change Int.\r
+#define PHY_MR17_ANEGCOMP_IE    0x0100      // Enable Auto-Negotiate Cmpl. Int.\r
+#define PHY_MR17_RXER_INT       0x0040      // Receive Error Interrupt\r
+#define PHY_MR17_LSCHG_INT      0x0004      // Link Status Change Interrupt\r
+#define PHY_MR17_ANEGCOMP_INT   0x0001      // Auto-Negotiate Complete Int.\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define bit fields in the ETH_MR18 register\r
+//\r
+//*****************************************************************************\r
+#define PHY_MR18_ANEGF          0x1000      // Auto-Negotiate Failed\r
+#define PHY_MR18_DPLX           0x0800      // Duplex Mode Negotiated\r
+#define PHY_MR18_DPLX_HALF      0x0000      // Half Duplex Mode Negotiated\r
+#define PHY_MR18_DPLX_FULL      0x0800      // Full Duplex Mode Negotiated\r
+#define PHY_MR18_RATE           0x0400      // Rate Negotiated\r
+#define PHY_MR18_RATE_10        0x0000      // Rate Negotiated is 10BASE-T\r
+#define PHY_MR18_RATE_100       0x0400      // Rate Negotiated is 100BASE-TX\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define bit fields in the ETH_MR23 register\r
+//\r
+//*****************************************************************************\r
+#define PHY_MR23_LED1           0x00f0      // LED1 Configuration\r
+#define PHY_MR23_LED1_LINK      0x0000      // LED1 is Link Status\r
+#define PHY_MR23_LED1_RXTX      0x0010      // LED1 is RX or TX Activity\r
+#define PHY_MR23_LED1_TX        0x0020      // LED1 is TX Activity\r
+#define PHY_MR23_LED1_RX        0x0030      // LED1 is RX Activity\r
+#define PHY_MR23_LED1_COL       0x0040      // LED1 is RX Activity\r
+#define PHY_MR23_LED1_100       0x0050      // LED1 is RX Activity\r
+#define PHY_MR23_LED1_10        0x0060      // LED1 is RX Activity\r
+#define PHY_MR23_LED1_DUPLEX    0x0070      // LED1 is RX Activity\r
+#define PHY_MR23_LED1_LINKACT   0x0080      // LED1 is Link Status + Activity\r
+#define PHY_MR23_LED0           0x000f      // LED0 Configuration\r
+#define PHY_MR23_LED0_LINK      0x0000      // LED0 is Link Status\r
+#define PHY_MR23_LED0_RXTX      0x0001      // LED0 is RX or TX Activity\r
+#define PHY_MR23_LED0_TX        0x0002      // LED0 is TX Activity\r
+#define PHY_MR23_LED0_RX        0x0003      // LED0 is RX Activity\r
+#define PHY_MR23_LED0_COL       0x0004      // LED0 is RX Activity\r
+#define PHY_MR23_LED0_100       0x0005      // LED0 is RX Activity\r
+#define PHY_MR23_LED0_10        0x0006      // LED0 is RX Activity\r
+#define PHY_MR23_LED0_DUPLEX    0x0007      // LED0 is RX Activity\r
+#define PHY_MR23_LED0_LINKACT   0x0008      // LED0 is Link Status + Activity\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define bit fields in the ETH_MR24 register\r
+//\r
+//*****************************************************************************\r
+#define PHY_MR24_MDIX           0x0020      // Auto-Switching Configuration\r
+#define PHY_MR24_MDIX_NORMAL    0x0000      // Auto-Switching in passthrough\r
+#define PHY_MR23_MDIX_CROSSOVER 0x0020      // Auto-Switching in crossover\r
+\r
+//*****************************************************************************\r
+//\r
+// Helper Macros for Ethernet Processing\r
+//\r
+//*****************************************************************************\r
+//\r
+// htonl/ntohl - big endian/little endian byte swapping macros for\r
+// 32-bit (long) values\r
+//\r
+//*****************************************************************************\r
+#ifndef htonl\r
+    #define htonl(a)                    \\r
+        ((((a) >> 24) & 0x000000ff) |   \\r
+         (((a) >>  8) & 0x0000ff00) |   \\r
+         (((a) <<  8) & 0x00ff0000) |   \\r
+         (((a) << 24) & 0xff000000))\r
+#endif\r
+\r
+#ifndef ntohl\r
+    #define ntohl(a)    htonl((a))\r
+#endif\r
+\r
+//*****************************************************************************\r
+//\r
+// htons/ntohs - big endian/little endian byte swapping macros for\r
+// 16-bit (short) values\r
+//\r
+//*****************************************************************************\r
+#ifndef htons\r
+    #define htons(a)                \\r
+        ((((a) >> 8) & 0x00ff) |    \\r
+         (((a) << 8) & 0xff00))\r
+#endif\r
+\r
+#ifndef ntohs\r
+    #define ntohs(a)    htons((a))\r
+#endif\r
+\r
+//*****************************************************************************\r
+//\r
+// API Function prototypes\r
+//\r
+//*****************************************************************************\r
+extern void EthernetInitExpClk(unsigned long ulBase, unsigned long ulEthClk);\r
+extern void EthernetConfigSet(unsigned long ulBase, unsigned long ulConfig);\r
+extern unsigned long EthernetConfigGet(unsigned long ulBase);\r
+extern void EthernetMACAddrSet(unsigned long ulBase,\r
+                               unsigned char *pucMACAddr);\r
+extern void EthernetMACAddrGet(unsigned long ulBase,\r
+                               unsigned char *pucMACAddr);\r
+extern void EthernetEnable(unsigned long ulBase);\r
+extern void EthernetDisable(unsigned long ulBase);\r
+extern tBoolean EthernetPacketAvail(unsigned long ulBase);\r
+extern tBoolean EthernetSpaceAvail(unsigned long ulBase);\r
+extern long EthernetPacketGetNonBlocking(unsigned long ulBase,\r
+                                         unsigned char *pucBuf,\r
+                                         long lBufLen);\r
+extern long EthernetPacketGet(unsigned long ulBase, unsigned char *pucBuf,\r
+                              long lBufLen);\r
+extern long EthernetPacketPutNonBlocking(unsigned long ulBase,\r
+                                         unsigned char *pucBuf,\r
+                                         long lBufLen);\r
+extern long EthernetPacketPut(unsigned long ulBase, unsigned char *pucBuf,\r
+                              long lBufLen);\r
+extern void EthernetIntRegister(unsigned long ulBase,\r
+                                void (*pfnHandler)(void));\r
+extern void EthernetIntUnregister(unsigned long ulBase);\r
+extern void EthernetIntEnable(unsigned long ulBase, unsigned long ulIntFlags);\r
+extern void EthernetIntDisable(unsigned long ulBase, unsigned long ulIntFlags);\r
+extern unsigned long EthernetIntStatus(unsigned long ulBase, tBoolean bMasked);\r
+extern void EthernetIntClear(unsigned long ulBase, unsigned long ulIntFlags);\r
+extern void EthernetPHYWrite(unsigned long ulBase, unsigned char ucRegAddr,\r
+                             unsigned long ulData);\r
+extern unsigned long EthernetPHYRead(unsigned long ulBase,\r
+                                     unsigned char ucRegAddr);\r
+\r
+//*****************************************************************************\r
+//\r
+// Several Ethernet APIs have been renamed, with the original function name\r
+// being deprecated.  These defines provide backward compatibility.\r
+//\r
+//*****************************************************************************\r
+#ifndef DEPRECATED\r
+#include "sysctl.h"\r
+#define EthernetInit(a)                         \\r
+        EthernetInitExpClk(a, SysCtlClockGet())\r
+#define EthernetPacketNonBlockingGet(a, b, c) \\r
+        EthernetPacketGetNonBlocking(a, b, c)\r
+#define EthernetPacketNonBlockingPut(a, b, c) \\r
+        EthernetPacketPutNonBlocking(a, b, c)\r
+#endif\r
+\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+\r
+#endif //  __ETHERNET_H__\r

diff --git a/Demo/Common/drivers/LuminaryMicro/gpio.h b/Demo/Common/drivers/LuminaryMicro/gpio.h
new file mode 100644 (file)
index 0000000..67cd90b
--- /dev/null
+++ b/Demo/Common/drivers/LuminaryMicro/gpio.h
@@ -0,0 +1,140 @@
+//*****************************************************************************\r
+//\r
+// gpio.h - Defines and Macros for GPIO API.\r
+//\r
+// Copyright (c) 2005-2007 Luminary Micro, Inc.  All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1582 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+#ifndef __GPIO_H__\r
+#define __GPIO_H__\r
+\r
+#ifdef __cplusplus\r
+extern "C"\r
+{\r
+#endif\r
+\r
+//*****************************************************************************\r
+//\r
+// The following values define the bit field for the ucPins argument to several\r
+// of the APIs.\r
+//\r
+//*****************************************************************************\r
+#define GPIO_PIN_0              0x00000001  // GPIO pin 0\r
+#define GPIO_PIN_1              0x00000002  // GPIO pin 1\r
+#define GPIO_PIN_2              0x00000004  // GPIO pin 2\r
+#define GPIO_PIN_3              0x00000008  // GPIO pin 3\r
+#define GPIO_PIN_4              0x00000010  // GPIO pin 4\r
+#define GPIO_PIN_5              0x00000020  // GPIO pin 5\r
+#define GPIO_PIN_6              0x00000040  // GPIO pin 6\r
+#define GPIO_PIN_7              0x00000080  // GPIO pin 7\r
+\r
+//*****************************************************************************\r
+//\r
+// Values that can be passed to GPIODirModeSet as the ulPinIO parameter, and\r
+// returned from GPIODirModeGet.\r
+//\r
+//*****************************************************************************\r
+#define GPIO_DIR_MODE_IN        0x00000000  // Pin is a GPIO input\r
+#define GPIO_DIR_MODE_OUT       0x00000001  // Pin is a GPIO output\r
+#define GPIO_DIR_MODE_HW        0x00000002  // Pin is a peripheral function\r
+\r
+//*****************************************************************************\r
+//\r
+// Values that can be passed to GPIOIntTypeSet as the ulIntType parameter, and\r
+// returned from GPIOIntTypeGet.\r
+//\r
+//*****************************************************************************\r
+#define GPIO_FALLING_EDGE       0x00000000  // Interrupt on falling edge\r
+#define GPIO_RISING_EDGE        0x00000004  // Interrupt on rising edge\r
+#define GPIO_BOTH_EDGES         0x00000001  // Interrupt on both edges\r
+#define GPIO_LOW_LEVEL          0x00000002  // Interrupt on low level\r
+#define GPIO_HIGH_LEVEL         0x00000007  // Interrupt on high level\r
+\r
+//*****************************************************************************\r
+//\r
+// Values that can be passed to GPIOPadConfigSet as the ulStrength parameter,\r
+// and returned by GPIOPadConfigGet in the *pulStrength parameter.\r
+//\r
+//*****************************************************************************\r
+#define GPIO_STRENGTH_2MA       0x00000001  // 2mA drive strength\r
+#define GPIO_STRENGTH_4MA       0x00000002  // 4mA drive strength\r
+#define GPIO_STRENGTH_8MA       0x00000004  // 8mA drive strength\r
+#define GPIO_STRENGTH_8MA_SC    0x0000000C  // 8mA drive with slew rate control\r
+\r
+//*****************************************************************************\r
+//\r
+// Values that can be passed to GPIOPadConfigSet as the ulPadType parameter,\r
+// and returned by GPIOPadConfigGet in the *pulPadType parameter.\r
+//\r
+//*****************************************************************************\r
+#define GPIO_PIN_TYPE_STD       0x00000008  // Push-pull\r
+#define GPIO_PIN_TYPE_STD_WPU   0x0000000A  // Push-pull with weak pull-up\r
+#define GPIO_PIN_TYPE_STD_WPD   0x0000000C  // Push-pull with weak pull-down\r
+#define GPIO_PIN_TYPE_OD        0x00000009  // Open-drain\r
+#define GPIO_PIN_TYPE_OD_WPU    0x0000000B  // Open-drain with weak pull-up\r
+#define GPIO_PIN_TYPE_OD_WPD    0x0000000D  // Open-drain with weak pull-down\r
+#define GPIO_PIN_TYPE_ANALOG    0x00000000  // Analog comparator\r
+\r
+//*****************************************************************************\r
+//\r
+// Prototypes for the APIs.\r
+//\r
+//*****************************************************************************\r
+extern void GPIODirModeSet(unsigned long ulPort, unsigned char ucPins,\r
+                           unsigned long ulPinIO);\r
+extern unsigned long GPIODirModeGet(unsigned long ulPort, unsigned char ucPin);\r
+extern void GPIOIntTypeSet(unsigned long ulPort, unsigned char ucPins,\r
+                           unsigned long ulIntType);\r
+extern unsigned long GPIOIntTypeGet(unsigned long ulPort, unsigned char ucPin);\r
+extern void GPIOPadConfigSet(unsigned long ulPort, unsigned char ucPins,\r
+                             unsigned long ulStrength,\r
+                             unsigned long ulPadType);\r
+extern void GPIOPadConfigGet(unsigned long ulPort, unsigned char ucPin,\r
+                             unsigned long *pulStrength,\r
+                             unsigned long *pulPadType);\r
+extern void GPIOPinIntEnable(unsigned long ulPort, unsigned char ucPins);\r
+extern void GPIOPinIntDisable(unsigned long ulPort, unsigned char ucPins);\r
+extern long GPIOPinIntStatus(unsigned long ulPort, tBoolean bMasked);\r
+extern void GPIOPinIntClear(unsigned long ulPort, unsigned char ucPins);\r
+extern void GPIOPortIntRegister(unsigned long ulPort,\r
+                                void (*pfIntHandler)(void));\r
+extern void GPIOPortIntUnregister(unsigned long ulPort);\r
+extern long GPIOPinRead(unsigned long ulPort, unsigned char ucPins);\r
+extern void GPIOPinWrite(unsigned long ulPort, unsigned char ucPins,\r
+                         unsigned char ucVal);\r
+extern void GPIOPinTypeCAN(unsigned long ulPort, unsigned char ucPins);\r
+extern void GPIOPinTypeComparator(unsigned long ulPort, unsigned char ucPins);\r
+extern void GPIOPinTypeGPIOInput(unsigned long ulPort, unsigned char ucPins);\r
+extern void GPIOPinTypeGPIOOutput(unsigned long ulPort, unsigned char ucPins);\r
+extern void GPIOPinTypeI2C(unsigned long ulPort, unsigned char ucPins);\r
+extern void GPIOPinTypePWM(unsigned long ulPort, unsigned char ucPins);\r
+extern void GPIOPinTypeQEI(unsigned long ulPort, unsigned char ucPins);\r
+extern void GPIOPinTypeSSI(unsigned long ulPort, unsigned char ucPins);\r
+extern void GPIOPinTypeTimer(unsigned long ulPort, unsigned char ucPins);\r
+extern void GPIOPinTypeUART(unsigned long ulPort, unsigned char ucPins);\r
+\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+\r
+#endif //  __GPIO_H__\r

diff --git a/Demo/Common/drivers/LuminaryMicro/hibernate.h b/Demo/Common/drivers/LuminaryMicro/hibernate.h
new file mode 100644 (file)
index 0000000..ed93873
--- /dev/null
+++ b/Demo/Common/drivers/LuminaryMicro/hibernate.h
@@ -0,0 +1,119 @@
+//*****************************************************************************\r
+//\r
+// hibernate.h - API definition for the Hibernation module.\r
+//\r
+// Copyright (c) 2007 Luminary Micro, Inc.  All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1582 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+#ifndef __HIBERNATE_H__\r
+#define __HIBERNATE_H__\r
+\r
+#ifdef __cplusplus\r
+extern "C"\r
+{\r
+#endif\r
+\r
+//*****************************************************************************\r
+//\r
+// Macros needed for selecting the clock source for HibernateClockSelect()\r
+//\r
+//*****************************************************************************\r
+#define HIBERNATE_CLOCK_SEL_RAW         0x04\r
+#define HIBERNATE_CLOCK_SEL_DIV128      0x00\r
+\r
+//*****************************************************************************\r
+//\r
+// Macros need to configure wake events for HibernateWakeSet()\r
+//\r
+//*****************************************************************************\r
+#define HIBERNATE_WAKE_PIN              0x10\r
+#define HIBERNATE_WAKE_RTC              0x08\r
+\r
+//*****************************************************************************\r
+//\r
+// Macros needed to configure low battery detect for HibernateLowBatSet()\r
+//\r
+//*****************************************************************************\r
+#define HIBERNATE_LOW_BAT_DETECT        0x20\r
+#define HIBERNATE_LOW_BAT_ABORT         0xA0\r
+\r
+//*****************************************************************************\r
+//\r
+// Macros defining interrupt source bits for the interrupt functions.\r
+//\r
+//*****************************************************************************\r
+#define HIBERNATE_INT_PIN_WAKE          0x08\r
+#define HIBERNATE_INT_LOW_BAT           0x04\r
+#define HIBERNATE_INT_RTC_MATCH_0       0x01\r
+#define HIBERNATE_INT_RTC_MATCH_1       0x02\r
+\r
+//*****************************************************************************\r
+//\r
+// API Function prototypes\r
+//\r
+//*****************************************************************************\r
+extern void HibernateEnableExpClk(unsigned long ulHibClk);\r
+extern void HibernateDisable(void);\r
+extern void HibernateClockSelect(unsigned long ulClockInput);\r
+extern void HibernateRTCEnable(void);\r
+extern void HibernateRTCDisable(void);\r
+extern void HibernateWakeSet(unsigned long ulWakeFlags);\r
+extern unsigned long HibernateWakeGet(void);\r
+extern void HibernateLowBatSet(unsigned long ulLowBatFlags);\r
+extern unsigned long HibernateLowBatGet(void);\r
+extern void HibernateRTCSet(unsigned long ulRTCValue);\r
+extern unsigned long HibernateRTCGet(void);\r
+extern void HibernateRTCMatch0Set(unsigned long ulMatch);\r
+extern unsigned long HibernateRTCMatch0Get(void);\r
+extern void HibernateRTCMatch1Set(unsigned long ulMatch);\r
+extern unsigned long HibernateRTCMatch1Get(void);\r
+extern void HibernateRTCTrimSet(unsigned long ulTrim);\r
+extern unsigned long HibernateRTCTrimGet(void);\r
+extern void HibernateDataSet(unsigned long *pulData, unsigned long ulCount);\r
+extern void HibernateDataGet(unsigned long *pulData, unsigned long ulCount);\r
+extern void HibernateRequest(void);\r
+extern void HibernateIntEnable(unsigned long ulIntFlags);\r
+extern void HibernateIntDisable(unsigned long ulIntFlags);\r
+extern void HibernateIntRegister(void (*pfnHandler)(void));\r
+extern void HibernateIntUnregister(void);\r
+extern unsigned long HibernateIntStatus(tBoolean bMasked);\r
+extern void HibernateIntClear(unsigned long ulIntFlags);\r
+extern unsigned int HibernateIsActive(void);\r
+\r
+//*****************************************************************************\r
+//\r
+// Several Hibernate module APIs have been renamed, with the original function\r
+// name being deprecated.  These defines provide backward compatibility.\r
+//\r
+//*****************************************************************************\r
+#ifndef DEPRECATED\r
+#include "sysctl.h"\r
+#define HibernateEnable(a)                         \\r
+        HibernateEnableExpClk(a, SysCtlClockGet())\r
+#endif\r
+\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+\r
+#endif  // __HIBERNATE_H__\r

diff --git a/Demo/Common/drivers/LuminaryMicro/hw_adc.h b/Demo/Common/drivers/LuminaryMicro/hw_adc.h
new file mode 100644 (file)
index 0000000..6ee79f4
--- /dev/null
+++ b/Demo/Common/drivers/LuminaryMicro/hw_adc.h
@@ -0,0 +1,343 @@
+//*****************************************************************************\r
+//\r
+// hw_adc.h - Macros used when accessing the ADC hardware.\r
+//\r
+// Copyright (c) 2005-2007 Luminary Micro, Inc.  All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1582 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+#ifndef __HW_ADC_H__\r
+#define __HW_ADC_H__\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the offsets of the ADC registers.\r
+//\r
+//*****************************************************************************\r
+#define ADC_O_ACTSS             0x00000000  // Active sample register\r
+#define ADC_O_RIS               0x00000004  // Raw interrupt status register\r
+#define ADC_O_IM                0x00000008  // Interrupt mask register\r
+#define ADC_O_ISC               0x0000000C  // Interrupt status/clear register\r
+#define ADC_O_OSTAT             0x00000010  // Overflow status register\r
+#define ADC_O_EMUX              0x00000014  // Event multiplexer select reg.\r
+#define ADC_O_USTAT             0x00000018  // Underflow status register\r
+#define ADC_O_SSPRI             0x00000020  // Channel priority register\r
+#define ADC_O_PSSI              0x00000028  // Processor sample initiate reg.\r
+#define ADC_O_SAC               0x00000030  // Sample Averaging Control reg.\r
+#define ADC_O_SSMUX0            0x00000040  // Multiplexer select 0 register\r
+#define ADC_O_SSCTL0            0x00000044  // Sample sequence control 0 reg.\r
+#define ADC_O_SSFIFO0           0x00000048  // Result FIFO 0 register\r
+#define ADC_O_SSFSTAT0          0x0000004C  // FIFO 0 status register\r
+#define ADC_O_SSMUX1            0x00000060  // Multiplexer select 1 register\r
+#define ADC_O_SSCTL1            0x00000064  // Sample sequence control 1 reg.\r
+#define ADC_O_SSFIFO1           0x00000068  // Result FIFO 1 register\r
+#define ADC_O_SSFSTAT1          0x0000006C  // FIFO 1 status register\r
+#define ADC_O_SSMUX2            0x00000080  // Multiplexer select 2 register\r
+#define ADC_O_SSCTL2            0x00000084  // Sample sequence control 2 reg.\r
+#define ADC_O_SSFIFO2           0x00000088  // Result FIFO 2 register\r
+#define ADC_O_SSFSTAT2          0x0000008C  // FIFO 2 status register\r
+#define ADC_O_SSMUX3            0x000000A0  // Multiplexer select 3 register\r
+#define ADC_O_SSCTL3            0x000000A4  // Sample sequence control 3 reg.\r
+#define ADC_O_SSFIFO3           0x000000A8  // Result FIFO 3 register\r
+#define ADC_O_SSFSTAT3          0x000000AC  // FIFO 3 status register\r
+#define ADC_O_TMLB              0x00000100  // Test mode loopback register\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the offsets of the ADC sequence registers.\r
+//\r
+//*****************************************************************************\r
+#define ADC_O_SEQ               0x00000040  // Offset to the first sequence\r
+#define ADC_O_SEQ_STEP          0x00000020  // Increment to the next sequence\r
+#define ADC_O_X_SSMUX           0x00000000  // Multiplexer select register\r
+#define ADC_O_X_SSCTL           0x00000004  // Sample sequence control register\r
+#define ADC_O_X_SSFIFO          0x00000008  // Result FIFO register\r
+#define ADC_O_X_SSFSTAT         0x0000000C  // FIFO status register\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the ADC_ACTSS register.\r
+//\r
+//*****************************************************************************\r
+#define ADC_ACTSS_ASEN3         0x00000008  // Sample sequence 3 enable\r
+#define ADC_ACTSS_ASEN2         0x00000004  // Sample sequence 2 enable\r
+#define ADC_ACTSS_ASEN1         0x00000002  // Sample sequence 1 enable\r
+#define ADC_ACTSS_ASEN0         0x00000001  // Sample sequence 0 enable\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the ADC_RIS register.\r
+//\r
+//*****************************************************************************\r
+#define ADC_RIS_INR3            0x00000008  // Sample sequence 3 interrupt\r
+#define ADC_RIS_INR2            0x00000004  // Sample sequence 2 interrupt\r
+#define ADC_RIS_INR1            0x00000002  // Sample sequence 1 interrupt\r
+#define ADC_RIS_INR0            0x00000001  // Sample sequence 0 interrupt\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the ADC_IM register.\r
+//\r
+//*****************************************************************************\r
+#define ADC_IM_MASK3            0x00000008  // Sample sequence 3 mask\r
+#define ADC_IM_MASK2            0x00000004  // Sample sequence 2 mask\r
+#define ADC_IM_MASK1            0x00000002  // Sample sequence 1 mask\r
+#define ADC_IM_MASK0            0x00000001  // Sample sequence 0 mask\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the ADC_ISC register.\r
+//\r
+//*****************************************************************************\r
+#define ADC_ISC_IN3             0x00000008 // Sample sequence 3 interrupt\r
+#define ADC_ISC_IN2             0x00000004 // Sample sequence 2 interrupt\r
+#define ADC_ISC_IN1             0x00000002 // Sample sequence 1 interrupt\r
+#define ADC_ISC_IN0             0x00000001 // Sample sequence 0 interrupt\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the ADC_OSTAT register.\r
+//\r
+//*****************************************************************************\r
+#define ADC_OSTAT_OV3           0x00000008  // Sample sequence 3 overflow\r
+#define ADC_OSTAT_OV2           0x00000004  // Sample sequence 2 overflow\r
+#define ADC_OSTAT_OV1           0x00000002  // Sample sequence 1 overflow\r
+#define ADC_OSTAT_OV0           0x00000001  // Sample sequence 0 overflow\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the ADC_EMUX register.\r
+//\r
+//*****************************************************************************\r
+#define ADC_EMUX_EM3_MASK       0x0000F000  // Event mux 3 mask\r
+#define ADC_EMUX_EM3_PROCESSOR  0x00000000  // Processor event\r
+#define ADC_EMUX_EM3_COMP0      0x00001000  // Analog comparator 0 event\r
+#define ADC_EMUX_EM3_COMP1      0x00002000  // Analog comparator 1 event\r
+#define ADC_EMUX_EM3_COMP2      0x00003000  // Analog comparator 2 event\r
+#define ADC_EMUX_EM3_EXTERNAL   0x00004000  // External event\r
+#define ADC_EMUX_EM3_TIMER      0x00005000  // Timer event\r
+#define ADC_EMUX_EM3_PWM0       0x00006000  // PWM0 event\r
+#define ADC_EMUX_EM3_PWM1       0x00007000  // PWM1 event\r
+#define ADC_EMUX_EM3_PWM2       0x00008000  // PWM2 event\r
+#define ADC_EMUX_EM3_ALWAYS     0x0000F000  // Always event\r
+#define ADC_EMUX_EM2_MASK       0x00000F00  // Event mux 2 mask\r
+#define ADC_EMUX_EM2_PROCESSOR  0x00000000  // Processor event\r
+#define ADC_EMUX_EM2_COMP0      0x00000100  // Analog comparator 0 event\r
+#define ADC_EMUX_EM2_COMP1      0x00000200  // Analog comparator 1 event\r
+#define ADC_EMUX_EM2_COMP2      0x00000300  // Analog comparator 2 event\r
+#define ADC_EMUX_EM2_EXTERNAL   0x00000400  // External event\r
+#define ADC_EMUX_EM2_TIMER      0x00000500  // Timer event\r
+#define ADC_EMUX_EM2_PWM0       0x00000600  // PWM0 event\r
+#define ADC_EMUX_EM2_PWM1       0x00000700  // PWM1 event\r
+#define ADC_EMUX_EM2_PWM2       0x00000800  // PWM2 event\r
+#define ADC_EMUX_EM2_ALWAYS     0x00000F00  // Always event\r
+#define ADC_EMUX_EM1_MASK       0x000000F0  // Event mux 1 mask\r
+#define ADC_EMUX_EM1_PROCESSOR  0x00000000  // Processor event\r
+#define ADC_EMUX_EM1_COMP0      0x00000010  // Analog comparator 0 event\r
+#define ADC_EMUX_EM1_COMP1      0x00000020  // Analog comparator 1 event\r
+#define ADC_EMUX_EM1_COMP2      0x00000030  // Analog comparator 2 event\r
+#define ADC_EMUX_EM1_EXTERNAL   0x00000040  // External event\r
+#define ADC_EMUX_EM1_TIMER      0x00000050  // Timer event\r
+#define ADC_EMUX_EM1_PWM0       0x00000060  // PWM0 event\r
+#define ADC_EMUX_EM1_PWM1       0x00000070  // PWM1 event\r
+#define ADC_EMUX_EM1_PWM2       0x00000080  // PWM2 event\r
+#define ADC_EMUX_EM1_ALWAYS     0x000000F0  // Always event\r
+#define ADC_EMUX_EM0_MASK       0x0000000F  // Event mux 0 mask\r
+#define ADC_EMUX_EM0_PROCESSOR  0x00000000  // Processor event\r
+#define ADC_EMUX_EM0_COMP0      0x00000001  // Analog comparator 0 event\r
+#define ADC_EMUX_EM0_COMP1      0x00000002  // Analog comparator 1 event\r
+#define ADC_EMUX_EM0_COMP2      0x00000003  // Analog comparator 2 event\r
+#define ADC_EMUX_EM0_EXTERNAL   0x00000004  // External event\r
+#define ADC_EMUX_EM0_TIMER      0x00000005  // Timer event\r
+#define ADC_EMUX_EM0_PWM0       0x00000006  // PWM0 event\r
+#define ADC_EMUX_EM0_PWM1       0x00000007  // PWM1 event\r
+#define ADC_EMUX_EM0_PWM2       0x00000008  // PWM2 event\r
+#define ADC_EMUX_EM0_ALWAYS     0x0000000F  // Always event\r
+#define ADC_EMUX_EM0_SHIFT               0  // The shift for the first event\r
+#define ADC_EMUX_EM1_SHIFT               4  // The shift for the second event\r
+#define ADC_EMUX_EM2_SHIFT               8  // The shift for the third event\r
+#define ADC_EMUX_EM3_SHIFT              12  // The shift for the fourth event\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the ADC_USTAT register.\r
+//\r
+//*****************************************************************************\r
+#define ADC_USTAT_UV3           0x00000008  // Sample sequence 3 underflow\r
+#define ADC_USTAT_UV2           0x00000004  // Sample sequence 2 underflow\r
+#define ADC_USTAT_UV1           0x00000002  // Sample sequence 1 underflow\r
+#define ADC_USTAT_UV0           0x00000001  // Sample sequence 0 underflow\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the ADC_SSPRI register.\r
+//\r
+//*****************************************************************************\r
+#define ADC_SSPRI_SS3_MASK      0x00003000  // Sequencer 3 priority mask\r
+#define ADC_SSPRI_SS3_1ST       0x00000000  // First priority\r
+#define ADC_SSPRI_SS3_2ND       0x00001000  // Second priority\r
+#define ADC_SSPRI_SS3_3RD       0x00002000  // Third priority\r
+#define ADC_SSPRI_SS3_4TH       0x00003000  // Fourth priority\r
+#define ADC_SSPRI_SS2_MASK      0x00000300  // Sequencer 2 priority mask\r
+#define ADC_SSPRI_SS2_1ST       0x00000000  // First priority\r
+#define ADC_SSPRI_SS2_2ND       0x00000100  // Second priority\r
+#define ADC_SSPRI_SS2_3RD       0x00000200  // Third priority\r
+#define ADC_SSPRI_SS2_4TH       0x00000300  // Fourth priority\r
+#define ADC_SSPRI_SS1_MASK      0x00000030  // Sequencer 1 priority mask\r
+#define ADC_SSPRI_SS1_1ST       0x00000000  // First priority\r
+#define ADC_SSPRI_SS1_2ND       0x00000010  // Second priority\r
+#define ADC_SSPRI_SS1_3RD       0x00000020  // Third priority\r
+#define ADC_SSPRI_SS1_4TH       0x00000030  // Fourth priority\r
+#define ADC_SSPRI_SS0_MASK      0x00000003  // Sequencer 0 priority mask\r
+#define ADC_SSPRI_SS0_1ST       0x00000000  // First priority\r
+#define ADC_SSPRI_SS0_2ND       0x00000001  // Second priority\r
+#define ADC_SSPRI_SS0_3RD       0x00000002  // Third priority\r
+#define ADC_SSPRI_SS0_4TH       0x00000003  // Fourth priority\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the ADC_PSSI register.\r
+//\r
+//*****************************************************************************\r
+#define ADC_PSSI_SS3            0x00000008  // Trigger sample sequencer 3\r
+#define ADC_PSSI_SS2            0x00000004  // Trigger sample sequencer 2\r
+#define ADC_PSSI_SS1            0x00000002  // Trigger sample sequencer 1\r
+#define ADC_PSSI_SS0            0x00000001  // Trigger sample sequencer 0\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the ADC_SAC register.\r
+//\r
+//*****************************************************************************\r
+#define ADC_SAC_AVG_OFF         0x00000000  // No hardware oversampling\r
+#define ADC_SAC_AVG_2X          0x00000001  // 2x hardware oversampling\r
+#define ADC_SAC_AVG_4X          0x00000002  // 4x hardware oversampling\r
+#define ADC_SAC_AVG_8X          0x00000003  // 8x hardware oversampling\r
+#define ADC_SAC_AVG_16X         0x00000004  // 16x hardware oversampling\r
+#define ADC_SAC_AVG_32X         0x00000005  // 32x hardware oversampling\r
+#define ADC_SAC_AVG_64X         0x00000006  // 64x hardware oversampling\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the ADC_SSMUX0, ADC_SSMUX1,\r
+// ADC_SSMUX2, and ADC_SSMUX3 registers.  Not all fields are present in all\r
+// registers.\r
+//\r
+//*****************************************************************************\r
+#define ADC_SSMUX_MUX7_MASK     0x70000000  // 8th mux select mask\r
+#define ADC_SSMUX_MUX6_MASK     0x07000000  // 7th mux select mask\r
+#define ADC_SSMUX_MUX5_MASK     0x00700000  // 6th mux select mask\r
+#define ADC_SSMUX_MUX4_MASK     0x00070000  // 5th mux select mask\r
+#define ADC_SSMUX_MUX3_MASK     0x00007000  // 4th mux select mask\r
+#define ADC_SSMUX_MUX2_MASK     0x00000700  // 3rd mux select mask\r
+#define ADC_SSMUX_MUX1_MASK     0x00000070  // 2nd mux select mask\r
+#define ADC_SSMUX_MUX0_MASK     0x00000007  // 1st mux select mask\r
+#define ADC_SSMUX_MUX7_SHIFT    28\r
+#define ADC_SSMUX_MUX6_SHIFT    24\r
+#define ADC_SSMUX_MUX5_SHIFT    20\r
+#define ADC_SSMUX_MUX4_SHIFT    16\r
+#define ADC_SSMUX_MUX3_SHIFT    12\r
+#define ADC_SSMUX_MUX2_SHIFT    8\r
+#define ADC_SSMUX_MUX1_SHIFT    4\r
+#define ADC_SSMUX_MUX0_SHIFT    0\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the ADC_SSCTL0, ADC_SSCTL1,\r
+// ADC_SSCTL2, and ADC_SSCTL3 registers.  Not all fields are present in all\r
+// registers.\r
+//\r
+//*****************************************************************************\r
+#define ADC_SSCTL_TS7           0x80000000  // 8th temperature sensor select\r
+#define ADC_SSCTL_IE7           0x40000000  // 8th interrupt enable\r
+#define ADC_SSCTL_END7          0x20000000  // 8th sequence end select\r
+#define ADC_SSCTL_D7            0x10000000  // 8th differential select\r
+#define ADC_SSCTL_TS6           0x08000000  // 7th temperature sensor select\r
+#define ADC_SSCTL_IE6           0x04000000  // 7th interrupt enable\r
+#define ADC_SSCTL_END6          0x02000000  // 7th sequence end select\r
+#define ADC_SSCTL_D6            0x01000000  // 7th differential select\r
+#define ADC_SSCTL_TS5           0x00800000  // 6th temperature sensor select\r
+#define ADC_SSCTL_IE5           0x00400000  // 6th interrupt enable\r
+#define ADC_SSCTL_END5          0x00200000  // 6th sequence end select\r
+#define ADC_SSCTL_D5            0x00100000  // 6th differential select\r
+#define ADC_SSCTL_TS4           0x00080000  // 5th temperature sensor select\r
+#define ADC_SSCTL_IE4           0x00040000  // 5th interrupt enable\r
+#define ADC_SSCTL_END4          0x00020000  // 5th sequence end select\r
+#define ADC_SSCTL_D4            0x00010000  // 5th differential select\r
+#define ADC_SSCTL_TS3           0x00008000  // 4th temperature sensor select\r
+#define ADC_SSCTL_IE3           0x00004000  // 4th interrupt enable\r
+#define ADC_SSCTL_END3          0x00002000  // 4th sequence end select\r
+#define ADC_SSCTL_D3            0x00001000  // 4th differential select\r
+#define ADC_SSCTL_TS2           0x00000800  // 3rd temperature sensor select\r
+#define ADC_SSCTL_IE2           0x00000400  // 3rd interrupt enable\r
+#define ADC_SSCTL_END2          0x00000200  // 3rd sequence end select\r
+#define ADC_SSCTL_D2            0x00000100  // 3rd differential select\r
+#define ADC_SSCTL_TS1           0x00000080  // 2nd temperature sensor select\r
+#define ADC_SSCTL_IE1           0x00000040  // 2nd interrupt enable\r
+#define ADC_SSCTL_END1          0x00000020  // 2nd sequence end select\r
+#define ADC_SSCTL_D1            0x00000010  // 2nd differential select\r
+#define ADC_SSCTL_TS0           0x00000008  // 1st temperature sensor select\r
+#define ADC_SSCTL_IE0           0x00000004  // 1st interrupt enable\r
+#define ADC_SSCTL_END0          0x00000002  // 1st sequence end select\r
+#define ADC_SSCTL_D0            0x00000001  // 1st differential select\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the ADC_SSFIFO0, ADC_SSFIFO1,\r
+// ADC_SSFIFO2, and ADC_SSFIFO3 registers.\r
+//\r
+//*****************************************************************************\r
+#define ADC_SSFIFO_DATA_MASK    0x000003FF  // Sample data\r
+#define ADC_SSFIFO_DATA_SHIFT   0\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the ADC_SSFSTAT0, ADC_SSFSTAT1,\r
+// ADC_SSFSTAT2, and ADC_SSFSTAT3 registers.\r
+//\r
+//*****************************************************************************\r
+#define ADC_SSFSTAT_FULL        0x00001000  // FIFO is full\r
+#define ADC_SSFSTAT_EMPTY       0x00000100  // FIFO is empty\r
+#define ADC_SSFSTAT_HPTR        0x000000F0  // FIFO head pointer\r
+#define ADC_SSFSTAT_TPTR        0x0000000F  // FIFO tail pointer\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the ADC_TMLB register.\r
+//\r
+//*****************************************************************************\r
+#define ADC_TMLB_LB             0x00000001  // Loopback control signals\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the loopback ADC data.\r
+//\r
+//*****************************************************************************\r
+#define ADC_LB_CNT_MASK         0x000003C0  // Sample counter mask\r
+#define ADC_LB_CONT             0x00000020  // Continuation sample\r
+#define ADC_LB_DIFF             0x00000010  // Differential sample\r
+#define ADC_LB_TS               0x00000008  // Temperature sensor sample\r
+#define ADC_LB_MUX_MASK         0x00000007  // Input channel number mask\r
+#define ADC_LB_CNT_SHIFT        6           // Sample counter shift\r
+#define ADC_LB_MUX_SHIFT        0           // Input channel number shift\r
+\r
+#endif // __HW_ADC_H__\r

diff --git a/Demo/Common/drivers/LuminaryMicro/hw_can.h b/Demo/Common/drivers/LuminaryMicro/hw_can.h
new file mode 100644 (file)
index 0000000..9fe03a6
--- /dev/null
+++ b/Demo/Common/drivers/LuminaryMicro/hw_can.h
@@ -0,0 +1,379 @@
+//*****************************************************************************\r
+//\r
+// hw_can.h - Defines and macros used when accessing the can.\r
+//\r
+// Copyright (c) 2006-2007 Luminary Micro, Inc.  All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1582 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+#ifndef __HW_CAN_H__\r
+#define __HW_CAN_H__\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the offsets of the can registers.\r
+//\r
+//*****************************************************************************\r
+#define CAN_O_CTL               0x00000000  // Control register\r
+#define CAN_O_STS               0x00000004  // Status register\r
+#define CAN_O_ERR               0x00000008  // Error register\r
+#define CAN_O_BIT               0x0000000C  // Bit Timing register\r
+#define CAN_O_INT               0x00000010  // Interrupt register\r
+#define CAN_O_TST               0x00000014  // Test register\r
+#define CAN_O_BRPE              0x00000018  // Baud Rate Prescaler register\r
+#define CAN_O_IF1CRQ            0x00000020  // Interface 1 Command Request reg.\r
+#define CAN_O_IF1CMSK           0x00000024  // Interface 1 Command Mask reg.\r
+#define CAN_O_IF1MSK1           0x00000028  // Interface 1 Mask 1 register\r
+#define CAN_O_IF1MSK2           0x0000002C  // Interface 1 Mask 2 register\r
+#define CAN_O_IF1ARB1           0x00000030  // Interface 1 Arbitration 1 reg.\r
+#define CAN_O_IF1ARB2           0x00000034  // Interface 1 Arbitration 2 reg.\r
+#define CAN_O_IF1MCTL           0x00000038  // Interface 1 Message Control reg.\r
+#define CAN_O_IF1DA1            0x0000003C  // Interface 1 DataA 1 register\r
+#define CAN_O_IF1DA2            0x00000040  // Interface 1 DataA 2 register\r
+#define CAN_O_IF1DB1            0x00000044  // Interface 1 DataB 1 register\r
+#define CAN_O_IF1DB2            0x00000048  // Interface 1 DataB 2 register\r
+#define CAN_O_IF2CRQ            0x00000080  // Interface 2 Command Request reg.\r
+#define CAN_O_IF2CMSK           0x00000084  // Interface 2 Command Mask reg.\r
+#define CAN_O_IF2MSK1           0x00000088  // Interface 2 Mask 1 register\r
+#define CAN_O_IF2MSK2           0x0000008C  // Interface 2 Mask 2 register\r
+#define CAN_O_IF2ARB1           0x00000090  // Interface 2 Arbitration 1 reg.\r
+#define CAN_O_IF2ARB2           0x00000094  // Interface 2 Arbitration 2 reg.\r
+#define CAN_O_IF2MCTL           0x00000098  // Interface 2 Message Control reg.\r
+#define CAN_O_IF2DA1            0x0000009C  // Interface 2 DataA 1 register\r
+#define CAN_O_IF2DA2            0x000000A0  // Interface 2 DataA 2 register\r
+#define CAN_O_IF2DB1            0x000000A4  // Interface 2 DataB 1 register\r
+#define CAN_O_IF2DB2            0x000000A8  // Interface 2 DataB 2 register\r
+#define CAN_O_TXRQ1             0x00000100  // Transmission Request 1 register\r
+#define CAN_O_TXRQ2             0x00000104  // Transmission Request 2 register\r
+#define CAN_O_NWDA1             0x00000120  // New Data 1 register\r
+#define CAN_O_NWDA2             0x00000124  // New Data 2 register\r
+#define CAN_O_MSGINT1           0x00000140  // Intr. Pending in Msg Obj 1 reg.\r
+#define CAN_O_MSGINT2           0x00000144  // Intr. Pending in Msg Obj 2 reg.\r
+#define CAN_O_MSGVAL1           0x00000160  // Message Valid in Msg Obj 1 reg.\r
+#define CAN_O_MSGVAL2           0x00000164  // Message Valid in Msg Obj 2 reg.\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the reset values of the can registers.\r
+//\r
+//*****************************************************************************\r
+#define CAN_RV_CTL              0x00000001\r
+#define CAN_RV_STS              0x00000000\r
+#define CAN_RV_ERR              0x00000000\r
+#define CAN_RV_BIT              0x00002301\r
+#define CAN_RV_INT              0x00000000\r
+#define CAN_RV_TST              0x00000000\r
+#define CAN_RV_BRPE             0x00000000\r
+#define CAN_RV_IF1CRQ           0x00000001\r
+#define CAN_RV_IF1CMSK          0x00000000\r
+#define CAN_RV_IF1MSK1          0x0000FFFF\r
+#define CAN_RV_IF1MSK2          0x0000FFFF\r
+#define CAN_RV_IF1ARB1          0x00000000\r
+#define CAN_RV_IF1ARB2          0x00000000\r
+#define CAN_RV_IF1MCTL          0x00000000\r
+#define CAN_RV_IF1DA1           0x00000000\r
+#define CAN_RV_IF1DA2           0x00000000\r
+#define CAN_RV_IF1DB1           0x00000000\r
+#define CAN_RV_IF1DB2           0x00000000\r
+#define CAN_RV_IF2CRQ           0x00000001\r
+#define CAN_RV_IF2CMSK          0x00000000\r
+#define CAN_RV_IF2MSK1          0x0000FFFF\r
+#define CAN_RV_IF2MSK2          0x0000FFFF\r
+#define CAN_RV_IF2ARB1          0x00000000\r
+#define CAN_RV_IF2ARB2          0x00000000\r
+#define CAN_RV_IF2MCTL          0x00000000\r
+#define CAN_RV_IF2DA1           0x00000000\r
+#define CAN_RV_IF2DA2           0x00000000\r
+#define CAN_RV_IF2DB1           0x00000000\r
+#define CAN_RV_IF2DB2           0x00000000\r
+#define CAN_RV_TXRQ1            0x00000000\r
+#define CAN_RV_TXRQ2            0x00000000\r
+#define CAN_RV_NWDA1            0x00000000\r
+#define CAN_RV_NWDA2            0x00000000\r
+#define CAN_RV_MSGINT1          0x00000000\r
+#define CAN_RV_MSGINT2          0x00000000\r
+#define CAN_RV_MSGVAL1          0x00000000\r
+#define CAN_RV_MSGVAL2          0x00000000\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the CAN_CTL register.\r
+//\r
+//*****************************************************************************\r
+#define CAN_CTL_TEST            0x00000080  // Test mode enable\r
+#define CAN_CTL_CCE             0x00000040  // Configuration change enable\r
+#define CAN_CTL_DAR             0x00000020  // Disable automatic retransmission\r
+#define CAN_CTL_EIE             0x00000008  // Error interrupt enable\r
+#define CAN_CTL_SIE             0x00000004  // Status change interrupt enable\r
+#define CAN_CTL_IE              0x00000002  // Module interrupt enable\r
+#define CAN_CTL_INIT            0x00000001  // Initialization\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the CAN_STS register.\r
+//\r
+//*****************************************************************************\r
+#define CAN_STS_BOFF            0x00000080  // Bus Off status\r
+#define CAN_STS_EWARN           0x00000040  // Error Warning status\r
+#define CAN_STS_EPASS           0x00000020  // Error Passive status\r
+#define CAN_STS_RXOK            0x00000010  // Received Message Successful\r
+#define CAN_STS_TXOK            0x00000008  // Transmitted Message Successful\r
+#define CAN_STS_LEC_MSK         0x00000007  // Last Error Code\r
+#define CAN_STS_LEC_NONE        0x00000000  // No error\r
+#define CAN_STS_LEC_STUFF       0x00000001  // Stuff error\r
+#define CAN_STS_LEC_FORM        0x00000002  // Form(at) error\r
+#define CAN_STS_LEC_ACK         0x00000003  // Ack error\r
+#define CAN_STS_LEC_BIT1        0x00000004  // Bit 1 error\r
+#define CAN_STS_LEC_BIT0        0x00000005  // Bit 0 error\r
+#define CAN_STS_LEC_CRC         0x00000006  // CRC error\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the CAN_ERR register.\r
+//\r
+//*****************************************************************************\r
+#define CAN_ERR_RP              0x00008000  // Receive error passive status\r
+#define CAN_ERR_REC_MASK        0x00007F00  // Receive error counter status\r
+#define CAN_ERR_REC_SHIFT       8           // Receive error counter bit pos\r
+#define CAN_ERR_TEC_MASK        0x000000FF  // Transmit error counter status\r
+#define CAN_ERR_TEC_SHIFT       0           // Transmit error counter bit pos\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the CAN_BIT register.\r
+//\r
+//*****************************************************************************\r
+#define CAN_BIT_TSEG2           0x00007000  // Time segment after sample point\r
+#define CAN_BIT_TSEG1           0x00000F00  // Time segment before sample point\r
+#define CAN_BIT_SJW             0x000000C0  // (Re)Synchronization jump width\r
+#define CAN_BIT_BRP             0x0000003F  // Baud rate prescaler\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the CAN_INT register.\r
+//\r
+//*****************************************************************************\r
+#define CAN_INT_INTID_MSK       0x0000FFFF  // Interrupt Identifier\r
+#define CAN_INT_INTID_NONE      0x00000000  // No Interrupt Pending\r
+#define CAN_INT_INTID_STATUS    0x00008000  // Status Interrupt\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the CAN_TST register.\r
+//\r
+//*****************************************************************************\r
+#define CAN_TST_RX              0x00000080  // CAN_RX pin status\r
+#define CAN_TST_TX_MSK          0x00000060  // Overide control of CAN_TX pin\r
+#define CAN_TST_TX_CANCTL       0x00000000  // CAN core controls CAN_TX\r
+#define CAN_TST_TX_SAMPLE       0x00000020  // Sample Point on CAN_TX\r
+#define CAN_TST_TX_DOMINANT     0x00000040  // Dominant value on CAN_TX\r
+#define CAN_TST_TX_RECESSIVE    0x00000060  // Recessive value on CAN_TX\r
+#define CAN_TST_LBACK           0x00000010  // Loop back mode\r
+#define CAN_TST_SILENT          0x00000008  // Silent mode\r
+#define CAN_TST_BASIC           0x00000004  // Basic mode\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the CAN_BRPE register.\r
+//\r
+//*****************************************************************************\r
+#define CAN_BRPE_BRPE           0x0000000F  // Baud rate prescaler extension\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the CAN_IF1CRQ and CAN_IF1CRQ\r
+// registers.\r
+// Note:  All bits may not be available in all registers\r
+//\r
+//*****************************************************************************\r
+#define CAN_IFCRQ_BUSY          0x00008000  // Busy flag status\r
+#define CAN_IFCRQ_MNUM_MSK      0x0000003F  // Message Number\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the CAN_IF1CMSK and CAN_IF2CMSK\r
+// registers.\r
+// Note:  All bits may not be available in all registers\r
+//\r
+//*****************************************************************************\r
+#define CAN_IFCMSK_WRNRD        0x00000080  // Write, not Read\r
+#define CAN_IFCMSK_MASK         0x00000040  // Access Mask Bits\r
+#define CAN_IFCMSK_ARB          0x00000020  // Access Arbitration Bits\r
+#define CAN_IFCMSK_CONTROL      0x00000010  // Access Control Bits\r
+#define CAN_IFCMSK_CLRINTPND    0x00000008  // Clear interrupt pending Bit\r
+#define CAN_IFCMSK_TXRQST       0x00000004  // Access Tx request bit (WRNRD=1)\r
+#define CAN_IFCMSK_NEWDAT       0x00000004  // Access New Data bit (WRNRD=0)\r
+#define CAN_IFCMSK_DATAA        0x00000002  // DataA access - bytes 0 to 3\r
+#define CAN_IFCMSK_DATAB        0x00000001  // DataB access - bytes 4 to 7\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the CAN_IF1MSK1 and CAN_IF2MSK1\r
+// registers.\r
+// Note:  All bits may not be available in all registers\r
+//\r
+//*****************************************************************************\r
+#define CAN_IFMSK1_MSK          0x0000FFFF  // Identifier Mask\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the CAN_IF1MSK2 and CAN_IF2MSK2\r
+// registers.\r
+// Note:  All bits may not be available in all registers\r
+//\r
+//*****************************************************************************\r
+#define CAN_IFMSK2_MXTD         0x00008000  // Mask extended identifier\r
+#define CAN_IFMSK2_MDIR         0x00004000  // Mask message direction\r
+#define CAN_IFMSK2_MSK          0x00001FFF  // Mask identifier\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the CAN_IF1ARB1 and CAN_IF2ARB1\r
+// registers.\r
+// Note:  All bits may not be available in all registers\r
+//\r
+//*****************************************************************************\r
+#define CAN_IFARB1_ID           0x0000FFFF  // Identifier\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the CAN_IF1ARB2 and CAN_IF2ARB2\r
+// registers.\r
+// Note:  All bits may not be available in all registers\r
+//\r
+//*****************************************************************************\r
+#define CAN_IFARB2_MSGVAL       0x00008000  // Message valid\r
+#define CAN_IFARB2_XTD          0x00004000  // Extended identifier\r
+#define CAN_IFARB2_DIR          0x00002000  // Message direction\r
+#define CAN_IFARB2_ID           0x00001FFF  // Message identifier\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the CAN_IF1MCTL and CAN_IF2MCTL\r
+// registers.\r
+// Note:  All bits may not be available in all registers\r
+//\r
+//*****************************************************************************\r
+#define CAN_IFMCTL_NEWDAT       0x00008000  // New Data\r
+#define CAN_IFMCTL_MSGLST       0x00004000  // Message lost\r
+#define CAN_IFMCTL_INTPND       0x00002000  // Interrupt pending\r
+#define CAN_IFMCTL_UMASK        0x00001000  // Use acceptance mask\r
+#define CAN_IFMCTL_TXIE         0x00000800  // Transmit interrupt enable\r
+#define CAN_IFMCTL_RXIE         0x00000400  // Receive interrupt enable\r
+#define CAN_IFMCTL_RMTEN        0x00000200  // Remote enable\r
+#define CAN_IFMCTL_TXRQST       0x00000100  // Transmit request\r
+#define CAN_IFMCTL_EOB          0x00000080  // End of buffer\r
+#define CAN_IFMCTL_DLC          0x0000000F  // Data length code\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the CAN_IF1DA1 and CAN_IF2DA1\r
+// registers.\r
+// Note:  All bits may not be available in all registers\r
+//\r
+//*****************************************************************************\r
+#define CAN_IFDA1_DATA          0x0000FFFF  // Data - bytes 1 and 0\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the CAN_IF1DA2 and CAN_IF2DA2\r
+// registers.\r
+// Note:  All bits may not be available in all registers\r
+//\r
+//*****************************************************************************\r
+#define CAN_IFDA2_DATA          0x0000FFFF  // Data - bytes 3 and 2\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the CAN_IF1DB1 and CAN_IF2DB1\r
+// registers.\r
+// Note:  All bits may not be available in all registers\r
+//\r
+//*****************************************************************************\r
+#define CAN_IFDB1_DATA          0x0000FFFF  // Data - bytes 5 and 4\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the CAN_IF1DB2 and CAN_IF2DB2\r
+// registers.\r
+// Note:  All bits may not be available in all registers\r
+//\r
+//*****************************************************************************\r
+#define CAN_IFDB2_DATA          0x0000FFFF  // Data - bytes 7 and 6\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the CAN_TXRQ1 register.\r
+//\r
+//*****************************************************************************\r
+#define CAN_TXRQ1_TXRQST        0x0000FFFF  // Transmission Request Bits\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the CAN_TXRQ2 register.\r
+//\r
+//*****************************************************************************\r
+#define CAN_TXRQ2_TXRQST        0x0000FFFF  // Transmission Request Bits\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the CAN_NWDA1 register.\r
+//\r
+//*****************************************************************************\r
+#define CAN_NWDA1_NEWDATA       0x0000FFFF  // New Data Bits\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the CAN_NWDA2 register.\r
+//\r
+//*****************************************************************************\r
+#define CAN_NWDA2_NEWDATA       0x0000FFFF  // New Data Bits\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the CAN_MSGINT1 register.\r
+//\r
+//*****************************************************************************\r
+#define CAN_MSGINT1_INTPND      0x0000FFFF  // Interrupt Pending Bits\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the CAN_MSGINT2 register.\r
+//\r
+//*****************************************************************************\r
+#define CAN_MSGINT2_INTPND      0x0000FFFF  // Interrupt Pending Bits\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the CAN_MSGVAL1 register.\r
+//\r
+//*****************************************************************************\r
+#define CAN_MSGVAL1_MSGVAL      0x0000FFFF  // Message Valid Bits\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the CAN_MSGVAL2 register.\r
+//\r
+//*****************************************************************************\r
+#define CAN_MSGVAL2_MSGVAL      0x0000FFFF  // Message Valid Bits\r
+\r
+#endif // __HW_CAN_H__\r

diff --git a/Demo/Common/drivers/LuminaryMicro/hw_comp.h b/Demo/Common/drivers/LuminaryMicro/hw_comp.h
new file mode 100644 (file)
index 0000000..2299016
--- /dev/null
+++ b/Demo/Common/drivers/LuminaryMicro/hw_comp.h
@@ -0,0 +1,118 @@
+//*****************************************************************************\r
+//\r
+// hw_comp.h - Macros used when accessing the comparator hardware.\r
+//\r
+// Copyright (c) 2005-2007 Luminary Micro, Inc.  All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1582 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+#ifndef __HW_COMP_H__\r
+#define __HW_COMP_H__\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the offsets of the comparator registers.\r
+//\r
+//*****************************************************************************\r
+#define COMP_O_MIS              0x00000000  // Interrupt status register\r
+#define COMP_O_RIS              0x00000004  // Raw interrupt status register\r
+#define COMP_O_INTEN            0x00000008  // Interrupt enable register\r
+#define COMP_O_REFCTL           0x00000010  // Reference voltage control reg.\r
+#define COMP_O_ACSTAT0          0x00000020  // Comp0 status register\r
+#define COMP_O_ACCTL0           0x00000024  // Comp0 control register\r
+#define COMP_O_ACSTAT1          0x00000040  // Comp1 status register\r
+#define COMP_O_ACCTL1           0x00000044  // Comp1 control register\r
+#define COMP_O_ACSTAT2          0x00000060  // Comp2 status register\r
+#define COMP_O_ACCTL2           0x00000064  // Comp2 control register\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the COMP_MIS, COMP_RIS, and\r
+// COMP_INTEN registers.\r
+//\r
+//*****************************************************************************\r
+#define COMP_INT_2              0x00000004  // Comp2 interrupt\r
+#define COMP_INT_1              0x00000002  // Comp1 interrupt\r
+#define COMP_INT_0              0x00000001  // Comp0 interrupt\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the COMP_REFCTL register.\r
+//\r
+//*****************************************************************************\r
+#define COMP_REFCTL_EN          0x00000200  // Reference voltage enable\r
+#define COMP_REFCTL_RNG         0x00000100  // Reference voltage range\r
+#define COMP_REFCTL_VREF_MASK   0x0000000F  // Reference voltage select mask\r
+#define COMP_REFCTL_VREF_SHIFT  0\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the COMP_ACSTAT0, COMP_ACSTAT1, and\r
+// COMP_ACSTAT2 registers.\r
+//\r
+//*****************************************************************************\r
+#define COMP_ACSTAT_OVAL        0x00000002  // Comparator output value\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the COMP_ACCTL0, COMP_ACCTL1, and\r
+// COMP_ACCTL2 registers.\r
+//\r
+//*****************************************************************************\r
+#define COMP_ACCTL_TMASK        0x00000800  // Trigger enable\r
+#define COMP_ACCTL_ASRCP_MASK   0x00000600  // Vin+ source select mask\r
+#define COMP_ACCTL_ASRCP_PIN    0x00000000  // Dedicated Comp+ pin\r
+#define COMP_ACCTL_ASRCP_PIN0   0x00000200  // Comp0+ pin\r
+#define COMP_ACCTL_ASRCP_REF    0x00000400  // Internal voltage reference\r
+#define COMP_ACCTL_ASRCP_RES    0x00000600  // Reserved\r
+#define COMP_ACCTL_OEN          0x00000100  // Comparator output enable\r
+#define COMP_ACCTL_TSVAL        0x00000080  // Trigger polarity select\r
+#define COMP_ACCTL_TSEN_MASK    0x00000060  // Trigger sense mask\r
+#define COMP_ACCTL_TSEN_LEVEL   0x00000000  // Trigger is level sense\r
+#define COMP_ACCTL_TSEN_FALL    0x00000020  // Trigger is falling edge\r
+#define COMP_ACCTL_TSEN_RISE    0x00000040  // Trigger is rising edge\r
+#define COMP_ACCTL_TSEN_BOTH    0x00000060  // Trigger is both edges\r
+#define COMP_ACCTL_ISLVAL       0x00000010  // Interrupt polarity select\r
+#define COMP_ACCTL_ISEN_MASK    0x0000000C  // Interrupt sense mask\r
+#define COMP_ACCTL_ISEN_LEVEL   0x00000000  // Interrupt is level sense\r
+#define COMP_ACCTL_ISEN_FALL    0x00000004  // Interrupt is falling edge\r
+#define COMP_ACCTL_ISEN_RISE    0x00000008  // Interrupt is rising edge\r
+#define COMP_ACCTL_ISEN_BOTH    0x0000000C  // Interrupt is both edges\r
+#define COMP_ACCTL_CINV         0x00000002  // Comparator output invert\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the reset values for the comparator registers.\r
+//\r
+//*****************************************************************************\r
+#define COMP_RV_MIS             0x00000000  // Interrupt status register\r
+#define COMP_RV_RIS             0x00000000  // Raw interrupt status register\r
+#define COMP_RV_INTEN           0x00000000  // Interrupt enable register\r
+#define COMP_RV_REFCTL          0x00000000  // Reference voltage control reg.\r
+#define COMP_RV_ACSTAT0         0x00000000  // Comp0 status register\r
+#define COMP_RV_ACCTL0          0x00000000  // Comp0 control register\r
+#define COMP_RV_ACSTAT1         0x00000000  // Comp1 status register\r
+#define COMP_RV_ACCTL1          0x00000000  // Comp1 control register\r
+#define COMP_RV_ACSTAT2         0x00000000  // Comp2 status register\r
+#define COMP_RV_ACCTL2          0x00000000  // Comp2 control register\r
+\r
+#endif // __HW_COMP_H__\r

diff --git a/Demo/Common/drivers/LuminaryMicro/hw_ethernet.h b/Demo/Common/drivers/LuminaryMicro/hw_ethernet.h
new file mode 100644 (file)
index 0000000..d25c415
--- /dev/null
+++ b/Demo/Common/drivers/LuminaryMicro/hw_ethernet.h
@@ -0,0 +1,213 @@
+//*****************************************************************************\r
+//\r
+// hw_ethernet.h - Macros used when accessing the ethernet hardware.\r
+//\r
+// Copyright (c) 2006-2007 Luminary Micro, Inc.  All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1582 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+#ifndef __HW_ETHERNET_H__\r
+#define __HW_ETHERNET_H__\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the offsets of the MAC registers in the Ethernet\r
+// Controller.\r
+//\r
+//*****************************************************************************\r
+#define MAC_O_IS                0x00000000  // Interrupt Status Register\r
+#define MAC_O_IACK              0x00000000  // Interrupt Acknowledge Register\r
+#define MAC_O_IM                0x00000004  // Interrupt Mask Register\r
+#define MAC_O_RCTL              0x00000008  // Receive Control Register\r
+#define MAC_O_TCTL              0x0000000C  // Transmit Control Register\r
+#define MAC_O_DATA              0x00000010  // Data Register\r
+#define MAC_O_IA0               0x00000014  // Individual Address Register 0\r
+#define MAC_O_IA1               0x00000018  // Individual Address Register 1\r
+#define MAC_O_THR               0x0000001C  // Threshold Register\r
+#define MAC_O_MCTL              0x00000020  // Management Control Register\r
+#define MAC_O_MDV               0x00000024  // Management Divider Register\r
+#define MAC_O_MADD              0x00000028  // Management Address Register\r
+#define MAC_O_MTXD              0x0000002C  // Management Transmit Data Reg\r
+#define MAC_O_MRXD              0x00000030  // Management Receive Data Reg\r
+#define MAC_O_NP                0x00000034  // Number of Packets Register\r
+#define MAC_O_TR                0x00000038  // Transmission Request Register\r
+#define MAC_O_TS                0x0000003C  // Timer Support Register\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the reset values of the MAC registers.\r
+//\r
+//*****************************************************************************\r
+#define MAC_RV_IS               0x00000000\r
+#define MAC_RV_IACK             0x00000000\r
+#define MAC_RV_IM               0x0000007F\r
+#define MAC_RV_RCTL             0x00000008\r
+#define MAC_RV_TCTL             0x00000000\r
+#define MAC_RV_DATA             0x00000000\r
+#define MAC_RV_IA0              0x00000000\r
+#define MAC_RV_IA1              0x00000000\r
+#define MAC_RV_THR              0x0000003F\r
+#define MAC_RV_MCTL             0x00000000\r
+#define MAC_RV_MDV              0x00000080\r
+#define MAC_RV_MADD             0x00000000\r
+#define MAC_RV_MTXD             0x00000000\r
+#define MAC_RV_MRXD             0x00000000\r
+#define MAC_RV_NP               0x00000000\r
+#define MAC_RV_TR               0x00000000\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the MAC_IS register.\r
+//\r
+//*****************************************************************************\r
+#define MAC_IS_PHYINT           0x00000040  // PHY Interrupt\r
+#define MAC_IS_MDINT            0x00000020  // MDI Transaction Complete\r
+#define MAC_IS_RXER             0x00000010  // RX Error\r
+#define MAC_IS_FOV              0x00000008  // RX FIFO Overrun\r
+#define MAC_IS_TXEMP            0x00000004  // TX FIFO Empy\r
+#define MAC_IS_TXER             0x00000002  // TX Error\r
+#define MAC_IS_RXINT            0x00000001  // RX Packet Available\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the MAC_IACK register.\r
+//\r
+//*****************************************************************************\r
+#define MAC_IACK_PHYINT         0x00000040  // Clear PHY Interrupt\r
+#define MAC_IACK_MDINT          0x00000020  // Clear MDI Transaction Complete\r
+#define MAC_IACK_RXER           0x00000010  // Clear RX Error\r
+#define MAC_IACK_FOV            0x00000008  // Clear RX FIFO Overrun\r
+#define MAC_IACK_TXEMP          0x00000004  // Clear TX FIFO Empy\r
+#define MAC_IACK_TXER           0x00000002  // Clear TX Error\r
+#define MAC_IACK_RXINT          0x00000001  // Clear RX Packet Available\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the MAC_IM register.\r
+//\r
+//*****************************************************************************\r
+#define MAC_IM_PHYINTM          0x00000040  // Mask PHY Interrupt\r
+#define MAC_IM_MDINTM           0x00000020  // Mask MDI Transaction Complete\r
+#define MAC_IM_RXERM            0x00000010  // Mask RX Error\r
+#define MAC_IM_FOVM             0x00000008  // Mask RX FIFO Overrun\r
+#define MAC_IM_TXEMPM           0x00000004  // Mask TX FIFO Empy\r
+#define MAC_IM_TXERM            0x00000002  // Mask TX Error\r
+#define MAC_IM_RXINTM           0x00000001  // Mask RX Packet Available\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the MAC_RCTL register.\r
+//\r
+//*****************************************************************************\r
+#define MAC_RCTL_RSTFIFO        0x00000010  // Clear the Receive FIFO\r
+#define MAC_RCTL_BADCRC         0x00000008  // Reject Packets With Bad CRC\r
+#define MAC_RCTL_PRMS           0x00000004  // Enable Promiscuous Mode\r
+#define MAC_RCTL_AMUL           0x00000002  // Enable Multicast Packets\r
+#define MAC_RCTL_RXEN           0x00000001  // Enable Ethernet Receiver\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the MAC_TCTL register.\r
+//\r
+//*****************************************************************************\r
+#define MAC_TCTL_DUPLEX         0x00000010  // Enable Duplex mode\r
+#define MAC_TCTL_CRC            0x00000004  // Enable CRC Generation\r
+#define MAC_TCTL_PADEN          0x00000002  // Enable Automatic Padding\r
+#define MAC_TCTL_TXEN           0x00000001  // Enable Ethernet Transmitter\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the MAC_IA0 register.\r
+//\r
+//*****************************************************************************\r
+#define MAC_IA0_MACOCT4         0xFF000000  // 4th Octet of MAC address\r
+#define MAC_IA0_MACOCT3         0x00FF0000  // 3rd Octet of MAC address\r
+#define MAC_IA0_MACOCT2         0x0000FF00  // 2nd Octet of MAC address\r
+#define MAC_IA0_MACOCT1         0x000000FF  // 1st Octet of MAC address\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the MAC_IA1 register.\r
+//\r
+//*****************************************************************************\r
+#define MAC_IA1_MACOCT6         0x0000FF00  // 6th Octet of MAC address\r
+#define MAC_IA1_MACOCT5         0x000000FF  // 5th Octet of MAC address\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the MAC_TXTH register.\r
+//\r
+//*****************************************************************************\r
+#define MAC_THR_THRESH          0x0000003F  // Transmit Threshold Value\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the MAC_MCTL register.\r
+//\r
+//*****************************************************************************\r
+#define MAC_MCTL_REGADR         0x000000F8  // Address for Next MII Transaction\r
+#define MAC_MCTL_WRITE          0x00000002  // Next MII Transaction is Write\r
+#define MAC_MCTL_START          0x00000001  // Start MII Transaction\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the MAC_MDV register.\r
+//\r
+//*****************************************************************************\r
+#define MAC_MDV_DIV             0x000000FF  // Clock Divider for MDC for TX\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the MAC_MTXD register.\r
+//\r
+//*****************************************************************************\r
+#define MAC_MTXD_MDTX           0x0000FFFF  // Data for Next MII Transaction\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the MAC_MRXD register.\r
+//\r
+//*****************************************************************************\r
+#define MAC_MRXD_MDRX           0x0000FFFF  // Data Read from Last MII Trans.\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the MAC_NP register.\r
+//\r
+//*****************************************************************************\r
+#define MAC_NP_NPR              0x0000003F   // Number of RX Frames in FIFO\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the MAC_TXRQ register.\r
+//\r
+//*****************************************************************************\r
+#define MAC_TR_NEWTX            0x00000001  // Start an Ethernet Transmission\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the MAC_TS register.\r
+//\r
+//*****************************************************************************\r
+#define MAC_TS_TSEN             0x00000001  // Enable Timestamp Logic\r
+\r
+#endif // __HW_ETHERNET_H__\r

diff --git a/Demo/Common/drivers/LuminaryMicro/hw_flash.h b/Demo/Common/drivers/LuminaryMicro/hw_flash.h
new file mode 100644 (file)
index 0000000..e4f147b
--- /dev/null
+++ b/Demo/Common/drivers/LuminaryMicro/hw_flash.h
@@ -0,0 +1,147 @@
+//*****************************************************************************\r
+//\r
+// hw_flash.h - Macros used when accessing the flash controller.\r
+//\r
+// Copyright (c) 2005-2007 Luminary Micro, Inc.  All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1582 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+#ifndef __HW_FLASH_H__\r
+#define __HW_FLASH_H__\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the offsets of the FLASH registers.\r
+//\r
+//*****************************************************************************\r
+#define FLASH_FMA               0x400FD000  // Memory address register\r
+#define FLASH_FMD               0x400FD004  // Memory data register\r
+#define FLASH_FMC               0x400FD008  // Memory control register\r
+#define FLASH_FCRIS             0x400FD00c  // Raw interrupt status register\r
+#define FLASH_FCIM              0x400FD010  // Interrupt mask register\r
+#define FLASH_FCMISC            0x400FD014  // Interrupt status register\r
+#define FLASH_FMPRE             0x400FE130  // FLASH read protect register\r
+#define FLASH_FMPPE             0x400FE134  // FLASH program protect register\r
+#define FLASH_USECRL            0x400FE140  // uSec reload register\r
+#define FLASH_FMPRE0            0x400FE200  // FLASH read protect register 0\r
+#define FLASH_FMPRE1            0x400FE204  // FLASH read protect register 1\r
+#define FLASH_FMPRE2            0x400FE208  // FLASH read protect register 2\r
+#define FLASH_FMPRE3            0x400FE20C  // FLASH read protect register 3\r
+#define FLASH_FMPPE0            0x400FE400  // FLASH program protect register 0\r
+#define FLASH_FMPPE1            0x400FE404  // FLASH program protect register 1\r
+#define FLASH_FMPPE2            0x400FE408  // FLASH program protect register 2\r
+#define FLASH_FMPPE3            0x400FE40C  // FLASH program protect register 3\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the FLASH_FMC register.\r
+//\r
+//*****************************************************************************\r
+#define FLASH_FMC_WRKEY_MASK    0xFFFF0000  // FLASH write key mask\r
+#define FLASH_FMC_WRKEY         0xA4420000  // FLASH write key\r
+#define FLASH_FMC_COMT          0x00000008  // Commit user register\r
+#define FLASH_FMC_MERASE        0x00000004  // Mass erase FLASH\r
+#define FLASH_FMC_ERASE         0x00000002  // Erase FLASH page\r
+#define FLASH_FMC_WRITE         0x00000001  // Write FLASH word\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the FLASH_FCRIS register.\r
+//\r
+//*****************************************************************************\r
+#define FLASH_FCRIS_PROGRAM     0x00000002  // Programming status\r
+#define FLASH_FCRIS_ACCESS      0x00000001  // Invalid access status\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the FLASH_FCIM register.\r
+//\r
+//*****************************************************************************\r
+#define FLASH_FCIM_PROGRAM      0x00000002  // Programming mask\r
+#define FLASH_FCIM_ACCESS       0x00000001  // Invalid access mask\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the FLASH_FMIS register.\r
+//\r
+//*****************************************************************************\r
+#define FLASH_FCMISC_PROGRAM    0x00000002  // Programming status\r
+#define FLASH_FCMISC_ACCESS     0x00000001  // Invalid access status\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the FLASH_FMPRE and FLASH_FMPPE\r
+// registers.\r
+//\r
+//*****************************************************************************\r
+#define FLASH_FMP_BLOCK_31      0x80000000  // Enable for block 31\r
+#define FLASH_FMP_BLOCK_30      0x40000000  // Enable for block 30\r
+#define FLASH_FMP_BLOCK_29      0x20000000  // Enable for block 29\r
+#define FLASH_FMP_BLOCK_28      0x10000000  // Enable for block 28\r
+#define FLASH_FMP_BLOCK_27      0x08000000  // Enable for block 27\r
+#define FLASH_FMP_BLOCK_26      0x04000000  // Enable for block 26\r
+#define FLASH_FMP_BLOCK_25      0x02000000  // Enable for block 25\r
+#define FLASH_FMP_BLOCK_24      0x01000000  // Enable for block 24\r
+#define FLASH_FMP_BLOCK_23      0x00800000  // Enable for block 23\r
+#define FLASH_FMP_BLOCK_22      0x00400000  // Enable for block 22\r
+#define FLASH_FMP_BLOCK_21      0x00200000  // Enable for block 21\r
+#define FLASH_FMP_BLOCK_20      0x00100000  // Enable for block 20\r
+#define FLASH_FMP_BLOCK_19      0x00080000  // Enable for block 19\r
+#define FLASH_FMP_BLOCK_18      0x00040000  // Enable for block 18\r
+#define FLASH_FMP_BLOCK_17      0x00020000  // Enable for block 17\r
+#define FLASH_FMP_BLOCK_16      0x00010000  // Enable for block 16\r
+#define FLASH_FMP_BLOCK_15      0x00008000  // Enable for block 15\r
+#define FLASH_FMP_BLOCK_14      0x00004000  // Enable for block 14\r
+#define FLASH_FMP_BLOCK_13      0x00002000  // Enable for block 13\r
+#define FLASH_FMP_BLOCK_12      0x00001000  // Enable for block 12\r
+#define FLASH_FMP_BLOCK_11      0x00000800  // Enable for block 11\r
+#define FLASH_FMP_BLOCK_10      0x00000400  // Enable for block 10\r
+#define FLASH_FMP_BLOCK_9       0x00000200  // Enable for block 9\r
+#define FLASH_FMP_BLOCK_8       0x00000100  // Enable for block 8\r
+#define FLASH_FMP_BLOCK_7       0x00000080  // Enable for block 7\r
+#define FLASH_FMP_BLOCK_6       0x00000040  // Enable for block 6\r
+#define FLASH_FMP_BLOCK_5       0x00000020  // Enable for block 5\r
+#define FLASH_FMP_BLOCK_4       0x00000010  // Enable for block 4\r
+#define FLASH_FMP_BLOCK_3       0x00000008  // Enable for block 3\r
+#define FLASH_FMP_BLOCK_2       0x00000004  // Enable for block 2\r
+#define FLASH_FMP_BLOCK_1       0x00000002  // Enable for block 1\r
+#define FLASH_FMP_BLOCK_0       0x00000001  // Enable for block 0\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the FLASH_USECRL register.\r
+//\r
+//*****************************************************************************\r
+#define FLASH_USECRL_MASK       0x000000FF  // Clock per uSec\r
+#define FLASH_USECRL_SHIFT      0\r
+\r
+//*****************************************************************************\r
+//\r
+// The erase size is the size of the FLASH block that is erased by an erase\r
+// operation, and the protect size is the size of the FLASH block that is\r
+// protected by each protection register.\r
+//\r
+//*****************************************************************************\r
+#define FLASH_ERASE_SIZE        0x00000400\r
+#define FLASH_PROTECT_SIZE      0x00000800\r
+\r
+#endif // __HW_FLASH_H__\r

diff --git a/Demo/Common/drivers/LuminaryMicro/hw_gpio.h b/Demo/Common/drivers/LuminaryMicro/hw_gpio.h
new file mode 100644 (file)
index 0000000..1b6c15a
--- /dev/null
+++ b/Demo/Common/drivers/LuminaryMicro/hw_gpio.h
@@ -0,0 +1,115 @@
+//*****************************************************************************\r
+//\r
+// hw_gpio.h - Defines and Macros for GPIO hardware.\r
+//\r
+// Copyright (c) 2005-2007 Luminary Micro, Inc.  All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1582 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+#ifndef __HW_GPIO_H__\r
+#define __HW_GPIO_H__\r
+\r
+//*****************************************************************************\r
+//\r
+// GPIO Register Offsets.\r
+//\r
+//*****************************************************************************\r
+#define GPIO_O_DATA             0x00000000  // Data register.\r
+#define GPIO_O_DIR              0x00000400  // Data direction register.\r
+#define GPIO_O_IS               0x00000404  // Interrupt sense register.\r
+#define GPIO_O_IBE              0x00000408  // Interrupt both edges register.\r
+#define GPIO_O_IEV              0x0000040C  // Interrupt event register.\r
+#define GPIO_O_IM               0x00000410  // Interrupt mask register.\r
+#define GPIO_O_RIS              0x00000414  // Raw interrupt status register.\r
+#define GPIO_O_MIS              0x00000418  // Masked interrupt status reg.\r
+#define GPIO_O_ICR              0x0000041C  // Interrupt clear register.\r
+#define GPIO_O_AFSEL            0x00000420  // Mode control select register.\r
+#define GPIO_O_DR2R             0x00000500  // 2ma drive select register.\r
+#define GPIO_O_DR4R             0x00000504  // 4ma drive select register.\r
+#define GPIO_O_DR8R             0x00000508  // 8ma drive select register.\r
+#define GPIO_O_ODR              0x0000050C  // Open drain select register.\r
+#define GPIO_O_PUR              0x00000510  // Pull up select register.\r
+#define GPIO_O_PDR              0x00000514  // Pull down select register.\r
+#define GPIO_O_SLR              0x00000518  // Slew rate control enable reg.\r
+#define GPIO_O_DEN              0x0000051C  // Digital input enable register.\r
+#define GPIO_O_LOCK             0x00000520  // Lock register.\r
+#define GPIO_O_CR               0x00000524  // Commit register.\r
+#define GPIO_O_PeriphID4        0x00000FD0  //\r
+#define GPIO_O_PeriphID5        0x00000FD4  //\r
+#define GPIO_O_PeriphID6        0x00000FD8  //\r
+#define GPIO_O_PeriphID7        0x00000FDC  //\r
+#define GPIO_O_PeriphID0        0x00000FE0  //\r
+#define GPIO_O_PeriphID1        0x00000FE4  //\r
+#define GPIO_O_PeriphID2        0x00000FE8  //\r
+#define GPIO_O_PeriphID3        0x00000FEC  //\r
+#define GPIO_O_PCellID0         0x00000FF0  //\r
+#define GPIO_O_PCellID1         0x00000FF4  //\r
+#define GPIO_O_PCellID2         0x00000FF8  //\r
+#define GPIO_O_PCellID3         0x00000FFC  //\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the GPIO_LOCK register.\r
+//\r
+//*****************************************************************************\r
+#define GPIO_LOCK_LOCKED        0x00000001  // GPIO_CR register is locked\r
+#define GPIO_LOCK_UNLOCKED      0x00000000  // GPIO_CR register is unlocked\r
+#define GPIO_LOCK_KEY           0x1ACCE551  // Unlocks the GPIO_CR register\r
+\r
+//*****************************************************************************\r
+//\r
+// GPIO Register reset values.\r
+//\r
+//*****************************************************************************\r
+#define GPIO_RV_DATA            0x00000000  // Data register reset value.\r
+#define GPIO_RV_DIR             0x00000000  // Data direction reg RV.\r
+#define GPIO_RV_IS              0x00000000  // Interrupt sense reg RV.\r
+#define GPIO_RV_IBE             0x00000000  // Interrupt both edges reg RV.\r
+#define GPIO_RV_IEV             0x00000000  // Interrupt event reg RV.\r
+#define GPIO_RV_IM              0x00000000  // Interrupt mask reg RV.\r
+#define GPIO_RV_RIS             0x00000000  // Raw interrupt status reg RV.\r
+#define GPIO_RV_MIS             0x00000000  // Masked interrupt status reg RV.\r
+#define GPIO_RV_IC              0x00000000  // Interrupt clear reg RV.\r
+#define GPIO_RV_AFSEL           0x00000000  // Mode control select reg RV.\r
+#define GPIO_RV_DR2R            0x000000FF  // 2ma drive select reg RV.\r
+#define GPIO_RV_DR4R            0x00000000  // 4ma drive select reg RV.\r
+#define GPIO_RV_DR8R            0x00000000  // 8ma drive select reg RV.\r
+#define GPIO_RV_ODR             0x00000000  // Open drain select reg RV.\r
+#define GPIO_RV_PUR             0x000000FF  // Pull up select reg RV.\r
+#define GPIO_RV_PDR             0x00000000  // Pull down select reg RV.\r
+#define GPIO_RV_SLR             0x00000000  // Slew rate control enable reg RV.\r
+#define GPIO_RV_DEN             0x000000FF  // Digital input enable reg RV.\r
+#define GPIO_RV_LOCK            0x00000001  // Lock register RV.\r
+#define GPIO_RV_PeriphID4       0x00000000  //\r
+#define GPIO_RV_PeriphID5       0x00000000  //\r
+#define GPIO_RV_PeriphID6       0x00000000  //\r
+#define GPIO_RV_PeriphID7       0x00000000  //\r
+#define GPIO_RV_PeriphID0       0x00000061  //\r
+#define GPIO_RV_PeriphID1       0x00000010  //\r
+#define GPIO_RV_PeriphID2       0x00000004  //\r
+#define GPIO_RV_PeriphID3       0x00000000  //\r
+#define GPIO_RV_PCellID0        0x0000000D  //\r
+#define GPIO_RV_PCellID1        0x000000F0  //\r
+#define GPIO_RV_PCellID2        0x00000005  //\r
+#define GPIO_RV_PCellID3        0x000000B1  //\r
+\r
+#endif //  __HW_GPIO_H__\r

diff --git a/Demo/Common/drivers/LuminaryMicro/hw_hibernate.h b/Demo/Common/drivers/LuminaryMicro/hw_hibernate.h
new file mode 100644 (file)
index 0000000..a363cce
--- /dev/null
+++ b/Demo/Common/drivers/LuminaryMicro/hw_hibernate.h
@@ -0,0 +1,145 @@
+//*****************************************************************************\r
+//\r
+// hw_hibernate.h - Defines and Macros for the Hibernation module.\r
+//\r
+// Copyright (c) 2007 Luminary Micro, Inc.  All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1582 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+#ifndef __HW_HIBERNATE_H__\r
+#define __HW_HIBERNATE_H__\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the addresses of the hibernation module registers.\r
+//\r
+//*****************************************************************************\r
+#define HIB_RTCC                0x400fc000  // Hibernate RTC counter\r
+#define HIB_RTCM0               0x400fc004  // Hibernate RTC match 0\r
+#define HIB_RTCM1               0x400fc008  // Hibernate RTC match 1\r
+#define HIB_RTCLD               0x400fc00C  // Hibernate RTC load\r
+#define HIB_CTL                 0x400fc010  // Hibernate RTC control\r
+#define HIB_IM                  0x400fc014  // Hibernate interrupt mask\r
+#define HIB_RIS                 0x400fc018  // Hibernate raw interrupt status\r
+#define HIB_MIS                 0x400fc01C  // Hibernate masked interrupt stat\r
+#define HIB_IC                  0x400fc020  // Hibernate interrupt clear\r
+#define HIB_RTCT                0x400fc024  // Hibernate RTC trim\r
+#define HIB_DATA                0x400fc030  // Hibernate data area\r
+#define HIB_DATA_END            0x400fc130  // end of data area, exclusive\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the Hibernate RTC counter register.\r
+//\r
+//*****************************************************************************\r
+#define HIB_RTCC_MASK           0xffffffff  // RTC counter mask\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the Hibernate RTC match 0 register.\r
+//\r
+//*****************************************************************************\r
+#define HIB_RTCM0_MASK          0xffffffff  // RTC match 0 mask\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the Hibernate RTC match 1 register.\r
+//\r
+//*****************************************************************************\r
+#define HIB_RTCM1_MASK          0xffffffff  // RTC match 1 mask\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the Hibernate RTC load register.\r
+//\r
+//*****************************************************************************\r
+#define HIB_RTCLD_MASK          0xffffffff  // RTC load mask\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the Hibernate control register\r
+//\r
+//*****************************************************************************\r
+#define HIB_CTL_VABORT          0x00000080  // low bat abort\r
+#define HIB_CTL_CLK32EN         0x00000040  // enable clock/oscillator\r
+#define HIB_CTL_LOWBATEN        0x00000020  // enable low battery detect\r
+#define HIB_CTL_PINWEN          0x00000010  // enable wake on WAKE pin\r
+#define HIB_CTL_RTCWEN          0x00000008  // enable wake on RTC match\r
+#define HIB_CTL_CLKSEL          0x00000004  // clock input selection\r
+#define HIB_CTL_HIBREQ          0x00000002  // request hibernation\r
+#define HIB_CTL_RTCEN           0x00000001  // RTC enable\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the Hibernate interrupt mask reg.\r
+//\r
+//*****************************************************************************\r
+#define HIB_IM_EXTW             0x00000008  // wake from external pin interrupt\r
+#define HIB_IM_LOWBAT           0x00000004  // low battery interrupt\r
+#define HIB_IM_RTCALT1          0x00000002  // RTC match 1 interrupt\r
+#define HIB_IM_RTCALT0          0x00000001  // RTC match 0 interrupt\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the Hibernate raw interrupt status.\r
+//\r
+//*****************************************************************************\r
+#define HIB_RIS_EXTW            0x00000008  // wake from external pin interrupt\r
+#define HIB_RIS_LOWBAT          0x00000004  // low battery interrupt\r
+#define HIB_RIS_RTCALT1         0x00000002  // RTC match 1 interrupt\r
+#define HIB_RID_RTCALT0         0x00000001  // RTC match 0 interrupt\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the Hibernate masked int status.\r
+//\r
+//*****************************************************************************\r
+#define HIB_MIS_EXTW            0x00000008  // wake from external pin interrupt\r
+#define HIB_MIS_LOWBAT          0x00000004  // low battery interrupt\r
+#define HIB_MIS_RTCALT1         0x00000002  // RTC match 1 interrupt\r
+#define HIB_MID_RTCALT0         0x00000001  // RTC match 0 interrupt\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the Hibernate interrupt clear reg.\r
+//\r
+//*****************************************************************************\r
+#define HIB_IC_EXTW             0x00000008  // wake from external pin interrupt\r
+#define HIB_IC_LOWBAT           0x00000004  // low battery interrupt\r
+#define HIB_IC_RTCALT1          0x00000002  // RTC match 1 interrupt\r
+#define HIB_IC_RTCALT0          0x00000001  // RTC match 0 interrupt\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the Hibernate RTC trim register.\r
+//\r
+//*****************************************************************************\r
+#define HIB_RTCT_MASK           0x0000ffff  // RTC trim mask\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the Hibernate data register.\r
+//\r
+//*****************************************************************************\r
+#define HIB_DATA_MASK           0xffffffff  // NV memory data mask\r
+\r
+#endif // __HW_HIBERNATE_H__\r

diff --git a/Demo/Common/drivers/LuminaryMicro/hw_i2c.h b/Demo/Common/drivers/LuminaryMicro/hw_i2c.h
new file mode 100644 (file)
index 0000000..0c0d54f
--- /dev/null
+++ b/Demo/Common/drivers/LuminaryMicro/hw_i2c.h
@@ -0,0 +1,197 @@
+//*****************************************************************************\r
+//\r
+// hw_i2c.h - Macros used when accessing the I2C master and slave hardware.\r
+//\r
+// Copyright (c) 2005-2007 Luminary Micro, Inc.  All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1582 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+#ifndef __HW_I2C_H__\r
+#define __HW_I2C_H__\r
+\r
+//*****************************************************************************\r
+//\r
+// The following defines the offset between the I2C master and slave registers.\r
+//\r
+//*****************************************************************************\r
+#define I2C_O_SLAVE             0x00000800  // Offset from master to slave\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the offsets of the I2C master registers.\r
+//\r
+//*****************************************************************************\r
+#define I2C_MASTER_O_SA         0x00000000  // Slave address register\r
+#define I2C_MASTER_O_CS         0x00000004  // Control and Status register\r
+#define I2C_MASTER_O_DR         0x00000008  // Data register\r
+#define I2C_MASTER_O_TPR        0x0000000C  // Timer period register\r
+#define I2C_MASTER_O_IMR        0x00000010  // Interrupt mask register\r
+#define I2C_MASTER_O_RIS        0x00000014  // Raw interrupt status register\r
+#define I2C_MASTER_O_MIS        0x00000018  // Masked interrupt status reg\r
+#define I2C_MASTER_O_MICR       0x0000001c  // Interrupt clear register\r
+#define I2C_MASTER_O_CR         0x00000020  // Configuration register\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the offsets of the I2C slave registers.\r
+//\r
+//*****************************************************************************\r
+#define I2C_SLAVE_O_OAR         0x00000000  // Own address register\r
+#define I2C_SLAVE_O_CSR         0x00000004  // Control/Status register\r
+#define I2C_SLAVE_O_DR          0x00000008  // Data register\r
+#define I2C_SLAVE_O_IM          0x0000000C  // Interrupt mask register\r
+#define I2C_SLAVE_O_RIS         0x00000010  // Raw interrupt status register\r
+#define I2C_SLAVE_O_MIS         0x00000014  // Masked interrupt status reg\r
+#define I2C_SLAVE_O_SICR        0x00000018  // Interrupt clear register\r
+\r
+//*****************************************************************************\r
+//\r
+// The followng define the bit fields in the I2C master slave address register.\r
+//\r
+//*****************************************************************************\r
+#define I2C_MASTER_SA_SA_MASK   0x000000FE  // Slave address\r
+#define I2C_MASTER_SA_RS        0x00000001  // Receive/send\r
+#define I2C_MASTER_SA_SA_SHIFT  1\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the I2C Master Control and Status\r
+// register.\r
+//\r
+//*****************************************************************************\r
+#define I2C_MASTER_CS_ACK       0x00000008  // Acknowlegde\r
+#define I2C_MASTER_CS_STOP      0x00000004  // Stop\r
+#define I2C_MASTER_CS_START     0x00000002  // Start\r
+#define I2C_MASTER_CS_RUN       0x00000001  // Run\r
+#define I2C_MASTER_CS_BUS_BUSY  0x00000040  // Bus busy\r
+#define I2C_MASTER_CS_IDLE      0x00000020  // Idle\r
+#define I2C_MASTER_CS_ARB_LOST  0x00000010  // Lost arbitration\r
+#define I2C_MASTER_CS_DATA_ACK  0x00000008  // Data byte not acknowledged\r
+#define I2C_MASTER_CS_ADDR_ACK  0x00000004  // Address byte not acknowledged\r
+#define I2C_MASTER_CS_ERROR     0x00000002  // Error occurred\r
+#define I2C_MASTER_CS_BUSY      0x00000001  // Controller is TX/RX data\r
+#define I2C_MASTER_CS_ERR_MASK  0x0000001C\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define values used in determining the contents of the I2C\r
+// Master Timer Period register.\r
+//\r
+//*****************************************************************************\r
+#define I2C_MASTER_TPR_SCL_HP   0x00000004  // SCL high period\r
+#define I2C_MASTER_TPR_SCL_LP   0x00000006  // SCL low period\r
+#define I2C_MASTER_TPR_SCL      (I2C_MASTER_TPR_SCL_HP + I2C_MASTER_TPR_SCL_LP)\r
+#define I2C_SCL_STANDARD        100000      // SCL standard frequency\r
+#define I2C_SCL_FAST            400000      // SCL fast frequency\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the I2C Master Interrupt Mask\r
+// register.\r
+//\r
+//*****************************************************************************\r
+#define I2C_MASTER_IMR_IM       0x00000001  // Master interrupt mask\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the I2C Master Raw Interrupt Status\r
+// register.\r
+//\r
+//*****************************************************************************\r
+#define I2C_MASTER_RIS_RIS      0x00000001  // Master raw interrupt status\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the I2C Master Masked Interrupt\r
+// Status register.\r
+//\r
+//*****************************************************************************\r
+#define I2C_MASTER_MIS_MIS      0x00000001  // Master masked interrupt status\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the I2C Master Interrupt Clear\r
+// register.\r
+//\r
+//*****************************************************************************\r
+#define I2C_MASTER_MICR_IC      0x00000001  // Master interrupt clear\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the I2C Master Configuration\r
+// register.\r
+//\r
+//*****************************************************************************\r
+#define I2C_MASTER_CR_SFE       0x00000020  // Slave function enable\r
+#define I2C_MASTER_CR_MFE       0x00000010  // Master function enable\r
+#define I2C_MASTER_CR_LPBK      0x00000001  // Loopback enable\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the I2C Slave Own Address register.\r
+//\r
+//*****************************************************************************\r
+#define I2C_SLAVE_SOAR_OAR_MASK 0x0000007F  // Slave address\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the I2C Slave Control/Status\r
+// register.\r
+//\r
+//*****************************************************************************\r
+#define I2C_SLAVE_CSR_DA        0x00000001  // Enable the device\r
+#define I2C_SLAVE_CSR_TREQ      0x00000002  // Transmit request received\r
+#define I2C_SLAVE_CSR_RREQ      0x00000001  // Receive data from I2C master\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the I2C Slave Interrupt Mask\r
+// register.\r
+//\r
+//*****************************************************************************\r
+#define I2C_SLAVE_IMR_IM       0x00000001  // Slave interrupt mask\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the I2C Slave Raw Interrupt Status\r
+// register.\r
+//\r
+//*****************************************************************************\r
+#define I2C_SLAVE_RIS_RIS      0x00000001  // Slave raw interrupt status\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the I2C Slave Masked Interrupt\r
+// Status register.\r
+//\r
+//*****************************************************************************\r
+#define I2C_SLAVE_MIS_MIS      0x00000001  // Slave masked interrupt status\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the I2C Slave Interrupt Clear\r
+// register.\r
+//\r
+//*****************************************************************************\r
+#define I2C_SLAVE_SICR_IC      0x00000001  // Slave interrupt clear\r
+\r
+#endif // __HW_I2C_H__\r

diff --git a/Demo/Common/drivers/LuminaryMicro/hw_ints.h b/Demo/Common/drivers/LuminaryMicro/hw_ints.h
new file mode 100644 (file)
index 0000000..8e97c65
--- /dev/null
+++ b/Demo/Common/drivers/LuminaryMicro/hw_ints.h
@@ -0,0 +1,114 @@
+//*****************************************************************************\r
+//\r
+// hw_ints.h - Macros that define the interrupt assignment on Stellaris.\r
+//\r
+// Copyright (c) 2005-2007 Luminary Micro, Inc.  All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1582 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+#ifndef __HW_INTS_H__\r
+#define __HW_INTS_H__\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the fault assignments.\r
+//\r
+//*****************************************************************************\r
+#define FAULT_NMI               2           // NMI fault\r
+#define FAULT_HARD              3           // Hard fault\r
+#define FAULT_MPU               4           // MPU fault\r
+#define FAULT_BUS               5           // Bus fault\r
+#define FAULT_USAGE             6           // Usage fault\r
+#define FAULT_SVCALL            11          // SVCall\r
+#define FAULT_DEBUG             12          // Debug monitor\r
+#define FAULT_PENDSV            14          // PendSV\r
+#define FAULT_SYSTICK           15          // System Tick\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the interrupt assignments.\r
+//\r
+//*****************************************************************************\r
+#define INT_GPIOA               16          // GPIO Port A\r
+#define INT_GPIOB               17          // GPIO Port B\r
+#define INT_GPIOC               18          // GPIO Port C\r
+#define INT_GPIOD               19          // GPIO Port D\r
+#define INT_GPIOE               20          // GPIO Port E\r
+#define INT_UART0               21          // UART0 Rx and Tx\r
+#define INT_UART1               22          // UART1 Rx and Tx\r
+#define INT_SSI                 23          // SSI Rx and Tx\r
+#define INT_SSI0                23          // SSI0 Rx and Tx\r
+#define INT_I2C                 24          // I2C Master and Slave\r
+#define INT_I2C0                24          // I2C0 Master and Slave\r
+#define INT_PWM_FAULT           25          // PWM Fault\r
+#define INT_PWM0                26          // PWM Generator 0\r
+#define INT_PWM1                27          // PWM Generator 1\r
+#define INT_PWM2                28          // PWM Generator 2\r
+#define INT_QEI                 29          // Quadrature Encoder\r
+#define INT_QEI0                29          // Quadrature Encoder 0\r
+#define INT_ADC0                30          // ADC Sequence 0\r
+#define INT_ADC1                31          // ADC Sequence 1\r
+#define INT_ADC2                32          // ADC Sequence 2\r
+#define INT_ADC3                33          // ADC Sequence 3\r
+#define INT_WATCHDOG            34          // Watchdog timer\r
+#define INT_TIMER0A             35          // Timer 0 subtimer A\r
+#define INT_TIMER0B             36          // Timer 0 subtimer B\r
+#define INT_TIMER1A             37          // Timer 1 subtimer A\r
+#define INT_TIMER1B             38          // Timer 1 subtimer B\r
+#define INT_TIMER2A             39          // Timer 2 subtimer A\r
+#define INT_TIMER2B             40          // Timer 2 subtimer B\r
+#define INT_COMP0               41          // Analog Comparator 0\r
+#define INT_COMP1               42          // Analog Comparator 1\r
+#define INT_COMP2               43          // Analog Comparator 2\r
+#define INT_SYSCTL              44          // System Control (PLL, OSC, BO)\r
+#define INT_FLASH               45          // FLASH Control\r
+#define INT_GPIOF               46          // GPIO Port F\r
+#define INT_GPIOG               47          // GPIO Port G\r
+#define INT_GPIOH               48          // GPIO Port H\r
+#define INT_UART2               49          // UART2 Rx and Tx\r
+#define INT_SSI1                50          // SSI1 Rx and Tx\r
+#define INT_TIMER3A             51          // Timer 3 subtimer A\r
+#define INT_TIMER3B             52          // Timer 3 subtimer B\r
+#define INT_I2C1                53          // I2C1 Master and Slave\r
+#define INT_QEI1                54          // Quadrature Encoder 1\r
+#define INT_CAN0                55          // CAN0\r
+#define INT_CAN1                56          // CAN1\r
+#define INT_CAN2                57          // CAN2\r
+#define INT_ETH                 58          // Ethernet\r
+#define INT_HIBERNATE           59          // Hibernation module\r
+\r
+//*****************************************************************************\r
+//\r
+// The total number of interrupts.\r
+//\r
+//*****************************************************************************\r
+#define NUM_INTERRUPTS          60\r
+\r
+//*****************************************************************************\r
+//\r
+// The total number of priority levels.\r
+//\r
+//*****************************************************************************\r
+#define NUM_PRIORITY            8\r
+#define NUM_PRIORITY_BITS       3\r
+\r
+#endif // __HW_INTS_H__\r

diff --git a/Demo/Common/drivers/LuminaryMicro/hw_memmap.h b/Demo/Common/drivers/LuminaryMicro/hw_memmap.h
new file mode 100644 (file)
index 0000000..ac1bf2d
--- /dev/null
+++ b/Demo/Common/drivers/LuminaryMicro/hw_memmap.h
@@ -0,0 +1,81 @@
+//*****************************************************************************\r
+//\r
+// hw_memmap.h - Macros defining the memory map of Stellaris.\r
+//\r
+// Copyright (c) 2005-2007 Luminary Micro, Inc.  All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1582 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+#ifndef __HW_MEMMAP_H__\r
+#define __HW_MEMMAP_H__\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the base address of the memories and peripherals.\r
+//\r
+//*****************************************************************************\r
+#define FLASH_BASE              0x00000000  // FLASH memory\r
+#define SRAM_BASE               0x20000000  // SRAM memory\r
+#define WATCHDOG_BASE           0x40000000  // Watchdog\r
+#define GPIO_PORTA_BASE         0x40004000  // GPIO Port A\r
+#define GPIO_PORTB_BASE         0x40005000  // GPIO Port B\r
+#define GPIO_PORTC_BASE         0x40006000  // GPIO Port C\r
+#define GPIO_PORTD_BASE         0x40007000  // GPIO Port D\r
+#define SSI_BASE                0x40008000  // SSI\r
+#define SSI0_BASE               0x40008000  // SSI0\r
+#define SSI1_BASE               0x40009000  // SSI1\r
+#define UART0_BASE              0x4000C000  // UART0\r
+#define UART1_BASE              0x4000D000  // UART1\r
+#define UART2_BASE              0x4000E000  // UART2\r
+#define I2C_MASTER_BASE         0x40020000  // I2C Master\r
+#define I2C_SLAVE_BASE          0x40020800  // I2C Slave\r
+#define I2C0_MASTER_BASE        0x40020000  // I2C0 Master\r
+#define I2C0_SLAVE_BASE         0x40020800  // I2C0 Slave\r
+#define I2C1_MASTER_BASE        0x40021000  // I2C1 Master\r
+#define I2C1_SLAVE_BASE         0x40021800  // I2C1 Slave\r
+#define GPIO_PORTE_BASE         0x40024000  // GPIO Port E\r
+#define GPIO_PORTF_BASE         0x40025000  // GPIO Port F\r
+#define GPIO_PORTG_BASE         0x40026000  // GPIO Port G\r
+#define GPIO_PORTH_BASE         0x40027000  // GPIO Port H\r
+#define PWM_BASE                0x40028000  // PWM\r
+#define QEI_BASE                0x4002C000  // QEI\r
+#define QEI0_BASE               0x4002C000  // QEI0\r
+#define QEI1_BASE               0x4002D000  // QEI1\r
+#define TIMER0_BASE             0x40030000  // Timer0\r
+#define TIMER1_BASE             0x40031000  // Timer1\r
+#define TIMER2_BASE             0x40032000  // Timer2\r
+#define TIMER3_BASE             0x40033000  // Timer3\r
+#define ADC_BASE                0x40038000  // ADC\r
+#define COMP_BASE               0x4003C000  // Analog comparators\r
+#define CAN0_BASE               0x40040000  // CAN0\r
+#define CAN1_BASE               0x40041000  // CAN1\r
+#define CAN2_BASE               0x40042000  // CAN2\r
+#define ETH_BASE                0x40048000  // Ethernet\r
+#define FLASH_CTRL_BASE         0x400FD000  // FLASH Controller\r
+#define SYSCTL_BASE             0x400FE000  // System Control\r
+#define ITM_BASE                0xE0000000  // Instrumentation Trace Macrocell\r
+#define DWT_BASE                0xE0001000  // Data Watchpoint and Trace\r
+#define FPB_BASE                0xE0002000  // FLASH Patch and Breakpoint\r
+#define NVIC_BASE               0xE000E000  // Nested Vectored Interrupt Ctrl\r
+#define TPIU_BASE               0xE0040000  // Trace Port Interface Unit\r
+\r
+#endif // __HW_MEMMAP_H__\r

diff --git a/Demo/Common/drivers/LuminaryMicro/hw_nvic.h b/Demo/Common/drivers/LuminaryMicro/hw_nvic.h
new file mode 100644 (file)
index 0000000..862f40c
--- /dev/null
+++ b/Demo/Common/drivers/LuminaryMicro/hw_nvic.h
@@ -0,0 +1,1050 @@
+//*****************************************************************************\r
+//\r
+// hw_nvic.h - Macros used when accessing the NVIC hardware.\r
+//\r
+// Copyright (c) 2005-2007 Luminary Micro, Inc.  All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1582 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+#ifndef __HW_NVIC_H__\r
+#define __HW_NVIC_H__\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the addresses of the NVIC registers.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_INT_TYPE           0xE000E004  // Interrupt Controller Type Reg.\r
+#define NVIC_ST_CTRL            0xE000E010  // SysTick Control and Status Reg.\r
+#define NVIC_ST_RELOAD          0xE000E014  // SysTick Reload Value Register\r
+#define NVIC_ST_CURRENT         0xE000E018  // SysTick Current Value Register\r
+#define NVIC_ST_CAL             0xE000E01C  // SysTick Calibration Value Reg.\r
+#define NVIC_EN0                0xE000E100  // IRQ 0 to 31 Set Enable Register\r
+#define NVIC_EN1                0xE000E104  // IRQ 32 to 63 Set Enable Register\r
+#define NVIC_DIS0               0xE000E180  // IRQ 0 to 31 Clear Enable Reg.\r
+#define NVIC_DIS1               0xE000E184  // IRQ 32 to 63 Clear Enable Reg.\r
+#define NVIC_PEND0              0xE000E200  // IRQ 0 to 31 Set Pending Register\r
+#define NVIC_PEND1              0xE000E204  // IRQ 32 to 63 Set Pending Reg.\r
+#define NVIC_UNPEND0            0xE000E280  // IRQ 0 to 31 Clear Pending Reg.\r
+#define NVIC_UNPEND1            0xE000E284  // IRQ 32 to 63 Clear Pending Reg.\r
+#define NVIC_ACTIVE0            0xE000E300  // IRQ 0 to 31 Active Register\r
+#define NVIC_ACTIVE1            0xE000E304  // IRQ 32 to 63 Active Register\r
+#define NVIC_PRI0               0xE000E400  // IRQ 0 to 3 Priority Register\r
+#define NVIC_PRI1               0xE000E404  // IRQ 4 to 7 Priority Register\r
+#define NVIC_PRI2               0xE000E408  // IRQ 8 to 11 Priority Register\r
+#define NVIC_PRI3               0xE000E40C  // IRQ 12 to 15 Priority Register\r
+#define NVIC_PRI4               0xE000E410  // IRQ 16 to 19 Priority Register\r
+#define NVIC_PRI5               0xE000E414  // IRQ 20 to 23 Priority Register\r
+#define NVIC_PRI6               0xE000E418  // IRQ 24 to 27 Priority Register\r
+#define NVIC_PRI7               0xE000E41C  // IRQ 28 to 31 Priority Register\r
+#define NVIC_PRI8               0xE000E420  // IRQ 32 to 35 Priority Register\r
+#define NVIC_PRI9               0xE000E424  // IRQ 36 to 39 Priority Register\r
+#define NVIC_PRI10              0xE000E428  // IRQ 40 to 43 Priority Register\r
+#define NVIC_CPUID              0xE000ED00  // CPUID Base Register\r
+#define NVIC_INT_CTRL           0xE000ED04  // Interrupt Control State Register\r
+#define NVIC_VTABLE             0xE000ED08  // Vector Table Offset Register\r
+#define NVIC_APINT              0xE000ED0C  // App. Int & Reset Control Reg.\r
+#define NVIC_SYS_CTRL           0xE000ED10  // System Control Register\r
+#define NVIC_CFG_CTRL           0xE000ED14  // Configuration Control Register\r
+#define NVIC_SYS_PRI1           0xE000ED18  // Sys. Handlers 4 to 7 Priority\r
+#define NVIC_SYS_PRI2           0xE000ED1C  // Sys. Handlers 8 to 11 Priority\r
+#define NVIC_SYS_PRI3           0xE000ED20  // Sys. Handlers 12 to 15 Priority\r
+#define NVIC_SYS_HND_CTRL       0xE000ED24  // System Handler Control and State\r
+#define NVIC_FAULT_STAT         0xE000ED28  // Configurable Fault Status Reg.\r
+#define NVIC_HFAULT_STAT        0xE000ED2C  // Hard Fault Status Register\r
+#define NVIC_DEBUG_STAT         0xE000ED30  // Debug Status Register\r
+#define NVIC_MM_ADDR            0xE000ED34  // Mem Manage Address Register\r
+#define NVIC_FAULT_ADDR         0xE000ED38  // Bus Fault Address Register\r
+#define NVIC_MPU_TYPE           0xE000ED90  // MPU Type Register\r
+#define NVIC_MPU_CTRL           0xE000ED94  // MPU Control Register\r
+#define NVIC_MPU_NUMBER         0xE000ED98  // MPU Region Number Register\r
+#define NVIC_MPU_BASE           0xE000ED9C  // MPU Region Base Address Register\r
+#define NVIC_MPU_ATTR           0xE000EDA0  // MPU Region Attribute & Size Reg.\r
+#define NVIC_DBG_CTRL           0xE000EDF0  // Debug Control and Status Reg.\r
+#define NVIC_DBG_XFER           0xE000EDF4  // Debug Core Reg. Transfer Select\r
+#define NVIC_DBG_DATA           0xE000EDF8  // Debug Core Register Data\r
+#define NVIC_DBG_INT            0xE000EDFC  // Debug Reset Interrupt Control\r
+#define NVIC_SW_TRIG            0xE000EF00  // Software Trigger Interrupt Reg.\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_INT_TYPE register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_INT_TYPE_LINES_M   0x0000001F  // Number of interrupt lines (x32)\r
+#define NVIC_INT_TYPE_LINES_S   0\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_ST_CTRL register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_ST_CTRL_COUNT      0x00010000  // Count flag\r
+#define NVIC_ST_CTRL_CLK_SRC    0x00000004  // Clock Source\r
+#define NVIC_ST_CTRL_INTEN      0x00000002  // Interrupt enable\r
+#define NVIC_ST_CTRL_ENABLE     0x00000001  // Counter mode\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_ST_RELOAD register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_ST_RELOAD_M        0x00FFFFFF  // Counter load value\r
+#define NVIC_ST_RELOAD_S        0\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_ST_CURRENT register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_ST_CURRENT_M       0x00FFFFFF  // Counter current value\r
+#define NVIC_ST_CURRENT_S       0\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_ST_CAL register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_ST_CAL_NOREF       0x80000000  // No reference clock\r
+#define NVIC_ST_CAL_SKEW        0x40000000  // Clock skew\r
+#define NVIC_ST_CAL_ONEMS_M     0x00FFFFFF  // 1ms reference value\r
+#define NVIC_ST_CAL_ONEMS_S     0\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_EN0 register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_EN0_INT31          0x80000000  // Interrupt 31 enable\r
+#define NVIC_EN0_INT30          0x40000000  // Interrupt 30 enable\r
+#define NVIC_EN0_INT29          0x20000000  // Interrupt 29 enable\r
+#define NVIC_EN0_INT28          0x10000000  // Interrupt 28 enable\r
+#define NVIC_EN0_INT27          0x08000000  // Interrupt 27 enable\r
+#define NVIC_EN0_INT26          0x04000000  // Interrupt 26 enable\r
+#define NVIC_EN0_INT25          0x02000000  // Interrupt 25 enable\r
+#define NVIC_EN0_INT24          0x01000000  // Interrupt 24 enable\r
+#define NVIC_EN0_INT23          0x00800000  // Interrupt 23 enable\r
+#define NVIC_EN0_INT22          0x00400000  // Interrupt 22 enable\r
+#define NVIC_EN0_INT21          0x00200000  // Interrupt 21 enable\r
+#define NVIC_EN0_INT20          0x00100000  // Interrupt 20 enable\r
+#define NVIC_EN0_INT19          0x00080000  // Interrupt 19 enable\r
+#define NVIC_EN0_INT18          0x00040000  // Interrupt 18 enable\r
+#define NVIC_EN0_INT17          0x00020000  // Interrupt 17 enable\r
+#define NVIC_EN0_INT16          0x00010000  // Interrupt 16 enable\r
+#define NVIC_EN0_INT15          0x00008000  // Interrupt 15 enable\r
+#define NVIC_EN0_INT14          0x00004000  // Interrupt 14 enable\r
+#define NVIC_EN0_INT13          0x00002000  // Interrupt 13 enable\r
+#define NVIC_EN0_INT12          0x00001000  // Interrupt 12 enable\r
+#define NVIC_EN0_INT11          0x00000800  // Interrupt 11 enable\r
+#define NVIC_EN0_INT10          0x00000400  // Interrupt 10 enable\r
+#define NVIC_EN0_INT9           0x00000200  // Interrupt 9 enable\r
+#define NVIC_EN0_INT8           0x00000100  // Interrupt 8 enable\r
+#define NVIC_EN0_INT7           0x00000080  // Interrupt 7 enable\r
+#define NVIC_EN0_INT6           0x00000040  // Interrupt 6 enable\r
+#define NVIC_EN0_INT5           0x00000020  // Interrupt 5 enable\r
+#define NVIC_EN0_INT4           0x00000010  // Interrupt 4 enable\r
+#define NVIC_EN0_INT3           0x00000008  // Interrupt 3 enable\r
+#define NVIC_EN0_INT2           0x00000004  // Interrupt 2 enable\r
+#define NVIC_EN0_INT1           0x00000002  // Interrupt 1 enable\r
+#define NVIC_EN0_INT0           0x00000001  // Interrupt 0 enable\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_EN1 register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_EN1_INT59          0x08000000  // Interrupt 59 enable\r
+#define NVIC_EN1_INT58          0x04000000  // Interrupt 58 enable\r
+#define NVIC_EN1_INT57          0x02000000  // Interrupt 57 enable\r
+#define NVIC_EN1_INT56          0x01000000  // Interrupt 56 enable\r
+#define NVIC_EN1_INT55          0x00800000  // Interrupt 55 enable\r
+#define NVIC_EN1_INT54          0x00400000  // Interrupt 54 enable\r
+#define NVIC_EN1_INT53          0x00200000  // Interrupt 53 enable\r
+#define NVIC_EN1_INT52          0x00100000  // Interrupt 52 enable\r
+#define NVIC_EN1_INT51          0x00080000  // Interrupt 51 enable\r
+#define NVIC_EN1_INT50          0x00040000  // Interrupt 50 enable\r
+#define NVIC_EN1_INT49          0x00020000  // Interrupt 49 enable\r
+#define NVIC_EN1_INT48          0x00010000  // Interrupt 48 enable\r
+#define NVIC_EN1_INT47          0x00008000  // Interrupt 47 enable\r
+#define NVIC_EN1_INT46          0x00004000  // Interrupt 46 enable\r
+#define NVIC_EN1_INT45          0x00002000  // Interrupt 45 enable\r
+#define NVIC_EN1_INT44          0x00001000  // Interrupt 44 enable\r
+#define NVIC_EN1_INT43          0x00000800  // Interrupt 43 enable\r
+#define NVIC_EN1_INT42          0x00000400  // Interrupt 42 enable\r
+#define NVIC_EN1_INT41          0x00000200  // Interrupt 41 enable\r
+#define NVIC_EN1_INT40          0x00000100  // Interrupt 40 enable\r
+#define NVIC_EN1_INT39          0x00000080  // Interrupt 39 enable\r
+#define NVIC_EN1_INT38          0x00000040  // Interrupt 38 enable\r
+#define NVIC_EN1_INT37          0x00000020  // Interrupt 37 enable\r
+#define NVIC_EN1_INT36          0x00000010  // Interrupt 36 enable\r
+#define NVIC_EN1_INT35          0x00000008  // Interrupt 35 enable\r
+#define NVIC_EN1_INT34          0x00000004  // Interrupt 34 enable\r
+#define NVIC_EN1_INT33          0x00000002  // Interrupt 33 enable\r
+#define NVIC_EN1_INT32          0x00000001  // Interrupt 32 enable\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_DIS0 register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_DIS0_INT31         0x80000000  // Interrupt 31 disable\r
+#define NVIC_DIS0_INT30         0x40000000  // Interrupt 30 disable\r
+#define NVIC_DIS0_INT29         0x20000000  // Interrupt 29 disable\r
+#define NVIC_DIS0_INT28         0x10000000  // Interrupt 28 disable\r
+#define NVIC_DIS0_INT27         0x08000000  // Interrupt 27 disable\r
+#define NVIC_DIS0_INT26         0x04000000  // Interrupt 26 disable\r
+#define NVIC_DIS0_INT25         0x02000000  // Interrupt 25 disable\r
+#define NVIC_DIS0_INT24         0x01000000  // Interrupt 24 disable\r
+#define NVIC_DIS0_INT23         0x00800000  // Interrupt 23 disable\r
+#define NVIC_DIS0_INT22         0x00400000  // Interrupt 22 disable\r
+#define NVIC_DIS0_INT21         0x00200000  // Interrupt 21 disable\r
+#define NVIC_DIS0_INT20         0x00100000  // Interrupt 20 disable\r
+#define NVIC_DIS0_INT19         0x00080000  // Interrupt 19 disable\r
+#define NVIC_DIS0_INT18         0x00040000  // Interrupt 18 disable\r
+#define NVIC_DIS0_INT17         0x00020000  // Interrupt 17 disable\r
+#define NVIC_DIS0_INT16         0x00010000  // Interrupt 16 disable\r
+#define NVIC_DIS0_INT15         0x00008000  // Interrupt 15 disable\r
+#define NVIC_DIS0_INT14         0x00004000  // Interrupt 14 disable\r
+#define NVIC_DIS0_INT13         0x00002000  // Interrupt 13 disable\r
+#define NVIC_DIS0_INT12         0x00001000  // Interrupt 12 disable\r
+#define NVIC_DIS0_INT11         0x00000800  // Interrupt 11 disable\r
+#define NVIC_DIS0_INT10         0x00000400  // Interrupt 10 disable\r
+#define NVIC_DIS0_INT9          0x00000200  // Interrupt 9 disable\r
+#define NVIC_DIS0_INT8          0x00000100  // Interrupt 8 disable\r
+#define NVIC_DIS0_INT7          0x00000080  // Interrupt 7 disable\r
+#define NVIC_DIS0_INT6          0x00000040  // Interrupt 6 disable\r
+#define NVIC_DIS0_INT5          0x00000020  // Interrupt 5 disable\r
+#define NVIC_DIS0_INT4          0x00000010  // Interrupt 4 disable\r
+#define NVIC_DIS0_INT3          0x00000008  // Interrupt 3 disable\r
+#define NVIC_DIS0_INT2          0x00000004  // Interrupt 2 disable\r
+#define NVIC_DIS0_INT1          0x00000002  // Interrupt 1 disable\r
+#define NVIC_DIS0_INT0          0x00000001  // Interrupt 0 disable\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_DIS1 register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_DIS1_INT59         0x08000000  // Interrupt 59 disable\r
+#define NVIC_DIS1_INT58         0x04000000  // Interrupt 58 disable\r
+#define NVIC_DIS1_INT57         0x02000000  // Interrupt 57 disable\r
+#define NVIC_DIS1_INT56         0x01000000  // Interrupt 56 disable\r
+#define NVIC_DIS1_INT55         0x00800000  // Interrupt 55 disable\r
+#define NVIC_DIS1_INT54         0x00400000  // Interrupt 54 disable\r
+#define NVIC_DIS1_INT53         0x00200000  // Interrupt 53 disable\r
+#define NVIC_DIS1_INT52         0x00100000  // Interrupt 52 disable\r
+#define NVIC_DIS1_INT51         0x00080000  // Interrupt 51 disable\r
+#define NVIC_DIS1_INT50         0x00040000  // Interrupt 50 disable\r
+#define NVIC_DIS1_INT49         0x00020000  // Interrupt 49 disable\r
+#define NVIC_DIS1_INT48         0x00010000  // Interrupt 48 disable\r
+#define NVIC_DIS1_INT47         0x00008000  // Interrupt 47 disable\r
+#define NVIC_DIS1_INT46         0x00004000  // Interrupt 46 disable\r
+#define NVIC_DIS1_INT45         0x00002000  // Interrupt 45 disable\r
+#define NVIC_DIS1_INT44         0x00001000  // Interrupt 44 disable\r
+#define NVIC_DIS1_INT43         0x00000800  // Interrupt 43 disable\r
+#define NVIC_DIS1_INT42         0x00000400  // Interrupt 42 disable\r
+#define NVIC_DIS1_INT41         0x00000200  // Interrupt 41 disable\r
+#define NVIC_DIS1_INT40         0x00000100  // Interrupt 40 disable\r
+#define NVIC_DIS1_INT39         0x00000080  // Interrupt 39 disable\r
+#define NVIC_DIS1_INT38         0x00000040  // Interrupt 38 disable\r
+#define NVIC_DIS1_INT37         0x00000020  // Interrupt 37 disable\r
+#define NVIC_DIS1_INT36         0x00000010  // Interrupt 36 disable\r
+#define NVIC_DIS1_INT35         0x00000008  // Interrupt 35 disable\r
+#define NVIC_DIS1_INT34         0x00000004  // Interrupt 34 disable\r
+#define NVIC_DIS1_INT33         0x00000002  // Interrupt 33 disable\r
+#define NVIC_DIS1_INT32         0x00000001  // Interrupt 32 disable\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_PEND0 register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_PEND0_INT31        0x80000000  // Interrupt 31 pend\r
+#define NVIC_PEND0_INT30        0x40000000  // Interrupt 30 pend\r
+#define NVIC_PEND0_INT29        0x20000000  // Interrupt 29 pend\r
+#define NVIC_PEND0_INT28        0x10000000  // Interrupt 28 pend\r
+#define NVIC_PEND0_INT27        0x08000000  // Interrupt 27 pend\r
+#define NVIC_PEND0_INT26        0x04000000  // Interrupt 26 pend\r
+#define NVIC_PEND0_INT25        0x02000000  // Interrupt 25 pend\r
+#define NVIC_PEND0_INT24        0x01000000  // Interrupt 24 pend\r
+#define NVIC_PEND0_INT23        0x00800000  // Interrupt 23 pend\r
+#define NVIC_PEND0_INT22        0x00400000  // Interrupt 22 pend\r
+#define NVIC_PEND0_INT21        0x00200000  // Interrupt 21 pend\r
+#define NVIC_PEND0_INT20        0x00100000  // Interrupt 20 pend\r
+#define NVIC_PEND0_INT19        0x00080000  // Interrupt 19 pend\r
+#define NVIC_PEND0_INT18        0x00040000  // Interrupt 18 pend\r
+#define NVIC_PEND0_INT17        0x00020000  // Interrupt 17 pend\r
+#define NVIC_PEND0_INT16        0x00010000  // Interrupt 16 pend\r
+#define NVIC_PEND0_INT15        0x00008000  // Interrupt 15 pend\r
+#define NVIC_PEND0_INT14        0x00004000  // Interrupt 14 pend\r
+#define NVIC_PEND0_INT13        0x00002000  // Interrupt 13 pend\r
+#define NVIC_PEND0_INT12        0x00001000  // Interrupt 12 pend\r
+#define NVIC_PEND0_INT11        0x00000800  // Interrupt 11 pend\r
+#define NVIC_PEND0_INT10        0x00000400  // Interrupt 10 pend\r
+#define NVIC_PEND0_INT9         0x00000200  // Interrupt 9 pend\r
+#define NVIC_PEND0_INT8         0x00000100  // Interrupt 8 pend\r
+#define NVIC_PEND0_INT7         0x00000080  // Interrupt 7 pend\r
+#define NVIC_PEND0_INT6         0x00000040  // Interrupt 6 pend\r
+#define NVIC_PEND0_INT5         0x00000020  // Interrupt 5 pend\r
+#define NVIC_PEND0_INT4         0x00000010  // Interrupt 4 pend\r
+#define NVIC_PEND0_INT3         0x00000008  // Interrupt 3 pend\r
+#define NVIC_PEND0_INT2         0x00000004  // Interrupt 2 pend\r
+#define NVIC_PEND0_INT1         0x00000002  // Interrupt 1 pend\r
+#define NVIC_PEND0_INT0         0x00000001  // Interrupt 0 pend\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_PEND1 register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_PEND1_INT59        0x08000000  // Interrupt 59 pend\r
+#define NVIC_PEND1_INT58        0x04000000  // Interrupt 58 pend\r
+#define NVIC_PEND1_INT57        0x02000000  // Interrupt 57 pend\r
+#define NVIC_PEND1_INT56        0x01000000  // Interrupt 56 pend\r
+#define NVIC_PEND1_INT55        0x00800000  // Interrupt 55 pend\r
+#define NVIC_PEND1_INT54        0x00400000  // Interrupt 54 pend\r
+#define NVIC_PEND1_INT53        0x00200000  // Interrupt 53 pend\r
+#define NVIC_PEND1_INT52        0x00100000  // Interrupt 52 pend\r
+#define NVIC_PEND1_INT51        0x00080000  // Interrupt 51 pend\r
+#define NVIC_PEND1_INT50        0x00040000  // Interrupt 50 pend\r
+#define NVIC_PEND1_INT49        0x00020000  // Interrupt 49 pend\r
+#define NVIC_PEND1_INT48        0x00010000  // Interrupt 48 pend\r
+#define NVIC_PEND1_INT47        0x00008000  // Interrupt 47 pend\r
+#define NVIC_PEND1_INT46        0x00004000  // Interrupt 46 pend\r
+#define NVIC_PEND1_INT45        0x00002000  // Interrupt 45 pend\r
+#define NVIC_PEND1_INT44        0x00001000  // Interrupt 44 pend\r
+#define NVIC_PEND1_INT43        0x00000800  // Interrupt 43 pend\r
+#define NVIC_PEND1_INT42        0x00000400  // Interrupt 42 pend\r
+#define NVIC_PEND1_INT41        0x00000200  // Interrupt 41 pend\r
+#define NVIC_PEND1_INT40        0x00000100  // Interrupt 40 pend\r
+#define NVIC_PEND1_INT39        0x00000080  // Interrupt 39 pend\r
+#define NVIC_PEND1_INT38        0x00000040  // Interrupt 38 pend\r
+#define NVIC_PEND1_INT37        0x00000020  // Interrupt 37 pend\r
+#define NVIC_PEND1_INT36        0x00000010  // Interrupt 36 pend\r
+#define NVIC_PEND1_INT35        0x00000008  // Interrupt 35 pend\r
+#define NVIC_PEND1_INT34        0x00000004  // Interrupt 34 pend\r
+#define NVIC_PEND1_INT33        0x00000002  // Interrupt 33 pend\r
+#define NVIC_PEND1_INT32        0x00000001  // Interrupt 32 pend\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_UNPEND0 register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_UNPEND0_INT31      0x80000000  // Interrupt 31 unpend\r
+#define NVIC_UNPEND0_INT30      0x40000000  // Interrupt 30 unpend\r
+#define NVIC_UNPEND0_INT29      0x20000000  // Interrupt 29 unpend\r
+#define NVIC_UNPEND0_INT28      0x10000000  // Interrupt 28 unpend\r
+#define NVIC_UNPEND0_INT27      0x08000000  // Interrupt 27 unpend\r
+#define NVIC_UNPEND0_INT26      0x04000000  // Interrupt 26 unpend\r
+#define NVIC_UNPEND0_INT25      0x02000000  // Interrupt 25 unpend\r
+#define NVIC_UNPEND0_INT24      0x01000000  // Interrupt 24 unpend\r
+#define NVIC_UNPEND0_INT23      0x00800000  // Interrupt 23 unpend\r
+#define NVIC_UNPEND0_INT22      0x00400000  // Interrupt 22 unpend\r
+#define NVIC_UNPEND0_INT21      0x00200000  // Interrupt 21 unpend\r
+#define NVIC_UNPEND0_INT20      0x00100000  // Interrupt 20 unpend\r
+#define NVIC_UNPEND0_INT19      0x00080000  // Interrupt 19 unpend\r
+#define NVIC_UNPEND0_INT18      0x00040000  // Interrupt 18 unpend\r
+#define NVIC_UNPEND0_INT17      0x00020000  // Interrupt 17 unpend\r
+#define NVIC_UNPEND0_INT16      0x00010000  // Interrupt 16 unpend\r
+#define NVIC_UNPEND0_INT15      0x00008000  // Interrupt 15 unpend\r
+#define NVIC_UNPEND0_INT14      0x00004000  // Interrupt 14 unpend\r
+#define NVIC_UNPEND0_INT13      0x00002000  // Interrupt 13 unpend\r
+#define NVIC_UNPEND0_INT12      0x00001000  // Interrupt 12 unpend\r
+#define NVIC_UNPEND0_INT11      0x00000800  // Interrupt 11 unpend\r
+#define NVIC_UNPEND0_INT10      0x00000400  // Interrupt 10 unpend\r
+#define NVIC_UNPEND0_INT9       0x00000200  // Interrupt 9 unpend\r
+#define NVIC_UNPEND0_INT8       0x00000100  // Interrupt 8 unpend\r
+#define NVIC_UNPEND0_INT7       0x00000080  // Interrupt 7 unpend\r
+#define NVIC_UNPEND0_INT6       0x00000040  // Interrupt 6 unpend\r
+#define NVIC_UNPEND0_INT5       0x00000020  // Interrupt 5 unpend\r
+#define NVIC_UNPEND0_INT4       0x00000010  // Interrupt 4 unpend\r
+#define NVIC_UNPEND0_INT3       0x00000008  // Interrupt 3 unpend\r
+#define NVIC_UNPEND0_INT2       0x00000004  // Interrupt 2 unpend\r
+#define NVIC_UNPEND0_INT1       0x00000002  // Interrupt 1 unpend\r
+#define NVIC_UNPEND0_INT0       0x00000001  // Interrupt 0 unpend\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_UNPEND1 register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_UNPEND1_INT59      0x08000000  // Interrupt 59 unpend\r
+#define NVIC_UNPEND1_INT58      0x04000000  // Interrupt 58 unpend\r
+#define NVIC_UNPEND1_INT57      0x02000000  // Interrupt 57 unpend\r
+#define NVIC_UNPEND1_INT56      0x01000000  // Interrupt 56 unpend\r
+#define NVIC_UNPEND1_INT55      0x00800000  // Interrupt 55 unpend\r
+#define NVIC_UNPEND1_INT54      0x00400000  // Interrupt 54 unpend\r
+#define NVIC_UNPEND1_INT53      0x00200000  // Interrupt 53 unpend\r
+#define NVIC_UNPEND1_INT52      0x00100000  // Interrupt 52 unpend\r
+#define NVIC_UNPEND1_INT51      0x00080000  // Interrupt 51 unpend\r
+#define NVIC_UNPEND1_INT50      0x00040000  // Interrupt 50 unpend\r
+#define NVIC_UNPEND1_INT49      0x00020000  // Interrupt 49 unpend\r
+#define NVIC_UNPEND1_INT48      0x00010000  // Interrupt 48 unpend\r
+#define NVIC_UNPEND1_INT47      0x00008000  // Interrupt 47 unpend\r
+#define NVIC_UNPEND1_INT46      0x00004000  // Interrupt 46 unpend\r
+#define NVIC_UNPEND1_INT45      0x00002000  // Interrupt 45 unpend\r
+#define NVIC_UNPEND1_INT44      0x00001000  // Interrupt 44 unpend\r
+#define NVIC_UNPEND1_INT43      0x00000800  // Interrupt 43 unpend\r
+#define NVIC_UNPEND1_INT42      0x00000400  // Interrupt 42 unpend\r
+#define NVIC_UNPEND1_INT41      0x00000200  // Interrupt 41 unpend\r
+#define NVIC_UNPEND1_INT40      0x00000100  // Interrupt 40 unpend\r
+#define NVIC_UNPEND1_INT39      0x00000080  // Interrupt 39 unpend\r
+#define NVIC_UNPEND1_INT38      0x00000040  // Interrupt 38 unpend\r
+#define NVIC_UNPEND1_INT37      0x00000020  // Interrupt 37 unpend\r
+#define NVIC_UNPEND1_INT36      0x00000010  // Interrupt 36 unpend\r
+#define NVIC_UNPEND1_INT35      0x00000008  // Interrupt 35 unpend\r
+#define NVIC_UNPEND1_INT34      0x00000004  // Interrupt 34 unpend\r
+#define NVIC_UNPEND1_INT33      0x00000002  // Interrupt 33 unpend\r
+#define NVIC_UNPEND1_INT32      0x00000001  // Interrupt 32 unpend\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_ACTIVE0 register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_ACTIVE0_INT31      0x80000000  // Interrupt 31 active\r
+#define NVIC_ACTIVE0_INT30      0x40000000  // Interrupt 30 active\r
+#define NVIC_ACTIVE0_INT29      0x20000000  // Interrupt 29 active\r
+#define NVIC_ACTIVE0_INT28      0x10000000  // Interrupt 28 active\r
+#define NVIC_ACTIVE0_INT27      0x08000000  // Interrupt 27 active\r
+#define NVIC_ACTIVE0_INT26      0x04000000  // Interrupt 26 active\r
+#define NVIC_ACTIVE0_INT25      0x02000000  // Interrupt 25 active\r
+#define NVIC_ACTIVE0_INT24      0x01000000  // Interrupt 24 active\r
+#define NVIC_ACTIVE0_INT23      0x00800000  // Interrupt 23 active\r
+#define NVIC_ACTIVE0_INT22      0x00400000  // Interrupt 22 active\r
+#define NVIC_ACTIVE0_INT21      0x00200000  // Interrupt 21 active\r
+#define NVIC_ACTIVE0_INT20      0x00100000  // Interrupt 20 active\r
+#define NVIC_ACTIVE0_INT19      0x00080000  // Interrupt 19 active\r
+#define NVIC_ACTIVE0_INT18      0x00040000  // Interrupt 18 active\r
+#define NVIC_ACTIVE0_INT17      0x00020000  // Interrupt 17 active\r
+#define NVIC_ACTIVE0_INT16      0x00010000  // Interrupt 16 active\r
+#define NVIC_ACTIVE0_INT15      0x00008000  // Interrupt 15 active\r
+#define NVIC_ACTIVE0_INT14      0x00004000  // Interrupt 14 active\r
+#define NVIC_ACTIVE0_INT13      0x00002000  // Interrupt 13 active\r
+#define NVIC_ACTIVE0_INT12      0x00001000  // Interrupt 12 active\r
+#define NVIC_ACTIVE0_INT11      0x00000800  // Interrupt 11 active\r
+#define NVIC_ACTIVE0_INT10      0x00000400  // Interrupt 10 active\r
+#define NVIC_ACTIVE0_INT9       0x00000200  // Interrupt 9 active\r
+#define NVIC_ACTIVE0_INT8       0x00000100  // Interrupt 8 active\r
+#define NVIC_ACTIVE0_INT7       0x00000080  // Interrupt 7 active\r
+#define NVIC_ACTIVE0_INT6       0x00000040  // Interrupt 6 active\r
+#define NVIC_ACTIVE0_INT5       0x00000020  // Interrupt 5 active\r
+#define NVIC_ACTIVE0_INT4       0x00000010  // Interrupt 4 active\r
+#define NVIC_ACTIVE0_INT3       0x00000008  // Interrupt 3 active\r
+#define NVIC_ACTIVE0_INT2       0x00000004  // Interrupt 2 active\r
+#define NVIC_ACTIVE0_INT1       0x00000002  // Interrupt 1 active\r
+#define NVIC_ACTIVE0_INT0       0x00000001  // Interrupt 0 active\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_ACTIVE1 register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_ACTIVE1_INT59      0x08000000  // Interrupt 59 active\r
+#define NVIC_ACTIVE1_INT58      0x04000000  // Interrupt 58 active\r
+#define NVIC_ACTIVE1_INT57      0x02000000  // Interrupt 57 active\r
+#define NVIC_ACTIVE1_INT56      0x01000000  // Interrupt 56 active\r
+#define NVIC_ACTIVE1_INT55      0x00800000  // Interrupt 55 active\r
+#define NVIC_ACTIVE1_INT54      0x00400000  // Interrupt 54 active\r
+#define NVIC_ACTIVE1_INT53      0x00200000  // Interrupt 53 active\r
+#define NVIC_ACTIVE1_INT52      0x00100000  // Interrupt 52 active\r
+#define NVIC_ACTIVE1_INT51      0x00080000  // Interrupt 51 active\r
+#define NVIC_ACTIVE1_INT50      0x00040000  // Interrupt 50 active\r
+#define NVIC_ACTIVE1_INT49      0x00020000  // Interrupt 49 active\r
+#define NVIC_ACTIVE1_INT48      0x00010000  // Interrupt 48 active\r
+#define NVIC_ACTIVE1_INT47      0x00008000  // Interrupt 47 active\r
+#define NVIC_ACTIVE1_INT46      0x00004000  // Interrupt 46 active\r
+#define NVIC_ACTIVE1_INT45      0x00002000  // Interrupt 45 active\r
+#define NVIC_ACTIVE1_INT44      0x00001000  // Interrupt 44 active\r
+#define NVIC_ACTIVE1_INT43      0x00000800  // Interrupt 43 active\r
+#define NVIC_ACTIVE1_INT42      0x00000400  // Interrupt 42 active\r
+#define NVIC_ACTIVE1_INT41      0x00000200  // Interrupt 41 active\r
+#define NVIC_ACTIVE1_INT40      0x00000100  // Interrupt 40 active\r
+#define NVIC_ACTIVE1_INT39      0x00000080  // Interrupt 39 active\r
+#define NVIC_ACTIVE1_INT38      0x00000040  // Interrupt 38 active\r
+#define NVIC_ACTIVE1_INT37      0x00000020  // Interrupt 37 active\r
+#define NVIC_ACTIVE1_INT36      0x00000010  // Interrupt 36 active\r
+#define NVIC_ACTIVE1_INT35      0x00000008  // Interrupt 35 active\r
+#define NVIC_ACTIVE1_INT34      0x00000004  // Interrupt 34 active\r
+#define NVIC_ACTIVE1_INT33      0x00000002  // Interrupt 33 active\r
+#define NVIC_ACTIVE1_INT32      0x00000001  // Interrupt 32 active\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_PRI0 register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_PRI0_INT3_M        0xFF000000  // Interrupt 3 priority mask\r
+#define NVIC_PRI0_INT2_M        0x00FF0000  // Interrupt 2 priority mask\r
+#define NVIC_PRI0_INT1_M        0x0000FF00  // Interrupt 1 priority mask\r
+#define NVIC_PRI0_INT0_M        0x000000FF  // Interrupt 0 priority mask\r
+#define NVIC_PRI0_INT3_S        24\r
+#define NVIC_PRI0_INT2_S        16\r
+#define NVIC_PRI0_INT1_S        8\r
+#define NVIC_PRI0_INT0_S        0\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_PRI1 register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_PRI1_INT7_M        0xFF000000  // Interrupt 7 priority mask\r
+#define NVIC_PRI1_INT6_M        0x00FF0000  // Interrupt 6 priority mask\r
+#define NVIC_PRI1_INT5_M        0x0000FF00  // Interrupt 5 priority mask\r
+#define NVIC_PRI1_INT4_M        0x000000FF  // Interrupt 4 priority mask\r
+#define NVIC_PRI1_INT7_S        24\r
+#define NVIC_PRI1_INT6_S        16\r
+#define NVIC_PRI1_INT5_S        8\r
+#define NVIC_PRI1_INT4_S        0\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_PRI2 register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_PRI2_INT11_M       0xFF000000  // Interrupt 11 priority mask\r
+#define NVIC_PRI2_INT10_M       0x00FF0000  // Interrupt 10 priority mask\r
+#define NVIC_PRI2_INT9_M        0x0000FF00  // Interrupt 9 priority mask\r
+#define NVIC_PRI2_INT8_M        0x000000FF  // Interrupt 8 priority mask\r
+#define NVIC_PRI2_INT11_S       24\r
+#define NVIC_PRI2_INT10_S       16\r
+#define NVIC_PRI2_INT9_S        8\r
+#define NVIC_PRI2_INT8_S        0\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_PRI3 register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_PRI3_INT15_M       0xFF000000  // Interrupt 15 priority mask\r
+#define NVIC_PRI3_INT14_M       0x00FF0000  // Interrupt 14 priority mask\r
+#define NVIC_PRI3_INT13_M       0x0000FF00  // Interrupt 13 priority mask\r
+#define NVIC_PRI3_INT12_M       0x000000FF  // Interrupt 12 priority mask\r
+#define NVIC_PRI3_INT15_S       24\r
+#define NVIC_PRI3_INT14_S       16\r
+#define NVIC_PRI3_INT13_S       8\r
+#define NVIC_PRI3_INT12_S       0\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_PRI4 register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_PRI4_INT19_M       0xFF000000  // Interrupt 19 priority mask\r
+#define NVIC_PRI4_INT18_M       0x00FF0000  // Interrupt 18 priority mask\r
+#define NVIC_PRI4_INT17_M       0x0000FF00  // Interrupt 17 priority mask\r
+#define NVIC_PRI4_INT16_M       0x000000FF  // Interrupt 16 priority mask\r
+#define NVIC_PRI4_INT19_S       24\r
+#define NVIC_PRI4_INT18_S       16\r
+#define NVIC_PRI4_INT17_S       8\r
+#define NVIC_PRI4_INT16_S       0\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_PRI5 register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_PRI5_INT23_M       0xFF000000  // Interrupt 23 priority mask\r
+#define NVIC_PRI5_INT22_M       0x00FF0000  // Interrupt 22 priority mask\r
+#define NVIC_PRI5_INT21_M       0x0000FF00  // Interrupt 21 priority mask\r
+#define NVIC_PRI5_INT20_M       0x000000FF  // Interrupt 20 priority mask\r
+#define NVIC_PRI5_INT23_S       24\r
+#define NVIC_PRI5_INT22_S       16\r
+#define NVIC_PRI5_INT21_S       8\r
+#define NVIC_PRI5_INT20_S       0\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_PRI6 register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_PRI6_INT27_M       0xFF000000  // Interrupt 27 priority mask\r
+#define NVIC_PRI6_INT26_M       0x00FF0000  // Interrupt 26 priority mask\r
+#define NVIC_PRI6_INT25_M       0x0000FF00  // Interrupt 25 priority mask\r
+#define NVIC_PRI6_INT24_M       0x000000FF  // Interrupt 24 priority mask\r
+#define NVIC_PRI6_INT27_S       24\r
+#define NVIC_PRI6_INT26_S       16\r
+#define NVIC_PRI6_INT25_S       8\r
+#define NVIC_PRI6_INT24_S       0\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_PRI7 register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_PRI7_INT31_M       0xFF000000  // Interrupt 31 priority mask\r
+#define NVIC_PRI7_INT30_M       0x00FF0000  // Interrupt 30 priority mask\r
+#define NVIC_PRI7_INT29_M       0x0000FF00  // Interrupt 29 priority mask\r
+#define NVIC_PRI7_INT28_M       0x000000FF  // Interrupt 28 priority mask\r
+#define NVIC_PRI7_INT31_S       24\r
+#define NVIC_PRI7_INT30_S       16\r
+#define NVIC_PRI7_INT29_S       8\r
+#define NVIC_PRI7_INT28_S       0\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_PRI8 register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_PRI8_INT35_M       0xFF000000  // Interrupt 35 priority mask\r
+#define NVIC_PRI8_INT34_M       0x00FF0000  // Interrupt 34 priority mask\r
+#define NVIC_PRI8_INT33_M       0x0000FF00  // Interrupt 33 priority mask\r
+#define NVIC_PRI8_INT32_M       0x000000FF  // Interrupt 32 priority mask\r
+#define NVIC_PRI8_INT35_S       24\r
+#define NVIC_PRI8_INT34_S       16\r
+#define NVIC_PRI8_INT33_S       8\r
+#define NVIC_PRI8_INT32_S       0\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_PRI9 register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_PRI9_INT39_M       0xFF000000  // Interrupt 39 priority mask\r
+#define NVIC_PRI9_INT38_M       0x00FF0000  // Interrupt 38 priority mask\r
+#define NVIC_PRI9_INT37_M       0x0000FF00  // Interrupt 37 priority mask\r
+#define NVIC_PRI9_INT36_M       0x000000FF  // Interrupt 36 priority mask\r
+#define NVIC_PRI9_INT39_S       24\r
+#define NVIC_PRI9_INT38_S       16\r
+#define NVIC_PRI9_INT37_S       8\r
+#define NVIC_PRI9_INT36_S       0\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_PRI10 register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_PRI10_INT43_M      0xFF000000  // Interrupt 43 priority mask\r
+#define NVIC_PRI10_INT42_M      0x00FF0000  // Interrupt 42 priority mask\r
+#define NVIC_PRI10_INT41_M      0x0000FF00  // Interrupt 41 priority mask\r
+#define NVIC_PRI10_INT40_M      0x000000FF  // Interrupt 40 priority mask\r
+#define NVIC_PRI10_INT43_S      24\r
+#define NVIC_PRI10_INT42_S      16\r
+#define NVIC_PRI10_INT41_S      8\r
+#define NVIC_PRI10_INT40_S      0\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_CPUID register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_CPUID_IMP_M        0xFF000000  // Implementer\r
+#define NVIC_CPUID_VAR_M        0x00F00000  // Variant\r
+#define NVIC_CPUID_PARTNO_M     0x0000FFF0  // Processor part number\r
+#define NVIC_CPUID_REV_M        0x0000000F  // Revision\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_INT_CTRL register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_INT_CTRL_NMI_SET   0x80000000  // Pend a NMI\r
+#define NVIC_INT_CTRL_PEND_SV   0x10000000  // Pend a PendSV\r
+#define NVIC_INT_CTRL_UNPEND_SV 0x08000000  // Unpend a PendSV\r
+#define NVIC_INT_CTRL_ISR_PRE   0x00800000  // Debug interrupt handling\r
+#define NVIC_INT_CTRL_ISR_PEND  0x00400000  // Debug interrupt pending\r
+#define NVIC_INT_CTRL_VEC_PEN_M 0x003FF000  // Highest pending exception\r
+#define NVIC_INT_CTRL_RET_BASE  0x00000800  // Return to base\r
+#define NVIC_INT_CTRL_VEC_ACT_M 0x000003FF  // Current active exception\r
+#define NVIC_INT_CTRL_VEC_PEN_S 12\r
+#define NVIC_INT_CTRL_VEC_ACT_S 0\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_VTABLE register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_VTABLE_BASE        0x20000000  // Vector table base\r
+#define NVIC_VTABLE_OFFSET_M    0x1FFFFF00  // Vector table offset\r
+#define NVIC_VTABLE_OFFSET_S    8\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_APINT register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_APINT_VECTKEY_M    0xFFFF0000  // Vector key mask\r
+#define NVIC_APINT_VECTKEY      0x05FA0000  // Vector key\r
+#define NVIC_APINT_ENDIANESS    0x00008000  // Data endianess\r
+#define NVIC_APINT_PRIGROUP_M   0x00000700  // Priority group\r
+#define NVIC_APINT_PRIGROUP_7_1 0x00000000  // Priority group 7.1 split\r
+#define NVIC_APINT_PRIGROUP_6_2 0x00000100  // Priority group 6.2 split\r
+#define NVIC_APINT_PRIGROUP_5_3 0x00000200  // Priority group 5.3 split\r
+#define NVIC_APINT_PRIGROUP_4_4 0x00000300  // Priority group 4.4 split\r
+#define NVIC_APINT_PRIGROUP_3_5 0x00000400  // Priority group 3.5 split\r
+#define NVIC_APINT_PRIGROUP_2_6 0x00000500  // Priority group 2.6 split\r
+#define NVIC_APINT_PRIGROUP_1_7 0x00000600  // Priority group 1.7 split\r
+#define NVIC_APINT_PRIGROUP_0_8 0x00000700  // Priority group 0.8 split\r
+#define NVIC_APINT_SYSRESETREQ  0x00000004  // System reset request\r
+#define NVIC_APINT_VECT_CLR_ACT 0x00000002  // Clear active NMI/fault info\r
+#define NVIC_APINT_VECT_RESET   0x00000001  // System reset\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_SYS_CTRL register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_SYS_CTRL_SEVONPEND 0x00000010  // Wakeup on pend\r
+#define NVIC_SYS_CTRL_SLEEPDEEP 0x00000004  // Deep sleep enable\r
+#define NVIC_SYS_CTRL_SLEEPEXIT 0x00000002  // Sleep on ISR exit\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_CFG_CTRL register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_CFG_CTRL_BFHFNMIGN 0x00000100  // Ignore bus fault in NMI/fault\r
+#define NVIC_CFG_CTRL_DIV0      0x00000010  // Trap on divide by 0\r
+#define NVIC_CFG_CTRL_UNALIGNED 0x00000008  // Trap on unaligned access\r
+#define NVIC_CFG_CTRL_DEEP_PEND 0x00000004  // Allow deep interrupt trigger\r
+#define NVIC_CFG_CTRL_MAIN_PEND 0x00000002  // Allow main interrupt trigger\r
+#define NVIC_CFG_CTRL_BASE_THR  0x00000001  // Thread state control\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_SYS_PRI1 register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_SYS_PRI1_RES_M     0xFF000000  // Priority of reserved handler\r
+#define NVIC_SYS_PRI1_USAGE_M   0x00FF0000  // Priority of usage fault handler\r
+#define NVIC_SYS_PRI1_BUS_M     0x0000FF00  // Priority of bus fault handler\r
+#define NVIC_SYS_PRI1_MEM_M     0x000000FF  // Priority of mem manage handler\r
+#define NVIC_SYS_PRI1_USAGE_S   16\r
+#define NVIC_SYS_PRI1_BUS_S     8\r
+#define NVIC_SYS_PRI1_MEM_S     0\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_SYS_PRI2 register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_SYS_PRI2_SVC_M     0xFF000000  // Priority of SVCall handler\r
+#define NVIC_SYS_PRI2_RES_M     0x00FFFFFF  // Priority of reserved handlers\r
+#define NVIC_SYS_PRI2_SVC_S     24\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_SYS_PRI3 register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_SYS_PRI3_TICK_M    0xFF000000  // Priority of Sys Tick handler\r
+#define NVIC_SYS_PRI3_PENDSV_M  0x00FF0000  // Priority of PendSV handler\r
+#define NVIC_SYS_PRI3_RES_M     0x0000FF00  // Priority of reserved handler\r
+#define NVIC_SYS_PRI3_DEBUG_M   0x000000FF  // Priority of debug handler\r
+#define NVIC_SYS_PRI3_TICK_S    24\r
+#define NVIC_SYS_PRI3_PENDSV_S  16\r
+#define NVIC_SYS_PRI3_DEBUG_S   0\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_SYS_HND_CTRL register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_SYS_HND_CTRL_USAGE 0x00040000  // Usage fault enable\r
+#define NVIC_SYS_HND_CTRL_BUS   0x00020000  // Bus fault enable\r
+#define NVIC_SYS_HND_CTRL_MEM   0x00010000  // Mem manage fault enable\r
+#define NVIC_SYS_HND_CTRL_SVC   0x00008000  // SVCall is pended\r
+#define NVIC_SYS_HND_CTRL_BUSP  0x00004000  // Bus fault is pended\r
+#define NVIC_SYS_HND_CTRL_TICK  0x00000800  // Sys tick is active\r
+#define NVIC_SYS_HND_CTRL_PNDSV 0x00000400  // PendSV is active\r
+#define NVIC_SYS_HND_CTRL_MON   0x00000100  // Monitor is active\r
+#define NVIC_SYS_HND_CTRL_SVCA  0x00000080  // SVCall is active\r
+#define NVIC_SYS_HND_CTRL_USGA  0x00000008  // Usage fault is active\r
+#define NVIC_SYS_HND_CTRL_BUSA  0x00000002  // Bus fault is active\r
+#define NVIC_SYS_HND_CTRL_MEMA  0x00000001  // Mem manage is active\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_FAULT_STAT register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_FAULT_STAT_DIV0    0x02000000  // Divide by zero fault\r
+#define NVIC_FAULT_STAT_UNALIGN 0x01000000  // Unaligned access fault\r
+#define NVIC_FAULT_STAT_NOCP    0x00080000  // No coprocessor fault\r
+#define NVIC_FAULT_STAT_INVPC   0x00040000  // Invalid PC fault\r
+#define NVIC_FAULT_STAT_INVSTAT 0x00020000  // Invalid state fault\r
+#define NVIC_FAULT_STAT_UNDEF   0x00010000  // Undefined instruction fault\r
+#define NVIC_FAULT_STAT_BFARV   0x00008000  // BFAR is valid\r
+#define NVIC_FAULT_STAT_BSTKE   0x00001000  // Stack bus fault\r
+#define NVIC_FAULT_STAT_BUSTKE  0x00000800  // Unstack bus fault\r
+#define NVIC_FAULT_STAT_IMPRE   0x00000400  // Imprecise data bus error\r
+#define NVIC_FAULT_STAT_PRECISE 0x00000200  // Precise data bus error\r
+#define NVIC_FAULT_STAT_IBUS    0x00000100  // Instruction bus fault\r
+#define NVIC_FAULT_STAT_MMARV   0x00000080  // MMAR is valid\r
+#define NVIC_FAULT_STAT_MSTKE   0x00000010  // Stack access violation\r
+#define NVIC_FAULT_STAT_MUSTKE  0x00000008  // Unstack access violation\r
+#define NVIC_FAULT_STAT_DERR    0x00000002  // Data access violation\r
+#define NVIC_FAULT_STAT_IERR    0x00000001  // Instruction access violation\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_HFAULT_STAT register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_HFAULT_STAT_DBG    0x80000000  // Debug event\r
+#define NVIC_HFAULT_STAT_FORCED 0x40000000  // Cannot execute fault handler\r
+#define NVIC_HFAULT_STAT_VECT   0x00000002  // Vector table read fault\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_DEBUG_STAT register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_DEBUG_STAT_EXTRNL  0x00000010  // EDBGRQ asserted\r
+#define NVIC_DEBUG_STAT_VCATCH  0x00000008  // Vector catch\r
+#define NVIC_DEBUG_STAT_DWTTRAP 0x00000004  // DWT match\r
+#define NVIC_DEBUG_STAT_BKPT    0x00000002  // Breakpoint instruction\r
+#define NVIC_DEBUG_STAT_HALTED  0x00000001  // Halt request\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_MM_ADDR register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_MM_ADDR_M          0xFFFFFFFF  // Data fault address\r
+#define NVIC_MM_ADDR_S          0\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_FAULT_ADDR register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_FAULT_ADDR_M       0xFFFFFFFF  // Data bus fault address\r
+#define NVIC_FAULT_ADDR_S       0\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_EXC_STACK register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_EXC_STACK_DEEP     0x00000001  // Exception stack\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_EXC_NUM register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_EXC_NUM_M          0x000003FF  // Exception number\r
+#define NVIC_EXC_NUM_S          0\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_COPRO register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_COPRO_15_M         0xC0000000  // Coprocessor 15 access mask\r
+#define NVIC_COPRO_15_DENIED    0x00000000  // Coprocessor 15 access denied\r
+#define NVIC_COPRO_15_PRIV      0x40000000  // Coprocessor 15 privileged addess\r
+#define NVIC_COPRO_15_FULL      0xC0000000  // Coprocessor 15 full access\r
+#define NVIC_COPRO_14_M         0x30000000  // Coprocessor 14 access mask\r
+#define NVIC_COPRO_14_DENIED    0x00000000  // Coprocessor 14 access denied\r
+#define NVIC_COPRO_14_PRIV      0x10000000  // Coprocessor 14 privileged addess\r
+#define NVIC_COPRO_14_FULL      0x30000000  // Coprocessor 14 full access\r
+#define NVIC_COPRO_13_M         0x0C000000  // Coprocessor 13 access mask\r
+#define NVIC_COPRO_13_DENIED    0x00000000  // Coprocessor 13 access denied\r
+#define NVIC_COPRO_13_PRIV      0x04000000  // Coprocessor 13 privileged addess\r
+#define NVIC_COPRO_13_FULL      0x0C000000  // Coprocessor 13 full access\r
+#define NVIC_COPRO_12_M         0x03000000  // Coprocessor 12 access mask\r
+#define NVIC_COPRO_12_DENIED    0x00000000  // Coprocessor 12 access denied\r
+#define NVIC_COPRO_12_PRIV      0x01000000  // Coprocessor 12 privileged addess\r
+#define NVIC_COPRO_12_FULL      0x03000000  // Coprocessor 12 full access\r
+#define NVIC_COPRO_11_M         0x00C00000  // Coprocessor 11 access mask\r
+#define NVIC_COPRO_11_DENIED    0x00000000  // Coprocessor 11 access denied\r
+#define NVIC_COPRO_11_PRIV      0x00400000  // Coprocessor 11 privileged addess\r
+#define NVIC_COPRO_11_FULL      0x00C00000  // Coprocessor 11 full access\r
+#define NVIC_COPRO_10_M         0x00300000  // Coprocessor 10 access mask\r
+#define NVIC_COPRO_10_DENIED    0x00000000  // Coprocessor 10 access denied\r
+#define NVIC_COPRO_10_PRIV      0x00100000  // Coprocessor 10 privileged addess\r
+#define NVIC_COPRO_10_FULL      0x00300000  // Coprocessor 10 full access\r
+#define NVIC_COPRO_9_M          0x000C0000  // Coprocessor 9 access mask\r
+#define NVIC_COPRO_9_DENIED     0x00000000  // Coprocessor 9 access denied\r
+#define NVIC_COPRO_9_PRIV       0x00040000  // Coprocessor 9 privileged addess\r
+#define NVIC_COPRO_9_FULL       0x000C0000  // Coprocessor 9 full access\r
+#define NVIC_COPRO_8_M          0x00030000  // Coprocessor 8 access mask\r
+#define NVIC_COPRO_8_DENIED     0x00000000  // Coprocessor 8 access denied\r
+#define NVIC_COPRO_8_PRIV       0x00010000  // Coprocessor 8 privileged addess\r
+#define NVIC_COPRO_8_FULL       0x00030000  // Coprocessor 8 full access\r
+#define NVIC_COPRO_7_M          0x0000C000  // Coprocessor 7 access mask\r
+#define NVIC_COPRO_7_DENIED     0x00000000  // Coprocessor 7 access denied\r
+#define NVIC_COPRO_7_PRIV       0x00004000  // Coprocessor 7 privileged addess\r
+#define NVIC_COPRO_7_FULL       0x0000C000  // Coprocessor 7 full access\r
+#define NVIC_COPRO_6_M          0x00003000  // Coprocessor 6 access mask\r
+#define NVIC_COPRO_6_DENIED     0x00000000  // Coprocessor 6 access denied\r
+#define NVIC_COPRO_6_PRIV       0x00001000  // Coprocessor 6 privileged addess\r
+#define NVIC_COPRO_6_FULL       0x00003000  // Coprocessor 6 full access\r
+#define NVIC_COPRO_5_M          0x00000C00  // Coprocessor 5 access mask\r
+#define NVIC_COPRO_5_DENIED     0x00000000  // Coprocessor 5 access denied\r
+#define NVIC_COPRO_5_PRIV       0x00000400  // Coprocessor 5 privileged addess\r
+#define NVIC_COPRO_5_FULL       0x00000C00  // Coprocessor 5 full access\r
+#define NVIC_COPRO_4_M          0x00000300  // Coprocessor 4 access mask\r
+#define NVIC_COPRO_4_DENIED     0x00000000  // Coprocessor 4 access denied\r
+#define NVIC_COPRO_4_PRIV       0x00000100  // Coprocessor 4 privileged addess\r
+#define NVIC_COPRO_4_FULL       0x00000300  // Coprocessor 4 full access\r
+#define NVIC_COPRO_3_M          0x000000C0  // Coprocessor 3 access mask\r
+#define NVIC_COPRO_3_DENIED     0x00000000  // Coprocessor 3 access denied\r
+#define NVIC_COPRO_3_PRIV       0x00000040  // Coprocessor 3 privileged addess\r
+#define NVIC_COPRO_3_FULL       0x000000C0  // Coprocessor 3 full access\r
+#define NVIC_COPRO_2_M          0x00000030  // Coprocessor 2 access mask\r
+#define NVIC_COPRO_2_DENIED     0x00000000  // Coprocessor 2 access denied\r
+#define NVIC_COPRO_2_PRIV       0x00000010  // Coprocessor 2 privileged addess\r
+#define NVIC_COPRO_2_FULL       0x00000030  // Coprocessor 2 full access\r
+#define NVIC_COPRO_1_M          0x0000000C  // Coprocessor 1 access mask\r
+#define NVIC_COPRO_1_DENIED     0x00000000  // Coprocessor 1 access denied\r
+#define NVIC_COPRO_1_PRIV       0x00000004  // Coprocessor 1 privileged addess\r
+#define NVIC_COPRO_1_FULL       0x0000000C  // Coprocessor 1 full access\r
+#define NVIC_COPRO_0_M          0x00000003  // Coprocessor 0 access mask\r
+#define NVIC_COPRO_0_DENIED     0x00000000  // Coprocessor 0 access denied\r
+#define NVIC_COPRO_0_PRIV       0x00000001  // Coprocessor 0 privileged addess\r
+#define NVIC_COPRO_0_FULL       0x00000003  // Coprocessor 0 full access\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_MPU_TYPE register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_MPU_TYPE_IREGION_M 0x00FF0000  // Number of I regions\r
+#define NVIC_MPU_TYPE_DREGION_M 0x0000FF00  // Number of D regions\r
+#define NVIC_MPU_TYPE_SEPARATE  0x00000001  // Separate or unified MPU\r
+#define NVIC_MPU_TYPE_IREGION_S 16\r
+#define NVIC_MPU_TYPE_DREGION_S 8\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_MPU_CTRL register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_MPU_CTRL_HFNMIENA  0x00000002  // MPU enabled during faults\r
+#define NVIC_MPU_CTRL_ENABLE    0x00000001  // MPU enable\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_MPU_NUMBER register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_MPU_NUMBER_M       0x000000FF  // MPU region to access\r
+#define NVIC_MPU_NUMBER_S       0\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_MPU_BASE register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_MPU_BASE_ADDR_M    0xFFFFFF00  // Base address\r
+#define NVIC_MPU_BASE_VALID     0x00000010  // Region number valid\r
+#define NVIC_MPU_BASE_REGION_M  0x0000000F  // Region number\r
+#define NVIC_MPU_BASE_ADDR_S    8\r
+#define NVIC_MPU_BASE_REGION_S  0\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_MPU_ATTR register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_MPU_ATTR_ATTRS     0xFFFF0000  // Attributes\r
+#define NVIC_MPU_ATTR_SRD       0x0000FF00  // Sub-region disable\r
+#define NVIC_MPU_ATTR_SZENABLE  0x000000FF  // Region size\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_DBG_CTRL register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_DBG_CTRL_DBGKEY_M  0xFFFF0000  // Debug key mask\r
+#define NVIC_DBG_CTRL_DBGKEY    0xA05F0000  // Debug key\r
+#define NVIC_DBG_CTRL_MON_PEND  0x00008000  // Pend the monitor\r
+#define NVIC_DBG_CTRL_MON_REQ   0x00004000  // Monitor request\r
+#define NVIC_DBG_CTRL_MON_EN    0x00002000  // Debug monitor enable\r
+#define NVIC_DBG_CTRL_MONSTEP   0x00001000  // Monitor step the core\r
+#define NVIC_DBG_CTRL_S_SLEEP   0x00000400  // Core is sleeping\r
+#define NVIC_DBG_CTRL_S_HALT    0x00000200  // Core status on halt\r
+#define NVIC_DBG_CTRL_S_REGRDY  0x00000100  // Register read/write available\r
+#define NVIC_DBG_CTRL_S_LOCKUP  0x00000080  // Core is locked up\r
+#define NVIC_DBG_CTRL_C_RESET   0x00000010  // Reset the core\r
+#define NVIC_DBG_CTRL_C_MASKINT 0x00000008  // Mask interrupts when stepping\r
+#define NVIC_DBG_CTRL_C_STEP    0x00000004  // Step the core\r
+#define NVIC_DBG_CTRL_C_HALT    0x00000002  // Halt the core\r
+#define NVIC_DBG_CTRL_C_DEBUGEN 0x00000001  // Enable debug\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_DBG_XFER register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_DBG_XFER_REG_WNR   0x00010000  // Write or not read\r
+#define NVIC_DBG_XFER_REG_SEL_M 0x0000001F  // Register\r
+#define NVIC_DBG_XFER_REG_R0    0x00000000  // Register R0\r
+#define NVIC_DBG_XFER_REG_R1    0x00000001  // Register R1\r
+#define NVIC_DBG_XFER_REG_R2    0x00000002  // Register R2\r
+#define NVIC_DBG_XFER_REG_R3    0x00000003  // Register R3\r
+#define NVIC_DBG_XFER_REG_R4    0x00000004  // Register R4\r
+#define NVIC_DBG_XFER_REG_R5    0x00000005  // Register R5\r
+#define NVIC_DBG_XFER_REG_R6    0x00000006  // Register R6\r
+#define NVIC_DBG_XFER_REG_R7    0x00000007  // Register R7\r
+#define NVIC_DBG_XFER_REG_R8    0x00000008  // Register R8\r
+#define NVIC_DBG_XFER_REG_R9    0x00000009  // Register R9\r
+#define NVIC_DBG_XFER_REG_R10   0x0000000A  // Register R10\r
+#define NVIC_DBG_XFER_REG_R11   0x0000000B  // Register R11\r
+#define NVIC_DBG_XFER_REG_R12   0x0000000C  // Register R12\r
+#define NVIC_DBG_XFER_REG_R13   0x0000000D  // Register R13\r
+#define NVIC_DBG_XFER_REG_R14   0x0000000E  // Register R14\r
+#define NVIC_DBG_XFER_REG_R15   0x0000000F  // Register R15\r
+#define NVIC_DBG_XFER_REG_FLAGS 0x00000010  // xPSR/Flags register\r
+#define NVIC_DBG_XFER_REG_MSP   0x00000011  // Main SP\r
+#define NVIC_DBG_XFER_REG_PSP   0x00000012  // Process SP\r
+#define NVIC_DBG_XFER_REG_DSP   0x00000013  // Deep SP\r
+#define NVIC_DBG_XFER_REG_CFBP  0x00000014  // Control/Fault/BasePri/PriMask\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_DBG_DATA register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_DBG_DATA_M         0xFFFFFFFF  // Data temporary cache\r
+#define NVIC_DBG_DATA_S         0\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_DBG_INT register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_DBG_INT_HARDERR    0x00000400  // Debug trap on hard fault\r
+#define NVIC_DBG_INT_INTERR     0x00000200  // Debug trap on interrupt errors\r
+#define NVIC_DBG_INT_BUSERR     0x00000100  // Debug trap on bus error\r
+#define NVIC_DBG_INT_STATERR    0x00000080  // Debug trap on usage fault state\r
+#define NVIC_DBG_INT_CHKERR     0x00000040  // Debug trap on usage fault check\r
+#define NVIC_DBG_INT_NOCPERR    0x00000020  // Debug trap on coprocessor error\r
+#define NVIC_DBG_INT_MMERR      0x00000010  // Debug trap on mem manage fault\r
+#define NVIC_DBG_INT_RESET      0x00000008  // Core reset status\r
+#define NVIC_DBG_INT_RSTPENDCLR 0x00000004  // Clear pending core reset\r
+#define NVIC_DBG_INT_RSTPENDING 0x00000002  // Core reset is pending\r
+#define NVIC_DBG_INT_RSTVCATCH  0x00000001  // Reset vector catch\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the NVIC_SW_TRIG register.\r
+//\r
+//*****************************************************************************\r
+#define NVIC_SW_TRIG_INTID_M    0x000003FF  // Interrupt to trigger\r
+#define NVIC_SW_TRIG_INTID_S    0\r
+\r
+#endif // __HW_NVIC_H__\r

diff --git a/Demo/Common/drivers/LuminaryMicro/hw_pwm.h b/Demo/Common/drivers/LuminaryMicro/hw_pwm.h
new file mode 100644 (file)
index 0000000..6f670c1
--- /dev/null
+++ b/Demo/Common/drivers/LuminaryMicro/hw_pwm.h
@@ -0,0 +1,260 @@
+//*****************************************************************************\r
+//\r
+// hw_pwm.h - Defines and Macros for Pulse Width Modulation (PWM) ports\r
+//\r
+// Copyright (c) 2005-2007 Luminary Micro, Inc.  All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1582 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+#ifndef __HW_PWM_H__\r
+#define __HW_PWM_H__\r
+\r
+//*****************************************************************************\r
+//\r
+// PWM Module Register Offsets.\r
+//\r
+//*****************************************************************************\r
+#define PWM_O_CTL               0x00000000  // PWM Master Control register\r
+#define PWM_O_SYNC              0x00000004  // PWM Time Base Sync register\r
+#define PWM_O_ENABLE            0x00000008  // PWM Output Enable register\r
+#define PWM_O_INVERT            0x0000000C  // PWM Output Inversion register\r
+#define PWM_O_FAULT             0x00000010  // PWM Output Fault register\r
+#define PWM_O_INTEN             0x00000014  // PWM Interrupt Enable register\r
+#define PWM_O_RIS               0x00000018  // PWM Interrupt Raw Status reg.\r
+#define PWM_O_ISC               0x0000001C  // PWM Interrupt Status register\r
+#define PWM_O_STATUS            0x00000020  // PWM Status register\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the PWM Master Control register.\r
+//\r
+//*****************************************************************************\r
+#define PWM_CTL_GLOBAL_SYNC2    0x00000004  // Global sync generator 2\r
+#define PWM_CTL_GLOBAL_SYNC1    0x00000002  // Global sync generator 1\r
+#define PWM_CTL_GLOBAL_SYNC0    0x00000001  // Global sync generator 0\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the PWM Time Base Sync register.\r
+//\r
+//*****************************************************************************\r
+#define PWM_SYNC_SYNC2          0x00000004  // Reset generator 2 counter\r
+#define PWM_SYNC_SYNC1          0x00000002  // Reset generator 1 counter\r
+#define PWM_SYNC_SYNC0          0x00000001  // Reset generator 0 counter\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the PWM Output Enable register.\r
+//\r
+//*****************************************************************************\r
+#define PWM_ENABLE_PWM5EN       0x00000020  // PWM5 pin enable\r
+#define PWM_ENABLE_PWM4EN       0x00000010  // PWM4 pin enable\r
+#define PWM_ENABLE_PWM3EN       0x00000008  // PWM3 pin enable\r
+#define PWM_ENABLE_PWM2EN       0x00000004  // PWM2 pin enable\r
+#define PWM_ENABLE_PWM1EN       0x00000002  // PWM1 pin enable\r
+#define PWM_ENABLE_PWM0EN       0x00000001  // PWM0 pin enable\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the PWM Inversion register.\r
+//\r
+//*****************************************************************************\r
+#define PWM_INVERT_PWM5INV      0x00000020  // PWM5 pin invert\r
+#define PWM_INVERT_PWM4INV      0x00000010  // PWM4 pin invert\r
+#define PWM_INVERT_PWM3INV      0x00000008  // PWM3 pin invert\r
+#define PWM_INVERT_PWM2INV      0x00000004  // PWM2 pin invert\r
+#define PWM_INVERT_PWM1INV      0x00000002  // PWM1 pin invert\r
+#define PWM_INVERT_PWM0INV      0x00000001  // PWM0 pin invert\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the PWM Fault register.\r
+//\r
+//*****************************************************************************\r
+#define PWM_FAULT_FAULT5        0x00000020  // PWM5 pin fault\r
+#define PWM_FAULT_FAULT4        0x00000010  // PWM5 pin fault\r
+#define PWM_FAULT_FAULT3        0x00000008  // PWM5 pin fault\r
+#define PWM_FAULT_FAULT2        0x00000004  // PWM5 pin fault\r
+#define PWM_FAULT_FAULT1        0x00000002  // PWM5 pin fault\r
+#define PWM_FAULT_FAULT0        0x00000001  // PWM5 pin fault\r
+\r
+//*****************************************************************************\r
+//\r
+// PWM Interrupt Register bit definitions.\r
+//\r
+//*****************************************************************************\r
+#define PWM_INT_INTFAULT        0x00010000  // Fault interrupt pending\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the PWM Status register.\r
+//\r
+//*****************************************************************************\r
+#define PWM_STATUS_FAULT        0x00000001  // Fault status\r
+\r
+//*****************************************************************************\r
+//\r
+// PWM Generator standard offsets.\r
+//\r
+//*****************************************************************************\r
+#define PWM_GEN_0_OFFSET        0x00000040  // PWM0 base\r
+#define PWM_GEN_1_OFFSET        0x00000080  // PWM1 base\r
+#define PWM_GEN_2_OFFSET        0x000000C0  // PWM2 base\r
+\r
+#define PWM_O_X_CTL             0x00000000  // Gen Control Reg\r
+#define PWM_O_X_INTEN           0x00000004  // Gen Int/Trig Enable Reg\r
+#define PWM_O_X_RIS             0x00000008  // Gen Raw Int Status Reg\r
+#define PWM_O_X_ISC             0x0000000C  // Gen Int Status Reg\r
+#define PWM_O_X_LOAD            0x00000010  // Gen Load Reg\r
+#define PWM_O_X_COUNT           0x00000014  // Gen Counter Reg\r
+#define PWM_O_X_CMPA            0x00000018  // Gen Compare A Reg\r
+#define PWM_O_X_CMPB            0x0000001C  // Gen Compare B Reg\r
+#define PWM_O_X_GENA            0x00000020  // Gen Generator A Ctrl Reg\r
+#define PWM_O_X_GENB            0x00000024  // Gen Generator B Ctrl Reg\r
+#define PWM_O_X_DBCTL           0x00000028  // Gen Dead Band Ctrl Reg\r
+#define PWM_O_X_DBRISE          0x0000002C  // Gen DB Rising Edge Delay Reg\r
+#define PWM_O_X_DBFALL          0x00000030  // Gen DB Falling Edge Delay Reg\r
+\r
+//*****************************************************************************\r
+//\r
+// PWM_X Control Register bit definitions.\r
+//\r
+//*****************************************************************************\r
+#define PWM_X_CTL_ENABLE        0x00000001  // Master enable for gen block\r
+#define PWM_X_CTL_MODE          0x00000002  // Counter mode, down or up/down\r
+#define PWM_X_CTL_DEBUG         0x00000004  // Debug mode\r
+#define PWM_X_CTL_LOADUPD       0x00000008  // Update mode for the load reg\r
+#define PWM_X_CTL_CMPAUPD       0x00000010  // Update mode for comp A reg\r
+#define PWM_X_CTL_CMPBUPD       0x00000020  // Update mode for comp B reg\r
+\r
+//*****************************************************************************\r
+//\r
+// PWM_X Interrupt/Trigger Enable Register bit definitions.\r
+//\r
+//*****************************************************************************\r
+#define PWM_X_INTEN_INTCNTZERO  0x00000001  // Int if COUNT = 0\r
+#define PWM_X_INTEN_INTCNTLOAD  0x00000002  // Int if COUNT = LOAD\r
+#define PWM_X_INTEN_INTCMPAU    0x00000004  // Int if COUNT = CMPA U\r
+#define PWM_X_INTEN_INTCMPAD    0x00000008  // Int if COUNT = CMPA D\r
+#define PWM_X_INTEN_INTCMPBU    0x00000010  // Int if COUNT = CMPA U\r
+#define PWM_X_INTEN_INTCMPBD    0x00000020  // Int if COUNT = CMPA D\r
+#define PWM_X_INTEN_TRCNTZERO   0x00000100  // Trig if COUNT = 0\r
+#define PWM_X_INTEN_TRCNTLOAD   0x00000200  // Trig if COUNT = LOAD\r
+#define PWM_X_INTEN_TRCMPAU     0x00000400  // Trig if COUNT = CMPA U\r
+#define PWM_X_INTEN_TRCMPAD     0x00000800  // Trig if COUNT = CMPA D\r
+#define PWM_X_INTEN_TRCMPBU     0x00001000  // Trig if COUNT = CMPA U\r
+#define PWM_X_INTEN_TRCMPBD     0x00002000  // Trig if COUNT = CMPA D\r
+\r
+//*****************************************************************************\r
+//\r
+// PWM_X Raw Interrupt Status Register bit definitions.\r
+//\r
+//*****************************************************************************\r
+#define PWM_X_RIS_INTCNTZERO    0x00000001  // PWM_X_COUNT = 0 int\r
+#define PWM_X_RIS_INTCNTLOAD    0x00000002  // PWM_X_COUNT = PWM_X_LOAD int\r
+#define PWM_X_RIS_INTCMPAU      0x00000004  // PWM_X_COUNT = PWM_X_CMPA U int\r
+#define PWM_X_RIS_INTCMPAD      0x00000008  // PWM_X_COUNT = PWM_X_CMPA D int\r
+#define PWM_X_RIS_INTCMPBU      0x00000010  // PWM_X_COUNT = PWM_X_CMPB U int\r
+#define PWM_X_RIS_INTCMPBD      0x00000020  // PWM_X_COUNT = PWM_X_CMPB D int\r
+\r
+//*****************************************************************************\r
+//\r
+// PWM_X Interrupt Status Register bit definitions.\r
+//\r
+//*****************************************************************************\r
+#define PWM_X_INT_INTCNTZERO    0x00000001  // PWM_X_COUNT = 0 received\r
+#define PWM_X_INT_INTCNTLOAD    0x00000002  // PWM_X_COUNT = PWM_X_LOAD rcvd\r
+#define PWM_X_INT_INTCMPAU      0x00000004  // PWM_X_COUNT = PWM_X_CMPA U rcvd\r
+#define PWM_X_INT_INTCMPAD      0x00000008  // PWM_X_COUNT = PWM_X_CMPA D rcvd\r
+#define PWM_X_INT_INTCMPBU      0x00000010  // PWM_X_COUNT = PWM_X_CMPB U rcvd\r
+#define PWM_X_INT_INTCMPBD      0x00000020  // PWM_X_COUNT = PWM_X_CMPB D rcvd\r
+\r
+//*****************************************************************************\r
+//\r
+// PWM_X Generator A/B Control Register bit definitions.\r
+//\r
+//*****************************************************************************\r
+#define PWM_X_GEN_Y_ACTZERO     0x00000003  // Act PWM_X_COUNT = 0\r
+#define PWM_X_GEN_Y_ACTLOAD     0x0000000C  // Act PWM_X_COUNT = PWM_X_LOAD\r
+#define PWM_X_GEN_Y_ACTCMPAU    0x00000030  // Act PWM_X_COUNT = PWM_X_CMPA U\r
+#define PWM_X_GEN_Y_ACTCMPAD    0x000000C0  // Act PWM_X_COUNT = PWM_X_CMPA D\r
+#define PWM_X_GEN_Y_ACTCMPBU    0x00000300  // Act PWM_X_COUNT = PWM_X_CMPB U\r
+#define PWM_X_GEN_Y_ACTCMPBD    0x00000C00  // Act PWM_X_COUNT = PWM_X_CMPB D\r
+\r
+//*****************************************************************************\r
+//\r
+// PWM_X Generator A/B Control Register action definitions.\r
+//\r
+//*****************************************************************************\r
+#define PWM_GEN_ACT_NONE        0x0         // Do nothing\r
+#define PWM_GEN_ACT_INV         0x1         // Invert the output signal\r
+#define PWM_GEN_ACT_ZERO        0x2         // Set the output signal to zero\r
+#define PWM_GEN_ACT_ONE         0x3         // Set the output signal to one\r
+#define PWM_GEN_ACT_ZERO_SHIFT  0           // Shift amount for the zero action\r
+#define PWM_GEN_ACT_LOAD_SHIFT  2           // Shift amount for the load action\r
+#define PWM_GEN_ACT_A_UP_SHIFT  4           // Shift amount for the A up action\r
+#define PWM_GEN_ACT_A_DN_SHIFT  6           // Shift amount for the A dn action\r
+#define PWM_GEN_ACT_B_UP_SHIFT  8           // Shift amount for the B up action\r
+#define PWM_GEN_ACT_B_DN_SHIFT  10          // Shift amount for the B dn action\r
+\r
+//*****************************************************************************\r
+//\r
+// PWM_X Dead Band Control Register bit definitions.\r
+//\r
+//*****************************************************************************\r
+#define PWM_DBCTL_ENABLE        0x00000001  // Enable dead band insertion\r
+\r
+//*****************************************************************************\r
+//\r
+// PWM Register reset values.\r
+//\r
+//*****************************************************************************\r
+#define PWM_RV_CTL              0x00000000  // Master control of the PWM module\r
+#define PWM_RV_SYNC             0x00000000  // Counter synch for PWM generators\r
+#define PWM_RV_ENABLE           0x00000000  // Master enable for the PWM\r
+                                            // output pins\r
+#define PWM_RV_INVERT           0x00000000  // Inversion control for\r
+                                            // PWM output pins\r
+#define PWM_RV_FAULT            0x00000000  // Fault handling for the PWM\r
+                                            // output pins\r
+#define PWM_RV_INTEN            0x00000000  // Interrupt enable\r
+#define PWM_RV_RIS              0x00000000  // Raw interrupt status\r
+#define PWM_RV_ISC              0x00000000  // Interrupt status and clearing\r
+#define PWM_RV_STATUS           0x00000000  // Status\r
+#define PWM_RV_X_CTL            0x00000000  // Master control of the PWM\r
+                                            // generator block\r
+#define PWM_RV_X_INTEN          0x00000000  // Interrupt and trigger enable\r
+#define PWM_RV_X_RIS            0x00000000  // Raw interrupt status\r
+#define PWM_RV_X_ISC            0x00000000  // Interrupt status and clearing\r
+#define PWM_RV_X_LOAD           0x00000000  // The load value for the counter\r
+#define PWM_RV_X_COUNT          0x00000000  // The current counter value\r
+#define PWM_RV_X_CMPA           0x00000000  // The comparator A value\r
+#define PWM_RV_X_CMPB           0x00000000  // The comparator B value\r
+#define PWM_RV_X_GENA           0x00000000  // Controls PWM generator A\r
+#define PWM_RV_X_GENB           0x00000000  // Controls PWM generator B\r
+#define PWM_RV_X_DBCTL          0x00000000  // Control the dead band generator\r
+#define PWM_RV_X_DBRISE         0x00000000  // The dead band rising edge delay\r
+                                            // count\r
+#define PWM_RV_X_DBFALL         0x00000000  // The dead band falling edge delay\r
+                                            // count\r
+\r
+#endif //  __HW_PWM_H__\r

diff --git a/Demo/Common/drivers/LuminaryMicro/hw_qei.h b/Demo/Common/drivers/LuminaryMicro/hw_qei.h
new file mode 100644 (file)
index 0000000..c06fe0e
--- /dev/null
+++ b/Demo/Common/drivers/LuminaryMicro/hw_qei.h
@@ -0,0 +1,176 @@
+//*****************************************************************************\r
+//\r
+// hw_qei.h - Macros used when accessing the QEI hardware.\r
+//\r
+// Copyright (c) 2005-2007 Luminary Micro, Inc.  All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1582 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+#ifndef __HW_QEI_H__\r
+#define __HW_QEI_H__\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the offsets of the QEI registers.\r
+//\r
+//*****************************************************************************\r
+#define QEI_O_CTL               0x00000000  // Configuration and control reg.\r
+#define QEI_O_STAT              0x00000004  // Status register\r
+#define QEI_O_POS               0x00000008  // Current position register\r
+#define QEI_O_MAXPOS            0x0000000C  // Maximum position register\r
+#define QEI_O_LOAD              0x00000010  // Velocity timer load register\r
+#define QEI_O_TIME              0x00000014  // Velocity timer register\r
+#define QEI_O_COUNT             0x00000018  // Velocity pulse count register\r
+#define QEI_O_SPEED             0x0000001C  // Velocity speed register\r
+#define QEI_O_INTEN             0x00000020  // Interrupt enable register\r
+#define QEI_O_RIS               0x00000024  // Raw interrupt status register\r
+#define QEI_O_ISC               0x00000028  // Interrupt status register\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the QEI_CTL register.\r
+//\r
+//*****************************************************************************\r
+#define QEI_CTL_STALLEN         0x00001000  // Stall enable\r
+#define QEI_CTL_INVI            0x00000800  // Invert Index input\r
+#define QEI_CTL_INVB            0x00000400  // Invert PhB input\r
+#define QEI_CTL_INVA            0x00000200  // Invert PhA input\r
+#define QEI_CTL_VELDIV_M        0x000001C0  // Velocity predivider mask\r
+#define QEI_CTL_VELDIV_1        0x00000000  // Predivide by 1\r
+#define QEI_CTL_VELDIV_2        0x00000040  // Predivide by 2\r
+#define QEI_CTL_VELDIV_4        0x00000080  // Predivide by 4\r
+#define QEI_CTL_VELDIV_8        0x000000C0  // Predivide by 8\r
+#define QEI_CTL_VELDIV_16       0x00000100  // Predivide by 16\r
+#define QEI_CTL_VELDIV_32       0x00000140  // Predivide by 32\r
+#define QEI_CTL_VELDIV_64       0x00000180  // Predivide by 64\r
+#define QEI_CTL_VELDIV_128      0x000001C0  // Predivide by 128\r
+#define QEI_CTL_VELEN           0x00000020  // Velocity enable\r
+#define QEI_CTL_RESMODE         0x00000010  // Position counter reset mode\r
+#define QEI_CTL_CAPMODE         0x00000008  // Edge capture mode\r
+#define QEI_CTL_SIGMODE         0x00000004  // Encoder signaling mode\r
+#define QEI_CTL_SWAP            0x00000002  // Swap input signals\r
+#define QEI_CTL_ENABLE          0x00000001  // QEI enable\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the QEI_STAT register.\r
+//\r
+//*****************************************************************************\r
+#define QEI_STAT_DIRECTION      0x00000002  // Direction of rotation\r
+#define QEI_STAT_ERROR          0x00000001  // Signalling error detected\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the QEI_POS register.\r
+//\r
+//*****************************************************************************\r
+#define QEI_POS_M               0xFFFFFFFF  // Current encoder position\r
+#define QEI_POS_S               0\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the QEI_MAXPOS register.\r
+//\r
+//*****************************************************************************\r
+#define QEI_MAXPOS_M            0xFFFFFFFF  // Maximum encoder position\r
+#define QEI_MAXPOS_S            0\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the QEI_LOAD register.\r
+//\r
+//*****************************************************************************\r
+#define QEI_LOAD_M              0xFFFFFFFF  // Velocity timer load value\r
+#define QEI_LOAD_S              0\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the QEI_TIME register.\r
+//\r
+//*****************************************************************************\r
+#define QEI_TIME_M              0xFFFFFFFF  // Velocity timer current value\r
+#define QEI_TIME_S              0\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the QEI_COUNT register.\r
+//\r
+//*****************************************************************************\r
+#define QEI_COUNT_M             0xFFFFFFFF  // Encoder running pulse count\r
+#define QEI_COUNT_S             0\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the QEI_SPEED register.\r
+//\r
+//*****************************************************************************\r
+#define QEI_SPEED_M             0xFFFFFFFF  // Encoder pulse count\r
+#define QEI_SPEED_S             0\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the QEI_INTEN register.\r
+//\r
+//*****************************************************************************\r
+#define QEI_INTEN_ERROR         0x00000008  // Phase error detected\r
+#define QEI_INTEN_DIR           0x00000004  // Direction change\r
+#define QEI_INTEN_TIMER         0x00000002  // Velocity timer expired\r
+#define QEI_INTEN_INDEX         0x00000001  // Index pulse detected\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the QEI_RIS register.\r
+//\r
+//*****************************************************************************\r
+#define QEI_RIS_ERROR           0x00000008  // Phase error detected\r
+#define QEI_RIS_DIR             0x00000004  // Direction change\r
+#define QEI_RIS_TIMER           0x00000002  // Velocity timer expired\r
+#define QEI_RIS_INDEX           0x00000001  // Index pulse detected\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the QEI_ISC register.\r
+//\r
+//*****************************************************************************\r
+#define QEI_INT_ERROR           0x00000008  // Phase error detected\r
+#define QEI_INT_DIR             0x00000004  // Direction change\r
+#define QEI_INT_TIMER           0x00000002  // Velocity timer expired\r
+#define QEI_INT_INDEX           0x00000001  // Index pulse detected\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the reset values for the QEI registers.\r
+//\r
+//*****************************************************************************\r
+#define QEI_RV_CTL              0x00000000  // Configuration and control reg.\r
+#define QEI_RV_STAT             0x00000000  // Status register\r
+#define QEI_RV_POS              0x00000000  // Current position register\r
+#define QEI_RV_MAXPOS           0x00000000  // Maximum position register\r
+#define QEI_RV_LOAD             0x00000000  // Velocity timer load register\r
+#define QEI_RV_TIME             0x00000000  // Velocity timer register\r
+#define QEI_RV_COUNT            0x00000000  // Velocity pulse count register\r
+#define QEI_RV_SPEED            0x00000000  // Velocity speed register\r
+#define QEI_RV_INTEN            0x00000000  // Interrupt enable register\r
+#define QEI_RV_RIS              0x00000000  // Raw interrupt status register\r
+#define QEI_RV_ISC              0x00000000  // Interrupt status register\r
+\r
+#endif // __HW_QEI_H__\r

diff --git a/Demo/Common/drivers/LuminaryMicro/hw_ssi.h b/Demo/Common/drivers/LuminaryMicro/hw_ssi.h
new file mode 100644 (file)
index 0000000..b12c2c4
--- /dev/null
+++ b/Demo/Common/drivers/LuminaryMicro/hw_ssi.h
@@ -0,0 +1,120 @@
+//*****************************************************************************\r
+//\r
+// hw_ssi.h - Macros used when accessing the SSI hardware.\r
+//\r
+// Copyright (c) 2005-2007 Luminary Micro, Inc.  All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1582 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+#ifndef __HW_SSI_H__\r
+#define __HW_SSI_H__\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the offsets of the SSI registers.\r
+//\r
+//*****************************************************************************\r
+#define SSI_O_CR0               0x00000000  // Control register 0\r
+#define SSI_O_CR1               0x00000004  // Control register 1\r
+#define SSI_O_DR                0x00000008  // Data register\r
+#define SSI_O_SR                0x0000000C  // Status register\r
+#define SSI_O_CPSR              0x00000010  // Clock prescale register\r
+#define SSI_O_IM                0x00000014  // Int mask set and clear register\r
+#define SSI_O_RIS               0x00000018  // Raw interrupt register\r
+#define SSI_O_MIS               0x0000001C  // Masked interrupt register\r
+#define SSI_O_ICR               0x00000020  // Interrupt clear register\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the SSI Control register 0.\r
+//\r
+//*****************************************************************************\r
+#define SSI_CR0_SCR             0x0000FF00  // Serial clock rate\r
+#define SSI_CR0_SPH             0x00000080  // SSPCLKOUT phase\r
+#define SSI_CR0_SPO             0x00000040  // SSPCLKOUT polarity\r
+#define SSI_CR0_FRF_MASK        0x00000030  // Frame format mask\r
+#define SSI_CR0_FRF_MOTO        0x00000000  // Motorola SPI frame format\r
+#define SSI_CR0_FRF_TI          0x00000010  // TI sync serial frame format\r
+#define SSI_CR0_FRF_NMW         0x00000020  // National Microwire frame format\r
+#define SSI_CR0_DSS             0x0000000F  // Data size select\r
+#define SSI_CR0_DSS_4           0x00000003  // 4 bit data\r
+#define SSI_CR0_DSS_5           0x00000004  // 5 bit data\r
+#define SSI_CR0_DSS_6           0x00000005  // 6 bit data\r
+#define SSI_CR0_DSS_7           0x00000006  // 7 bit data\r
+#define SSI_CR0_DSS_8           0x00000007  // 8 bit data\r
+#define SSI_CR0_DSS_9           0x00000008  // 9 bit data\r
+#define SSI_CR0_DSS_10          0x00000009  // 10 bit data\r
+#define SSI_CR0_DSS_11          0x0000000A  // 11 bit data\r
+#define SSI_CR0_DSS_12          0x0000000B  // 12 bit data\r
+#define SSI_CR0_DSS_13          0x0000000C  // 13 bit data\r
+#define SSI_CR0_DSS_14          0x0000000D  // 14 bit data\r
+#define SSI_CR0_DSS_15          0x0000000E  // 15 bit data\r
+#define SSI_CR0_DSS_16          0x0000000F  // 16 bit data\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the SSI Control register 1.\r
+//\r
+//*****************************************************************************\r
+#define SSI_CR1_SOD             0x00000008  // Slave mode output disable\r
+#define SSI_CR1_MS              0x00000004  // Master or slave mode select\r
+#define SSI_CR1_SSE             0x00000002  // Sync serial port enable\r
+#define SSI_CR1_LBM             0x00000001  // Loopback mode\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the SSI Status register.\r
+//\r
+//*****************************************************************************\r
+#define SSI_SR_BSY              0x00000010  // SSI busy\r
+#define SSI_SR_RFF              0x00000008  // RX FIFO full\r
+#define SSI_SR_RNE              0x00000004  // RX FIFO not empty\r
+#define SSI_SR_TNF              0x00000002  // TX FIFO not full\r
+#define SSI_SR_TFE              0x00000001  // TX FIFO empty\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the SSI clock prescale register.\r
+//\r
+//*****************************************************************************\r
+#define SSI_CPSR_CPSDVSR_MASK   0x000000FF  // Clock prescale\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define information concerning the SSI Data register.\r
+//\r
+//*****************************************************************************\r
+#define TX_FIFO_SIZE            (8)         // Number of entries in the TX FIFO\r
+#define RX_FIFO_SIZE            (8)         // Number of entries in the RX FIFO\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the interrupt mask set and clear,\r
+// raw interrupt, masked interrupt, and interrupt clear registers.\r
+//\r
+//*****************************************************************************\r
+#define SSI_INT_TXFF            0x00000008  // TX FIFO interrupt\r
+#define SSI_INT_RXFF            0x00000004  // RX FIFO interrupt\r
+#define SSI_INT_RXTO            0x00000002  // RX timeout interrupt\r
+#define SSI_INT_RXOR            0x00000001  // RX overrun interrupt\r
+\r
+#endif // __HW_SSI_H__\r

diff --git a/Demo/Common/drivers/LuminaryMicro/hw_sysctl.h b/Demo/Common/drivers/LuminaryMicro/hw_sysctl.h
new file mode 100644 (file)
index 0000000..f540e63
--- /dev/null
+++ b/Demo/Common/drivers/LuminaryMicro/hw_sysctl.h
@@ -0,0 +1,703 @@
+//*****************************************************************************\r
+//\r
+// hw_sysctl.h - Macros used when accessing the system control hardware.\r
+//\r
+// Copyright (c) 2005-2007 Luminary Micro, Inc.  All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1582 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+#ifndef __HW_SYSCTL_H__\r
+#define __HW_SYSCTL_H__\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the addresses of the system control registers.\r
+//\r
+//*****************************************************************************\r
+#define SYSCTL_DID0             0x400fe000  // Device identification register 0\r
+#define SYSCTL_DID1             0x400fe004  // Device identification register 1\r
+#define SYSCTL_DC0              0x400fe008  // Device capabilities register 0\r
+#define SYSCTL_DC1              0x400fe010  // Device capabilities register 1\r
+#define SYSCTL_DC2              0x400fe014  // Device capabilities register 2\r
+#define SYSCTL_DC3              0x400fe018  // Device capabilities register 3\r
+#define SYSCTL_DC4              0x400fe01C  // Device capabilities register 4\r
+#define SYSCTL_PBORCTL          0x400fe030  // POR/BOR reset control register\r
+#define SYSCTL_LDOPCTL          0x400fe034  // LDO power control register\r
+#define SYSCTL_SRCR0            0x400fe040  // Software reset control reg 0\r
+#define SYSCTL_SRCR1            0x400fe044  // Software reset control reg 1\r
+#define SYSCTL_SRCR2            0x400fe048  // Software reset control reg 2\r
+#define SYSCTL_RIS              0x400fe050  // Raw interrupt status register\r
+#define SYSCTL_IMC              0x400fe054  // Interrupt mask/control register\r
+#define SYSCTL_MISC             0x400fe058  // Interrupt status register\r
+#define SYSCTL_RESC             0x400fe05c  // Reset cause register\r
+#define SYSCTL_RCC              0x400fe060  // Run-mode clock config register\r
+#define SYSCTL_PLLCFG           0x400fe064  // PLL configuration register\r
+#define SYSCTL_RCC2             0x400fe070  // Run-mode clock config register 2\r
+#define SYSCTL_RCGC0            0x400fe100  // Run-mode clock gating register 0\r
+#define SYSCTL_RCGC1            0x400fe104  // Run-mode clock gating register 1\r
+#define SYSCTL_RCGC2            0x400fe108  // Run-mode clock gating register 2\r
+#define SYSCTL_SCGC0            0x400fe110  // Sleep-mode clock gating reg 0\r
+#define SYSCTL_SCGC1            0x400fe114  // Sleep-mode clock gating reg 1\r
+#define SYSCTL_SCGC2            0x400fe118  // Sleep-mode clock gating reg 2\r
+#define SYSCTL_DCGC0            0x400fe120  // Deep Sleep-mode clock gate reg 0\r
+#define SYSCTL_DCGC1            0x400fe124  // Deep Sleep-mode clock gate reg 1\r
+#define SYSCTL_DCGC2            0x400fe128  // Deep Sleep-mode clock gate reg 2\r
+#define SYSCTL_DSLPCLKCFG       0x400fe144  // Deep Sleep-mode clock config reg\r
+#define SYSCTL_CLKVCLR          0x400fe150  // Clock verifcation clear register\r
+#define SYSCTL_LDOARST          0x400fe160  // LDO reset control register\r
+#define SYSCTL_USER0            0x400fe1e0  // NV User Register 0\r
+#define SYSCTL_USER1            0x400fe1e4  // NV User Register 1\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the SYSCTL_DID0 register.\r
+//\r
+//*****************************************************************************\r
+#define SYSCTL_DID0_VER_MASK        0x70000000  // DID0 version mask\r
+#define SYSCTL_DID0_VER_0           0x00000000  // DID0 version 0\r
+#define SYSCTL_DID0_VER_1           0x10000000  // DID0 version 1\r
+#define SYSCTL_DID0_CLASS_MASK      0x00FF0000  // Device Class\r
+#define SYSCTL_DID0_CLASS_SANDSTORM 0x00000000  // Sandstorm-class Device\r
+#define SYSCTL_DID0_CLASS_FURY      0x00010000  // Fury-class Device\r
+#define SYSCTL_DID0_MAJ_MASK        0x0000FF00  // Major revision mask\r
+#define SYSCTL_DID0_MAJ_A           0x00000000  // Major revision A\r
+#define SYSCTL_DID0_MAJ_B           0x00000100  // Major revision B\r
+#define SYSCTL_DID0_MAJ_C           0x00000200  // Major revision C\r
+#define SYSCTL_DID0_MIN_MASK        0x000000FF  // Minor revision mask\r
+#define SYSCTL_DID0_MIN_0           0x00000000  // Minor revision 0\r
+#define SYSCTL_DID0_MIN_1           0x00000001  // Minor revision 1\r
+#define SYSCTL_DID0_MIN_2           0x00000002  // Minor revision 2\r
+#define SYSCTL_DID0_MIN_3           0x00000003  // Minor revision 3\r
+#define SYSCTL_DID0_MIN_4           0x00000004  // Minor revision 4\r
+#define SYSCTL_DID0_MIN_5           0x00000005  // Minor revision 5\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the SYSCTL_DID1 register.\r
+//\r
+//*****************************************************************************\r
+#define SYSCTL_DID1_VER_MASK    0xF0000000  // Register version mask\r
+#define SYSCTL_DID1_FAM_MASK    0x0F000000  // Family mask\r
+#define SYSCTL_DID1_FAM_S       0x00000000  // Stellaris family\r
+#define SYSCTL_DID1_PRTNO_MASK  0x00FF0000  // Part number mask\r
+#define SYSCTL_DID1_PRTNO_101   0x00010000  // LM3S101\r
+#define SYSCTL_DID1_PRTNO_102   0x00020000  // LM3S102\r
+#define SYSCTL_DID1_PRTNO_301   0x00110000  // LM3S301\r
+#define SYSCTL_DID1_PRTNO_310   0x00120000  // LM3S310\r
+#define SYSCTL_DID1_PRTNO_315   0x00130000  // LM3S315\r
+#define SYSCTL_DID1_PRTNO_316   0x00140000  // LM3S316\r
+#define SYSCTL_DID1_PRTNO_317   0x00170000  // LM3S317\r
+#define SYSCTL_DID1_PRTNO_328   0x00150000  // LM3S328\r
+#define SYSCTL_DID1_PRTNO_601   0x00210000  // LM3S601\r
+#define SYSCTL_DID1_PRTNO_610   0x00220000  // LM3S610\r
+#define SYSCTL_DID1_PRTNO_611   0x00230000  // LM3S611\r
+#define SYSCTL_DID1_PRTNO_612   0x00240000  // LM3S612\r
+#define SYSCTL_DID1_PRTNO_613   0x00250000  // LM3S613\r
+#define SYSCTL_DID1_PRTNO_615   0x00260000  // LM3S615\r
+#define SYSCTL_DID1_PRTNO_617   0x00280000  // LM3S617\r
+#define SYSCTL_DID1_PRTNO_618   0x00290000  // LM3S618\r
+#define SYSCTL_DID1_PRTNO_628   0x00270000  // LM3S628\r
+#define SYSCTL_DID1_PRTNO_801   0x00310000  // LM3S801\r
+#define SYSCTL_DID1_PRTNO_811   0x00320000  // LM3S811\r
+#define SYSCTL_DID1_PRTNO_812   0x00330000  // LM3S812\r
+#define SYSCTL_DID1_PRTNO_815   0x00340000  // LM3S815\r
+#define SYSCTL_DID1_PRTNO_817   0x00360000  // LM3S817\r
+#define SYSCTL_DID1_PRTNO_818   0x00370000  // LM3S818\r
+#define SYSCTL_DID1_PRTNO_828   0x00350000  // LM3S828\r
+#define SYSCTL_DID1_PRTNO_1110  0x00BF0000  // LM3S1110\r
+#define SYSCTL_DID1_PRTNO_1133  0x00C30000  // LM3S1133\r
+#define SYSCTL_DID1_PRTNO_1138  0x00C50000  // LM3S1138\r
+#define SYSCTL_DID1_PRTNO_1150  0x00C10000  // LM3S1150\r
+#define SYSCTL_DID1_PRTNO_1162  0x00C40000  // LM3S1162\r
+#define SYSCTL_DID1_PRTNO_1165  0x00C20000  // LM3S1165\r
+#define SYSCTL_DID1_PRTNO_1332  0x00C60000  // LM3S1332\r
+#define SYSCTL_DID1_PRTNO_1435  0x00BC0000  // LM3S1435\r
+#define SYSCTL_DID1_PRTNO_1439  0x00BA0000  // LM3S1439\r
+#define SYSCTL_DID1_PRTNO_1512  0x00BB0000  // LM3S1512\r
+#define SYSCTL_DID1_PRTNO_1538  0x00C70000  // LM3S1538\r
+#define SYSCTL_DID1_PRTNO_1620  0x00C00000  // LM3S1620\r
+#define SYSCTL_DID1_PRTNO_1635  0x00B30000  // LM3S1635\r
+#define SYSCTL_DID1_PRTNO_1637  0x00BD0000  // LM3S1637\r
+#define SYSCTL_DID1_PRTNO_1751  0x00B90000  // LM3S1751\r
+#define SYSCTL_DID1_PRTNO_1850  0x00B40000  // LM3S1850\r
+#define SYSCTL_DID1_PRTNO_1937  0x00B70000  // LM3S1937\r
+#define SYSCTL_DID1_PRTNO_1958  0x00BE0000  // LM3S1958\r
+#define SYSCTL_DID1_PRTNO_1960  0x00B50000  // LM3S1960\r
+#define SYSCTL_DID1_PRTNO_1968  0x00B80000  // LM3S1968\r
+#define SYSCTL_DID1_PRTNO_2110  0x00510000  // LM3S2110\r
+#define SYSCTL_DID1_PRTNO_2139  0x00840000  // LM3S2139\r
+#define SYSCTL_DID1_PRTNO_2410  0x00A20000  // LM3S2410\r
+#define SYSCTL_DID1_PRTNO_2412  0x00590000  // LM3S2412\r
+#define SYSCTL_DID1_PRTNO_2432  0x00560000  // LM3S2432\r
+#define SYSCTL_DID1_PRTNO_2533  0x005A0000  // LM3S2533\r
+#define SYSCTL_DID1_PRTNO_2620  0x00570000  // LM3S2620\r
+#define SYSCTL_DID1_PRTNO_2637  0x00850000  // LM3S2637\r
+#define SYSCTL_DID1_PRTNO_2651  0x00530000  // LM3S2651\r
+#define SYSCTL_DID1_PRTNO_2730  0x00A40000  // LM3S2730\r
+#define SYSCTL_DID1_PRTNO_2739  0x00520000  // LM3S2739\r
+#define SYSCTL_DID1_PRTNO_2939  0x00540000  // LM3S2939\r
+#define SYSCTL_DID1_PRTNO_2948  0x008F0000  // LM3S2948\r
+#define SYSCTL_DID1_PRTNO_2950  0x00580000  // LM3S2950\r
+#define SYSCTL_DID1_PRTNO_2965  0x00550000  // LM3S2965\r
+#define SYSCTL_DID1_PRTNO_6100  0x00A10000  // LM3S6100\r
+#define SYSCTL_DID1_PRTNO_6110  0x00740000  // LM3S6110\r
+#define SYSCTL_DID1_PRTNO_6420  0x00A50000  // LM3S6420\r
+#define SYSCTL_DID1_PRTNO_6422  0x00820000  // LM3S6422\r
+#define SYSCTL_DID1_PRTNO_6432  0x00750000  // LM3S6432\r
+#define SYSCTL_DID1_PRTNO_6537  0x00760000  // LM3S6537\r
+#define SYSCTL_DID1_PRTNO_6610  0x00710000  // LM3S6610\r
+#define SYSCTL_DID1_PRTNO_6633  0x00830000  // LM3S6633\r
+#define SYSCTL_DID1_PRTNO_6637  0x008B0000  // LM3S6637\r
+#define SYSCTL_DID1_PRTNO_6730  0x00A30000  // LM3S6730\r
+#define SYSCTL_DID1_PRTNO_6753  0x00770000  // LM3S6753\r
+#define SYSCTL_DID1_PRTNO_6938  0x00890000  // LM3S6938\r
+#define SYSCTL_DID1_PRTNO_6950  0x00720000  // LM3S6950\r
+#define SYSCTL_DID1_PRTNO_6952  0x00780000  // LM3S6952\r
+#define SYSCTL_DID1_PRTNO_6965  0x00730000  // LM3S6965\r
+#define SYSCTL_DID1_PRTNO_8530  0x00640000  // LM3S8530\r
+#define SYSCTL_DID1_PRTNO_8538  0x008E0000  // LM3S8538\r
+#define SYSCTL_DID1_PRTNO_8630  0x00610000  // LM3S8630\r
+#define SYSCTL_DID1_PRTNO_8730  0x00630000  // LM3S8730\r
+#define SYSCTL_DID1_PRTNO_8733  0x008D0000  // LM3S8733\r
+#define SYSCTL_DID1_PRTNO_8738  0x00860000  // LM3S8738\r
+#define SYSCTL_DID1_PRTNO_8930  0x00650000  // LM3S8930\r
+#define SYSCTL_DID1_PRTNO_8933  0x008C0000  // LM3S8933\r
+#define SYSCTL_DID1_PRTNO_8938  0x00880000  // LM3S8938\r
+#define SYSCTL_DID1_PRTNO_8962  0x00A60000  // LM3S8962\r
+#define SYSCTL_DID1_PRTNO_8970  0x00620000  // LM3S8970\r
+#define SYSCTL_DID1_PINCNT_MASK 0x0000E000  // Pin count\r
+#define SYSCTL_DID1_PINCNT_100  0x00004000  // 100 pin package\r
+#define SYSCTL_DID1_TEMP_MASK   0x000000E0  // Temperature range mask\r
+#define SYSCTL_DID1_TEMP_C      0x00000000  // Commercial temp range (0..70C)\r
+#define SYSCTL_DID1_TEMP_I      0x00000020  // Industrial temp range (-40..85C)\r
+#define SYSCTL_DID1_PKG_MASK    0x00000018  // Package mask\r
+#define SYSCTL_DID1_PKG_28SOIC  0x00000000  // 28-pin SOIC\r
+#define SYSCTL_DID1_PKG_48QFP   0x00000008  // 48-pin QFP\r
+#define SYSCTL_DID1_ROHS        0x00000004  // Part is RoHS compliant\r
+#define SYSCTL_DID1_QUAL_MASK   0x00000003  // Qualification status mask\r
+#define SYSCTL_DID1_QUAL_ES     0x00000000  // Engineering sample (unqualified)\r
+#define SYSCTL_DID1_QUAL_PP     0x00000001  // Pilot production (unqualified)\r
+#define SYSCTL_DID1_QUAL_FQ     0x00000002  // Fully qualified\r
+#define SYSCTL_DID1_PRTNO_SHIFT 16\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the SYSCTL_DC0 register.\r
+//\r
+//*****************************************************************************\r
+#define SYSCTL_DC0_SRAMSZ_MASK  0xFFFF0000  // SRAM size mask\r
+#define SYSCTL_DC0_SRAMSZ_2KB   0x00070000  // 2 KB of SRAM\r
+#define SYSCTL_DC0_SRAMSZ_4KB   0x000F0000  // 4 KB of SRAM\r
+#define SYSCTL_DC0_SRAMSZ_8KB   0x001F0000  // 8 KB of SRAM\r
+#define SYSCTL_DC0_SRAMSZ_16KB  0x003F0000  // 16 KB of SRAM\r
+#define SYSCTL_DC0_SRAMSZ_32KB  0x007F0000  // 32 KB of SRAM\r
+#define SYSCTL_DC0_SRAMSZ_64KB  0x00FF0000  // 64 KB of SRAM\r
+#define SYSCTL_DC0_FLASHSZ_MASK 0x0000FFFF  // Flash size mask\r
+#define SYSCTL_DC0_FLASHSZ_8KB  0x00000003  // 8 KB of flash\r
+#define SYSCTL_DC0_FLASHSZ_16KB 0x00000007  // 16 KB of flash\r
+#define SYSCTL_DC0_FLASHSZ_32KB 0x0000000F  // 32 KB of flash\r
+#define SYSCTL_DC0_FLASHSZ_64KB 0x0000001F  // 64 KB of flash\r
+#define SYSCTL_DC0_FLASHSZ_96KB 0x0000002F  // 96 KB of flash\r
+#define SYSCTL_DC0_FLASHSZ_128K 0x0000003F  // 128 KB of flash\r
+#define SYSCTL_DC0_FLASHSZ_256K 0x0000007F  // 256 KB of flash\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the SYSCTL_DC1 register.\r
+//\r
+//*****************************************************************************\r
+#define SYSCTL_DC1_CAN2         0x04000000  // CAN2 module present\r
+#define SYSCTL_DC1_CAN1         0x02000000  // CAN1 module present\r
+#define SYSCTL_DC1_CAN0         0x01000000  // CAN0 module present\r
+#define SYSCTL_DC1_PWM          0x00100000  // PWM module present\r
+#define SYSCTL_DC1_ADC          0x00010000  // ADC module present\r
+#define SYSCTL_DC1_SYSDIV_MASK  0x0000F000  // Minimum system divider mask\r
+#define SYSCTL_DC1_ADCSPD_MASK  0x00000F00  // ADC speed mask\r
+#define SYSCTL_DC1_ADCSPD_1M    0x00000300  // 1Msps ADC\r
+#define SYSCTL_DC1_ADCSPD_500K  0x00000200  // 500Ksps ADC\r
+#define SYSCTL_DC1_ADCSPD_250K  0x00000100  // 250Ksps ADC\r
+#define SYSCTL_DC1_ADCSPD_125K  0x00000000  // 125Ksps ADC\r
+#define SYSCTL_DC1_MPU          0x00000080  // Cortex M3 MPU present\r
+#define SYSCTL_DC1_HIB          0x00000040  // Hibernation module present\r
+#define SYSCTL_DC1_TEMP         0x00000020  // Temperature sensor present\r
+#define SYSCTL_DC1_PLL          0x00000010  // PLL present\r
+#define SYSCTL_DC1_WDOG         0x00000008  // Watchdog present\r
+#define SYSCTL_DC1_SWO          0x00000004  // Serial wire output present\r
+#define SYSCTL_DC1_SWD          0x00000002  // Serial wire debug present\r
+#define SYSCTL_DC1_JTAG         0x00000001  // JTAG debug present\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the SYSCTL_DC2 register.\r
+//\r
+//*****************************************************************************\r
+#define SYSCTL_DC2_COMP2        0x04000000  // Analog comparator 2 present\r
+#define SYSCTL_DC2_COMP1        0x02000000  // Analog comparator 1 present\r
+#define SYSCTL_DC2_COMP0        0x01000000  // Analog comparator 0 present\r
+#define SYSCTL_DC2_TIMER3       0x00080000  // Timer 3 present\r
+#define SYSCTL_DC2_TIMER2       0x00040000  // Timer 2 present\r
+#define SYSCTL_DC2_TIMER1       0x00020000  // Timer 1 present\r
+#define SYSCTL_DC2_TIMER0       0x00010000  // Timer 0 present\r
+#define SYSCTL_DC2_I2C1         0x00004000  // I2C 1 present\r
+#define SYSCTL_DC2_I2C0         0x00001000  // I2C 0 present\r
+#ifndef DEPRECATED\r
+#define SYSCTL_DC2_I2C          0x00001000  // I2C present\r
+#endif\r
+#define SYSCTL_DC2_QEI1         0x00000200  // QEI 1 present\r
+#define SYSCTL_DC2_QEI0         0x00000100  // QEI 0 present\r
+#ifndef DEPRECATED\r
+#define SYSCTL_DC2_QEI          0x00000100  // QEI present\r
+#endif\r
+#define SYSCTL_DC2_SSI1         0x00000020  // SSI 1 present\r
+#define SYSCTL_DC2_SSI0         0x00000010  // SSI 0 present\r
+#ifndef DEPRECATED\r
+#define SYSCTL_DC2_SSI          0x00000010  // SSI present\r
+#endif\r
+#define SYSCTL_DC2_UART2        0x00000004  // UART 2 present\r
+#define SYSCTL_DC2_UART1        0x00000002  // UART 1 present\r
+#define SYSCTL_DC2_UART0        0x00000001  // UART 0 present\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the SYSCTL_DC3 register.\r
+//\r
+//*****************************************************************************\r
+#define SYSCTL_DC3_32KHZ        0x80000000  // 32kHz pin present\r
+#define SYSCTL_DC3_CCP5         0x20000000  // CCP5 pin present\r
+#define SYSCTL_DC3_CCP4         0x10000000  // CCP4 pin present\r
+#define SYSCTL_DC3_CCP3         0x08000000  // CCP3 pin present\r
+#define SYSCTL_DC3_CCP2         0x04000000  // CCP2 pin present\r
+#define SYSCTL_DC3_CCP1         0x02000000  // CCP1 pin present\r
+#define SYSCTL_DC3_CCP0         0x01000000  // CCP0 pin present\r
+#define SYSCTL_DC3_ADC7         0x00800000  // ADC7 pin present\r
+#define SYSCTL_DC3_ADC6         0x00400000  // ADC6 pin present\r
+#define SYSCTL_DC3_ADC5         0x00200000  // ADC5 pin present\r
+#define SYSCTL_DC3_ADC4         0x00100000  // ADC4 pin present\r
+#define SYSCTL_DC3_ADC3         0x00080000  // ADC3 pin present\r
+#define SYSCTL_DC3_ADC2         0x00040000  // ADC2 pin present\r
+#define SYSCTL_DC3_ADC1         0x00020000  // ADC1 pin present\r
+#define SYSCTL_DC3_ADC0         0x00010000  // ADC0 pin present\r
+#define SYSCTL_DC3_MC_FAULT0    0x00008000  // MC0 fault pin present\r
+#define SYSCTL_DC3_C2O          0x00004000  // C2o pin present\r
+#define SYSCTL_DC3_C2PLUS       0x00002000  // C2+ pin present\r
+#define SYSCTL_DC3_C2MINUS      0x00001000  // C2- pin present\r
+#define SYSCTL_DC3_C1O          0x00000800  // C1o pin present\r
+#define SYSCTL_DC3_C1PLUS       0x00000400  // C1+ pin present\r
+#define SYSCTL_DC3_C1MINUS      0x00000200  // C1- pin present\r
+#define SYSCTL_DC3_C0O          0x00000100  // C0o pin present\r
+#define SYSCTL_DC3_C0PLUS       0x00000080  // C0+ pin present\r
+#define SYSCTL_DC3_C0MINUS      0x00000040  // C0- pin present\r
+#define SYSCTL_DC3_PWM5         0x00000020  // PWM5 pin present\r
+#define SYSCTL_DC3_PWM4         0x00000010  // PWM4 pin present\r
+#define SYSCTL_DC3_PWM3         0x00000008  // PWM3 pin present\r
+#define SYSCTL_DC3_PWM2         0x00000004  // PWM2 pin present\r
+#define SYSCTL_DC3_PWM1         0x00000002  // PWM1 pin present\r
+#define SYSCTL_DC3_PWM0         0x00000001  // PWM0 pin present\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the SYSCTL_DC4 register.\r
+//\r
+//*****************************************************************************\r
+#define SYSCTL_DC4_ETH          0x50000000  // Ethernet present\r
+#define SYSCTL_DC4_GPIOH        0x00000080  // GPIO port H present\r
+#define SYSCTL_DC4_GPIOG        0x00000040  // GPIO port G present\r
+#define SYSCTL_DC4_GPIOF        0x00000020  // GPIO port F present\r
+#define SYSCTL_DC4_GPIOE        0x00000010  // GPIO port E present\r
+#define SYSCTL_DC4_GPIOD        0x00000008  // GPIO port D present\r
+#define SYSCTL_DC4_GPIOC        0x00000004  // GPIO port C present\r
+#define SYSCTL_DC4_GPIOB        0x00000002  // GPIO port B present\r
+#define SYSCTL_DC4_GPIOA        0x00000001  // GPIO port A present\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the SYSCTL_PBORCTL register.\r
+//\r
+//*****************************************************************************\r
+#define SYSCTL_PBORCTL_BOR_MASK 0x0000FFFC  // BOR wait timer\r
+#define SYSCTL_PBORCTL_BORIOR   0x00000002  // BOR interrupt or reset\r
+#define SYSCTL_PBORCTL_BORWT    0x00000001  // BOR wait and check for noise\r
+#define SYSCTL_PBORCTL_BOR_SH   2\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the SYSCTL_LDOPCTL register.\r
+//\r
+//*****************************************************************************\r
+#define SYSCTL_LDOPCTL_MASK     0x0000003F  // Voltage adjust mask\r
+#define SYSCTL_LDOPCTL_2_25V    0x00000005  // LDO output of 2.25V\r
+#define SYSCTL_LDOPCTL_2_30V    0x00000004  // LDO output of 2.30V\r
+#define SYSCTL_LDOPCTL_2_35V    0x00000003  // LDO output of 2.35V\r
+#define SYSCTL_LDOPCTL_2_40V    0x00000002  // LDO output of 2.40V\r
+#define SYSCTL_LDOPCTL_2_45V    0x00000001  // LDO output of 2.45V\r
+#define SYSCTL_LDOPCTL_2_50V    0x00000000  // LDO output of 2.50V\r
+#define SYSCTL_LDOPCTL_2_55V    0x0000001F  // LDO output of 2.55V\r
+#define SYSCTL_LDOPCTL_2_60V    0x0000001E  // LDO output of 2.60V\r
+#define SYSCTL_LDOPCTL_2_65V    0x0000001D  // LDO output of 2.65V\r
+#define SYSCTL_LDOPCTL_2_70V    0x0000001C  // LDO output of 2.70V\r
+#define SYSCTL_LDOPCTL_2_75V    0x0000001B  // LDO output of 2.75V\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the SYSCTL_SRCR0, SYSCTL_RCGC0,\r
+// SYSCTL_SCGC0, and SYSCTL_DCGC0 registers.\r
+//\r
+//*****************************************************************************\r
+#define SYSCTL_SET0_CAN2        0x04000000  // CAN2 module\r
+#define SYSCTL_SET0_CAN1        0x02000000  // CAN1 module\r
+#define SYSCTL_SET0_CAN0        0x01000000  // CAN0 module\r
+#define SYSCTL_SET0_PWM         0x00100000  // PWM module\r
+#define SYSCTL_SET0_ADC         0x00010000  // ADC module\r
+#define SYSCTL_SET0_ADCSPD_MASK 0x00000F00  // ADC speed mask\r
+#define SYSCTL_SET0_ADCSPD_1M   0x00000300  // 1Msps ADC\r
+#define SYSCTL_SET0_ADCSPD_500K 0x00000200  // 500Ksps ADC\r
+#define SYSCTL_SET0_ADCSPD_250K 0x00000100  // 250Ksps ADC\r
+#define SYSCTL_SET0_ADCSPD_125K 0x00000000  // 125Ksps ADC\r
+#define SYSCTL_SET0_HIB         0x00000040  // Hibernation module\r
+#define SYSCTL_SET0_WDOG        0x00000008  // Watchdog module\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the SYSCTL_SRCR1, SYSCTL_RCGC1,\r
+// SYSCTL_SCGC1, and SYSCTL_DCGC1 registers.\r
+//\r
+//*****************************************************************************\r
+#define SYSCTL_SET1_COMP2       0x04000000  // Analog comparator module 2\r
+#define SYSCTL_SET1_COMP1       0x02000000  // Analog comparator module 1\r
+#define SYSCTL_SET1_COMP0       0x01000000  // Analog comparator module 0\r
+#define SYSCTL_SET1_TIMER3      0x00080000  // Timer module 3\r
+#define SYSCTL_SET1_TIMER2      0x00040000  // Timer module 2\r
+#define SYSCTL_SET1_TIMER1      0x00020000  // Timer module 1\r
+#define SYSCTL_SET1_TIMER0      0x00010000  // Timer module 0\r
+#define SYSCTL_SET1_I2C1        0x00004000  // I2C module 1\r
+#define SYSCTL_SET1_I2C0        0x00001000  // I2C module 0\r
+#ifndef DEPRECATED\r
+#define SYSCTL_SET1_I2C         0x00001000  // I2C module\r
+#endif\r
+#define SYSCTL_SET1_QEI1        0x00000200  // QEI module 1\r
+#define SYSCTL_SET1_QEI0        0x00000100  // QEI module 0\r
+#ifndef DEPRECATED\r
+#define SYSCTL_SET1_QEI         0x00000100  // QEI module\r
+#endif\r
+#define SYSCTL_SET1_SSI1        0x00000020  // SSI module 1\r
+#define SYSCTL_SET1_SSI0        0x00000010  // SSI module 0\r
+#ifndef DEPRECATED\r
+#define SYSCTL_SET1_SSI         0x00000010  // SSI module\r
+#endif\r
+#define SYSCTL_SET1_UART2       0x00000004  // UART module 2\r
+#define SYSCTL_SET1_UART1       0x00000002  // UART module 1\r
+#define SYSCTL_SET1_UART0       0x00000001  // UART module 0\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the SYSCTL_SRCR2, SYSCTL_RCGC2,\r
+// SYSCTL_SCGC2, and SYSCTL_DCGC2 registers.\r
+//\r
+//*****************************************************************************\r
+#define SYSCTL_SET2_ETH         0x50000000  // ETH module\r
+#define SYSCTL_SET2_GPIOH       0x00000080  // GPIO H module\r
+#define SYSCTL_SET2_GPIOG       0x00000040  // GPIO G module\r
+#define SYSCTL_SET2_GPIOF       0x00000020  // GPIO F module\r
+#define SYSCTL_SET2_GPIOE       0x00000010  // GPIO E module\r
+#define SYSCTL_SET2_GPIOD       0x00000008  // GPIO D module\r
+#define SYSCTL_SET2_GPIOC       0x00000004  // GPIO C module\r
+#define SYSCTL_SET2_GPIOB       0x00000002  // GPIO B module\r
+#define SYSCTL_SET2_GPIOA       0x00000001  // GIPO A module\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the SYSCTL_RIS, SYSCTL_IMC, and\r
+// SYSCTL_IMS registers.\r
+//\r
+//*****************************************************************************\r
+#define SYSCTL_INT_PLL_LOCK     0x00000040  // PLL lock interrupt\r
+#define SYSCTL_INT_CUR_LIMIT    0x00000020  // Current limit interrupt\r
+#define SYSCTL_INT_IOSC_FAIL    0x00000010  // Internal oscillator failure int\r
+#define SYSCTL_INT_MOSC_FAIL    0x00000008  // Main oscillator failure int\r
+#define SYSCTL_INT_POR          0x00000004  // Power on reset interrupt\r
+#define SYSCTL_INT_BOR          0x00000002  // Brown out interrupt\r
+#define SYSCTL_INT_PLL_FAIL     0x00000001  // PLL failure interrupt\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the SYSCTL_RESC register.\r
+//\r
+//*****************************************************************************\r
+#define SYSCTL_RESC_LDO         0x00000020  // LDO power OK lost reset\r
+#define SYSCTL_RESC_SW          0x00000010  // Software reset\r
+#define SYSCTL_RESC_WDOG        0x00000008  // Watchdog reset\r
+#define SYSCTL_RESC_BOR         0x00000004  // Brown-out reset\r
+#define SYSCTL_RESC_POR         0x00000002  // Power on reset\r
+#define SYSCTL_RESC_EXT         0x00000001  // External reset\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the SYSCTL_RCC register.\r
+//\r
+//*****************************************************************************\r
+#define SYSCTL_RCC_ACG          0x08000000  // Automatic clock gating\r
+#define SYSCTL_RCC_SYSDIV_MASK  0x07800000  // System clock divider\r
+#define SYSCTL_RCC_SYSDIV_2     0x00800000  // System clock /2\r
+#define SYSCTL_RCC_SYSDIV_3     0x01000000  // System clock /3\r
+#define SYSCTL_RCC_SYSDIV_4     0x01800000  // System clock /4\r
+#define SYSCTL_RCC_SYSDIV_5     0x02000000  // System clock /5\r
+#define SYSCTL_RCC_SYSDIV_6     0x02800000  // System clock /6\r
+#define SYSCTL_RCC_SYSDIV_7     0x03000000  // System clock /7\r
+#define SYSCTL_RCC_SYSDIV_8     0x03800000  // System clock /8\r
+#define SYSCTL_RCC_SYSDIV_9     0x04000000  // System clock /9\r
+#define SYSCTL_RCC_SYSDIV_10    0x04800000  // System clock /10\r
+#define SYSCTL_RCC_SYSDIV_11    0x05000000  // System clock /11\r
+#define SYSCTL_RCC_SYSDIV_12    0x05800000  // System clock /12\r
+#define SYSCTL_RCC_SYSDIV_13    0x06000000  // System clock /13\r
+#define SYSCTL_RCC_SYSDIV_14    0x06800000  // System clock /14\r
+#define SYSCTL_RCC_SYSDIV_15    0x07000000  // System clock /15\r
+#define SYSCTL_RCC_SYSDIV_16    0x07800000  // System clock /16\r
+#define SYSCTL_RCC_USE_SYSDIV   0x00400000  // Use sytem clock divider\r
+#define SYSCTL_RCC_USE_PWMDIV   0x00100000  // Use PWM clock divider\r
+#define SYSCTL_RCC_PWMDIV_MASK  0x000E0000  // PWM clock divider\r
+#define SYSCTL_RCC_PWMDIV_2     0x00000000  // PWM clock /2\r
+#define SYSCTL_RCC_PWMDIV_4     0x00020000  // PWM clock /4\r
+#define SYSCTL_RCC_PWMDIV_8     0x00040000  // PWM clock /8\r
+#define SYSCTL_RCC_PWMDIV_16    0x00060000  // PWM clock /16\r
+#define SYSCTL_RCC_PWMDIV_32    0x00080000  // PWM clock /32\r
+#define SYSCTL_RCC_PWMDIV_64    0x000A0000  // PWM clock /64\r
+#define SYSCTL_RCC_PWRDN        0x00002000  // PLL power down\r
+#define SYSCTL_RCC_OE           0x00001000  // PLL output enable\r
+#define SYSCTL_RCC_BYPASS       0x00000800  // PLL bypass\r
+#define SYSCTL_RCC_PLLVER       0x00000400  // PLL verification timer enable\r
+#define SYSCTL_RCC_XTAL_MASK    0x000003C0  // Crystal attached to main osc\r
+#define SYSCTL_RCC_XTAL_1MHZ    0x00000000  // Using a 1MHz crystal\r
+#define SYSCTL_RCC_XTAL_1_84MHZ 0x00000040  // Using a 1.8432MHz crystal\r
+#define SYSCTL_RCC_XTAL_2MHZ    0x00000080  // Using a 2MHz crystal\r
+#define SYSCTL_RCC_XTAL_2_45MHZ 0x000000C0  // Using a 2.4576MHz crystal\r
+#define SYSCTL_RCC_XTAL_3_57MHZ 0x00000100  // Using a 3.579545MHz crystal\r
+#define SYSCTL_RCC_XTAL_3_68MHZ 0x00000140  // Using a 3.6864MHz crystal\r
+#define SYSCTL_RCC_XTAL_4MHZ    0x00000180  // Using a 4MHz crystal\r
+#ifdef DEPRECATED\r
+#define SYSCTL_RCC_XTAL_3_68MHz 0x00000140  // Using a 3.6864MHz crystal\r
+#define SYSCTL_RCC_XTAL_4MHz    0x00000180  // Using a 4MHz crystal\r
+#endif\r
+#define SYSCTL_RCC_XTAL_4_09MHZ 0x000001C0  // Using a 4.096MHz crystal\r
+#define SYSCTL_RCC_XTAL_4_91MHZ 0x00000200  // Using a 4.9152MHz crystal\r
+#define SYSCTL_RCC_XTAL_5MHZ    0x00000240  // Using a 5MHz crystal\r
+#define SYSCTL_RCC_XTAL_5_12MHZ 0x00000280  // Using a 5.12MHz crystal\r
+#define SYSCTL_RCC_XTAL_6MHZ    0x000002C0  // Using a 6MHz crystal\r
+#define SYSCTL_RCC_XTAL_6_14MHZ 0x00000300  // Using a 6.144MHz crystal\r
+#define SYSCTL_RCC_XTAL_7_37MHZ 0x00000340  // Using a 7.3728MHz crystal\r
+#define SYSCTL_RCC_XTAL_8MHZ    0x00000380  // Using a 8MHz crystal\r
+#define SYSCTL_RCC_XTAL_8_19MHZ 0x000003C0  // Using a 8.192MHz crystal\r
+#define SYSCTL_RCC_OSCSRC_MASK  0x00000030  // Oscillator input select\r
+#define SYSCTL_RCC_OSCSRC_MAIN  0x00000000  // Use the main oscillator\r
+#define SYSCTL_RCC_OSCSRC_INT   0x00000010  // Use the internal oscillator\r
+#define SYSCTL_RCC_OSCSRC_INT4  0x00000020  // Use the internal oscillator / 4\r
+#define SYSCTL_RCC_IOSCVER      0x00000008  // Int. osc. verification timer en\r
+#define SYSCTL_RCC_MOSCVER      0x00000004  // Main osc. verification timer en\r
+#define SYSCTL_RCC_IOSCDIS      0x00000002  // Internal oscillator disable\r
+#define SYSCTL_RCC_MOSCDIS      0x00000001  // Main oscillator disable\r
+#define SYSCTL_RCC_SYSDIV_SHIFT 23          // Shift to the SYSDIV field\r
+#define SYSCTL_RCC_PWMDIV_SHIFT 17          // Shift to the PWMDIV field\r
+#define SYSCTL_RCC_XTAL_SHIFT   6           // Shift to the XTAL field\r
+#define SYSCTL_RCC_OSCSRC_SHIFT 4           // Shift to the OSCSRC field\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the SYSCTL_PLLCFG register.\r
+//\r
+//*****************************************************************************\r
+#define SYSCTL_PLLCFG_OD_MASK   0x0000C000  // Output divider\r
+#define SYSCTL_PLLCFG_OD_1      0x00000000  // Output divider is 1\r
+#define SYSCTL_PLLCFG_OD_2      0x00004000  // Output divider is 2\r
+#define SYSCTL_PLLCFG_OD_4      0x00008000  // Output divider is 4\r
+#define SYSCTL_PLLCFG_F_MASK    0x00003FE0  // PLL multiplier\r
+#define SYSCTL_PLLCFG_R_MASK    0x0000001F  // Input predivider\r
+#define SYSCTL_PLLCFG_F_SHIFT   5\r
+#define SYSCTL_PLLCFG_R_SHIFT   0\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the SYSCTL_RCC2 register.\r
+//\r
+//*****************************************************************************\r
+#define SYSCTL_RCC2_USERCC2     0x80000000  // Use RCC2\r
+#define SYSCTL_RCC2_SYSDIV2_MSK 0x1F800000  // System clock divider\r
+#define SYSCTL_RCC2_SYSDIV2_2   0x00800000  // System clock /2\r
+#define SYSCTL_RCC2_SYSDIV2_3   0x01000000  // System clock /3\r
+#define SYSCTL_RCC2_SYSDIV2_4   0x01800000  // System clock /4\r
+#define SYSCTL_RCC2_SYSDIV2_5   0x02000000  // System clock /5\r
+#define SYSCTL_RCC2_SYSDIV2_6   0x02800000  // System clock /6\r
+#define SYSCTL_RCC2_SYSDIV2_7   0x03000000  // System clock /7\r
+#define SYSCTL_RCC2_SYSDIV2_8   0x03800000  // System clock /8\r
+#define SYSCTL_RCC2_SYSDIV2_9   0x04000000  // System clock /9\r
+#define SYSCTL_RCC2_SYSDIV2_10  0x04800000  // System clock /10\r
+#define SYSCTL_RCC2_SYSDIV2_11  0x05000000  // System clock /11\r
+#define SYSCTL_RCC2_SYSDIV2_12  0x05800000  // System clock /12\r
+#define SYSCTL_RCC2_SYSDIV2_13  0x06000000  // System clock /13\r
+#define SYSCTL_RCC2_SYSDIV2_14  0x06800000  // System clock /14\r
+#define SYSCTL_RCC2_SYSDIV2_15  0x07000000  // System clock /15\r
+#define SYSCTL_RCC2_SYSDIV2_16  0x07800000  // System clock /16\r
+#define SYSCTL_RCC2_SYSDIV2_17  0x08000000  // System clock /17\r
+#define SYSCTL_RCC2_SYSDIV2_18  0x08800000  // System clock /18\r
+#define SYSCTL_RCC2_SYSDIV2_19  0x09000000  // System clock /19\r
+#define SYSCTL_RCC2_SYSDIV2_20  0x09800000  // System clock /20\r
+#define SYSCTL_RCC2_SYSDIV2_21  0x0A000000  // System clock /21\r
+#define SYSCTL_RCC2_SYSDIV2_22  0x0A800000  // System clock /22\r
+#define SYSCTL_RCC2_SYSDIV2_23  0x0B000000  // System clock /23\r
+#define SYSCTL_RCC2_SYSDIV2_24  0x0B800000  // System clock /24\r
+#define SYSCTL_RCC2_SYSDIV2_25  0x0C000000  // System clock /25\r
+#define SYSCTL_RCC2_SYSDIV2_26  0x0C800000  // System clock /26\r
+#define SYSCTL_RCC2_SYSDIV2_27  0x0D000000  // System clock /27\r
+#define SYSCTL_RCC2_SYSDIV2_28  0x0D800000  // System clock /28\r
+#define SYSCTL_RCC2_SYSDIV2_29  0x0E000000  // System clock /29\r
+#define SYSCTL_RCC2_SYSDIV2_30  0x0E800000  // System clock /30\r
+#define SYSCTL_RCC2_SYSDIV2_31  0x0F000000  // System clock /31\r
+#define SYSCTL_RCC2_SYSDIV2_32  0x0F800000  // System clock /32\r
+#define SYSCTL_RCC2_SYSDIV2_33  0x10000000  // System clock /33\r
+#define SYSCTL_RCC2_SYSDIV2_34  0x10800000  // System clock /34\r
+#define SYSCTL_RCC2_SYSDIV2_35  0x11000000  // System clock /35\r
+#define SYSCTL_RCC2_SYSDIV2_36  0x11800000  // System clock /36\r
+#define SYSCTL_RCC2_SYSDIV2_37  0x12000000  // System clock /37\r
+#define SYSCTL_RCC2_SYSDIV2_38  0x12800000  // System clock /38\r
+#define SYSCTL_RCC2_SYSDIV2_39  0x13000000  // System clock /39\r
+#define SYSCTL_RCC2_SYSDIV2_40  0x13800000  // System clock /40\r
+#define SYSCTL_RCC2_SYSDIV2_41  0x14000000  // System clock /41\r
+#define SYSCTL_RCC2_SYSDIV2_42  0x14800000  // System clock /42\r
+#define SYSCTL_RCC2_SYSDIV2_43  0x15000000  // System clock /43\r
+#define SYSCTL_RCC2_SYSDIV2_44  0x15800000  // System clock /44\r
+#define SYSCTL_RCC2_SYSDIV2_45  0x16000000  // System clock /45\r
+#define SYSCTL_RCC2_SYSDIV2_46  0x16800000  // System clock /46\r
+#define SYSCTL_RCC2_SYSDIV2_47  0x17000000  // System clock /47\r
+#define SYSCTL_RCC2_SYSDIV2_48  0x17800000  // System clock /48\r
+#define SYSCTL_RCC2_SYSDIV2_49  0x18000000  // System clock /49\r
+#define SYSCTL_RCC2_SYSDIV2_50  0x18800000  // System clock /50\r
+#define SYSCTL_RCC2_SYSDIV2_51  0x19000000  // System clock /51\r
+#define SYSCTL_RCC2_SYSDIV2_52  0x19800000  // System clock /52\r
+#define SYSCTL_RCC2_SYSDIV2_53  0x1A000000  // System clock /53\r
+#define SYSCTL_RCC2_SYSDIV2_54  0x1A800000  // System clock /54\r
+#define SYSCTL_RCC2_SYSDIV2_55  0x1B000000  // System clock /55\r
+#define SYSCTL_RCC2_SYSDIV2_56  0x1B800000  // System clock /56\r
+#define SYSCTL_RCC2_SYSDIV2_57  0x1C000000  // System clock /57\r
+#define SYSCTL_RCC2_SYSDIV2_58  0x1C800000  // System clock /58\r
+#define SYSCTL_RCC2_SYSDIV2_59  0x1D000000  // System clock /59\r
+#define SYSCTL_RCC2_SYSDIV2_60  0x1D800000  // System clock /60\r
+#define SYSCTL_RCC2_SYSDIV2_61  0x1E000000  // System clock /61\r
+#define SYSCTL_RCC2_SYSDIV2_62  0x1E800000  // System clock /62\r
+#define SYSCTL_RCC2_SYSDIV2_63  0x1F000000  // System clock /63\r
+#define SYSCTL_RCC2_SYSDIV2_64  0x1F800000  // System clock /64\r
+#define SYSCTL_RCC2_PWRDN2      0x00002000  // PLL power down\r
+#define SYSCTL_RCC2_BYPASS2     0x00000800  // PLL bypass\r
+#define SYSCTL_RCC2_OSCSRC2_MSK 0x00000070  // Oscillator input select\r
+#define SYSCTL_RCC2_OSCSRC2_MO  0x00000000  // Use the main oscillator\r
+#define SYSCTL_RCC2_OSCSRC2_IO  0x00000010  // Use the internal oscillator\r
+#define SYSCTL_RCC2_OSCSRC2_IO4 0x00000020  // Use the internal oscillator / 4\r
+#define SYSCTL_RCC2_OSCSRC2_30  0x00000030  // Use the 30 KHz internal osc.\r
+#define SYSCTL_RCC2_OSCSRC2_32  0x00000070  // Use the 32 KHz external osc.\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the SYSCTL_DSLPCLKCFG register.\r
+//\r
+//*****************************************************************************\r
+#define SYSCTL_DSLPCLKCFG_D_MSK 0x1f800000  // Deep sleep system clock override\r
+#define SYSCTL_DSLPCLKCFG_D_2   0x00800000  // System clock /2\r
+#define SYSCTL_DSLPCLKCFG_D_3   0x01000000  // System clock /3\r
+#define SYSCTL_DSLPCLKCFG_D_4   0x01800000  // System clock /4\r
+#define SYSCTL_DSLPCLKCFG_D_5   0x02000000  // System clock /5\r
+#define SYSCTL_DSLPCLKCFG_D_6   0x02800000  // System clock /6\r
+#define SYSCTL_DSLPCLKCFG_D_7   0x03000000  // System clock /7\r
+#define SYSCTL_DSLPCLKCFG_D_8   0x03800000  // System clock /8\r
+#define SYSCTL_DSLPCLKCFG_D_9   0x04000000  // System clock /9\r
+#define SYSCTL_DSLPCLKCFG_D_10  0x04800000  // System clock /10\r
+#define SYSCTL_DSLPCLKCFG_D_11  0x05000000  // System clock /11\r
+#define SYSCTL_DSLPCLKCFG_D_12  0x05800000  // System clock /12\r
+#define SYSCTL_DSLPCLKCFG_D_13  0x06000000  // System clock /13\r
+#define SYSCTL_DSLPCLKCFG_D_14  0x06800000  // System clock /14\r
+#define SYSCTL_DSLPCLKCFG_D_15  0x07000000  // System clock /15\r
+#define SYSCTL_DSLPCLKCFG_D_16  0x07800000  // System clock /16\r
+#define SYSCTL_DSLPCLKCFG_D_17  0x08000000  // System clock /17\r
+#define SYSCTL_DSLPCLKCFG_D_18  0x08800000  // System clock /18\r
+#define SYSCTL_DSLPCLKCFG_D_19  0x09000000  // System clock /19\r
+#define SYSCTL_DSLPCLKCFG_D_20  0x09800000  // System clock /20\r
+#define SYSCTL_DSLPCLKCFG_D_21  0x0A000000  // System clock /21\r
+#define SYSCTL_DSLPCLKCFG_D_22  0x0A800000  // System clock /22\r
+#define SYSCTL_DSLPCLKCFG_D_23  0x0B000000  // System clock /23\r
+#define SYSCTL_DSLPCLKCFG_D_24  0x0B800000  // System clock /24\r
+#define SYSCTL_DSLPCLKCFG_D_25  0x0C000000  // System clock /25\r
+#define SYSCTL_DSLPCLKCFG_D_26  0x0C800000  // System clock /26\r
+#define SYSCTL_DSLPCLKCFG_D_27  0x0D000000  // System clock /27\r
+#define SYSCTL_DSLPCLKCFG_D_28  0x0D800000  // System clock /28\r
+#define SYSCTL_DSLPCLKCFG_D_29  0x0E000000  // System clock /29\r
+#define SYSCTL_DSLPCLKCFG_D_30  0x0E800000  // System clock /30\r
+#define SYSCTL_DSLPCLKCFG_D_31  0x0F000000  // System clock /31\r
+#define SYSCTL_DSLPCLKCFG_D_32  0x0F800000  // System clock /32\r
+#define SYSCTL_DSLPCLKCFG_D_33  0x10000000  // System clock /33\r
+#define SYSCTL_DSLPCLKCFG_D_34  0x10800000  // System clock /34\r
+#define SYSCTL_DSLPCLKCFG_D_35  0x11000000  // System clock /35\r
+#define SYSCTL_DSLPCLKCFG_D_36  0x11800000  // System clock /36\r
+#define SYSCTL_DSLPCLKCFG_D_37  0x12000000  // System clock /37\r
+#define SYSCTL_DSLPCLKCFG_D_38  0x12800000  // System clock /38\r
+#define SYSCTL_DSLPCLKCFG_D_39  0x13000000  // System clock /39\r
+#define SYSCTL_DSLPCLKCFG_D_40  0x13800000  // System clock /40\r
+#define SYSCTL_DSLPCLKCFG_D_41  0x14000000  // System clock /41\r
+#define SYSCTL_DSLPCLKCFG_D_42  0x14800000  // System clock /42\r
+#define SYSCTL_DSLPCLKCFG_D_43  0x15000000  // System clock /43\r
+#define SYSCTL_DSLPCLKCFG_D_44  0x15800000  // System clock /44\r
+#define SYSCTL_DSLPCLKCFG_D_45  0x16000000  // System clock /45\r
+#define SYSCTL_DSLPCLKCFG_D_46  0x16800000  // System clock /46\r
+#define SYSCTL_DSLPCLKCFG_D_47  0x17000000  // System clock /47\r
+#define SYSCTL_DSLPCLKCFG_D_48  0x17800000  // System clock /48\r
+#define SYSCTL_DSLPCLKCFG_D_49  0x18000000  // System clock /49\r
+#define SYSCTL_DSLPCLKCFG_D_50  0x18800000  // System clock /50\r
+#define SYSCTL_DSLPCLKCFG_D_51  0x19000000  // System clock /51\r
+#define SYSCTL_DSLPCLKCFG_D_52  0x19800000  // System clock /52\r
+#define SYSCTL_DSLPCLKCFG_D_53  0x1A000000  // System clock /53\r
+#define SYSCTL_DSLPCLKCFG_D_54  0x1A800000  // System clock /54\r
+#define SYSCTL_DSLPCLKCFG_D_55  0x1B000000  // System clock /55\r
+#define SYSCTL_DSLPCLKCFG_D_56  0x1B800000  // System clock /56\r
+#define SYSCTL_DSLPCLKCFG_D_57  0x1C000000  // System clock /57\r
+#define SYSCTL_DSLPCLKCFG_D_58  0x1C800000  // System clock /58\r
+#define SYSCTL_DSLPCLKCFG_D_59  0x1D000000  // System clock /59\r
+#define SYSCTL_DSLPCLKCFG_D_60  0x1D800000  // System clock /60\r
+#define SYSCTL_DSLPCLKCFG_D_61  0x1E000000  // System clock /61\r
+#define SYSCTL_DSLPCLKCFG_D_62  0x1E800000  // System clock /62\r
+#define SYSCTL_DSLPCLKCFG_D_63  0x1F000000  // System clock /63\r
+#define SYSCTL_DSLPCLKCFG_D_64  0x1F800000  // System clock /64\r
+#define SYSCTL_DSLPCLKCFG_O_MSK 0x00000070  // Deep sleep oscillator override\r
+#define SYSCTL_DSLPCLKCFG_O_IGN 0x00000000  // Do not override\r
+#define SYSCTL_DSLPCLKCFG_O_IO  0x00000010  // Use the internal oscillator\r
+#define SYSCTL_DSLPCLKCFG_O_30  0x00000030  // Use the 30 KHz internal osc.\r
+#define SYSCTL_DSLPCLKCFG_O_32  0x00000070  // Use the 32 KHz external osc.\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the SYSCTL_CLKVCLR register.\r
+//\r
+//*****************************************************************************\r
+#define SYSCTL_CLKVCLR_CLR      0x00000001  // Clear clock verification fault\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the SYSCTL_LDOARST register.\r
+//\r
+//*****************************************************************************\r
+#define SYSCTL_LDOARST_ARST     0x00000001  // Allow LDO to reset device\r
+\r
+#endif // __HW_SYSCTL_H__\r

diff --git a/Demo/Common/drivers/LuminaryMicro/hw_timer.h b/Demo/Common/drivers/LuminaryMicro/hw_timer.h
new file mode 100644 (file)
index 0000000..6bf0d53
--- /dev/null
+++ b/Demo/Common/drivers/LuminaryMicro/hw_timer.h
@@ -0,0 +1,235 @@
+//*****************************************************************************\r
+//\r
+// hw_timer.h - Defines and macros used when accessing the timer.\r
+//\r
+// Copyright (c) 2005-2007 Luminary Micro, Inc.  All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1582 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+#ifndef __HW_TIMER_H__\r
+#define __HW_TIMER_H__\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the offsets of the timer registers.\r
+//\r
+//*****************************************************************************\r
+#define TIMER_O_CFG             0x00000000  // Configuration register\r
+#define TIMER_O_TAMR            0x00000004  // TimerA mode register\r
+#define TIMER_O_TBMR            0x00000008  // TimerB mode register\r
+#define TIMER_O_CTL             0x0000000C  // Control register\r
+#define TIMER_O_IMR             0x00000018  // Interrupt mask register\r
+#define TIMER_O_RIS             0x0000001C  // Interrupt status register\r
+#define TIMER_O_MIS             0x00000020  // Masked interrupt status reg.\r
+#define TIMER_O_ICR             0x00000024  // Interrupt clear register\r
+#define TIMER_O_TAILR           0x00000028  // TimerA interval load register\r
+#define TIMER_O_TBILR           0x0000002C  // TimerB interval load register\r
+#define TIMER_O_TAMATCHR        0x00000030  // TimerA match register\r
+#define TIMER_O_TBMATCHR        0x00000034  // TimerB match register\r
+#define TIMER_O_TAPR            0x00000038  // TimerA prescale register\r
+#define TIMER_O_TBPR            0x0000003C  // TimerB prescale register\r
+#define TIMER_O_TAPMR           0x00000040  // TimerA prescale match register\r
+#define TIMER_O_TBPMR           0x00000044  // TimerB prescale match register\r
+#define TIMER_O_TAR             0x00000048  // TimerA register\r
+#define TIMER_O_TBR             0x0000004C  // TimerB register\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the reset values of the timer registers.\r
+//\r
+//*****************************************************************************\r
+#define TIMER_RV_CFG            0x00000000  // Configuration register RV\r
+#define TIMER_RV_TAMR           0x00000000  // TimerA mode register RV\r
+#define TIMER_RV_TBMR           0x00000000  // TimerB mode register RV\r
+#define TIMER_RV_CTL            0x00000000  // Control register RV\r
+#define TIMER_RV_IMR            0x00000000  // Interrupt mask register RV\r
+#define TIMER_RV_RIS            0x00000000  // Interrupt status register RV\r
+#define TIMER_RV_MIS            0x00000000  // Masked interrupt status reg RV\r
+#define TIMER_RV_ICR            0x00000000  // Interrupt clear register RV\r
+#define TIMER_RV_TAILR          0xFFFFFFFF  // TimerA interval load reg RV\r
+#define TIMER_RV_TBILR          0x0000FFFF  // TimerB interval load reg RV\r
+#define TIMER_RV_TAMATCHR       0xFFFFFFFF  // TimerA match register RV\r
+#define TIMER_RV_TBMATCHR       0x0000FFFF  // TimerB match register RV\r
+#define TIMER_RV_TAPR           0x00000000  // TimerA prescale register RV\r
+#define TIMER_RV_TBPR           0x00000000  // TimerB prescale register RV\r
+#define TIMER_RV_TAPMR          0x00000000  // TimerA prescale match reg RV\r
+#define TIMER_RV_TBPMR          0x00000000  // TimerB prescale match regi RV\r
+#define TIMER_RV_TAR            0xFFFFFFFF  // TimerA register RV\r
+#define TIMER_RV_TBR            0x0000FFFF  // TimerB register RV\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the TIMER_CFG register.\r
+//\r
+//*****************************************************************************\r
+#define TIMER_CFG_CFG_MSK       0x00000007  // Configuration options mask\r
+#define TIMER_CFG_16_BIT        0x00000004  // Two 16 bit timers\r
+#define TIMER_CFG_32_BIT_RTC    0x00000001  // 32 bit RTC\r
+#define TIMER_CFG_32_BIT_TIMER  0x00000000  // 32 bit timer\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the TIMER_TnMR register.\r
+//\r
+//*****************************************************************************\r
+#define TIMER_TNMR_TNAMS        0x00000008  // Alternate mode select\r
+#define TIMER_TNMR_TNCMR        0x00000004  // Capture mode - count or time\r
+#define TIMER_TNMR_TNTMR_MSK    0x00000003  // Timer mode mask\r
+#define TIMER_TNMR_TNTMR_CAP    0x00000003  // Mode - capture\r
+#define TIMER_TNMR_TNTMR_PERIOD 0x00000002  // Mode - periodic\r
+#define TIMER_TNMR_TNTMR_1_SHOT 0x00000001  // Mode - one shot\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the TIMER_CTL register.\r
+//\r
+//*****************************************************************************\r
+#define TIMER_CTL_TBPWML        0x00004000  // TimerB PWM output level invert\r
+#define TIMER_CTL_TBOTE         0x00002000  // TimerB output trigger enable\r
+#define TIMER_CTL_TBEVENT_MSK   0x00000C00  // TimerB event mode mask\r
+#define TIMER_CTL_TBEVENT_BOTH  0x00000C00  // TimerB event mode - both edges\r
+#define TIMER_CTL_TBEVENT_NEG   0x00000400  // TimerB event mode - neg edge\r
+#define TIMER_CTL_TBEVENT_POS   0x00000000  // TimerB event mode - pos edge\r
+#define TIMER_CTL_TBSTALL       0x00000200  // TimerB stall enable\r
+#define TIMER_CTL_TBEN          0x00000100  // TimerB enable\r
+#define TIMER_CTL_TAPWML        0x00000040  // TimerA PWM output level invert\r
+#define TIMER_CTL_TAOTE         0x00000020  // TimerA output trigger enable\r
+#define TIMER_CTL_RTCEN         0x00000010  // RTC counter enable\r
+#define TIMER_CTL_TAEVENT_MSK   0x0000000C  // TimerA event mode mask\r
+#define TIMER_CTL_TAEVENT_BOTH  0x0000000C  // TimerA event mode - both edges\r
+#define TIMER_CTL_TAEVENT_NEG   0x00000004  // TimerA event mode - neg edge\r
+#define TIMER_CTL_TAEVENT_POS   0x00000000  // TimerA event mode - pos edge\r
+#define TIMER_CTL_TASTALL       0x00000002  // TimerA stall enable\r
+#define TIMER_CTL_TAEN          0x00000001  // TimerA enable\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the TIMER_IMR register.\r
+//\r
+//*****************************************************************************\r
+#define TIMER_IMR_CBEIM         0x00000400  // CaptureB event interrupt mask\r
+#define TIMER_IMR_CBMIM         0x00000200  // CaptureB match interrupt mask\r
+#define TIMER_IMR_TBTOIM        0x00000100  // TimerB time out interrupt mask\r
+#define TIMER_IMR_RTCIM         0x00000008  // RTC interrupt mask\r
+#define TIMER_IMR_CAEIM         0x00000004  // CaptureA event interrupt mask\r
+#define TIMER_IMR_CAMIM         0x00000002  // CaptureA match interrupt mask\r
+#define TIMER_IMR_TATOIM        0x00000001  // TimerA time out interrupt mask\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the TIMER_RIS register.\r
+//\r
+//*****************************************************************************\r
+#define TIMER_RIS_CBERIS        0x00000400  // CaptureB event raw int status\r
+#define TIMER_RIS_CBMRIS        0x00000200  // CaptureB match raw int status\r
+#define TIMER_RIS_TBTORIS       0x00000100  // TimerB time out raw int status\r
+#define TIMER_RIS_RTCRIS        0x00000008  // RTC raw int status\r
+#define TIMER_RIS_CAERIS        0x00000004  // CaptureA event raw int status\r
+#define TIMER_RIS_CAMRIS        0x00000002  // CaptureA match raw int status\r
+#define TIMER_RIS_TATORIS       0x00000001  // TimerA time out raw int status\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the TIMER_MIS register.\r
+//\r
+//*****************************************************************************\r
+#define TIMER_RIS_CBEMIS        0x00000400  // CaptureB event masked int status\r
+#define TIMER_RIS_CBMMIS        0x00000200  // CaptureB match masked int status\r
+#define TIMER_RIS_TBTOMIS       0x00000100  // TimerB time out masked int stat\r
+#define TIMER_RIS_RTCMIS        0x00000008  // RTC masked int status\r
+#define TIMER_RIS_CAEMIS        0x00000004  // CaptureA event masked int status\r
+#define TIMER_RIS_CAMMIS        0x00000002  // CaptureA match masked int status\r
+#define TIMER_RIS_TATOMIS       0x00000001  // TimerA time out masked int stat\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the TIMER_ICR register.\r
+//\r
+//*****************************************************************************\r
+#define TIMER_ICR_CBECINT       0x00000400  // CaptureB event interrupt clear\r
+#define TIMER_ICR_CBMCINT       0x00000200  // CaptureB match interrupt clear\r
+#define TIMER_ICR_TBTOCINT      0x00000100  // TimerB time out interrupt clear\r
+#define TIMER_ICR_RTCCINT       0x00000008  // RTC interrupt clear\r
+#define TIMER_ICR_CAECINT       0x00000004  // CaptureA event interrupt clear\r
+#define TIMER_ICR_CAMCINT       0x00000002  // CaptureA match interrupt clear\r
+#define TIMER_ICR_TATOCINT      0x00000001  // TimerA time out interrupt clear\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the TIMER_TAILR register.\r
+//\r
+//*****************************************************************************\r
+#define TIMER_TAILR_TAILRH      0xFFFF0000  // TimerB load val in 32 bit mode\r
+#define TIMER_TAILR_TAILRL      0x0000FFFF  // TimerA interval load value\r
+\r
+//*****************************************************************************\r
+//\r
+// The following defines the bit fields in the TIMER_TBILR register.\r
+//\r
+//*****************************************************************************\r
+#define TIMER_TBILR_TBILRL      0x0000FFFF  // TimerB interval load value\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the TIMER_TAMATCHR register.\r
+//\r
+//*****************************************************************************\r
+#define TIMER_TAMATCHR_TAMRH    0xFFFF0000  // TimerB match val in 32 bit mode\r
+#define TIMER_TAMATCHR_TAMRL    0x0000FFFF  // TimerA match value\r
+\r
+//*****************************************************************************\r
+//\r
+// The following defines the bit fields in the TIMER_TBMATCHR register.\r
+//\r
+//*****************************************************************************\r
+#define TIMER_TBMATCHR_TBMRL    0x0000FFFF  // TimerB match load value\r
+\r
+//*****************************************************************************\r
+//\r
+// The following defines the bit fields in the TIMER_TnPR register.\r
+//\r
+//*****************************************************************************\r
+#define TIMER_TNPR_TNPSR        0x000000FF  // TimerN prescale value\r
+\r
+//*****************************************************************************\r
+//\r
+// The following defines the bit fields in the TIMER_TnPMR register.\r
+//\r
+//*****************************************************************************\r
+#define TIMER_TNPMR_TNPSMR      0x000000FF  // TimerN prescale match value\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the TIMER_TAR register.\r
+//\r
+//*****************************************************************************\r
+#define TIMER_TAR_TARH          0xFFFF0000  // TimerB val in 32 bit mode\r
+#define TIMER_TAR_TARL          0x0000FFFF  // TimerA value\r
+\r
+//*****************************************************************************\r
+//\r
+// The following defines the bit fields in the TIMER_TBR register.\r
+//\r
+//*****************************************************************************\r
+#define TIMER_TBR_TBRL          0x0000FFFF  // TimerB value\r
+\r
+#endif // __HW_TIMER_H__\r

diff --git a/Demo/Common/drivers/LuminaryMicro/hw_types.h b/Demo/Common/drivers/LuminaryMicro/hw_types.h
new file mode 100644 (file)
index 0000000..c31e2c9
--- /dev/null
+++ b/Demo/Common/drivers/LuminaryMicro/hw_types.h
@@ -0,0 +1,129 @@
+//*****************************************************************************\r
+//\r
+// hw_types.h - Common types and macros.\r
+//\r
+// Copyright (c) 2005-2007 Luminary Micro, Inc.  All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1582 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+#ifndef __HW_TYPES_H__\r
+#define __HW_TYPES_H__\r
+\r
+//*****************************************************************************\r
+//\r
+// Define a boolean type, and values for true and false.\r
+//\r
+//*****************************************************************************\r
+typedef unsigned char tBoolean;\r
+\r
+#ifndef true\r
+#define true 1\r
+#endif\r
+\r
+#ifndef false\r
+#define false 0\r
+#endif\r
+\r
+//*****************************************************************************\r
+//\r
+// Macros for hardware access, both direct and via the bit-band region.\r
+//\r
+//*****************************************************************************\r
+#define HWREG(x)                                                              \\r
+        (*((volatile unsigned long *)(x)))\r
+#define HWREGH(x)                                                             \\r
+        (*((volatile unsigned short *)(x)))\r
+#define HWREGB(x)                                                             \\r
+        (*((volatile unsigned char *)(x)))\r
+#define HWREGBITW(x, b)                                                       \\r
+        HWREG(((unsigned long)(x) & 0xF0000000) | 0x02000000 |                \\r
+              (((unsigned long)(x) & 0x000FFFFF) << 5) | ((b) << 2))\r
+#define HWREGBITH(x, b)                                                       \\r
+        HWREGH(((unsigned long)(x) & 0xF0000000) | 0x02000000 |               \\r
+               (((unsigned long)(x) & 0x000FFFFF) << 5) | ((b) << 2))\r
+#define HWREGBITB(x, b)                                                       \\r
+        HWREGB(((unsigned long)(x) & 0xF0000000) | 0x02000000 |               \\r
+               (((unsigned long)(x) & 0x000FFFFF) << 5) | ((b) << 2))\r
+\r
+//*****************************************************************************\r
+//\r
+// Helper Macros for determining silicon revisions, etc.\r
+//\r
+// These macros will be used by Driverlib at "run-time" to create necessary\r
+// conditional code blocks that will allow a single version of the Driverlib\r
+// "binary" code to support multiple(all) Stellaris silicon revisions.\r
+//\r
+// It is expected that these macros will be used inside of a standard 'C' \r
+// conditional block of code, e.g.\r
+//\r
+//     if(DEVICE_IS_SANDSTORM())\r
+//     {\r
+//         do some Sandstorm specific code here.\r
+//     }\r
+//\r
+// By default, these macros will be defined as run-time checks of the\r
+// appropriate register(s) to allow creation of run-time conditional code\r
+// blocks for a common DriverLib across the entire Stellaris family.\r
+//\r
+// However, if code-space optimization is required, these macros can be "hard-\r
+// coded" for a specific version of Stellaris silicon.  Many compilers will\r
+// then detect the "hard-coded" conditionals, and appropriately optimize the\r
+// code blocks, eliminating any "unreachable" code.  This would result in \r
+// a smaller Driverlib, thus producing a smaller final application size, but\r
+// at the cost of limiting the Driverlib binary to a specific Stellaris\r
+// silicon revision.\r
+//\r
+//*****************************************************************************\r
+#ifndef DEVICE_IS_SANDSTORM\r
+#define DEVICE_IS_SANDSTORM                                                \\r
+    (((HWREG(SYSCTL_DID0) & SYSCTL_DID0_VER_MASK) == SYSCTL_DID0_VER_0) || \\r
+    (((HWREG(SYSCTL_DID0) & SYSCTL_DID0_VER_MASK) == SYSCTL_DID0_VER_1) && \\r
+     ((HWREG(SYSCTL_DID0) & SYSCTL_DID0_CLASS_MASK) ==                     \\r
+        SYSCTL_DID0_CLASS_SANDSTORM)))\r
+#endif\r
+\r
+#ifndef DEVICE_IS_FURY\r
+#define DEVICE_IS_FURY                                                     \\r
+    (((HWREG(SYSCTL_DID0) & SYSCTL_DID0_VER_MASK) == SYSCTL_DID0_VER_1) && \\r
+     ((HWREG(SYSCTL_DID0) & SYSCTL_DID0_CLASS_MASK) ==                     \\r
+        SYSCTL_DID0_CLASS_FURY))\r
+#endif\r
+\r
+#ifndef DEVICE_IS_REVA2\r
+#define DEVICE_IS_REVA2                                                    \\r
+    (((HWREG(SYSCTL_DID0) & SYSCTL_DID0_MAJ_MASK) == SYSCTL_DID0_MAJ_A) && \\r
+     ((HWREG(SYSCTL_DID0) & SYSCTL_DID0_MIN_MASK) == SYSCTL_DID0_MIN_2))\r
+#endif\r
+\r
+#ifndef DEVICE_IS_REVC1\r
+#define DEVICE_IS_REVC1                                                    \\r
+    (((HWREG(SYSCTL_DID0) & SYSCTL_DID0_MAJ_MASK) == SYSCTL_DID0_MAJ_C) && \\r
+     ((HWREG(SYSCTL_DID0) & SYSCTL_DID0_MIN_MASK) == SYSCTL_DID0_MIN_1))\r
+#endif\r
+\r
+#ifndef DEVICE_IS_REVC2\r
+#define DEVICE_IS_REVC2                                                    \\r
+    (((HWREG(SYSCTL_DID0) & SYSCTL_DID0_MAJ_MASK) == SYSCTL_DID0_MAJ_C) && \\r
+     ((HWREG(SYSCTL_DID0) & SYSCTL_DID0_MIN_MASK) == SYSCTL_DID0_MIN_2))\r
+#endif\r
+\r
+#endif // __HW_TYPES_H__\r

diff --git a/Demo/Common/drivers/LuminaryMicro/hw_uart.h b/Demo/Common/drivers/LuminaryMicro/hw_uart.h
new file mode 100644 (file)
index 0000000..de1127b
--- /dev/null
+++ b/Demo/Common/drivers/LuminaryMicro/hw_uart.h
@@ -0,0 +1,243 @@
+//*****************************************************************************\r
+//\r
+// hw_uart.h - Macros and defines used when accessing the UART hardware\r
+//\r
+// Copyright (c) 2005-2007 Luminary Micro, Inc.  All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1582 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+#ifndef __HW_UART_H__\r
+#define __HW_UART_H__\r
+\r
+//*****************************************************************************\r
+//\r
+// UART Register Offsets.\r
+//\r
+//*****************************************************************************\r
+#define UART_O_DR               0x00000000  // Data Register\r
+#define UART_O_RSR              0x00000004  // Receive Status Register (read)\r
+#define UART_O_ECR              0x00000004  // Error Clear Register (write)\r
+#define UART_O_FR               0x00000018  // Flag Register (read only)\r
+#define UART_O_IBRD             0x00000024  // Integer Baud Rate Divisor Reg\r
+#define UART_O_FBRD             0x00000028  // Fractional Baud Rate Divisor Reg\r
+#define UART_O_LCR_H            0x0000002C  // Line Control Register, HIGH byte\r
+#define UART_O_CTL              0x00000030  // Control Register\r
+#define UART_O_IFLS             0x00000034  // Interrupt FIFO Level Select Reg\r
+#define UART_O_IM               0x00000038  // Interrupt Mask Set/Clear Reg\r
+#define UART_O_RIS              0x0000003C  // Raw Interrupt Status Register\r
+#define UART_O_MIS              0x00000040  // Masked Interrupt Status Register\r
+#define UART_O_ICR              0x00000044  // Interrupt Clear Register\r
+#define UART_O_PeriphID4        0x00000FD0  //\r
+#define UART_O_PeriphID5        0x00000FD4  //\r
+#define UART_O_PeriphID6        0x00000FD8  //\r
+#define UART_O_PeriphID7        0x00000FDC  //\r
+#define UART_O_PeriphID0        0x00000FE0  //\r
+#define UART_O_PeriphID1        0x00000FE4  //\r
+#define UART_O_PeriphID2        0x00000FE8  //\r
+#define UART_O_PeriphID3        0x00000FEC  //\r
+#define UART_O_PCellID0         0x00000FF0  //\r
+#define UART_O_PCellID1         0x00000FF4  //\r
+#define UART_O_PCellID2         0x00000FF8  //\r
+#define UART_O_PCellID3         0x00000FFC  //\r
+\r
+//*****************************************************************************\r
+//\r
+// Data Register bits\r
+//\r
+//*****************************************************************************\r
+#define UART_DR_OE              0x00000800  // Overrun Error\r
+#define UART_DR_BE              0x00000400  // Break Error\r
+#define UART_DR_PE              0x00000200  // Parity Error\r
+#define UART_DR_FE              0x00000100  // Framing Error\r
+#define UART_DR_DATA_MASK       0x000000FF  // UART data\r
+\r
+//*****************************************************************************\r
+//\r
+// Receive Status Register bits\r
+//\r
+//*****************************************************************************\r
+#define UART_RSR_OE             0x00000008  // Overrun Error\r
+#define UART_RSR_BE             0x00000004  // Break Error\r
+#define UART_RSR_PE             0x00000002  // Parity Error\r
+#define UART_RSR_FE             0x00000001  // Framing Error\r
+\r
+//*****************************************************************************\r
+//\r
+// Flag Register bits\r
+//\r
+//*****************************************************************************\r
+#define UART_FR_TXFE            0x00000080  // TX FIFO Empty\r
+#define UART_FR_RXFF            0x00000040  // RX FIFO Full\r
+#define UART_FR_TXFF            0x00000020  // TX FIFO Full\r
+#define UART_FR_RXFE            0x00000010  // RX FIFO Empty\r
+#define UART_FR_BUSY            0x00000008  // UART Busy\r
+\r
+//*****************************************************************************\r
+//\r
+// Integer baud-rate divisor\r
+//\r
+//*****************************************************************************\r
+#define UART_IBRD_DIVINT_MASK   0x0000FFFF  // Integer baud-rate divisor\r
+\r
+//*****************************************************************************\r
+//\r
+// Fractional baud-rate divisor\r
+//\r
+//*****************************************************************************\r
+#define UART_FBRD_DIVFRAC_MASK  0x0000003F  // Fractional baud-rate divisor\r
+\r
+//*****************************************************************************\r
+//\r
+// Line Control Register High bits\r
+//\r
+//*****************************************************************************\r
+#define UART_LCR_H_SPS          0x00000080  // Stick Parity Select\r
+#define UART_LCR_H_WLEN         0x00000060  // Word length\r
+#define UART_LCR_H_WLEN_8       0x00000060  // 8 bit data\r
+#define UART_LCR_H_WLEN_7       0x00000040  // 7 bit data\r
+#define UART_LCR_H_WLEN_6       0x00000020  // 6 bit data\r
+#define UART_LCR_H_WLEN_5       0x00000000  // 5 bit data\r
+#define UART_LCR_H_FEN          0x00000010  // Enable FIFO\r
+#define UART_LCR_H_STP2         0x00000008  // Two Stop Bits Select\r
+#define UART_LCR_H_EPS          0x00000004  // Even Parity Select\r
+#define UART_LCR_H_PEN          0x00000002  // Parity Enable\r
+#define UART_LCR_H_BRK          0x00000001  // Send Break\r
+\r
+//*****************************************************************************\r
+//\r
+// Control Register bits\r
+//\r
+//*****************************************************************************\r
+#define UART_CTL_RXE            0x00000200  // Receive Enable\r
+#define UART_CTL_TXE            0x00000100  // Transmit Enable\r
+#define UART_CTL_LBE            0x00000080  // Loopback Enable\r
+#define UART_CTL_SIRLP          0x00000004  // SIR (IrDA) Low Power Enable\r
+#define UART_CTL_SIREN          0x00000002  // SIR (IrDA) Enable\r
+#define UART_CTL_UARTEN         0x00000001  // UART Enable\r
+\r
+//*****************************************************************************\r
+//\r
+// Interrupt FIFO Level Select Register bits\r
+//\r
+//*****************************************************************************\r
+#define UART_IFLS_RX_MASK       0x00000038  // RX FIFO level mask\r
+#define UART_IFLS_RX1_8         0x00000000  // 1/8 Full\r
+#define UART_IFLS_RX2_8         0x00000008  // 1/4 Full\r
+#define UART_IFLS_RX4_8         0x00000010  // 1/2 Full\r
+#define UART_IFLS_RX6_8         0x00000018  // 3/4 Full\r
+#define UART_IFLS_RX7_8         0x00000020  // 7/8 Full\r
+#define UART_IFLS_TX_MASK       0x00000007  // TX FIFO level mask\r
+#define UART_IFLS_TX1_8         0x00000000  // 1/8 Full\r
+#define UART_IFLS_TX2_8         0x00000001  // 1/4 Full\r
+#define UART_IFLS_TX4_8         0x00000002  // 1/2 Full\r
+#define UART_IFLS_TX6_8         0x00000003  // 3/4 Full\r
+#define UART_IFLS_TX7_8         0x00000004  // 7/8 Full\r
+\r
+//*****************************************************************************\r
+//\r
+// Interrupt Mask Set/Clear Register bits\r
+//\r
+//*****************************************************************************\r
+#define UART_IM_OEIM            0x00000400  // Overrun Error Interrupt Mask\r
+#define UART_IM_BEIM            0x00000200  // Break Error Interrupt Mask\r
+#define UART_IM_PEIM            0x00000100  // Parity Error Interrupt Mask\r
+#define UART_IM_FEIM            0x00000080  // Framing Error Interrupt Mask\r
+#define UART_IM_RTIM            0x00000040  // Receive Timeout Interrupt Mask\r
+#define UART_IM_TXIM            0x00000020  // Transmit Interrupt Mask\r
+#define UART_IM_RXIM            0x00000010  // Receive Interrupt Mask\r
+\r
+//*****************************************************************************\r
+//\r
+// Raw Interrupt Status Register\r
+//\r
+//*****************************************************************************\r
+#define UART_RIS_OERIS          0x00000400  // Overrun Error Interrupt Status\r
+#define UART_RIS_BERIS          0x00000200  // Break Error Interrupt Status\r
+#define UART_RIS_PERIS          0x00000100  // Parity Error Interrupt Status\r
+#define UART_RIS_FERIS          0x00000080  // Framing Error Interrupt Status\r
+#define UART_RIS_RTRIS          0x00000040  // Receive Timeout Interrupt Status\r
+#define UART_RIS_TXRIS          0x00000020  // Transmit Interrupt Status\r
+#define UART_RIS_RXRIS          0x00000010  // Receive Interrupt Status\r
+\r
+//*****************************************************************************\r
+//\r
+// Masked Interrupt Status Register\r
+//\r
+//*****************************************************************************\r
+#define UART_MIS_OEMIS          0x00000400  // Overrun Error Interrupt Status\r
+#define UART_MIS_BEMIS          0x00000200  // Break Error Interrupt Status\r
+#define UART_MIS_PEMIS          0x00000100  // Parity Error Interrupt Status\r
+#define UART_MIS_FEMIS          0x00000080  // Framing Error Interrupt Status\r
+#define UART_MIS_RTMIS          0x00000040  // Receive Timeout Interrupt Status\r
+#define UART_MIS_TXMIS          0x00000020  // Transmit Interrupt Status\r
+#define UART_MIS_RXMIS          0x00000010  // Receive Interrupt Status\r
+\r
+//*****************************************************************************\r
+//\r
+// Interrupt Clear Register bits\r
+//\r
+//*****************************************************************************\r
+#define UART_ICR_OEIC           0x00000400  // Overrun Error Interrupt Clear\r
+#define UART_ICR_BEIC           0x00000200  // Break Error Interrupt Clear\r
+#define UART_ICR_PEIC           0x00000100  // Parity Error Interrupt Clear\r
+#define UART_ICR_FEIC           0x00000080  // Framing Error Interrupt Clear\r
+#define UART_ICR_RTIC           0x00000040  // Receive Timeout Interrupt Clear\r
+#define UART_ICR_TXIC           0x00000020  // Transmit Interrupt Clear\r
+#define UART_ICR_RXIC           0x00000010  // Receive Interrupt Clear\r
+\r
+#define UART_RSR_ANY            (UART_RSR_OE |                                \\r
+                                 UART_RSR_BE |                                \\r
+                                 UART_RSR_PE |                                \\r
+                                 UART_RSR_FE)\r
+\r
+//*****************************************************************************\r
+//\r
+// Reset Values for UART Registers.\r
+//\r
+//*****************************************************************************\r
+#define UART_RV_DR              0x00000000\r
+#define UART_RV_RSR             0x00000000\r
+#define UART_RV_ECR             0x00000000\r
+#define UART_RV_FR              0x00000090\r
+#define UART_RV_IBRD            0x00000000\r
+#define UART_RV_FBRD            0x00000000\r
+#define UART_RV_LCR_H           0x00000000\r
+#define UART_RV_CTL             0x00000300\r
+#define UART_RV_IFLS            0x00000012\r
+#define UART_RV_IM              0x00000000\r
+#define UART_RV_RIS             0x00000000\r
+#define UART_RV_MIS             0x00000000\r
+#define UART_RV_ICR             0x00000000\r
+#define UART_RV_PeriphID4       0x00000000\r
+#define UART_RV_PeriphID5       0x00000000\r
+#define UART_RV_PeriphID6       0x00000000\r
+#define UART_RV_PeriphID7       0x00000000\r
+#define UART_RV_PeriphID0       0x00000011\r
+#define UART_RV_PeriphID1       0x00000000\r
+#define UART_RV_PeriphID2       0x00000018\r
+#define UART_RV_PeriphID3       0x00000001\r
+#define UART_RV_PCellID0        0x0000000D\r
+#define UART_RV_PCellID1        0x000000F0\r
+#define UART_RV_PCellID2        0x00000005\r
+#define UART_RV_PCellID3        0x000000B1\r
+\r
+#endif // __HW_UART_H__\r

diff --git a/Demo/Common/drivers/LuminaryMicro/hw_watchdog.h b/Demo/Common/drivers/LuminaryMicro/hw_watchdog.h
new file mode 100644 (file)
index 0000000..48843ed
--- /dev/null
+++ b/Demo/Common/drivers/LuminaryMicro/hw_watchdog.h
@@ -0,0 +1,116 @@
+//*****************************************************************************\r
+//\r
+// hw_watchdog.h - Macros used when accessing the Watchdog Timer hardware.\r
+//\r
+// Copyright (c) 2005-2007 Luminary Micro, Inc.  All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1582 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+#ifndef __HW_WATCHDOG_H__\r
+#define __HW_WATCHDOG_H__\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the offsets of the Watchdog Timer registers.\r
+//\r
+//*****************************************************************************\r
+#define WDT_O_LOAD              0x00000000  // Load register\r
+#define WDT_O_VALUE             0x00000004  // Current value register\r
+#define WDT_O_CTL               0x00000008  // Control register\r
+#define WDT_O_ICR               0x0000000C  // Interrupt clear register\r
+#define WDT_O_RIS               0x00000010  // Raw interrupt status register\r
+#define WDT_O_MIS               0x00000014  // Masked interrupt status register\r
+#define WDT_O_TEST              0x00000418  // Test register\r
+#define WDT_O_LOCK              0x00000C00  // Lock register\r
+#define WDT_O_PeriphID4         0x00000FD0  //\r
+#define WDT_O_PeriphID5         0x00000FD4  //\r
+#define WDT_O_PeriphID6         0x00000FD8  //\r
+#define WDT_O_PeriphID7         0x00000FDC  //\r
+#define WDT_O_PeriphID0         0x00000FE0  //\r
+#define WDT_O_PeriphID1         0x00000FE4  //\r
+#define WDT_O_PeriphID2         0x00000FE8  //\r
+#define WDT_O_PeriphID3         0x00000FEC  //\r
+#define WDT_O_PCellID0          0x00000FF0  //\r
+#define WDT_O_PCellID1          0x00000FF4  //\r
+#define WDT_O_PCellID2          0x00000FF8  //\r
+#define WDT_O_PCellID3          0x00000FFC  //\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the WDT_CTL register.\r
+//\r
+//*****************************************************************************\r
+#define WDT_CTL_RESEN           0x00000002  // Enable reset output\r
+#define WDT_CTL_INTEN           0x00000001  // Enable the WDT counter and int\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the WDT_ISR, WDT_RIS, and WDT_MIS\r
+// registers.\r
+//\r
+//*****************************************************************************\r
+#define WDT_INT_TIMEOUT         0x00000001  // Watchdog timer expired\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the WDT_TEST register.\r
+//\r
+//*****************************************************************************\r
+#define WDT_TEST_STALL          0x00000100  // Watchdog stall enable\r
+#ifndef DEPRECATED\r
+#define WDT_TEST_STALL_EN       0x00000100  // Watchdog stall enable\r
+#endif\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the bit fields in the WDT_LOCK register.\r
+//\r
+//*****************************************************************************\r
+#define WDT_LOCK_LOCKED         0x00000001  // Watchdog timer is locked\r
+#define WDT_LOCK_UNLOCKED       0x00000000  // Watchdog timer is unlocked\r
+#define WDT_LOCK_UNLOCK         0x1ACCE551  // Unlocks the watchdog timer\r
+\r
+//*****************************************************************************\r
+//\r
+// The following define the reset values for the WDT registers.\r
+//\r
+//*****************************************************************************\r
+#define WDT_RV_LOAD             0xFFFFFFFF  // Load register\r
+#define WDT_RV_VALUE            0xFFFFFFFF  // Current value register\r
+#define WDT_RV_CTL              0x00000000  // Control register\r
+#define WDT_RV_RIS              0x00000000  // Raw interrupt status register\r
+#define WDT_RV_MIS              0x00000000  // Masked interrupt status register\r
+#define WDT_RV_LOCK             0x00000000  // Lock register\r
+#define WDT_RV_PeriphID4        0x00000000  //\r
+#define WDT_RV_PeriphID5        0x00000000  //\r
+#define WDT_RV_PeriphID6        0x00000000  //\r
+#define WDT_RV_PeriphID7        0x00000000  //\r
+#define WDT_RV_PeriphID0        0x00000005  //\r
+#define WDT_RV_PeriphID1        0x00000018  //\r
+#define WDT_RV_PeriphID2        0x00000018  //\r
+#define WDT_RV_PeriphID3        0x00000001  //\r
+#define WDT_RV_PCellID0         0x0000000D  //\r
+#define WDT_RV_PCellID1         0x000000F0  //\r
+#define WDT_RV_PCellID2         0x00000005  //\r
+#define WDT_RV_PCellID3         0x000000B1  //\r
+\r
+#endif // __HW_WATCHDOG_H__\r

diff --git a/Demo/Common/drivers/LuminaryMicro/i2c.h b/Demo/Common/drivers/LuminaryMicro/i2c.h
new file mode 100644 (file)
index 0000000..0268bd8
--- /dev/null
+++ b/Demo/Common/drivers/LuminaryMicro/i2c.h
@@ -0,0 +1,143 @@
+//*****************************************************************************\r
+//\r
+// i2c.h - Prototypes for the I2C Driver.\r
+//\r
+// Copyright (c) 2005-2007 Luminary Micro, Inc.  All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1582 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+#ifndef __I2C_H__\r
+#define __I2C_H__\r
+\r
+#ifdef __cplusplus\r
+extern "C"\r
+{\r
+#endif\r
+\r
+//*****************************************************************************\r
+//\r
+// Defines for the API.\r
+//\r
+//*****************************************************************************\r
+\r
+//*****************************************************************************\r
+//\r
+// Interrupt defines.\r
+//\r
+//*****************************************************************************\r
+#define I2C_INT_MASTER          0x00000001\r
+#define I2C_INT_SLAVE           0x00000002\r
+\r
+//*****************************************************************************\r
+//\r
+// I2C Master commands.\r
+//\r
+//*****************************************************************************\r
+#define I2C_MASTER_CMD_SINGLE_SEND              0x00000007\r
+#define I2C_MASTER_CMD_SINGLE_RECEIVE           0x00000007\r
+#define I2C_MASTER_CMD_BURST_SEND_START         0x00000003\r
+#define I2C_MASTER_CMD_BURST_SEND_CONT          0x00000001\r
+#define I2C_MASTER_CMD_BURST_SEND_FINISH        0x00000005\r
+#define I2C_MASTER_CMD_BURST_SEND_ERROR_STOP    0x00000004\r
+#define I2C_MASTER_CMD_BURST_RECEIVE_START      0x0000000b\r
+#define I2C_MASTER_CMD_BURST_RECEIVE_CONT       0x00000009\r
+#define I2C_MASTER_CMD_BURST_RECEIVE_FINISH     0x00000005\r
+#define I2C_MASTER_CMD_BURST_RECEIVE_ERROR_STOP 0x00000005\r
+\r
+//*****************************************************************************\r
+//\r
+// I2C Master error status.\r
+//\r
+//*****************************************************************************\r
+#define I2C_MASTER_ERR_NONE     0\r
+#define I2C_MASTER_ERR_ADDR_ACK 0x00000004\r
+#define I2C_MASTER_ERR_DATA_ACK 0x00000008\r
+#define I2C_MASTER_ERR_ARB_LOST 0x00000010\r
+\r
+//*****************************************************************************\r
+//\r
+// I2C Slave action requests\r
+//\r
+//*****************************************************************************\r
+#define I2C_SLAVE_ACT_NONE      0\r
+#define I2C_SLAVE_ACT_RREQ      0x00000001  // Master has sent data\r
+#define I2C_SLAVE_ACT_TREQ      0x00000002  // Master has requested data\r
+\r
+//*****************************************************************************\r
+//\r
+// Miscellaneous I2C driver definitions.\r
+//\r
+//*****************************************************************************\r
+#define I2C_MASTER_MAX_RETRIES  1000        // Number of retries\r
+\r
+//*****************************************************************************\r
+//\r
+// Prototypes for the APIs.\r
+//\r
+//*****************************************************************************\r
+extern void I2CIntRegister(unsigned long ulBase, void(fnHandler)(void));\r
+extern void I2CIntUnregister(unsigned long ulBase);\r
+extern tBoolean I2CMasterBusBusy(unsigned long ulBase);\r
+extern tBoolean I2CMasterBusy(unsigned long ulBase);\r
+extern void I2CMasterControl(unsigned long ulBase, unsigned long ulCmd);\r
+extern unsigned long I2CMasterDataGet(unsigned long ulBase);\r
+extern void I2CMasterDataPut(unsigned long ulBase, unsigned char ucData);\r
+extern void I2CMasterDisable(unsigned long ulBase);\r
+extern void I2CMasterEnable(unsigned long ulBase);\r
+extern unsigned long I2CMasterErr(unsigned long ulBase);\r
+extern void I2CMasterInitExpClk(unsigned long ulBase, unsigned long ulI2CClk,\r
+                                tBoolean bFast);\r
+extern void I2CMasterIntClear(unsigned long ulBase);\r
+extern void I2CMasterIntDisable(unsigned long ulBase);\r
+extern void I2CMasterIntEnable(unsigned long ulBase);\r
+extern tBoolean I2CMasterIntStatus(unsigned long ulBase, tBoolean bMasked);\r
+extern void I2CMasterSlaveAddrSet(unsigned long ulBase,\r
+                                  unsigned char ucSlaveAddr,\r
+                                  tBoolean bReceive);\r
+extern unsigned long I2CSlaveDataGet(unsigned long ulBase);\r
+extern void I2CSlaveDataPut(unsigned long ulBase, unsigned char ucData);\r
+extern void I2CSlaveDisable(unsigned long ulBase);\r
+extern void I2CSlaveEnable(unsigned long ulBase);\r
+extern void I2CSlaveInit(unsigned long ulBase, unsigned char ucSlaveAddr);\r
+extern void I2CSlaveIntClear(unsigned long ulBase);\r
+extern void I2CSlaveIntDisable(unsigned long ulBase);\r
+extern void I2CSlaveIntEnable(unsigned long ulBase);\r
+extern tBoolean I2CSlaveIntStatus(unsigned long ulBase, tBoolean bMasked);\r
+extern unsigned long I2CSlaveStatus(unsigned long ulBase);\r
+\r
+//*****************************************************************************\r
+//\r
+// Several I2C APIs have been renamed, with the original function name being\r
+// deprecated.  These defines provide backward compatibility.\r
+//\r
+//*****************************************************************************\r
+#ifndef DEPRECATED\r
+#include "sysctl.h"\r
+#define I2CMasterInit(a, b)                         \\r
+        I2CMasterInitExpClk(a, SysCtlClockGet(), b)\r
+#endif\r
+\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+\r
+#endif // __I2C_H__\r

diff --git a/Demo/Common/drivers/LuminaryMicro/interrupt.h b/Demo/Common/drivers/LuminaryMicro/interrupt.h
new file mode 100644 (file)
index 0000000..fb0ca6e
--- /dev/null
+++ b/Demo/Common/drivers/LuminaryMicro/interrupt.h
@@ -0,0 +1,57 @@
+//*****************************************************************************\r
+//\r
+// interrupt.h - Prototypes for the NVIC Interrupt Controller Driver.\r
+//\r
+// Copyright (c) 2005-2007 Luminary Micro, Inc.  All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1582 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+#ifndef __INTERRUPT_H__\r
+#define __INTERRUPT_H__\r
+\r
+#ifdef __cplusplus\r
+extern "C"\r
+{\r
+#endif\r
+\r
+//*****************************************************************************\r
+//\r
+// Prototypes for the APIs.\r
+//\r
+//*****************************************************************************\r
+extern void IntMasterEnable(void);\r
+extern void IntMasterDisable(void);\r
+extern void IntRegister(unsigned long ulInterrupt, void (*pfnHandler)(void));\r
+extern void IntUnregister(unsigned long ulInterrupt);\r
+extern void IntPriorityGroupingSet(unsigned long ulBits);\r
+extern unsigned long IntPriorityGroupingGet(void);\r
+extern void IntPrioritySet(unsigned long ulInterrupt,\r
+                           unsigned char ucPriority);\r
+extern long IntPriorityGet(unsigned long ulInterrupt);\r
+extern void IntEnable(unsigned long ulInterrupt);\r
+extern void IntDisable(unsigned long ulInterrupt);\r
+\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+\r
+#endif // __INTERRUPT_H__\r

diff --git a/Demo/Common/drivers/LuminaryMicro/lmi_flash.h b/Demo/Common/drivers/LuminaryMicro/lmi_flash.h
new file mode 100644 (file)
index 0000000..e53883f
--- /dev/null
+++ b/Demo/Common/drivers/LuminaryMicro/lmi_flash.h
@@ -0,0 +1,78 @@
+//*****************************************************************************\r
+//\r
+// flash.h - Prototypes for the flash driver.\r
+//\r
+// Copyright (c) 2005-2007 Luminary Micro, Inc.  All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1582 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+#ifndef __FLASH_H__\r
+#define __FLASH_H__\r
+\r
+#ifdef __cplusplus\r
+extern "C"\r
+{\r
+#endif\r
+\r
+//*****************************************************************************\r
+//\r
+// Values that can be passed to FlashProtectSet(), and returned by\r
+// FlashProtectGet().\r
+//\r
+//*****************************************************************************\r
+typedef enum\r
+{\r
+    FlashReadWrite,                         // Flash can be read and written\r
+    FlashReadOnly,                          // Flash can only be read\r
+    FlashExecuteOnly                        // Flash can only be executed\r
+}\r
+tFlashProtection;\r
+\r
+//*****************************************************************************\r
+//\r
+// Prototypes for the APIs.\r
+//\r
+//*****************************************************************************\r
+extern unsigned long FlashUsecGet(void);\r
+extern void FlashUsecSet(unsigned long ulClocks);\r
+extern long FlashErase(unsigned long ulAddress);\r
+extern long FlashProgram(unsigned long *pulData, unsigned long ulAddress,\r
+                         unsigned long ulCount);\r
+extern tFlashProtection FlashProtectGet(unsigned long ulAddress);\r
+extern long FlashProtectSet(unsigned long ulAddress,\r
+                            tFlashProtection eProtect);\r
+extern long FlashProtectSave(void);\r
+extern long FlashUserGet(unsigned long *pulUser0, unsigned long *pulUser1);\r
+extern long FlashUserSet(unsigned long ulUser0, unsigned long ulUser1);\r
+extern long FlashUserSave(void);\r
+extern void FlashIntRegister(void (*pfnHandler)(void));\r
+extern void FlashIntUnregister(void);\r
+extern void FlashIntEnable(unsigned long ulIntFlags);\r
+extern void FlashIntDisable(unsigned long ulIntFlags);\r
+extern unsigned long FlashIntGetStatus(tBoolean bMasked);\r
+extern void FlashIntClear(unsigned long ulIntFlags);\r
+\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+\r
+#endif // __FLASH_H__\r

diff --git a/Demo/Common/drivers/LuminaryMicro/lmi_timer.h b/Demo/Common/drivers/LuminaryMicro/lmi_timer.h
new file mode 100644 (file)
index 0000000..0a0d545
--- /dev/null
+++ b/Demo/Common/drivers/LuminaryMicro/lmi_timer.h
@@ -0,0 +1,137 @@
+//*****************************************************************************\r
+//\r
+// timer.h - Prototypes for the timer module\r
+//\r
+// Copyright (c) 2005-2007 Luminary Micro, Inc.  All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1582 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+#ifndef __TIMER_H__\r
+#define __TIMER_H__\r
+\r
+#ifdef __cplusplus\r
+extern "C"\r
+{\r
+#endif\r
+\r
+//*****************************************************************************\r
+//\r
+// Values that can be passed to TimerConfigure as the ulConfig parameter.\r
+//\r
+//*****************************************************************************\r
+#define TIMER_CFG_32_BIT_OS     0x00000001  // 32-bit one-shot timer\r
+#define TIMER_CFG_32_BIT_PER    0x00000002  // 32-bit periodic timer\r
+#define TIMER_CFG_32_RTC        0x01000000  // 32-bit RTC timer\r
+#define TIMER_CFG_16_BIT_PAIR   0x04000000  // Two 16-bit timers\r
+#define TIMER_CFG_A_ONE_SHOT    0x00000001  // Timer A one-shot timer\r
+#define TIMER_CFG_A_PERIODIC    0x00000002  // Timer A periodic timer\r
+#define TIMER_CFG_A_CAP_COUNT   0x00000003  // Timer A event counter\r
+#define TIMER_CFG_A_CAP_TIME    0x00000007  // Timer A event timer\r
+#define TIMER_CFG_A_PWM         0x0000000A  // Timer A PWM output\r
+#define TIMER_CFG_B_ONE_SHOT    0x00000100  // Timer B one-shot timer\r
+#define TIMER_CFG_B_PERIODIC    0x00000200  // Timer B periodic timer\r
+#define TIMER_CFG_B_CAP_COUNT   0x00000300  // Timer B event counter\r
+#define TIMER_CFG_B_CAP_TIME    0x00000700  // Timer B event timer\r
+#define TIMER_CFG_B_PWM         0x00000A00  // Timer B PWM output\r
+\r
+//*****************************************************************************\r
+//\r
+// Values that can be passed to TimerIntEnable, TimerIntDisable, and\r
+// TimerIntClear as the ulIntFlags parameter, and returned from TimerIntStatus.\r
+//\r
+//*****************************************************************************\r
+#define TIMER_CAPB_EVENT        0x00000400  // CaptureB event interrupt\r
+#define TIMER_CAPB_MATCH        0x00000200  // CaptureB match interrupt\r
+#define TIMER_TIMB_TIMEOUT      0x00000100  // TimerB time out interrupt\r
+#define TIMER_RTC_MATCH         0x00000008  // RTC interrupt mask\r
+#define TIMER_CAPA_EVENT        0x00000004  // CaptureA event interrupt\r
+#define TIMER_CAPA_MATCH        0x00000002  // CaptureA match interrupt\r
+#define TIMER_TIMA_TIMEOUT      0x00000001  // TimerA time out interrupt\r
+\r
+//*****************************************************************************\r
+//\r
+// Values that can be passed to TimerControlEvent as the ulEvent parameter.\r
+//\r
+//*****************************************************************************\r
+#define TIMER_EVENT_POS_EDGE    0x00000000  // Count positive edges\r
+#define TIMER_EVENT_NEG_EDGE    0x00000404  // Count negative edges\r
+#define TIMER_EVENT_BOTH_EDGES  0x00000C0C  // Count both edges\r
+\r
+//*****************************************************************************\r
+//\r
+// Values that can be passed to most of the timer APIs as the ulTimer\r
+// parameter.\r
+//\r
+//*****************************************************************************\r
+#define TIMER_A                 0x000000ff  // Timer A\r
+#define TIMER_B                 0x0000ff00  // Timer B\r
+#define TIMER_BOTH              0x0000ffff  // Timer Both\r
+\r
+//*****************************************************************************\r
+//\r
+// Prototypes for the APIs.\r
+//\r
+//*****************************************************************************\r
+extern void TimerEnable(unsigned long ulBase, unsigned long ulTimer);\r
+extern void TimerDisable(unsigned long ulBase, unsigned long ulTimer);\r
+extern void TimerConfigure(unsigned long ulBase, unsigned long ulConfig);\r
+extern void TimerControlLevel(unsigned long ulBase, unsigned long ulTimer,\r
+                              tBoolean bInvert);\r
+extern void TimerControlTrigger(unsigned long ulBase, unsigned long ulTimer,\r
+                                tBoolean bEnable);\r
+extern void TimerControlEvent(unsigned long ulBase, unsigned long ulTimer,\r
+                              unsigned long ulEvent);\r
+extern void TimerControlStall(unsigned long ulBase, unsigned long ulTimer,\r
+                              tBoolean bStall);\r
+extern void TimerRTCEnable(unsigned long ulBase);\r
+extern void TimerRTCDisable(unsigned long ulBase);\r
+extern void TimerPrescaleSet(unsigned long ulBase, unsigned long ulTimer,\r
+                             unsigned long ulValue);\r
+extern unsigned long TimerPrescaleGet(unsigned long ulBase,\r
+                                      unsigned long ulTimer);\r
+extern void TimerPrescaleMatchSet(unsigned long ulBase, unsigned long ulTimer,\r
+                                  unsigned long ulValue);\r
+extern unsigned long TimerPrescaleMatchGet(unsigned long ulBase,\r
+                                           unsigned long ulTimer);\r
+extern void TimerLoadSet(unsigned long ulBase, unsigned long ulTimer,\r
+                         unsigned long ulValue);\r
+extern unsigned long TimerLoadGet(unsigned long ulBase, unsigned long ulTimer);\r
+extern unsigned long TimerValueGet(unsigned long ulBase,\r
+                                   unsigned long ulTimer);\r
+extern void TimerMatchSet(unsigned long ulBase, unsigned long ulTimer,\r
+                          unsigned long ulValue);\r
+extern unsigned long TimerMatchGet(unsigned long ulBase,\r
+                                   unsigned long ulTimer);\r
+extern void TimerIntRegister(unsigned long ulBase, unsigned long ulTimer,\r
+                             void (*pfnHandler)(void));\r
+extern void TimerIntUnregister(unsigned long ulBase, unsigned long ulTimer);\r
+extern void TimerIntEnable(unsigned long ulBase, unsigned long ulIntFlags);\r
+extern void TimerIntDisable(unsigned long ulBase, unsigned long ulIntFlags);\r
+extern unsigned long TimerIntStatus(unsigned long ulBase, tBoolean bMasked);\r
+extern void TimerIntClear(unsigned long ulBase, unsigned long ulIntFlags);\r
+extern void TimerQuiesce(unsigned long ulBase);\r
+\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+\r
+#endif // __TIMER_H__\r

diff --git a/Demo/Common/drivers/LuminaryMicro/pwm.h b/Demo/Common/drivers/LuminaryMicro/pwm.h
new file mode 100644 (file)
index 0000000..d3138d3
--- /dev/null
+++ b/Demo/Common/drivers/LuminaryMicro/pwm.h
@@ -0,0 +1,161 @@
+//*****************************************************************************\r
+//\r
+// pwm.h - API function protoypes for Pulse Width Modulation (PWM) ports\r
+//\r
+// Copyright (c) 2005-2007 Luminary Micro, Inc.  All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1582 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+#ifndef __PWM_H__\r
+#define __PWM_H__\r
+\r
+#ifdef __cplusplus\r
+extern "C"\r
+{\r
+#endif\r
+\r
+//*****************************************************************************\r
+//\r
+// The following defines are passed to PWMGenConfigure() as the ulConfig\r
+// parameter and specify the configuration of the PWM generator.\r
+//\r
+//*****************************************************************************\r
+#define PWM_GEN_MODE_DOWN       0x00000000  // Down count mode\r
+#define PWM_GEN_MODE_UP_DOWN    0x00000002  // Up/Down count mode\r
+#define PWM_GEN_MODE_SYNC       0x00000038  // Synchronous updates\r
+#define PWM_GEN_MODE_NO_SYNC    0x00000000  // Immediate updates\r
+#define PWM_GEN_MODE_DBG_RUN    0x00000004  // Continue running in debug mode\r
+#define PWM_GEN_MODE_DBG_STOP   0x00000000  // Stop running in debug mode\r
+\r
+//*****************************************************************************\r
+//\r
+// Defines for enabling, disabling, and clearing PWM generator interrupts and\r
+// triggers.\r
+//\r
+//*****************************************************************************\r
+#define PWM_INT_CNT_ZERO        0x00000001  // Int if COUNT = 0\r
+#define PWM_INT_CNT_LOAD        0x00000002  // Int if COUNT = LOAD\r
+#define PWM_INT_CNT_AU          0x00000004  // Int if COUNT = CMPA U\r
+#define PWM_INT_CNT_AD          0x00000008  // Int if COUNT = CMPA D\r
+#define PWM_INT_CNT_BU          0x00000010  // Int if COUNT = CMPA U\r
+#define PWM_INT_CNT_BD          0x00000020  // Int if COUNT = CMPA D\r
+#define PWM_TR_CNT_ZERO         0x00000100  // Trig if COUNT = 0\r
+#define PWM_TR_CNT_LOAD         0x00000200  // Trig if COUNT = LOAD\r
+#define PWM_TR_CNT_AU           0x00000400  // Trig if COUNT = CMPA U\r
+#define PWM_TR_CNT_AD           0x00000800  // Trig if COUNT = CMPA D\r
+#define PWM_TR_CNT_BU           0x00001000  // Trig if COUNT = CMPA U\r
+#define PWM_TR_CNT_BD           0x00002000  // Trig if COUNT = CMPA D\r
+\r
+//*****************************************************************************\r
+//\r
+// Defines for enabling, disabling, and clearing PWM interrupts.\r
+//\r
+//*****************************************************************************\r
+#define PWM_INT_GEN_0           0x00000001  // Generator 0 interrupt\r
+#define PWM_INT_GEN_1           0x00000002  // Generator 1 interrupt\r
+#define PWM_INT_GEN_2           0x00000004  // Generator 2 interrupt\r
+#define PWM_INT_FAULT           0x00010000  // Fault interrupt\r
+\r
+//*****************************************************************************\r
+//\r
+// Defines to identify the generators within a module.\r
+//\r
+//*****************************************************************************\r
+#define PWM_GEN_0               0x00000040  // Offset address of Gen0\r
+#define PWM_GEN_1               0x00000080  // Offset address of Gen1\r
+#define PWM_GEN_2               0x000000C0  // Offset address of Gen2\r
+\r
+#define PWM_GEN_0_BIT           0x00000001  // Bit-wise ID for Gen0\r
+#define PWM_GEN_1_BIT           0x00000002  // Bit-wise ID for Gen1\r
+#define PWM_GEN_2_BIT           0x00000004  // Bit-wise ID for Gen2\r
+\r
+//*****************************************************************************\r
+//\r
+// Defines to identify the outputs within a module.\r
+//\r
+//*****************************************************************************\r
+#define PWM_OUT_0               0x00000040  // Encoded offset address of PWM0\r
+#define PWM_OUT_1               0x00000041  // Encoded offset address of PWM1\r
+#define PWM_OUT_2               0x00000082  // Encoded offset address of PWM2\r
+#define PWM_OUT_3               0x00000083  // Encoded offset address of PWM3\r
+#define PWM_OUT_4               0x000000C4  // Encoded offset address of PWM4\r
+#define PWM_OUT_5               0x000000C5  // Encoded offset address of PWM5\r
+\r
+#define PWM_OUT_0_BIT           0x00000001  // Bit-wise ID for PWM0\r
+#define PWM_OUT_1_BIT           0x00000002  // Bit-wise ID for PWM1\r
+#define PWM_OUT_2_BIT           0x00000004  // Bit-wise ID for PWM2\r
+#define PWM_OUT_3_BIT           0x00000008  // Bit-wise ID for PWM3\r
+#define PWM_OUT_4_BIT           0x00000010  // Bit-wise ID for PWM4\r
+#define PWM_OUT_5_BIT           0x00000020  // Bit-wise ID for PWM5\r
+\r
+//*****************************************************************************\r
+//\r
+// API Function prototypes\r
+//\r
+//*****************************************************************************\r
+extern void PWMGenConfigure(unsigned long ulBase, unsigned long ulGen,\r
+                            unsigned long ulConfig);\r
+extern void PWMGenPeriodSet(unsigned long ulBase, unsigned long ulGen,\r
+                            unsigned long ulPeriod);\r
+extern unsigned long PWMGenPeriodGet(unsigned long ulBase,\r
+                                     unsigned long ulGen);\r
+extern void PWMGenEnable(unsigned long ulBase, unsigned long ulGen);\r
+extern void PWMGenDisable(unsigned long ulBase, unsigned long ulGen);\r
+extern void PWMPulseWidthSet(unsigned long ulBase, unsigned long ulPWMOut,\r
+                             unsigned long ulWidth);\r
+extern unsigned long PWMPulseWidthGet(unsigned long ulBase,\r
+                                      unsigned long ulPWMOut);\r
+extern void PWMDeadBandEnable(unsigned long ulBase, unsigned long ulGen,\r
+                              unsigned short usRise, unsigned short usFall);\r
+extern void PWMDeadBandDisable(unsigned long ulBase, unsigned long ulGen);\r
+extern void PWMSyncUpdate(unsigned long ulBase, unsigned long ulGenBits);\r
+extern void PWMSyncTimeBase(unsigned long ulBase, unsigned long ulGenBits);\r
+extern void PWMOutputState(unsigned long ulBase, unsigned long ulPWMOutBits,\r
+                           tBoolean bEnable);\r
+extern void PWMOutputInvert(unsigned long ulBase, unsigned long ulPWMOutBits,\r
+                            tBoolean bInvert);\r
+extern void PWMOutputFault(unsigned long ulBase, unsigned long ulPWMOutBits,\r
+                           tBoolean bFaultKill);\r
+extern void PWMGenIntRegister(unsigned long ulBase, unsigned long ulGen,\r
+                              void (*pfnIntHandler)(void));\r
+extern void PWMGenIntUnregister(unsigned long ulBase, unsigned long ulGen);\r
+extern void PWMFaultIntRegister(unsigned long ulBase,\r
+                                void (*pfnIntHandler)(void));\r
+extern void PWMFaultIntUnregister(unsigned long ulBase);\r
+extern void PWMGenIntTrigEnable(unsigned long ulBase, unsigned long ulGen,\r
+                                unsigned long ulIntTrig);\r
+extern void PWMGenIntTrigDisable(unsigned long ulBase, unsigned long ulGen,\r
+                                 unsigned long ulIntTrig);\r
+extern unsigned long PWMGenIntStatus(unsigned long ulBase, unsigned long ulGen,\r
+                                     tBoolean bMasked);\r
+extern void PWMGenIntClear(unsigned long ulBase, unsigned long ulGen,\r
+                           unsigned long ulInts);\r
+extern void PWMIntEnable(unsigned long ulBase, unsigned long ulGenFault);\r
+extern void PWMIntDisable(unsigned long ulBase, unsigned long ulGenFault);\r
+extern void PWMFaultIntClear(unsigned long ulBase);\r
+extern unsigned long PWMIntStatus(unsigned long ulBase, tBoolean bMasked);\r
+\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+\r
+#endif // __PWM_H__\r

diff --git a/Demo/Common/drivers/LuminaryMicro/qei.h b/Demo/Common/drivers/LuminaryMicro/qei.h
new file mode 100644 (file)
index 0000000..587719a
--- /dev/null
+++ b/Demo/Common/drivers/LuminaryMicro/qei.h
@@ -0,0 +1,104 @@
+//*****************************************************************************\r
+//\r
+// qei.h - Prototypes for the Quadrature Encoder Driver.\r
+//\r
+// Copyright (c) 2005-2007 Luminary Micro, Inc.  All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1582 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+#ifndef __QEI_H__\r
+#define __QEI_H__\r
+\r
+#ifdef __cplusplus\r
+extern "C"\r
+{\r
+#endif\r
+\r
+//*****************************************************************************\r
+//\r
+// Values that can be passed to QEIConfigure as the ulConfig paramater.\r
+//\r
+//*****************************************************************************\r
+#define QEI_CONFIG_CAPTURE_A    0x00000000  // Count on ChA edges only\r
+#define QEI_CONFIG_CAPTURE_A_B  0x00000008  // Count on ChA and ChB edges\r
+#define QEI_CONFIG_NO_RESET     0x00000000  // Do not reset on index pulse\r
+#define QEI_CONFIG_RESET_IDX    0x00000010  // Reset position on index pulse\r
+#define QEI_CONFIG_QUADRATURE   0x00000000  // ChA and ChB are quadrature\r
+#define QEI_CONFIG_CLOCK_DIR    0x00000004  // ChA and ChB are clock and dir\r
+#define QEI_CONFIG_NO_SWAP      0x00000000  // Do not swap ChA and ChB\r
+#define QEI_CONFIG_SWAP         0x00000002  // Swap ChA and ChB\r
+\r
+//*****************************************************************************\r
+//\r
+// Values that can be passed to QEIVelocityConfigure as the ulPreDiv parameter.\r
+//\r
+//*****************************************************************************\r
+#define QEI_VELDIV_1            0x00000000  // Predivide by 1\r
+#define QEI_VELDIV_2            0x00000040  // Predivide by 2\r
+#define QEI_VELDIV_4            0x00000080  // Predivide by 4\r
+#define QEI_VELDIV_8            0x000000C0  // Predivide by 8\r
+#define QEI_VELDIV_16           0x00000100  // Predivide by 16\r
+#define QEI_VELDIV_32           0x00000140  // Predivide by 32\r
+#define QEI_VELDIV_64           0x00000180  // Predivide by 64\r
+#define QEI_VELDIV_128          0x000001C0  // Predivide by 128\r
+\r
+//*****************************************************************************\r
+//\r
+// Values that can be passed to QEIEnableInts, QEIDisableInts, and QEIClearInts\r
+// as the ulIntFlags parameter, and returned by QEIGetIntStatus.\r
+//\r
+//*****************************************************************************\r
+#define QEI_INTERROR            0x00000008  // Phase error detected\r
+#define QEI_INTDIR              0x00000004  // Direction change\r
+#define QEI_INTTIMER            0x00000002  // Velocity timer expired\r
+#define QEI_INTINDEX            0x00000001  // Index pulse detected\r
+\r
+//*****************************************************************************\r
+//\r
+// Prototypes for the APIs.\r
+//\r
+//*****************************************************************************\r
+extern void QEIEnable(unsigned long ulBase);\r
+extern void QEIDisable(unsigned long ulBase);\r
+extern void QEIConfigure(unsigned long ulBase, unsigned long ulConfig,\r
+                         unsigned long ulMaxPosition);\r
+extern unsigned long QEIPositionGet(unsigned long ulBase);\r
+extern void QEIPositionSet(unsigned long ulBase, unsigned long ulPosition);\r
+extern long QEIDirectionGet(unsigned long ulBase);\r
+extern tBoolean QEIErrorGet(unsigned long ulBase);\r
+extern void QEIVelocityEnable(unsigned long ulBase);\r
+extern void QEIVelocityDisable(unsigned long ulBase);\r
+extern void QEIVelocityConfigure(unsigned long ulBase, unsigned long ulPreDiv,\r
+                                 unsigned long ulPeriod);\r
+extern unsigned long QEIVelocityGet(unsigned long ulBase);\r
+extern void QEIIntRegister(unsigned long ulBase, void (*pfnHandler)(void));\r
+extern void QEIIntUnregister(unsigned long ulBase);\r
+extern void QEIIntEnable(unsigned long ulBase, unsigned long ulIntFlags);\r
+extern void QEIIntDisable(unsigned long ulBase, unsigned long ulIntFlags);\r
+extern unsigned long QEIIntStatus(unsigned long ulBase, tBoolean bMasked);\r
+extern void QEIIntClear(unsigned long ulBase, unsigned long ulIntFlags);\r
+\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+\r
+#endif // __QEI_H__\r

diff --git a/Demo/Common/drivers/LuminaryMicro/rit128x96x4.h b/Demo/Common/drivers/LuminaryMicro/rit128x96x4.h
new file mode 100644 (file)
index 0000000..eeec8e6
--- /dev/null
+++ b/Demo/Common/drivers/LuminaryMicro/rit128x96x4.h
@@ -0,0 +1,53 @@
+//*****************************************************************************\r
+//\r
+// rit128x96x4.h - Prototypes for the driver for the RITEK 128x96x4 graphical\r
+//                   OLED display.\r
+//\r
+// Copyright (c) 2007 Luminary Micro, Inc.  All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1582 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+#ifndef __RIT128X96X4_H__\r
+#define __RIT128X96X4_H__\r
+\r
+//*****************************************************************************\r
+//\r
+// Prototypes for the driver APIs.\r
+//\r
+//*****************************************************************************\r
+extern void RIT128x96x4Clear(void);\r
+extern void RIT128x96x4StringDraw(const char *pcStr,\r
+                                    unsigned long ulX,\r
+                                    unsigned long ulY,\r
+                                    unsigned char ucLevel);\r
+extern void RIT128x96x4ImageDraw(const unsigned char *pucImage,\r
+                                   unsigned long ulX,\r
+                                   unsigned long ulY,\r
+                                   unsigned long ulWidth,\r
+                                   unsigned long ulHeight);\r
+extern void RIT128x96x4Init(unsigned long ulFrequency);\r
+extern void RIT128x96x4Enable(unsigned long ulFrequency);\r
+extern void RIT128x96x4Disable(void);\r
+extern void RIT128x96x4DisplayOn(void);\r
+extern void RIT128x96x4DisplayOff(void);\r
+\r
+#endif // __RIT128X96X4_H__\r

diff --git a/Demo/Common/drivers/LuminaryMicro/ssi.h b/Demo/Common/drivers/LuminaryMicro/ssi.h
new file mode 100644 (file)
index 0000000..088a8bd
--- /dev/null
+++ b/Demo/Common/drivers/LuminaryMicro/ssi.h
@@ -0,0 +1,106 @@
+//*****************************************************************************\r
+//\r
+// ssi.h - Prototypes for the Synchronous Serial Interface Driver.\r
+//\r
+// Copyright (c) 2005-2007 Luminary Micro, Inc.  All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1582 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+#ifndef __SSI_H__\r
+#define __SSI_H__\r
+\r
+#ifdef __cplusplus\r
+extern "C"\r
+{\r
+#endif\r
+\r
+//*****************************************************************************\r
+//\r
+// Values that can be passed to SSIIntEnable, SSIIntDisable, and SSIIntClear\r
+// as the ulIntFlags parameter, and returned by SSIIntStatus.\r
+//\r
+//*****************************************************************************\r
+#define SSI_TXFF                0x00000008  // TX FIFO half empty or less\r
+#define SSI_RXFF                0x00000004  // RX FIFO half full or less\r
+#define SSI_RXTO                0x00000002  // RX timeout\r
+#define SSI_RXOR                0x00000001  // RX overrun\r
+\r
+//*****************************************************************************\r
+//\r
+// Values that can be passed to SSIConfigSetExpClk.\r
+//\r
+//*****************************************************************************\r
+#define SSI_FRF_MOTO_MODE_0     0x00000000  // Moto fmt, polarity 0, phase 0\r
+#define SSI_FRF_MOTO_MODE_1     0x00000002  // Moto fmt, polarity 0, phase 1\r
+#define SSI_FRF_MOTO_MODE_2     0x00000001  // Moto fmt, polarity 1, phase 0\r
+#define SSI_FRF_MOTO_MODE_3     0x00000003  // Moto fmt, polarity 1, phase 1\r
+#define SSI_FRF_TI              0x00000010  // TI frame format\r
+#define SSI_FRF_NMW             0x00000020  // National MicroWire frame format\r
+\r
+#define SSI_MODE_MASTER         0x00000000  // SSI master\r
+#define SSI_MODE_SLAVE          0x00000001  // SSI slave\r
+#define SSI_MODE_SLAVE_OD       0x00000002  // SSI slave with output disabled\r
+\r
+//*****************************************************************************\r
+//\r
+// Prototypes for the APIs.\r
+//\r
+//*****************************************************************************\r
+extern void SSIConfigSetExpClk(unsigned long ulBase, unsigned long ulSSIClk,\r
+                               unsigned long ulProtocol, unsigned long ulMode,\r
+                               unsigned long ulBitRate,\r
+                               unsigned long ulDataWidth);\r
+extern void SSIDataGet(unsigned long ulBase, unsigned long *pulData);\r
+extern long SSIDataGetNonBlocking(unsigned long ulBase,\r
+                                  unsigned long *pulData);\r
+extern void SSIDataPut(unsigned long ulBase, unsigned long ulData);\r
+extern long SSIDataPutNonBlocking(unsigned long ulBase, unsigned long ulData);\r
+extern void SSIDisable(unsigned long ulBase);\r
+extern void SSIEnable(unsigned long ulBase);\r
+extern void SSIIntClear(unsigned long ulBase, unsigned long ulIntFlags);\r
+extern void SSIIntDisable(unsigned long ulBase, unsigned long ulIntFlags);\r
+extern void SSIIntEnable(unsigned long ulBase, unsigned long ulIntFlags);\r
+extern void SSIIntRegister(unsigned long ulBase, void(*pfnHandler)(void));\r
+extern unsigned long SSIIntStatus(unsigned long ulBase, tBoolean bMasked);\r
+extern void SSIIntUnregister(unsigned long ulBase);\r
+\r
+//*****************************************************************************\r
+//\r
+// Several SSI APIs have been renamed, with the original function name being\r
+// deprecated.  These defines provide backward compatibility.\r
+//\r
+//*****************************************************************************\r
+#ifndef DEPRECATED\r
+#include "sysctl.h"\r
+#define SSIConfig(a, b, c, d, e)                            \\r
+        SSIConfigSetExpClk(a, SysCtlClockGet(), b, c, d, e)\r
+#define SSIDataNonBlockingGet(a, b) \\r
+        SSIDataGetNonBlocking(a, b)\r
+#define SSIDataNonBlockingPut(a, b) \\r
+        SSIDataPutNonBlocking(a, b)\r
+#endif\r
+\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+\r
+#endif // __SSI_H__\r

diff --git a/Demo/Common/drivers/LuminaryMicro/sysctl.h b/Demo/Common/drivers/LuminaryMicro/sysctl.h
new file mode 100644 (file)
index 0000000..1ca8bcc
--- /dev/null
+++ b/Demo/Common/drivers/LuminaryMicro/sysctl.h
@@ -0,0 +1,306 @@
+//*****************************************************************************\r
+//\r
+// sysctl.h - Prototypes for the system control driver.\r
+//\r
+// Copyright (c) 2005-2007 Luminary Micro, Inc.  All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1582 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+#ifndef __SYSCTL_H__\r
+#define __SYSCTL_H__\r
+\r
+#ifdef __cplusplus\r
+extern "C"\r
+{\r
+#endif\r
+\r
+//*****************************************************************************\r
+//\r
+// The following are values that can be passed to the\r
+// SysCtlPeripheralPresent(), SysCtlPeripheralEnable(),\r
+// SysCtlPeripheralDisable(), and SysCtlPeripheralReset() APIs as the\r
+// ulPeripheral parameter.  The peripherals in the fourth group (upper nibble\r
+// is 3) can only be used with the SysCtlPeripheralPresent() API.\r
+//\r
+//*****************************************************************************\r
+#define SYSCTL_PERIPH_PWM       0x00100010  // PWM\r
+#define SYSCTL_PERIPH_ADC       0x00100001  // ADC\r
+#define SYSCTL_PERIPH_HIBERNATE 0x00000040  // Hibernation module\r
+#define SYSCTL_PERIPH_WDOG      0x00000008  // Watchdog\r
+#define SYSCTL_PERIPH_CAN0      0x00100100  // CAN 0\r
+#define SYSCTL_PERIPH_CAN1      0x00100200  // CAN 1\r
+#define SYSCTL_PERIPH_CAN2      0x00100400  // CAN 2\r
+#define SYSCTL_PERIPH_UART0     0x10000001  // UART 0\r
+#define SYSCTL_PERIPH_UART1     0x10000002  // UART 1\r
+#define SYSCTL_PERIPH_UART2     0x10000004  // UART 2\r
+#define SYSCTL_PERIPH_SSI       0x10000010  // SSI\r
+#define SYSCTL_PERIPH_SSI0      0x10000010  // SSI 0\r
+#define SYSCTL_PERIPH_SSI1      0x10000020  // SSI 1\r
+#define SYSCTL_PERIPH_QEI       0x10000100  // QEI\r
+#define SYSCTL_PERIPH_QEI0      0x10000100  // QEI 0\r
+#define SYSCTL_PERIPH_QEI1      0x10000200  // QEI 1\r
+#define SYSCTL_PERIPH_I2C       0x10001000  // I2C\r
+#define SYSCTL_PERIPH_I2C0      0x10001000  // I2C 0\r
+#define SYSCTL_PERIPH_I2C1      0x10004000  // I2C 1\r
+#define SYSCTL_PERIPH_TIMER0    0x10100001  // Timer 0\r
+#define SYSCTL_PERIPH_TIMER1    0x10100002  // Timer 1\r
+#define SYSCTL_PERIPH_TIMER2    0x10100004  // Timer 2\r
+#define SYSCTL_PERIPH_TIMER3    0x10100008  // Timer 3\r
+#define SYSCTL_PERIPH_COMP0     0x10100100  // Analog comparator 0\r
+#define SYSCTL_PERIPH_COMP1     0x10100200  // Analog comparator 1\r
+#define SYSCTL_PERIPH_COMP2     0x10100400  // Analog comparator 2\r
+#define SYSCTL_PERIPH_GPIOA     0x20000001  // GPIO A\r
+#define SYSCTL_PERIPH_GPIOB     0x20000002  // GPIO B\r
+#define SYSCTL_PERIPH_GPIOC     0x20000004  // GPIO C\r
+#define SYSCTL_PERIPH_GPIOD     0x20000008  // GPIO D\r
+#define SYSCTL_PERIPH_GPIOE     0x20000010  // GPIO E\r
+#define SYSCTL_PERIPH_GPIOF     0x20000020  // GPIO F\r
+#define SYSCTL_PERIPH_GPIOG     0x20000040  // GPIO G\r
+#define SYSCTL_PERIPH_GPIOH     0x20000080  // GPIO H\r
+#define SYSCTL_PERIPH_ETH       0x20105000  // ETH\r
+#define SYSCTL_PERIPH_MPU       0x30000080  // Cortex M3 MPU\r
+#define SYSCTL_PERIPH_TEMP      0x30000020  // Temperature sensor\r
+#define SYSCTL_PERIPH_PLL       0x30000010  // PLL\r
+\r
+//*****************************************************************************\r
+//\r
+// The following are values that can be passed to the SysCtlPinPresent() API\r
+// as the ulPin parameter.\r
+//\r
+//*****************************************************************************\r
+#define SYSCTL_PIN_PWM0         0x00000001  // PWM0 pin\r
+#define SYSCTL_PIN_PWM1         0x00000002  // PWM1 pin\r
+#define SYSCTL_PIN_PWM2         0x00000004  // PWM2 pin\r
+#define SYSCTL_PIN_PWM3         0x00000008  // PWM3 pin\r
+#define SYSCTL_PIN_PWM4         0x00000010  // PWM4 pin\r
+#define SYSCTL_PIN_PWM5         0x00000020  // PWM5 pin\r
+#define SYSCTL_PIN_C0MINUS      0x00000040  // C0- pin\r
+#define SYSCTL_PIN_C0PLUS       0x00000080  // C0+ pin\r
+#define SYSCTL_PIN_C0O          0x00000100  // C0o pin\r
+#define SYSCTL_PIN_C1MINUS      0x00000200  // C1- pin\r
+#define SYSCTL_PIN_C1PLUS       0x00000400  // C1+ pin\r
+#define SYSCTL_PIN_C1O          0x00000800  // C1o pin\r
+#define SYSCTL_PIN_C2MINUS      0x00001000  // C2- pin\r
+#define SYSCTL_PIN_C2PLUS       0x00002000  // C2+ pin\r
+#define SYSCTL_PIN_C2O          0x00004000  // C2o pin\r
+#define SYSCTL_PIN_MC_FAULT0    0x00008000  // MC0 Fault pin\r
+#define SYSCTL_PIN_ADC0         0x00010000  // ADC0 pin\r
+#define SYSCTL_PIN_ADC1         0x00020000  // ADC1 pin\r
+#define SYSCTL_PIN_ADC2         0x00040000  // ADC2 pin\r
+#define SYSCTL_PIN_ADC3         0x00080000  // ADC3 pin\r
+#define SYSCTL_PIN_ADC4         0x00100000  // ADC4 pin\r
+#define SYSCTL_PIN_ADC5         0x00200000  // ADC5 pin\r
+#define SYSCTL_PIN_ADC6         0x00400000  // ADC6 pin\r
+#define SYSCTL_PIN_ADC7         0x00800000  // ADC7 pin\r
+#define SYSCTL_PIN_CCP0         0x01000000  // CCP0 pin\r
+#define SYSCTL_PIN_CCP1         0x02000000  // CCP1 pin\r
+#define SYSCTL_PIN_CCP2         0x04000000  // CCP2 pin\r
+#define SYSCTL_PIN_CCP3         0x08000000  // CCP3 pin\r
+#define SYSCTL_PIN_CCP4         0x10000000  // CCP4 pin\r
+#define SYSCTL_PIN_CCP5         0x20000000  // CCP5 pin\r
+#define SYSCTL_PIN_32KHZ        0x80000000  // 32kHz pin\r
+\r
+//*****************************************************************************\r
+//\r
+// The following are values that can be passed to the SysCtlLDOSet() API as\r
+// the ulVoltage value, or returned by the SysCtlLDOGet() API.\r
+//\r
+//*****************************************************************************\r
+#define SYSCTL_LDO_2_25V        0x00000005  // LDO output of 2.25V\r
+#define SYSCTL_LDO_2_30V        0x00000004  // LDO output of 2.30V\r
+#define SYSCTL_LDO_2_35V        0x00000003  // LDO output of 2.35V\r
+#define SYSCTL_LDO_2_40V        0x00000002  // LDO output of 2.40V\r
+#define SYSCTL_LDO_2_45V        0x00000001  // LDO output of 2.45V\r
+#define SYSCTL_LDO_2_50V        0x00000000  // LDO output of 2.50V\r
+#define SYSCTL_LDO_2_55V        0x0000001f  // LDO output of 2.55V\r
+#define SYSCTL_LDO_2_60V        0x0000001e  // LDO output of 2.60V\r
+#define SYSCTL_LDO_2_65V        0x0000001d  // LDO output of 2.65V\r
+#define SYSCTL_LDO_2_70V        0x0000001c  // LDO output of 2.70V\r
+#define SYSCTL_LDO_2_75V        0x0000001b  // LDO output of 2.75V\r
+\r
+//*****************************************************************************\r
+//\r
+// The following are values that can be passed to the SysCtlLDOConfigSet() API.\r
+//\r
+//*****************************************************************************\r
+#define SYSCTL_LDOCFG_ARST      0x00000001  // Allow LDO failure to reset\r
+#define SYSCTL_LDOCFG_NORST     0x00000000  // Do not reset on LDO failure\r
+\r
+//*****************************************************************************\r
+//\r
+// The following are values that can be passed to the SysCtlIntEnable(),\r
+// SysCtlIntDisable(), and SysCtlIntClear() APIs, or returned in the bit mask\r
+// by the SysCtlIntStatus() API.\r
+//\r
+//*****************************************************************************\r
+#define SYSCTL_INT_PLL_LOCK     0x00000040  // PLL lock interrupt\r
+#define SYSCTL_INT_CUR_LIMIT    0x00000020  // Current limit interrupt\r
+#define SYSCTL_INT_IOSC_FAIL    0x00000010  // Internal oscillator failure int\r
+#define SYSCTL_INT_MOSC_FAIL    0x00000008  // Main oscillator failure int\r
+#define SYSCTL_INT_POR          0x00000004  // Power on reset interrupt\r
+#define SYSCTL_INT_BOR          0x00000002  // Brown out interrupt\r
+#define SYSCTL_INT_PLL_FAIL     0x00000001  // PLL failure interrupt\r
+\r
+//*****************************************************************************\r
+//\r
+// The following are values that can be passed to the SysCtlResetCauseClear()\r
+// API or returned by the SysCtlResetCauseGet() API.\r
+//\r
+//*****************************************************************************\r
+#define SYSCTL_CAUSE_LDO        0x00000020  // LDO power not OK reset\r
+#define SYSCTL_CAUSE_SW         0x00000010  // Software reset\r
+#define SYSCTL_CAUSE_WDOG       0x00000008  // Watchdog reset\r
+#define SYSCTL_CAUSE_BOR        0x00000004  // Brown-out reset\r
+#define SYSCTL_CAUSE_POR        0x00000002  // Power on reset\r
+#define SYSCTL_CAUSE_EXT        0x00000001  // External reset\r
+\r
+//*****************************************************************************\r
+//\r
+// The following are values that can be passed to the SysCtlBrownOutConfigSet()\r
+// API as the ulConfig parameter.\r
+//\r
+//*****************************************************************************\r
+#define SYSCTL_BOR_RESET        0x00000002  // Reset instead of interrupting\r
+#define SYSCTL_BOR_RESAMPLE     0x00000001  // Resample BOR before asserting\r
+\r
+//*****************************************************************************\r
+//\r
+// The following are values that can be passed to the SysCtlPWMClockSet() API\r
+// as the ulConfig parameter, and can be returned by the SysCtlPWMClockGet()\r
+// API.\r
+//\r
+//*****************************************************************************\r
+#define SYSCTL_PWMDIV_1         0x00000000  // PWM clock is processor clock /1\r
+#define SYSCTL_PWMDIV_2         0x00100000  // PWM clock is processor clock /2\r
+#define SYSCTL_PWMDIV_4         0x00120000  // PWM clock is processor clock /4\r
+#define SYSCTL_PWMDIV_8         0x00140000  // PWM clock is processor clock /8\r
+#define SYSCTL_PWMDIV_16        0x00160000  // PWM clock is processor clock /16\r
+#define SYSCTL_PWMDIV_32        0x00180000  // PWM clock is processor clock /32\r
+#define SYSCTL_PWMDIV_64        0x001A0000  // PWM clock is processor clock /64\r
+\r
+//*****************************************************************************\r
+//\r
+// The following are values that can be passed to the SysCtlADCSpeedSet() API\r
+// as the ulSpeed parameter, and can be returned by the SyCtlADCSpeedGet()\r
+// API.\r
+//\r
+//*****************************************************************************\r
+#define SYSCTL_ADCSPEED_1MSPS   0x00000300  // 1,000,000 samples per second\r
+#define SYSCTL_ADCSPEED_500KSPS 0x00000200  // 500,000 samples per second\r
+#define SYSCTL_ADCSPEED_250KSPS 0x00000100  // 250,000 samples per second\r
+#define SYSCTL_ADCSPEED_125KSPS 0x00000000  // 125,000 samples per second\r
+\r
+//*****************************************************************************\r
+//\r
+// The following are values that can be passed to the SysCtlClockSet() API as\r
+// the ulConfig parameter.\r
+//\r
+//*****************************************************************************\r
+#define SYSCTL_SYSDIV_1         0x07800000  // Processor clock is osc/pll /1\r
+#define SYSCTL_SYSDIV_2         0x00C00000  // Processor clock is osc/pll /2\r
+#define SYSCTL_SYSDIV_3         0x01400000  // Processor clock is osc/pll /3\r
+#define SYSCTL_SYSDIV_4         0x01C00000  // Processor clock is osc/pll /4\r
+#define SYSCTL_SYSDIV_5         0x02400000  // Processor clock is osc/pll /5\r
+#define SYSCTL_SYSDIV_6         0x02C00000  // Processor clock is osc/pll /6\r
+#define SYSCTL_SYSDIV_7         0x03400000  // Processor clock is osc/pll /7\r
+#define SYSCTL_SYSDIV_8         0x03C00000  // Processor clock is osc/pll /8\r
+#define SYSCTL_SYSDIV_9         0x04400000  // Processor clock is osc/pll /9\r
+#define SYSCTL_SYSDIV_10        0x04C00000  // Processor clock is osc/pll /10\r
+#define SYSCTL_SYSDIV_11        0x05400000  // Processor clock is osc/pll /11\r
+#define SYSCTL_SYSDIV_12        0x05C00000  // Processor clock is osc/pll /12\r
+#define SYSCTL_SYSDIV_13        0x06400000  // Processor clock is osc/pll /13\r
+#define SYSCTL_SYSDIV_14        0x06C00000  // Processor clock is osc/pll /14\r
+#define SYSCTL_SYSDIV_15        0x07400000  // Processor clock is osc/pll /15\r
+#define SYSCTL_SYSDIV_16        0x07C00000  // Processor clock is osc/pll /16\r
+#define SYSCTL_USE_PLL          0x00000000  // System clock is the PLL clock\r
+#define SYSCTL_USE_OSC          0x00003800  // System clock is the osc clock\r
+#define SYSCTL_XTAL_1MHZ        0x00000000  // External crystal is 1MHz\r
+#define SYSCTL_XTAL_1_84MHZ     0x00000040  // External crystal is 1.8432MHz\r
+#define SYSCTL_XTAL_2MHZ        0x00000080  // External crystal is 2MHz\r
+#define SYSCTL_XTAL_2_45MHZ     0x000000C0  // External crystal is 2.4576MHz\r
+#define SYSCTL_XTAL_3_57MHZ     0x00000100  // External crystal is 3.579545MHz\r
+#define SYSCTL_XTAL_3_68MHZ     0x00000140  // External crystal is 3.6864MHz\r
+#define SYSCTL_XTAL_4MHZ        0x00000180  // External crystal is 4MHz\r
+#define SYSCTL_XTAL_4_09MHZ     0x000001C0  // External crystal is 4.096MHz\r
+#define SYSCTL_XTAL_4_91MHZ     0x00000200  // External crystal is 4.9152MHz\r
+#define SYSCTL_XTAL_5MHZ        0x00000240  // External crystal is 5MHz\r
+#define SYSCTL_XTAL_5_12MHZ     0x00000280  // External crystal is 5.12MHz\r
+#define SYSCTL_XTAL_6MHZ        0x000002C0  // External crystal is 6MHz\r
+#define SYSCTL_XTAL_6_14MHZ     0x00000300  // External crystal is 6.144MHz\r
+#define SYSCTL_XTAL_7_37MHZ     0x00000340  // External crystal is 7.3728MHz\r
+#define SYSCTL_XTAL_8MHZ        0x00000380  // External crystal is 8MHz\r
+#define SYSCTL_XTAL_8_19MHZ     0x000003C0  // External crystal is 8.192MHz\r
+#define SYSCTL_OSC_MAIN         0x00000000  // Oscillator source is main osc\r
+#define SYSCTL_OSC_INT          0x00000010  // Oscillator source is int. osc\r
+#define SYSCTL_OSC_INT4         0x00000020  // Oscillator source is int. osc /4\r
+#define SYSCTL_INT_OSC_DIS      0x00000002  // Disable internal oscillator\r
+#define SYSCTL_MAIN_OSC_DIS     0x00000001  // Disable main oscillator\r
+\r
+//*****************************************************************************\r
+//\r
+// Prototypes for the APIs.\r
+//\r
+//*****************************************************************************\r
+extern unsigned long SysCtlSRAMSizeGet(void);\r
+extern unsigned long SysCtlFlashSizeGet(void);\r
+extern tBoolean SysCtlPinPresent(unsigned long ulPin);\r
+extern tBoolean SysCtlPeripheralPresent(unsigned long ulPeripheral);\r
+extern void SysCtlPeripheralReset(unsigned long ulPeripheral);\r
+extern void SysCtlPeripheralEnable(unsigned long ulPeripheral);\r
+extern void SysCtlPeripheralDisable(unsigned long ulPeripheral);\r
+extern void SysCtlPeripheralSleepEnable(unsigned long ulPeripheral);\r
+extern void SysCtlPeripheralSleepDisable(unsigned long ulPeripheral);\r
+extern void SysCtlPeripheralDeepSleepEnable(unsigned long ulPeripheral);\r
+extern void SysCtlPeripheralDeepSleepDisable(unsigned long ulPeripheral);\r
+extern void SysCtlPeripheralClockGating(tBoolean bEnable);\r
+extern void SysCtlIntRegister(void (*pfnHandler)(void));\r
+extern void SysCtlIntUnregister(void);\r
+extern void SysCtlIntEnable(unsigned long ulInts);\r
+extern void SysCtlIntDisable(unsigned long ulInts);\r
+extern void SysCtlIntClear(unsigned long ulInts);\r
+extern unsigned long SysCtlIntStatus(tBoolean bMasked);\r
+extern void SysCtlLDOSet(unsigned long ulVoltage);\r
+extern unsigned long SysCtlLDOGet(void);\r
+extern void SysCtlLDOConfigSet(unsigned long ulConfig);\r
+extern void SysCtlReset(void);\r
+extern void SysCtlSleep(void);\r
+extern void SysCtlDeepSleep(void);\r
+extern unsigned long SysCtlResetCauseGet(void);\r
+extern void SysCtlResetCauseClear(unsigned long ulCauses);\r
+extern void SysCtlBrownOutConfigSet(unsigned long ulConfig,\r
+                                    unsigned long ulDelay);\r
+extern void SysCtlClockSet(unsigned long ulConfig);\r
+extern unsigned long SysCtlClockGet(void);\r
+extern void SysCtlPWMClockSet(unsigned long ulConfig);\r
+extern unsigned long SysCtlPWMClockGet(void);\r
+extern void SysCtlADCSpeedSet(unsigned long ulSpeed);\r
+extern unsigned long SysCtlADCSpeedGet(void);\r
+extern void SysCtlIOSCVerificationSet(tBoolean bEnable);\r
+extern void SysCtlMOSCVerificationSet(tBoolean bEnable);\r
+extern void SysCtlPLLVerificationSet(tBoolean bEnable);\r
+extern void SysCtlClkVerificationClear(void);\r
+\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+\r
+#endif // __SYSCTL_H__\r

diff --git a/Demo/Common/drivers/LuminaryMicro/systick.h b/Demo/Common/drivers/LuminaryMicro/systick.h
new file mode 100644 (file)
index 0000000..c94c70b
--- /dev/null
+++ b/Demo/Common/drivers/LuminaryMicro/systick.h
@@ -0,0 +1,55 @@
+//*****************************************************************************\r
+//\r
+// systick.h - Prototypes for the SysTick driver.\r
+//\r
+// Copyright (c) 2005-2007 Luminary Micro, Inc.  All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1582 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+#ifndef __SYSTICK_H__\r
+#define __SYSTICK_H__\r
+\r
+#ifdef __cplusplus\r
+extern "C"\r
+{\r
+#endif\r
+\r
+//*****************************************************************************\r
+//\r
+// Prototypes for the APIs.\r
+//\r
+//*****************************************************************************\r
+extern void SysTickEnable(void);\r
+extern void SysTickDisable(void);\r
+extern void SysTickIntRegister(void (*pfnHandler)(void));\r
+extern void SysTickIntUnregister(void);\r
+extern void SysTickIntEnable(void);\r
+extern void SysTickIntDisable(void);\r
+extern void SysTickPeriodSet(unsigned long ulPeriod);\r
+extern unsigned long SysTickPeriodGet(void);\r
+extern unsigned long SysTickValueGet(void);\r
+\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+\r
+#endif // __SYSTICK_H__\r

diff --git a/Demo/Common/drivers/LuminaryMicro/timer.h b/Demo/Common/drivers/LuminaryMicro/timer.h
new file mode 100644 (file)
index 0000000..0a0d545
--- /dev/null
+++ b/Demo/Common/drivers/LuminaryMicro/timer.h
@@ -0,0 +1,137 @@
+//*****************************************************************************\r
+//\r
+// timer.h - Prototypes for the timer module\r
+//\r
+// Copyright (c) 2005-2007 Luminary Micro, Inc.  All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1582 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+#ifndef __TIMER_H__\r
+#define __TIMER_H__\r
+\r
+#ifdef __cplusplus\r
+extern "C"\r
+{\r
+#endif\r
+\r
+//*****************************************************************************\r
+//\r
+// Values that can be passed to TimerConfigure as the ulConfig parameter.\r
+//\r
+//*****************************************************************************\r
+#define TIMER_CFG_32_BIT_OS     0x00000001  // 32-bit one-shot timer\r
+#define TIMER_CFG_32_BIT_PER    0x00000002  // 32-bit periodic timer\r
+#define TIMER_CFG_32_RTC        0x01000000  // 32-bit RTC timer\r
+#define TIMER_CFG_16_BIT_PAIR   0x04000000  // Two 16-bit timers\r
+#define TIMER_CFG_A_ONE_SHOT    0x00000001  // Timer A one-shot timer\r
+#define TIMER_CFG_A_PERIODIC    0x00000002  // Timer A periodic timer\r
+#define TIMER_CFG_A_CAP_COUNT   0x00000003  // Timer A event counter\r
+#define TIMER_CFG_A_CAP_TIME    0x00000007  // Timer A event timer\r
+#define TIMER_CFG_A_PWM         0x0000000A  // Timer A PWM output\r
+#define TIMER_CFG_B_ONE_SHOT    0x00000100  // Timer B one-shot timer\r
+#define TIMER_CFG_B_PERIODIC    0x00000200  // Timer B periodic timer\r
+#define TIMER_CFG_B_CAP_COUNT   0x00000300  // Timer B event counter\r
+#define TIMER_CFG_B_CAP_TIME    0x00000700  // Timer B event timer\r
+#define TIMER_CFG_B_PWM         0x00000A00  // Timer B PWM output\r
+\r
+//*****************************************************************************\r
+//\r
+// Values that can be passed to TimerIntEnable, TimerIntDisable, and\r
+// TimerIntClear as the ulIntFlags parameter, and returned from TimerIntStatus.\r
+//\r
+//*****************************************************************************\r
+#define TIMER_CAPB_EVENT        0x00000400  // CaptureB event interrupt\r
+#define TIMER_CAPB_MATCH        0x00000200  // CaptureB match interrupt\r
+#define TIMER_TIMB_TIMEOUT      0x00000100  // TimerB time out interrupt\r
+#define TIMER_RTC_MATCH         0x00000008  // RTC interrupt mask\r
+#define TIMER_CAPA_EVENT        0x00000004  // CaptureA event interrupt\r
+#define TIMER_CAPA_MATCH        0x00000002  // CaptureA match interrupt\r
+#define TIMER_TIMA_TIMEOUT      0x00000001  // TimerA time out interrupt\r
+\r
+//*****************************************************************************\r
+//\r
+// Values that can be passed to TimerControlEvent as the ulEvent parameter.\r
+//\r
+//*****************************************************************************\r
+#define TIMER_EVENT_POS_EDGE    0x00000000  // Count positive edges\r
+#define TIMER_EVENT_NEG_EDGE    0x00000404  // Count negative edges\r
+#define TIMER_EVENT_BOTH_EDGES  0x00000C0C  // Count both edges\r
+\r
+//*****************************************************************************\r
+//\r
+// Values that can be passed to most of the timer APIs as the ulTimer\r
+// parameter.\r
+//\r
+//*****************************************************************************\r
+#define TIMER_A                 0x000000ff  // Timer A\r
+#define TIMER_B                 0x0000ff00  // Timer B\r
+#define TIMER_BOTH              0x0000ffff  // Timer Both\r
+\r
+//*****************************************************************************\r
+//\r
+// Prototypes for the APIs.\r
+//\r
+//*****************************************************************************\r
+extern void TimerEnable(unsigned long ulBase, unsigned long ulTimer);\r
+extern void TimerDisable(unsigned long ulBase, unsigned long ulTimer);\r
+extern void TimerConfigure(unsigned long ulBase, unsigned long ulConfig);\r
+extern void TimerControlLevel(unsigned long ulBase, unsigned long ulTimer,\r
+                              tBoolean bInvert);\r
+extern void TimerControlTrigger(unsigned long ulBase, unsigned long ulTimer,\r
+                                tBoolean bEnable);\r
+extern void TimerControlEvent(unsigned long ulBase, unsigned long ulTimer,\r
+                              unsigned long ulEvent);\r
+extern void TimerControlStall(unsigned long ulBase, unsigned long ulTimer,\r
+                              tBoolean bStall);\r
+extern void TimerRTCEnable(unsigned long ulBase);\r
+extern void TimerRTCDisable(unsigned long ulBase);\r
+extern void TimerPrescaleSet(unsigned long ulBase, unsigned long ulTimer,\r
+                             unsigned long ulValue);\r
+extern unsigned long TimerPrescaleGet(unsigned long ulBase,\r
+                                      unsigned long ulTimer);\r
+extern void TimerPrescaleMatchSet(unsigned long ulBase, unsigned long ulTimer,\r
+                                  unsigned long ulValue);\r
+extern unsigned long TimerPrescaleMatchGet(unsigned long ulBase,\r
+                                           unsigned long ulTimer);\r
+extern void TimerLoadSet(unsigned long ulBase, unsigned long ulTimer,\r
+                         unsigned long ulValue);\r
+extern unsigned long TimerLoadGet(unsigned long ulBase, unsigned long ulTimer);\r
+extern unsigned long TimerValueGet(unsigned long ulBase,\r
+                                   unsigned long ulTimer);\r
+extern void TimerMatchSet(unsigned long ulBase, unsigned long ulTimer,\r
+                          unsigned long ulValue);\r
+extern unsigned long TimerMatchGet(unsigned long ulBase,\r
+                                   unsigned long ulTimer);\r
+extern void TimerIntRegister(unsigned long ulBase, unsigned long ulTimer,\r
+                             void (*pfnHandler)(void));\r
+extern void TimerIntUnregister(unsigned long ulBase, unsigned long ulTimer);\r
+extern void TimerIntEnable(unsigned long ulBase, unsigned long ulIntFlags);\r
+extern void TimerIntDisable(unsigned long ulBase, unsigned long ulIntFlags);\r
+extern unsigned long TimerIntStatus(unsigned long ulBase, tBoolean bMasked);\r
+extern void TimerIntClear(unsigned long ulBase, unsigned long ulIntFlags);\r
+extern void TimerQuiesce(unsigned long ulBase);\r
+\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+\r
+#endif // __TIMER_H__\r

diff --git a/Demo/Common/drivers/LuminaryMicro/uart.h b/Demo/Common/drivers/LuminaryMicro/uart.h
new file mode 100644 (file)
index 0000000..b8d2fea
--- /dev/null
+++ b/Demo/Common/drivers/LuminaryMicro/uart.h
@@ -0,0 +1,152 @@
+//*****************************************************************************\r
+//\r
+// uart.h - Defines and Macros for the UART.\r
+//\r
+// Copyright (c) 2005-2007 Luminary Micro, Inc.  All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1582 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+#ifndef __UART_H__\r
+#define __UART_H__\r
+\r
+#ifdef __cplusplus\r
+extern "C"\r
+{\r
+#endif\r
+\r
+//*****************************************************************************\r
+//\r
+// Values that can be passed to UARTIntEnable, UARTIntDisable, and UARTIntClear\r
+// as the ulIntFlags parameter, and returned from UARTIntStatus.\r
+//\r
+//*****************************************************************************\r
+#define UART_INT_OE             0x400       // Overrun Error Interrupt Mask\r
+#define UART_INT_BE             0x200       // Break Error Interrupt Mask\r
+#define UART_INT_PE             0x100       // Parity Error Interrupt Mask\r
+#define UART_INT_FE             0x080       // Framing Error Interrupt Mask\r
+#define UART_INT_RT             0x040       // Receive Timeout Interrupt Mask\r
+#define UART_INT_TX             0x020       // Transmit Interrupt Mask\r
+#define UART_INT_RX             0x010       // Receive Interrupt Mask\r
+\r
+//*****************************************************************************\r
+//\r
+// Values that can be passed to UARTConfigSetExpClk as the ulConfig parameter\r
+// and returned by UARTConfigGetExpClk in the pulConfig parameter.\r
+// Additionally, the UART_CONFIG_PAR_* subset can be passed to\r
+// UARTParityModeSet as the ulParity parameter, and are returned by\r
+// UARTParityModeGet.\r
+//\r
+//*****************************************************************************\r
+#define UART_CONFIG_WLEN_8      0x00000060  // 8 bit data\r
+#define UART_CONFIG_WLEN_7      0x00000040  // 7 bit data\r
+#define UART_CONFIG_WLEN_6      0x00000020  // 6 bit data\r
+#define UART_CONFIG_WLEN_5      0x00000000  // 5 bit data\r
+#define UART_CONFIG_STOP_ONE    0x00000000  // One stop bit\r
+#define UART_CONFIG_STOP_TWO    0x00000008  // Two stop bits\r
+#define UART_CONFIG_PAR_NONE    0x00000000  // No parity\r
+#define UART_CONFIG_PAR_EVEN    0x00000006  // Even parity\r
+#define UART_CONFIG_PAR_ODD     0x00000002  // Odd parity\r
+#define UART_CONFIG_PAR_ONE     0x00000086  // Parity bit is one\r
+#define UART_CONFIG_PAR_ZERO    0x00000082  // Parity bit is zero\r
+\r
+//*****************************************************************************\r
+//\r
+// Values that can be passed to UARTFIFOLevelSet as the ulTxLevel parameter and\r
+// returned by UARTFIFOLevelGet in the pulTxLevel.\r
+//\r
+//*****************************************************************************\r
+#define UART_FIFO_TX1_8         0x00000000  // Transmit interrupt at 1/8 Full\r
+#define UART_FIFO_TX2_8         0x00000001  // Transmit interrupt at 1/4 Full\r
+#define UART_FIFO_TX4_8         0x00000002  // Transmit interrupt at 1/2 Full\r
+#define UART_FIFO_TX6_8         0x00000003  // Transmit interrupt at 3/4 Full\r
+#define UART_FIFO_TX7_8         0x00000004  // Transmit interrupt at 7/8 Full\r
+\r
+//*****************************************************************************\r
+//\r
+// Values that can be passed to UARTFIFOLevelSet as the ulRxLevel parameter and\r
+// returned by UARTFIFOLevelGet in the pulRxLevel.\r
+//\r
+//*****************************************************************************\r
+#define UART_FIFO_RX1_8         0x00000000  // Receive interrupt at 1/8 Full\r
+#define UART_FIFO_RX2_8         0x00000008  // Receive interrupt at 1/4 Full\r
+#define UART_FIFO_RX4_8         0x00000010  // Receive interrupt at 1/2 Full\r
+#define UART_FIFO_RX6_8         0x00000018  // Receive interrupt at 3/4 Full\r
+#define UART_FIFO_RX7_8         0x00000020  // Receive interrupt at 7/8 Full\r
+\r
+//*****************************************************************************\r
+//\r
+// API Function prototypes\r
+//\r
+//*****************************************************************************\r
+extern void UARTParityModeSet(unsigned long ulBase, unsigned long ulParity);\r
+extern unsigned long UARTParityModeGet(unsigned long ulBase);\r
+extern void UARTFIFOLevelSet(unsigned long ulBase, unsigned long ulTxLevel,\r
+                             unsigned long ulRxLevel);\r
+extern void UARTFIFOLevelGet(unsigned long ulBase, unsigned long *pulTxLevel,\r
+                             unsigned long *pulRxLevel);\r
+extern void UARTConfigSetExpClk(unsigned long ulBase, unsigned long ulUARTClk,\r
+                                unsigned long ulBaud, unsigned long ulConfig);\r
+extern void UARTConfigGetExpClk(unsigned long ulBase, unsigned long ulUARTClk,\r
+                                unsigned long *pulBaud,\r
+                                unsigned long *pulConfig);\r
+extern void UARTEnable(unsigned long ulBase);\r
+extern void UARTDisable(unsigned long ulBase);\r
+extern void UARTEnableSIR(unsigned long ulBase, tBoolean bLowPower);\r
+extern void UARTDisableSIR(unsigned long ulBase);\r
+extern tBoolean UARTCharsAvail(unsigned long ulBase);\r
+extern tBoolean UARTSpaceAvail(unsigned long ulBase);\r
+extern long UARTCharGetNonBlocking(unsigned long ulBase);\r
+extern long UARTCharGet(unsigned long ulBase);\r
+extern tBoolean UARTCharPutNonBlocking(unsigned long ulBase,\r
+                                       unsigned char ucData);\r
+extern void UARTCharPut(unsigned long ulBase, unsigned char ucData);\r
+extern void UARTBreakCtl(unsigned long ulBase, tBoolean bBreakState);\r
+extern void UARTIntRegister(unsigned long ulBase, void(*pfnHandler)(void));\r
+extern void UARTIntUnregister(unsigned long ulBase);\r
+extern void UARTIntEnable(unsigned long ulBase, unsigned long ulIntFlags);\r
+extern void UARTIntDisable(unsigned long ulBase, unsigned long ulIntFlags);\r
+extern unsigned long UARTIntStatus(unsigned long ulBase, tBoolean bMasked);\r
+extern void UARTIntClear(unsigned long ulBase, unsigned long ulIntFlags);\r
+\r
+//*****************************************************************************\r
+//\r
+// Several UART APIs have been renamed, with the original function name being\r
+// deprecated.  These defines provide backward compatibility.\r
+//\r
+//*****************************************************************************\r
+#ifndef DEPRECATED\r
+#include "sysctl.h"\r
+#define UARTConfigSet(a, b, c)                         \\r
+        UARTConfigSetExpClk(a, SysCtlClockGet(), b, c)\r
+#define UARTConfigGet(a, b, c)                         \\r
+        UARTConfigGetExpClk(a, SysCtlClockGet(), b, c)\r
+#define UARTCharNonBlockingGet(a) \\r
+        UARTCharGetNonBlocking(a)\r
+#define UARTCharNonBlockingPut(a, b) \\r
+        UARTCharPutNonBlocking(a, b)\r
+#endif\r
+\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+\r
+#endif //  __UART_H__\r

diff --git a/Demo/Common/drivers/LuminaryMicro/ustdlib.c b/Demo/Common/drivers/LuminaryMicro/ustdlib.c
new file mode 100644 (file)
index 0000000..e68b143
--- /dev/null
+++ b/Demo/Common/drivers/LuminaryMicro/ustdlib.c
@@ -0,0 +1,670 @@
+//*****************************************************************************\r
+//\r
+// ustdlib.c - Simple standard library functions.\r
+//\r
+// Copyright (c) 2007 Luminary Micro, Inc.  All rights reserved.\r
+//\r
+// Software License Agreement\r
+//\r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+//\r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+//\r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+//\r
+//*****************************************************************************\r
+\r
+#include <stdarg.h>\r
+#include <string.h>\r
+#include "debug.h"\r
+\r
+//*****************************************************************************\r
+//\r
+//! \addtogroup utilities_api\r
+//! @{\r
+//\r
+//*****************************************************************************\r
+\r
+//*****************************************************************************\r
+//\r
+// A mapping from an integer between 0 and 15 to its ASCII character\r
+// equivalent.\r
+//\r
+//*****************************************************************************\r
+static const char * const g_pcHex = "0123456789abcdef";\r
+\r
+//*****************************************************************************\r
+//\r
+//! A simple vsnprintf function supporting \%c, \%d, \%s, \%u, \%x, and \%X.\r
+//!\r
+//! \param pcBuf points to the buffer where the converted string is stored.\r
+//! \param ulSize is the size of the buffer.\r
+//! \param pcString is the format string.\r
+//! \param vaArgP is the list of optional arguments, which depend on the\r
+//! contents of the format string.\r
+//!\r
+//! This function is very similar to the C library <tt>vsnprintf()</tt>\r
+//! function. Only the following formatting characters are supported:\r
+//!\r
+//! - \%c to print a character\r
+//! - \%d to print a decimal value\r
+//! - \%s to print a string\r
+//! - \%u to print an unsigned decimal value\r
+//! - \%x to print a hexadecimal value using lower case letters\r
+//! - \%X to print a hexadecimal value using lower case letters (not upper case\r
+//! letters as would typically be used)\r
+//! - \%\% to print out a \% character\r
+//!\r
+//! For \%d, \%u, \%x, and \%X, an optional number may reside between the \%\r
+//! and the format character, which specifies the minimum number of characters\r
+//! to use for that value; if preceeded by a 0 then the extra characters will\r
+//! be filled with zeros instead of spaces.  For example, ``\%8d'' will use\r
+//! eight characters to print the decimal value with spaces added to reach\r
+//! eight; ``\%08d'' will use eight characters as well but will add zeros\r
+//! instead of spaces.\r
+//!\r
+//! The type of the arguments after \b pcString must match the requirements of\r
+//! the format string.  For example, if an integer was passed where a string\r
+//! was expected, an error of some kind will most likely occur.\r
+//!\r
+//! The \b ulSize parameter limits the number of characters that will be\r
+//! stored in the buffer pointed to by \b pcBuf to prevent the possibility\r
+//! of a buffer overflow.  The buffer size should be large enough to hold\r
+//! the expected converted output string, including the null termination\r
+//! character.\r
+//!\r
+//! The function will return the number of characters that would be\r
+//! converted as if there were no limit on the buffer size.  Therefore\r
+//! it is possible for the function to return a count that is greater than\r
+//! the specified buffer size.  If this happens, it means that the output\r
+//! was truncated.\r
+//!\r
+//! \return the number of characters that were to be stored, not including\r
+//! the NULL termination character, regardless of space in the buffer.\r
+//\r
+//*****************************************************************************\r
+int\r
+uvsnprintf(char *pcBuf, unsigned long ulSize, const char *pcString,\r
+           va_list vaArgP)\r
+{\r
+    unsigned long ulIdx, ulValue, ulCount, ulBase;\r
+    char *pcStr, cFill;\r
+    int iConvertCount = 0;\r
+\r
+    //\r
+    // Check the arguments.\r
+    //\r
+    ASSERT(pcString != 0);\r
+    ASSERT(pcBuf != 0);\r
+    ASSERT(ulSize != 0);\r
+\r
+    //\r
+    // Adjust buffer size limit to allow one space for null termination.\r
+    //\r
+    if(ulSize)\r
+    {\r
+        ulSize--;\r
+    }\r
+\r
+    //\r
+    // Initialize the count of characters converted.\r
+    //\r
+    iConvertCount = 0;\r
+\r
+    //\r
+    // Loop while there are more characters in the format string.\r
+    //\r
+    while(*pcString)\r
+    {\r
+        //\r
+        // Find the first non-% character, or the end of the string.\r
+        //\r
+        for(ulIdx = 0; (pcString[ulIdx] != '%') && (pcString[ulIdx] != '\0');\r
+            ulIdx++)\r
+        {\r
+        }\r
+\r
+        //\r
+        // Write this portion of the string to the output buffer.  If\r
+        // there are more characters to write than there is space in the\r
+        // buffer, then only write as much as will fit in the buffer.\r
+        //\r
+        if(ulIdx > ulSize)\r
+        {\r
+            strncpy(pcBuf, pcString, ulSize);\r
+            pcBuf += ulSize;\r
+            ulSize = 0;\r
+        }\r
+        else\r
+        {\r
+            strncpy(pcBuf, pcString, ulIdx);\r
+            pcBuf += ulIdx;\r
+            ulSize -= ulIdx;\r
+        }\r
+\r
+        //\r
+        // Update the conversion count.  This will be the number of\r
+        // characters that should have been written, even if there was\r
+        // not room in the buffer.\r
+        //\r
+        iConvertCount += ulIdx;\r
+\r
+        //\r
+        // Skip the portion of the format string that was written.\r
+        //\r
+        pcString += ulIdx;\r
+\r
+        //\r
+        // See if the next character is a %.\r
+        //\r
+        if(*pcString == '%')\r
+        {\r
+            //\r
+            // Skip the %.\r
+            //\r
+            pcString++;\r
+\r
+            //\r
+            // Set the digit count to zero, and the fill character to space\r
+            // (i.e. to the defaults).\r
+            //\r
+            ulCount = 0;\r
+            cFill = ' ';\r
+\r
+            //\r
+            // It may be necessary to get back here to process more characters.\r
+            // Goto's aren't pretty, but effective.  I feel extremely dirty for\r
+            // using not one but two of the beasts.\r
+            //\r
+again:\r
+\r
+            //\r
+            // Determine how to handle the next character.\r
+            //\r
+            switch(*pcString++)\r
+            {\r
+                //\r
+                // Handle the digit characters.\r
+                //\r
+                case '0':\r
+                case '1':\r
+                case '2':\r
+                case '3':\r
+                case '4':\r
+                case '5':\r
+                case '6':\r
+                case '7':\r
+                case '8':\r
+                case '9':\r
+                {\r
+                    //\r
+                    // If this is a zero, and it is the first digit, then the\r
+                    // fill character is a zero instead of a space.\r
+                    //\r
+                    if((pcString[-1] == '0') && (ulCount == 0))\r
+                    {\r
+                        cFill = '0';\r
+                    }\r
+\r
+                    //\r
+                    // Update the digit count.\r
+                    //\r
+                    ulCount *= 10;\r
+                    ulCount += pcString[-1] - '0';\r
+\r
+                    //\r
+                    // Get the next character.\r
+                    //\r
+                    goto again;\r
+                }\r
+\r
+                //\r
+                // Handle the %c command.\r
+                //\r
+                case 'c':\r
+                {\r
+                    //\r
+                    // Get the value from the varargs.\r
+                    //\r
+                    ulValue = va_arg(vaArgP, unsigned long);\r
+\r
+                    //\r
+                    // Copy the character to the output buffer, if\r
+                    // there is room.  Update the buffer size remaining.\r
+                    //\r
+                    if(ulSize != 0)\r
+                    {\r
+                        *pcBuf++ = (char)ulValue;\r
+                        ulSize--;\r
+                    }\r
+\r
+                    //\r
+                    // Update the conversion count.\r
+                    //\r
+                    iConvertCount++;\r
+\r
+                    //\r
+                    // This command has been handled.\r
+                    //\r
+                    break;\r
+                }\r
+\r
+                //\r
+                // Handle the %d command.\r
+                //\r
+                case 'd':\r
+                {\r
+                    //\r
+                    // Get the value from the varargs.\r
+                    //\r
+                    ulValue = va_arg(vaArgP, unsigned long);\r
+\r
+                    //\r
+                    // If the value is negative, make it positive and stick a\r
+                    // minus sign in the beginning of the buffer.\r
+                    //\r
+                    if((long)ulValue < 0)\r
+                    {\r
+                        ulValue = -(long)ulValue;\r
+\r
+                        if(ulSize != 0)\r
+                        {\r
+                            *pcBuf++ = '-';\r
+                            ulSize--;\r
+                        }\r
+\r
+                        //\r
+                        // Update the conversion count.\r
+                        //\r
+                        iConvertCount++;\r
+                    }\r
+\r
+                    //\r
+                    // Set the base to 10.\r
+                    //\r
+                    ulBase = 10;\r
+\r
+                    //\r
+                    // Convert the value to ASCII.\r
+                    //\r
+                    goto convert;\r
+                }\r
+\r
+                //\r
+                // Handle the %s command.\r
+                //\r
+                case 's':\r
+                {\r
+                    //\r
+                    // Get the string pointer from the varargs.\r
+                    //\r
+                    pcStr = va_arg(vaArgP, char *);\r
+\r
+                    //\r
+                    // Determine the length of the string.\r
+                    //\r
+                    for(ulIdx = 0; pcStr[ulIdx] != '\0'; ulIdx++)\r
+                    {\r
+                    }\r
+\r
+                    //\r
+                    // Copy the string to the output buffer.  Only copy\r
+                    // as much as will fit in the buffer.  Update the\r
+                    // output buffer pointer and the space remaining.\r
+                    //\r
+                    if(ulIdx > ulSize)\r
+                    {\r
+                        strncpy(pcBuf, pcStr, ulSize);\r
+                        pcBuf += ulSize;\r
+                        ulSize = 0;\r
+                    }\r
+                    else\r
+                    {\r
+                        strncpy(pcBuf, pcStr, ulIdx);\r
+                        pcBuf += ulIdx;\r
+                        ulSize -= ulIdx;\r
+                    }\r
+\r
+                    //\r
+                    // Update the conversion count.  This will be the number of\r
+                    // characters that should have been written, even if there\r
+                    // was not room in the buffer.\r
+                    //\r
+                    iConvertCount += ulIdx;\r
+\r
+                    //\r
+                    //\r
+                    // This command has been handled.\r
+                    //\r
+                    break;\r
+                }\r
+\r
+                //\r
+                // Handle the %u command.\r
+                //\r
+                case 'u':\r
+                {\r
+                    //\r
+                    // Get the value from the varargs.\r
+                    //\r
+                    ulValue = va_arg(vaArgP, unsigned long);\r
+\r
+                    //\r
+                    // Set the base to 10.\r
+                    //\r
+                    ulBase = 10;\r
+\r
+                    //\r
+                    // Convert the value to ASCII.\r
+                    //\r
+                    goto convert;\r
+                }\r
+\r
+                //\r
+                // Handle the %x and %X commands.  Note that they are treated\r
+                // identically; i.e. %X will use lower case letters for a-f\r
+                // instead of the upper case letters is should use.\r
+                //\r
+                case 'x':\r
+                case 'X':\r
+                {\r
+                    //\r
+                    // Get the value from the varargs.\r
+                    //\r
+                    ulValue = va_arg(vaArgP, unsigned long);\r
+\r
+                    //\r
+                    // Set the base to 16.\r
+                    //\r
+                    ulBase = 16;\r
+\r
+                    //\r
+                    // Determine the number of digits in the string version of\r
+                    // the value.\r
+                    //\r
+convert:\r
+                    for(ulIdx = 1;\r
+                        (((ulIdx * ulBase) <= ulValue) &&\r
+                         (((ulIdx * ulBase) / ulBase) == ulIdx));\r
+                        ulIdx *= ulBase, ulCount--)\r
+                    {\r
+                    }\r
+\r
+                    //\r
+                    // Provide additional padding at the beginning of the\r
+                    // string conversion if needed.\r
+                    //\r
+                    if((ulCount > 1) && (ulCount < 16))\r
+                    {\r
+                        for(ulCount--; ulCount; ulCount--)\r
+                        {\r
+                            //\r
+                            // Copy the character to the output buffer if\r
+                            // there is room.\r
+                            //\r
+                            if(ulSize != 0)\r
+                            {\r
+                                *pcBuf++ = cFill;\r
+                                ulSize--;\r
+                            }\r
+\r
+                            //\r
+                            // Update the conversion count.\r
+                            //\r
+                            iConvertCount++;\r
+                        }\r
+                    }\r
+\r
+                    //\r
+                    // Convert the value into a string.\r
+                    //\r
+                    for(; ulIdx; ulIdx /= ulBase)\r
+                    {\r
+                        //\r
+                        // Copy the character to the output buffer if\r
+                        // there is room.\r
+                        //\r
+                        if(ulSize != 0)\r
+                        {\r
+                            *pcBuf++ = g_pcHex[(ulValue / ulIdx) % ulBase];\r
+                            ulSize--;\r
+                        }\r
+\r
+                        //\r
+                        // Update the conversion count.\r
+                        //\r
+                        iConvertCount++;\r
+                    }\r
+\r
+                    //\r
+                    // This command has been handled.\r
+                    //\r
+                    break;\r
+                }\r
+\r
+                //\r
+                // Handle the %% command.\r
+                //\r
+                case '%':\r
+                {\r
+                    //\r
+                    // Simply write a single %.\r
+                    //\r
+                    if(ulSize != 0)\r
+                    {\r
+                        *pcBuf++ = pcString[-1];\r
+                        ulSize--;\r
+                    }\r
+\r
+                    //\r
+                    // Update the conversion count.\r
+                    //\r
+                    iConvertCount++;\r
+\r
+                    //\r
+                    // This command has been handled.\r
+                    //\r
+                    break;\r
+                }\r
+\r
+                //\r
+                // Handle all other commands.\r
+                //\r
+                default:\r
+                {\r
+                    //\r
+                    // Indicate an error.\r
+                    //\r
+                    if(ulSize >= 5)\r
+                    {\r
+                        strncpy(pcBuf, "ERROR", 5);\r
+                        pcBuf += 5;\r
+                        ulSize -= 5;\r
+                    }\r
+                    else\r
+                    {\r
+                        strncpy(pcBuf, "ERROR", ulSize);\r
+                        pcBuf += ulSize;\r
+                        ulSize = 0;\r
+                    }\r
+\r
+                    //\r
+                    // Update the conversion count.\r
+                    //\r
+                    iConvertCount += 5;\r
+\r
+                    //\r
+                    // This command has been handled.\r
+                    //\r
+                    break;\r
+                }\r
+            }\r
+        }\r
+    }\r
+\r
+    //\r
+    // Null terminate the string in the buffer.\r
+    //\r
+    *pcBuf = 0;\r
+    return(iConvertCount);\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! A simple sprintf function supporting \%c, \%d, \%s, \%u, \%x, and \%X.\r
+//!\r
+//! \param pcBuf is the buffer where the converted string is stored.\r
+//! \param pcString is the format string.\r
+//! \param ... are the optional arguments, which depend on the contents of the\r
+//! format string.\r
+//!\r
+//! This function is very similar to the C library <tt>sprintf()</tt> function.\r
+//! Only the following formatting characters are supported:\r
+//!\r
+//! - \%c to print a character\r
+//! - \%d to print a decimal value\r
+//! - \%s to print a string\r
+//! - \%u to print an unsigned decimal value\r
+//! - \%x to print a hexadecimal value using lower case letters\r
+//! - \%X to print a hexadecimal value using lower case letters (not upper case\r
+//! letters as would typically be used)\r
+//! - \%\% to print out a \% character\r
+//!\r
+//! For \%d, \%u, \%x, and \%X, an optional number may reside between the \%\r
+//! and the format character, which specifies the minimum number of characters\r
+//! to use for that value; if preceeded by a 0 then the extra characters will\r
+//! be filled with zeros instead of spaces.  For example, ``\%8d'' will use\r
+//! eight characters to print the decimal value with spaces added to reach\r
+//! eight; ``\%08d'' will use eight characters as well but will add zeros\r
+//! instead of spaces.\r
+//!\r
+//! The type of the arguments after \b pcString must match the requirements of\r
+//! the format string.  For example, if an integer was passed where a string\r
+//! was expected, an error of some kind will most likely occur.\r
+//!\r
+//! The caller must ensure that the buffer pcBuf is large enough to hold the\r
+//! entire converted string, including the null termination character.\r
+//!\r
+//! \return The count of characters that were written to the output buffer,\r
+//! not including the NULL termination character.\r
+//\r
+//*****************************************************************************\r
+int\r
+usprintf(char *pcBuf, const char *pcString, ...)\r
+{\r
+    va_list vaArgP;\r
+    int iRet;\r
+\r
+    //\r
+    // Start the varargs processing.\r
+    //\r
+    va_start(vaArgP, pcString);\r
+\r
+    //\r
+    // Call vsnprintf to perform the conversion.  Use a\r
+    // large number for the buffer size.\r
+    //\r
+    iRet = uvsnprintf(pcBuf, 0xffff, pcString, vaArgP);\r
+\r
+    //\r
+    // End the varargs processing.\r
+    //\r
+    va_end(vaArgP);\r
+\r
+    //\r
+    // Return the conversion count.\r
+    //\r
+    return(iRet);\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! A simple snprintf function supporting \%c, \%d, \%s, \%u, \%x, and \%X.\r
+//!\r
+//! \param pcBuf is the buffer where the converted string is stored.\r
+//! \param ulSize is the size of the buffer.\r
+//! \param pcString is the format string.\r
+//! \param ... are the optional arguments, which depend on the contents of the\r
+//! format string.\r
+//!\r
+//! This function is very similar to the C library <tt>sprintf()</tt> function.\r
+//! Only the following formatting characters are supported:\r
+//!\r
+//! - \%c to print a character\r
+//! - \%d to print a decimal value\r
+//! - \%s to print a string\r
+//! - \%u to print an unsigned decimal value\r
+//! - \%x to print a hexadecimal value using lower case letters\r
+//! - \%X to print a hexadecimal value using lower case letters (not upper case\r
+//! letters as would typically be used)\r
+//! - \%\% to print out a \% character\r
+//!\r
+//! For \%d, \%u, \%x, and \%X, an optional number may reside between the \%\r
+//! and the format character, which specifies the minimum number of characters\r
+//! to use for that value; if preceeded by a 0 then the extra characters will\r
+//! be filled with zeros instead of spaces.  For example, ``\%8d'' will use\r
+//! eight characters to print the decimal value with spaces added to reach\r
+//! eight; ``\%08d'' will use eight characters as well but will add zeros\r
+//! instead of spaces.\r
+//!\r
+//! The type of the arguments after \b pcString must match the requirements of\r
+//! the format string.  For example, if an integer was passed where a string\r
+//! was expected, an error of some kind will most likely occur.\r
+//!\r
+//! The function will copy at most \b ulSize - 1 characters into the\r
+//! buffer \b pcBuf.  One space is reserved in the buffer for the null\r
+//! termination character.\r
+//!\r
+//! The function will return the number of characters that would be\r
+//! converted as if there were no limit on the buffer size.  Therefore\r
+//! it is possible for the function to return a count that is greater than\r
+//! the specified buffer size.  If this happens, it means that the output\r
+//! was truncated.\r
+//!\r
+//! \return the number of characters that were to be stored, not including\r
+//! the NULL termination character, regardless of space in the buffer.\r
+//\r
+//*****************************************************************************\r
+int\r
+usnprintf(char *pcBuf, unsigned long ulSize, const char *pcString, ...)\r
+{\r
+int iRet;\r
+\r
+    va_list vaArgP;\r
+\r
+    //\r
+    // Start the varargs processing.\r
+    //\r
+    va_start(vaArgP, pcString);\r
+\r
+    //\r
+    // Call vsnprintf to perform the conversion.\r
+    //\r
+    iRet = uvsnprintf(pcBuf, ulSize, pcString, vaArgP);\r
+\r
+    //\r
+    // End the varargs processing.\r
+    //\r
+    va_end(vaArgP);\r
+\r
+    //\r
+    // Return the conversion count.\r
+    //\r
+    return(iRet);\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+// Close the Doxygen group.\r
+//! @}\r
+//\r
+//*****************************************************************************\r

diff --git a/Demo/Common/drivers/LuminaryMicro/watchdog.h b/Demo/Common/drivers/LuminaryMicro/watchdog.h
new file mode 100644 (file)
index 0000000..f5e2272
--- /dev/null
+++ b/Demo/Common/drivers/LuminaryMicro/watchdog.h
@@ -0,0 +1,63 @@
+//*****************************************************************************\r
+//\r
+// watchdog.h - Prototypes for the Watchdog Timer API\r
+//\r
+// Copyright (c) 2005-2007 Luminary Micro, Inc.  All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws.  All rights are reserved.  Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1582 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+#ifndef __WATCHDOG_H__\r
+#define __WATCHDOG_H__\r
+\r
+#ifdef __cplusplus\r
+extern "C"\r
+{\r
+#endif\r
+\r
+//*****************************************************************************\r
+//\r
+// Prototypes for the APIs.\r
+//\r
+//*****************************************************************************\r
+extern tBoolean WatchdogRunning(unsigned long ulBase);\r
+extern void WatchdogEnable(unsigned long ulBase);\r
+extern void WatchdogResetEnable(unsigned long ulBase);\r
+extern void WatchdogResetDisable(unsigned long ulBase);\r
+extern void WatchdogLock(unsigned long ulBase);\r
+extern void WatchdogUnlock(unsigned long ulBase);\r
+extern tBoolean WatchdogLockState(unsigned long ulBase);\r
+extern void WatchdogReloadSet(unsigned long ulBase, unsigned long ulLoadVal);\r
+extern unsigned long WatchdogReloadGet(unsigned long ulBase);\r
+extern unsigned long WatchdogValueGet(unsigned long ulBase);\r
+extern void WatchdogIntRegister(unsigned long ulBase, void(*pfnHandler)(void));\r
+extern void WatchdogIntUnregister(unsigned long ulBase);\r
+extern void WatchdogIntEnable(unsigned long ulBase);\r
+extern unsigned long WatchdogIntStatus(unsigned long ulBase, tBoolean bMasked);\r
+extern void WatchdogIntClear(unsigned long ulBase);\r
+extern void WatchdogStallEnable(unsigned long ulBase);\r
+extern void WatchdogStallDisable(unsigned long ulBase);\r
+\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+\r
+#endif // __WATCHDOG_H__\r

diff --git a/Demo/Common/drivers/OpenOCD/license.txt b/Demo/Common/drivers/OpenOCD/license.txt
new file mode 100644 (file)
index 0000000..807ca86
--- /dev/null
+++ b/Demo/Common/drivers/OpenOCD/license.txt
@@ -0,0 +1,6 @@
+OpenOCD is open source software that is covered by the GNU General Public \r
+License (GPL).  \r
+\r
+Instructions on obtaining/downloading the source code along with the relevant\r
+Copyright information can be obtained from: http://openocd.berlios.de/web/\r
+\r

diff --git a/Demo/Common/drivers/OpenOCD/openocd-pp.exe b/Demo/Common/drivers/OpenOCD/openocd-pp.exe
new file mode 100644 (file)
index 0000000..be21612
Binary files /dev/null and b/Demo/Common/drivers/OpenOCD/openocd-pp.exe differ

diff --git a/Demo/Common/drivers/OpenOCD/openocd_ftdi.exe b/Demo/Common/drivers/OpenOCD/openocd_ftdi.exe
new file mode 100644 (file)
index 0000000..52fe9f7
Binary files /dev/null and b/Demo/Common/drivers/OpenOCD/openocd_ftdi.exe differ

diff --git a/Demo/Common/ethernet/lwIP/core/tcp_in.c b/Demo/Common/ethernet/lwIP/core/tcp_in.c
index fc79ae332cc0878d1c9dbeb1da05aa5eb9777e1e..f711266dc06f86d25a1c2f49f03cad477e92bb46 100644 (file)
--- a/Demo/Common/ethernet/lwIP/core/tcp_in.c
+++ b/Demo/Common/ethernet/lwIP/core/tcp_in.c
@@ -7,7 +7,7 @@
  *\r
  * These functions are generally called in the order (ip_input() ->)\r
  * tcp_input() -> * tcp_process() -> tcp_receive() (-> application).\r
- * \r
+ *\r
  */\r
 \r
 /*\r
@@ -165,7 +165,7 @@ tcp_input(struct pbuf *p, struct netif *inp)
      for an active connection. */\r
   prev = NULL;\r
 \r
-  \r
+\r
   for(pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) {\r
     LWIP_ASSERT("tcp_input: active pcb->state != CLOSED", pcb->state != CLOSED);\r
     LWIP_ASSERT("tcp_input: active pcb->state != TIME-WAIT", pcb->state != TIME_WAIT);\r
@@ -226,7 +226,7 @@ tcp_input(struct pbuf *p, struct netif *inp)
                 /* put this listening pcb at the head of the listening list */\r
           tcp_listen_pcbs.listen_pcbs = lpcb;\r
         }\r
-      \r
+\r
         LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: packed for LISTENing connection.\n"));\r
         tcp_listen_input(lpcb);\r
         pbuf_free(p);\r
@@ -288,12 +288,12 @@ tcp_input(struct pbuf *p, struct netif *inp)
         if (pcb->acked > 0) {\r
           TCP_EVENT_SENT(pcb, pcb->acked, err);\r
         }\r
-      \r
+\r
         if (recv_data != NULL) {\r
           /* Notify application that data has been received. */\r
           TCP_EVENT_RECV(pcb, recv_data, ERR_OK, err);\r
         }\r
-      \r
+\r
         /* If a FIN segment was received, we call the callback\r
            function with a NULL buffer to indicate EOF. */\r
         if (recv_flags & TF_GOT_FIN) {\r
@@ -318,7 +318,7 @@ tcp_input(struct pbuf *p, struct netif *inp)
     tcp_debug_print_state(pcb->state);\r
 #endif /* TCP_DEBUG */\r
 #endif /* TCP_INPUT_DEBUG */\r
-      \r
+\r
   } else {\r
 \r
     /* If no matching PCB was found, send a TCP RST (reset) to the\r
@@ -492,7 +492,7 @@ tcp_process(struct tcp_pcb *pcb)
       pcb->snd_wnd = tcphdr->wnd;\r
       pcb->snd_wl1 = seqno - 1; /* initialise to seqno - 1 to force window update */\r
       pcb->state = ESTABLISHED;\r
-      pcb->cwnd = pcb->mss;\r
+                       pcb->cwnd = ((pcb->cwnd == 1) ? (pcb->mss * 2) : pcb->mss);\r
       --pcb->snd_queuelen;\r
       LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_process: SYN-SENT --queuelen %"U16_F"\n", (u16_t)pcb->snd_queuelen));\r
       rseg = pcb->unacked;\r
@@ -519,6 +519,7 @@ tcp_process(struct tcp_pcb *pcb)
        !(flags & TCP_RST)) {\r
       /* expected ACK number? */\r
       if (TCP_SEQ_BETWEEN(ackno, pcb->lastack+1, pcb->snd_nxt)) {\r
+                               u16_t old_cwnd;\r
         pcb->state = ESTABLISHED;\r
         LWIP_DEBUGF(TCP_DEBUG, ("TCP connection established %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest));\r
 #if LWIP_CALLBACK_API\r
@@ -532,10 +533,11 @@ tcp_process(struct tcp_pcb *pcb)
           tcp_abort(pcb);\r
           return ERR_ABRT;\r
         }\r
+                               old_cwnd = pcb->cwnd;\r
         /* If there was any data contained within this ACK,\r
          * we'd better pass it on to the application as well. */\r
         tcp_receive(pcb);\r
-        pcb->cwnd = pcb->mss;\r
+                               pcb->cwnd = ((old_cwnd == 1) ? (pcb->mss * 2) : pcb->mss);\r
       }\r
       /* incorrect ACK number */\r
       else {\r
@@ -620,7 +622,7 @@ tcp_process(struct tcp_pcb *pcb)
  * If the incoming segment constitutes an ACK for a segment that was used for RTT\r
  * estimation, the RTT is estimated here as well.\r
  *\r
- * @return 1 if \r
+ * @return 1 if\r
  */\r
 \r
 static u8_t\r
@@ -698,7 +700,7 @@ tcp_receive(struct tcp_pcb *pcb)
         TCP_SEQ_LEQ(ackno, pcb->snd_max)) { */\r
       if (TCP_SEQ_BETWEEN(ackno, pcb->lastack+1, pcb->snd_max)){\r
       /* We come here when the ACK acknowledges new data. */\r
-      \r
+\r
       /* Reset the "IN Fast Retransmit" flag, since we are no longer\r
          in fast retransmit. Also reset the congestion window to the\r
          slow start threshold. */\r
@@ -871,7 +873,7 @@ tcp_receive(struct tcp_pcb *pcb)
          we do not want to discard the full contents of the pbuf up to\r
          the new starting point of the data since we have to keep the\r
          TCP header which is present in the first pbuf in the chain.\r
-         \r
+\r
          What is done is really quite a nasty hack: the first pbuf in\r
          the pbuf chain is pointed to by inseg.p. Since we need to be\r
          able to deallocate the whole pbuf, we cannot change this\r
@@ -881,11 +883,11 @@ tcp_receive(struct tcp_pcb *pcb)
          inseg.data pointer to point to the right place. This way, the\r
          ->p pointer will still point to the first pbuf, but the\r
          ->p->payload pointer will point to data in another pbuf.\r
-         \r
+\r
          After we are done with adjusting the pbuf pointers we must\r
          adjust the ->data pointer in the seg and the segment\r
          length.*/\r
-      \r
+\r
       off = pcb->rcv_nxt - seqno;\r
       p = inseg.p;\r
       LWIP_ASSERT("inseg.p != NULL", inseg.p);\r
@@ -914,7 +916,7 @@ tcp_receive(struct tcp_pcb *pcb)
       if (TCP_SEQ_LT(seqno, pcb->rcv_nxt)){\r
         /* the whole segment is < rcv_nxt */\r
         /* must be a duplicate of a packet that has already been correctly handled */\r
-        \r
+\r
         LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: duplicate seqno %"U32_F"\n", seqno));\r
         tcp_ack_now(pcb);\r
       }\r
@@ -927,7 +929,7 @@ tcp_receive(struct tcp_pcb *pcb)
       TCP_SEQ_LT(seqno, pcb->rcv_nxt + pcb->rcv_wnd)) {*/\r
     if (TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt, pcb->rcv_nxt + pcb->rcv_wnd - 1)){\r
       if (pcb->rcv_nxt == seqno) {\r
-        accepted_inseq = 1; \r
+        accepted_inseq = 1;\r
         /* The incoming segment is the next in sequence. We check if\r
            we have to trim the end of the segment and update rcv_nxt\r
            and pass the data to the application. */\r
@@ -1008,7 +1010,7 @@ tcp_receive(struct tcp_pcb *pcb)
             recv_flags = TF_GOT_FIN;\r
             if (pcb->state == ESTABLISHED) { /* force passive close or we can move to active close */\r
               pcb->state = CLOSE_WAIT;\r
-            } \r
+            }\r
           }\r
 \r
 \r
@@ -1088,7 +1090,7 @@ tcp_receive(struct tcp_pcb *pcb)
                   }\r
                   break;\r
                 }\r
-              } else \r
+              } else\r
                 /*if (TCP_SEQ_LT(prev->tcphdr->seqno, seqno) &&\r
                   TCP_SEQ_LT(seqno, next->tcphdr->seqno)) {*/\r
                 if(TCP_SEQ_BETWEEN(seqno, prev->tcphdr->seqno+1, next->tcphdr->seqno-1)){\r

diff --git a/Demo/Common/ethernet/uIP/uip-1.0/uip/uip.c b/Demo/Common/ethernet/uIP/uip-1.0/uip/uip.c
index e5854e99411301dfc8abf3dfda4e81ef978fb268..803ec5654c4a610bf3973bb1fdd35f24bb625d48 100644 (file)
--- a/Demo/Common/ethernet/uIP/uip-1.0/uip/uip.c
+++ b/Demo/Common/ethernet/uIP/uip-1.0/uip/uip.c
@@ -1163,7 +1163,7 @@ uip_process(u8_t flag)
   uip_ipaddr_copy(BUF->srcipaddr, uip_hostaddr);\r
   uip_ipaddr_copy(BUF->destipaddr, uip_udp_conn->ripaddr);\r
 \r
-  uip_appdata = &uip_buf[UIP_LLH_LEN + UIP_IPUDPH_LEN];\r
+  uip_appdata = &uip_buf[UIP_LLH_LEN + UIP_IPTCPH_LEN];\r
 \r
 #if UIP_UDP_CHECKSUMS\r
   /* Calculate UDP checksum. */\r

diff --git a/Demo/Common/include/BlockQ.h b/Demo/Common/include/BlockQ.h
index 07ef549150f2f5bae2bcfb163359a5b5caa7e868..90b2ab32811cc1926151480ea6cad69cdc1cb8e7 100644 (file)
--- a/Demo/Common/include/BlockQ.h
+++ b/Demo/Common/include/BlockQ.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Common/include/GenQTest.h b/Demo/Common/include/GenQTest.h
index 8adbb7b1341803262137d6c65501bf577ea8c07f..f6e1ce823466d4f6bfae906e4871a13d66dea4c8 100644 (file)
--- a/Demo/Common/include/GenQTest.h
+++ b/Demo/Common/include/GenQTest.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Common/include/PollQ.h b/Demo/Common/include/PollQ.h
index db7c5598a9a1f567272ea51e99e9e03318588c99..619a1438f4f08df1925c7410064949a3af4d6497 100644 (file)
--- a/Demo/Common/include/PollQ.h
+++ b/Demo/Common/include/PollQ.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Common/include/QPeek.h b/Demo/Common/include/QPeek.h
index 37e4a0e36183316a92f4c447ac50ae09cfd068c5..65a00b5d169b199140563c9c962bbda8e731d3e0 100644 (file)
--- a/Demo/Common/include/QPeek.h
+++ b/Demo/Common/include/QPeek.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Common/include/blocktim.h b/Demo/Common/include/blocktim.h
index a91811132042b832a77c256d32dfd539232b0ff3..84321f675d56dea73c4107c0e08269f60c149e4d 100644 (file)
--- a/Demo/Common/include/blocktim.h
+++ b/Demo/Common/include/blocktim.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Common/include/comtest.h b/Demo/Common/include/comtest.h
index d4e8a55f41a978820ce2a89a7615a0c44095c2d5..acecd157b73ddffce9e7b8698fb507fabcaac35a 100644 (file)
--- a/Demo/Common/include/comtest.h
+++ b/Demo/Common/include/comtest.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Common/include/comtest2.h b/Demo/Common/include/comtest2.h
index fc4ed411f0e362536c66049fc698665e3d334c8c..e23a95318e4146fbe5af773b84e73c8b1e5bc286 100644 (file)
--- a/Demo/Common/include/comtest2.h
+++ b/Demo/Common/include/comtest2.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Common/include/crflash.h b/Demo/Common/include/crflash.h
index 32e961ddad236012fa9b6dec93004c86f8d76b82..b9f6dd963a33b2c9889504a517b47e64db3e64ff 100644 (file)
--- a/Demo/Common/include/crflash.h
+++ b/Demo/Common/include/crflash.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Common/include/crhook.h b/Demo/Common/include/crhook.h
index bf3ac039a0f365cb958dd89428f01e7e2c1e08ef..ab1f81c3cb85bb3ceb74fb07091836cc73522c05 100644 (file)
--- a/Demo/Common/include/crhook.h
+++ b/Demo/Common/include/crhook.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Common/include/death.h b/Demo/Common/include/death.h
index 857b1052467b0160bc9c3936a5c46b784dd23059..6b9657c8bb79bc89ec24c79fc7e6602e09457e89 100644 (file)
--- a/Demo/Common/include/death.h
+++ b/Demo/Common/include/death.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Common/include/dynamic.h b/Demo/Common/include/dynamic.h
index 51d744dd3a0213892570cb473da71eca6065c9da..944fcf6e105ad41abcc75fba5b148a45c0a371f6 100644 (file)
--- a/Demo/Common/include/dynamic.h
+++ b/Demo/Common/include/dynamic.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Common/include/fileIO.h b/Demo/Common/include/fileIO.h
index 3629b1cafd0d1f1a817ab4ff1bd0d33f59fc66f7..916c65db111a99360bd5b27e33abab3effeb7132 100644 (file)
--- a/Demo/Common/include/fileIO.h
+++ b/Demo/Common/include/fileIO.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Common/include/flash.h b/Demo/Common/include/flash.h
index 4219c08b059055af926e20aa0495be091f48b9c0..f2776d1e25a732eb812af0bebdcba49685edd9fd 100644 (file)
--- a/Demo/Common/include/flash.h
+++ b/Demo/Common/include/flash.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Common/include/flop.h b/Demo/Common/include/flop.h
index 9aec76fc29a3503745a9583c12d51aea0ccd8988..82ab146bd8a1506bb73bf28bc78a77dde0c892d5 100644 (file)
--- a/Demo/Common/include/flop.h
+++ b/Demo/Common/include/flop.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Common/include/integer.h b/Demo/Common/include/integer.h
index ceec5663d273b16973bbd0cb578169a1883dc60d..a87c826d699466ba5d69dd85b4c13b61c874752e 100644 (file)
--- a/Demo/Common/include/integer.h
+++ b/Demo/Common/include/integer.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Common/include/mevents.h b/Demo/Common/include/mevents.h
index adad8b240fbe3dceadb2c8bd67e148ea8fc973c2..b313519f381cc095508ce2fac73fa4b2b492da53 100644 (file)
--- a/Demo/Common/include/mevents.h
+++ b/Demo/Common/include/mevents.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Common/include/partest.h b/Demo/Common/include/partest.h
index 4c651c6955871e6a336a208f70f146b212bef581..274cb65a95f541cc086acf1a70dbfec5e9969388 100644 (file)
--- a/Demo/Common/include/partest.h
+++ b/Demo/Common/include/partest.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Common/include/print.h b/Demo/Common/include/print.h
index 0f5b4bef09d43c4869bb070da91a8417a9fd07df..9b86b573108a8bcaff6b352a4799279925387c98 100644 (file)
--- a/Demo/Common/include/print.h
+++ b/Demo/Common/include/print.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Common/include/semtest.h b/Demo/Common/include/semtest.h
index 51a2792d45329204b317e1bfa4e99e881e3fcbd9..fc997db6f678a136a4de5bb3884a620ebe27ba51 100644 (file)
--- a/Demo/Common/include/semtest.h
+++ b/Demo/Common/include/semtest.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Common/include/serial.h b/Demo/Common/include/serial.h
index 7b162acaf769bfd3b5d7af2537073d38bb2b715a..ff42aa9b3d451b205c5b173cdaa7963c8a9d4e27 100644 (file)
--- a/Demo/Common/include/serial.h
+++ b/Demo/Common/include/serial.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Cygnal/FreeRTOSConfig.h b/Demo/Cygnal/FreeRTOSConfig.h
index f5ab93d08d972d7c9654561aee0b9c729c941eba..ba8c26252fe490b105b37fed5844e2dd41307701 100644 (file)
--- a/Demo/Cygnal/FreeRTOSConfig.h
+++ b/Demo/Cygnal/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Cygnal/Makefile b/Demo/Cygnal/Makefile
index 46c2378c72e0488a7f65693c2406878e9e1e3220..a1dbebfbf4529b8cc913512fd49baf9742365c8f 100644 (file)
--- a/Demo/Cygnal/Makefile
+++ b/Demo/Cygnal/Makefile
@@ -1,4 +1,4 @@
-#      FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+#      FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 #\r
 #      This file is part of the FreeRTOS.org distribution.\r
 #\r

diff --git a/Demo/Cygnal/ParTest/ParTest.c b/Demo/Cygnal/ParTest/ParTest.c
index 90dbb115c716c133a797a1eb28bf0b2966ba5615..9cc437c338599b3b1481db237ed67a8890d83d9e 100644 (file)
--- a/Demo/Cygnal/ParTest/ParTest.c
+++ b/Demo/Cygnal/ParTest/ParTest.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Cygnal/main.c b/Demo/Cygnal/main.c
index a8356aaeee1caf1513e17b1f119f1e4f104e4b3c..73843b946d9bca38a83f38033b4a5a7ab50beb87 100644 (file)
--- a/Demo/Cygnal/main.c
+++ b/Demo/Cygnal/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Cygnal/serial/serial.c b/Demo/Cygnal/serial/serial.c
index c0634eef4a8f79cbf3aea2315ebc77acd38774ed..b3f6cdc1251f9e5213c8246e4ccd86cc8b0c96f9 100644 (file)
--- a/Demo/Cygnal/serial/serial.c
+++ b/Demo/Cygnal/serial/serial.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Flshlite/FRConfig.h b/Demo/Flshlite/FRConfig.h
index c4cbf923b2cc2ebf34f4ad8b992ebcd056a65e7e..19340ff1cb3a2d9fc0a661dbd4169d05e4f45cc8 100644 (file)
--- a/Demo/Flshlite/FRConfig.h
+++ b/Demo/Flshlite/FRConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Flshlite/FileIO/fileIO.c b/Demo/Flshlite/FileIO/fileIO.c
index dc24e60eafdd9ffacb770e2e01e4691238ca61e4..7626d9f8e7671940de0790bea29e256466d5f43d 100644 (file)
--- a/Demo/Flshlite/FileIO/fileIO.c
+++ b/Demo/Flshlite/FileIO/fileIO.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Flshlite/FreeRTOSConfig.h b/Demo/Flshlite/FreeRTOSConfig.h
index 0d582eb16d2497aaa27f3b9e737aa9af01d849c0..d8b92ba6a51b19aeb94f5464b6a24955b18e47a2 100644 (file)
--- a/Demo/Flshlite/FreeRTOSConfig.h
+++ b/Demo/Flshlite/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Flshlite/ParTest/ParTest.c b/Demo/Flshlite/ParTest/ParTest.c
index 08bb6ecb4448ccbb302cb90b3f4019966c270cf6..3e8c811cc9e1a3f661c8c6605156881fba35b066 100644 (file)
--- a/Demo/Flshlite/ParTest/ParTest.c
+++ b/Demo/Flshlite/ParTest/ParTest.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Flshlite/main.c b/Demo/Flshlite/main.c
index d3da49001e9919a5a4a71a5772fbbfc8eb69ae9c..487e680e8ddc804f6c227d8aa5136ebce512bb90 100644 (file)
--- a/Demo/Flshlite/main.c
+++ b/Demo/Flshlite/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/Flshlite/serial/serial.c b/Demo/Flshlite/serial/serial.c
index 1af1480249e79155c805bcb9c46425a21d44bcce..dc86bfc9b905267f30b0ca29c3f58ecaf1c93949 100644 (file)
--- a/Demo/Flshlite/serial/serial.c
+++ b/Demo/Flshlite/serial/serial.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/H8S/RTOSDemo/FreeRTOSConfig.h b/Demo/H8S/RTOSDemo/FreeRTOSConfig.h
index f6fd84686d64ee8aac4d4dbb50c042ed9d32b96d..2d1b271a0a812e32f16eabeec198af594c9a2764 100644 (file)
--- a/Demo/H8S/RTOSDemo/FreeRTOSConfig.h
+++ b/Demo/H8S/RTOSDemo/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/H8S/RTOSDemo/ParTest/ParTest.c b/Demo/H8S/RTOSDemo/ParTest/ParTest.c
index 0b00ca26bb528e095b1dd83c1b79bc41550f5583..b03f8bae74ac75ef51501ee2b2cdaa4d72a3173c 100644 (file)
--- a/Demo/H8S/RTOSDemo/ParTest/ParTest.c
+++ b/Demo/H8S/RTOSDemo/ParTest/ParTest.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/H8S/RTOSDemo/main.c b/Demo/H8S/RTOSDemo/main.c
index d5b695965a6ae7588b73abc92464c93a69ac09ef..a69c3681d8efdaedf6e6638405931b4d607aa22f 100644 (file)
--- a/Demo/H8S/RTOSDemo/main.c
+++ b/Demo/H8S/RTOSDemo/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/H8S/RTOSDemo/serial/serial.c b/Demo/H8S/RTOSDemo/serial/serial.c
index ddc80e5bd05354659342768db580dde223d8c190..cd8638577d144f564cb15f0d23aa61ee8532dd7c 100644 (file)
--- a/Demo/H8S/RTOSDemo/serial/serial.c
+++ b/Demo/H8S/RTOSDemo/serial/serial.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/HCS12_CodeWarrior_banked/FreeRTOSConfig.h b/Demo/HCS12_CodeWarrior_banked/FreeRTOSConfig.h
index ccdc47593e460cae75fa55189b81ea96279312f2..5f2b95c8098a1d08f6d108d189a5519bc456be32 100644 (file)
--- a/Demo/HCS12_CodeWarrior_banked/FreeRTOSConfig.h
+++ b/Demo/HCS12_CodeWarrior_banked/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/HCS12_CodeWarrior_banked/ParTest/ParTest.c b/Demo/HCS12_CodeWarrior_banked/ParTest/ParTest.c
index 752b8fa3680702c749cf339e1bcda11600ac5059..45d877cadc9f3de493d9edd8689c9436706225a3 100644 (file)
--- a/Demo/HCS12_CodeWarrior_banked/ParTest/ParTest.c
+++ b/Demo/HCS12_CodeWarrior_banked/ParTest/ParTest.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/HCS12_CodeWarrior_banked/main.c b/Demo/HCS12_CodeWarrior_banked/main.c
index 78dcd5a704ed2960a9c6dce8ec14399a61cc777a..b7d1dd0a06f3d72218bfc37edb6658c65c757c66 100644 (file)
--- a/Demo/HCS12_CodeWarrior_banked/main.c
+++ b/Demo/HCS12_CodeWarrior_banked/main.c
@@ -1,6 +1,6 @@
 \r
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/HCS12_CodeWarrior_banked/serial/serial.c b/Demo/HCS12_CodeWarrior_banked/serial/serial.c
index cb9405fe4e181557ffaeeb567787d372f6b252b4..d04f487713a7040b55b4c88ed18a1aa50e5bcbfe 100644 (file)
--- a/Demo/HCS12_CodeWarrior_banked/serial/serial.c
+++ b/Demo/HCS12_CodeWarrior_banked/serial/serial.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/HCS12_CodeWarrior_small/FreeRTOSConfig.h b/Demo/HCS12_CodeWarrior_small/FreeRTOSConfig.h
index 2a4ce02c1c3e02bfd19218bde2f799053bd41a13..cfc0b7c4aa6d5d3ed2d9d77b08354a47d2dfc10a 100644 (file)
--- a/Demo/HCS12_CodeWarrior_small/FreeRTOSConfig.h
+++ b/Demo/HCS12_CodeWarrior_small/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/HCS12_CodeWarrior_small/ParTest/ParTest.c b/Demo/HCS12_CodeWarrior_small/ParTest/ParTest.c
index 752b8fa3680702c749cf339e1bcda11600ac5059..45d877cadc9f3de493d9edd8689c9436706225a3 100644 (file)
--- a/Demo/HCS12_CodeWarrior_small/ParTest/ParTest.c
+++ b/Demo/HCS12_CodeWarrior_small/ParTest/ParTest.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/HCS12_CodeWarrior_small/main.c b/Demo/HCS12_CodeWarrior_small/main.c
index 79c7d1171ab00b0e80af7910ae86d8c6c950535e..d9a558181504514193712a35c1e2c5c65d58fd61 100644 (file)
--- a/Demo/HCS12_CodeWarrior_small/main.c
+++ b/Demo/HCS12_CodeWarrior_small/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/HCS12_CodeWarrior_small/serial/serial.c b/Demo/HCS12_CodeWarrior_small/serial/serial.c
index 937e4bee17c27b326d1132121c96331e2e84416b..fdfbf3a89809d98a4b84f94049a7f4ca83fc4422 100644 (file)
--- a/Demo/HCS12_CodeWarrior_small/serial/serial.c
+++ b/Demo/HCS12_CodeWarrior_small/serial/serial.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/HCS12_GCC_banked/FreeRTOSConfig.h b/Demo/HCS12_GCC_banked/FreeRTOSConfig.h
index e25ced9bde4116f5af19dc7308baec756bf09a3e..50872a8a94d60485006b31554b4bbf66b4ab805f 100644 (file)
--- a/Demo/HCS12_GCC_banked/FreeRTOSConfig.h
+++ b/Demo/HCS12_GCC_banked/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/HCS12_GCC_banked/ParTest.c b/Demo/HCS12_GCC_banked/ParTest.c
index 241220ef56d11f2a50faae14664a729208b39ec0..c04fb493df99d9fc0a3b7d8f886cfff54fe80437 100644 (file)
--- a/Demo/HCS12_GCC_banked/ParTest.c
+++ b/Demo/HCS12_GCC_banked/ParTest.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/HCS12_GCC_banked/main.c b/Demo/HCS12_GCC_banked/main.c
index 7ace08dd2d0dafb1c5b29df03b1ab34205666bf4..f02dc2b013dd9ff8bef6334fe97bdd523c4d320f 100644 (file)
--- a/Demo/HCS12_GCC_banked/main.c
+++ b/Demo/HCS12_GCC_banked/main.c
@@ -1,6 +1,6 @@
 \r
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/HCS12_GCC_banked/startup.c b/Demo/HCS12_GCC_banked/startup.c
index e750a989eea094b62eefb720f5c30e9e2e17d48a..5fb00949e6aabe75e4e39c2691a3b5ca6b35aa9f 100644 (file)
--- a/Demo/HCS12_GCC_banked/startup.c
+++ b/Demo/HCS12_GCC_banked/startup.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/MicroBlaze/FreeRTOSConfig.h b/Demo/MicroBlaze/FreeRTOSConfig.h
index 463ab2ded121e37edc769b8e4299cd5d4fb0e4ad..c29cd8a67e9fec58aacb0e965626bb082c58a7a0 100644 (file)
--- a/Demo/MicroBlaze/FreeRTOSConfig.h
+++ b/Demo/MicroBlaze/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/MicroBlaze/ParTest/ParTest.c b/Demo/MicroBlaze/ParTest/ParTest.c
index 1b69e5bfefc2078287540ccc5d291b7ffa0a346c..251935f87a3771c0050c13b0fe1e7c844ff1fec9 100644 (file)
--- a/Demo/MicroBlaze/ParTest/ParTest.c
+++ b/Demo/MicroBlaze/ParTest/ParTest.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/MicroBlaze/main.c b/Demo/MicroBlaze/main.c
index 3810d994f3b05635f2b7519d726131741e4e6121..00fa07192f83d62e7391c571d5baf6936a2037ee 100644 (file)
--- a/Demo/MicroBlaze/main.c
+++ b/Demo/MicroBlaze/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/MicroBlaze/serial/serial.c b/Demo/MicroBlaze/serial/serial.c
index 879dc936535d0aa59a21f693a79a7437a77360dd..ac776e9837b66a9e9e8f0cabefe57c9cbe63440a 100644 (file)
--- a/Demo/MicroBlaze/serial/serial.c
+++ b/Demo/MicroBlaze/serial/serial.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PC/FRConfig.h b/Demo/PC/FRConfig.h
index 882699a5e8c932574fbd95a592d01e4c9d64e97f..a3d48277cbd269ec7c32d2ac954ab33236c41f13 100644 (file)
--- a/Demo/PC/FRConfig.h
+++ b/Demo/PC/FRConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PC/FileIO/fileIO.c b/Demo/PC/FileIO/fileIO.c
index f5a90596be02a5d037a784657352b11d7780c6d9..cdcee8286571f8f664c075856eb16483997ea252 100644 (file)
--- a/Demo/PC/FileIO/fileIO.c
+++ b/Demo/PC/FileIO/fileIO.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PC/FreeRTOSConfig.h b/Demo/PC/FreeRTOSConfig.h
index 97eb232d3ee0168f4a08f20865fcb684bd1c43b7..864f05183e2408e807ef306781d0a69d623c6cf7 100644 (file)
--- a/Demo/PC/FreeRTOSConfig.h
+++ b/Demo/PC/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PC/ParTest/ParTest.c b/Demo/PC/ParTest/ParTest.c
index 28788984fcb979c2902ba7934b0bbcfa8c7d5a46..ea0b2ca533132c708ad35340c70329487e006f81 100644 (file)
--- a/Demo/PC/ParTest/ParTest.c
+++ b/Demo/PC/ParTest/ParTest.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PC/main.c b/Demo/PC/main.c
index dfac727b7db78629747d1dc6e0a61ff7de91b115..7155609cd2b5d4fbc03c3477f3f0b1a62be3fd00 100644 (file)
--- a/Demo/PC/main.c
+++ b/Demo/PC/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PC/serial/serial.c b/Demo/PC/serial/serial.c
index b8625d7249a39cdffc336ff1f5ee946e555aea15..8c481c72a1bf619729ff9748867543dedbfa6a45 100644 (file)
--- a/Demo/PC/serial/serial.c
+++ b/Demo/PC/serial/serial.c
@@ -5,7 +5,7 @@
        http://dzcomm.sourceforge.net\r
 \r
 \r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC18_MPLAB/FreeRTOSConfig.h b/Demo/PIC18_MPLAB/FreeRTOSConfig.h
index 3f6669e11e6c38bebc95df3076c124890cf00c63..9ac2ddd498e798f510cef50166b12676048c1d0c 100644 (file)
--- a/Demo/PIC18_MPLAB/FreeRTOSConfig.h
+++ b/Demo/PIC18_MPLAB/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC18_MPLAB/ParTest/ParTest.c b/Demo/PIC18_MPLAB/ParTest/ParTest.c
index c64b084669c21fe2221be2d7c12d7fcee96efa85..d48ccbbcd2dae748fdd057c0c7de1c221305b324 100644 (file)
--- a/Demo/PIC18_MPLAB/ParTest/ParTest.c
+++ b/Demo/PIC18_MPLAB/ParTest/ParTest.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC18_MPLAB/main1.c b/Demo/PIC18_MPLAB/main1.c
index 67f3ccfdfde86c37e585b31558b20ab82edd6d3d..282147d2a61cbb60977c41d6d1a175abaa3e96a0 100644 (file)
--- a/Demo/PIC18_MPLAB/main1.c
+++ b/Demo/PIC18_MPLAB/main1.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC18_MPLAB/main2.c b/Demo/PIC18_MPLAB/main2.c
index 730c68cbe52013ac2970ccbd14a3997b1d663525..04c69bd3f9c27023f59fcf6d0f46ed2b3f3a80f9 100644 (file)
--- a/Demo/PIC18_MPLAB/main2.c
+++ b/Demo/PIC18_MPLAB/main2.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC18_MPLAB/main3.c b/Demo/PIC18_MPLAB/main3.c
index 287905e3e5dd3a0d6629d214182efc2b262ec49e..d7c37e10fd33716c6ef54226680ca3c5ecba98b9 100644 (file)
--- a/Demo/PIC18_MPLAB/main3.c
+++ b/Demo/PIC18_MPLAB/main3.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC18_MPLAB/serial/serial.c b/Demo/PIC18_MPLAB/serial/serial.c
index 149935b636a5aedb9c0a5ae60ed17542b4f7dd06..218dcea1f33ce9c9f1df0ac3294145200f19ade8 100644 (file)
--- a/Demo/PIC18_MPLAB/serial/serial.c
+++ b/Demo/PIC18_MPLAB/serial/serial.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC18_WizC/Demo1/FreeRTOSConfig.h b/Demo/PIC18_WizC/Demo1/FreeRTOSConfig.h
index 8d4da23161ad211e980fcc1d112f105d04d0d68c..aea0be78074c9cff81ff662692ee9b7f85b2633f 100644 (file)
--- a/Demo/PIC18_WizC/Demo1/FreeRTOSConfig.h
+++ b/Demo/PIC18_WizC/Demo1/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC18_WizC/Demo1/WIZCmake.h b/Demo/PIC18_WizC/Demo1/WIZCmake.h
index 73fce2663a003b56b3e1a6bd403aad256f1fe7f4..4b860096c3bc5c07fad4a8ee4b816681d436a390 100644 (file)
--- a/Demo/PIC18_WizC/Demo1/WIZCmake.h
+++ b/Demo/PIC18_WizC/Demo1/WIZCmake.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC18_WizC/Demo1/fuses.c b/Demo/PIC18_WizC/Demo1/fuses.c
index b11c5728a7ffc4e9244c3fe76d25d681135e4673..98a481fd6c64462308ade4429d75e76e21e86e03 100644 (file)
--- a/Demo/PIC18_WizC/Demo1/fuses.c
+++ b/Demo/PIC18_WizC/Demo1/fuses.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC18_WizC/Demo1/interrupt.c b/Demo/PIC18_WizC/Demo1/interrupt.c
index 7e7bdd422524fce1796b014fa980f4dfd8df350b..0cd55eed39dacdf351bb1f36a684cdb77cd7e10e 100644 (file)
--- a/Demo/PIC18_WizC/Demo1/interrupt.c
+++ b/Demo/PIC18_WizC/Demo1/interrupt.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC18_WizC/Demo1/main.c b/Demo/PIC18_WizC/Demo1/main.c
index 7b3c672d0a0e20ba46cb6fdbdb96aa7007a9f06d..e330ca5cf702b66426596930ce4c9cac1dde658e 100644 (file)
--- a/Demo/PIC18_WizC/Demo1/main.c
+++ b/Demo/PIC18_WizC/Demo1/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC18_WizC/Demo2/FreeRTOSConfig.h b/Demo/PIC18_WizC/Demo2/FreeRTOSConfig.h
index 27e03ecec9fb180fa05306cb1b549f0689c26f4a..7c1032267aebafcfbc3d316d1a95528eccd9f29a 100644 (file)
--- a/Demo/PIC18_WizC/Demo2/FreeRTOSConfig.h
+++ b/Demo/PIC18_WizC/Demo2/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC18_WizC/Demo2/WIZCmake.h b/Demo/PIC18_WizC/Demo2/WIZCmake.h
index 95ff08075e199f27e680d127f01a8d1a761026ff..6708296afd399e91f3b3a470304befdd6a01b8ed 100644 (file)
--- a/Demo/PIC18_WizC/Demo2/WIZCmake.h
+++ b/Demo/PIC18_WizC/Demo2/WIZCmake.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC18_WizC/Demo2/fuses.c b/Demo/PIC18_WizC/Demo2/fuses.c
index b11c5728a7ffc4e9244c3fe76d25d681135e4673..98a481fd6c64462308ade4429d75e76e21e86e03 100644 (file)
--- a/Demo/PIC18_WizC/Demo2/fuses.c
+++ b/Demo/PIC18_WizC/Demo2/fuses.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC18_WizC/Demo2/interrupt.c b/Demo/PIC18_WizC/Demo2/interrupt.c
index 0d041217bf9a399d77233489c6d5b8a1879a1080..8838172521a77282c81cb29cd7ecd87c12bbd9dc 100644 (file)
--- a/Demo/PIC18_WizC/Demo2/interrupt.c
+++ b/Demo/PIC18_WizC/Demo2/interrupt.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC18_WizC/Demo2/main.c b/Demo/PIC18_WizC/Demo2/main.c
index 59209a0ca0e2b3e1d1fdb5de5ee84a326a6ca168..af9e1856c09176e619888060d16ed783eae8935f 100644 (file)
--- a/Demo/PIC18_WizC/Demo2/main.c
+++ b/Demo/PIC18_WizC/Demo2/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC18_WizC/Demo3/FreeRTOSConfig.h b/Demo/PIC18_WizC/Demo3/FreeRTOSConfig.h
index ae5444597c4c1c9a9ca0539b2eeb5e844af1b2ea..23d95060f1a7a9971a48ca72714936fb86dd0e5c 100644 (file)
--- a/Demo/PIC18_WizC/Demo3/FreeRTOSConfig.h
+++ b/Demo/PIC18_WizC/Demo3/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC18_WizC/Demo3/WIZCmake.h b/Demo/PIC18_WizC/Demo3/WIZCmake.h
index 95ff08075e199f27e680d127f01a8d1a761026ff..6708296afd399e91f3b3a470304befdd6a01b8ed 100644 (file)
--- a/Demo/PIC18_WizC/Demo3/WIZCmake.h
+++ b/Demo/PIC18_WizC/Demo3/WIZCmake.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC18_WizC/Demo3/fuses.c b/Demo/PIC18_WizC/Demo3/fuses.c
index b11c5728a7ffc4e9244c3fe76d25d681135e4673..98a481fd6c64462308ade4429d75e76e21e86e03 100644 (file)
--- a/Demo/PIC18_WizC/Demo3/fuses.c
+++ b/Demo/PIC18_WizC/Demo3/fuses.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC18_WizC/Demo3/interrupt.c b/Demo/PIC18_WizC/Demo3/interrupt.c
index 0d041217bf9a399d77233489c6d5b8a1879a1080..8838172521a77282c81cb29cd7ecd87c12bbd9dc 100644 (file)
--- a/Demo/PIC18_WizC/Demo3/interrupt.c
+++ b/Demo/PIC18_WizC/Demo3/interrupt.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC18_WizC/Demo3/main.c b/Demo/PIC18_WizC/Demo3/main.c
index cd83baec61d58dc28722365c44699b103f4b6da8..9bb3d1900911d6b1d8e9ec87e603c7ffbd4af447 100644 (file)
--- a/Demo/PIC18_WizC/Demo3/main.c
+++ b/Demo/PIC18_WizC/Demo3/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC18_WizC/Demo4/FreeRTOSConfig.h b/Demo/PIC18_WizC/Demo4/FreeRTOSConfig.h
index e05eef2055779c1322d434cc66fc275dd0d28c13..1cdf1882b3a06949ba2bcf08d4bb1195f1a35229 100644 (file)
--- a/Demo/PIC18_WizC/Demo4/FreeRTOSConfig.h
+++ b/Demo/PIC18_WizC/Demo4/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC18_WizC/Demo4/WIZCmake.h b/Demo/PIC18_WizC/Demo4/WIZCmake.h
index 95ff08075e199f27e680d127f01a8d1a761026ff..6708296afd399e91f3b3a470304befdd6a01b8ed 100644 (file)
--- a/Demo/PIC18_WizC/Demo4/WIZCmake.h
+++ b/Demo/PIC18_WizC/Demo4/WIZCmake.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC18_WizC/Demo4/fuses.c b/Demo/PIC18_WizC/Demo4/fuses.c
index b11c5728a7ffc4e9244c3fe76d25d681135e4673..98a481fd6c64462308ade4429d75e76e21e86e03 100644 (file)
--- a/Demo/PIC18_WizC/Demo4/fuses.c
+++ b/Demo/PIC18_WizC/Demo4/fuses.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC18_WizC/Demo4/interrupt.c b/Demo/PIC18_WizC/Demo4/interrupt.c
index 0d041217bf9a399d77233489c6d5b8a1879a1080..8838172521a77282c81cb29cd7ecd87c12bbd9dc 100644 (file)
--- a/Demo/PIC18_WizC/Demo4/interrupt.c
+++ b/Demo/PIC18_WizC/Demo4/interrupt.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC18_WizC/Demo4/main.c b/Demo/PIC18_WizC/Demo4/main.c
index 107379a24ec5e8559e3909930885a69e50ac7105..1ac60e96758730c7d597507435d8ae9e62d2d3d4 100644 (file)
--- a/Demo/PIC18_WizC/Demo4/main.c
+++ b/Demo/PIC18_WizC/Demo4/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC18_WizC/Demo5/FreeRTOSConfig.h b/Demo/PIC18_WizC/Demo5/FreeRTOSConfig.h
index 052a37acb8eafbc219dc3c07ce43e2bc77b7bae0..ccde6d1f5291fe63beb53d51bd86435efb36032f 100644 (file)
--- a/Demo/PIC18_WizC/Demo5/FreeRTOSConfig.h
+++ b/Demo/PIC18_WizC/Demo5/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC18_WizC/Demo5/WIZCmake.h b/Demo/PIC18_WizC/Demo5/WIZCmake.h
index 95ff08075e199f27e680d127f01a8d1a761026ff..6708296afd399e91f3b3a470304befdd6a01b8ed 100644 (file)
--- a/Demo/PIC18_WizC/Demo5/WIZCmake.h
+++ b/Demo/PIC18_WizC/Demo5/WIZCmake.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC18_WizC/Demo5/fuses.c b/Demo/PIC18_WizC/Demo5/fuses.c
index b11c5728a7ffc4e9244c3fe76d25d681135e4673..98a481fd6c64462308ade4429d75e76e21e86e03 100644 (file)
--- a/Demo/PIC18_WizC/Demo5/fuses.c
+++ b/Demo/PIC18_WizC/Demo5/fuses.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC18_WizC/Demo5/interrupt.c b/Demo/PIC18_WizC/Demo5/interrupt.c
index 0d041217bf9a399d77233489c6d5b8a1879a1080..8838172521a77282c81cb29cd7ecd87c12bbd9dc 100644 (file)
--- a/Demo/PIC18_WizC/Demo5/interrupt.c
+++ b/Demo/PIC18_WizC/Demo5/interrupt.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC18_WizC/Demo5/main.c b/Demo/PIC18_WizC/Demo5/main.c
index d317c0479b7d1eca13b6acd46a40e894125e9b07..b7565f7a81650c1faa06f4c427d2747d413ca105 100644 (file)
--- a/Demo/PIC18_WizC/Demo5/main.c
+++ b/Demo/PIC18_WizC/Demo5/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC18_WizC/Demo6/FreeRTOSConfig.h b/Demo/PIC18_WizC/Demo6/FreeRTOSConfig.h
index f82e1281587930158d950ec25d097c105149061f..4f277c194fc77772c1afe24d679283c4adff696e 100644 (file)
--- a/Demo/PIC18_WizC/Demo6/FreeRTOSConfig.h
+++ b/Demo/PIC18_WizC/Demo6/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC18_WizC/Demo6/WIZCmake.h b/Demo/PIC18_WizC/Demo6/WIZCmake.h
index 95ff08075e199f27e680d127f01a8d1a761026ff..6708296afd399e91f3b3a470304befdd6a01b8ed 100644 (file)
--- a/Demo/PIC18_WizC/Demo6/WIZCmake.h
+++ b/Demo/PIC18_WizC/Demo6/WIZCmake.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC18_WizC/Demo6/fuses.c b/Demo/PIC18_WizC/Demo6/fuses.c
index b11c5728a7ffc4e9244c3fe76d25d681135e4673..98a481fd6c64462308ade4429d75e76e21e86e03 100644 (file)
--- a/Demo/PIC18_WizC/Demo6/fuses.c
+++ b/Demo/PIC18_WizC/Demo6/fuses.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC18_WizC/Demo6/interrupt.c b/Demo/PIC18_WizC/Demo6/interrupt.c
index 0d041217bf9a399d77233489c6d5b8a1879a1080..8838172521a77282c81cb29cd7ecd87c12bbd9dc 100644 (file)
--- a/Demo/PIC18_WizC/Demo6/interrupt.c
+++ b/Demo/PIC18_WizC/Demo6/interrupt.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC18_WizC/Demo6/main.c b/Demo/PIC18_WizC/Demo6/main.c
index b6777a3c060ede79ef7ced3cad4d8ec232404241..053683c16fb6a98c99ab8ea1994ad8637de86641 100644 (file)
--- a/Demo/PIC18_WizC/Demo6/main.c
+++ b/Demo/PIC18_WizC/Demo6/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC18_WizC/Demo7/FreeRTOSConfig.h b/Demo/PIC18_WizC/Demo7/FreeRTOSConfig.h
index 88a5a0c59d5a78a67f33491bca2b56cf700e9ab2..199d4d625a3f516830d44f09c3709fe3affb3cb4 100644 (file)
--- a/Demo/PIC18_WizC/Demo7/FreeRTOSConfig.h
+++ b/Demo/PIC18_WizC/Demo7/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC18_WizC/Demo7/WIZCmake.h b/Demo/PIC18_WizC/Demo7/WIZCmake.h
index 95ff08075e199f27e680d127f01a8d1a761026ff..6708296afd399e91f3b3a470304befdd6a01b8ed 100644 (file)
--- a/Demo/PIC18_WizC/Demo7/WIZCmake.h
+++ b/Demo/PIC18_WizC/Demo7/WIZCmake.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC18_WizC/Demo7/fuses.c b/Demo/PIC18_WizC/Demo7/fuses.c
index b11c5728a7ffc4e9244c3fe76d25d681135e4673..98a481fd6c64462308ade4429d75e76e21e86e03 100644 (file)
--- a/Demo/PIC18_WizC/Demo7/fuses.c
+++ b/Demo/PIC18_WizC/Demo7/fuses.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC18_WizC/Demo7/interrupt.c b/Demo/PIC18_WizC/Demo7/interrupt.c
index 0d041217bf9a399d77233489c6d5b8a1879a1080..8838172521a77282c81cb29cd7ecd87c12bbd9dc 100644 (file)
--- a/Demo/PIC18_WizC/Demo7/interrupt.c
+++ b/Demo/PIC18_WizC/Demo7/interrupt.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC18_WizC/Demo7/main.c b/Demo/PIC18_WizC/Demo7/main.c
index 32f8c8c680a6f4ab2824142aa913151c873e8a2e..4d0573890bb8e0a3b6700a754ff76f71d991c6b3 100644 (file)
--- a/Demo/PIC18_WizC/Demo7/main.c
+++ b/Demo/PIC18_WizC/Demo7/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC18_WizC/ParTest/ParTest.c b/Demo/PIC18_WizC/ParTest/ParTest.c
index e93c40d6641948301275f8997db6a0352baced55..bc20679c345dbf80d673a4161a771beeb20297a6 100644 (file)
--- a/Demo/PIC18_WizC/ParTest/ParTest.c
+++ b/Demo/PIC18_WizC/ParTest/ParTest.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC18_WizC/serial/isrSerialRx.c b/Demo/PIC18_WizC/serial/isrSerialRx.c
index cec6e6555d69d18ae4a6b14a84387ad91c11f581..cf63e5193cf1a18c7fe99b2d7c9336065544521d 100644 (file)
--- a/Demo/PIC18_WizC/serial/isrSerialRx.c
+++ b/Demo/PIC18_WizC/serial/isrSerialRx.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC18_WizC/serial/isrSerialTx.c b/Demo/PIC18_WizC/serial/isrSerialTx.c
index f32098d4b8444ba3bc14e10eb4075d0e8e2d2e2b..e0c75ec2ae39eba91e3c420eb3d99fb82f822a82 100644 (file)
--- a/Demo/PIC18_WizC/serial/isrSerialTx.c
+++ b/Demo/PIC18_WizC/serial/isrSerialTx.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC18_WizC/serial/serial.c b/Demo/PIC18_WizC/serial/serial.c
index 2b2671b6c44506f0415e1da695fdafeaa2ca4b30..502248da180ddb2454142d2fa54eca344c9d2c1d 100644 (file)
--- a/Demo/PIC18_WizC/serial/serial.c
+++ b/Demo/PIC18_WizC/serial/serial.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC24_MPLAB/FreeRTOSConfig.h b/Demo/PIC24_MPLAB/FreeRTOSConfig.h
index 1434007f6dc88b6468ccc85f18613d252ac486dc..43f5ce268b7a97abe42d18df095b6572050200eb 100644 (file)
--- a/Demo/PIC24_MPLAB/FreeRTOSConfig.h
+++ b/Demo/PIC24_MPLAB/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC24_MPLAB/ParTest/ParTest.c b/Demo/PIC24_MPLAB/ParTest/ParTest.c
index 1e76f4dd2dc4d887dffab52cf7b232f639cd67ec..01df18b93b50c35afe37d127bd24e7830c856006 100644 (file)
--- a/Demo/PIC24_MPLAB/ParTest/ParTest.c
+++ b/Demo/PIC24_MPLAB/ParTest/ParTest.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC24_MPLAB/lcd.c b/Demo/PIC24_MPLAB/lcd.c
index 2885fbfd3051f22cd4757a7f9e6c6515f8534f49..8d03097026df480a92b4a5bc38a9bf5ee35bd8c8 100644 (file)
--- a/Demo/PIC24_MPLAB/lcd.c
+++ b/Demo/PIC24_MPLAB/lcd.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC24_MPLAB/lcd.h b/Demo/PIC24_MPLAB/lcd.h
index 50ef9daf68892935e0d66db61819472d57b105d8..becebb1a493226cba5f96d417dd6bb6bdbf6351d 100644 (file)
--- a/Demo/PIC24_MPLAB/lcd.h
+++ b/Demo/PIC24_MPLAB/lcd.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC24_MPLAB/main.c b/Demo/PIC24_MPLAB/main.c
index 2b5fda792a082430c8ef24d31fcbbd4c967d8acf..4e995ca7d3baa38630d06d22fde4dc460faf8d04 100644 (file)
--- a/Demo/PIC24_MPLAB/main.c
+++ b/Demo/PIC24_MPLAB/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC24_MPLAB/serial/serial.c b/Demo/PIC24_MPLAB/serial/serial.c
index 0f1a8d1a4a089b6dad61a5f62f357247317a5e81..e9d9901c9aec365c7d29bfda25a5fbf359ade271 100644 (file)
--- a/Demo/PIC24_MPLAB/serial/serial.c
+++ b/Demo/PIC24_MPLAB/serial/serial.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC24_MPLAB/timertest.c b/Demo/PIC24_MPLAB/timertest.c
index cca0eb3ffbba9aa8167f27620ee3a6f47d496351..ea2016b28364a218bc6484b7192dde4872ab599d 100644 (file)
--- a/Demo/PIC24_MPLAB/timertest.c
+++ b/Demo/PIC24_MPLAB/timertest.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/PIC24_MPLAB/timertest.h b/Demo/PIC24_MPLAB/timertest.h
index 45da869595055d8b319334cac9e69745d0388131..10f1913e47523255ef687161510b2e9255356c1b 100644 (file)
--- a/Demo/PIC24_MPLAB/timertest.h
+++ b/Demo/PIC24_MPLAB/timertest.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/WizNET_DEMO_GCC_ARM7/FreeRTOSConfig.h b/Demo/WizNET_DEMO_GCC_ARM7/FreeRTOSConfig.h
index e13d6013be360a0e146b21fd77330989fc79f3f6..b51ba1da4c0527f590a3f34d57b2b994f45e16f9 100644 (file)
--- a/Demo/WizNET_DEMO_GCC_ARM7/FreeRTOSConfig.h
+++ b/Demo/WizNET_DEMO_GCC_ARM7/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/WizNET_DEMO_GCC_ARM7/HTTP_Serv.c b/Demo/WizNET_DEMO_GCC_ARM7/HTTP_Serv.c
index 4a8fd937595b9b2064a72dd3a117754e9192c96e..69bbbf2ee262624415583a3560e383c3ee407bf8 100644 (file)
--- a/Demo/WizNET_DEMO_GCC_ARM7/HTTP_Serv.c
+++ b/Demo/WizNET_DEMO_GCC_ARM7/HTTP_Serv.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/WizNET_DEMO_GCC_ARM7/HTTP_Serv.h b/Demo/WizNET_DEMO_GCC_ARM7/HTTP_Serv.h
index 88f394d5021171f1f1db97b07ca8f1be3c82933f..77d4425901cd8536e37ffd99a7295dd2b42fef8a 100644 (file)
--- a/Demo/WizNET_DEMO_GCC_ARM7/HTTP_Serv.h
+++ b/Demo/WizNET_DEMO_GCC_ARM7/HTTP_Serv.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/WizNET_DEMO_GCC_ARM7/Makefile b/Demo/WizNET_DEMO_GCC_ARM7/Makefile
index c2884f6fb65be82d235a20c34ccf6df3cd235540..c5ffc150bafeaa0c2031aad052d2b2fe4ce307fa 100644 (file)
--- a/Demo/WizNET_DEMO_GCC_ARM7/Makefile
+++ b/Demo/WizNET_DEMO_GCC_ARM7/Makefile
@@ -1,4 +1,4 @@
-#      FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+#      FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 #\r
 #      This file is part of the FreeRTOS.org distribution.\r
 #\r

diff --git a/Demo/WizNET_DEMO_GCC_ARM7/TCP.c b/Demo/WizNET_DEMO_GCC_ARM7/TCP.c
index 290f8ab62ecdd7d9c9bb8298ca42180542972575..c1639b0799413d5e0ca33e00ac1e1a7a0871e372 100644 (file)
--- a/Demo/WizNET_DEMO_GCC_ARM7/TCP.c
+++ b/Demo/WizNET_DEMO_GCC_ARM7/TCP.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/WizNET_DEMO_GCC_ARM7/TCP.h b/Demo/WizNET_DEMO_GCC_ARM7/TCP.h
index 23239550c49b42c1ba8d8fa64b0e731f3fb02b2b..2aa7bf30ad210f8d7790d3889a707a86954e86d2 100644 (file)
--- a/Demo/WizNET_DEMO_GCC_ARM7/TCP.h
+++ b/Demo/WizNET_DEMO_GCC_ARM7/TCP.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/WizNET_DEMO_GCC_ARM7/TCPISR.c b/Demo/WizNET_DEMO_GCC_ARM7/TCPISR.c
index 4bba80fb282a9c8585546ed7515f8ebca3372013..4779a8add9b42aacb8e90994b64da0d6c39207aa 100644 (file)
--- a/Demo/WizNET_DEMO_GCC_ARM7/TCPISR.c
+++ b/Demo/WizNET_DEMO_GCC_ARM7/TCPISR.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/WizNET_DEMO_GCC_ARM7/html_pages.h b/Demo/WizNET_DEMO_GCC_ARM7/html_pages.h
index 7fc159f4a800984d90a71690693ba38fadaf16ad..38919c04a4363994d5aec3d0217353e9a813ec13 100644 (file)
--- a/Demo/WizNET_DEMO_GCC_ARM7/html_pages.h
+++ b/Demo/WizNET_DEMO_GCC_ARM7/html_pages.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/WizNET_DEMO_GCC_ARM7/i2c.c b/Demo/WizNET_DEMO_GCC_ARM7/i2c.c
index 690325f22838c94241061bd56ac37b06def59fd8..19cd69da011074a547be3e3a38e1493628238eda 100644 (file)
--- a/Demo/WizNET_DEMO_GCC_ARM7/i2c.c
+++ b/Demo/WizNET_DEMO_GCC_ARM7/i2c.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/WizNET_DEMO_GCC_ARM7/i2c.h b/Demo/WizNET_DEMO_GCC_ARM7/i2c.h
index 3ef3699da26d52a287024f7c762ac78a548fa1b3..3b6492fef7a2a1733031e3c02c951faa11998090 100644 (file)
--- a/Demo/WizNET_DEMO_GCC_ARM7/i2c.h
+++ b/Demo/WizNET_DEMO_GCC_ARM7/i2c.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/WizNET_DEMO_GCC_ARM7/i2cISR.c b/Demo/WizNET_DEMO_GCC_ARM7/i2cISR.c
index 96f31b1addb4c3692e8a12075d4958bb707ff055..e0a97497a71a675bdd7d99fe6bfe84146ebb1588 100644 (file)
--- a/Demo/WizNET_DEMO_GCC_ARM7/i2cISR.c
+++ b/Demo/WizNET_DEMO_GCC_ARM7/i2cISR.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/WizNET_DEMO_GCC_ARM7/main.c b/Demo/WizNET_DEMO_GCC_ARM7/main.c
index 1a513d1d456b779f062808b5ac5d1319dc6ddfe0..6daafd56b487b10b65e9910acdbd4ada02d4d448 100644 (file)
--- a/Demo/WizNET_DEMO_GCC_ARM7/main.c
+++ b/Demo/WizNET_DEMO_GCC_ARM7/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/WizNET_DEMO_TERN_186/FreeRTOSConfig.h b/Demo/WizNET_DEMO_TERN_186/FreeRTOSConfig.h
index da186932fa47687e14036372d088e22b0dc21838..6ddf854f95cafc18fc8bc718acdc28a47b9a8846 100644 (file)
--- a/Demo/WizNET_DEMO_TERN_186/FreeRTOSConfig.h
+++ b/Demo/WizNET_DEMO_TERN_186/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/WizNET_DEMO_TERN_186/HTTPTask.c b/Demo/WizNET_DEMO_TERN_186/HTTPTask.c
index 1cfbc7f84f8dd18f241e80d63b13ea5f1a5a181b..92085ddb6badd80e834f14bf4da812e36c8de4a0 100644 (file)
--- a/Demo/WizNET_DEMO_TERN_186/HTTPTask.c
+++ b/Demo/WizNET_DEMO_TERN_186/HTTPTask.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/WizNET_DEMO_TERN_186/HTTPTask.h b/Demo/WizNET_DEMO_TERN_186/HTTPTask.h
index ff7da18c3db8bd209626cff20eceed95de026028..77655a7c8e1f7c1d4399490b1cc51f3378bc3c93 100644 (file)
--- a/Demo/WizNET_DEMO_TERN_186/HTTPTask.h
+++ b/Demo/WizNET_DEMO_TERN_186/HTTPTask.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/WizNET_DEMO_TERN_186/main.c b/Demo/WizNET_DEMO_TERN_186/main.c
index 6cee79d95b77be76408a187298773ad228b0024f..2d02507d9fb0a538169ced4a1ac9272e856d9772 100644 (file)
--- a/Demo/WizNET_DEMO_TERN_186/main.c
+++ b/Demo/WizNET_DEMO_TERN_186/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/WizNET_DEMO_TERN_186/serial/serial.c b/Demo/WizNET_DEMO_TERN_186/serial/serial.c
index a16e5568a5c3c215deea9444369ee1192852747f..73caa02b58648f507327dfce9074fee0c73fce46 100644 (file)
--- a/Demo/WizNET_DEMO_TERN_186/serial/serial.c
+++ b/Demo/WizNET_DEMO_TERN_186/serial/serial.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/dsPIC_MPLAB/FreeRTOSConfig.h b/Demo/dsPIC_MPLAB/FreeRTOSConfig.h
index dd74cb62bef3c4aa037731ffa740a4d7c6dec532..3f333adb9bef212ad2ac1c8355bd15cf60542efb 100644 (file)
--- a/Demo/dsPIC_MPLAB/FreeRTOSConfig.h
+++ b/Demo/dsPIC_MPLAB/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/dsPIC_MPLAB/ParTest/ParTest.c b/Demo/dsPIC_MPLAB/ParTest/ParTest.c
index d20eabb6b9e1c548fea27f796ebd953b07f59a01..6b2dbee1961c979bdb096c97abaf09067a5712e0 100644 (file)
--- a/Demo/dsPIC_MPLAB/ParTest/ParTest.c
+++ b/Demo/dsPIC_MPLAB/ParTest/ParTest.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/dsPIC_MPLAB/lcd.c b/Demo/dsPIC_MPLAB/lcd.c
index 4cdbee3c4ad8fa89a22e02832219315536e91e3b..edaac01870c0199523162e8dfb2cdfe782d335e9 100644 (file)
--- a/Demo/dsPIC_MPLAB/lcd.c
+++ b/Demo/dsPIC_MPLAB/lcd.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/dsPIC_MPLAB/lcd.h b/Demo/dsPIC_MPLAB/lcd.h
index 50ef9daf68892935e0d66db61819472d57b105d8..becebb1a493226cba5f96d417dd6bb6bdbf6351d 100644 (file)
--- a/Demo/dsPIC_MPLAB/lcd.h
+++ b/Demo/dsPIC_MPLAB/lcd.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/dsPIC_MPLAB/main.c b/Demo/dsPIC_MPLAB/main.c
index 2b5fda792a082430c8ef24d31fcbbd4c967d8acf..4e995ca7d3baa38630d06d22fde4dc460faf8d04 100644 (file)
--- a/Demo/dsPIC_MPLAB/main.c
+++ b/Demo/dsPIC_MPLAB/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/dsPIC_MPLAB/serial/serial.c b/Demo/dsPIC_MPLAB/serial/serial.c
index ecbdd23f7908df356bffe95e0b43027aab0f05c1..47f7f6eff6ecd24260d75bea9c130fc9b3af096a 100644 (file)
--- a/Demo/dsPIC_MPLAB/serial/serial.c
+++ b/Demo/dsPIC_MPLAB/serial/serial.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/dsPIC_MPLAB/timertest.c b/Demo/dsPIC_MPLAB/timertest.c
index cca0eb3ffbba9aa8167f27620ee3a6f47d496351..ea2016b28364a218bc6484b7192dde4872ab599d 100644 (file)
--- a/Demo/dsPIC_MPLAB/timertest.c
+++ b/Demo/dsPIC_MPLAB/timertest.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/dsPIC_MPLAB/timertest.h b/Demo/dsPIC_MPLAB/timertest.h
index 45da869595055d8b319334cac9e69745d0388131..10f1913e47523255ef687161510b2e9255356c1b 100644 (file)
--- a/Demo/dsPIC_MPLAB/timertest.h
+++ b/Demo/dsPIC_MPLAB/timertest.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/lwIP_AVR32_UC3/AT32UC3A/GCC/Makefile b/Demo/lwIP_AVR32_UC3/AT32UC3A/GCC/Makefile
index 55ee8bc9a3767a84f2f828a00e12a37ecdba604c..6f51ddb103528a38e9fb66f18ea698f47ec8c7fc 100644 (file)
--- a/Demo/lwIP_AVR32_UC3/AT32UC3A/GCC/Makefile
+++ b/Demo/lwIP_AVR32_UC3/AT32UC3A/GCC/Makefile
@@ -69,7 +69,6 @@ LastWord  = $(if $(1),$(word $(words $(1)),$(1)))
 MAKE      = make
 MAKECFG   = config.mk
 TGTTYPE   = $(suffix $(TARGET))
-TGTFILE   = $(PART)-$(TARGET)
 
 RM        = rm -Rf
 
@@ -99,14 +98,14 @@ LOADLIBES =
 LDLIBS    = $(LIBS:%=-l%)
 
 OBJDUMP   = avr32-objdump
-LSS       = $(TGTFILE:$(TGTTYPE)=.lss)
+LSS       = $(TARGET:$(TGTTYPE)=.lss)
 
 NM        = avr32-nm
-SYM       = $(TGTFILE:$(TGTTYPE)=.sym)
+SYM       = $(TARGET:$(TGTTYPE)=.sym)
 
 OBJCOPY   = avr32-objcopy
-HEX       = $(TGTFILE:$(TGTTYPE)=.hex)
-BIN       = $(TGTFILE:$(TGTTYPE)=.bin)
+HEX       = $(TARGET:$(TGTTYPE)=.hex)
+BIN       = $(TARGET:$(TGTTYPE)=.bin)
 
 SIZE      = avr32-size
 
@@ -142,7 +141,7 @@ MSG_GETTING_CPU_INFO  = Getting CPU information.
 MSG_HALTING           = Stopping CPU execution.
 MSG_ERASING_CHIP      = Performing a JTAG Chip Erase command.
 MSG_ERASING           = Performing a flash chip erase.
-MSG_PROGRAMMING       = Programming MCU memory from \`$(TGTFILE)\'.
+MSG_PROGRAMMING       = Programming MCU memory from \`$(TARGET)\'.
 MSG_SECURING_FLASH    = Protecting chip by setting security bit.
 MSG_RESETTING         = Resetting MCU.
 MSG_DEBUGGING         = Opening debug connection with MCU.
@@ -182,7 +181,7 @@ clean:
        -$(VERBOSE_CMD)$(RM) $(HEX)
        -$(VERBOSE_CMD)$(RM) $(SYM)
        -$(VERBOSE_CMD)$(RM) $(LSS)
-       -$(VERBOSE_CMD)$(RM) $(TGTFILE)
+       -$(VERBOSE_CMD)$(RM) $(TARGET)
        -$(VERBOSE_CMD)$(RM) $(OBJFILES)
        -$(VERBOSE_CMD)$(RM) $(ASFILES)
        -$(VERBOSE_CMD)$(RM) $(CPPFILES)
@@ -215,12 +214,12 @@ objfiles: $(OBJFILES)
 ifeq ($(TGTTYPE),.a)
 # Archive: create A output file from object files.
 .PHONY: a
-a: $(TGTFILE)
+a: $(TARGET)
 else
 ifeq ($(TGTTYPE),.elf)
 # Link: create ELF output file from object files.
 .PHONY: elf
-elf: $(TGTFILE)
+elf: $(TARGET)
 endif
 endif
 
@@ -246,7 +245,7 @@ endif
 
 # Display target size information.
 .PHONY: sizes
-sizes: $(TGTFILE)
+sizes: $(TARGET)
        @echo
        @echo
 ifeq ($(TGTTYPE),.a)
@@ -334,7 +333,7 @@ endif
 program: all
        @echo
        @echo $(MSG_PROGRAMMING)
-       $(VERBOSE_CMD)$(PROGRAM) program $(FLASH:%=-f%) $(PROG_CLOCK:%=-c%) -e -v -R $(if $(findstring run,$(MAKECMDGOALS)),-r) $(TGTFILE)
+       $(VERBOSE_CMD)$(PROGRAM) program $(FLASH:%=-f%) $(PROG_CLOCK:%=-c%) -e -v -R $(if $(findstring run,$(MAKECMDGOALS)),-r) $(TARGET)
 ifneq ($(call LastWord,$(filter cpuinfo chiperase program secureflash debug readregs,$(MAKECMDGOALS))),program)
        @$(SLEEP) $(SLEEPUSB)
 else
@@ -430,7 +429,7 @@ endif
 program: all
        @echo
        @echo $(MSG_PROGRAMMING)
-       $(VERBOSE_CMD)$(ISP) $(ISPFLAGS) erase f memory flash blankcheck loadbuffer $(TGTFILE) program verify $(if $(findstring run,$(MAKECMDGOALS)),$(if $(findstring secureflash,$(MAKECMDGOALS)),,start $(if $(findstring reset,$(MAKECMDGOALS)),,no)reset 0))
+       $(VERBOSE_CMD)$(ISP) $(ISPFLAGS) erase f memory flash blankcheck loadbuffer $(TARGET) program verify $(if $(findstring run,$(MAKECMDGOALS)),$(if $(findstring secureflash,$(MAKECMDGOALS)),,start $(if $(findstring reset,$(MAKECMDGOALS)),,no)reset 0))
 ifeq ($(call LastWord,$(filter program secureflash debug,$(MAKECMDGOALS))),program)
        @echo
 endif
@@ -528,7 +527,7 @@ $(CPPFILES) $(ASFILES) $(OBJFILES): Makefile $(MAKECFG)
 
 ifeq ($(TGTTYPE),.elf)
 # Files resulting from linking depend on linker script.
-$(TGTFILE): $(LINKER_SCRIPT)
+$(TARGET): $(LINKER_SCRIPT)
 endif
 
 # Preprocess: create preprocessed files from C source files.
@@ -574,16 +573,16 @@ endif
 .PRECIOUS: $(OBJFILES)
 ifeq ($(TGTTYPE),.a)
 # Archive: create A output file from object files.
-.SECONDARY: $(TGTFILE)
-$(TGTFILE): $(OBJFILES)
+.SECONDARY: $(TARGET)
+$(TARGET): $(OBJFILES)
        @echo $(MSG_ARCHIVING)
        $(VERBOSE_CMD)$(AR) $(ARFLAGS) $@ $(filter %.o,$+)
        $(VERBOSE_NL)
 else
 ifeq ($(TGTTYPE),.elf)
 # Link: create ELF output file from object files.
-.SECONDARY: $(TGTFILE)
-$(TGTFILE): $(OBJFILES)
+.SECONDARY: $(TARGET)
+$(TARGET): $(OBJFILES)
        @echo $(MSG_LINKING)
        $(VERBOSE_CMD)$(CC) $(LDFLAGS) $(filter %.o,$+) $(LOADLIBES) $(LDLIBS) -o $@
        $(VERBOSE_NL)
@@ -591,13 +590,13 @@ endif
 endif
 
 # Create extended listing from target output file.
-$(LSS): $(TGTFILE)
+$(LSS): $(TARGET)
        @echo $(MSG_EXTENDED_LISTING)
        $(VERBOSE_CMD)$(OBJDUMP) -h -S $< > $@
        $(VERBOSE_NL)
 
 # Create symbol table from target output file.
-$(SYM): $(TGTFILE)
+$(SYM): $(TARGET)
        @echo $(MSG_SYMBOL_TABLE)
        $(VERBOSE_CMD)$(NM) -n $< > $@
        $(VERBOSE_NL)
@@ -605,13 +604,13 @@ $(SYM): $(TGTFILE)
 ifeq ($(TGTTYPE),.elf)
 
 # Create Intel HEX image from ELF output file.
-$(HEX): $(TGTFILE)
+$(HEX): $(TARGET)
        @echo $(MSG_IHEX_IMAGE)
        $(VERBOSE_CMD)$(OBJCOPY) -O ihex $< $@
        $(VERBOSE_NL)
 
 # Create binary image from ELF output file.
-$(BIN): $(TGTFILE)
+$(BIN): $(TARGET)
        @echo $(MSG_BINARY_IMAGE)
        $(VERBOSE_CMD)$(OBJCOPY) -O binary $< $@
        $(VERBOSE_NL)

diff --git a/Demo/lwIP_AVR32_UC3/AT32UC3A/GCC/config.mk b/Demo/lwIP_AVR32_UC3/AT32UC3A/GCC/config.mk
index bdc3331c06df8c16cc72c2ed120f57bc0eafcae0..4712cdf6b2d16c5c35bb0c63539893ffff239bdf 100644 (file)
--- a/Demo/lwIP_AVR32_UC3/AT32UC3A/GCC/config.mk
+++ b/Demo/lwIP_AVR32_UC3/AT32UC3A/GCC/config.mk
@@ -68,7 +68,7 @@ PLATFORM_INC_PATH = \
   $(BRDS_PATH)/
 
 # Target name: {*.a|*.elf}
-TARGET = lwipdemo.elf
+TARGET = $(PART)-lwipdemo.elf
 
 # Definitions: [-D name[=definition]...] [-U name...]
 # Things that might be added to DEFS:

diff --git a/Demo/lwIP_AVR32_UC3/AT32UC3A/IAR/Debug/Obj/lwipdemo.pbd b/Demo/lwIP_AVR32_UC3/AT32UC3A/IAR/Debug/Obj/lwipdemo.pbd
new file mode 100644 (file)
index 0000000..eae6bf4
--- /dev/null
+++ b/Demo/lwIP_AVR32_UC3/AT32UC3A/IAR/Debug/Obj/lwipdemo.pbd
@@ -0,0 +1,49 @@
+This is an internal working file generated by the Source Browser.\r
+20:24 19s\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\BasicSMTP.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\BasicTFTP.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\BasicWEB.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\ParTest.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\api_lib.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\api_msg.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\err.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\etharp.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\ethernet.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\ethernetif.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\flash.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\flashc.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\gpio.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\heap_3.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\icmp.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\inet.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\intc.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\ip.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\ip_addr.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\ip_frag.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\led.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\list.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\macb.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\main.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\mem.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\memp.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\netif.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\pbuf.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\pm.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\port.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\queue.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\raw.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\read.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\serial.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\sockets.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\stats.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\sys.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\sys_arch.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\tasks.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\tc.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\tcp.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\tcp_in.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\tcp_out.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\tcpip.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\udp.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\usart.pbi\r
+C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\write.pbi\r

diff --git a/Demo/lwIP_AVR32_UC3/AT32UC3A/IAR/lwipdemo.dep b/Demo/lwIP_AVR32_UC3/AT32UC3A/IAR/lwipdemo.dep
new file mode 100644 (file)
index 0000000..dcb8fe4
--- /dev/null
+++ b/Demo/lwIP_AVR32_UC3/AT32UC3A/IAR/lwipdemo.dep
@@ -0,0 +1,1165 @@
+<?xml version="1.0" encoding="iso-8859-1"?>\r
+\r
+<project>\r
+  <fileVersion>2</fileVersion>\r
+  <fileChecksum>3234014960</fileChecksum>\r
+  <configuration>\r
+    <name>Debug</name>\r
+    <outputs>\r
+      <file>$PROJ_DIR$\Debug\Obj\main.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\tcp_in.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\netif.r82</file>\r
+      <file>$PROJ_DIR$\..\..\..\..\Source\portable\IAR\AVR32_UC3\portmacro.h</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\include\lwip\mem.h</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\include\lwip\netif.h</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\api_msg.pbi</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\include\lwip\tcpip.h</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\include\partest.h</file>\r
+      <file>$PROJ_DIR$\..\..\..\..\Source\include\queue.h</file>\r
+      <file>$PROJ_DIR$\..\..\UTILS\PREPROCESSOR\mrepeat.h</file>\r
+      <file>$PROJ_DIR$\..\..\DRIVERS\PM\pm.h</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\include\lwip\raw.h</file>\r
+      <file>$TOOLKIT_DIR$\inc\stdlib.h</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\include\ipv4\lwip\ip_frag.h</file>\r
+      <file>$PROJ_DIR$\..\..\..\..\Source\include\FreeRTOS.h</file>\r
+      <file>$TOOLKIT_DIR$\inc\avr32\io.h</file>\r
+      <file>$TOOLKIT_DIR$\inc\intrinsics.h</file>\r
+      <file>$PROJ_DIR$\..\..\UTILS\compiler.h</file>\r
+      <file>$PROJ_DIR$\..\..\DRIVERS\USART\usart.h</file>\r
+      <file>$TOOLKIT_DIR$\inc\stdio.h</file>\r
+      <file>$PROJ_DIR$\..\..\DRIVERS\MACB\macb.h</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\include\lwip\memp.h</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\include\lwip\api_msg.h</file>\r
+      <file>$PROJ_DIR$\..\..\NETWORK\lwip-port\AT32UC3A\lwipopts.h</file>\r
+      <file>$PROJ_DIR$\..\..\..\..\Source\include\portable.h</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\include\lwip\pbuf.h</file>\r
+      <file>$PROJ_DIR$\..\..\UTILS\PREPROCESSOR\preprocessor.h</file>\r
+      <file>$PROJ_DIR$\..\..\DRIVERS\TC\tc.h</file>\r
+      <file>$PROJ_DIR$\..\..\NETWORK\lwip-port\AT32UC3A\arch\cpu.h</file>\r
+      <file>$PROJ_DIR$\..\..\UTILS\PREPROCESSOR\stringz.h</file>\r
+      <file>$TOOLKIT_DIR$\inc\DLib_Defaults.h</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\flashc.r82</file>\r
+      <file>$TOOLKIT_DIR$\inc\DLib_Product.h</file>\r
+      <file>$PROJ_DIR$\..\..\NETWORK\lwip-port\AT32UC3A\arch\sys_arch.h</file>\r
+      <file>$PROJ_DIR$\..\..\NETWORK\BasicTFTP\BasicTFTP.h</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\include\serial.h</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\include\lwip\err.h</file>\r
+      <file>$PROJ_DIR$\..\..\..\..\Source\include\projdefs.h</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\include\lwip\tcp.h</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\include\lwip\debug.h</file>\r
+      <file>$PROJ_DIR$\..\..\NETWORK\lwip-port\AT32UC3A\arch\perf.h</file>\r
+      <file>$PROJ_DIR$\..\..\NETWORK\ethernet.h</file>\r
+      <file>$PROJ_DIR$\..\..\..\..\Source\include\croutine.h</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\include\ipv4\lwip\icmp.h</file>\r
+      <file>$TOOLKIT_DIR$\inc\DLib_Threads.h</file>\r
+      <file>$PROJ_DIR$\..\..\BOARDS\EVK1100\led.h</file>\r
+      <file>$TOOLKIT_DIR$\inc\xencoding_limits.h</file>\r
+      <file>$PROJ_DIR$\..\..\BOARDS\board.h</file>\r
+      <file>$PROJ_DIR$\..\..\NETWORK\lwip-port\AT32UC3A\arch\cc.h</file>\r
+      <file>$PROJ_DIR$\..\..\DRIVERS\FLASHC\flashc.h</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\tc.r82</file>\r
+      <file>$TOOLKIT_DIR$\inc\string.h</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\include\lwip\def.h</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\include\lwip\udp.h</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\include\lwip\snmp.h</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\include\lwip\arch.h</file>\r
+      <file>$PROJ_DIR$\..\..\DRIVERS\GPIO\gpio.h</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\include\ipv4\lwip\inet.h</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\include\flash.h</file>\r
+      <file>$PROJ_DIR$\..\..\BOARDS\EVK1100\evk1100.h</file>\r
+      <file>$TOOLKIT_DIR$\inc\yvals.h</file>\r
+      <file>$TOOLKIT_DIR$\inc\ysizet.h</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\write.r82</file>\r
+      <file>$PROJ_DIR$\..\..\..\..\Source\include\semphr.h</file>\r
+      <file>$TOOLKIT_DIR$\inc\ycheck.h</file>\r
+      <file>$TOOLKIT_DIR$\inc\yfuns.h</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\lwipdemo.pbd</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\err.r82</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\api_msg.r82</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\inet.r82</file>\r
+      <file>$PROJ_DIR$\..\..\conf_eth.h</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\memp.r82</file>\r
+      <file>$PROJ_DIR$\..\..\..\..\Source\include\list.h</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\sys.r82</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\pbuf.r82</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\etharp.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\etharp.r82</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\sys_arch.r82</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\sockets.r82</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\tcp.r82</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\tcp_in.r82</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\tcp_out.r82</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\stats.r82</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\tcpip.r82</file>\r
+      <file>$PROJ_DIR$\..\..\..\..\Source\portable\IAR\AVR32_UC3\exception.s82</file>\r
+      <file>$PROJ_DIR$\..\..\..\..\Source\queue.c</file>\r
+      <file>$PROJ_DIR$\..\..\NETWORK\BasicTFTP\BasicTFTP.c</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\tcp_out.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\queue.r82</file>\r
+      <file>$PROJ_DIR$\..\..\SERIAL\serial.c</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\flash.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\memp.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Exe\lwipdemo.d82</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\core\ipv4\ip_addr.c</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\core\memp.c</file>\r
+      <file>$PROJ_DIR$\..\..\DRIVERS\USART\usart.c</file>\r
+      <file>$PROJ_DIR$\..\..\..\..\Source\portable\MemMang\heap_3.c</file>\r
+      <file>$PROJ_DIR$\..\..\..\..\Source\portable\IAR\AVR32_UC3\write.c</file>\r
+      <file>$PROJ_DIR$\..\..\DRIVERS\GPIO\gpio.c</file>\r
+      <file>$PROJ_DIR$\..\..\BOARDS\EVK1100\led.c</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\core\tcp_in.c</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\core\ipv4\ip.c</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\sys.pbi</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\core\raw.c</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\core\inet.c</file>\r
+      <file>$PROJ_DIR$\..\..\..\..\Source\list.c</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\BasicTFTP.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\BasicWEB.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\macb.r82</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\intc.r82</file>\r
+      <file>$PROJ_DIR$\..\..\DRIVERS\PM\pm.c</file>\r
+      <file>$PROJ_DIR$\..\..\DRIVERS\INTC\intc.c</file>\r
+      <file>$PROJ_DIR$\..\..\DRIVERS\MACB\macb.c</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\core\tcp.c</file>\r
+      <file>$PROJ_DIR$\..\..\NETWORK\ethernet.c</file>\r
+      <file>$PROJ_DIR$\..\..\DRIVERS\FLASHC\flashc.c</file>\r
+      <file>$PROJ_DIR$\..\..\NETWORK\lwip-port\AT32UC3A\ethernetif.c</file>\r
+      <file>$PROJ_DIR$\..\..\NETWORK\BasicWEB\BasicWEB.c</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\api\tcpip.c</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\read.r82</file>\r
+      <file>$PROJ_DIR$\..\..\FreeRTOSConfig.h</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\gpio.r82</file>\r
+      <file>$PROJ_DIR$\..\..\PARTEST\ParTest.c</file>\r
+      <file>$PROJ_DIR$\..\..\DRIVERS\TC\tc.c</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\led.r82</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\core\pbuf.c</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\core\stats.c</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\core\mem.c</file>\r
+      <file>$PROJ_DIR$\..\..\main.c</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\core\netif.c</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\include\ipv4\lwip\ip_addr.h</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\BasicSMTP.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\tcpip.pbi</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\include\lwip\stats.h</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\mem.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\ethernet.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\ip.r82</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\list.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\usart.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\macb.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\pm.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\flashc.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\read.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\trampoline.r82</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\err.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\tc.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\led.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\exception.r82</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\serial.r82</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\ParTest.r82</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\main.r82</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\ethernet.r82</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\BasicWEB.r82</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\BasicTFTP.r82</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\BasicSMTP.r82</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\heap_3.pbi</file>\r
+      <file>$PROJ_DIR$\..\..\..\..\Source\include\task.h</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\flash.r82</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\tcp.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\sockets.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\pbuf.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\raw.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\ip.pbi</file>\r
+      <file>$PROJ_DIR$\..\..\NETWORK\lwip-port\AT32UC3A\lwip\opt.h</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\queue.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\intc.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\write.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\tasks.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\port.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\udp.r82</file>\r
+      <file>$PROJ_DIR$\..\..\..\..\Source\tasks.c</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\core\ipv4\icmp.c</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\api\api_msg.c</file>\r
+      <file>$PROJ_DIR$\..\..\..\..\Source\portable\IAR\AVR32_UC3\read.c</file>\r
+      <file>$PROJ_DIR$\..\..\SERVICES\USB\CLASS\DFU\EXAMPLES\ISP\BOOT\trampoline.s82</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\api\sockets.c</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\core\sys.c</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\Minimal\flash.c</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\netif\etharp.c</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\gpio.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\ip_frag.r82</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\core\tcp_out.c</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\api\api_lib.c</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\core\udp.c</file>\r
+      <file>$PROJ_DIR$\..\..\..\..\Source\portable\IAR\AVR32_UC3\port.c</file>\r
+      <file>$PROJ_DIR$\..\..\NETWORK\BasicSMTP\BasicSMTP.c</file>\r
+      <file>$PROJ_DIR$\..\..\NETWORK\lwip-port\AT32UC3A\sys_arch.c</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\core\ipv4\ip_frag.c</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\api\err.c</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\api_lib.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\raw.r82</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\sys_arch.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\icmp.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\tasks.r82</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\serial.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\inet.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\api_lib.r82</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\ip_frag.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\netif.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\ip_addr.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\udp.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\stats.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\ethernetif.pbi</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\mem.r82</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\include\netif\loopif.h</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\icmp.r82</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\ethernetif.r82</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\ip_addr.r82</file>\r
+      <file>$TOOLKIT_DIR$\inc\stddef.h</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\ParTest.pbi</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\include\lwip\sys.h</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\list.r82</file>\r
+      <file>$PROJ_DIR$\..\..\UTILS\PREPROCESSOR\tpaste.h</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\include\ipv4\lwip\ip.h</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\usart.r82</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\heap_3.r82</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\include\netif\etharp.h</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\port.r82</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\include\lwip\api.h</file>\r
+      <file>$PROJ_DIR$\Debug\Obj\pm.r82</file>\r
+      <file>$PROJ_DIR$\..\..\DRIVERS\INTC\intc.h</file>\r
+      <file>$PROJ_DIR$\..\..\NETWORK\BasicWEB\BasicWEB.h</file>\r
+      <file>$PROJ_DIR$\..\..\NETWORK\lwip-port\AT32UC3A\IAR\errno.h</file>\r
+      <file>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\include\lwip\sockets.h</file>\r
+    </outputs>\r
+    <file>\r
+      <name>[ROOT_NODE]</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>XLINK</name>\r
+          <file> 93</file>\r
+        </tool>\r
+      </outputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\Debug\Obj\lwipdemo.pbd</name>\r
+      <inputs>\r
+        <tool>\r
+          <name>BILINK</name>\r
+          <file> 132 107 108 210 190 6 145 76 136 203 91 142 180 156 193 196 166 163 200 198 147 138 140 0 135 92 199 161 141 169 165 162 143 195 160 202 103 192 168 146 159 1 88 133 201 139 167</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\..\..\Source\portable\IAR\AVR32_UC3\exception.s82</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>AAVR32</name>\r
+          <file> 148</file>\r
+        </tool>\r
+      </outputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\..\..\Source\queue.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCAVR32</name>\r
+          <file> 89</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 165</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 13 65 61 31 33 47 45 62 52 15 209 38 121 48 16 60 18 17 27 213 30 10 25 3 221 157 73 43</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\NETWORK\BasicTFTP\BasicTFTP.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCAVR32</name>\r
+          <file> 154</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 107</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 52 65 61 31 33 47 45 62 15 209 38 121 48 16 60 18 17 27 213 30 10 25 3 221 157 73 8 35 219 164 24 71 40 49 29 26 211 34 9 64 214 56 53 131 37 12 58 54 39 4 44 5 7 23 22 134 205 224</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\SERIAL\serial.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCAVR32</name>\r
+          <file> 149</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 195</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 15 209 65 61 31 33 47 45 62 38 121 48 16 60 18 17 27 213 30 10 25 3 221 9 157 73 36 57</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\core\ipv4\ip_addr.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCAVR32</name>\r
+          <file> 208</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 200</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 131 56 49 29 58 164 24 71 40 26 5 37</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\core\memp.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCAVR32</name>\r
+          <file> 72</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 92</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 164 24 71 40 49 29 22 26 54 56 58 131 214 53 37 12 39 211 34 15 209 65 61 31 33 47 45 62 38 121 48 16 60 18 17 27 213 30 10 25 3 221 157 73 9 64 4 44 5 219 23 7 134</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\DRIVERS\USART\usart.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCAVR32</name>\r
+          <file> 215</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 139</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 19 16 18 17 27 213 30 10</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\..\..\Source\portable\MemMang\heap_3.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCAVR32</name>\r
+          <file> 216</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 156</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 13 65 61 31 33 47 45 62 15 209 38 121 48 16 60 18 17 27 213 30 10 25 3 221 157 73</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\..\..\Source\portable\IAR\AVR32_UC3\write.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCAVR32</name>\r
+          <file> 63</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 167</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 66 62 65 61 31 33 47 45 16 19 18 17 27 213 30 10</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\DRIVERS\GPIO\gpio.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCAVR32</name>\r
+          <file> 122</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 180</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 57 16</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\BOARDS\EVK1100\led.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCAVR32</name>\r
+          <file> 125</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 147</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 16 27 213 30 10 18 17 60 46</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\core\tcp_in.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCAVR32</name>\r
+          <file> 81</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 1</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 53 49 29 164 24 71 40 131 56 5 37 58 26 4 22 39 211 34 15 209 65 61 31 33 47 45 62 38 121 48 16 60 18 17 27 213 30 10 25 3 221 157 73 9 64 214 44 134 41 55 54</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\core\ipv4\ip.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCAVR32</name>\r
+          <file> 137</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 163</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 164 24 71 40 49 29 53 4 56 214 26 131 37 14 5 58 44 12 54 39 211 34 15 209 65 61 31 33 47 45 62 38 121 48 16 60 18 17 27 213 30 10 25 3 221 157 73 9 64 134 22 41 55</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\core\raw.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCAVR32</name>\r
+          <file> 191</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 162</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 52 65 61 31 33 47 45 62 164 24 71 40 49 29 53 22 58 56 26 131 5 37 12 214 134 4 41 55 54</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\core\inet.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCAVR32</name>\r
+          <file> 70</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 196</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 164 24 71 40 49 29 56 53 58 26 131 211 34 15 209 65 61 31 33 47 45 62 38 121 48 16 60 18 17 27 213 30 10 25 3 221 157 73 9 64</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\..\..\Source\list.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCAVR32</name>\r
+          <file> 212</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 138</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 13 65 61 31 33 47 45 62 15 209 38 121 48 16 60 18 17 27 213 30 10 25 3 221 73</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\DRIVERS\PM\pm.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCAVR32</name>\r
+          <file> 220</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 141</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 11 16 18 17 27 213 30 10</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\DRIVERS\INTC\intc.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCAVR32</name>\r
+          <file> 110</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 166</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 16 18 17 27 213 30 10 221</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\DRIVERS\MACB\macb.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCAVR32</name>\r
+          <file> 109</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 140</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 20 65 61 31 33 47 45 62 52 16 15 209 38 121 48 60 18 17 27 213 30 10 25 3 221 157 73 64 9 21 34 71 57</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\core\tcp.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCAVR32</name>\r
+          <file> 80</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 159</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 52 65 61 31 33 47 45 62 164 24 71 40 49 29 53 4 56 22 55 5 37 131 58 26 54 214 39 211 34 15 209 38 121 48 16 60 18 17 27 213 30 10 25 3 221 157 73 9 64 44</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\NETWORK\ethernet.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCAVR32</name>\r
+          <file> 152</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 136</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 52 65 61 31 33 47 45 62 71 15 209 38 121 48 16 60 18 17 27 213 30 10 25 3 221 157 73 8 36 42 21 34 9 64 57 222 35 211 49 29 164 24 40 219 26 214 56 53 131 37 12 58 54 39 4 44 5 7 23 22 134 205</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\DRIVERS\FLASHC\flashc.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCAVR32</name>\r
+          <file> 32</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 142</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 16 209 65 61 31 33 47 45 62 18 17 27 213 30 10 50</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\NETWORK\lwip-port\AT32UC3A\ethernetif.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCAVR32</name>\r
+          <file> 207</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 203</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 164 24 71 40 49 29 53 4 56 26 211 34 15 209 65 61 31 33 47 45 62 38 121 48 16 60 18 17 27 213 30 10 25 3 221 157 73 9 64 134 22 217 131 5 37 58 214 21</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\NETWORK\BasicWEB\BasicWEB.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCAVR32</name>\r
+          <file> 153</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 108</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 20 65 61 31 33 47 45 62 52 71 15 209 38 121 48 16 60 18 17 27 213 30 10 25 3 221 157 73 64 9 8 36 219 164 24 40 49 29 26 211 34 214 56 53 131 37 12 58 54 39 4 44 5 7 23 22 134 205 42</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\api\tcpip.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCAVR32</name>\r
+          <file> 84</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 133</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 164 24 71 40 49 29 211 34 15 209 65 61 31 33 47 45 62 38 121 48 16 60 18 17 27 213 30 10 25 3 221 157 73 9 64 22 26 214 56 53 131 37 14 5 58 54 39 4 44 7 23 219 12</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\PARTEST\ParTest.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCAVR32</name>\r
+          <file> 150</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 210</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 16 15 209 65 61 31 33 47 45 62 38 121 48 60 18 17 27 213 30 10 25 3 221 157 73 8</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\DRIVERS\TC\tc.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCAVR32</name>\r
+          <file> 51</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 146</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 16 18 17 27 213 30 10 28</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\core\pbuf.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCAVR32</name>\r
+          <file> 75</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 161</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 52 65 61 31 33 47 45 62 164 24 71 40 49 29 134 4 56 22 53 26 211 34 15 209 38 121 48 16 60 18 17 27 213 30 10 25 3 221 157 73 9 64 41</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\core\stats.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCAVR32</name>\r
+          <file> 83</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 202</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 52 65 61 31 33 47 45 62 164 24 71 40 49 29 53 134 4 56 22</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\core\mem.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCAVR32</name>\r
+          <file> 204</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 135</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 52 65 61 31 33 47 45 62 56 49 29 164 24 71 40 53 4 211 34 15 209 38 121 48 16 60 18 17 27 213 30 10 25 3 221 157 73 9 64 134 22</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\main.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCAVR32</name>\r
+          <file> 151</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 0</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 13 65 61 31 33 47 45 62 52 11 16 18 17 27 213 30 10 50 209 15 38 121 48 60 25 3 221 157 73 8 36 42 217 26 49 29 131 56 5 164 24 71 40 37 58 214 53 59</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\core\netif.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCAVR32</name>\r
+          <file> 2</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 199</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 164 24 71 40 49 29 53 131 56 5 37 58 26 39 211 34 15 209 65 61 31 33 47 45 62 38 121 48 16 60 18 17 27 213 30 10 25 3 221 157 73 9 64 4 214 44 55 54</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\..\..\Source\tasks.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCAVR32</name>\r
+          <file> 194</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 168</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 20 65 61 31 33 47 45 62 13 52 15 209 38 121 48 16 60 18 17 27 213 30 10 25 3 221 157 73</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\core\ipv4\icmp.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCAVR32</name>\r
+          <file> 206</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 193</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 52 65 61 31 33 47 45 62 164 24 71 40 49 29 44 56 26 131 5 37 58 214 53 134 4 22 55 54</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\api\api_msg.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCAVR32</name>\r
+          <file> 69</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 6</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 164 24 71 40 49 29 56 23 26 211 34 15 209 65 61 31 33 47 45 62 38 121 48 16 60 18 17 27 213 30 10 25 3 221 157 73 9 64 214 53 131 37 54 58 39 4 44 5 219 12 22 7</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\..\..\Source\portable\IAR\AVR32_UC3\read.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCAVR32</name>\r
+          <file> 120</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 143</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 66 62 65 61 31 33 47 45 16 19 18 17 27 213 30 10</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\SERVICES\USB\CLASS\DFU\EXAMPLES\ISP\BOOT\trampoline.s82</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>AAVR32</name>\r
+          <file> 144</file>\r
+        </tool>\r
+      </outputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\api\sockets.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCAVR32</name>\r
+          <file> 79</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 160</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 52 65 61 31 33 47 45 62 223 164 24 71 40 49 29 219 26 211 34 15 209 38 121 48 16 60 18 17 27 213 30 10 25 3 221 157 73 9 64 214 56 53 131 37 12 58 54 39 4 44 5 224</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\core\sys.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCAVR32</name>\r
+          <file> 74</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 103</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 211 49 29 164 24 71 40 34 15 209 65 61 31 33 47 45 62 38 121 48 16 60 18 17 27 213 30 10 25 3 221 157 73 9 64 53 22</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\..\Common\Minimal\flash.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCAVR32</name>\r
+          <file> 158</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 91</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 13 65 61 31 33 47 45 62 15 209 38 121 48 16 60 18 17 27 213 30 10 25 3 221 157 73 8 59</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\netif\etharp.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCAVR32</name>\r
+          <file> 77</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 76</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 52 65 61 31 33 47 45 62 164 24 71 40 49 29 58 56 26 131 217 5 37 214 53 134 4 22 55 54</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\core\tcp_out.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCAVR32</name>\r
+          <file> 82</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 88</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 52 65 61 31 33 47 45 62 53 49 29 164 24 71 40 4 56 22 211 34 15 209 38 121 48 16 60 18 17 27 213 30 10 25 3 221 157 73 9 64 131 5 37 58 26 39 214 44 134 55 54</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\api\api_lib.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCAVR32</name>\r
+          <file> 197</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 190</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 164 24 71 40 49 29 219 26 211 34 15 209 65 61 31 33 47 45 62 38 121 48 16 60 18 17 27 213 30 10 25 3 221 157 73 9 64 214 56 53 131 37 12 58 54 39 4 44 5 23 22</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\core\udp.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCAVR32</name>\r
+          <file> 170</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 201</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 52 65 61 31 33 47 45 62 164 24 71 40 49 29 53 22 58 56 26 131 5 37 54 214 44 134 4 41 55</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\..\..\Source\portable\IAR\AVR32_UC3\port.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCAVR32</name>\r
+          <file> 218</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 169</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 15 209 65 61 31 33 47 45 62 38 121 48 16 60 18 17 27 213 30 10 25 3 221 157 73 57 28</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\NETWORK\BasicSMTP\BasicSMTP.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCAVR32</name>\r
+          <file> 155</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 132</file>\r
+        </tool>\r
+      </outputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\NETWORK\lwip-port\AT32UC3A\sys_arch.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCAVR32</name>\r
+          <file> 78</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 192</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 71 222 3 16 221 18 17 27 213 30 10 35 40 49 29 53 211 164 24 34 15 209 65 61 31 33 47 45 62 38 121 48 60 25 157 73 9 64 4 56</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\core\ipv4\ip_frag.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCAVR32</name>\r
+          <file> 181</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 198</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 52 65 61 31 33 47 45 62 164 24 71 40 49 29 214 56 53 26 131 37 14 5 58 55 54 134 4 22</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <file>\r
+      <name>$PROJ_DIR$\..\..\..\Common\ethernet\lwIP\api\err.c</name>\r
+      <outputs>\r
+        <tool>\r
+          <name>ICCAVR32</name>\r
+          <file> 68</file>\r
+        </tool>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 145</file>\r
+        </tool>\r
+      </outputs>\r
+      <inputs>\r
+        <tool>\r
+          <name>BICOMP</name>\r
+          <file> 37 164 24 71 40 49 29</file>\r
+        </tool>\r
+      </inputs>\r
+    </file>\r
+    <forcedrebuild>\r
+      <name>[MULTI_TOOL]</name>\r
+      <tool>XLINK</tool>\r
+    </forcedrebuild>\r
+  </configuration>\r
+</project>\r
+\r
+\r

diff --git a/Demo/lwIP_AVR32_UC3/AT32UC3A/IAR/lwipdemo.ewp b/Demo/lwIP_AVR32_UC3/AT32UC3A/IAR/lwipdemo.ewp
index e6f90dd080f9417a650865ff118a10c2118fd529..4d6b3435d4ec816616f2472f55661c076644a5b9 100644 (file)
--- a/Demo/lwIP_AVR32_UC3/AT32UC3A/IAR/lwipdemo.ewp
+++ b/Demo/lwIP_AVR32_UC3/AT32UC3A/IAR/lwipdemo.ewp
@@ -200,7 +200,7 @@
         </option>\r
         <option>\r
           <name>CCDiagSuppress</name>\r
-          <state>Pe191, Pa082, Pe236, Pe171</state>\r
+          <state></state>\r
         </option>\r
         <option>\r
           <name>CCDiagRemark</name>\r

diff --git a/Demo/lwIP_AVR32_UC3/AT32UC3A/IAR/settings/lwipdemo.cspy.bat b/Demo/lwIP_AVR32_UC3/AT32UC3A/IAR/settings/lwipdemo.cspy.bat
new file mode 100644 (file)
index 0000000..c8e6020
--- /dev/null
+++ b/Demo/lwIP_AVR32_UC3/AT32UC3A/IAR/settings/lwipdemo.cspy.bat
@@ -0,0 +1,32 @@
+@REM This bat file has been generated by the IAR Embeddded Workbench\r
+@REM C-SPY interactive debugger,as an aid to preparing a command\r
+@REM line for running the cspybat command line utility with the\r
+@REM appropriate settings.\r
+@REM\r
+@REM After making some adjustments to this file, you can launch cspybat\r
+@REM by typing the name of this file followed by the name of the debug\r
+@REM file (usually an ubrof file). Note that this file is generated\r
+@REM every time a new debug session is initialized, so you may want to\r
+@REM move or rename the file before making changes.\r
+@REM\r
+@REM Note: some command line arguments cannot be properly generated\r
+@REM by this process. Specifically, the plugin which is responsible\r
+@REM for the Terminal I/O window (and other C runtime functionality)\r
+@REM comes in a special version for cspybat, and the name of that\r
+@REM plugin dll is not known when generating this file. It resides in\r
+@REM the $TOOLKIT_DIR$\bin folder and is usually called XXXbat.dll or\r
+@REM XXXlibsupportbat.dll, where XXX is the name of the corresponding\r
+@REM tool chain. Replace the '<libsupport_plugin>' parameter\r
+@REM below with the appropriate file name. Other plugins loaded by\r
+@REM C-SPY are usually not needed by, or will not work in, cspybat\r
+@REM but they are listed at the end of this file for reference.\r
+\r
+\r
+"C:\Devtools\IAR Systems\Embedded Workbench 4.0\common\bin\cspybat" "C:\Devtools\IAR Systems\Embedded Workbench 4.0\avr32\bin\avr32proc.dll" "C:\Devtools\IAR Systems\Embedded Workbench 4.0\avr32\bin\avr32jtagicemkII.dll"  %1 --plugin "C:\Devtools\IAR Systems\Embedded Workbench 4.0\avr32\bin\<libsupport_plugin>" --backend -B "--core" "avr32a" "--avr32_simd_instructions" "disabled" "--avr32_dsp_instructions" "enabled" "--avr32_rmw_instructions" "enabled" "-p" "C:\Devtools\IAR Systems\Embedded Workbench 4.0\avr32\config\iouc3a0512.ddf" "-d" "jtagicemkII" "--drv_communication" "USB" "--jtagice_clock" "100000" \r
+\r
+\r
+@REM Loaded plugins:\r
+@REM    avr32LibSupport.dll\r
+@REM    C:\Devtools\IAR Systems\Embedded Workbench 4.0\common\plugins\CodeCoverage\CodeCoverage.dll\r
+@REM    C:\Devtools\IAR Systems\Embedded Workbench 4.0\common\plugins\Profiling\Profiling.dll\r
+@REM    C:\Devtools\IAR Systems\Embedded Workbench 4.0\common\plugins\stack\stack.dll\r

diff --git a/Demo/lwIP_AVR32_UC3/AT32UC3A/IAR/settings/lwipdemo.dbgdt b/Demo/lwIP_AVR32_UC3/AT32UC3A/IAR/settings/lwipdemo.dbgdt
new file mode 100644 (file)
index 0000000..33f4649
--- /dev/null
+++ b/Demo/lwIP_AVR32_UC3/AT32UC3A/IAR/settings/lwipdemo.dbgdt
@@ -0,0 +1,5 @@
+<?xml version="1.0" encoding="iso-8859-1"?>\r
+\r
+<Project/>\r
+\r
+\r

diff --git a/Demo/lwIP_AVR32_UC3/AT32UC3A/IAR/settings/lwipdemo.dni b/Demo/lwIP_AVR32_UC3/AT32UC3A/IAR/settings/lwipdemo.dni
new file mode 100644 (file)
index 0000000..4520689
--- /dev/null
+++ b/Demo/lwIP_AVR32_UC3/AT32UC3A/IAR/settings/lwipdemo.dni
@@ -0,0 +1,5 @@
+[Breakpoints]\r
+Count=0\r
+[TraceHelper]\r
+Enabled=0\r
+ShowSource=1\r

diff --git a/Demo/lwIP_AVR32_UC3/AT32UC3A/IAR/settings/lwipdemo.wsdt b/Demo/lwIP_AVR32_UC3/AT32UC3A/IAR/settings/lwipdemo.wsdt
new file mode 100644 (file)
index 0000000..2a6a3cc
--- /dev/null
+++ b/Demo/lwIP_AVR32_UC3/AT32UC3A/IAR/settings/lwipdemo.wsdt
@@ -0,0 +1,66 @@
+<?xml version="1.0" encoding="iso-8859-1"?>\r
+\r
+<Workspace>\r
+  <ConfigDictionary>\r
+    \r
+  <CurrentConfigs><Project>lwipdemo/Debug</Project></CurrentConfigs></ConfigDictionary>\r
+  <Desktop>\r
+    <Static>\r
+      <Build>\r
+        \r
+        \r
+        \r
+        \r
+      <ColumnWidth0>20</ColumnWidth0><ColumnWidth1>1006</ColumnWidth1><ColumnWidth2>268</ColumnWidth2><ColumnWidth3>67</ColumnWidth3></Build>\r
+      <Workspace>\r
+        <ColumnWidths>\r
+          \r
+          \r
+          \r
+          \r
+        <Column0>124</Column0><Column1>27</Column1><Column2>27</Column2><Column3>27</Column3></ColumnWidths>\r
+      </Workspace>\r
+    </Static>\r
+    <Windows>\r
+      \r
+      \r
+    <Wnd0>\r
+        <Tabs>\r
+          <Tab>\r
+            <Identity>TabID-32105-15798</Identity>\r
+            <TabName>Workspace</TabName>\r
+            <Factory>Workspace</Factory>\r
+            <Session>\r
+              \r
+            <NodeDict><ExpandedNode>lwipdemo</ExpandedNode></NodeDict></Session>\r
+          </Tab>\r
+        </Tabs>\r
+        \r
+      <SelectedTab>0</SelectedTab></Wnd0><Wnd1>\r
+        <Tabs>\r
+          <Tab>\r
+            <Identity>TabID-10086-15801</Identity>\r
+            <TabName>Build</TabName>\r
+            <Factory>Build</Factory>\r
+            <Session/>\r
+          </Tab>\r
+        </Tabs>\r
+        \r
+      <SelectedTab>0</SelectedTab></Wnd1></Windows>\r
+    <Editor>\r
+      \r
+      \r
+      \r
+      \r
+    <Pane/><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>\r
+    <Positions>\r
+      \r
+      \r
+      \r
+      \r
+      \r
+    <Top><Row0><Sizes><Toolbar-0087f048><key>iaridepm.enu1</key></Toolbar-0087f048></Sizes></Row0></Top><Left><Row0><Sizes><Wnd0><Rect><Top>-2</Top><Left>-2</Left><Bottom>740</Bottom><Right>198</Right><x>-2</x><y>-2</y><xscreen>200</xscreen><yscreen>200</yscreen><sizeHorzCX>142857</sizeHorzCX><sizeHorzCY>203666</sizeHorzCY><sizeVertCX>142857</sizeVertCX><sizeVertCY>755601</sizeVertCY></Rect></Wnd0></Sizes></Row0></Left><Right><Row0><Sizes/></Row0></Right><Bottom><Row0><Sizes><Wnd1><Rect><Top>-2</Top><Left>-2</Left><Bottom>198</Bottom><Right>1402</Right><x>-2</x><y>-2</y><xscreen>1404</xscreen><yscreen>200</yscreen><sizeHorzCX>1002857</sizeHorzCX><sizeHorzCY>203666</sizeHorzCY><sizeVertCX>142857</sizeVertCX><sizeVertCY>203666</sizeVertCY></Rect></Wnd1></Sizes></Row0></Bottom><Float><Sizes/></Float></Positions>\r
+  </Desktop>\r
+</Workspace>\r
+\r
+\r

diff --git a/Demo/lwIP_AVR32_UC3/DRIVERS/INTC/intc.c b/Demo/lwIP_AVR32_UC3/DRIVERS/INTC/intc.c
index e6a64298a4010467011988a9b738d46eaba3f6c2..8bd9b880e2907c638f071dd6b82aefe113bc20de 100644 (file)
--- a/Demo/lwIP_AVR32_UC3/DRIVERS/INTC/intc.c
+++ b/Demo/lwIP_AVR32_UC3/DRIVERS/INTC/intc.c
@@ -53,8 +53,13 @@ extern const unsigned int ipr_val[AVR32_INTC_NUM_INT_LEVELS];
 \r
 //! Creates a table of interrupt line handlers per interrupt group in order to optimize RAM space.\r
 //! Each line handler table contains a set of pointers to interrupt handlers.\r
+#if __GNUC__\r
 #define DECL_INT_LINE_HANDLER_TABLE(GRP, unused) \\r
 static volatile __int_handler _int_line_handler_table_##GRP[Max(AVR32_INTC_NUM_IRQS_PER_GRP##GRP, 1)];\r
+#elif __ICCAVR32__\r
+#define DECL_INT_LINE_HANDLER_TABLE(GRP, unused) \\r
+static volatile __no_init __int_handler _int_line_handler_table_##GRP[Max(AVR32_INTC_NUM_IRQS_PER_GRP##GRP, 1)];\r
+#endif\r
 MREPEAT(AVR32_INTC_NUM_INT_GRPS, DECL_INT_LINE_HANDLER_TABLE, ~);\r
 #undef DECL_INT_LINE_HANDLER_TABLE\r
 \r

diff --git a/Demo/lwIP_AVR32_UC3/DRIVERS/PM/pm.h b/Demo/lwIP_AVR32_UC3/DRIVERS/PM/pm.h
index 616129b56fcf1789b29057d8dbd95118dbd73443..12ab46962ea840e9cd5cfdc8a2740d0bfa80eb26 100644 (file)
--- a/Demo/lwIP_AVR32_UC3/DRIVERS/PM/pm.h
+++ b/Demo/lwIP_AVR32_UC3/DRIVERS/PM/pm.h
@@ -212,7 +212,6 @@ extern void pm_enable_clk32_no_wait(volatile avr32_pm_t *pm, unsigned int startu
 extern void pm_wait_for_clk32_ready(volatile avr32_pm_t *pm);\r
 \r
 \r
-//FIXME update this header -SM\r
 /*!\r
  * \brief This function will select all the power manager clocks.\r
  * \param pm Base address of the Power Manager (i.e. &AVR32_PM)\r
@@ -254,20 +253,18 @@ extern void pm_gc_enable(volatile avr32_pm_t *pm, unsigned int gc);
 extern void pm_gc_disable(volatile avr32_pm_t *pm, unsigned int gc);\r
 \r
 \r
-//FIXME update this header -SM\r
 /*!\r
  * \brief This function will setup a PLL.\r
  * \param pm Base address of the Power Manager (i.e. &AVR32_PM)\r
  * \param pll PLL number(0 for PLL0, 1 for PLL1)\r
- * \param mul\r
- * \param div\r
- * \param osc\r
- * \param lockcount\r
+ * \param mul PLL MUL in the PLL formula\r
+ * \param div PLL DIV in the PLL formula\r
+ * \param osc OSC number (0 for osc0, 1 for osc1)\r
+ * \param lockcount PLL lockount\r
  */\r
 extern void pm_pll_setup(volatile avr32_pm_t *pm, unsigned int pll, unsigned int mul, unsigned int div, unsigned int osc, unsigned int lockcount);\r
 \r
 \r
-//FIXME update this header -SM\r
 /*!\r
  * \brief This function will set a PLL option.\r
  * \param pm Base address of the Power Manager (i.e. &AVR32_PM)\r
@@ -279,7 +276,6 @@ extern void pm_pll_setup(volatile avr32_pm_t *pm, unsigned int pll, unsigned int
 extern void pm_pll_set_option(volatile avr32_pm_t *pm, unsigned int pll, unsigned int  pll_freq, unsigned int  pll_div2, unsigned int  pll_wbwdisable);\r
 \r
 \r
-//FIXME update this header -SM\r
 /*!\r
  * \brief This function will get a PLL option.\r
  * \param pm Base address of the Power Manager (i.e. &AVR32_PM)\r

diff --git a/Demo/lwIP_AVR32_UC3/FreeRTOSConfig.h b/Demo/lwIP_AVR32_UC3/FreeRTOSConfig.h
index f430e9967ce4beb9fc49d0144330bc933790e958..3f078d606573fce8881d770b071ad9d9edcb6321 100644 (file)
--- a/Demo/lwIP_AVR32_UC3/FreeRTOSConfig.h
+++ b/Demo/lwIP_AVR32_UC3/FreeRTOSConfig.h
@@ -64,7 +64,8 @@
 #define configTICK_RATE_HZ        ( ( portTickType ) 1000 )\r
 #define configMAX_PRIORITIES      ( ( unsigned portBASE_TYPE ) 8 )\r
 #define configMINIMAL_STACK_SIZE  ( ( unsigned portSHORT ) 256 )\r
-#define configTOTAL_HEAP_SIZE     ( ( size_t ) ( 0 ) )\r
+/* configTOTAL_HEAP_SIZE is not used when heap_3.c is used. */\r
+#define configTOTAL_HEAP_SIZE     ( ( size_t ) ( 1024*25 ) )\r
 #define configMAX_TASK_NAME_LEN   ( 20 )\r
 #define configUSE_TRACE_FACILITY  1\r
 #define configUSE_16_BIT_TICKS    0\r
@@ -85,6 +86,7 @@ to exclude the API function. */
 #define INCLUDE_vTaskDelayUntil             1\r
 #define INCLUDE_vTaskDelay                  1\r
 #define INCLUDE_xTaskGetCurrentTaskHandle   1\r
+#define INCLUDE_xTaskGetSchedulerState      0\r
 \r
 /* configTICK_USE_TC is a boolean indicating whether to use a Timer Counter\r
    for the tick generation. Timer Counter will generate an accurate Tick;\r

diff --git a/Demo/lwIP_AVR32_UC3/UTILS/compiler.h b/Demo/lwIP_AVR32_UC3/UTILS/compiler.h
index 5d75c0937f9f8258758f761ed3937e6167b9af09..70cc8d05c6d6d40cf6fabd7ec78b7e02d895ddf8 100644 (file)
--- a/Demo/lwIP_AVR32_UC3/UTILS/compiler.h
+++ b/Demo/lwIP_AVR32_UC3/UTILS/compiler.h
@@ -45,7 +45,9 @@
 #ifndef _COMPILER_H_\r
 #define _COMPILER_H_\r
 \r
-#include <avr32/io.h>\r
+#if (__GNUC__ && __AVR32__) || (__ICCAVR32__ || __AAVR32__)\r
+#  include <avr32/io.h>\r
+#endif\r
 #if __ICCAVR32__\r
 #  include <intrinsics.h>\r
 #endif\r
@@ -509,7 +511,7 @@ typedef struct
     }\\r
   )\r
 #elif __ICCAVR32__\r
-  #define min(a, b)   Min(a, b)\r
+  #define min(a, b)   __min(a, b)\r
 #endif\r
 \r
 /*! \brief Takes the maximal value of \a a and \a b.\r
@@ -531,7 +533,7 @@ typedef struct
     }\\r
   )\r
 #elif __ICCAVR32__\r
-  #define max(a, b)   Max(a, b)\r
+  #define max(a, b)   __max(a, b)\r
 #endif\r
 \r
 //! @}\r
@@ -751,6 +753,36 @@ typedef struct
 \r
 //! @}\r
 \r
+\r
+/*! \name Debug Register Access\r
+ */\r
+//! @{\r
+\r
+/*! \brief Gets the value of the \a dbgreg debug register.\r
+ *\r
+ * \param dbgreg  Address of the debug register of which to get the value.\r
+ *\r
+ * \return Value of the \a dbgreg debug register.\r
+ */\r
+#if __GNUC__\r
+  #define Get_debug_register(dbgreg)          __builtin_mfdr(dbgreg)\r
+#elif __ICCAVR32__\r
+  #define Get_debug_register(dbgreg)          __get_debug_register(dbgreg)\r
+#endif\r
+\r
+/*! \brief Sets the value of the \a dbgreg debug register to \a value.\r
+ *\r
+ * \param dbgreg  Address of the debug register of which to set the value.\r
+ * \param value   Value to set the \a dbgreg debug register to.\r
+ */\r
+#if __GNUC__\r
+  #define Set_debug_register(dbgreg, value)   __builtin_mtdr(dbgreg, value)\r
+#elif __ICCAVR32__\r
+  #define Set_debug_register(dbgreg, value)   __set_debug_register(dbgreg, value)\r
+#endif\r
+\r
+//! @}\r
+\r
 #endif  // __AVR32_ABI_COMPILER__\r
 \r
 \r
@@ -919,9 +951,9 @@ typedef struct
  * \note More optimized if only used with values unknown at compile time.\r
  */\r
 #if __GNUC__\r
-  #define swap16(u16) __builtin_bswap_16(u16)\r
+  #define swap16(u16) ((U16)__builtin_bswap_16((U16)(u16)))\r
 #elif __ICCAVR32__\r
-  #define swap16(u16) Swap16(u16)\r
+  #define swap16(u16) ((U16)__swap_bytes_in_halfwords((U16)(u16)))\r
 #endif\r
 \r
 /*! \brief Toggles the endianism of \a u32 (by swapping its bytes).\r
@@ -933,9 +965,9 @@ typedef struct
  * \note More optimized if only used with values unknown at compile time.\r
  */\r
 #if __GNUC__\r
-  #define swap32(u32) __builtin_bswap_32(u32)\r
+  #define swap32(u32) ((U32)__builtin_bswap_32((U32)(u32)))\r
 #elif __ICCAVR32__\r
-  #define swap32(u32) Swap32(u32)\r
+  #define swap32(u32) ((U32)__swap_bytes((U32)(u32)))\r
 #endif\r
 \r
 /*! \brief Toggles the endianism of \a u64 (by swapping its bytes).\r

diff --git a/Demo/lwIP_Demo_Rowley_ARM7/BasicWEB.c b/Demo/lwIP_Demo_Rowley_ARM7/BasicWEB.c
index 88b6ec5302c54c02013a67fe04d77f32ec8cdd4f..47b9c5953071bd001adb6764e050329b51d529e4 100644 (file)
--- a/Demo/lwIP_Demo_Rowley_ARM7/BasicWEB.c
+++ b/Demo/lwIP_Demo_Rowley_ARM7/BasicWEB.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/lwIP_Demo_Rowley_ARM7/BasicWEB.h b/Demo/lwIP_Demo_Rowley_ARM7/BasicWEB.h
index 5ac7e3e6b1eee54c783b298cc256d92afb854df4..78e615906a1793b5262dc660fd332d597b437b90 100644 (file)
--- a/Demo/lwIP_Demo_Rowley_ARM7/BasicWEB.h
+++ b/Demo/lwIP_Demo_Rowley_ARM7/BasicWEB.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/lwIP_Demo_Rowley_ARM7/EMAC/SAM7_EMAC.c b/Demo/lwIP_Demo_Rowley_ARM7/EMAC/SAM7_EMAC.c
index 9197af6fbaa545432bf410e006dc237328c32b9b..f5477f74c687923dc61c290f7c2340f8af1f1599 100644 (file)
--- a/Demo/lwIP_Demo_Rowley_ARM7/EMAC/SAM7_EMAC.c
+++ b/Demo/lwIP_Demo_Rowley_ARM7/EMAC/SAM7_EMAC.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/lwIP_Demo_Rowley_ARM7/EMAC/SAM7_EMAC.h b/Demo/lwIP_Demo_Rowley_ARM7/EMAC/SAM7_EMAC.h
index afee3f4f6242d920c17f30ffa9c6d148d4297048..02bb4cb6bd93677e7fefdb7c14639b30a33d7e93 100644 (file)
--- a/Demo/lwIP_Demo_Rowley_ARM7/EMAC/SAM7_EMAC.h
+++ b/Demo/lwIP_Demo_Rowley_ARM7/EMAC/SAM7_EMAC.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/lwIP_Demo_Rowley_ARM7/EMAC/SAM7_EMAC_ISR.c b/Demo/lwIP_Demo_Rowley_ARM7/EMAC/SAM7_EMAC_ISR.c
index 82f66f2e7a3bd0a4030a694095ac9bdb421e1245..140f72df0197356e260c91baa7e0d69b64a90af6 100644 (file)
--- a/Demo/lwIP_Demo_Rowley_ARM7/EMAC/SAM7_EMAC_ISR.c
+++ b/Demo/lwIP_Demo_Rowley_ARM7/EMAC/SAM7_EMAC_ISR.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/lwIP_Demo_Rowley_ARM7/FreeRTOSConfig.h b/Demo/lwIP_Demo_Rowley_ARM7/FreeRTOSConfig.h
index 9448a65ae5ead49ce94fa1c82fa091a10b1ecaeb..89603d530d72b35b2ce7bdb265bc8a0389df41d7 100644 (file)
--- a/Demo/lwIP_Demo_Rowley_ARM7/FreeRTOSConfig.h
+++ b/Demo/lwIP_Demo_Rowley_ARM7/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/lwIP_Demo_Rowley_ARM7/ParTest/ParTest.c b/Demo/lwIP_Demo_Rowley_ARM7/ParTest/ParTest.c
index 53deb1e245f804aa06288112d46e2f99ffa7fb91..0ab79b21b153b3d76d1d597e46132649148808ee 100644 (file)
--- a/Demo/lwIP_Demo_Rowley_ARM7/ParTest/ParTest.c
+++ b/Demo/lwIP_Demo_Rowley_ARM7/ParTest/ParTest.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/lwIP_Demo_Rowley_ARM7/USB/USB-CDC.c b/Demo/lwIP_Demo_Rowley_ARM7/USB/USB-CDC.c
index 4c346324cc9dfb5f14b6d73d554a6b3edd246b44..92a7f3cce4154f30f67b0f160f15d6fdce65a793 100644 (file)
--- a/Demo/lwIP_Demo_Rowley_ARM7/USB/USB-CDC.c
+++ b/Demo/lwIP_Demo_Rowley_ARM7/USB/USB-CDC.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/lwIP_Demo_Rowley_ARM7/USB/USB-CDC.h b/Demo/lwIP_Demo_Rowley_ARM7/USB/USB-CDC.h
index 9b4ab9db00ab008d2af0be2d3fa14f0cf4fc88a7..ab0546cbe8ee196e77d77022e3c623f18fe30e59 100644 (file)
--- a/Demo/lwIP_Demo_Rowley_ARM7/USB/USB-CDC.h
+++ b/Demo/lwIP_Demo_Rowley_ARM7/USB/USB-CDC.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/lwIP_Demo_Rowley_ARM7/USB/USBIsr.c b/Demo/lwIP_Demo_Rowley_ARM7/USB/USBIsr.c
index 63150daaa8413e8a2b83151a6a549ae74b2ff553..5c731ef5471a526e17b0cc57f87c5fecd1ac46db 100644 (file)
--- a/Demo/lwIP_Demo_Rowley_ARM7/USB/USBIsr.c
+++ b/Demo/lwIP_Demo_Rowley_ARM7/USB/USBIsr.c
@@ -1,5 +1,5 @@
 /*\r
-  FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+  FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
   This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/lwIP_Demo_Rowley_ARM7/USB/descriptors.h b/Demo/lwIP_Demo_Rowley_ARM7/USB/descriptors.h
index 4c069198ebfaed24a6d694ab6fca4c8d009d9910..1ddca04679830396462f3c8d6428353c46db0467 100644 (file)
--- a/Demo/lwIP_Demo_Rowley_ARM7/USB/descriptors.h
+++ b/Demo/lwIP_Demo_Rowley_ARM7/USB/descriptors.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/lwIP_Demo_Rowley_ARM7/USB/usb.h b/Demo/lwIP_Demo_Rowley_ARM7/USB/usb.h
index 9c85b57256b6b5a552f20f385ced6985b128a732..7f0e148618d12623292de3463cccd2860e4d58cf 100644 (file)
--- a/Demo/lwIP_Demo_Rowley_ARM7/USB/usb.h
+++ b/Demo/lwIP_Demo_Rowley_ARM7/USB/usb.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/lwIP_Demo_Rowley_ARM7/main.c b/Demo/lwIP_Demo_Rowley_ARM7/main.c
index 05254de09cda6d82636847538b1e1ce0541147af..aeed9bc0dafaf18ccfa7716bf1e662bfe9e5e912 100644 (file)
--- a/Demo/lwIP_Demo_Rowley_ARM7/main.c
+++ b/Demo/lwIP_Demo_Rowley_ARM7/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/lwIP_Demo_Rowley_ARM7/makefile b/Demo/lwIP_Demo_Rowley_ARM7/makefile
index 51a54e22360dcf43b916771574e658554c953280..3bcbc97f415003c3282cb175d6d1eeeef95b7c20 100644 (file)
--- a/Demo/lwIP_Demo_Rowley_ARM7/makefile
+++ b/Demo/lwIP_Demo_Rowley_ARM7/makefile
@@ -1,4 +1,4 @@
-#      FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+#      FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 #\r
 #      This file is part of the FreeRTOS.org distribution.\r
 #\r

diff --git a/Demo/msp430_CrossWorks/FreeRTOSConfig.h b/Demo/msp430_CrossWorks/FreeRTOSConfig.h
index bcf4bdfa2499195a3ebeb795bbddae5c7f2e97dc..b0a35046aeee5d731d64cb8087b0307da1abab8b 100644 (file)
--- a/Demo/msp430_CrossWorks/FreeRTOSConfig.h
+++ b/Demo/msp430_CrossWorks/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/msp430_CrossWorks/ParTest/ParTest.c b/Demo/msp430_CrossWorks/ParTest/ParTest.c
index 03121556d1a149fbce3d5ee490b10b0b9f682b4c..f6cdd8136ef1b70d5be0e4d691eb184165ff530a 100644 (file)
--- a/Demo/msp430_CrossWorks/ParTest/ParTest.c
+++ b/Demo/msp430_CrossWorks/ParTest/ParTest.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/msp430_CrossWorks/main.c b/Demo/msp430_CrossWorks/main.c
index c2ad3e5bd4d8ca6802d1a268229dcf705500caa9..0e157d3ee50f5a7ef279e699bebf5362963806a1 100644 (file)
--- a/Demo/msp430_CrossWorks/main.c
+++ b/Demo/msp430_CrossWorks/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/msp430_CrossWorks/serial/serial.c b/Demo/msp430_CrossWorks/serial/serial.c
index e6ea30184b41e98a0df166b45385035f6db025f9..778c178c243a50d8e9ee8d78585dfc3d8d4c5c59 100644 (file)
--- a/Demo/msp430_CrossWorks/serial/serial.c
+++ b/Demo/msp430_CrossWorks/serial/serial.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/msp430_GCC/FreeRTOSConfig.h b/Demo/msp430_GCC/FreeRTOSConfig.h
index 070116b6ac3514e8eea4042687d98e242f659f26..4bb1f27d4bab558260154d856bc3e41777b180ec 100644 (file)
--- a/Demo/msp430_GCC/FreeRTOSConfig.h
+++ b/Demo/msp430_GCC/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/msp430_GCC/ParTest/ParTest.c b/Demo/msp430_GCC/ParTest/ParTest.c
index db596701c7d08a3a72b74263f94bdbf6bc67fe76..fe5c9c5bec08fdd3620ab777c8b1eefd0938be6c 100644 (file)
--- a/Demo/msp430_GCC/ParTest/ParTest.c
+++ b/Demo/msp430_GCC/ParTest/ParTest.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/msp430_GCC/main.c b/Demo/msp430_GCC/main.c
index 77fa524fd3d94ace1884b16935c0d79c5d7b8162..e320322a7a9dbaa87d0337f35953fd997fc4a3a3 100644 (file)
--- a/Demo/msp430_GCC/main.c
+++ b/Demo/msp430_GCC/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/msp430_GCC/makefile b/Demo/msp430_GCC/makefile
index da524569f4c4494d0d443ea95dde100ad277b9b3..2559f8197343946274fbec685a916c97c23d15ca 100644 (file)
--- a/Demo/msp430_GCC/makefile
+++ b/Demo/msp430_GCC/makefile
@@ -1,4 +1,4 @@
-#      FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+#      FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 #\r
 #      This file is part of the FreeRTOS.org distribution.\r
 #\r

diff --git a/Demo/msp430_GCC/serial/serial.c b/Demo/msp430_GCC/serial/serial.c
index 61740455369bbfa6bcffc7d250dc1f6754809b31..73a429a7689b2fca53bec26d9c96f0e592aa9e27 100644 (file)
--- a/Demo/msp430_GCC/serial/serial.c
+++ b/Demo/msp430_GCC/serial/serial.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/uIP_Demo_IAR_ARM7/EMAC/EMAClISR.s79 b/Demo/uIP_Demo_IAR_ARM7/EMAC/EMAClISR.s79
index 7a68ed9e397b6c7a142440b91809df87c8c49907..bfac1c737c247ee7511cb630d30f5b3168628118 100644 (file)
--- a/Demo/uIP_Demo_IAR_ARM7/EMAC/EMAClISR.s79
+++ b/Demo/uIP_Demo_IAR_ARM7/EMAC/EMAClISR.s79
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/uIP_Demo_IAR_ARM7/EMAC/SAM7_EMAC.c b/Demo/uIP_Demo_IAR_ARM7/EMAC/SAM7_EMAC.c
index ebba7e8b84837d334092ed67dab2e2cccd38bb25..a1219a6b3197060e762eed4295096ce7c589c9e0 100644 (file)
--- a/Demo/uIP_Demo_IAR_ARM7/EMAC/SAM7_EMAC.c
+++ b/Demo/uIP_Demo_IAR_ARM7/EMAC/SAM7_EMAC.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/uIP_Demo_IAR_ARM7/FreeRTOSConfig.h b/Demo/uIP_Demo_IAR_ARM7/FreeRTOSConfig.h
index 454dfa8ad515a0ff2ed0acb3056a5f4046e11865..b9e1514dd643fc057731f355c6bf64ab31469560 100644 (file)
--- a/Demo/uIP_Demo_IAR_ARM7/FreeRTOSConfig.h
+++ b/Demo/uIP_Demo_IAR_ARM7/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/uIP_Demo_IAR_ARM7/ParTest/ParTest.c b/Demo/uIP_Demo_IAR_ARM7/ParTest/ParTest.c
index c5024396152fda17474d25e7564a932582991b15..10826f9414a1712d9554780b5a5a2aa5fbe0884b 100644 (file)
--- a/Demo/uIP_Demo_IAR_ARM7/ParTest/ParTest.c
+++ b/Demo/uIP_Demo_IAR_ARM7/ParTest/ParTest.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/uIP_Demo_IAR_ARM7/main.c b/Demo/uIP_Demo_IAR_ARM7/main.c
index d0fa5d81edf2ff674ba8f2220f9178898e2fd5eb..bf7b4b6b8beb9e34e03b327f60902c00cbbaafec 100644 (file)
--- a/Demo/uIP_Demo_IAR_ARM7/main.c
+++ b/Demo/uIP_Demo_IAR_ARM7/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/uIP_Demo_Rowley_ARM7/FreeRTOSConfig.h b/Demo/uIP_Demo_Rowley_ARM7/FreeRTOSConfig.h
index e0d0fcd8ab8fa1d1774f54c582c29b0645db0bf2..35492d3a75cfb5b932c06e9e10593d060afc185d 100644 (file)
--- a/Demo/uIP_Demo_Rowley_ARM7/FreeRTOSConfig.h
+++ b/Demo/uIP_Demo_Rowley_ARM7/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Demo/uIP_Demo_Rowley_ARM7/main.c b/Demo/uIP_Demo_Rowley_ARM7/main.c
index fffba35e84738e02a86783b7c0a83317c2d76aff..665510227b0dedacdf6f09e084429df398e33aad 100644 (file)
--- a/Demo/uIP_Demo_Rowley_ARM7/main.c
+++ b/Demo/uIP_Demo_Rowley_ARM7/main.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/croutine.c b/Source/croutine.c
index d5e0727f1cbaa304ce90f50c89a0d42ee30f39d9..5c9b36935124aa250f4caf18e9c3f0d40941e2a0 100644 (file)
--- a/Source/croutine.c
+++ b/Source/croutine.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/include/FreeRTOS.h b/Source/include/FreeRTOS.h
index 3c02e6c6f5195f467c58c429d4a467502559c5e5..9369e8a0782028171d31daff9dec4b7ebf193798 100644 (file)
--- a/Source/include/FreeRTOS.h
+++ b/Source/include/FreeRTOS.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/include/croutine.h b/Source/include/croutine.h
index aad7b73a0214222ad2c1159ab69639c412f9e581..7f788fac32f46d07ab357fde83ac17785e15da3f 100644 (file)
--- a/Source/include/croutine.h
+++ b/Source/include/croutine.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/include/list.h b/Source/include/list.h
index 380e7130d51d0a99c0d9b7a19f09e4ea2c493691..402ecfcfe3e50efc5860b215e996f35e805a036c 100644 (file)
--- a/Source/include/list.h
+++ b/Source/include/list.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/include/portable.h b/Source/include/portable.h
index 64bdb5c2413eec1d89fc09afe32fd5feb4e63160..ac0de0b9e95a0727232ceb454d5644d8338747b8 100644 (file)
--- a/Source/include/portable.h
+++ b/Source/include/portable.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/include/projdefs.h b/Source/include/projdefs.h
index 80106808b192248c41f0fa62711ff10aa975aabc..f1257e7536928bfe88b98a1b6696f1b058899198 100644 (file)
--- a/Source/include/projdefs.h
+++ b/Source/include/projdefs.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/include/queue.h b/Source/include/queue.h
index b49f61401881ba358e49b2b1241eec9be2c48764..6f6fdb7b4a9c0b311d74ecfbf747094879b759b8 100644 (file)
--- a/Source/include/queue.h
+++ b/Source/include/queue.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r
@@ -715,11 +715,11 @@ signed portBASE_TYPE xQueueGenericSend( xQueueHandle xQueue, const void * const
  * \defgroup xQueueReceive xQueueReceive\r
  * \ingroup QueueManagement\r
  */\r
-signed portBASE_TYPE xQueueGenericReceive( xQueueHandle xQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeek );\r
+signed portBASE_TYPE xQueueGenericReceive( xQueueHandle xQueue, const void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeek );\r
 \r
 /**\r
  * queue. h\r
- * <pre>unsigned portBASE_TYPE uxQueueMessagesWaiting( xQueueHandle xQueue );</pre>\r
+ * <pre>unsigned portBASE_TYPE uxQueueMessagesWaiting( const xQueueHandle xQueue );</pre>\r
  *\r
  * Return the number of messages stored in a queue.\r
  *\r
@@ -730,7 +730,7 @@ signed portBASE_TYPE xQueueGenericReceive( xQueueHandle xQueue, void * const pvB
  * \page uxQueueMessagesWaiting uxQueueMessagesWaiting\r
  * \ingroup QueueManagement\r
  */\r
-unsigned portBASE_TYPE uxQueueMessagesWaiting( xQueueHandle xQueue );\r
+unsigned portBASE_TYPE uxQueueMessagesWaiting( const xQueueHandle xQueue );\r
 \r
 /**\r
  * queue. h\r
@@ -1153,7 +1153,7 @@ signed portBASE_TYPE xQueueGenericSendFromISR( xQueueHandle pxQueue, const void
  * \defgroup xQueueReceiveFromISR xQueueReceiveFromISR\r
  * \ingroup QueueManagement\r
  */\r
-signed portBASE_TYPE xQueueReceiveFromISR( xQueueHandle pxQueue, void * const pvBuffer, signed portBASE_TYPE *pxTaskWoken );\r
+signed portBASE_TYPE xQueueReceiveFromISR( xQueueHandle pxQueue, const void * const pvBuffer, signed portBASE_TYPE *pxTaskWoken );\r
 \r
 \r
 /*\r

diff --git a/Source/include/semphr.h b/Source/include/semphr.h
index 18bbb444d8511907e8193b15bce3557a4e6884ff..446b0a5a074deb336665072dd020ea5880074148 100644 (file)
--- a/Source/include/semphr.h
+++ b/Source/include/semphr.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/include/task.h b/Source/include/task.h
index 6535fc8b36c1b13e337fffda73d71579fb79fd94..26acbfd8c57a85293600a99df0f9208f981dbd86 100644 (file)
--- a/Source/include/task.h
+++ b/Source/include/task.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/list.c b/Source/list.c
index 67610fe3ff6d1f1da2a75b372ca590dd1a3d90f8..e675535e9b170a5e91cbbfce1f9cb09e83165611 100644 (file)
--- a/Source/list.c
+++ b/Source/list.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/BCC/16BitDOS/Flsh186/port.c b/Source/portable/BCC/16BitDOS/Flsh186/port.c
index 1de35857dab9791c62f7361d4c9002c87b3cd8f4..511020ad35dc517e5367e3fee869944a576cf780 100644 (file)
--- a/Source/portable/BCC/16BitDOS/Flsh186/port.c
+++ b/Source/portable/BCC/16BitDOS/Flsh186/port.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/BCC/16BitDOS/Flsh186/prtmacro.h b/Source/portable/BCC/16BitDOS/Flsh186/prtmacro.h
index ee3c95a24febd116ae16ec1f7ca255bb87979aa0..f09ea541486ccb0f46109f665a07a4e6817730d2 100644 (file)
--- a/Source/portable/BCC/16BitDOS/Flsh186/prtmacro.h
+++ b/Source/portable/BCC/16BitDOS/Flsh186/prtmacro.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/BCC/16BitDOS/PC/port.c b/Source/portable/BCC/16BitDOS/PC/port.c
index 34f692307c67ce1fdab044fb58426c3798b5c492..d49b6b1cf60f9e2fea43f4aaee4d256e0e9ea4d8 100644 (file)
--- a/Source/portable/BCC/16BitDOS/PC/port.c
+++ b/Source/portable/BCC/16BitDOS/PC/port.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/BCC/16BitDOS/PC/prtmacro.h b/Source/portable/BCC/16BitDOS/PC/prtmacro.h
index baa0715bc315285c029096048f78bdc6fe5905c9..9c962aa911d19315765d52535a8abf523fc17cf4 100644 (file)
--- a/Source/portable/BCC/16BitDOS/PC/prtmacro.h
+++ b/Source/portable/BCC/16BitDOS/PC/prtmacro.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/BCC/16BitDOS/common/portasm.h b/Source/portable/BCC/16BitDOS/common/portasm.h
index 6581198cb60d6f496642421bd38896d7836fe6d6..fdc9acef25902d5fb4779c8c81b9d13096c63ff0 100644 (file)
--- a/Source/portable/BCC/16BitDOS/common/portasm.h
+++ b/Source/portable/BCC/16BitDOS/common/portasm.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/BCC/16BitDOS/common/portcomn.c b/Source/portable/BCC/16BitDOS/common/portcomn.c
index 08c3cfe1d3657a0b199313f8fe2c4fea67967b7a..dd7adc3ac200b1580fb329ec391cc5ad6c244633 100644 (file)
--- a/Source/portable/BCC/16BitDOS/common/portcomn.c
+++ b/Source/portable/BCC/16BitDOS/common/portcomn.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/CodeWarrior/HCS12/port.c b/Source/portable/CodeWarrior/HCS12/port.c
index ec978ccbc612700bd2fbc57982e22852abc4f62f..07a49ed11a95a8998b0868745f26a6ff33e6736d 100644 (file)
--- a/Source/portable/CodeWarrior/HCS12/port.c
+++ b/Source/portable/CodeWarrior/HCS12/port.c
@@ -1,5 +1,5 @@
 /* \r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/CodeWarrior/HCS12/portmacro.h b/Source/portable/CodeWarrior/HCS12/portmacro.h
index 2b702c5eed619fee3742f842d8c753a90f264923..afb901527fa98b05602ae188f191b1c30457f6a1 100644 (file)
--- a/Source/portable/CodeWarrior/HCS12/portmacro.h
+++ b/Source/portable/CodeWarrior/HCS12/portmacro.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/GCC/ARM7_AT91FR40008/port.c b/Source/portable/GCC/ARM7_AT91FR40008/port.c
index 29a0f3762c23dce19919fc6419299a3ccad6c3a1..11792ad94bb0bbfc574bd446891a6e3563deb637 100644 (file)
--- a/Source/portable/GCC/ARM7_AT91FR40008/port.c
+++ b/Source/portable/GCC/ARM7_AT91FR40008/port.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/GCC/ARM7_AT91FR40008/portISR.c b/Source/portable/GCC/ARM7_AT91FR40008/portISR.c
index 2e2f01443e983f4bd61d7796bc930ffc00214965..60f9d6e0c9dee559a90c61a1dc4171e8d2474304 100644 (file)
--- a/Source/portable/GCC/ARM7_AT91FR40008/portISR.c
+++ b/Source/portable/GCC/ARM7_AT91FR40008/portISR.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/GCC/ARM7_AT91FR40008/portmacro.h b/Source/portable/GCC/ARM7_AT91FR40008/portmacro.h
index ff2b8dc1601a2a89bf1b2949df88f502cae495e3..03870c4439c68b8dcbdc39e442f0ce2f02e683f1 100644 (file)
--- a/Source/portable/GCC/ARM7_AT91FR40008/portmacro.h
+++ b/Source/portable/GCC/ARM7_AT91FR40008/portmacro.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/GCC/ARM7_AT91SAM7S/port.c b/Source/portable/GCC/ARM7_AT91SAM7S/port.c
index c945f130e9754096a9dd627553ebdac9cd793427..6c2c9dbec8eacf17217fd84b5d18f225bc7d13cf 100644 (file)
--- a/Source/portable/GCC/ARM7_AT91SAM7S/port.c
+++ b/Source/portable/GCC/ARM7_AT91SAM7S/port.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/GCC/ARM7_AT91SAM7S/portISR.c b/Source/portable/GCC/ARM7_AT91SAM7S/portISR.c
index d575864bc29156c68a680e8d0ad011a104f2b635..e5582cc19011358ccd32283ec222e107e048e0d4 100644 (file)
--- a/Source/portable/GCC/ARM7_AT91SAM7S/portISR.c
+++ b/Source/portable/GCC/ARM7_AT91SAM7S/portISR.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/GCC/ARM7_AT91SAM7S/portmacro.h b/Source/portable/GCC/ARM7_AT91SAM7S/portmacro.h
index e9257d61c4dd1599af4b1244e63594dea5cc0f29..53fc77d0cf447a635d599ff21886f36f8cc4777f 100644 (file)
--- a/Source/portable/GCC/ARM7_AT91SAM7S/portmacro.h
+++ b/Source/portable/GCC/ARM7_AT91SAM7S/portmacro.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/GCC/ARM7_LPC2000/port.c b/Source/portable/GCC/ARM7_LPC2000/port.c
index 817c7ef779882ac5a80676f8fc2653762d14d865..844bed4894b386c13390e604d9d076d6bfb22b40 100644 (file)
--- a/Source/portable/GCC/ARM7_LPC2000/port.c
+++ b/Source/portable/GCC/ARM7_LPC2000/port.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/GCC/ARM7_LPC2000/portISR.c b/Source/portable/GCC/ARM7_LPC2000/portISR.c
index e0f1e7335a1e13ba0e4156fc21f84718f0e25405..fe2316a38dfdff3d47deeefc5802fd2016ffbe78 100644 (file)
--- a/Source/portable/GCC/ARM7_LPC2000/portISR.c
+++ b/Source/portable/GCC/ARM7_LPC2000/portISR.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/GCC/ARM7_LPC2000/portmacro.h b/Source/portable/GCC/ARM7_LPC2000/portmacro.h
index e9257d61c4dd1599af4b1244e63594dea5cc0f29..53fc77d0cf447a635d599ff21886f36f8cc4777f 100644 (file)
--- a/Source/portable/GCC/ARM7_LPC2000/portmacro.h
+++ b/Source/portable/GCC/ARM7_LPC2000/portmacro.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/GCC/ARM7_LPC23xx/port.c b/Source/portable/GCC/ARM7_LPC23xx/port.c
index d9a843e0d879bbba46b212bedc6c90961f396a02..46cac787a67573b0395fa7e51a763b9e7de2d4dc 100644 (file)
--- a/Source/portable/GCC/ARM7_LPC23xx/port.c
+++ b/Source/portable/GCC/ARM7_LPC23xx/port.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r
@@ -98,7 +98,7 @@ portSTACK_TYPE *pxOriginalTOS;
        *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE;               \r
        pxTopOfStack--;\r
 \r
-       *pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa;  /* R14 */\r
+       *pxTopOfStack = ( portSTACK_TYPE ) 0x00000000;  /* R14 */\r
        pxTopOfStack--; \r
        *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */\r
        pxTopOfStack--;\r
@@ -223,7 +223,7 @@ unsigned portLONG ulCompareMatch;
        }\r
        #endif\r
 \r
-       VICVectPriority4 = 1;\r
+       VICVectCntl4 = 1;\r
 \r
        /* Start the timer - interrupts are disabled when this function is called\r
        so it is okay to do this here. */\r

diff --git a/Source/portable/GCC/ARM7_LPC23xx/portISR.c b/Source/portable/GCC/ARM7_LPC23xx/portISR.c
index 9a743ba07b63f95320742495f08df9da54d49fcc..d534df8d138ac610f4123cd857a98c228f9e68aa 100644 (file)
--- a/Source/portable/GCC/ARM7_LPC23xx/portISR.c
+++ b/Source/portable/GCC/ARM7_LPC23xx/portISR.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r
@@ -108,9 +108,6 @@ void vPortYieldProcessor( void )
        void vNonPreemptiveTick( void ) __attribute__ ((interrupt ("IRQ")));\r
        void vNonPreemptiveTick( void )\r
        {       \r
-\r
-               FIO2SET |= (1<<0);\r
-\r
                vTaskIncrementTick();\r
                T0IR = 2;\r
                VICVectAddr = portCLEAR_VIC_INTERRUPT;\r
@@ -133,7 +130,7 @@ void vPortYieldProcessor( void )
 \r
                /* Ready for the next interrupt. */\r
                T0IR = 2;\r
-               VICAddress = portCLEAR_VIC_INTERRUPT;\r
+               VICVectAddr = portCLEAR_VIC_INTERRUPT;\r
                \r
                /* Restore the context of the new task. */\r
                portRESTORE_CONTEXT();\r

diff --git a/Source/portable/GCC/ARM7_LPC23xx/portmacro.h b/Source/portable/GCC/ARM7_LPC23xx/portmacro.h
index 281f6cea4a1c6fbcc0e1482a1bb07e10d2c2c9bd..c068fcb77991b930908146d204e1574d93937db4 100644 (file)
--- a/Source/portable/GCC/ARM7_LPC23xx/portmacro.h
+++ b/Source/portable/GCC/ARM7_LPC23xx/portmacro.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/GCC/ARM_CM3/port.c b/Source/portable/GCC/ARM_CM3/port.c
index 59ba1122a01dbe026a63d3b7181f6cd1e1181def..c7ce3b82640b35a4bd53fdd7e6528b8594aff7c5 100644 (file)
--- a/Source/portable/GCC/ARM_CM3/port.c
+++ b/Source/portable/GCC/ARM_CM3/port.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r
@@ -38,6 +38,11 @@
 \r
        + Reduced the code used to setup the initial stack frame.\r
        + The kernel no longer has to install or handle the fault interrupt.\r
+       \r
+       Change from V4.4.0:\r
+\r
+       + Introduced usage of configKERNEL_INTERRUPT_PRIORITY macro to set the\r
+         interrupt priority used by the kernel.\r
 */\r
 \r
 \r
@@ -49,23 +54,32 @@
 #include "FreeRTOS.h"\r
 #include "task.h"\r
 \r
+/* For backward compatibility, ensure configKERNEL_INTERRUPT_PRIORITY is \r
+defined.  The value should also ensure backward compatibility.  \r
+FreeRTOS.org versions prior to V4.4.0 did not include this definition. */\r
+#ifndef configKERNEL_INTERRUPT_PRIORITY\r
+       #define configKERNEL_INTERRUPT_PRIORITY 255\r
+#endif\r
+\r
 /* Constants required to manipulate the NVIC. */\r
 #define portNVIC_SYSTICK_CTRL          ( ( volatile unsigned portLONG *) 0xe000e010 )\r
 #define portNVIC_SYSTICK_LOAD          ( ( volatile unsigned portLONG *) 0xe000e014 )\r
 #define portNVIC_INT_CTRL                      ( ( volatile unsigned portLONG *) 0xe000ed04 )\r
 #define portNVIC_SYSPRI2                       ( ( volatile unsigned portLONG *) 0xe000ed20 )\r
-#define portNVIC_SYSPRI1                       ( ( volatile unsigned portLONG *) 0xe000ed1c )\r
 #define portNVIC_SYSTICK_CLK           0x00000004\r
 #define portNVIC_SYSTICK_INT           0x00000002\r
 #define portNVIC_SYSTICK_ENABLE                0x00000001\r
 #define portNVIC_PENDSVSET                     0x10000000\r
-#define portNVIC_PENDSV_PRI                    0x00ff0000\r
-#define portNVIC_SVCALL_PRI                    0xff000000\r
-#define portNVIC_SYSTICK_PRI           0xff000000\r
+#define portNVIC_PENDSV_PRI                    ( ( ( unsigned portLONG ) configKERNEL_INTERRUPT_PRIORITY ) << 16 )\r
+#define portNVIC_SYSTICK_PRI           ( ( ( unsigned portLONG ) configKERNEL_INTERRUPT_PRIORITY ) << 24 )\r
 \r
 /* Constants required to set up the initial stack. */\r
 #define portINITIAL_XPSR                       ( 0x01000000 )\r
 \r
+/* The priority used by the kernel is assigned to a variable to make access\r
+from inline assembler easier. */\r
+const unsigned portLONG ulKernelPriority = configKERNEL_INTERRUPT_PRIORITY;\r
+\r
 /* Each task maintains its own interrupt status in the critical nesting\r
 variable. */\r
 unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;\r
@@ -100,7 +114,7 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE
        pxTopOfStack--;\r
        *pxTopOfStack = ( portSTACK_TYPE ) pxCode;      /* PC */\r
        pxTopOfStack--;\r
-       *pxTopOfStack = 0xfffffffd;     /* LR */\r
+       *pxTopOfStack = 0;      /* LR */\r
        pxTopOfStack -= 5;      /* R12, R3, R2 and R1. */\r
        *pxTopOfStack = ( portSTACK_TYPE ) pvParameters;        /* R0 */\r
        pxTopOfStack -= 9;      /* R11, R10, R9, R8, R7, R6, R5 and R4. */\r
@@ -129,7 +143,7 @@ void prvSetMSP( unsigned long ulValue )
  */\r
 portBASE_TYPE xPortStartScheduler( void )\r
 {\r
-       /* Make PendSV, CallSV and SysTick the lowest priority interrupts. */\r
+       /* Make PendSV, CallSV and SysTick the same priroity as the kernel. */\r
        *(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;\r
        *(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;\r
 \r
@@ -193,33 +207,26 @@ void xPortPendSVHandler( void )
        "       mrs r0, psp                                             \n"\r
        "       cbz r0, no_save                                 \n"\r
        "                                                                       \n"     /* Save the context into the TCB. */                                    \r
-       "       sub r0, #0x20                                   \n"\r
-       "       stm r0, {r4-r11}                                \n"\r
-       "       nop                                                             \n"\r
+       "       stmdb r0!, {r4-r11}                             \n"\r
        "       sub r0, #0x04                                   \n"\r
        "       ldr r1, uxCriticalNestingConst  \n"\r
+       "       ldr r2, pxCurrentTCBConst               \n"\r
        "       ldr r1, [r1]                                    \n"\r
-       "       stm r0, {r1}                                    \n"\r
-       "       ldr r1, pxCurrentTCBConst               \n"\r
-       "       ldr r1, [r1]                                    \n"\r
-       "       str r0, [r1]                                    \n"\r
+       "       ldr r2, [r2]                                    \n"\r
+       "       str r1, [r0]                                    \n"                     \r
+       "       str r0, [r2]                                    \n"\r
        "                                                                       \n"\r
        "no_save:\n"    \r
-       "       ldr r0, vTaskSwitchContextConst \n"     /* Find the task to execute. */\r
        "       push {r14}                                              \n"\r
-       "       cpsid i                                                 \n"\r
-       "       blx r0                                                  \n"\r
-       "       cpsie i                                                 \n"\r
+       "       bl vPortSwitchContext                   \n"\r
        "       pop {r14}                                               \n"\r
        "                                                                       \n"     /* Restore the context. */      \r
        "       ldr r1, pxCurrentTCBConst               \n"\r
        "       ldr r1, [r1]                                    \n"\r
        "       ldr r0, [r1]                                    \n"\r
-       "       ldm r0, {r1, r4-r11}                    \n"\r
-       "       nop                                                             \n"\r
+       "       ldmia r0!, {r1, r4-r11}                 \n"\r
        "       ldr r2, uxCriticalNestingConst  \n"\r
        "       str r1, [r2]                                    \n"\r
-       "       add r0, #0x24                                   \n"\r
        "       msr psp, r0                                             \n"\r
        "       orr r14, #0xd                                   \n"\r
        "                                                                       \n"     /* Exit with interrupts in the state required by the task. */   \r
@@ -227,11 +234,12 @@ void xPortPendSVHandler( void )
        "       bx r14                                                  \n"\r
        "                                                                       \n"\r
        "sv_disable_interrupts:                         \n"\r
-       "       cpsid i                                                 \n"\r
+       "       ldr r1, =ulKernelPriority               \n"\r
+       "       ldr r1, [r1]                                    \n"\r
+       "       msr     basepri, r1                                     \n"\r
        "       bx r14                                                  \n"\r
        "                                                                       \n"\r
        "       .align 2                                                \n"\r
-       "vTaskSwitchContextConst: .word vTaskSwitchContext      \n"\r
        "pxCurrentTCBConst: .word pxCurrentTCB                          \n"\r
        "uxCriticalNestingConst: .word uxCriticalNesting        \n"\r
        );\r
@@ -246,11 +254,8 @@ void xPortSysTickHandler( void )
        /* Call the scheduler tick function. */\r
        __asm volatile\r
        ( \r
-       "       ldr r0, vTaskIncrementTickConst         \n"\r
        "       push {r14}                                                      \n"\r
-       "       cpsid i                                                         \n"\r
-       "       blx r0                                                          \n"\r
-       "       cpsie i                                                         \n"\r
+       "       bl vPortIncrementTick                           \n"\r
        "       pop {r14}" \r
        );\r
 \r
@@ -259,8 +264,7 @@ void xPortSysTickHandler( void )
        __asm volatile\r
        ( \r
        "       push {r14}                                                      \n"\r
-       "       ldr r0, vPortYieldFromISRConst2         \n"\r
-       "       blx r0                                                          \n"\r
+       "       bl vPortYieldFromISR                            \n"\r
        "       pop {r14}" \r
        );\r
        #endif\r
@@ -277,12 +281,12 @@ void xPortSysTickHandler( void )
    __asm volatile\r
    (\r
        "tick_disable_interrupts:                               \n"\r
-       "    cpsid i                                                    \n"\r
+       "       ldr r1, =ulKernelPriority                       \n"\r
+       "       ldr r1, [r1]                                            \n"\r
+       "       msr     basepri, r1                                             \n"\r
        "    bx r14                                                             \n"\r
        "                                                                               \n"\r
        "       .align 2                                                        \n"\r
-       "vPortYieldFromISRConst2: .word vPortYieldFromISR\n"\r
-       "vTaskIncrementTickConst: .word vTaskIncrementTick\n" \r
        "uxCriticalNestingConst2: .word uxCriticalNesting"\r
        );\r
 }\r
@@ -298,5 +302,22 @@ void prvSetupTimerInterrupt( void )
        *(portNVIC_SYSTICK_LOAD) = configCPU_CLOCK_HZ / configTICK_RATE_HZ;\r
        *(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;\r
 }\r
+/*-----------------------------------------------------------*/\r
+\r
+void vPortSwitchContext( void )\r
+{\r
+       vPortSetInterruptMask();\r
+       vTaskSwitchContext();\r
+       vPortClearInterruptMask();\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vPortIncrementTick( void )\r
+{\r
+       vPortSetInterruptMask();\r
+       vTaskIncrementTick();\r
+       vPortClearInterruptMask();\r
+}\r
 \r
+/*-----------------------------------------------------------*/\r
 \r

diff --git a/Source/portable/GCC/ARM_CM3/portmacro.h b/Source/portable/GCC/ARM_CM3/portmacro.h
index 10de80e104e8d371768dac1824f76e96afd79827..d4f236407d80d78a74e8a2586dec6bd1878dbafd 100644 (file)
--- a/Source/portable/GCC/ARM_CM3/portmacro.h
+++ b/Source/portable/GCC/ARM_CM3/portmacro.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r
@@ -33,6 +33,12 @@
        ***************************************************************************\r
 */\r
 \r
+/*\r
+       Change from V4.4.0:\r
+\r
+       + Introduced usage of configKERNEL_INTERRUPT_PRIORITY macro to set the\r
+         interrupt priority used by the kernel.\r
+*/\r
 \r
 #ifndef PORTMACRO_H\r
 #define PORTMACRO_H\r
@@ -83,12 +89,35 @@ extern void vPortYieldFromISR( void );
 \r
 /* Critical section management. */\r
 \r
-extern void vPortEnableInterrupts( void );\r
+#define vPortSetInterruptMask()                                                        \\r
+       __asm volatile                                                                          \\r
+       (                                                                                                       \\r
+               "       push { r0 }                                                             \n"     \\r
+               "       ldr r0, =ulKernelPriority                               \n"     \\r
+               "       ldr r0, [r0]                                                    \n"     \\r
+               "       msr basepri, r0                                                 \n" \\r
+               "       pop { r0 }                                                              "       \\r
+       )\r
+       \r
+/*-----------------------------------------------------------*/\r
+\r
+#define vPortClearInterruptMask()                                              \\r
+       __asm volatile                                                                          \\r
+       (                                                                                                       \\r
+               "       push { r0 }                                                             \n"     \\r
+               "       mov r0, #0                                                              \n"     \\r
+               "       msr basepri, r0                                                 \n"     \\r
+               "       pop      { r0 }                                                         "       \\r
+       )\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+\r
 extern void vPortEnterCritical( void );\r
 extern void vPortExitCritical( void );\r
 \r
-#define portDISABLE_INTERRUPTS()       __asm volatile( "cpsid i" )\r
-#define portENABLE_INTERRUPTS()                __asm volatile( "cpsie i" )\r
+#define portDISABLE_INTERRUPTS()       vPortSetInterruptMask();\r
+#define portENABLE_INTERRUPTS()                vPortClearInterruptMask();\r
 #define portENTER_CRITICAL()           vPortEnterCritical()\r
 #define portEXIT_CRITICAL()                    vPortExitCritical()\r
 /*-----------------------------------------------------------*/\r

diff --git a/Source/portable/GCC/ATMega323/port.c b/Source/portable/GCC/ATMega323/port.c
index a2bb2b6f482d162a8bff14b6d0aa441aa25c51a5..daf057149a299dffe65badcbca456fc10bb5b623 100644 (file)
--- a/Source/portable/GCC/ATMega323/port.c
+++ b/Source/portable/GCC/ATMega323/port.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/GCC/ATMega323/portmacro.h b/Source/portable/GCC/ATMega323/portmacro.h
index 37d4415daac9ba2d91406ed759358651e9802c8b..822964f21b063ea5a34e8293926adecaa1ec8755 100644 (file)
--- a/Source/portable/GCC/ATMega323/portmacro.h
+++ b/Source/portable/GCC/ATMega323/portmacro.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/GCC/AVR32_UC3/port.c b/Source/portable/GCC/AVR32_UC3/port.c
index fed014884e4805390226b6191277c1b42896115b..c9f9ccb044e2ff2918ed94b1c34ab9243ef678cc 100644 (file)
--- a/Source/portable/GCC/AVR32_UC3/port.c
+++ b/Source/portable/GCC/AVR32_UC3/port.c
@@ -13,7 +13,7 @@
  *****************************************************************************/\r
 \r
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r
@@ -75,6 +75,8 @@ volatile unsigned portLONG ulCriticalNesting = 9999UL;
 \r
 #if( configTICK_USE_TC==0 )\r
        static void prvScheduleNextTick( void );\r
+#else\r
+       static void prvClearTcInt( void );\r
 #endif\r
 \r
 /* Setup the timer to generate the tick interrupts. */\r
@@ -203,7 +205,7 @@ __attribute__((__naked__)) static void vTick( void )
 \r
        #if( configTICK_USE_TC==1 )\r
                /* Clear the interrupt flag. */\r
-               AVR32_TC.channel[configTICK_TC_CHANNEL].sr;\r
+               prvClearTcInt();\r
        #else\r
                /* Schedule the COUNT&COMPARE match interrupt in (configCPU_CLOCK_HZ/configTICK_RATE_HZ)\r
                clock cycles from now. */\r
@@ -234,7 +236,7 @@ __attribute__((__naked__)) void SCALLYield( void )
 different optimisation levels.  The interrupt flags can therefore not always\r
 be saved to the stack.  Instead the critical section nesting level is stored\r
 in a variable, which is then saved as part of the stack context. */\r
-void vPortEnterCritical( void )\r
+__attribute__((__noinline__)) void vPortEnterCritical( void )\r
 {\r
        /* Disable interrupts */\r
        portDISABLE_INTERRUPTS();\r
@@ -246,7 +248,7 @@ void vPortEnterCritical( void )
 }\r
 /*-----------------------------------------------------------*/\r
 \r
-void vPortExitCritical( void )\r
+__attribute__((__noinline__)) void vPortExitCritical( void )\r
 {\r
        if(ulCriticalNesting > portNO_CRITICAL_NESTING)\r
        {\r
@@ -334,7 +336,7 @@ clock cycles from now. */
                Set_system_register(AVR32_COMPARE, lCycles);\r
        }\r
        \r
-       static void prvScheduleNextTick(void)\r
+       __attribute__((__noinline__)) static void prvScheduleNextTick(void)\r
        {\r
                unsigned long lCycles, lCount;\r
 \r
@@ -353,6 +355,11 @@ clock cycles from now. */
                }\r
                Set_system_register(AVR32_COMPARE, lCycles);\r
        }\r
+#else\r
+       __attribute__((__noinline__)) static void prvClearTcInt(void)\r
+       {\r
+               AVR32_TC.channel[configTICK_TC_CHANNEL].sr;\r
+       }\r
 #endif\r
 /*-----------------------------------------------------------*/\r
 \r

diff --git a/Source/portable/GCC/AVR32_UC3/portmacro.h b/Source/portable/GCC/AVR32_UC3/portmacro.h
index 062074f4f3b832be111b84cd87716ec472e5e06c..9e7bab92725db43861b0a738039bffce00508b92 100644 (file)
--- a/Source/portable/GCC/AVR32_UC3/portmacro.h
+++ b/Source/portable/GCC/AVR32_UC3/portmacro.h
@@ -13,7 +13,7 @@
  *****************************************************************************/\r
 \r
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/GCC/H8S2329/port.c b/Source/portable/GCC/H8S2329/port.c
index bd4a1cc042dda7fa8715749bb987228d9c07cb20..56f95d704523b23b75757673b99fe8ec793f3ede 100644 (file)
--- a/Source/portable/GCC/H8S2329/port.c
+++ b/Source/portable/GCC/H8S2329/port.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/GCC/H8S2329/portmacro.h b/Source/portable/GCC/H8S2329/portmacro.h
index ab956431b7092c75a9d18ce4c6e4b3dd1a7bd9de..fa17bbf0f116d73bbb014d11801005c5665d1312 100644 (file)
--- a/Source/portable/GCC/H8S2329/portmacro.h
+++ b/Source/portable/GCC/H8S2329/portmacro.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/GCC/HCS12/port.c b/Source/portable/GCC/HCS12/port.c
index e61e9f52ad795ce6c888c3bd676444899a2f2f7c..1f7e833aed526c542c5916cabec24c3fdd101779 100644 (file)
--- a/Source/portable/GCC/HCS12/port.c
+++ b/Source/portable/GCC/HCS12/port.c
@@ -1,5 +1,5 @@
 /* \r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/GCC/HCS12/portmacro.h b/Source/portable/GCC/HCS12/portmacro.h
index 56a37414e923f4f2915d7a5d370bd05b7d408d8e..c583dabe6145e4d5c7cf72105f92e61622f70c09 100644 (file)
--- a/Source/portable/GCC/HCS12/portmacro.h
+++ b/Source/portable/GCC/HCS12/portmacro.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/GCC/MSP430F449/port.c b/Source/portable/GCC/MSP430F449/port.c
index 594be3443c8aac3cc3644dc8f3c17e26802203ff..fb64ee6e3d92bcd886f90a8a4978ca625fde0cfd 100644 (file)
--- a/Source/portable/GCC/MSP430F449/port.c
+++ b/Source/portable/GCC/MSP430F449/port.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/GCC/MSP430F449/portmacro.h b/Source/portable/GCC/MSP430F449/portmacro.h
index e521192e2153a16edcbc5150abd2221259fbd5f3..f7cfc83feb3bf97330618f10d67ad05a44f3337b 100644 (file)
--- a/Source/portable/GCC/MSP430F449/portmacro.h
+++ b/Source/portable/GCC/MSP430F449/portmacro.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/GCC/MicroBlaze/port.c b/Source/portable/GCC/MicroBlaze/port.c
index 42170178d3a4f7624c0527cda32befb49b6e1764..b75dcd7a4e915eade65662f6af0a98013d1016d8 100644 (file)
--- a/Source/portable/GCC/MicroBlaze/port.c
+++ b/Source/portable/GCC/MicroBlaze/port.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/GCC/MicroBlaze/portmacro.h b/Source/portable/GCC/MicroBlaze/portmacro.h
index edea6d6acc8ab58da732050c4b6615c2d7b5cb14..bfdc8d73e5c6a718b92de005dd8c2241bbed0de5 100644 (file)
--- a/Source/portable/GCC/MicroBlaze/portmacro.h
+++ b/Source/portable/GCC/MicroBlaze/portmacro.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/GCC/STR75x/port.c b/Source/portable/GCC/STR75x/port.c
index c1c056f280778f39571d653c1ef1fb3b6b528d58..d3215fcfe67f1b19860e89e4bf1298a8d1b16ff1 100644 (file)
--- a/Source/portable/GCC/STR75x/port.c
+++ b/Source/portable/GCC/STR75x/port.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/GCC/STR75x/portISR.c b/Source/portable/GCC/STR75x/portISR.c
index 02f5fb82787ef46787b227e6bb78738a36927bc4..b7698bdbaea26261b26038d8582344316040faea 100644 (file)
--- a/Source/portable/GCC/STR75x/portISR.c
+++ b/Source/portable/GCC/STR75x/portISR.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/GCC/STR75x/portmacro.h b/Source/portable/GCC/STR75x/portmacro.h
index f044e2011e93e86e39952f093f513c382c342ebc..a86ce428862d2a18f1bf7e9cf14257881610618c 100644 (file)
--- a/Source/portable/GCC/STR75x/portmacro.h
+++ b/Source/portable/GCC/STR75x/portmacro.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/IAR/ARM_CM3/port.c b/Source/portable/IAR/ARM_CM3/port.c
index 0c81f993ffef1c0bbf0ca7667e9c1521977bd4e9..b20bc2095c3cc5ea3ca9c7ffe3a3f445398a7fa9 100644 (file)
--- a/Source/portable/IAR/ARM_CM3/port.c
+++ b/Source/portable/IAR/ARM_CM3/port.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r
@@ -65,7 +65,7 @@
 #define portINITIAL_XPSR                       ( 0x01000000 )\r
 \r
 /* For backward compatibility, ensure configKERNEL_INTERRUPT_PRIORITY is\r
-defined.  The value zero should also ensure backward compatibility.\r
+defined.  The value 255 should also ensure backward compatibility.\r
 FreeRTOS.org versions prior to V4.3.0 did not include this definition. */\r
 #ifndef configKERNEL_INTERRUPT_PRIORITY\r
        #define configKERNEL_INTERRUPT_PRIORITY 255\r

diff --git a/Source/portable/IAR/ARM_CM3/portasm.s b/Source/portable/IAR/ARM_CM3/portasm.s
index 35edcf159c170b6e8a9f0ff40ef420ae07e09717..7a3621489823ab01293684b0633010b28b81d6bc 100644 (file)
--- a/Source/portable/IAR/ARM_CM3/portasm.s
+++ b/Source/portable/IAR/ARM_CM3/portasm.s
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r
@@ -42,8 +42,8 @@
 \r
 #include <FreeRTOSConfig.h>\r
 \r
-/* For backward compatibility, ensure configKERNEL_INTERRUPT_PRIORITY is \r
-defined.  The value zero should also ensure backward compatibility.  \r
+/* For backward compatibility, ensure configKERNEL_INTERRUPT_PRIORITY is\r
+defined.  The value zero should also ensure backward compatibility.\r
 FreeRTOS.org versions prior to V4.3.0 did not include this definition. */\r
 #ifndef configKERNEL_INTERRUPT_PRIORITY\r
        #define configKERNEL_INTERRUPT_PRIORITY 0\r
@@ -79,60 +79,53 @@ vSetMSP
 /*-----------------------------------------------------------*/\r
 \r
 xPortPendSVHandler:\r
-       mrs r0, psp\r
-       cbz r0, no_save\r
-       /* Save the context into the TCB. */                                    \r
-       sub r0, r0, #0x20\r
-       stm r0, {r4-r11}\r
-       nop\r
-       sub r0, r0, #0x04\r
+       mrs r0, psp                                             \r
+       cbz r0, no_save                                 \r
+       /* Save the context into the TCB. */\r
+       stmdb r0!, {r4-r11}                             \r
+       sub r0, r0, #0x04                                       \r
        ldr r1, =uxCriticalNesting\r
-       ldr r1, [r1]\r
-       str R1, [r0, #0x00]\r
-       ldr r1, =pxCurrentTCB\r
-       ldr r1, [r1]\r
-       str r0, [r1]\r
+       ldr r2, =pxCurrentTCB           \r
+       ldr r1, [r1]                                    \r
+       ldr r2, [r2]                                    \r
+       str r1, [r0]                                    \r
+       str r0, [r2]                                    \r
+                                                                       \r
 no_save:\r
-       ldr r0, =vPortSwitchContext\r
-       push {r14}\r
-       blx r0\r
-       pop {r14}\r
-       \r
-       /* Restore the context. */      \r
+       push {r14}                                              \r
+       bl vPortSwitchContext                   \r
+       pop {r14}                                               \r
+       /* Restore the context. */              \r
        ldr r1, =pxCurrentTCB\r
-       ldr r1, [r1]\r
-       ldr r0, [r1]\r
-       ldm r0, {r1, r4-r11}\r
-       nop\r
+       ldr r1, [r1]                                    \r
+       ldr r0, [r1]                                    \r
+       ldmia r0!, {r1, r4-r11}                 \r
        ldr r2, =uxCriticalNesting\r
-       str r1, [r2]\r
-       add r0, r0, #0x24\r
-       msr psp, r0\r
-       orr r14, r14, #0xd\r
-       /* Exit with interrupts in the state required by the task. */   \r
-       cbnz r1, sv_disable_interrupts\r
-       bx r14\r
-       \r
-sv_disable_interrupts:\r
+       str r1, [r2]                                    \r
+       msr psp, r0                                             \r
+       orr r14, r14, #0xd                                      \r
+       /* Exit with interrupts in the state required by the task. */\r
+       cbnz r1, sv_disable_interrupts  \r
+       bx r14                                                  \r
+                                                                       \r
+sv_disable_interrupts:                         \r
        mov     r1, #configKERNEL_INTERRUPT_PRIORITY\r
        msr     basepri, R1\r
+       bx r14                                                  \r
 \r
-       bx r14\r
 \r
 /*-----------------------------------------------------------*/\r
 \r
 xPortSysTickHandler:\r
        /* Call the scheduler tick function. */\r
-       ldr r0, =vPortIncrementTick\r
        push {r14}\r
-       blx r0\r
+       bl vPortIncrementTick\r
        pop {r14}\r
        \r
        /* If using preemption, also force a context switch. */\r
        #if configUSE_PREEMPTION == 1\r
                push {r14}\r
-               ldr r0, =vPortYieldFromISR\r
-               blx r0\r
+               bl vPortYieldFromISR\r
                pop {r14}\r
        #endif\r
 \r

diff --git a/Source/portable/IAR/ARM_CM3/portmacro.h b/Source/portable/IAR/ARM_CM3/portmacro.h
index 1e0f5946d63e31b967d02b8ccf6cca7daf2ea9d3..fe4617fc4531cc6cdae580c3b2d81c3152640092 100644 (file)
--- a/Source/portable/IAR/ARM_CM3/portmacro.h
+++ b/Source/portable/IAR/ARM_CM3/portmacro.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r
@@ -90,7 +90,6 @@ extern void vPortYieldFromISR( void );
 \r
 /* Critical section management. */\r
 \r
-extern void vPortEnableInterrupts( void );\r
 extern void vPortEnterCritical( void );\r
 extern void vPortExitCritical( void );\r
 extern void vPortSetInterruptMask( void );\r

diff --git a/Source/portable/IAR/ATMega323/port.c b/Source/portable/IAR/ATMega323/port.c
index fbd3907677eb7d583388c10a0487a937a44f5033..5286b648d16298318d8f2d79fc6be44d8c047d21 100644 (file)
--- a/Source/portable/IAR/ATMega323/port.c
+++ b/Source/portable/IAR/ATMega323/port.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/IAR/ATMega323/portmacro.h b/Source/portable/IAR/ATMega323/portmacro.h
index 50e9161906403ad38d934f9470a1c3e2b8c936c3..78d3605552724e45510ddd0c98b41db17e4e3c9b 100644 (file)
--- a/Source/portable/IAR/ATMega323/portmacro.h
+++ b/Source/portable/IAR/ATMega323/portmacro.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/IAR/ATMega323/portmacro.s90 b/Source/portable/IAR/ATMega323/portmacro.s90
index d173c68cced19fa88eed23e62c4416338c0bf5d7..7b070a2465193e583ca39c653039acad09b8cb88 100644 (file)
--- a/Source/portable/IAR/ATMega323/portmacro.s90
+++ b/Source/portable/IAR/ATMega323/portmacro.s90
@@ -1,4 +1,4 @@
-;      FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+;      FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 ;\r
 ;      This file is part of the FreeRTOS.org distribution.\r
 ;\r

diff --git a/Source/portable/IAR/AVR32_UC3/exception.s82 b/Source/portable/IAR/AVR32_UC3/exception.s82
index 4346bd72889b1ac52a3829c663dbebd42a2bd579..2df712c400fbf9ba438b53ad6f55f9a3ae488d67 100644 (file)
--- a/Source/portable/IAR/AVR32_UC3/exception.s82
+++ b/Source/portable/IAR/AVR32_UC3/exception.s82
@@ -70,107 +70,107 @@ _evba:
         ORG 0x000\r
         // Unrecoverable Exception.\r
 _handle_Unrecoverable_Exception:\r
-        rjmp _handle_Unrecoverable_Exception\r
+        rjmp $\r
 \r
         ORG 0x004\r
         // TLB Multiple Hit: UNUSED IN AVR32UC.\r
 _handle_TLB_Multiple_Hit:\r
-        rjmp _handle_TLB_Multiple_Hit\r
+        rjmp $\r
 \r
         ORG 0x008\r
         // Bus Error Data Fetch.\r
 _handle_Bus_Error_Data_Fetch:\r
-        rjmp _handle_Bus_Error_Data_Fetch\r
+        rjmp $\r
 \r
         ORG 0x00C\r
          // Bus Error Instruction Fetch.\r
 _handle_Bus_Error_Instruction_Fetch:\r
-        rjmp _handle_Bus_Error_Instruction_Fetch\r
+        rjmp $\r
 \r
         ORG 0x010\r
         // NMI.\r
 _handle_NMI:\r
-        rjmp _handle_NMI\r
+        rjmp $\r
 \r
         ORG 0x014\r
         // Instruction Address.\r
 _handle_Instruction_Address:\r
-        rjmp _handle_Instruction_Address\r
+        rjmp $\r
 \r
         ORG 0x018\r
         // ITLB Protection.\r
 _handle_ITLB_Protection:\r
-        rjmp _handle_ITLB_Protection\r
+        rjmp $\r
 \r
         ORG 0x01C\r
         // Breakpoint.\r
 _handle_Breakpoint:\r
-        rjmp _handle_Breakpoint\r
+        rjmp $\r
 \r
         ORG 0x020\r
         // Illegal Opcode.\r
 _handle_Illegal_Opcode:\r
-        rjmp _handle_Illegal_Opcode\r
+        rjmp $\r
 \r
         ORG 0x024\r
         // Unimplemented Instruction.\r
 _handle_Unimplemented_Instruction:\r
-        rjmp _handle_Unimplemented_Instruction\r
+        rjmp $\r
 \r
         ORG 0x028\r
         // Privilege Violation.\r
 _handle_Privilege_Violation:\r
-        rjmp _handle_Privilege_Violation\r
+        rjmp $\r
 \r
         ORG 0x02C\r
         // Floating-Point: UNUSED IN AVR32UC.\r
 _handle_Floating_Point:\r
-        rjmp _handle_Floating_Point\r
+        rjmp $\r
 \r
         ORG 0x030\r
         // Coprocessor Absent: UNUSED IN AVR32UC.\r
 _handle_Coprocessor_Absent:\r
-        rjmp _handle_Coprocessor_Absent\r
+        rjmp $\r
 \r
         ORG 0x034\r
         // Data Address (Read).\r
 _handle_Data_Address_Read:\r
-        rjmp _handle_Data_Address_Read\r
+        rjmp $\r
 \r
         ORG 0x038\r
         // Data Address (Write).\r
 _handle_Data_Address_Write:\r
-        rjmp _handle_Data_Address_Write\r
+        rjmp $\r
 \r
         ORG 0x03C\r
         // DTLB Protection (Read).\r
 _handle_DTLB_Protection_Read:\r
-        rjmp _handle_DTLB_Protection_Read\r
+        rjmp $\r
 \r
         ORG 0x040\r
         // DTLB Protection (Write).\r
 _handle_DTLB_Protection_Write:\r
-        rjmp _handle_DTLB_Protection_Write\r
+        rjmp $\r
 \r
         ORG 0x044\r
         // DTLB Modified: UNUSED IN AVR32UC.\r
 _handle_DTLB_Modified:\r
-        rjmp _handle_DTLB_Modified\r
+        rjmp $\r
 \r
         ORG 0x050\r
         // ITLB Miss: UNUSED IN AVR32UC.\r
 _handle_ITLB_Miss:\r
-        rjmp _handle_ITLB_Miss\r
+        rjmp $\r
 \r
         ORG 0x060\r
         // DTLB Miss (Read): UNUSED IN AVR32UC.\r
 _handle_DTLB_Miss_Read:\r
-        rjmp _handle_DTLB_Miss_Read\r
+        rjmp $\r
 \r
         ORG 0x070\r
         // DTLB Miss (Write): UNUSED IN AVR32UC.\r
 _handle_DTLB_Miss_Write:\r
-        rjmp _handle_DTLB_Miss_Write\r
+        rjmp $\r
 \r
         ORG 0x100\r
         // Supervisor Call.\r

diff --git a/Source/portable/IAR/AVR32_UC3/port.c b/Source/portable/IAR/AVR32_UC3/port.c
index 770d61f3d89ef2dcc6d73cd55eab0207ff7c25d6..8ccbdf2650de1621767079350713ff68c5d16ee2 100644 (file)
--- a/Source/portable/IAR/AVR32_UC3/port.c
+++ b/Source/portable/IAR/AVR32_UC3/port.c
@@ -13,7 +13,7 @@
  *****************************************************************************/\r
 \r
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r
@@ -76,6 +76,8 @@ volatile unsigned portLONG ulCriticalNesting = 9999UL;
 \r
 #if( configTICK_USE_TC==0 )\r
        static void prvScheduleNextTick( void );\r
+#else\r
+       static void prvClearTcInt( void );\r
 #endif\r
 \r
 /* Setup the timer to generate the tick interrupts. */\r
@@ -169,7 +171,7 @@ static void vTick( void )
 \r
        #if( configTICK_USE_TC==1 )\r
                /* Clear the interrupt flag. */\r
-               AVR32_TC.channel[configTICK_TC_CHANNEL].sr;\r
+               prvClearTcInt();\r
        #else\r
                /* Schedule the COUNT&COMPARE match interrupt in (configCPU_CLOCK_HZ/configTICK_RATE_HZ)\r
                clock cycles from now. */\r
@@ -201,6 +203,7 @@ void SCALLYield( void )
 different optimisation levels.  The interrupt flags can therefore not always\r
 be saved to the stack.  Instead the critical section nesting level is stored\r
 in a variable, which is then saved as part of the stack context. */\r
+#pragma optimize = no_inline\r
 void vPortEnterCritical( void )\r
 {\r
        /* Disable interrupts */\r
@@ -213,6 +216,7 @@ void vPortEnterCritical( void )
 }\r
 /*-----------------------------------------------------------*/\r
 \r
+#pragma optimize = no_inline\r
 void vPortExitCritical( void )\r
 {\r
        if(ulCriticalNesting > portNO_CRITICAL_NESTING)\r
@@ -301,6 +305,7 @@ clock cycles from now. */
                Set_system_register(AVR32_COMPARE, lCycles);\r
        }\r
        \r
+       #pragma optimize = no_inline\r
        static void prvScheduleNextTick(void)\r
        {\r
                unsigned long lCycles, lCount;\r
@@ -320,6 +325,12 @@ clock cycles from now. */
                }\r
                Set_system_register(AVR32_COMPARE, lCycles);\r
        }\r
+#else\r
+       #pragma optimize = no_inline\r
+       static void prvClearTcInt(void)\r
+       {\r
+               AVR32_TC.channel[configTICK_TC_CHANNEL].sr;\r
+       }\r
 #endif\r
 /*-----------------------------------------------------------*/\r
 \r

diff --git a/Source/portable/IAR/AVR32_UC3/portmacro.h b/Source/portable/IAR/AVR32_UC3/portmacro.h
index d60b84614016741a689ce03c364a1acb8c73bdaa..6847fd9cea417e6f5e426713a1497d404e648500 100644 (file)
--- a/Source/portable/IAR/AVR32_UC3/portmacro.h
+++ b/Source/portable/IAR/AVR32_UC3/portmacro.h
@@ -13,7 +13,7 @@
  *****************************************************************************/\r
 \r
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/IAR/AtmelSAM7S64/port.c b/Source/portable/IAR/AtmelSAM7S64/port.c
index fd83fd0a380f4404c41f513d1449c3f7b58e20d7..5afd07b76940ab56db4c03566cc6b7428383a4d0 100644 (file)
--- a/Source/portable/IAR/AtmelSAM7S64/port.c
+++ b/Source/portable/IAR/AtmelSAM7S64/port.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/IAR/AtmelSAM7S64/portmacro.h b/Source/portable/IAR/AtmelSAM7S64/portmacro.h
index 332288d8a5830a07c0d44aec7c83ea0ae993b7c0..9dad6b874bc9a7ccad14aa2ad3691f15f7942d94 100644 (file)
--- a/Source/portable/IAR/AtmelSAM7S64/portmacro.h
+++ b/Source/portable/IAR/AtmelSAM7S64/portmacro.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/IAR/LPC2000/port.c b/Source/portable/IAR/LPC2000/port.c
index e6d717fe5c94f34cda6fb0c669f2fcb9d4ece345..44a16d30bde0b1c1789b716f4701ee90b10d7ca6 100644 (file)
--- a/Source/portable/IAR/LPC2000/port.c
+++ b/Source/portable/IAR/LPC2000/port.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/IAR/LPC2000/portmacro.h b/Source/portable/IAR/LPC2000/portmacro.h
index 332288d8a5830a07c0d44aec7c83ea0ae993b7c0..9dad6b874bc9a7ccad14aa2ad3691f15f7942d94 100644 (file)
--- a/Source/portable/IAR/LPC2000/portmacro.h
+++ b/Source/portable/IAR/LPC2000/portmacro.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/IAR/STR71x/port.c b/Source/portable/IAR/STR71x/port.c
index c55add2f85ce8febd6f5f63d743e110cc7e6567e..749105c067aaab04b638aadbe495df1ba136ee3d 100644 (file)
--- a/Source/portable/IAR/STR71x/port.c
+++ b/Source/portable/IAR/STR71x/port.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/IAR/STR71x/portmacro.h b/Source/portable/IAR/STR71x/portmacro.h
index 7c6732201919d90f906e94ac87b15fafdf7f86cc..f0cf9c9e008aaad958006d41958c53fc0a5d0b5c 100644 (file)
--- a/Source/portable/IAR/STR71x/portmacro.h
+++ b/Source/portable/IAR/STR71x/portmacro.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/IAR/STR75x/ISR_Support.h b/Source/portable/IAR/STR75x/ISR_Support.h
index f56cb479b2a7141df2525d9ba3d3e6c3c1ab5731..56b70f5ef4d58f77917f8f6e9015c0e0cbb95b4a 100644 (file)
--- a/Source/portable/IAR/STR75x/ISR_Support.h
+++ b/Source/portable/IAR/STR75x/ISR_Support.h
@@ -1,4 +1,4 @@
-;      FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+;      FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 ;\r
 ;      This file is part of the FreeRTOS.org distribution.\r
 ;\r

diff --git a/Source/portable/IAR/STR75x/port.c b/Source/portable/IAR/STR75x/port.c
index bdeeafdcd279485dacf383cde3461fe93d57baff..601b4af466e0311b74dfe10c9562569018dbe148 100644 (file)
--- a/Source/portable/IAR/STR75x/port.c
+++ b/Source/portable/IAR/STR75x/port.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/IAR/STR75x/portasm.s79 b/Source/portable/IAR/STR75x/portasm.s79
index 216985bcdb609a6e5e9dd3f9ce466dbf07ba1aa1..b94877c93ce07799d9a64c966c315a9d9c41e892 100644 (file)
--- a/Source/portable/IAR/STR75x/portasm.s79
+++ b/Source/portable/IAR/STR75x/portasm.s79
@@ -1,4 +1,4 @@
-;      FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+;      FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 ;\r
 ;      This file is part of the FreeRTOS.org distribution.\r
 ;\r

diff --git a/Source/portable/IAR/STR75x/portmacro.h b/Source/portable/IAR/STR75x/portmacro.h
index 5b40cf50f1ca195cbce9c03da7cc0a755272fbed..0c418ddb7173158678058729cf4286982db14452 100644 (file)
--- a/Source/portable/IAR/STR75x/portmacro.h
+++ b/Source/portable/IAR/STR75x/portmacro.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/IAR/STR91x/ISR_Support.h b/Source/portable/IAR/STR91x/ISR_Support.h
index 066f5a55a7fd42fa92769d09966f348e900a4b97..6a3fd57507b0022ab04945e3cae234dbffe15cb9 100644 (file)
--- a/Source/portable/IAR/STR91x/ISR_Support.h
+++ b/Source/portable/IAR/STR91x/ISR_Support.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS distribution.\r
 \r

diff --git a/Source/portable/IAR/STR91x/port.c b/Source/portable/IAR/STR91x/port.c
index c1e9858a83e9ea0388555b60494889a14ac43082..ac8a3e2a2c2fdd7e4c5400beb766188091c636f8 100644 (file)
--- a/Source/portable/IAR/STR91x/port.c
+++ b/Source/portable/IAR/STR91x/port.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS distribution.\r
 \r
@@ -34,7 +34,7 @@
 */\r
 \r
 /*-----------------------------------------------------------\r
- * Implementation of functions defined in portable.h for the ST STR91x ARM7\r
+ * Implementation of functions defined in portable.h for the ST STR91x ARM9\r
  * port.\r
  *----------------------------------------------------------*/\r
 \r
@@ -43,22 +43,54 @@
 \r
 /* Standard includes. */\r
 #include <stdlib.h>\r
+#include <assert.h>\r
 \r
 /* Scheduler includes. */\r
 #include "FreeRTOS.h"\r
 #include "task.h"\r
 \r
+#ifndef configUSE_WATCHDOG_TICK\r
+       #error configUSE_WATCHDOG_TICK must be set to either 1 or 0 in FreeRTOSConfig.h to use either the Watchdog or timer 2 to generate the tick interrupt respectively.\r
+#endif\r
+\r
 /* Constants required to setup the initial stack. */\r
 #ifndef _RUN_TASK_IN_ARM_MODE_\r
        #define portINITIAL_SPSR                        ( ( portSTACK_TYPE ) 0x3f ) /* System mode, THUMB mode, interrupts enabled. */\r
 #else\r
        #define portINITIAL_SPSR                        ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */\r
 #endif\r
+\r
 #define portINSTRUCTION_SIZE                   ( ( portSTACK_TYPE ) 4 )\r
 \r
 /* Constants required to handle critical sections. */\r
 #define portNO_CRITICAL_NESTING                ( ( unsigned portLONG ) 0 )\r
 \r
+#ifndef abs\r
+       #define abs(x) ((x)>0 ? (x) : -(x))\r
+#endif\r
+\r
+/**\r
+ * Toggle a led using the following algorithm:\r
+ * if ( GPIO_ReadBit(GPIO9, GPIO_Pin_2) )\r
+ * {\r
+ *   GPIO_WriteBit( GPIO9, GPIO_Pin_2, Bit_RESET );\r
+ * }\r
+ * else\r
+ * {\r
+ *   GPIO_WriteBit( GPIO9, GPIO_Pin_2, Bit_RESET );\r
+ * }\r
+ *\r
+ */\r
+#define TOGGLE_LED(port,pin)                                                                   \\r
+       if ( ((((port)->DR[(pin)<<2])) & (pin)) != Bit_RESET )          \\r
+       {                                                                                                                       \\r
+       (port)->DR[(pin) <<2] = 0x00;                                                   \\r
+       }                                                                                                                       \\r
+       else                                                                                                            \\r
+       {                                                                                                                       \\r
+       (port)->DR[(pin) <<2] = (pin);                                                  \\r
+       }\r
+\r
 \r
 /*-----------------------------------------------------------*/\r
 \r
@@ -73,12 +105,16 @@ unsigned portLONG ulCriticalNesting = ( unsigned portLONG ) 9999;
 /* Tick interrupt routines for cooperative and preemptive operation\r
 respectively.  The preemptive version is not defined as __irq as it is called\r
 from an asm wrapper function. */\r
-__arm __irq void vPortNonPreemptiveTick( void );\r
 void WDG_IRQHandler( void );\r
 \r
 /* VIC interrupt default handler. */\r
 static void prvDefaultHandler( void );\r
 \r
+#if configUSE_WATCHDOG_TICK == 0\r
+       /* Used to update the OCR timer register */\r
+       static u16 s_nPulseLength;\r
+#endif\r
+\r
 /*-----------------------------------------------------------*/\r
 \r
 /*\r
@@ -174,90 +210,189 @@ void vPortEndScheduler( void )
 \r
 /* This function is called from an asm wrapper, so does not require the __irq\r
 keyword. */\r
-void WDG_IRQHandler( void )\r
-{\r
-       /* Increment the tick counter. */\r
-       vTaskIncrementTick();\r
-\r
-       #if configUSE_PREEMPTION == 1\r
-               /* The new tick value might unblock a task.  Ensure the highest task that\r
-               is ready to execute is the task that will execute when the tick ISR\r
-               exits. */\r
-               vTaskSwitchContext();\r
-       #endif\r
-               \r
-       /* Clear the interrupt in the watchdog. */\r
-       WDG->SR &= ~0x0001;\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-#ifndef abs\r
-       #define abs(x) ((x)>0 ? (x) : -(x))\r
-#endif\r
-\r
-static void prvFindFactors(u32 n, u16 *a, u32 *b)\r
-{\r
-       /* This function is copied from the ST STR7 library and is\r
-       copyright STMicroelectronics.  Reproduced with permission. */\r
-\r
-       u32 b0;\r
-       u16 a0;\r
-       long err, err_min=n;\r
+#if configUSE_WATCHDOG_TICK == 1\r
 \r
-       *a = a0 = ((n-1)/65536ul) + 1;\r
-       *b = b0 = n / *a;\r
-\r
-       for (; *a <= 256; (*a)++)\r
+       static void prvFindFactors(u32 n, u16 *a, u32 *b)\r
        {\r
-               *b = n / *a;\r
-               err = (long)*a * (long)*b - (long)n;\r
-               if (abs(err) > (*a / 2))\r
+               /* This function is copied from the ST STR7 library and is\r
+               copyright STMicroelectronics.  Reproduced with permission. */\r
+       \r
+               u32 b0;\r
+               u16 a0;\r
+               long err, err_min=n;\r
+       \r
+               *a = a0 = ((n-1)/65536ul) + 1;\r
+               *b = b0 = n / *a;\r
+       \r
+               for (; *a <= 256; (*a)++)\r
                {\r
-                       (*b)++;\r
+                       *b = n / *a;\r
                        err = (long)*a * (long)*b - (long)n;\r
+                       if (abs(err) > (*a / 2))\r
+                       {\r
+                               (*b)++;\r
+                               err = (long)*a * (long)*b - (long)n;\r
+                       }\r
+                       if (abs(err) < abs(err_min))\r
+                       {\r
+                               err_min = err;\r
+                               a0 = *a;\r
+                               b0 = *b;\r
+                               if (err == 0) break;\r
+                       }\r
                }\r
-               if (abs(err) < abs(err_min))\r
+       \r
+               *a = a0;\r
+               *b = b0;\r
+       }\r
+       /*-----------------------------------------------------------*/\r
+\r
+       static void prvSetupTimerInterrupt( void )\r
+       {\r
+       WDG_InitTypeDef xWdg;\r
+       unsigned portSHORT a;\r
+       unsigned portLONG n = configCPU_PERIPH_HZ / configTICK_RATE_HZ, b;\r
+       \r
+               /* Configure the watchdog as a free running timer that generates a\r
+               periodic interrupt. */\r
+       \r
+               SCU_APBPeriphClockConfig( __WDG, ENABLE );\r
+               WDG_DeInit();\r
+               WDG_StructInit(&xWdg);\r
+               prvFindFactors( n, &a, &b );\r
+               xWdg.WDG_Prescaler = a - 1;\r
+               xWdg.WDG_Preload = b - 1;\r
+               WDG_Init( &xWdg );\r
+               WDG_ITConfig(ENABLE);\r
+               \r
+               /* Configure the VIC for the WDG interrupt. */\r
+               VIC_Config( WDG_ITLine, VIC_IRQ, 10 );\r
+               VIC_ITCmd( WDG_ITLine, ENABLE );\r
+               \r
+               /* Install the default handlers for both VIC's. */\r
+               VIC0->DVAR = ( unsigned portLONG ) prvDefaultHandler;\r
+               VIC1->DVAR = ( unsigned portLONG ) prvDefaultHandler;\r
+               \r
+               WDG_Cmd(ENABLE);\r
+       }\r
+       /*-----------------------------------------------------------*/\r
+\r
+       void WDG_IRQHandler( void )\r
+       {\r
                {\r
-                       err_min = err;\r
-                       a0 = *a;\r
-                       b0 = *b;\r
-                       if (err == 0) break;\r
+                       /* Increment the tick counter. */\r
+                       vTaskIncrementTick();\r
+               \r
+                       #if configUSE_PREEMPTION == 1\r
+                       {\r
+                               /* The new tick value might unblock a task.  Ensure the highest task that\r
+                               is ready to execute is the task that will execute when the tick ISR\r
+                               exits. */\r
+                               vTaskSwitchContext();\r
+                       }\r
+                       #endif /* configUSE_PREEMPTION. */\r
+               \r
+                       /* Clear the interrupt in the watchdog. */\r
+                       WDG->SR &= ~0x0001;\r
                }\r
        }\r
 \r
-       *a = a0;\r
-       *b = b0;\r
-}\r
-/*-----------------------------------------------------------*/\r
+#else\r
 \r
-static void prvSetupTimerInterrupt( void )\r
-{\r
-WDG_InitTypeDef xWdg;\r
-unsigned portSHORT a;\r
-unsigned portLONG n = configCPU_PERIPH_HZ / configTICK_RATE_HZ, b;\r
-\r
-       /* Configure the watchdog as a free running timer that generates a\r
-       periodic interrupt. */\r
-\r
-       SCU_APBPeriphClockConfig( __WDG, ENABLE );\r
-       WDG_DeInit();\r
-       WDG_StructInit(&xWdg);\r
-       prvFindFactors( n, &a, &b );\r
-       xWdg.WDG_Prescaler = a - 1;\r
-       xWdg.WDG_Preload = b - 1;\r
-       WDG_Init( &xWdg );\r
-       WDG_ITConfig(ENABLE);\r
+       static void prvFindFactors(u32 n, u8 *a, u16 *b)\r
+       {\r
+               /* This function is copied from the ST STR7 library and is\r
+               copyright STMicroelectronics.  Reproduced with permission. */\r
        \r
-       /* Configure the VIC for the WDG interrupt. */\r
-       VIC_Config( WDG_ITLine, VIC_IRQ, 10 );\r
-       VIC_ITCmd( WDG_ITLine, ENABLE );\r
+               u16 b0;\r
+               u8 a0;\r
+               long err, err_min=n;\r
        \r
-       /* Install the default handlers for both VIC's. */\r
-       VIC0->DVAR = ( unsigned portLONG ) prvDefaultHandler;\r
-       VIC1->DVAR = ( unsigned portLONG ) prvDefaultHandler;\r
        \r
-       WDG_Cmd(ENABLE);\r
-}\r
+               *a = a0 = ((n-1)/256) + 1;\r
+               *b = b0 = n / *a;\r
+       \r
+               for (; *a <= 256; (*a)++)\r
+               {\r
+                       *b = n / *a;\r
+                       err = (long)*a * (long)*b - (long)n;\r
+                       if (abs(err) > (*a / 2))\r
+                       {\r
+                               (*b)++;\r
+                               err = (long)*a * (long)*b - (long)n;\r
+                       }\r
+                       if (abs(err) < abs(err_min))\r
+                       {\r
+                               err_min = err;\r
+                               a0 = *a;\r
+                               b0 = *b;\r
+                               if (err == 0) break;\r
+                       }\r
+               }\r
+       \r
+               *a = a0;\r
+               *b = b0;\r
+       }\r
+       /*-----------------------------------------------------------*/\r
+\r
+       static void prvSetupTimerInterrupt( void )\r
+       {\r
+               unsigned portCHAR a;\r
+               unsigned portSHORT b;\r
+               unsigned portLONG n = configCPU_PERIPH_HZ / configTICK_RATE_HZ;\r
+               \r
+               TIM_InitTypeDef timer;\r
+               \r
+               SCU_APBPeriphClockConfig( __TIM23, ENABLE );\r
+               TIM_DeInit(TIM2);\r
+               TIM_StructInit(&timer);\r
+               prvFindFactors( n, &a, &b );\r
+               \r
+               timer.TIM_Mode           = TIM_OCM_CHANNEL_1;\r
+               timer.TIM_OC1_Modes      = TIM_TIMING;\r
+               timer.TIM_Clock_Source   = TIM_CLK_APB;\r
+               timer.TIM_Clock_Edge     = TIM_CLK_EDGE_RISING;\r
+               timer.TIM_Prescaler      = a-1;\r
+               timer.TIM_Pulse_Level_1  = TIM_HIGH;\r
+               timer.TIM_Pulse_Length_1 = s_nPulseLength  = b-1;\r
+               \r
+               TIM_Init (TIM2, &timer);\r
+               TIM_ITConfig(TIM2, TIM_IT_OC1, ENABLE);\r
+               /* Configure the VIC for the WDG interrupt. */\r
+               VIC_Config( TIM2_ITLine, VIC_IRQ, 10 );\r
+               VIC_ITCmd( TIM2_ITLine, ENABLE );\r
+               \r
+               /* Install the default handlers for both VIC's. */\r
+               VIC0->DVAR = ( unsigned portLONG ) prvDefaultHandler;\r
+               VIC1->DVAR = ( unsigned portLONG ) prvDefaultHandler;\r
+               \r
+               TIM_CounterCmd(TIM2, TIM_CLEAR);\r
+               TIM_CounterCmd(TIM2, TIM_START);\r
+       }\r
+       /*-----------------------------------------------------------*/\r
+\r
+       void TIM2_IRQHandler( void )\r
+       {\r
+               /* Reset the timer counter to avioid overflow. */\r
+               TIM2->OC1R += s_nPulseLength;\r
+               \r
+               /* Increment the tick counter. */\r
+               vTaskIncrementTick();\r
+               \r
+               #if configUSE_PREEMPTION == 1\r
+               {\r
+                       /* The new tick value might unblock a task.  Ensure the highest task that\r
+                       is ready to execute is the task that will execute when the tick ISR\r
+                       exits. */\r
+                       vTaskSwitchContext();\r
+               }\r
+               #endif\r
+               \r
+               /* Clear the interrupt in the watchdog. */\r
+               TIM2->SR &= ~TIM_FLAG_OC1;\r
+       }\r
+\r
+#endif /* USE_WATCHDOG_TICK */\r
 \r
 /*-----------------------------------------------------------*/\r
 \r

diff --git a/Source/portable/IAR/STR91x/portasm.s79 b/Source/portable/IAR/STR91x/portasm.s79
index aa39c7103672d3fa1801a94969679d8125fb012a..6975ff87f38be185359ba47ad559d314633be854 100644 (file)
--- a/Source/portable/IAR/STR91x/portasm.s79
+++ b/Source/portable/IAR/STR91x/portasm.s79
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS distribution.\r
 \r

diff --git a/Source/portable/IAR/STR91x/portmacro.h b/Source/portable/IAR/STR91x/portmacro.h
index eaa15bde35c3624e394b1d1c5aa674941508b599..f94778d317280f3272cace95e667236a0dfa388b 100644 (file)
--- a/Source/portable/IAR/STR91x/portmacro.h
+++ b/Source/portable/IAR/STR91x/portmacro.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS distribution.\r
 \r

diff --git a/Source/portable/Keil/ARM7/port.c b/Source/portable/Keil/ARM7/port.c
index c781d9726cc86962d599cd3086af259d53ba2864..074ca3e08f83a49310266f9181b6fbdc6db84116 100644 (file)
--- a/Source/portable/Keil/ARM7/port.c
+++ b/Source/portable/Keil/ARM7/port.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/Keil/ARM7/portISR.c b/Source/portable/Keil/ARM7/portISR.c
index 06a7b3017d96969b13200a6e2257bf04bd3d49c4..92fddf2eae28f1da082b612bfc61b7da6405c0b0 100644 (file)
--- a/Source/portable/Keil/ARM7/portISR.c
+++ b/Source/portable/Keil/ARM7/portISR.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/Keil/ARM7/portmacro.h b/Source/portable/Keil/ARM7/portmacro.h
index 9a01c19863bcdf21c85f7cc86dada5f930ce21e5..325054ab0b8c11abd57a4a52b30c39feede806ca 100644 (file)
--- a/Source/portable/Keil/ARM7/portmacro.h
+++ b/Source/portable/Keil/ARM7/portmacro.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/MPLAB/PIC18F/port.c b/Source/portable/MPLAB/PIC18F/port.c
index 219d42c65beb7c02875d6354048a9cbef85efaab..3785a4e52d2ef1a0e6a39db9d0d1038139bf4835 100644 (file)
--- a/Source/portable/MPLAB/PIC18F/port.c
+++ b/Source/portable/MPLAB/PIC18F/port.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/MPLAB/PIC18F/portmacro.h b/Source/portable/MPLAB/PIC18F/portmacro.h
index 9335347fa9cafd531ec632d1b63e1aa976d14493..005babba8091c502d927f54f9d7462dc7b516410 100644 (file)
--- a/Source/portable/MPLAB/PIC18F/portmacro.h
+++ b/Source/portable/MPLAB/PIC18F/portmacro.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/MPLAB/PIC24_dsPIC/port.c b/Source/portable/MPLAB/PIC24_dsPIC/port.c
index 1e86c071dd11e0185c870154a196cafb0742a84c..0b08d93d9716af56882077cdb9d97d524ce335a1 100644 (file)
--- a/Source/portable/MPLAB/PIC24_dsPIC/port.c
+++ b/Source/portable/MPLAB/PIC24_dsPIC/port.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/MPLAB/PIC24_dsPIC/portmacro.h b/Source/portable/MPLAB/PIC24_dsPIC/portmacro.h
index 1d4286e237f05aefbe1009865141c089255b4bba..1f6dab634a4badbfd1ea1b5777a495f9b2521587 100644 (file)
--- a/Source/portable/MPLAB/PIC24_dsPIC/portmacro.h
+++ b/Source/portable/MPLAB/PIC24_dsPIC/portmacro.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/MemMang/heap_1.c b/Source/portable/MemMang/heap_1.c
index dac6098b239037834a7c59a1394ba3c937ba5261..ea8cac5a64774b8dbb10f94cc01ad600ec50dfa1 100644 (file)
--- a/Source/portable/MemMang/heap_1.c
+++ b/Source/portable/MemMang/heap_1.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/MemMang/heap_2.c b/Source/portable/MemMang/heap_2.c
index 80cc5d8e114c4c914430a52bbe64aeba16d30638..fe94b0c23b813d94153f4186958b09d09edf62b1 100644 (file)
--- a/Source/portable/MemMang/heap_2.c
+++ b/Source/portable/MemMang/heap_2.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/MemMang/heap_3.c b/Source/portable/MemMang/heap_3.c
index 182532c98118cc42e96495edfd23778b9be5182e..62706f43483e296c7de422cb701c11610b23ad36 100644 (file)
--- a/Source/portable/MemMang/heap_3.c
+++ b/Source/portable/MemMang/heap_3.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/Paradigm/Tern_EE/large_untested/port.c b/Source/portable/Paradigm/Tern_EE/large_untested/port.c
index cfe5e7c563b3c5172a12e07a53a14b5c1ec645ef..ee330f22b7def8fcb2dbe50242342b0e1cb0aca0 100644 (file)
--- a/Source/portable/Paradigm/Tern_EE/large_untested/port.c
+++ b/Source/portable/Paradigm/Tern_EE/large_untested/port.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/Paradigm/Tern_EE/large_untested/portasm.h b/Source/portable/Paradigm/Tern_EE/large_untested/portasm.h
index 1fbcc85b46226fb7c1eced837bf2d4fdf6b5c1ea..ca6d5b865116e47b4ef2d67ec9e5f6148caf2739 100644 (file)
--- a/Source/portable/Paradigm/Tern_EE/large_untested/portasm.h
+++ b/Source/portable/Paradigm/Tern_EE/large_untested/portasm.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/Paradigm/Tern_EE/large_untested/portmacro.h b/Source/portable/Paradigm/Tern_EE/large_untested/portmacro.h
index d94f06d2bb628666a8d413a78b501b313bd6b93d..e778dddb3d196fd9f7849dcbbbf2d7a508c00f18 100644 (file)
--- a/Source/portable/Paradigm/Tern_EE/large_untested/portmacro.h
+++ b/Source/portable/Paradigm/Tern_EE/large_untested/portmacro.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/Paradigm/Tern_EE/small/port.c b/Source/portable/Paradigm/Tern_EE/small/port.c
index 31de22854faf60070cee205d3d4477c6f0dd275b..ea3e51b10dccaaf047d63b9cfa9b8fefbeb870f5 100644 (file)
--- a/Source/portable/Paradigm/Tern_EE/small/port.c
+++ b/Source/portable/Paradigm/Tern_EE/small/port.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/Paradigm/Tern_EE/small/portasm.h b/Source/portable/Paradigm/Tern_EE/small/portasm.h
index 625e14c15382e435202af2e241736d944d788f0b..2a13a4438600c94263a3b5bec175917355b1dad5 100644 (file)
--- a/Source/portable/Paradigm/Tern_EE/small/portasm.h
+++ b/Source/portable/Paradigm/Tern_EE/small/portasm.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/Paradigm/Tern_EE/small/portmacro.h b/Source/portable/Paradigm/Tern_EE/small/portmacro.h
index 19727d60e9cfc6cc8e4581944a29122b046cbaf1..d4b430ad27c4bb1adc1992b4d200a2959ea8cad1 100644 (file)
--- a/Source/portable/Paradigm/Tern_EE/small/portmacro.h
+++ b/Source/portable/Paradigm/Tern_EE/small/portmacro.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/RVDS/ARM_CM3/port.c b/Source/portable/RVDS/ARM_CM3/port.c
index 372c83168781b0b6b79d769cffc036a41dc8ea03..812afc27004090950ad6bd178816e34217e2bf31 100644 (file)
--- a/Source/portable/RVDS/ARM_CM3/port.c
+++ b/Source/portable/RVDS/ARM_CM3/port.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r
@@ -211,27 +211,25 @@ __asm void xPortPendSVHandler( void )
        PRESERVE8\r
 \r
        /* Start first task if the stack has not yet been setup. */\r
-       mrs r0, psp\r
-       cbz r0, no_save\r
+       mrs r0, psp                                             \r
+       cbz r0, no_save                                 \r
 \r
        /* Save the context into the TCB. */\r
-       sub r0, #0x20\r
-       stm r0, {r4-r11}\r
-       sub r0, #0x04\r
+       stmdb r0!, {r4-r11}                             \r
+       sub r0, r0, #0x04                                       \r
        ldr r1, =uxCriticalNesting\r
-       ldr r1, [r1]\r
-       stm r0, {r1}\r
-       ldr r1, =pxCurrentTCB\r
-       ldr r1, [r1]\r
-       str r0, [r1]\r
+       ldr r2, =pxCurrentTCB           \r
+       ldr r1, [r1]                                    \r
+       ldr r2, [r2]                                    \r
+       str r1, [r0]                                    \r
+       str r0, [r2]                                    \r
 \r
 no_save;\r
        \r
        /* Find the task to execute. */\r
-       ldr r0, =vTaskSwitchContext\r
        push {r14}\r
        cpsid i\r
-       blx r0\r
+       bl vTaskSwitchContext\r
        cpsie i\r
        pop {r14}       \r
 \r
@@ -239,11 +237,10 @@ no_save;
        ldr r1, =pxCurrentTCB\r
        ldr r1, [r1];\r
        ldr r0, [r1];\r
-       ldm r0, {r1, r4-r11}\r
+       ldmia r0!, {r1, r4-r11}\r
        ldr r2, =uxCriticalNesting\r
        str r1, [r2]\r
        ldr r2, [r2]\r
-       add r0, #0x24\r
        msr psp, r0\r
        orr r14, #0xd\r
 \r
@@ -264,10 +261,9 @@ __asm void xPortSysTickHandler( void )
        PRESERVE8\r
 \r
        /* Call the scheduler tick function. */\r
-       ldr r0, =vTaskIncrementTick\r
        push {r14}\r
        cpsid i\r
-       blx r0\r
+       bl vTaskIncrementTick\r
        cpsie i\r
        pop {r14}       \r
 \r
@@ -275,8 +271,7 @@ __asm void xPortSysTickHandler( void )
        #if configUSE_PREEMPTION == 1\r
        extern vPortYieldFromISR\r
                push {r14}\r
-               ldr r0, =vPortYieldFromISR\r
-               blx r0\r
+               bl vPortYieldFromISR\r
                pop {r14}\r
        #endif\r
 \r

diff --git a/Source/portable/RVDS/ARM_CM3/portmacro.h b/Source/portable/RVDS/ARM_CM3/portmacro.h
index 2275840b29b4212b13e01e8b7e369982f3cd8caf..12d4cad921cc186398c00b45f068122a20b647fe 100644 (file)
--- a/Source/portable/RVDS/ARM_CM3/portmacro.h
+++ b/Source/portable/RVDS/ARM_CM3/portmacro.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/Rowley/MSP430F449/Port1/port.c b/Source/portable/Rowley/MSP430F449/Port1/port.c
index bd595cf243227687ba6d15b53171045194cd6f93..027ab781605c5be1fe153c00557cd212a5ed0086 100644 (file)
--- a/Source/portable/Rowley/MSP430F449/Port1/port.c
+++ b/Source/portable/Rowley/MSP430F449/Port1/port.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/Rowley/MSP430F449/Port1/portmacro.h b/Source/portable/Rowley/MSP430F449/Port1/portmacro.h
index d085c0a33a2e8f8cad409735bdc24006b71a4a1d..77ec57ecf9f1ad9f95136cf4d5bee14c7b1bea3d 100644 (file)
--- a/Source/portable/Rowley/MSP430F449/Port1/portmacro.h
+++ b/Source/portable/Rowley/MSP430F449/Port1/portmacro.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/Rowley/MSP430F449/Port2/port.c b/Source/portable/Rowley/MSP430F449/Port2/port.c
index 3c1b4f889a7b5c1d397532cbbd17b83903cfced7..f991f341b81ef0c939c573cccc0dcd99235d7458 100644 (file)
--- a/Source/portable/Rowley/MSP430F449/Port2/port.c
+++ b/Source/portable/Rowley/MSP430F449/Port2/port.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/Rowley/MSP430F449/Port2/portmacro.h b/Source/portable/Rowley/MSP430F449/Port2/portmacro.h
index 2d0afa3cf47e0350a5ba57302b06f5524e62e1cf..90d24bbbad944483a3bac4144915d6400edfdc69 100644 (file)
--- a/Source/portable/Rowley/MSP430F449/Port2/portmacro.h
+++ b/Source/portable/Rowley/MSP430F449/Port2/portmacro.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/Rowley/MSP430F449/port.c b/Source/portable/Rowley/MSP430F449/port.c
index bd595cf243227687ba6d15b53171045194cd6f93..027ab781605c5be1fe153c00557cd212a5ed0086 100644 (file)
--- a/Source/portable/Rowley/MSP430F449/port.c
+++ b/Source/portable/Rowley/MSP430F449/port.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/Rowley/MSP430F449/portmacro.h b/Source/portable/Rowley/MSP430F449/portmacro.h
index f3d28dd002907d898c31df6c5d653afaf59bfeb6..ee3fd159071330da7cdb3aafc419d081dfbbbd63 100644 (file)
--- a/Source/portable/Rowley/MSP430F449/portmacro.h
+++ b/Source/portable/Rowley/MSP430F449/portmacro.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/SDCC/Cygnal/port.c b/Source/portable/SDCC/Cygnal/port.c
index 137d21b4fc1a84d1a65986ff5ed3de31a0a9595d..0343311140f389b63d3dcf741b3610e8507cf9c8 100644 (file)
--- a/Source/portable/SDCC/Cygnal/port.c
+++ b/Source/portable/SDCC/Cygnal/port.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/SDCC/Cygnal/portmacro.h b/Source/portable/SDCC/Cygnal/portmacro.h
index a1a06825f17a5407a5d2319d5bc0272ebf1fa3b1..06b4fdeb490c70bedfec4ecfdfe96cd2377523b6 100644 (file)
--- a/Source/portable/SDCC/Cygnal/portmacro.h
+++ b/Source/portable/SDCC/Cygnal/portmacro.h
@@ -1,5 +1,5 @@
 /* \r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/WizC/PIC18/Drivers/Tick/Tick.c b/Source/portable/WizC/PIC18/Drivers/Tick/Tick.c
index 53e39953d0ca2eb0bb7da0fb1a983f0b73596aa6..df9fb34e13472fde9e4df134c0577f1b7b717166 100644 (file)
--- a/Source/portable/WizC/PIC18/Drivers/Tick/Tick.c
+++ b/Source/portable/WizC/PIC18/Drivers/Tick/Tick.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/WizC/PIC18/Drivers/Tick/isrTick.c b/Source/portable/WizC/PIC18/Drivers/Tick/isrTick.c
index bbba5c435784b84db7f85dfa22e61037b326ef0b..7f8b60a9c29e6a31f18724ec3f367f1f74e4ffdb 100644 (file)
--- a/Source/portable/WizC/PIC18/Drivers/Tick/isrTick.c
+++ b/Source/portable/WizC/PIC18/Drivers/Tick/isrTick.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/WizC/PIC18/addFreeRTOS.h b/Source/portable/WizC/PIC18/addFreeRTOS.h
index 954c5b2c5cba522d1e32d251ddd2b8ef79b46fbe..84e00227d5af5d88517e4ecb1757ad7a1c35b0dd 100644 (file)
--- a/Source/portable/WizC/PIC18/addFreeRTOS.h
+++ b/Source/portable/WizC/PIC18/addFreeRTOS.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/WizC/PIC18/port.c b/Source/portable/WizC/PIC18/port.c
index f1dd68fe462f7faf864b5fd3fa77401ba6faf707..843fb043002dfe9ee4bae30cfdc5d8dff938c14b 100644 (file)
--- a/Source/portable/WizC/PIC18/port.c
+++ b/Source/portable/WizC/PIC18/port.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/WizC/PIC18/portmacro.h b/Source/portable/WizC/PIC18/portmacro.h
index 6ea40f14ef6c18264a707bb95d59bb9889066044..0c2b66b51ac77eb1913adf71febb5f7a7e38606a 100644 (file)
--- a/Source/portable/WizC/PIC18/portmacro.h
+++ b/Source/portable/WizC/PIC18/portmacro.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/oWatcom/16BitDOS/Flsh186/port.c b/Source/portable/oWatcom/16BitDOS/Flsh186/port.c
index df288ccfb5f7d6d20239717a08297638e616d043..6c1aa5b6580dc2b254a5778507f4877d99303303 100644 (file)
--- a/Source/portable/oWatcom/16BitDOS/Flsh186/port.c
+++ b/Source/portable/oWatcom/16BitDOS/Flsh186/port.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/oWatcom/16BitDOS/Flsh186/portmacro.h b/Source/portable/oWatcom/16BitDOS/Flsh186/portmacro.h
index 14bea1e7c1d552e3cf4825d5bae4d3b2f15d1500..99586921e57406ff8f4aead4c64e133c72df8063 100644 (file)
--- a/Source/portable/oWatcom/16BitDOS/Flsh186/portmacro.h
+++ b/Source/portable/oWatcom/16BitDOS/Flsh186/portmacro.h
@@ -1,5 +1,5 @@
 /*\r
-    FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+    FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
     This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/oWatcom/16BitDOS/PC/port.c b/Source/portable/oWatcom/16BitDOS/PC/port.c
index 472e09ce92ba63850231ad3c731e2669246606ee..904ac2fcfd512af0888ee67eb9708fa20c30316d 100644 (file)
--- a/Source/portable/oWatcom/16BitDOS/PC/port.c
+++ b/Source/portable/oWatcom/16BitDOS/PC/port.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/oWatcom/16BitDOS/PC/portmacro.h b/Source/portable/oWatcom/16BitDOS/PC/portmacro.h
index 568075ab5d00916d08975cf5a8e06d56e5f88d91..94b3731f0bc34180e4e83c9f4170f9ae566d4c4b 100644 (file)
--- a/Source/portable/oWatcom/16BitDOS/PC/portmacro.h
+++ b/Source/portable/oWatcom/16BitDOS/PC/portmacro.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/oWatcom/16BitDOS/common/portasm.h b/Source/portable/oWatcom/16BitDOS/common/portasm.h
index 547ed7b4539070b9621b08255b8a74a0a26e0800..b6dd14225e2a4011cef1702d06946f8344c868d0 100644 (file)
--- a/Source/portable/oWatcom/16BitDOS/common/portasm.h
+++ b/Source/portable/oWatcom/16BitDOS/common/portasm.h
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/portable/oWatcom/16BitDOS/common/portcomn.c b/Source/portable/oWatcom/16BitDOS/common/portcomn.c
index 2fbb0908556ea78961a15ea67881083ce1d6e191..20821ff3b02ac7a43c8400c72a2f4bf672b8aae9 100644 (file)
--- a/Source/portable/oWatcom/16BitDOS/common/portcomn.c
+++ b/Source/portable/oWatcom/16BitDOS/common/portcomn.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r

diff --git a/Source/queue.c b/Source/queue.c
index 46610e0b7a4f42ab72caff2e2ae856656326a8a2..b7dd06c4477aebd1fc28fd14f08092f96f3d327a 100644 (file)
--- a/Source/queue.c
+++ b/Source/queue.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r
@@ -137,11 +137,11 @@ typedef xQUEUE * xQueueHandle;
  */\r
 xQueueHandle xQueueCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize );\r
 signed portBASE_TYPE xQueueGenericSend( xQueueHandle xQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition );\r
-unsigned portBASE_TYPE uxQueueMessagesWaiting( xQueueHandle pxQueue );\r
+unsigned portBASE_TYPE uxQueueMessagesWaiting( const xQueueHandle pxQueue );\r
 void vQueueDelete( xQueueHandle xQueue );\r
 signed portBASE_TYPE xQueueGenericSendFromISR( xQueueHandle pxQueue, const void * const pvItemToQueue, signed portBASE_TYPE xTaskPreviouslyWoken, portBASE_TYPE xCopyPosition );\r
-signed portBASE_TYPE xQueueGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking );\r
-signed portBASE_TYPE xQueueReceiveFromISR( xQueueHandle pxQueue, void * const pvBuffer, signed portBASE_TYPE *pxTaskWoken );\r
+signed portBASE_TYPE xQueueGenericReceive( xQueueHandle pxQueue, const void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking );\r
+signed portBASE_TYPE xQueueReceiveFromISR( xQueueHandle pxQueue, const void * const pvBuffer, signed portBASE_TYPE *pxTaskWoken );\r
 xQueueHandle xQueueCreateMutex( void );\r
 \r
 #if configUSE_CO_ROUTINES == 1\r
@@ -514,7 +514,7 @@ signed portBASE_TYPE xQueueGenericSendFromISR( xQueueHandle pxQueue, const void
 }\r
 /*-----------------------------------------------------------*/\r
 \r
-signed portBASE_TYPE xQueueGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking )\r
+signed portBASE_TYPE xQueueGenericReceive( xQueueHandle pxQueue, const void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking )\r
 {\r
 signed portBASE_TYPE xReturn = pdTRUE;\r
 xTimeOutType xTimeOut;\r
@@ -648,7 +648,7 @@ signed portCHAR *pcOriginalReadPosition;
 }\r
 /*-----------------------------------------------------------*/\r
 \r
-signed portBASE_TYPE xQueueReceiveFromISR( xQueueHandle pxQueue, void * const pvBuffer, signed portBASE_TYPE *pxTaskWoken )\r
+signed portBASE_TYPE xQueueReceiveFromISR( xQueueHandle pxQueue, const void * const pvBuffer, signed portBASE_TYPE *pxTaskWoken )\r
 {\r
 signed portBASE_TYPE xReturn;\r
 \r
@@ -696,7 +696,7 @@ signed portBASE_TYPE xReturn;
 }\r
 /*-----------------------------------------------------------*/\r
 \r
-unsigned portBASE_TYPE uxQueueMessagesWaiting( xQueueHandle pxQueue )\r
+unsigned portBASE_TYPE uxQueueMessagesWaiting( const xQueueHandle pxQueue )\r
 {\r
 unsigned portBASE_TYPE uxReturn;\r
 \r

diff --git a/Source/tasks.c b/Source/tasks.c
index 7ed5637a1a934d3262b75f59480a601066b0e190..f000084614205fe8ddfe504ef5038b0341b500be 100644 (file)
--- a/Source/tasks.c
+++ b/Source/tasks.c
@@ -1,5 +1,5 @@
 /*\r
-       FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.\r
+       FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.\r
 \r
        This file is part of the FreeRTOS.org distribution.\r
 \r
@@ -929,7 +929,7 @@ tskTCB * pxNewTCB;
                                }\r
                                #endif\r
 \r
-                               listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), configMAX_PRIORITIES - ( portTickType ) uxNewPriority );\r
+                               listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( configMAX_PRIORITIES - ( portTickType ) uxNewPriority ) );\r
 \r
                                /* If the task is in the blocked or suspended list we need do\r
                                nothing more than change it's priority variable. However, if\r