Efficiency improvement.

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@305 1d2547de-c912-0410-9cb9-b8ca96c0e9e2

diff --git a/Source/portable/MPLAB/PIC32MX/ISR_Support.h b/Source/portable/MPLAB/PIC32MX/ISR_Support.h
index e1d962744c17644c35653593511cda9397923c8b..fb6aaba7905c05e65a844ed32f3ea31161ebaf5f 100644 (file)
--- a/Source/portable/MPLAB/PIC32MX/ISR_Support.h
+++ b/Source/portable/MPLAB/PIC32MX/ISR_Support.h
@@ -60,21 +60,21 @@
 .macro portSAVE_CONTEXT\r
 \r
        /* Make room for the context. */        \r
-       addiu           sp,     sp, -portCONTEXT_SIZE\r
 \r
        /* Get interrupts above the kernel priority enabled again ASAP.  First\r
        save the current status so we can manipulate it, and the cause and EPC\r
        registers so we capture their original values in case of interrupt nesting. */\r
 \r
        mfc0            k0, _CP0_CAUSE\r
+       addiu           sp,     sp, -portCONTEXT_SIZE\r
        sw                      k0, portCAUSE_STACK_LOCATION(sp)\r
        mfc0            k1, _CP0_STATUS\r
-       sw                      k1, portSTATUS_STACK_LOCATION(sp)\r
-\r
        /* Also save s6 so we can use it during this interrupt.  Any\r
        nesting interrupts should maintain the values of this register\r
        accross the ISR. */\r
        sw                      s6, 44(sp)\r
+       sw                      k1, portSTATUS_STACK_LOCATION(sp)\r
+\r
 \r
        /* s6 holds the EPC value, we may want this during the context switch. */\r
        mfc0            s6, _CP0_EPC\r