]> git.sur5r.net Git - freertos/commitdiff
Common source code:
authorrtel <rtel@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Fri, 11 Sep 2015 13:29:40 +0000 (13:29 +0000)
committerrtel <rtel@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Fri, 11 Sep 2015 13:29:40 +0000 (13:29 +0000)
- Remove configASSERT() if a queue cannot be created, malloc failed hook will be called anyway.

Demo apps:
- RZ/T blinky demo working, but still lots to do to improve the port.

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@2374 1d2547de-c912-0410-9cb9-b8ca96c0e9e2

13 files changed:
FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR_ARM/.settings/language.settings.xml
FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR_ARM/src/Blinky_Demo/main_blinky.c [new file with mode: 0644]
FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR_ARM/src/FreeRTOS_tick_config.c [new file with mode: 0644]
FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR_ARM/src/Full_Demo/IntQueueTimer.c [new file with mode: 0644]
FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR_ARM/src/Full_Demo/IntQueueTimer.h [new file with mode: 0644]
FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR_ARM/src/Full_Demo/main_full.c [new file with mode: 0644]
FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR_ARM/src/Full_Demo/reg_test.S [new file with mode: 0644]
FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR_ARM/src/main.c
FreeRTOS/Source/portable/GCC/ARM_CRx_No_GIC/ISR_Support.h [new file with mode: 0644]
FreeRTOS/Source/portable/GCC/ARM_CRx_No_GIC/port.c
FreeRTOS/Source/portable/GCC/ARM_CRx_No_GIC/portASM.S
FreeRTOS/Source/portable/GCC/ARM_CRx_No_GIC/portmacro.h
FreeRTOS/Source/queue.c

index 87a9bd8dd4daa20c5e3d7bd7f377a4acef4b9a21..53816e433605df81b22ed39a2be47b0c31b3e1a3 100644 (file)
@@ -3,7 +3,7 @@
        <configuration id="com.renesas.cdt.rz.hardwaredebug.win32.configuration.Id.137003302" name="HardwareDebug">\r
                <extension point="org.eclipse.cdt.core.LanguageSettingsProvider">\r
                        <provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>\r
-                       <provider class="com.renesas.cdt.common.build.spec.RZGCCBuiltinSpecsDetector" console="false" env-hash="-432948836777516605" id="RZGCCBuiltinSpecsDetector" keep-relative-paths="false" name="Renesas GNUARM-NONE GCCBuildinCompilerSettings" options-hash="857384749" parameter="arm-none-eabi-gcc -E -P -v -dD ${INPUTS}" prefer-non-shared="true">\r
+                       <provider class="com.renesas.cdt.common.build.spec.RZGCCBuiltinSpecsDetector" console="false" env-hash="-542772021278886125" id="RZGCCBuiltinSpecsDetector" keep-relative-paths="false" name="Renesas GNUARM-NONE GCCBuildinCompilerSettings" options-hash="857384749" parameter="arm-none-eabi-gcc -E -P -v -dD ${INPUTS}" prefer-non-shared="true">\r
                                <language-scope id="org.eclipse.cdt.core.gcc"/>\r
                                <language-scope id="org.eclipse.cdt.core.g++"/>\r
                        </provider>\r
diff --git a/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR_ARM/src/Blinky_Demo/main_blinky.c b/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR_ARM/src/Blinky_Demo/main_blinky.c
new file mode 100644 (file)
index 0000000..83d88be
--- /dev/null
@@ -0,0 +1,234 @@
+/*\r
+    FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.\r
+    All rights reserved\r
+\r
+    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+\r
+    This file is part of the FreeRTOS distribution.\r
+\r
+    FreeRTOS is free software; you can redistribute it and/or modify it under\r
+    the terms of the GNU General Public License (version 2) as published by the\r
+    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
+\r
+    ***************************************************************************\r
+    >>!   NOTE: The modification to the GPL is included to allow you to     !<<\r
+    >>!   distribute a combined work that includes FreeRTOS without being   !<<\r
+    >>!   obliged to provide the source code for proprietary components     !<<\r
+    >>!   outside of the FreeRTOS kernel.                                   !<<\r
+    ***************************************************************************\r
+\r
+    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
+    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
+    FOR A PARTICULAR PURPOSE.  Full license text is available on the following\r
+    link: http://www.freertos.org/a00114.html\r
+\r
+    ***************************************************************************\r
+     *                                                                       *\r
+     *    FreeRTOS provides completely free yet professionally developed,    *\r
+     *    robust, strictly quality controlled, supported, and cross          *\r
+     *    platform software that is more than just the market leader, it     *\r
+     *    is the industry's de facto standard.                               *\r
+     *                                                                       *\r
+     *    Help yourself get started quickly while simultaneously helping     *\r
+     *    to support the FreeRTOS project by purchasing a FreeRTOS           *\r
+     *    tutorial book, reference manual, or both:                          *\r
+     *    http://www.FreeRTOS.org/Documentation                              *\r
+     *                                                                       *\r
+    ***************************************************************************\r
+\r
+    http://www.FreeRTOS.org/FAQHelp.html - Having a problem?  Start by reading\r
+    the FAQ page "My application does not run, what could be wrong?".  Have you\r
+    defined configASSERT()?\r
+\r
+    http://www.FreeRTOS.org/support - In return for receiving this top quality\r
+    embedded software for free we request you assist our global community by\r
+    participating in the support forum.\r
+\r
+    http://www.FreeRTOS.org/training - Investing in training allows your team to\r
+    be as productive as possible as early as possible.  Now you can receive\r
+    FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
+    Ltd, and the world's leading authority on the world's leading RTOS.\r
+\r
+    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
+    including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
+    compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
+\r
+    http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
+    Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
+\r
+    http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
+    Integrity Systems ltd. to sell under the OpenRTOS brand.  Low cost OpenRTOS\r
+    licenses offer ticketed support, indemnification and commercial middleware.\r
+\r
+    http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+    engineered and independently SIL3 certified version for use in safety and\r
+    mission critical applications that require provable dependability.\r
+\r
+    1 tab == 4 spaces!\r
+*/\r
+\r
+/******************************************************************************\r
+ * NOTE 1:  This project provides two demo applications.  A simple blinky style\r
+ * project, and a more comprehensive test and demo application.  The\r
+ * mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting in main.c is used to select\r
+ * between the two.  See the notes on using mainCREATE_SIMPLE_BLINKY_DEMO_ONLY\r
+ * in main.c.  This file implements the simply blinky style version.\r
+ *\r
+ * NOTE 2:  This file only contains the source code that is specific to the\r
+ * basic demo.  Generic functions, such FreeRTOS hook functions, and functions\r
+ * required to configure the hardware are defined in main.c.\r
+ ******************************************************************************\r
+ *\r
+ * main_blinky() creates one queue, and two tasks.  It then starts the\r
+ * scheduler.\r
+ *\r
+ * The Queue Send Task:\r
+ * The queue send task is implemented by the prvQueueSendTask() function in\r
+ * this file.  prvQueueSendTask() sits in a loop that causes it to repeatedly\r
+ * block for 200 milliseconds, before sending the value 100 to the queue that\r
+ * was created within main_blinky().  Once the value is sent, the task loops\r
+ * back around to block for another 200 milliseconds...and so on.\r
+ *\r
+ * The Queue Receive Task:\r
+ * The queue receive task is implemented by the prvQueueReceiveTask() function\r
+ * in this file.  prvQueueReceiveTask() sits in a loop where it repeatedly\r
+ * blocks on attempts to read data from the queue that was created within\r
+ * main_blinky().  When data is received, the task checks the value of the\r
+ * data, and if the value equals the expected 100, toggles an LED.  The 'block\r
+ * time' parameter passed to the queue receive function specifies that the\r
+ * task should be held in the Blocked state indefinitely to wait for data to\r
+ * be available on the queue.  The queue receive task will only leave the\r
+ * Blocked state when the queue send task writes to the queue.  As the queue\r
+ * send task writes to the queue every 200 milliseconds, the queue receive\r
+ * task leaves the Blocked state every 200 milliseconds, and therefore toggles\r
+ * the LED every 200 milliseconds.\r
+ */\r
+\r
+/* Kernel includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+#include "semphr.h"\r
+\r
+/* Renesas includes. */\r
+#include "r_cg_macrodriver.h"\r
+#include "r_cg_userdefine.h"\r
+\r
+/* Priorities at which the tasks are created. */\r
+#define mainQUEUE_RECEIVE_TASK_PRIORITY                ( tskIDLE_PRIORITY + 2 )\r
+#define        mainQUEUE_SEND_TASK_PRIORITY            ( tskIDLE_PRIORITY + 1 )\r
+\r
+/* The rate at which data is sent to the queue.  The 200ms value is converted\r
+to ticks using the portTICK_PERIOD_MS constant. */\r
+#define mainQUEUE_SEND_FREQUENCY_MS                    ( 200 / portTICK_PERIOD_MS )\r
+\r
+/* The number of items the queue can hold.  This is 1 as the receive task\r
+will remove items as they are added, meaning the send task should always find\r
+the queue empty. */\r
+#define mainQUEUE_LENGTH                                       ( 1 )\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * Called by main when mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 1 in\r
+ * main.c.\r
+ */\r
+void main_blinky( void );\r
+\r
+/*\r
+ * The tasks as described in the comments at the top of this file.\r
+ */\r
+static void prvQueueReceiveTask( void *pvParameters );\r
+static void prvQueueSendTask( void *pvParameters );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* The queue used by both tasks. */\r
+static QueueHandle_t xQueue = NULL;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+void main_blinky( void )\r
+{\r
+       /* Create the queue. */\r
+       xQueue = xQueueCreate( mainQUEUE_LENGTH, sizeof( uint32_t ) );\r
+\r
+       if( xQueue != NULL )\r
+       {\r
+               /* Start the two tasks as described in the comments at the top of this\r
+               file. */\r
+               xTaskCreate( prvQueueReceiveTask,                               /* The function that implements the task. */\r
+                                       "Rx",                                                           /* The text name assigned to the task - for debug only as it is not used by the kernel. */\r
+                                       configMINIMAL_STACK_SIZE,                       /* The size of the stack to allocate to the task. */\r
+                                       NULL,                                                           /* The parameter passed to the task - not used in this case. */\r
+                                       mainQUEUE_RECEIVE_TASK_PRIORITY,        /* The priority assigned to the task. */\r
+                                       NULL );                                                         /* The task handle is not required, so NULL is passed. */\r
+\r
+               xTaskCreate( prvQueueSendTask, "TX", configMINIMAL_STACK_SIZE, NULL, mainQUEUE_SEND_TASK_PRIORITY, NULL );\r
+\r
+               /* Start the tasks and timer running. */\r
+               vTaskStartScheduler();\r
+       }\r
+\r
+       /* If all is well, the scheduler will now be running, and the following\r
+       line will never be reached.  If the following line does execute, then\r
+       there was either insufficient FreeRTOS heap memory available for the idle\r
+       and/or timer tasks to be created, or vTaskStartScheduler() was called from\r
+       User mode.  See the memory management section on the FreeRTOS web site for\r
+       more details on the FreeRTOS heap http://www.freertos.org/a00111.html.  The\r
+       mode from which main() is called is set in the C start up code and must be\r
+       a privileged mode (not user mode). */\r
+       for( ;; );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvQueueSendTask( void *pvParameters )\r
+{\r
+TickType_t xNextWakeTime;\r
+const unsigned long ulValueToSend = 100UL;\r
+\r
+       /* Remove compiler warning about unused parameter. */\r
+       ( void ) pvParameters;\r
+\r
+       /* Initialise xNextWakeTime - this only needs to be done once. */\r
+       xNextWakeTime = xTaskGetTickCount();\r
+\r
+       for( ;; )\r
+       {\r
+               /* Place this task in the blocked state until it is time to run again. */\r
+               vTaskDelayUntil( &xNextWakeTime, mainQUEUE_SEND_FREQUENCY_MS );\r
+\r
+               /* Send to the queue - causing the queue receive task to unblock and\r
+               toggle the LED.  0 is used as the block time so the sending operation\r
+               will not block - it shouldn't need to block as the queue should always\r
+               be empty at this point in the code. */\r
+               xQueueSend( xQueue, &ulValueToSend, 0U );\r
+       }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvQueueReceiveTask( void *pvParameters )\r
+{\r
+unsigned long ulReceivedValue;\r
+const unsigned long ulExpectedValue = 100UL;\r
+\r
+       /* Remove compiler warning about unused parameter. */\r
+       ( void ) pvParameters;\r
+\r
+       for( ;; )\r
+       {\r
+               /* Wait until something arrives in the queue - this task will block\r
+               indefinitely provided INCLUDE_vTaskSuspend is set to 1 in\r
+               FreeRTOSConfig.h. */\r
+               xQueueReceive( xQueue, &ulReceivedValue, portMAX_DELAY );\r
+\r
+               /*  To get here something must have been received from the queue, but\r
+               is it the expected value?  If it is, toggle the LED. */\r
+               if( ulReceivedValue == ulExpectedValue )\r
+               {\r
+                       LED2 = !LED2;\r
+                       ulReceivedValue = 0U;\r
+               }\r
+       }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
diff --git a/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR_ARM/src/FreeRTOS_tick_config.c b/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR_ARM/src/FreeRTOS_tick_config.c
new file mode 100644 (file)
index 0000000..e2eff09
--- /dev/null
@@ -0,0 +1,155 @@
+/*\r
+    FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.\r
+    All rights reserved\r
+\r
+    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+\r
+    This file is part of the FreeRTOS distribution.\r
+\r
+    FreeRTOS is free software; you can redistribute it and/or modify it under\r
+    the terms of the GNU General Public License (version 2) as published by the\r
+    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
+\r
+    ***************************************************************************\r
+    >>!   NOTE: The modification to the GPL is included to allow you to     !<<\r
+    >>!   distribute a combined work that includes FreeRTOS without being   !<<\r
+    >>!   obliged to provide the source code for proprietary components     !<<\r
+    >>!   outside of the FreeRTOS kernel.                                   !<<\r
+    ***************************************************************************\r
+\r
+    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
+    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
+    FOR A PARTICULAR PURPOSE.  Full license text is available on the following\r
+    link: http://www.freertos.org/a00114.html\r
+\r
+    ***************************************************************************\r
+     *                                                                       *\r
+     *    FreeRTOS provides completely free yet professionally developed,    *\r
+     *    robust, strictly quality controlled, supported, and cross          *\r
+     *    platform software that is more than just the market leader, it     *\r
+     *    is the industry's de facto standard.                               *\r
+     *                                                                       *\r
+     *    Help yourself get started quickly while simultaneously helping     *\r
+     *    to support the FreeRTOS project by purchasing a FreeRTOS           *\r
+     *    tutorial book, reference manual, or both:                          *\r
+     *    http://www.FreeRTOS.org/Documentation                              *\r
+     *                                                                       *\r
+    ***************************************************************************\r
+\r
+    http://www.FreeRTOS.org/FAQHelp.html - Having a problem?  Start by reading\r
+    the FAQ page "My application does not run, what could be wrong?".  Have you\r
+    defined configASSERT()?\r
+\r
+    http://www.FreeRTOS.org/support - In return for receiving this top quality\r
+    embedded software for free we request you assist our global community by\r
+    participating in the support forum.\r
+\r
+    http://www.FreeRTOS.org/training - Investing in training allows your team to\r
+    be as productive as possible as early as possible.  Now you can receive\r
+    FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
+    Ltd, and the world's leading authority on the world's leading RTOS.\r
+\r
+    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
+    including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
+    compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
+\r
+    http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
+    Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
+\r
+    http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
+    Integrity Systems ltd. to sell under the OpenRTOS brand.  Low cost OpenRTOS\r
+    licenses offer ticketed support, indemnification and commercial middleware.\r
+\r
+    http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+    engineered and independently SIL3 certified version for use in safety and\r
+    mission critical applications that require provable dependability.\r
+\r
+    1 tab == 4 spaces!\r
+*/\r
+\r
+/* FreeRTOS includes. */\r
+#include "FreeRTOS.h"\r
+#include "ISR_Support.h"\r
+\r
+/* Renesas includes. */\r
+#include "r_cg_macrodriver.h"\r
+#include "r_cg_cmt.h"\r
+#include "r_reset.h"\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * Entry point for the FreeRTOS tick interrupt.  This provides the prolog code\r
+ * necessary to support interrupt nesting.\r
+ */\r
+static void FreeRTOS_Tick_Handler_Entry( void ) __attribute__((naked));\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * The application must provide a function that configures a peripheral to\r
+ * create the FreeRTOS tick interrupt, then define configSETUP_TICK_INTERRUPT()\r
+ * in FreeRTOSConfig.h to call the function.\r
+ */\r
+void vConfigureTickInterrupt( void )\r
+{\r
+uint32_t ulCompareMatchValue;\r
+const uint32_t ulPeripheralClockDivider = 6UL, ulCMTClockDivider = 8UL;\r
+\r
+       /* Disable CMI5 interrupt. */\r
+       VIC.IEC9.LONG = 0x00001000UL;\r
+\r
+       /* Cancel CMT stop state in LPC. */\r
+       r_rst_write_enable();\r
+       MSTP( CMT2 ) = 0U;\r
+       r_rst_write_disable();\r
+\r
+       /* Interrupt on compare match. */\r
+       CMT5.CMCR.BIT.CMIE = 1;\r
+\r
+#warning Tick rate is not yet accurate.\r
+       /* Calculate the compare match value. */\r
+       ulCompareMatchValue = configCPU_CLOCK_HZ / ulPeripheralClockDivider;\r
+       ulCompareMatchValue /= ulCMTClockDivider;\r
+       ulCompareMatchValue /= configTICK_RATE_HZ;\r
+       ulCompareMatchValue -= 1UL;\r
+\r
+       /* Set the compare match value. */\r
+       CMT5.CMCOR = ( unsigned short ) ulCompareMatchValue;\r
+\r
+       /* Divide the PCLK by 8. */\r
+       CMT5.CMCR.BIT.CKS = 0;\r
+\r
+       CMT5.CMCNT = 0;\r
+\r
+       /* Set CMI5 edge detection type. */\r
+       VIC.PLS9.LONG |= 0x00001000UL;\r
+\r
+       /* Set CMI5 priority level to the lowest possible. */\r
+       VIC.PRL300.LONG = _CMT_PRIORITY_LEVEL31;\r
+\r
+       /* Set CMI5 interrupt address */\r
+       VIC.VAD300.LONG = ( uint32_t ) FreeRTOS_Tick_Handler_Entry;\r
+\r
+       /* Enable CMI5 interrupt in ICU. */\r
+       VIC.IEN9.LONG |= 0x00001000UL;\r
+\r
+       /* Start CMT5 count. */\r
+       CMT.CMSTR2.BIT.STR5 = 1U;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void FreeRTOS_Tick_Handler_Entry( void )\r
+{\r
+       /* This is a naked function, and should not include any C code. */\r
+       portNESTING_INTERRUPT_ENTRY();\r
+       __asm volatile( " LDR           r1, vTickHandlerConst                           \t\n"\r
+                                       " BLX           r1                                                                      \t\n"\r
+                                       " vTickHandlerConst: .word FreeRTOS_Tick_Handler        " );\r
+       portNESTING_INTERRUPT_EXIT();\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+\r
+\r
+\r
diff --git a/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR_ARM/src/Full_Demo/IntQueueTimer.c b/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR_ARM/src/Full_Demo/IntQueueTimer.c
new file mode 100644 (file)
index 0000000..4c443ca
--- /dev/null
@@ -0,0 +1,186 @@
+/*\r
+    FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.\r
+    All rights reserved\r
+\r
+    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+\r
+    This file is part of the FreeRTOS distribution.\r
+\r
+    FreeRTOS is free software; you can redistribute it and/or modify it under\r
+    the terms of the GNU General Public License (version 2) as published by the\r
+    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
+\r
+    ***************************************************************************\r
+    >>!   NOTE: The modification to the GPL is included to allow you to     !<<\r
+    >>!   distribute a combined work that includes FreeRTOS without being   !<<\r
+    >>!   obliged to provide the source code for proprietary components     !<<\r
+    >>!   outside of the FreeRTOS kernel.                                   !<<\r
+    ***************************************************************************\r
+\r
+    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
+    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
+    FOR A PARTICULAR PURPOSE.  Full license text is available on the following\r
+    link: http://www.freertos.org/a00114.html\r
+\r
+    ***************************************************************************\r
+     *                                                                       *\r
+     *    FreeRTOS provides completely free yet professionally developed,    *\r
+     *    robust, strictly quality controlled, supported, and cross          *\r
+     *    platform software that is more than just the market leader, it     *\r
+     *    is the industry's de facto standard.                               *\r
+     *                                                                       *\r
+     *    Help yourself get started quickly while simultaneously helping     *\r
+     *    to support the FreeRTOS project by purchasing a FreeRTOS           *\r
+     *    tutorial book, reference manual, or both:                          *\r
+     *    http://www.FreeRTOS.org/Documentation                              *\r
+     *                                                                       *\r
+    ***************************************************************************\r
+\r
+    http://www.FreeRTOS.org/FAQHelp.html - Having a problem?  Start by reading\r
+    the FAQ page "My application does not run, what could be wrong?".  Have you\r
+    defined configASSERT()?\r
+\r
+    http://www.FreeRTOS.org/support - In return for receiving this top quality\r
+    embedded software for free we request you assist our global community by\r
+    participating in the support forum.\r
+\r
+    http://www.FreeRTOS.org/training - Investing in training allows your team to\r
+    be as productive as possible as early as possible.  Now you can receive\r
+    FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
+    Ltd, and the world's leading authority on the world's leading RTOS.\r
+\r
+    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
+    including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
+    compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
+\r
+    http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
+    Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
+\r
+    http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
+    Integrity Systems ltd. to sell under the OpenRTOS brand.  Low cost OpenRTOS\r
+    licenses offer ticketed support, indemnification and commercial middleware.\r
+\r
+    http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+    engineered and independently SIL3 certified version for use in safety and\r
+    mission critical applications that require provable dependability.\r
+\r
+    1 tab == 4 spaces!\r
+*/\r
+\r
+/*\r
+ * This file contains the non-portable and therefore RZ/T specific parts of\r
+ * the IntQueue standard demo task - namely the configuration of the timers\r
+ * that generate the interrupts and the interrupt entry points.\r
+ */\r
+\r
+/* Scheduler includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+\r
+/* Demo includes. */\r
+#include "IntQueueTimer.h"\r
+#include "IntQueue.h"\r
+\r
+/* Renesas includes. */\r
+#include "r_cg_macrodriver.h"\r
+#include "r_cg_cmt.h"\r
+#include "r_reset.h"\r
+\r
+#define tmrCMT_1_CHANNEL_0_HZ  ( 2000UL )\r
+#define tmrCMT_1_CHANNEL_1_HZ  ( 2011UL )\r
+\r
+/* Handlers for the two timers used.  See the documentation page\r
+for this port on http://www.FreeRTOS.org for more information on writing\r
+interrupt handlers. */\r
+void vCMT_1_Channel_0_ISR( void );\r
+void vCMT_1_Channel_1_ISR( void );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+void vInitialiseTimerForIntQueueTest( void )\r
+{\r
+uint32_t ulCompareMatchValue;\r
+const uint32_t ulPeripheralClockDivider = 6UL, ulCMTClockDivider = 8UL;\r
+extern void FreeRTOS_IRQ_Handler( void );\r
+\r
+       /* Disable CMI2 and CMI3 interrupts. */\r
+       VIC.IEC0.LONG = ( 1UL << 23UL ) | ( 1UL << 24UL );\r
+\r
+       /* Cancel CMT stop state in LPC. */\r
+       r_rst_write_enable();\r
+       MSTP( CMT1 ) = 0U;\r
+       r_rst_write_disable();\r
+\r
+       /* Interrupt on compare match. */\r
+       CMT2.CMCR.BIT.CMIE = 1;\r
+       CMT3.CMCR.BIT.CMIE = 1;\r
+\r
+       /* Calculate the compare match value. */\r
+       ulCompareMatchValue = configCPU_CLOCK_HZ / ulPeripheralClockDivider;\r
+       ulCompareMatchValue /= ulCMTClockDivider;\r
+       ulCompareMatchValue /= tmrCMT_1_CHANNEL_0_HZ;\r
+       ulCompareMatchValue -= 1UL;\r
+       CMT2.CMCOR = ( unsigned short ) ulCompareMatchValue;\r
+\r
+       ulCompareMatchValue = configCPU_CLOCK_HZ / ulPeripheralClockDivider;\r
+       ulCompareMatchValue /= ulCMTClockDivider;\r
+       ulCompareMatchValue /= tmrCMT_1_CHANNEL_1_HZ;\r
+       ulCompareMatchValue -= 1UL;\r
+       CMT3.CMCOR = ( unsigned short ) ulCompareMatchValue;\r
+\r
+       /* Divide the PCLK by 8. */\r
+       CMT2.CMCR.BIT.CKS = 0;\r
+       CMT3.CMCR.BIT.CKS = 0;\r
+\r
+       /* Clear count to 0. */\r
+       CMT2.CMCNT = 0;\r
+       CMT3.CMCNT = 0;\r
+\r
+       /* Set CMI2 and CMI3 edge detection type. */\r
+       VIC.PLS0.LONG |= ( 1UL << 23UL ) | ( 1UL << 24UL );\r
+\r
+       /* Set CMI2 and CMI3 priority levels so they nest. */\r
+       VIC.PRL23.LONG = _CMT_PRIORITY_LEVEL10;\r
+       VIC.PRL24.LONG = _CMT_PRIORITY_LEVEL9;\r
+\r
+       /* Set CMI2 and CMI3 interrupt address. */\r
+#warning Int 1 timer handler addresses not set.\r
+       VIC.VAD23.LONG = ( uint32_t ) NULL;\r
+       VIC.VAD24.LONG = ( uint32_t ) NULL;\r
+\r
+    /* Enable CMI2 and CMI3 interrupts in ICU. */\r
+    VIC.IEN0.LONG |= ( 1UL << 23UL ) | ( 1UL << 24UL );\r
+\r
+    /* Start CMT1 channel 0 and 1 count. */\r
+    CMT.CMSTR1.BIT.STR2 = 1U;\r
+       CMT.CMSTR1.BIT.STR3 = 1U;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vCMT_1_Channel_0_ISR( void )\r
+{\r
+       /* Re-enabled interrupts. */\r
+       taskENABLE_INTERRUPTS();\r
+\r
+       /* Call the handler that is part of the common code - this is where the\r
+       non-portable code ends and the actual test is performed. */\r
+       portYIELD_FROM_ISR( xFirstTimerHandler() );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vCMT_1_Channel_1_ISR( void )\r
+{\r
+       /* Re-enabled interrupts. */\r
+       portENABLE_INTERRUPTS();\r
+\r
+       /* Call the handler that is part of the common code - this is where the\r
+       non-portable code ends and the actual test is performed. */\r
+       portYIELD_FROM_ISR( xSecondTimerHandler() );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+\r
+\r
+\r
+\r
+\r
diff --git a/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR_ARM/src/Full_Demo/IntQueueTimer.h b/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR_ARM/src/Full_Demo/IntQueueTimer.h
new file mode 100644 (file)
index 0000000..fcf9f8c
--- /dev/null
@@ -0,0 +1,78 @@
+/*\r
+    FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.\r
+    All rights reserved\r
+\r
+    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+\r
+    This file is part of the FreeRTOS distribution.\r
+\r
+    FreeRTOS is free software; you can redistribute it and/or modify it under\r
+    the terms of the GNU General Public License (version 2) as published by the\r
+    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
+\r
+    ***************************************************************************\r
+    >>!   NOTE: The modification to the GPL is included to allow you to     !<<\r
+    >>!   distribute a combined work that includes FreeRTOS without being   !<<\r
+    >>!   obliged to provide the source code for proprietary components     !<<\r
+    >>!   outside of the FreeRTOS kernel.                                   !<<\r
+    ***************************************************************************\r
+\r
+    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
+    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
+    FOR A PARTICULAR PURPOSE.  Full license text is available on the following\r
+    link: http://www.freertos.org/a00114.html\r
+\r
+    ***************************************************************************\r
+     *                                                                       *\r
+     *    FreeRTOS provides completely free yet professionally developed,    *\r
+     *    robust, strictly quality controlled, supported, and cross          *\r
+     *    platform software that is more than just the market leader, it     *\r
+     *    is the industry's de facto standard.                               *\r
+     *                                                                       *\r
+     *    Help yourself get started quickly while simultaneously helping     *\r
+     *    to support the FreeRTOS project by purchasing a FreeRTOS           *\r
+     *    tutorial book, reference manual, or both:                          *\r
+     *    http://www.FreeRTOS.org/Documentation                              *\r
+     *                                                                       *\r
+    ***************************************************************************\r
+\r
+    http://www.FreeRTOS.org/FAQHelp.html - Having a problem?  Start by reading\r
+    the FAQ page "My application does not run, what could be wrong?".  Have you\r
+    defined configASSERT()?\r
+\r
+    http://www.FreeRTOS.org/support - In return for receiving this top quality\r
+    embedded software for free we request you assist our global community by\r
+    participating in the support forum.\r
+\r
+    http://www.FreeRTOS.org/training - Investing in training allows your team to\r
+    be as productive as possible as early as possible.  Now you can receive\r
+    FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
+    Ltd, and the world's leading authority on the world's leading RTOS.\r
+\r
+    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
+    including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
+    compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
+\r
+    http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
+    Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
+\r
+    http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
+    Integrity Systems ltd. to sell under the OpenRTOS brand.  Low cost OpenRTOS\r
+    licenses offer ticketed support, indemnification and commercial middleware.\r
+\r
+    http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+    engineered and independently SIL3 certified version for use in safety and\r
+    mission critical applications that require provable dependability.\r
+\r
+    1 tab == 4 spaces!\r
+*/\r
+\r
+#ifndef INT_QUEUE_TIMER_H\r
+#define INT_QUEUE_TIMER_H\r
+\r
+void vInitialiseTimerForIntQueueTest( void );\r
+portBASE_TYPE xTimer0Handler( void );\r
+portBASE_TYPE xTimer1Handler( void );\r
+\r
+#endif\r
+\r
diff --git a/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR_ARM/src/Full_Demo/main_full.c b/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR_ARM/src/Full_Demo/main_full.c
new file mode 100644 (file)
index 0000000..b0cc5bc
--- /dev/null
@@ -0,0 +1,542 @@
+/*\r
+    FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.\r
+    All rights reserved\r
+\r
+    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+\r
+    This file is part of the FreeRTOS distribution.\r
+\r
+    FreeRTOS is free software; you can redistribute it and/or modify it under\r
+    the terms of the GNU General Public License (version 2) as published by the\r
+    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
+\r
+    ***************************************************************************\r
+    >>!   NOTE: The modification to the GPL is included to allow you to     !<<\r
+    >>!   distribute a combined work that includes FreeRTOS without being   !<<\r
+    >>!   obliged to provide the source code for proprietary components     !<<\r
+    >>!   outside of the FreeRTOS kernel.                                   !<<\r
+    ***************************************************************************\r
+\r
+    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
+    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
+    FOR A PARTICULAR PURPOSE.  Full license text is available on the following\r
+    link: http://www.freertos.org/a00114.html\r
+\r
+    ***************************************************************************\r
+     *                                                                       *\r
+     *    FreeRTOS provides completely free yet professionally developed,    *\r
+     *    robust, strictly quality controlled, supported, and cross          *\r
+     *    platform software that is more than just the market leader, it     *\r
+     *    is the industry's de facto standard.                               *\r
+     *                                                                       *\r
+     *    Help yourself get started quickly while simultaneously helping     *\r
+     *    to support the FreeRTOS project by purchasing a FreeRTOS           *\r
+     *    tutorial book, reference manual, or both:                          *\r
+     *    http://www.FreeRTOS.org/Documentation                              *\r
+     *                                                                       *\r
+    ***************************************************************************\r
+\r
+    http://www.FreeRTOS.org/FAQHelp.html - Having a problem?  Start by reading\r
+    the FAQ page "My application does not run, what could be wrong?".  Have you\r
+    defined configASSERT()?\r
+\r
+    http://www.FreeRTOS.org/support - In return for receiving this top quality\r
+    embedded software for free we request you assist our global community by\r
+    participating in the support forum.\r
+\r
+    http://www.FreeRTOS.org/training - Investing in training allows your team to\r
+    be as productive as possible as early as possible.  Now you can receive\r
+    FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
+    Ltd, and the world's leading authority on the world's leading RTOS.\r
+\r
+    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
+    including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
+    compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
+\r
+    http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
+    Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
+\r
+    http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
+    Integrity Systems ltd. to sell under the OpenRTOS brand.  Low cost OpenRTOS\r
+    licenses offer ticketed support, indemnification and commercial middleware.\r
+\r
+    http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+    engineered and independently SIL3 certified version for use in safety and\r
+    mission critical applications that require provable dependability.\r
+\r
+    1 tab == 4 spaces!\r
+*/\r
+\r
+/******************************************************************************\r
+ * NOTE 1:  This project provides two demo applications.  A simple blinky\r
+ * style project, and a more comprehensive test and demo application.  The\r
+ * mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting in main.c is used to\r
+ * select between the two.  See the notes on using\r
+ * mainCREATE_SIMPLE_BLINKY_DEMO_ONLY in main.c.  This file implements the\r
+ * comprehensive version.\r
+ *\r
+ * NOTE 2:  This file only contains the source code that is specific to the\r
+ * full demo.  Generic functions, such FreeRTOS hook functions, and functions\r
+ * required to configure the hardware, are defined in main.c.\r
+ *\r
+ ******************************************************************************\r
+ *\r
+ * main_full() creates all the demo application tasks and software timers, then\r
+ * starts the scheduler.  The web documentation provides more details of the\r
+ * standard demo application tasks, which provide no particular functionality,\r
+ * but do provide a good example of how to use the FreeRTOS API.\r
+ *\r
+ * In addition to the standard demo tasks, the following tasks and tests are\r
+ * defined and/or created within this file:\r
+ *\r
+ * FreeRTOS+CLI command console.  For reasons of robustness testing the UART\r
+ * driver is deliberately written to be inefficient and should not be used as a\r
+ * template for a production driver.  Type "help" to see a list of registered\r
+ * commands.  The FreeRTOS+CLI license is different to the FreeRTOS license, see\r
+ * http://www.FreeRTOS.org/cli for license and usage details.  The default baud\r
+ * rate is 115200.\r
+ *\r
+ * "Reg test" tasks - These fill both the core and floating point registers with\r
+ * known values, then check that each register maintains its expected value for\r
+ * the lifetime of the task.  Each task uses a different set of values.  The reg\r
+ * test tasks execute with a very low priority, so get preempted very\r
+ * frequently.  A register containing an unexpected value is indicative of an\r
+ * error in the context switching mechanism.\r
+ *\r
+ * "Check" task - The check task period is initially set to three seconds.  The\r
+ * task checks that all the standard demo tasks, and the register check tasks,\r
+ * are not only still executing, but are executing without reporting any errors.\r
+ * If the check task discovers that a task has either stalled, or reported an\r
+ * error, then it changes its own execution period from the initial three\r
+ * seconds, to just 200ms.  The check task also toggles an LED each time it is\r
+ * called.  This provides a visual indication of the system status:  If the LED\r
+ * toggles every three seconds, then no issues have been discovered.  If the LED\r
+ * toggles every 200ms, then an issue has been discovered with at least one\r
+ * task.\r
+ */\r
+\r
+/* Standard includes. */\r
+#include <stdio.h>\r
+\r
+/* Kernel includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+#include "timers.h"\r
+#include "semphr.h"\r
+\r
+/* Standard demo application includes. */\r
+#include "flop.h"\r
+#include "semtest.h"\r
+#include "dynamic.h"\r
+#include "BlockQ.h"\r
+#include "blocktim.h"\r
+#include "countsem.h"\r
+#include "GenQTest.h"\r
+#include "recmutex.h"\r
+#include "death.h"\r
+#include "partest.h"\r
+#include "comtest2.h"\r
+#include "serial.h"\r
+#include "TimerDemo.h"\r
+#include "QueueOverwrite.h"\r
+#include "IntQueue.h"\r
+#include "EventGroupsDemo.h"\r
+#include "TaskNotify.h"\r
+#include "IntSemTest.h"\r
+\r
+/* Renesas includes. */\r
+#include "r_cg_macrodriver.h"\r
+#include "r_cg_userdefine.h"\r
+\r
+/* Priorities for the demo application tasks. */\r
+#define mainSEM_TEST_PRIORITY                          ( tskIDLE_PRIORITY + 1UL )\r
+#define mainBLOCK_Q_PRIORITY                           ( tskIDLE_PRIORITY + 2UL )\r
+#define mainCREATOR_TASK_PRIORITY                      ( tskIDLE_PRIORITY + 3UL )\r
+#define mainFLOP_TASK_PRIORITY                         ( tskIDLE_PRIORITY )\r
+#define mainUART_COMMAND_CONSOLE_STACK_SIZE    ( configMINIMAL_STACK_SIZE * 3UL )\r
+#define mainCOM_TEST_TASK_PRIORITY                     ( tskIDLE_PRIORITY + 2 )\r
+#define mainCHECK_TASK_PRIORITY                                ( configMAX_PRIORITIES - 1 )\r
+#define mainQUEUE_OVERWRITE_PRIORITY           ( tskIDLE_PRIORITY )\r
+\r
+/* The priority used by the UART command console task. */\r
+#define mainUART_COMMAND_CONSOLE_TASK_PRIORITY ( configMAX_PRIORITIES - 2 )\r
+\r
+/* A block time of zero simply means "don't block". */\r
+#define mainDONT_BLOCK                                         ( 0UL )\r
+\r
+/* The period after which the check timer will expire, in ms, provided no errors\r
+have been reported by any of the standard demo tasks.  ms are converted to the\r
+equivalent in ticks using the portTICK_PERIOD_MS constant. */\r
+#define mainNO_ERROR_CHECK_TASK_PERIOD         ( 3000UL / portTICK_PERIOD_MS )\r
+\r
+/* The period at which the check timer will expire, in ms, if an error has been\r
+reported in one of the standard demo tasks.  ms are converted to the equivalent\r
+in ticks using the portTICK_PERIOD_MS constant. */\r
+#define mainERROR_CHECK_TASK_PERIOD            ( 200UL / portTICK_PERIOD_MS )\r
+\r
+/* Parameters that are passed into the register check tasks solely for the\r
+purpose of ensuring parameters are passed into tasks correctly. */\r
+#define mainREG_TEST_TASK_1_PARAMETER          ( ( void * ) 0x12345678 )\r
+#define mainREG_TEST_TASK_2_PARAMETER          ( ( void * ) 0x87654321 )\r
+\r
+/* The base period used by the timer test tasks. */\r
+#define mainTIMER_TEST_PERIOD                          ( 50 )\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * Entry point for the comprehensive demo (as opposed to the simple blinky\r
+ * demo).\r
+ */\r
+void main_full( void );\r
+\r
+/*\r
+ * The full demo includes some functionality called from the tick hook.\r
+ */\r
+void vFullDemoTickHook( void );\r
+\r
+ /*\r
+ * The check task, as described at the top of this file.\r
+ */\r
+static void prvCheckTask( void *pvParameters );\r
+\r
+/*\r
+ * Register check tasks, and the tasks used to write over and check the contents\r
+ * of the FPU registers, as described at the top of this file.  The nature of\r
+ * these files necessitates that they are written in an assembly file, but the\r
+ * entry points are kept in the C file for the convenience of checking the task\r
+ * parameter.\r
+ */\r
+static void prvRegTestTaskEntry1( void *pvParameters );\r
+extern void vRegTest1Implementation( void );\r
+static void prvRegTestTaskEntry2( void *pvParameters );\r
+extern void vRegTest2Implementation( void );\r
+\r
+/*\r
+ * Register commands that can be used with FreeRTOS+CLI.  The commands are\r
+ * defined in CLI-Commands.c and File-Related-CLI-Command.c respectively.\r
+ */\r
+extern void vRegisterSampleCLICommands( void );\r
+\r
+/*\r
+ * The task that manages the FreeRTOS+CLI input and output.\r
+ */\r
+extern void vUARTCommandConsoleStart( uint16_t usStackSize, UBaseType_t uxPriority );\r
+\r
+/*\r
+ * A high priority task that does nothing other than execute at a pseudo random\r
+ * time to ensure the other test tasks don't just execute in a repeating\r
+ * pattern.\r
+ */\r
+static void prvPseudoRandomiser( void *pvParameters );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* The following two variables are used to communicate the status of the\r
+register check tasks to the check task.  If the variables keep incrementing,\r
+then the register check tasks have not discovered any errors.  If a variable\r
+stops incrementing, then an error has been found. */\r
+volatile unsigned long ulRegTest1LoopCounter = 0UL, ulRegTest2LoopCounter = 0UL;\r
+\r
+/* String for display in the web server.  It is set to an error message if the\r
+check task detects an error.  */\r
+const char *pcStatusMessage = "All tasks running without error";\r
+/*-----------------------------------------------------------*/\r
+\r
+void main_full( void )\r
+{\r
+       /* Start all the other standard demo/test tasks.  They have no particular\r
+       functionality, but do demonstrate how to use the FreeRTOS API and test the\r
+       kernel port. */\r
+#warning IntQ tasks not included.\r
+//     vStartInterruptQueueTasks();\r
+       vStartDynamicPriorityTasks();\r
+       vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
+       vCreateBlockTimeTasks();\r
+       vStartCountingSemaphoreTasks();\r
+       vStartGenericQueueTasks( tskIDLE_PRIORITY );\r
+       vStartRecursiveMutexTasks();\r
+       vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
+       vStartMathTasks( mainFLOP_TASK_PRIORITY );\r
+       vStartTimerDemoTask( mainTIMER_TEST_PERIOD );\r
+       vStartQueueOverwriteTask( mainQUEUE_OVERWRITE_PRIORITY );\r
+       vStartEventGroupTasks();\r
+       vStartTaskNotifyTask();\r
+       vStartInterruptSemaphoreTasks();\r
+\r
+\r
+       /* Start the tasks that implements the command console on the UART, as\r
+       described above. */\r
+#warning CLI is commented out\r
+//     vUARTCommandConsoleStart( mainUART_COMMAND_CONSOLE_STACK_SIZE, mainUART_COMMAND_CONSOLE_TASK_PRIORITY );\r
+\r
+       /* Register the standard CLI commands. */\r
+//     vRegisterSampleCLICommands();\r
+\r
+       /* Create the register check tasks, as described at the top of this     file */\r
+       xTaskCreate( prvRegTestTaskEntry1, "Reg1", configMINIMAL_STACK_SIZE, mainREG_TEST_TASK_1_PARAMETER, tskIDLE_PRIORITY, NULL );\r
+       xTaskCreate( prvRegTestTaskEntry2, "Reg2", configMINIMAL_STACK_SIZE, mainREG_TEST_TASK_2_PARAMETER, tskIDLE_PRIORITY, NULL );\r
+\r
+       /* Create the task that just adds a little random behaviour. */\r
+       xTaskCreate( prvPseudoRandomiser, "Rnd", configMINIMAL_STACK_SIZE, NULL, configMAX_PRIORITIES - 1, NULL );\r
+\r
+       /* Create the task that performs the 'check' functionality,     as described at\r
+       the top of this file. */\r
+       xTaskCreate( prvCheckTask, "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );\r
+\r
+       /* The set of tasks created by the following function call have to be\r
+       created last as they keep account of the number of tasks they expect to see\r
+       running. */\r
+       vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY );\r
+\r
+       /* Start the scheduler. */\r
+       vTaskStartScheduler();\r
+\r
+       /* If all is well, the scheduler will now be running, and the following\r
+       line will never be reached.  If the following line does execute, then\r
+       there was either insufficient FreeRTOS heap memory available for the idle\r
+       and/or timer tasks to be created, or vTaskStartScheduler() was called from\r
+       User mode.  See the memory management section on the FreeRTOS web site for\r
+       more details on the FreeRTOS heap http://www.freertos.org/a00111.html.  The\r
+       mode from which main() is called is set in the C start up code and must be\r
+       a privileged mode (not user mode). */\r
+       for( ;; );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvCheckTask( void *pvParameters )\r
+{\r
+TickType_t xDelayPeriod = mainNO_ERROR_CHECK_TASK_PERIOD;\r
+TickType_t xLastExecutionTime;\r
+static unsigned long ulLastRegTest1Value = 0, ulLastRegTest2Value = 0;\r
+unsigned long ulErrorFound = pdFALSE;\r
+\r
+       /* Just to stop compiler warnings. */\r
+       ( void ) pvParameters;\r
+\r
+       /* Initialise xLastExecutionTime so the first call to vTaskDelayUntil()\r
+       works correctly. */\r
+       xLastExecutionTime = xTaskGetTickCount();\r
+\r
+       /* Cycle for ever, delaying then checking all the other tasks are still\r
+       operating without error.  The onboard LED is toggled on each iteration.\r
+       If an error is detected then the delay period is decreased from\r
+       mainNO_ERROR_CHECK_TASK_PERIOD to mainERROR_CHECK_TASK_PERIOD.  This has the\r
+       effect of increasing the rate at which the onboard LED toggles, and in so\r
+       doing gives visual feedback of the system status. */\r
+       for( ;; )\r
+       {\r
+               /* Delay until it is time to execute again. */\r
+               vTaskDelayUntil( &xLastExecutionTime, xDelayPeriod );\r
+\r
+               /* Check all the demo tasks (other than the flash tasks) to ensure\r
+               that they are all still running, and that none have detected an error. */\r
+#warning Int q tasks not created.\r
+if( 0 )//              if( xAreIntQueueTasksStillRunning() != pdTRUE )\r
+               {\r
+                       ulErrorFound |= 1UL << 0UL;\r
+               }\r
+\r
+               if( xAreMathsTaskStillRunning() != pdTRUE )\r
+               {\r
+                       ulErrorFound |= 1UL << 1UL;\r
+               }\r
+\r
+               if( xAreDynamicPriorityTasksStillRunning() != pdTRUE )\r
+               {\r
+                       ulErrorFound |= 1UL << 2UL;\r
+               }\r
+\r
+               if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
+               {\r
+                       ulErrorFound |= 1UL << 3UL;\r
+               }\r
+\r
+               if ( xAreBlockTimeTestTasksStillRunning() != pdTRUE )\r
+               {\r
+                       ulErrorFound |= 1UL << 4UL;\r
+               }\r
+\r
+               if ( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
+               {\r
+                       ulErrorFound |= 1UL << 5UL;\r
+               }\r
+\r
+               if ( xAreRecursiveMutexTasksStillRunning() != pdTRUE )\r
+               {\r
+                       ulErrorFound |= 1UL << 6UL;\r
+               }\r
+\r
+               if( xIsCreateTaskStillRunning() != pdTRUE )\r
+               {\r
+                       ulErrorFound |= 1UL << 7UL;\r
+               }\r
+\r
+               if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
+               {\r
+                       ulErrorFound |= 1UL << 8UL;\r
+               }\r
+\r
+               if( xAreTimerDemoTasksStillRunning( ( TickType_t ) mainNO_ERROR_CHECK_TASK_PERIOD ) != pdPASS )\r
+               {\r
+                       ulErrorFound |= 1UL << 9UL;\r
+               }\r
+\r
+               if( xAreCountingSemaphoreTasksStillRunning() != pdTRUE )\r
+               {\r
+                       ulErrorFound |= 1UL << 10UL;\r
+               }\r
+\r
+               if( xIsQueueOverwriteTaskStillRunning() != pdPASS )\r
+               {\r
+                       ulErrorFound |= 1UL << 11UL;\r
+               }\r
+\r
+               if( xAreEventGroupTasksStillRunning() != pdPASS )\r
+               {\r
+                       ulErrorFound |= 1UL << 12UL;\r
+               }\r
+\r
+               if( xAreTaskNotificationTasksStillRunning() != pdTRUE )\r
+               {\r
+                       ulErrorFound |= 1UL << 13UL;\r
+               }\r
+\r
+               if( xAreInterruptSemaphoreTasksStillRunning() != pdTRUE )\r
+               {\r
+                       ulErrorFound |= 1UL << 14UL;\r
+               }\r
+\r
+               /* Check that the register test 1 task is still running. */\r
+               if( ulLastRegTest1Value == ulRegTest1LoopCounter )\r
+               {\r
+                       ulErrorFound |= 1UL << 15UL;\r
+               }\r
+               ulLastRegTest1Value = ulRegTest1LoopCounter;\r
+\r
+               /* Check that the register test 2 task is still running. */\r
+               if( ulLastRegTest2Value == ulRegTest2LoopCounter )\r
+               {\r
+                       ulErrorFound |= 1UL << 16UL;\r
+               }\r
+               ulLastRegTest2Value = ulRegTest2LoopCounter;\r
+\r
+               /* Toggle the check LED to give an indication of the system status.  If\r
+               the LED toggles every mainNO_ERROR_CHECK_TASK_PERIOD milliseconds then\r
+               everything is ok.  A faster toggle indicates an error. */\r
+               LED2 = !LED2;\r
+\r
+               if( ulErrorFound != pdFALSE )\r
+               {\r
+                       /* An error has been detected in one of the tasks - flash the LED\r
+                       at a higher frequency to give visible feedback that something has\r
+                       gone wrong (it might just be that the loop back connector required\r
+                       by the comtest tasks has not been fitted). */\r
+                       xDelayPeriod = mainERROR_CHECK_TASK_PERIOD;\r
+                       pcStatusMessage = "Error found in at least one task.";\r
+               }\r
+       }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvRegTestTaskEntry1( void *pvParameters )\r
+{\r
+       /* Although the regtest task is written in assembler, its entry point is\r
+       written in C for convenience of checking the task parameter is being passed\r
+       in correctly. */\r
+       if( pvParameters == mainREG_TEST_TASK_1_PARAMETER )\r
+       {\r
+               /* The reg test task also tests the floating point registers.  Tasks\r
+               that use the floating point unit must call vPortTaskUsesFPU() before\r
+               any floating point instructions are executed. */\r
+               vPortTaskUsesFPU();\r
+\r
+               /* Start the part of the test that is written in assembler. */\r
+               vRegTest1Implementation();\r
+       }\r
+\r
+       /* The following line will only execute if the task parameter is found to\r
+       be incorrect.  The check timer will detect that the regtest loop counter is\r
+       not being incremented and flag an error. */\r
+       vTaskDelete( NULL );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvRegTestTaskEntry2( void *pvParameters )\r
+{\r
+       /* Although the regtest task is written in assembler, its entry point is\r
+       written in C for convenience of checking the task parameter is being passed\r
+       in correctly. */\r
+       if( pvParameters == mainREG_TEST_TASK_2_PARAMETER )\r
+       {\r
+               /* The reg test task also tests the floating point registers.  Tasks\r
+               that use the floating point unit must call vPortTaskUsesFPU() before\r
+               any floating point instructions are executed. */\r
+               vPortTaskUsesFPU();\r
+\r
+               /* Start the part of the test that is written in assembler. */\r
+               vRegTest2Implementation();\r
+       }\r
+\r
+       /* The following line will only execute if the task parameter is found to\r
+       be incorrect.  The check timer will detect that the regtest loop counter is\r
+       not being incremented and flag an error. */\r
+       vTaskDelete( NULL );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvPseudoRandomiser( void *pvParameters )\r
+{\r
+const uint32_t ulMultiplier = 0x015a4e35UL, ulIncrement = 1UL, ulMinDelay = ( 35 / portTICK_PERIOD_MS );\r
+volatile uint32_t ulNextRand = ( uint32_t ) &pvParameters, ulValue;\r
+\r
+       /* This task does nothing other than ensure there is a little bit of\r
+       disruption in the scheduling pattern of the other tasks.  Normally this is\r
+       done by generating interrupts at pseudo random times. */\r
+       for( ;; )\r
+       {\r
+               ulNextRand = ( ulMultiplier * ulNextRand ) + ulIncrement;\r
+               ulValue = ( ulNextRand >> 16UL ) & 0xffUL;\r
+\r
+               if( ulValue < ulMinDelay )\r
+               {\r
+                       ulValue = ulMinDelay;\r
+               }\r
+\r
+               vTaskDelay( ulValue );\r
+\r
+               while( ulValue > 0 )\r
+               {\r
+                       __asm volatile( "NOP" );\r
+                       __asm volatile( "NOP" );\r
+                       __asm volatile( "NOP" );\r
+                       __asm volatile( "NOP" );\r
+\r
+                       ulValue--;\r
+               }\r
+       }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vFullDemoTickHook( void )\r
+{\r
+       /* The full demo includes a software timer demo/test that requires\r
+       prodding periodically from the tick interrupt. */\r
+       vTimerPeriodicISRTests();\r
+\r
+       /* Call the periodic queue overwrite from ISR demo. */\r
+       vQueueOverwritePeriodicISRDemo();\r
+\r
+       /* Call the periodic event group from ISR demo. */\r
+       vPeriodicEventGroupsProcessing();\r
+\r
+       /* Use task notifications from an interrupt. */\r
+       xNotifyTaskFromISR();\r
+\r
+       /* Use mutexes from interrupts. */\r
+       vInterruptSemaphorePeriodicTest();\r
+}\r
+\r
+\r
+\r
+\r
diff --git a/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR_ARM/src/Full_Demo/reg_test.S b/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR_ARM/src/Full_Demo/reg_test.S
new file mode 100644 (file)
index 0000000..8de8a6e
--- /dev/null
@@ -0,0 +1,464 @@
+/*\r
+    FreeRTOS V8.2.2 - Copyright (C) 2014 Real Time Engineers Ltd.\r
+\r
+    FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME.  PLEASE VISIT\r
+    http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+\r
+    ***************************************************************************\r
+     *                                                                       *\r
+     *    FreeRTOS tutorial books are available in pdf and paperback.        *\r
+     *    Complete, revised, and edited pdf reference manuals are also       *\r
+     *    available.                                                         *\r
+     *                                                                       *\r
+     *    Purchasing FreeRTOS documentation will not only help you, by       *\r
+     *    ensuring you get running as quickly as possible and with an        *\r
+     *    in-depth knowledge of how to use FreeRTOS, it will also help       *\r
+     *    the FreeRTOS project to continue with its mission of providing     *\r
+     *    professional grade, cross platform, de facto standard solutions    *\r
+     *    for microcontrollers - completely free of charge!                  *\r
+     *                                                                       *\r
+     *    >>> See http://www.FreeRTOS.org/Documentation for details. <<<     *\r
+     *                                                                       *\r
+     *    Thank you for using FreeRTOS, and thank you for your support!      *\r
+     *                                                                       *\r
+    ***************************************************************************\r
+\r
+\r
+    This file is part of the FreeRTOS distribution.\r
+\r
+    FreeRTOS is free software; you can redistribute it and/or modify it under\r
+    the terms of the GNU General Public License (version 2) as published by the\r
+    Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+\r
+    >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to\r
+    distribute a combined work that includes FreeRTOS without being obliged to\r
+    provide the source code for proprietary components outside of the FreeRTOS\r
+    kernel.\r
+\r
+    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
+    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
+    FOR A PARTICULAR PURPOSE.  See the GNU General Public License for more\r
+    details. You should have received a copy of the GNU General Public License\r
+    and the FreeRTOS license exception along with FreeRTOS; if not itcan be\r
+    viewed here: http://www.freertos.org/a00114.html and also obtained by\r
+    writing to Real Time Engineers Ltd., contact details for whom are available\r
+    on the FreeRTOS WEB site.\r
+\r
+    1 tab == 4 spaces!\r
+\r
+    ***************************************************************************\r
+     *                                                                       *\r
+     *    Having a problem?  Start by reading the FAQ "My application does   *\r
+     *    not run, what could be wrong?"                                     *\r
+     *                                                                       *\r
+     *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
+     *                                                                       *\r
+    ***************************************************************************\r
+\r
+\r
+    http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
+    license and Real Time Engineers Ltd. contact details.\r
+\r
+    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
+    including FreeRTOS+Trace - an indispensable productivity tool, and our new\r
+    fully thread aware and reentrant UDP/IP stack.\r
+\r
+    http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
+    Integrity Systems, who sell the code with commercial support,\r
+    indemnification and middleware, under the OpenRTOS brand.\r
+\r
+    http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+    engineered and independently SIL3 certified version for use in safety and\r
+    mission critical applications that require provable dependability.\r
+*/\r
+\r
+       .global vRegTest1Implementation\r
+       .global vRegTest2Implementation\r
+       .extern ulRegTest1LoopCounter\r
+       .extern ulRegTest2LoopCounter\r
+\r
+       .text\r
+       .arm\r
+\r
+       /* This function is explained in the comments at the top of main-full.c. */\r
+.type vRegTest1Implementation, %function\r
+vRegTest1Implementation:\r
+\r
+       /* Fill each general purpose register with a known value. */\r
+       mov             r0,  #0xFF\r
+       mov             r1,  #0x11\r
+       mov             r2,  #0x22\r
+       mov             r3,  #0x33\r
+       mov     r4,  #0x44\r
+       mov     r5,  #0x55\r
+       mov     r6,  #0x66\r
+       mov     r7,  #0x77\r
+       mov     r8,  #0x88\r
+       mov     r9,  #0x99\r
+       mov     r10, #0xAA\r
+       mov     r11, #0xBB\r
+       mov     r12, #0xCC\r
+       mov             r14, #0xEE\r
+\r
+\r
+       /* Fill each FPU register with a known value. */\r
+       vmov    d0, r0, r1\r
+       vmov    d1, r2, r3\r
+       vmov    d2, r4, r5\r
+       vmov    d3, r6, r7\r
+       vmov    d4, r8, r9\r
+       vmov    d5, r10, r11\r
+       vmov    d6, r0, r1\r
+       vmov    d7, r2, r3\r
+       vmov    d8, r4, r5\r
+       vmov    d9, r6, r7\r
+       vmov    d10, r8, r9\r
+       vmov    d11, r10, r11\r
+       vmov    d12, r0, r1\r
+       vmov    d13, r2, r3\r
+       vmov    d14, r4, r5\r
+       vmov    d15, r6, r7\r
+\r
+       /* Loop, checking each itteration that each register still contains the\r
+       expected value. */\r
+reg1_loop:\r
+       /* Yield to increase test coverage */\r
+       svc 0\r
+\r
+       /* Check all the VFP registers still contain the values set above.\r
+       First save registers that are clobbered by the test. */\r
+       push { r0-r1 }\r
+\r
+       vmov    r0, r1, d0\r
+       cmp     r0, #0xFF\r
+       bne     reg1_error_loopf\r
+       cmp     r1, #0x11\r
+       bne     reg1_error_loopf\r
+       vmov    r0, r1, d1\r
+       cmp     r0, #0x22\r
+       bne     reg1_error_loopf\r
+       cmp     r1, #0x33\r
+       bne     reg1_error_loopf\r
+       vmov    r0, r1, d2\r
+       cmp     r0, #0x44\r
+       bne     reg1_error_loopf\r
+       cmp     r1, #0x55\r
+       bne     reg1_error_loopf\r
+       vmov    r0, r1, d3\r
+       cmp     r0, #0x66\r
+       bne     reg1_error_loopf\r
+       cmp     r1, #0x77\r
+       bne     reg1_error_loopf\r
+       vmov    r0, r1, d4\r
+       cmp     r0, #0x88\r
+       bne     reg1_error_loopf\r
+       cmp     r1, #0x99\r
+       bne     reg1_error_loopf\r
+       vmov    r0, r1, d5\r
+       cmp     r0, #0xAA\r
+       bne     reg1_error_loopf\r
+       cmp     r1, #0xBB\r
+       bne     reg1_error_loopf\r
+       vmov    r0, r1, d6\r
+       cmp     r0, #0xFF\r
+       bne     reg1_error_loopf\r
+       cmp     r1, #0x11\r
+       bne     reg1_error_loopf\r
+       vmov    r0, r1, d7\r
+       cmp     r0, #0x22\r
+       bne     reg1_error_loopf\r
+       cmp     r1, #0x33\r
+       bne     reg1_error_loopf\r
+       vmov    r0, r1, d8\r
+       cmp     r0, #0x44\r
+       bne     reg1_error_loopf\r
+       cmp     r1, #0x55\r
+       bne     reg1_error_loopf\r
+       vmov    r0, r1, d9\r
+       cmp     r0, #0x66\r
+       bne     reg1_error_loopf\r
+       cmp     r1, #0x77\r
+       bne     reg1_error_loopf\r
+       vmov    r0, r1, d10\r
+       cmp     r0, #0x88\r
+       bne     reg1_error_loopf\r
+       cmp     r1, #0x99\r
+       bne     reg1_error_loopf\r
+       vmov    r0, r1, d11\r
+       cmp     r0, #0xAA\r
+       bne     reg1_error_loopf\r
+       cmp     r1, #0xBB\r
+       bne     reg1_error_loopf\r
+       vmov    r0, r1, d12\r
+       cmp     r0, #0xFF\r
+       bne     reg1_error_loopf\r
+       cmp     r1, #0x11\r
+       bne     reg1_error_loopf\r
+       vmov    r0, r1, d13\r
+       cmp     r0, #0x22\r
+       bne     reg1_error_loopf\r
+       cmp     r1, #0x33\r
+       bne     reg1_error_loopf\r
+       vmov    r0, r1, d14\r
+       cmp     r0, #0x44\r
+       bne     reg1_error_loopf\r
+       cmp     r1, #0x55\r
+       bne     reg1_error_loopf\r
+       vmov    r0, r1, d15\r
+       cmp     r0, #0x66\r
+       bne     reg1_error_loopf\r
+       cmp     r1, #0x77\r
+       bne     reg1_error_loopf\r
+\r
+\r
+       /* Restore the registers that were clobbered by the test. */\r
+       pop     {r0-r1}\r
+\r
+       /* VFP register test passed.  Jump to the core register test. */\r
+       b               reg1_loopf_pass\r
+\r
+reg1_error_loopf:\r
+       /* If this line is hit then a VFP register value was found to be\r
+       incorrect. */\r
+       b reg1_error_loopf\r
+\r
+reg1_loopf_pass:\r
+\r
+       /* Test each general purpose register to check that it still contains the\r
+       expected known value, jumping to reg1_error_loop if any register contains\r
+       an unexpected value. */\r
+       cmp             r0, #0xFF\r
+       bne             reg1_error_loop\r
+       cmp             r1, #0x11\r
+       bne             reg1_error_loop\r
+       cmp             r2, #0x22\r
+       bne             reg1_error_loop\r
+       cmp             r3, #0x33\r
+       bne             reg1_error_loop\r
+       cmp             r4, #0x44\r
+       bne             reg1_error_loop\r
+       cmp             r5, #0x55\r
+       bne             reg1_error_loop\r
+       cmp             r6, #0x66\r
+       bne             reg1_error_loop\r
+       cmp             r7, #0x77\r
+       bne             reg1_error_loop\r
+       cmp             r8, #0x88\r
+       bne             reg1_error_loop\r
+       cmp             r9, #0x99\r
+       bne             reg1_error_loop\r
+       cmp             r10, #0xAA\r
+       bne             reg1_error_loop\r
+       cmp             r11, #0xBB\r
+       bne             reg1_error_loop\r
+       cmp             r12, #0xCC\r
+       bne             reg1_error_loop\r
+       cmp             r14, #0xEE\r
+       bne             reg1_error_loop\r
+\r
+       /* Everything passed, increment the loop counter. */\r
+       push { r0-r1 }\r
+       ldr     r0, =ulRegTest1LoopCounter\r
+       ldr r1, [r0]\r
+       adds r1, r1, #1\r
+       str r1, [r0]\r
+       pop { r0-r1 }\r
+\r
+       /* Start again. */\r
+       b reg1_loop\r
+\r
+reg1_error_loop:\r
+       /* If this line is hit then there was an error in a core register value.\r
+       The loop ensures the loop counter stops incrementing. */\r
+       b reg1_error_loop\r
+       nop\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+.type vRegTest2Implementation, %function\r
+vRegTest2Implementation:\r
+\r
+       /* Put a known value in each register. */\r
+       mov             r0,  #0xFF000000\r
+       mov             r1,  #0x11000000\r
+       mov             r2,  #0x22000000\r
+       mov             r3,  #0x33000000\r
+       mov     r4,  #0x44000000\r
+       mov     r5,  #0x55000000\r
+       mov     r6,  #0x66000000\r
+       mov     r7,  #0x77000000\r
+       mov     r8,  #0x88000000\r
+       mov     r9,  #0x99000000\r
+       mov     r10, #0xAA000000\r
+       mov     r11, #0xBB000000\r
+       mov     r12, #0xCC000000\r
+       mov     r14, #0xEE000000\r
+\r
+       /* Likewise the floating point registers */\r
+       vmov    d0, r0, r1\r
+       vmov    d1, r2, r3\r
+       vmov    d2, r4, r5\r
+       vmov    d3, r6, r7\r
+       vmov    d4, r8, r9\r
+       vmov    d5, r10, r11\r
+       vmov    d6, r0, r1\r
+       vmov    d7, r2, r3\r
+       vmov    d8, r4, r5\r
+       vmov    d9, r6, r7\r
+       vmov    d10, r8, r9\r
+       vmov    d11, r10, r11\r
+       vmov    d12, r0, r1\r
+       vmov    d13, r2, r3\r
+       vmov    d14, r4, r5\r
+       vmov    d15, r6, r7\r
+\r
+       /* Loop, checking each itteration that each register still contains the\r
+       expected value. */\r
+reg2_loop:\r
+       /* Check all the VFP registers still contain the values set above.\r
+       First save registers that are clobbered by the test. */\r
+       push    { r0-r1 }\r
+\r
+       vmov    r0, r1, d0\r
+       cmp     r0, #0xFF000000\r
+       bne     reg2_error_loopf\r
+       cmp     r1, #0x11000000\r
+       bne     reg2_error_loopf\r
+       vmov    r0, r1, d1\r
+       cmp     r0, #0x22000000\r
+       bne     reg2_error_loopf\r
+       cmp     r1, #0x33000000\r
+       bne     reg2_error_loopf\r
+       vmov    r0, r1, d2\r
+       cmp     r0, #0x44000000\r
+       bne     reg2_error_loopf\r
+       cmp     r1, #0x55000000\r
+       bne     reg2_error_loopf\r
+       vmov    r0, r1, d3\r
+       cmp     r0, #0x66000000\r
+       bne     reg2_error_loopf\r
+       cmp     r1, #0x77000000\r
+       bne     reg2_error_loopf\r
+       vmov    r0, r1, d4\r
+       cmp     r0, #0x88000000\r
+       bne     reg2_error_loopf\r
+       cmp     r1, #0x99000000\r
+       bne     reg2_error_loopf\r
+       vmov    r0, r1, d5\r
+       cmp     r0, #0xAA000000\r
+       bne     reg2_error_loopf\r
+       cmp     r1, #0xBB000000\r
+       bne     reg2_error_loopf\r
+       vmov    r0, r1, d6\r
+       cmp     r0, #0xFF000000\r
+       bne     reg2_error_loopf\r
+       cmp     r1, #0x11000000\r
+       bne     reg2_error_loopf\r
+       vmov    r0, r1, d7\r
+       cmp     r0, #0x22000000\r
+       bne     reg2_error_loopf\r
+       cmp     r1, #0x33000000\r
+       bne     reg2_error_loopf\r
+       vmov    r0, r1, d8\r
+       cmp     r0, #0x44000000\r
+       bne     reg2_error_loopf\r
+       cmp     r1, #0x55000000\r
+       bne     reg2_error_loopf\r
+       vmov    r0, r1, d9\r
+       cmp     r0, #0x66000000\r
+       bne     reg2_error_loopf\r
+       cmp     r1, #0x77000000\r
+       bne     reg2_error_loopf\r
+       vmov    r0, r1, d10\r
+       cmp     r0, #0x88000000\r
+       bne     reg2_error_loopf\r
+       cmp     r1, #0x99000000\r
+       bne     reg2_error_loopf\r
+       vmov    r0, r1, d11\r
+       cmp     r0, #0xAA000000\r
+       bne     reg2_error_loopf\r
+       cmp     r1, #0xBB000000\r
+       bne     reg2_error_loopf\r
+       vmov    r0, r1, d12\r
+       cmp     r0, #0xFF000000\r
+       bne     reg2_error_loopf\r
+       cmp     r1, #0x11000000\r
+       bne     reg2_error_loopf\r
+       vmov    r0, r1, d13\r
+       cmp     r0, #0x22000000\r
+       bne     reg2_error_loopf\r
+       cmp     r1, #0x33000000\r
+       bne     reg2_error_loopf\r
+       vmov    r0, r1, d14\r
+       cmp     r0, #0x44000000\r
+       bne     reg2_error_loopf\r
+       cmp     r1, #0x55000000\r
+       bne     reg2_error_loopf\r
+       vmov    r0, r1, d15\r
+       cmp     r0, #0x66000000\r
+       bne     reg2_error_loopf\r
+       cmp     r1, #0x77000000\r
+       bne     reg2_error_loopf\r
+\r
+       /* Restore the registers that were clobbered by the test. */\r
+       pop     {r0-r1}\r
+\r
+       /* VFP register test passed.  Jump to the core register test. */\r
+       b               reg2_loopf_pass\r
+\r
+reg2_error_loopf:\r
+       /* If this line is hit then a VFP register value was found to be\r
+       incorrect. */\r
+       b               reg2_error_loopf\r
+\r
+reg2_loopf_pass:\r
+\r
+       cmp             r0, #0xFF000000\r
+       bne             reg2_error_loop\r
+       cmp             r1, #0x11000000\r
+       bne             reg2_error_loop\r
+       cmp             r2, #0x22000000\r
+       bne             reg2_error_loop\r
+       cmp             r3, #0x33000000\r
+       bne             reg2_error_loop\r
+       cmp             r4, #0x44000000\r
+       bne             reg2_error_loop\r
+       cmp             r5, #0x55000000\r
+       bne             reg2_error_loop\r
+       cmp             r6, #0x66000000\r
+       bne             reg2_error_loop\r
+       cmp             r7, #0x77000000\r
+       bne             reg2_error_loop\r
+       cmp             r8, #0x88000000\r
+       bne             reg2_error_loop\r
+       cmp             r9, #0x99000000\r
+       bne             reg2_error_loop\r
+       cmp             r10, #0xAA000000\r
+       bne             reg2_error_loop\r
+       cmp             r11, #0xBB000000\r
+       bne             reg2_error_loop\r
+       cmp             r12, #0xCC000000\r
+       bne             reg2_error_loop\r
+       cmp     r14, #0xEE000000\r
+       bne             reg2_error_loop\r
+\r
+       /* Everything passed, increment the loop counter. */\r
+       push    { r0-r1 }\r
+       ldr             r0, =ulRegTest2LoopCounter\r
+       ldr     r1, [r0]\r
+       adds    r1, r1, #1\r
+       str     r1, [r0]\r
+       pop     { r0-r1 }\r
+\r
+       /* Start again. */\r
+       b               reg2_loop\r
+\r
+reg2_error_loop:\r
+       /* If this line is hit then there was an error in a core register value.\r
+       The loop ensures the loop counter stops incrementing. */\r
+       b               reg2_error_loop\r
+       nop\r
+\r
+\r
+       .end\r
+\r
index ea23b6d5b469ad3f635b535595a7356b589bd248..ee79402b32a87d85d6ba2bbea16c1ab67ed03434 100644 (file)
@@ -228,7 +228,7 @@ volatile size_t xFreeHeapSpace;
        management options.  If there is a lot of heap memory free then the\r
        configTOTAL_HEAP_SIZE value in FreeRTOSConfig.h can be reduced to free up\r
        RAM. */\r
-//     xFreeHeapSpace = xPortGetFreeHeapSize();\r
+       xFreeHeapSpace = xPortGetFreeHeapSize();\r
 \r
        /* Remove compiler warning about xFreeHeapSpace being set but never used. */\r
        ( void ) xFreeHeapSpace;\r
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CRx_No_GIC/ISR_Support.h b/FreeRTOS/Source/portable/GCC/ARM_CRx_No_GIC/ISR_Support.h
new file mode 100644 (file)
index 0000000..9cdd969
--- /dev/null
@@ -0,0 +1,159 @@
+/*\r
+    FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.\r
+    All rights reserved\r
+\r
+\r
+    ***************************************************************************\r
+     *                                                                       *\r
+     *    FreeRTOS tutorial books are available in pdf and paperback.        *\r
+     *    Complete, revised, and edited pdf reference manuals are also       *\r
+     *    available.                                                         *\r
+     *                                                                       *\r
+     *    Purchasing FreeRTOS documentation will not only help you, by       *\r
+     *    ensuring you get running as quickly as possible and with an        *\r
+     *    in-depth knowledge of how to use FreeRTOS, it will also help       *\r
+     *    the FreeRTOS project to continue with its mission of providing     *\r
+     *    professional grade, cross platform, de facto standard solutions    *\r
+     *    for microcontrollers - completely free of charge!                  *\r
+     *                                                                       *\r
+     *    >>> See http://www.FreeRTOS.org/Documentation for details. <<<     *\r
+     *                                                                       *\r
+     *    Thank you for using FreeRTOS, and thank you for your support!      *\r
+     *                                                                       *\r
+    ***************************************************************************\r
+\r
+\r
+    This file is part of the FreeRTOS distribution.\r
+\r
+    FreeRTOS is free software; you can redistribute it and/or modify it under\r
+    the terms of the GNU General Public License (version 2) as published by the\r
+    Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+    >>>NOTE<<< The modification to the GPL is included to allow you to\r
+    distribute a combined work that includes FreeRTOS without being obliged to\r
+    provide the source code for proprietary components outside of the FreeRTOS\r
+    kernel.  FreeRTOS is distributed in the hope that it will be useful, but\r
+    WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for\r
+    more details. You should have received a copy of the GNU General Public\r
+    License and the FreeRTOS license exception along with FreeRTOS; if not it\r
+    can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
+    by writing to Richard Barry, contact details for whom are available on the\r
+    FreeRTOS WEB site.\r
+\r
+    1 tab == 4 spaces!\r
+\r
+    http://www.FreeRTOS.org - Documentation, latest information, license and\r
+    contact details.\r
+\r
+    http://www.SafeRTOS.com - A version that is certified for use in safety\r
+    critical systems.\r
+\r
+    http://www.OpenRTOS.com - Commercial support, development, porting,\r
+    licensing and training services.\r
+*/\r
+\r
+#define portNESTING_INTERRUPT_ENTRY()                                                                                          \\r
+       __asm volatile (                                                                                                                                \\r
+                                               ".extern ulPortYieldRequired                                            \t\n"   \\r
+                                               ".extern ulPortInterruptNesting                                         \t\n"   \\r
+                                               ".extern FreeRTOS_SVC_Handler                                           \t\n"   \\r
+                                               /* Return to the interrupted instruction. */                            \\r
+                                               "SUB    LR, LR, #4                                                                      \t\n"   \\r
+                                                                                                                                                                       \\r
+                                               /* Push the return address and SPSR. */                                         \\r
+                                               "PUSH   {LR}                                                                            \t\n"   \\r
+                                               "MRS    LR, SPSR                                                                        \t\n"   \\r
+                                               "PUSH   {LR}                                                                            \t\n"   \\r
+                                                                                                                                                                       \\r
+                                               /* Change to supervisor mode to allow reentry. */                       \\r
+                                               "CPS    #0x13                                                                           \t\n"   \\r
+                                                                                                                                                                       \\r
+                                               /* Push used registers. */                                                                      \\r
+                                               "PUSH   {r0-r4, r12}                                                            \t\n"   \\r
+                                                                                                                                                                       \\r
+                                               /* Increment nesting count.  r3 holds the address */            \\r
+                                               /* of ulPortInterruptNesting future use. */                                     \\r
+                                               "LDR    r2, =ulPortInterruptNestingConst                        \t\n"   \\r
+                                               "LDR    r3, [r2]                                                                        \t\n"   \\r
+                                                                                                                                                                       \\r
+                                               "LDR    r1, [r3]                                                                        \t\n"   \\r
+                                               "ADD    r4, r1, #1                                                                      \t\n"   \\r
+                                               "STR    r4, [r3]                                                                        \t\n"   \\r
+                                                                                                                                                                       \\r
+                                               /* Ensure bit 2 of the stack pointer is clear. */                       \\r
+                                               /* r2 holds the bit 2 value for future use. */                          \\r
+                                               "MOV    r2, sp                                                                          \t\n"   \\r
+                                               "AND    r2, r2, #4                                                                      \t\n"   \\r
+                                               "SUB    sp, sp, r2                                                                      \t\n"   \\r
+                                                                                                                                                                       \\r
+                                               /* Call the interrupt handler. */                                                       \\r
+                                               "PUSH   {r0-r3, LR}                                                                             "       \\r
+                                       );\r
+\r
+#warning Why is ulPortYieldRequired accessed differently to the other variables?\r
+#warning R0 seems to being pushed even though it is not used.\r
+#warning Writing to the EOI register uses R4 on consecutive lines.\r
+\r
+\r
+#define portNESTING_INTERRUPT_EXIT()                                                                                           \\r
+       __asm volatile (                                                                                                                                \\r
+                                               "POP    {r0-r3, LR}                                                                     \t\n"   \\r
+                                               "ADD    sp, sp, r2                                                                      \t\n"   \\r
+                                               "                                                                                                       \t\n"   \\r
+                                               "CPSID  i                                                                                       \t\n"   \\r
+                                               "DSB                                                                                            \t\n"   \\r
+                                               "ISB                                                                                            \t\n"   \\r
+                                               "                                                                                                       \t\n"   \\r
+                                               /* Write to the EOI register. */                                                        \\r
+                                               "LDR    r4, ulICCEOIRConst                                                      \t\n"   \\r
+                                               "LDR    r4, [r4]                                                                        \t\n"   \\r
+                                               "STR    r0, [r4]                                                                        \t\n"   \\r
+                                                                                                                                                                       \\r
+                                               /* Restore the old nesting count. */                                            \\r
+                                               "STR    r1, [r3]                                                                        \t\n"   \\r
+                                                                                                                                                                       \\r
+                                               /* A context switch is never performed if the */                        \\r
+                                               /* nesting count is not 0. */                                                           \\r
+                                               "CMP    r1, #0                                                                          \t\n"   \\r
+                                               "BNE    1f                                                                                      \t\n"   \\r
+                                                                                                                                                                       \\r
+                                               /* Did the interrupt request a context switch? */                       \\r
+                                               /* r1 holds the address of ulPortYieldRequired */                       \\r
+                                               /* and r0 the value of ulPortYieldRequired for */                       \\r
+                                               /* future use. */                                                                                       \\r
+                                               "LDR    r1, =ulPortYieldRequired                                        \t\n"   \\r
+                                               "LDR    r0, [r1]                                                                        \t\n"   \\r
+                                               "CMP    r0, #0                                                                          \t\n"   \\r
+                                               "BNE    2f                                                                                      \t\n"   \\r
+                                                                                                                                                                       \\r
+                                       "1:                                                                                                             \t\n"   \\r
+                                               /* No context switch.  Restore used registers, */                       \\r
+                                           /* LR_irq and SPSR before returning. 0x12 is IRQ */                 \\r
+                                               /* mode. */                                                                                                     \\r
+                                               "POP    {r0-r4, r12}                                                            \t\n"   \\r
+                                               "CPS    #0x12                                                                           \t\n"   \\r
+                                               "POP    {LR}                                                                            \t\n"   \\r
+                                               "MSR    SPSR_cxsf, LR                                                           \t\n"   \\r
+                                               "POP    {LR}                                                                            \t\n"   \\r
+                                               "MOVS   PC, LR                                                                          \t\n"   \\r
+                                                                                                                                                                       \\r
+                                       "2:                                                                                                             \t\n"   \\r
+                                               /* A context switch is to be performed.  */                                     \\r
+                                               /* Clear the context switch pending     flag. */                                \\r
+                                               "MOV    r0, #0                                                                          \t\n"   \\r
+                                               "STR    r0, [r1]                                                                        \t\n"   \\r
+                                                                                                                                                                       \\r
+                                               /* Restore used registers, LR-irq and  */                                       \\r
+                                               /* SPSR before saving the context to the */                                     \\r
+                                               /* task stack. 0x12 is IRQ mode. */                                                     \\r
+                                               "POP    {r0-r4, r12}                                                            \t\n"   \\r
+                                               "CPS    #0x12                                                                           \t\n"   \\r
+                                               "POP    {LR}                                                                            \t\n"   \\r
+                                               "MSR    SPSR_cxsf, LR                                                           \t\n"   \\r
+                                               "POP    {LR}                                                                            \t\n"   \\r
+                                               "b      FreeRTOS_SVC_Handler                                                                                    \t\n"   \\r
+                                               "ISB                                                                                            \t\n"   \\r
+                                               "ulICCEOIRConst:        .word ulICCEOIR                                 \t\n"   \\r
+                                               " ulPortInterruptNestingConst: .word ulPortInterruptNesting " \\r
+                                       );\r
+\r
index 1fd906bb5f0b915ab5910462b55d312c1c8de6be..70a91900bf126e0edde8593b1afb6e7f472c487b 100644 (file)
@@ -329,7 +329,9 @@ void vPortExitCritical( void )
 \r
 void FreeRTOS_Tick_Handler( void )\r
 {\r
-       portDISABLE_INTERRUPTS();\r
+uint32_t ulInterruptStatus;\r
+\r
+       ulInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();\r
 \r
        /* Increment the RTOS tick. */\r
        if( xTaskIncrementTick() != pdFALSE )\r
@@ -337,7 +339,8 @@ void FreeRTOS_Tick_Handler( void )
                ulPortYieldRequired = pdTRUE;\r
        }\r
 \r
-       portENABLE_INTERRUPTS();\r
+       portCLEAR_INTERRUPT_MASK_FROM_ISR( ulInterruptStatus );\r
+\r
        configCLEAR_TICK_INTERRUPT();\r
 }\r
 /*-----------------------------------------------------------*/\r
index b21c91dd71292ca6f8d1e919513407eb411220ce..9f91560a2a9a8c033e311ce676fa7feb934a2262 100644 (file)
@@ -68,6 +68,7 @@
        .extern ulPortInterruptNesting\r
        .extern ulPortTaskHasFPUContext\r
        .extern ulICCEOIR\r
+       .extern ulPortYieldRequired\r
 \r
        .global FreeRTOS_IRQ_Handler\r
        .global FreeRTOS_SVC_Handler\r
 \r
 \r
 /******************************************************************************\r
- * SVC handler is used to start the scheduler.\r
+ * SVC handler is used to yield.\r
  *****************************************************************************/\r
 .align 4\r
 .type FreeRTOS_SVC_Handler, %function\r
@@ -189,7 +190,6 @@ FreeRTOS_IRQ_Handler:
        PUSH    {lr}\r
 \r
        /* Change to supervisor mode to allow reentry. */\r
-       CPS             #SVC_MODE\r
 \r
        /* Push used registers. */\r
        PUSH    {r0-r4, r12}\r
index 73ec1e94f6baaad43473d1783ddb979679435a28..274dd81249a19d462de927c3f19c02308a4f6af3 100644 (file)
@@ -153,7 +153,7 @@ globally enable and disable interrupts. */
                                                                                                         "DSB           \n"             \\r
                                                                                                         "ISB             " );\r
 \r
-__attribute__( ( always_inline ) ) static __inline uint32_t portSET_INTERRUPT_MASK_FROM_ISR( void )\r
+__attribute__( ( always_inline ) ) static __inline uint32_t portINLINE_SET_INTERRUPT_MASK_FROM_ISR( void )\r
 {\r
 volatile uint32_t ulCPSR;\r
 \r
@@ -163,7 +163,8 @@ volatile uint32_t ulCPSR;
        return ulCPSR;\r
 }\r
 \r
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)   if( x != 0 ) portENABLE_INTERRUPTS()\r
+#define portSET_INTERRUPT_MASK_FROM_ISR() portINLINE_SET_INTERRUPT_MASK_FROM_ISR()\r
+#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)   if( x == 0 ) portENABLE_INTERRUPTS()\r
 \r
 /*-----------------------------------------------------------*/\r
 \r
@@ -198,7 +199,7 @@ void vPortTaskUsesFPU( void );
 \r
        /*-----------------------------------------------------------*/\r
 \r
-       #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - __builtin_clz( uxReadyPriorities ) )\r
+       #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) __builtin_clz( uxReadyPriorities ) )\r
 \r
 #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */\r
 \r
index 1a3d58ca10862c60a5155472fa89b4d4b7c099f7..cc15f528fde01c7485877a0bd6146414919605b1 100644 (file)
@@ -444,7 +444,6 @@ QueueHandle_t xReturn = NULL;
                        traceCREATE_MUTEX_FAILED();\r
                }\r
 \r
-               configASSERT( pxNewQueue );\r
                return pxNewQueue;\r
        }\r
 \r
@@ -1219,8 +1218,8 @@ Queue_t * const pxQueue = ( Queue_t * ) xQueue;
        if the item size is not 0. */\r
        configASSERT( pxQueue->uxItemSize == 0 );\r
 \r
-       /* Normally a mutex would not be given from an interrupt, especially if \r
-       there is a mutex holder, as priority inheritance makes no sense for an \r
+       /* Normally a mutex would not be given from an interrupt, especially if\r
+       there is a mutex holder, as priority inheritance makes no sense for an\r
        interrupts, only tasks. */\r
        configASSERT( !( ( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX ) && ( pxQueue->pxMutexHolder != NULL ) ) );\r
 \r