ARM: remove mrc_opcode(), use MRC() or MCR()

Get rid of mrc_opcode() in favor of ARMV4_5_MRC() or, where
arm*20t should have used it, ARMV4_5_MCR() instead.

Basically, *writing* coprocessor registers shouldn't have
used the *read* opcode ... and both should stick to standard
opcode constructors, not rearranging parameter sequence any
more than already needed.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>

diff --git a/src/target/arm720t.c b/src/target/arm720t.c
index 48cfdf01ce1742776e07ea2ee655af9659919f47..207db78767c9fc777094f924be11c00b2aef34e5 100644 (file)
--- a/src/target/arm720t.c
+++ b/src/target/arm720t.c
@@ -481,7 +481,10 @@ COMMAND_HANDLER(arm720t_handle_cp15_command)
        return ERROR_OK;
 }
 
-static int arm720t_mrc(struct target *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value)
+static int arm720t_mrc(struct target *target, int cpnum,
+               uint32_t op1, uint32_t op2,
+               uint32_t CRn, uint32_t CRm,
+               uint32_t *value)
 {
        if (cpnum!=15)
        {
@@ -489,11 +492,17 @@ static int arm720t_mrc(struct target *target, int cpnum, uint32_t op1, uint32_t
                return ERROR_FAIL;
        }
 
-       return arm720t_read_cp15(target, mrc_opcode(cpnum, op1, op2, CRn, CRm), value);
+       /* read "to" r0 */
+       return arm720t_read_cp15(target,
+                       ARMV4_5_MRC(cpnum, op1, 0, CRn, CRm, op2),
+                       value);
 
 }
 
-static int arm720t_mcr(struct target *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value)
+static int arm720t_mcr(struct target *target, int cpnum,
+               uint32_t op1, uint32_t op2,
+               uint32_t CRn, uint32_t CRm,
+               uint32_t value)
 {
        if (cpnum!=15)
        {
@@ -501,7 +510,10 @@ static int arm720t_mcr(struct target *target, int cpnum, uint32_t op1, uint32_t
                return ERROR_FAIL;
        }
 
-       return arm720t_write_cp15(target, mrc_opcode(cpnum, op1, op2, CRn, CRm), value);
+       /* write "from" r0 */
+       return arm720t_write_cp15(target,
+                       ARMV4_5_MCR(cpnum, op1, 0, CRn, CRm, op2),
+                       value);
 }
 
 static const struct command_registration arm720t_exec_command_handlers[] = {

diff --git a/src/target/arm920t.c b/src/target/arm920t.c
index 305f0de8f47b73e79b14f504b6b34d17a69f4f4b..6a005d6d8ca76d5b7b497be13598f3c6ffec2f0d 100644 (file)
--- a/src/target/arm920t.c
+++ b/src/target/arm920t.c
@@ -1352,7 +1352,10 @@ COMMAND_HANDLER(arm920t_handle_cache_info_command)
 }
 
 
-static int arm920t_mrc(struct target *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value)
+static int arm920t_mrc(struct target *target, int cpnum,
+               uint32_t op1, uint32_t op2,
+               uint32_t CRn, uint32_t CRm,
+               uint32_t *value)
 {
        if (cpnum!=15)
        {
@@ -1360,10 +1363,16 @@ static int arm920t_mrc(struct target *target, int cpnum, uint32_t op1, uint32_t
                return ERROR_FAIL;
        }
 
-       return arm920t_read_cp15_interpreted(target, mrc_opcode(cpnum, op1, op2, CRn, CRm), 0, value);
+       /* read "to" r0 */
+       return arm920t_read_cp15_interpreted(target,
+                       ARMV4_5_MRC(cpnum, op1, 0, CRn, CRm, op2),
+                       0, value);
 }
 
-static int arm920t_mcr(struct target *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value)
+static int arm920t_mcr(struct target *target, int cpnum,
+               uint32_t op1, uint32_t op2,
+               uint32_t CRn, uint32_t CRm,
+               uint32_t value)
 {
        if (cpnum!=15)
        {
@@ -1371,7 +1380,10 @@ static int arm920t_mcr(struct target *target, int cpnum, uint32_t op1, uint32_t
                return ERROR_FAIL;
        }
 
-       return arm920t_write_cp15_interpreted(target, mrc_opcode(cpnum, op1, op2, CRn, CRm), 0, value);
+       /* write "from" r0 */
+       return arm920t_write_cp15_interpreted(target,
+                       ARMV4_5_MCR(cpnum, op1, 0, CRn, CRm, op2),
+                       0, value);
 }
 
 static const struct command_registration arm920t_exec_command_handlers[] = {

diff --git a/src/target/armv4_5.h b/src/target/armv4_5.h
index a93087e82ebd521de9ba17a1e2ff5c78625feb70..6e289337ab2b0c9bd4004adb195761aeab4b7e61 100644 (file)
--- a/src/target/armv4_5.h
+++ b/src/target/armv4_5.h
@@ -379,16 +379,4 @@ extern struct reg arm_gdb_dummy_fps_reg;
  */
 #define ARMV5_T_BKPT(Im) ((0xbe00 | Im) | ((0xbe00 | Im) << 16))
 
-/* build basic mrc/mcr opcode */
-
-static inline uint32_t mrc_opcode(int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm)
-{
-       uint32_t t = 0;
-       t|=op1<<21;
-       t|=op2<<5;
-       t|=CRn<<16;
-       t|=CRm<<0;
-       return t;
-}
-
 #endif /* ARMV4_5_H */