+++ /dev/null
-#define mainISR_TASK_PRIORITY ( tskIDLE_PRIORITY + 3 )\r
-#define mainISRTASK_LED ( 2 )\r
-#define mainT5PRESCALAR ( 6 )\r
-#define mainT5_SEMAPHORE_RATE ( 31250 )\r
-\r
-static void prvISRBlockTask( void* pvParameters )\r
-{\r
- /* local variables marked as volatile so the compiler does not optimize them away */\r
- volatile uint64_t resAcc;\r
- volatile uint32_t arg1, arg2;\r
-\r
- /* Create the semaphore used to signal this task */\r
- vSemaphoreCreateBinary( xBlockSemaphore );\r
-\r
- /* Set up timer 5 to generate an interrupt every 50 ms */\r
- T5CON = 0;\r
- TMR5 = 0;\r
-\r
- /* Timer 5 is going to interrupt at 20Hz Hz. (40,000,000 / (64 * 20) */\r
- T5CONbits.TCKPS = mainT5PRESCALAR;\r
- PR5 = mainT5_SEMAPHORE_RATE;\r
-\r
- /* Setup timer 5 interrupt priority to be the maximum allowed */\r
- IPC6bits.T5IP = ( configMAX_SYSCALL_INTERRUPT_PRIORITY );\r
-\r
- /* Clear the interrupt as a starting condition. */\r
- IFS0bits.T5IF = 0;\r
-\r
- /* Enable the interrupt. */\r
- IEC0bits.T5IE = 1;\r
-\r
- /* Start the timer. */\r
- T5CONbits.TON = 1;\r
-\r
- arg1 = 10;\r
- arg2 = 2;\r
-\r
- for( ;; )\r
- {\r
- /* block on the binary semaphore given by an ISR */\r
- xSemaphoreTake( xBlockSemaphore, portMAX_DELAY );\r
-\r
- vParTestToggleLED( mainISRTASK_LED );\r
- /* perform some maths operations to exercise the accumulators */\r
- resAcc = resAcc * arg2 + arg1;\r
- }\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void vT5InterruptHandler( void )\r
-{\r
-portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;\r
-\r
- /* This function is the handler for the peripheral timer interrupt.\r
- The interrupt is initially signalled in a separate assembly file\r
- which switches to the system stack and then calls this function.\r
- It gives a semaphore which signals the prvISRBlockTask */\r
- xSemaphoreGiveFromISR( xBlockSemaphore, &xHigherPriorityTaskWoken );\r
-\r
- /* Clear the interrupt */\r
- IFS0CLR = _IFS0_T5IF_MASK;\r
-\r
- portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );\r
-}\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-#define DMA_BUFF_SIZE 400\r
-uint32_t dmaBuff[2][DMA_BUFF_SIZE];\r
-static void dmaTask(void* pvParameters)\r
-{\r
- uint32_t i;\r
- /* this tasks hammers the dma copying data from one buffer to another */\r
- DMACONbits.SUSPEND = 1; //Suspend ALL DMA transfers\r
-\r
- /* currently the data will be placed in the cache and nothing will be copied\r
- * by the dma as it only accesses physical memory, this test is designed to stress the system\r
- * and confirm correct operation in a heavy interrupt environment */\r
- for(i = 0; i < DMA_BUFF_SIZE; i++) {\r
- dmaBuff[0][i] = i;\r
- }\r
-\r
- /* set the transfer event control: what event is to start the DMA transfer */\r
- DCH1ECONbits.CHSIRQ = _TIMER_6_VECTOR;\r
- DCH1ECONbits.SIRQEN = 1;\r
-\r
- /* set up transfer */\r
- DCH1SSA = KVA_TO_PA((void*) &dmaBuff[0][0]);\r
- DCH1DSA = KVA_TO_PA((void*) &dmaBuff[1][0]);\r
- DCH1SSIZ = DMA_BUFF_SIZE;\r
- DCH1DSIZ = DMA_BUFF_SIZE;\r
- DCH1CSIZ = 4;\r
-\r
- /* setup interrupt response */\r
- IPC33bits.DMA1IP = 3;\r
- DCH1INTbits.CHBCIE = 1;\r
- IEC4bits.DMA1IE = 1;\r
- DCH1CONbits.CHPRI = 0b10;\r
-\r
- /* once we configured the DMA channel we can enable it */\r
- DCH1CONbits.CHEN = 1;\r
- DMACONbits.ON = 1;\r
- DMACONbits.SUSPEND = 0;\r
-\r
- /* setup T6 to trigger the transfers */\r
- T6CON = 0x0000;\r
- IEC0CLR = _IEC0_T6IE_MASK;\r
- IFS0CLR = _IFS0_T6IF_MASK;\r
- TMR6 = 0;\r
- PR6 = 1;\r
- T6CONSET = _T6CON_ON_MASK;\r
-\r
- /* once the dma is setup we delete this task */\r
- vTaskDelete(NULL);\r
-}\r
-\r
-void __attribute__((vector(_DMA1_VECTOR), interrupt(ipl3))) DMAInterruptHandler(void)\r
-{\r
- portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;\r
- uint32_t i;\r
-\r
- /* clear the destination buffer */\r
- for(i = 0; i < DMA_BUFF_SIZE; i++) {\r
- dmaBuff[1][i] = 0;\r
- }\r
-\r
- xSemaphoreGiveFromISR( xBlockSemaphore, &xHigherPriorityTaskWoken );\r
-\r
- /* we have just finished copying from buffer0 to buffer 1 so restart the copy operation */\r
- DCH1INTCLR = _DCH1INT_CHBCIF_MASK;\r
- IFS4CLR = _IFS4_DMA1IF_MASK;\r
- DCH1CONSET = _DCH1CON_CHEN_MASK;\r
- portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );\r
-}\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
- * The Blinky ISR Test:\r
- * This demonstrates triggering an ISR from a peripheral timer. A task is created\r
- * which blocks on a semaphore. Separately a peripheral timer is set to cause an\r
- * interrupt every 50ms. The ISR handler (in a separate assembly file) then\r
- * releases the semaphore which causes the task to unblock and toggle an LED. This\r
- * sequence tests operation of the ISR and system stack handling.\r
- *\r
-static void prvISRBlockTask( void *pvParameters );\r
-static void dmaTask(void *pvParameters);\r
-\r
-/* The timer 5 interrupt handler. As this interrupt uses the FreeRTOS assembly\r
-entry point the IPL setting in the following function prototype has no effect. */\r
-void __attribute__( (interrupt(ipl3), vector(_TIMER_5_VECTOR))) vT5InterruptWrapper( void );\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-/* The semaphore used to signal the ISRBlockTask */\r
-static xSemaphoreHandle xBlockSemaphore;\r
-\r
-\r
-// xTaskCreate( prvISRBlockTask, ( signed char * ) "ISR", configMINIMAL_STACK_SIZE, ( void * ) NULL, mainISR_TASK_PRIORITY, NULL );\r
-// xTaskCreate( dmaTask, (signed char *) "DMA", configMINIMAL_STACK_SIZE, (void*) NULL, 2, NULL);\r