arm_adi_v5: reduce some CSW writes

MEM-AP access through banked data registers MEM_AP_REG_BD0..3
does not increment TAR regardless of the current autoincrement mode.
mem_ap_read_u32() and mem_ap_write_u32() can keep the current
autoincrement mode instead of switching autoincrement off.

Change-Id: Ib7ec688d3e04f1da678363cd2819ce90e8910e58
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4163
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c
index a0d0f4ef042f7ed6d3297ee4405b6605762a76ef..ae6c2c629fdb62f71bf8ad60ef8aebd843ee8b49 100644 (file)
--- a/src/target/arm_adi_v5.c
+++ b/src/target/arm_adi_v5.c
@@ -221,7 +221,8 @@ int mem_ap_read_u32(struct adiv5_ap *ap, uint32_t address,
        /* Use banked addressing (REG_BDx) to avoid some link traffic
         * (updating TAR) when reading several consecutive addresses.
         */
-       retval = mem_ap_setup_transfer(ap, CSW_32BIT | CSW_ADDRINC_OFF,
+       retval = mem_ap_setup_transfer(ap,
+                       CSW_32BIT | (ap->csw_value & CSW_ADDRINC_MASK),
                        address & 0xFFFFFFF0);
        if (retval != ERROR_OK)
                return retval;
@@ -272,7 +273,8 @@ int mem_ap_write_u32(struct adiv5_ap *ap, uint32_t address,
        /* Use banked addressing (REG_BDx) to avoid some link traffic
         * (updating TAR) when writing several consecutive addresses.
         */
-       retval = mem_ap_setup_transfer(ap, CSW_32BIT | CSW_ADDRINC_OFF,
+       retval = mem_ap_setup_transfer(ap,
+                       CSW_32BIT | (ap->csw_value & CSW_ADDRINC_MASK),
                        address & 0xFFFFFFF0);
        if (retval != ERROR_OK)
                return retval;