armv7m: use consistent arm.cpsr member

We already set cpsr in armv7m_build_reg_cache, so lets use it for all other
accesses to this field.

Change-Id: I19b3b21ecf1571bbea12e1be664845e6544f6fa1
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1539
Tested-by: jenkins

diff --git a/src/target/arm.h b/src/target/arm.h
index e2d264615570edb014a18e8bc21557d1d65b7660..c7c8dc0f503f04c12ac7f9c56b4e56b7e7efa5f9 100644 (file)
--- a/src/target/arm.h
+++ b/src/target/arm.h
@@ -97,7 +97,7 @@ struct arm {
        /** Handle to the PC; valid in all core modes. */
        struct reg *pc;
 
-       /** Handle to the CPSR; valid in all core modes. */
+       /** Handle to the CPSR/xPSR; valid in all core modes. */
        struct reg *cpsr;
 
        /** Handle to the SPSR; valid only in core modes with an SPSR. */

diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index 1d08c95fc83fcb7f24d0fd4c05ffcf3a4be04a84..fbe635bdd8bc695bfe90b49f5e27cd4389179c49 100644 (file)
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -430,7 +430,7 @@ static int cortex_m3_debug_entry(struct target *target)
                        arm->read_core_reg(target, r, i, ARM_MODE_ANY);
        }
 
-       r = arm->core_cache->reg_list + ARMV7M_xPSR;
+       r = arm->cpsr;
        xPSR = buf_get_u32(r->value, 0, 32);
 
 #ifdef ARMV7_GDB_HACKS
@@ -732,7 +732,7 @@ static int cortex_m3_resume(struct target *target, int current,
                r->valid = true;
 
                /* Make sure we are in Thumb mode */
-               r = armv7m->arm.core_cache->reg_list + ARMV7M_xPSR;
+               r = armv7m->arm.cpsr;
                buf_set_u32(r->value, 24, 1, 1);
                r->dirty = true;
                r->valid = true;

diff --git a/src/target/hla_target.c b/src/target/hla_target.c
index 41fe45e6c8781cd8d93b8d26831b1891d3a6b4f6..078ac647942ec4aad870f8e7bf0df3155d90cefb 100644 (file)
--- a/src/target/hla_target.c
+++ b/src/target/hla_target.c
@@ -427,7 +427,7 @@ static int adapter_debug_entry(struct target *target)
        /* make sure we clear the vector catch bit */
        adapter->layout->api->write_debug_reg(adapter->fd, DCB_DEMCR, TRCENA);
 
-       r = arm->core_cache->reg_list + ARMV7M_xPSR;
+       r = arm->cpsr;
        xPSR = buf_get_u32(r->value, 0, 32);
 
        /* Are we in an exception handler */