]> git.sur5r.net Git - freertos/commitdiff
Add PIC32 code.
authorRichardBarry <RichardBarry@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Mon, 26 Nov 2007 15:45:21 +0000 (15:45 +0000)
committerRichardBarry <RichardBarry@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Mon, 26 Nov 2007 15:45:21 +0000 (15:45 +0000)
git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@119 1d2547de-c912-0410-9cb9-b8ca96c0e9e2

13 files changed:
Demo/PIC32MX_MPLAB/FreeRTOSConfig.h [new file with mode: 0644]
Demo/PIC32MX_MPLAB/ParTest/ParTest.c [new file with mode: 0644]
Demo/PIC32MX_MPLAB/RTOSDemo.mcp [new file with mode: 0644]
Demo/PIC32MX_MPLAB/RTOSDemo.mcs [new file with mode: 0644]
Demo/PIC32MX_MPLAB/RTOSDemo.mcw [new file with mode: 0644]
Demo/PIC32MX_MPLAB/RegisterTestTasks.s [new file with mode: 0644]
Demo/PIC32MX_MPLAB/lcd.c [new file with mode: 0644]
Demo/PIC32MX_MPLAB/lcd.h [new file with mode: 0644]
Demo/PIC32MX_MPLAB/main.c [new file with mode: 0644]
Demo/PIC32MX_MPLAB/serial/serial.c [new file with mode: 0644]
Demo/PIC32MX_MPLAB/serial/serial_isr.S [new file with mode: 0644]
Demo/PIC32MX_MPLAB/timertest.c [new file with mode: 0644]
Demo/PIC32MX_MPLAB/timertest.h [new file with mode: 0644]

diff --git a/Demo/PIC32MX_MPLAB/FreeRTOSConfig.h b/Demo/PIC32MX_MPLAB/FreeRTOSConfig.h
new file mode 100644 (file)
index 0000000..28b59f4
--- /dev/null
@@ -0,0 +1,87 @@
+/*\r
+       FreeRTOS.org V4.2.1 - Copyright (C) 2003-2007 Richard Barry.\r
+\r
+       This file is part of the FreeRTOS.org distribution.\r
+\r
+       FreeRTOS.org is free software; you can redistribute it and/or modify\r
+       it under the terms of the GNU General Public License as published by\r
+       the Free Software Foundation; either version 2 of the License, or\r
+       (at your option) any later version.\r
+\r
+       FreeRTOS.org is distributed in the hope that it will be useful,\r
+       but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+       MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
+       GNU General Public License for more details.\r
+\r
+       You should have received a copy of the GNU General Public License\r
+       along with FreeRTOS.org; if not, write to the Free Software\r
+       Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
+\r
+       A special exception to the GPL can be applied should you wish to distribute\r
+       a combined work that includes FreeRTOS.org, without being obliged to provide\r
+       the source code for any proprietary components.  See the licensing section \r
+       of http://www.FreeRTOS.org for full details of how and when the exception\r
+       can be applied.\r
+\r
+       ***************************************************************************\r
+       See http://www.FreeRTOS.org for documentation, latest information, license \r
+       and contact details.  Please ensure to read the configuration and relevant \r
+       port sections of the online documentation.\r
+\r
+       Also see http://www.SafeRTOS.com a version that has been certified for use\r
+       in safety critical systems, plus commercial licensing, development and\r
+       support options.\r
+       ***************************************************************************\r
+*/\r
+\r
+#ifndef FREERTOS_CONFIG_H\r
+#define FREERTOS_CONFIG_H\r
+\r
+#include <p32xxxx.h>\r
+\r
+/*-----------------------------------------------------------\r
+ * Application specific definitions.\r
+ *\r
+ * These definitions should be adjusted for your particular hardware and\r
+ * application requirements.\r
+ *\r
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE\r
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. \r
+ *----------------------------------------------------------*/\r
+\r
+#define configUSE_PREEMPTION                   1\r
+#define configUSE_IDLE_HOOK                            0\r
+#define configUSE_TICK_HOOK                            0\r
+#define configTICK_RATE_HZ                             ( ( portTickType ) 1000 )\r
+#define configCPU_CLOCK_HZ                             ( ( unsigned portLONG ) 72000000UL )  \r
+#define configPERIPHERAL_CLOCK_HZ              ( ( unsigned portLONG ) 36000000UL )\r
+#define configMAX_PRIORITIES                   ( ( unsigned portBASE_TYPE ) 5 )\r
+#define configMINIMAL_STACK_SIZE               ( 230 )\r
+#define configISR_STACK_SIZE                   ( 130 )\r
+#define configTOTAL_HEAP_SIZE                  ( ( size_t ) 29000 )\r
+#define configMAX_TASK_NAME_LEN                        ( 8 )\r
+#define configUSE_TRACE_FACILITY               0\r
+#define configUSE_16_BIT_TICKS                 0\r
+#define configIDLE_SHOULD_YIELD                        1\r
+#define configUSE_MUTEXES                              1\r
+\r
+/* Co-routine definitions. */\r
+#define configUSE_CO_ROUTINES          0\r
+#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )\r
+\r
+/* Set the following definitions to 1 to include the API function, or zero\r
+to exclude the API function. */\r
+\r
+#define INCLUDE_vTaskPrioritySet               1\r
+#define INCLUDE_uxTaskPriorityGet              1\r
+#define INCLUDE_vTaskDelete                            0\r
+#define INCLUDE_vTaskCleanUpResources  0\r
+#define INCLUDE_vTaskSuspend                   1\r
+#define INCLUDE_vTaskDelayUntil                        1\r
+#define INCLUDE_vTaskDelay                             1\r
+\r
+\r
+#define configKERNEL_INTERRUPT_PRIORITY        0x01\r
+\r
+\r
+#endif /* FREERTOS_CONFIG_H */\r
diff --git a/Demo/PIC32MX_MPLAB/ParTest/ParTest.c b/Demo/PIC32MX_MPLAB/ParTest/ParTest.c
new file mode 100644 (file)
index 0000000..e7ba1c5
--- /dev/null
@@ -0,0 +1,93 @@
+/*\r
+       FreeRTOS.org V4.6.1 - Copyright (C) 2003-2007 Richard Barry.\r
+\r
+       This file is part of the FreeRTOS.org distribution.\r
+\r
+       FreeRTOS.org is free software; you can redistribute it and/or modify\r
+       it under the terms of the GNU General Public License as published by\r
+       the Free Software Foundation; either version 2 of the License, or\r
+       (at your option) any later version.\r
+\r
+       FreeRTOS.org is distributed in the hope that it will be useful,\r
+       but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+       MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
+       GNU General Public License for more details.\r
+\r
+       You should have received a copy of the GNU General Public License\r
+       along with FreeRTOS.org; if not, write to the Free Software\r
+       Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
+\r
+       A special exception to the GPL can be applied should you wish to distribute\r
+       a combined work that includes FreeRTOS.org, without being obliged to provide\r
+       the source code for any proprietary components.  See the licensing section \r
+       of http://www.FreeRTOS.org for full details of how and when the exception\r
+       can be applied.\r
+\r
+       ***************************************************************************\r
+       See http://www.FreeRTOS.org for documentation, latest information, license \r
+       and contact details.  Please ensure to read the configuration and relevant \r
+       port sections of the online documentation.\r
+\r
+       Also see http://www.SafeRTOS.com a version that has been certified for use\r
+       in safety critical systems, plus commercial licensing, development and\r
+       support options.\r
+       ***************************************************************************\r
+*/\r
+\r
+/* Scheduler includes. */\r
+#include "FreeRTOS.h"\r
+\r
+/* Demo app includes. */\r
+#include "partest.h"\r
+\r
+#define ptOUTPUT       0\r
+#define ptALL_OFF      0\r
+\r
+/*-----------------------------------------------------------\r
+ * Simple parallel port IO routines.\r
+ *-----------------------------------------------------------*/\r
+\r
+void vParTestInitialise( void )\r
+{\r
+       /* All LEDs output. */  \r
+       TRISA = ptOUTPUT;       \r
+       PORTA = ptALL_OFF;\r
+       \r
+       mJTAGPortEnable( 0 );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vParTestSetLED( unsigned portBASE_TYPE uxLED, signed portBASE_TYPE xValue )\r
+{\r
+unsigned portBASE_TYPE uxLEDBit;\r
+\r
+       /* Which port A bit is being modified? */\r
+       uxLEDBit = 1 << uxLED;\r
+\r
+       if( xValue )\r
+       {\r
+               /* Turn the LED on.   Use of the PORTASET register removes the need\r
+               to use a critical section. */\r
+               PORTASET = uxLEDBit;\r
+       }\r
+       else\r
+       {\r
+               /* Turn the LED off.  Use of the PORTACLR register removes the need\r
+               to use a critical section. */\r
+               PORTACLR = uxLEDBit;\r
+       }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vParTestToggleLED( unsigned portBASE_TYPE uxLED )\r
+{\r
+unsigned portBASE_TYPE uxLEDBit;\r
+       \r
+       uxLEDBit = 1 << uxLED;\r
+\r
+       /* Use of the PORTAINV register removes the need to use a critical section. */\r
+       PORTAINV = uxLEDBit;\r
+}\r
+\r
+\r
+\r
diff --git a/Demo/PIC32MX_MPLAB/RTOSDemo.mcp b/Demo/PIC32MX_MPLAB/RTOSDemo.mcp
new file mode 100644 (file)
index 0000000..41ae673
--- /dev/null
@@ -0,0 +1,94 @@
+[HEADER]\r
+magic_cookie={66E99B07-E706-4689-9E80-9B2582898A13}\r
+file_version=1.0\r
+[PATH_INFO]\r
+BuildDirPolicy=BuildDirIsProjectDir\r
+dir_src=\r
+dir_bin=\r
+dir_tmp=\r
+dir_sin=..\..\Source\portable\MPLAB\PIC32MX;.\r
+dir_inc=.;.;..\common\include;..\..\source\portable\mplab\pic32mx;..\..\source\include\r
+dir_lib=\r
+dir_lkr=\r
+[CAT_FILTERS]\r
+filter_src=*.s;*.c\r
+filter_inc=*.h;*.inc\r
+filter_obj=*.o\r
+filter_lib=*.a\r
+filter_lkr=*.ld\r
+[OTHER_FILES]\r
+file_000=no\r
+file_001=no\r
+file_002=no\r
+file_003=no\r
+file_004=no\r
+file_005=no\r
+file_006=no\r
+file_007=no\r
+file_008=no\r
+file_009=no\r
+file_010=no\r
+file_011=no\r
+file_012=no\r
+file_013=no\r
+file_014=no\r
+file_015=no\r
+file_016=no\r
+file_017=no\r
+file_018=no\r
+file_019=no\r
+file_020=no\r
+file_021=no\r
+file_022=no\r
+file_023=no\r
+file_024=no\r
+file_025=no\r
+file_026=no\r
+file_027=no\r
+file_028=no\r
+file_029=no\r
+file_030=yes\r
+[FILE_INFO]\r
+file_000=main.c\r
+file_001=ParTest\ParTest.c\r
+file_002=..\..\Source\portable\MPLAB\PIC32MX\port.c\r
+file_003=..\..\Source\list.c\r
+file_004=..\..\Source\queue.c\r
+file_005=..\..\Source\tasks.c\r
+file_006=..\..\Source\portable\MPLAB\PIC32MX\port_asm.S\r
+file_007=RegisterTestTasks.s\r
+file_008=..\..\Source\portable\MemMang\heap_2.c\r
+file_009=..\Common\Minimal\flash.c\r
+file_010=..\Common\Minimal\QPeek.c\r
+file_011=..\Common\Minimal\semtest.c\r
+file_012=..\Common\Minimal\GenQTest.c\r
+file_013=..\Common\Minimal\integer.c\r
+file_014=..\Common\Minimal\blocktim.c\r
+file_015=lcd.c\r
+file_016=serial\serial.c\r
+file_017=..\Common\Minimal\comtest.c\r
+file_018=serial\serial_isr.S\r
+file_019=timertest.c\r
+file_020=FreeRTOSConfig.h\r
+file_021=..\..\Source\portable\MPLAB\PIC32MX\portmacro.h\r
+file_022=..\..\Source\include\portable.h\r
+file_023=..\..\Source\include\task.h\r
+file_024=..\..\Source\include\croutine.h\r
+file_025=..\..\Source\include\FreeRTOS.h\r
+file_026=..\..\Source\include\list.h\r
+file_027=..\..\Source\include\projdefs.h\r
+file_028=..\..\Source\include\queue.h\r
+file_029=..\..\Source\include\semphr.h\r
+file_030=PIC32MX_MPLAB.map\r
+[SUITE_INFO]\r
+suite_guid={14495C23-81F8-43F3-8A44-859C583D7760}\r
+suite_state=\r
+[TOOL_SETTINGS]\r
+TS{CB0AF4B8-4022-429D-8F99-8A56782B2C6D}=--keep-locals --gdwarf-2\r
+TS{9C698E0A-CBC9-4EFF-AE7D-B569F93E7322}=-g -DMPLAB_PIC32MX_PORT -Wall -fomit-frame-pointer\r
+TS{77F59DA1-3C53-4677-AC5F-A03EB0125170}=-o"$(BINDIR_)$(TARGETBASE).$(TARGETSUFFIX)" -Map="$(BINDIR_)$(TARGETBASE).map"\r
+TS{0396C0A1-9052-4E4F-8B84-EF0162B1B4E9}=\r
+[INSTRUMENTED_TRACE]\r
+enable=0\r
+transport=0\r
+format=0\r
diff --git a/Demo/PIC32MX_MPLAB/RTOSDemo.mcs b/Demo/PIC32MX_MPLAB/RTOSDemo.mcs
new file mode 100644 (file)
index 0000000..a44fd7f
--- /dev/null
@@ -0,0 +1,271 @@
+[Header]\r
+MagicCookie={0b13fe8c-dfe0-40eb-8900-6712719559a7}\r
+Version=1.0\r
+[File000]\r
+Location=C:\Temp\RC\1\Demo\PIC32MX_MPLAB\main.o\r
+Folder=Intermediary\r
+DeviceName=PIC32MX360F512L\r
+LanguageToolSuiteID={14495C23-81F8-43F3-8A44-859C583D7760}\r
+LanguageToolID={430F471F-7ECB-4852-A80D-DEF9A5C8E751}\r
+LanguageToolLocation=C:\Devtools\Microchip\MPLAB C32\bin\pic32-gcc.exe\r
+PPAD=$(BINDIR)||$(TMPDIR)||$(AINDIR)|..\..\Source\portable\MPLAB\PIC32MX;.||$(INCDIR)|.;.;..\common\include;..\..\source\portable\mplab\pic32mx;..\..\source\include||$(LIBDIR)||$(LKRDIR)||\r
+SOLK=<src>|main.c|ParTest\ParTest.c|..\..\Source\portable\MPLAB\PIC32MX\port.c|..\..\Source\list.c|..\..\Source\queue.c|..\..\Source\tasks.c|..\..\Source\portable\MPLAB\PIC32MX\port_asm.S|RegisterTestTasks.s|..\..\Source\portable\MemMang\heap_2.c|..\Common\Minimal\flash.c|..\Common\Minimal\QPeek.c|..\Common\Minimal\semtest.c|..\Common\Minimal\GenQTest.c|..\Common\Minimal\integer.c|..\Common\Minimal\blocktim.c|lcd.c|serial\serial.c|..\Common\Minimal\comtest.c|serial\serial_isr.S|timertest.c||<obj>||<lib>||<lkr>||\r
+SuiteArgsString=\r
+ToolArgsString=-g -DMPLAB_PIC32MX_PORT -Wall -fomit-frame-pointer\r
+TraceCmdString=\r
+[File001]\r
+Location=C:\Temp\RC\1\Demo\PIC32MX_MPLAB\ParTest.o\r
+Folder=Intermediary\r
+DeviceName=PIC32MX360F512L\r
+LanguageToolSuiteID={14495C23-81F8-43F3-8A44-859C583D7760}\r
+LanguageToolID={430F471F-7ECB-4852-A80D-DEF9A5C8E751}\r
+LanguageToolLocation=C:\Devtools\Microchip\MPLAB C32\bin\pic32-gcc.exe\r
+PPAD=$(BINDIR)||$(TMPDIR)||$(AINDIR)|..\..\Source\portable\MPLAB\PIC32MX;.||$(INCDIR)|.;.;..\common\include;..\..\source\portable\mplab\pic32mx;..\..\source\include||$(LIBDIR)||$(LKRDIR)||\r
+SOLK=<src>|main.c|ParTest\ParTest.c|..\..\Source\portable\MPLAB\PIC32MX\port.c|..\..\Source\list.c|..\..\Source\queue.c|..\..\Source\tasks.c|..\..\Source\portable\MPLAB\PIC32MX\port_asm.S|RegisterTestTasks.s|..\..\Source\portable\MemMang\heap_2.c|..\Common\Minimal\flash.c|..\Common\Minimal\QPeek.c|..\Common\Minimal\semtest.c|..\Common\Minimal\GenQTest.c|..\Common\Minimal\integer.c|..\Common\Minimal\blocktim.c|lcd.c|serial\serial.c|..\Common\Minimal\comtest.c|serial\serial_isr.S|timertest.c||<obj>||<lib>||<lkr>||\r
+SuiteArgsString=\r
+ToolArgsString=-g -DMPLAB_PIC32MX_PORT -Wall -fomit-frame-pointer\r
+TraceCmdString=\r
+[File002]\r
+Location=C:\Temp\RC\1\Demo\PIC32MX_MPLAB\port.o\r
+Folder=Intermediary\r
+DeviceName=PIC32MX360F512L\r
+LanguageToolSuiteID={14495C23-81F8-43F3-8A44-859C583D7760}\r
+LanguageToolID={430F471F-7ECB-4852-A80D-DEF9A5C8E751}\r
+LanguageToolLocation=C:\Devtools\Microchip\MPLAB C32\bin\pic32-gcc.exe\r
+PPAD=$(BINDIR)||$(TMPDIR)||$(AINDIR)|..\..\Source\portable\MPLAB\PIC32MX;.||$(INCDIR)|.;.;..\common\include;..\..\source\portable\mplab\pic32mx;..\..\source\include||$(LIBDIR)||$(LKRDIR)||\r
+SOLK=<src>|main.c|ParTest\ParTest.c|..\..\Source\portable\MPLAB\PIC32MX\port.c|..\..\Source\list.c|..\..\Source\queue.c|..\..\Source\tasks.c|..\..\Source\portable\MPLAB\PIC32MX\port_asm.S|RegisterTestTasks.s|..\..\Source\portable\MemMang\heap_2.c|..\Common\Minimal\flash.c|..\Common\Minimal\QPeek.c|..\Common\Minimal\semtest.c|..\Common\Minimal\GenQTest.c|..\Common\Minimal\integer.c|..\Common\Minimal\blocktim.c|lcd.c|serial\serial.c|..\Common\Minimal\comtest.c|serial\serial_isr.S|timertest.c||<obj>||<lib>||<lkr>||\r
+SuiteArgsString=\r
+ToolArgsString=-g -DMPLAB_PIC32MX_PORT -Wall -fomit-frame-pointer\r
+TraceCmdString=\r
+[File003]\r
+Location=C:\Temp\RC\1\Demo\PIC32MX_MPLAB\list.o\r
+Folder=Intermediary\r
+DeviceName=PIC32MX360F512L\r
+LanguageToolSuiteID={14495C23-81F8-43F3-8A44-859C583D7760}\r
+LanguageToolID={430F471F-7ECB-4852-A80D-DEF9A5C8E751}\r
+LanguageToolLocation=C:\Devtools\Microchip\MPLAB C32\bin\pic32-gcc.exe\r
+PPAD=$(BINDIR)||$(TMPDIR)||$(AINDIR)|..\..\Source\portable\MPLAB\PIC32MX;.||$(INCDIR)|.;.;..\common\include;..\..\source\portable\mplab\pic32mx;..\..\source\include||$(LIBDIR)||$(LKRDIR)||\r
+SOLK=<src>|main.c|ParTest\ParTest.c|..\..\Source\portable\MPLAB\PIC32MX\port.c|..\..\Source\list.c|..\..\Source\queue.c|..\..\Source\tasks.c|..\..\Source\portable\MPLAB\PIC32MX\port_asm.S|RegisterTestTasks.s|..\..\Source\portable\MemMang\heap_2.c|..\Common\Minimal\flash.c|..\Common\Minimal\QPeek.c|..\Common\Minimal\semtest.c|..\Common\Minimal\GenQTest.c|..\Common\Minimal\integer.c|..\Common\Minimal\blocktim.c|lcd.c|serial\serial.c|..\Common\Minimal\comtest.c|serial\serial_isr.S|timertest.c||<obj>||<lib>||<lkr>||\r
+SuiteArgsString=\r
+ToolArgsString=-g -DMPLAB_PIC32MX_PORT -Wall -fomit-frame-pointer\r
+TraceCmdString=\r
+[File004]\r
+Location=C:\Temp\RC\1\Demo\PIC32MX_MPLAB\queue.o\r
+Folder=Intermediary\r
+DeviceName=PIC32MX360F512L\r
+LanguageToolSuiteID={14495C23-81F8-43F3-8A44-859C583D7760}\r
+LanguageToolID={430F471F-7ECB-4852-A80D-DEF9A5C8E751}\r
+LanguageToolLocation=C:\Devtools\Microchip\MPLAB C32\bin\pic32-gcc.exe\r
+PPAD=$(BINDIR)||$(TMPDIR)||$(AINDIR)|..\..\Source\portable\MPLAB\PIC32MX;.||$(INCDIR)|.;.;..\common\include;..\..\source\portable\mplab\pic32mx;..\..\source\include||$(LIBDIR)||$(LKRDIR)||\r
+SOLK=<src>|main.c|ParTest\ParTest.c|..\..\Source\portable\MPLAB\PIC32MX\port.c|..\..\Source\list.c|..\..\Source\queue.c|..\..\Source\tasks.c|..\..\Source\portable\MPLAB\PIC32MX\port_asm.S|RegisterTestTasks.s|..\..\Source\portable\MemMang\heap_2.c|..\Common\Minimal\flash.c|..\Common\Minimal\QPeek.c|..\Common\Minimal\semtest.c|..\Common\Minimal\GenQTest.c|..\Common\Minimal\integer.c|..\Common\Minimal\blocktim.c|lcd.c|serial\serial.c|..\Common\Minimal\comtest.c|serial\serial_isr.S|timertest.c||<obj>||<lib>||<lkr>||\r
+SuiteArgsString=\r
+ToolArgsString=-g -DMPLAB_PIC32MX_PORT -Wall -fomit-frame-pointer\r
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+TraceCmdString=\r
+[File021]\r
+Location=C:\Temp\RC\1\Demo\PIC32MX_MPLAB\RTOSDemo.hex\r
+Folder=Output\r
+DeviceName=PIC32MX360F512L\r
+LanguageToolSuiteID={14495C23-81F8-43F3-8A44-859C583D7760}\r
+LanguageToolID={C68E5105-1196-4333-A0BF-3DC57271E614}\r
+LanguageToolLocation=C:\Devtools\Microchip\MPLAB C32\bin\pic32-ld.exe\r
+PPAD=$(BINDIR)||$(TMPDIR)||$(AINDIR)|..\..\Source\portable\MPLAB\PIC32MX;.||$(INCDIR)|.;.;..\common\include;..\..\source\portable\mplab\pic32mx;..\..\source\include||$(LIBDIR)||$(LKRDIR)||\r
+SOLK=<src>|main.c|ParTest\ParTest.c|..\..\Source\portable\MPLAB\PIC32MX\port.c|..\..\Source\list.c|..\..\Source\queue.c|..\..\Source\tasks.c|..\..\Source\portable\MPLAB\PIC32MX\port_asm.S|RegisterTestTasks.s|..\..\Source\portable\MemMang\heap_2.c|..\Common\Minimal\flash.c|..\Common\Minimal\QPeek.c|..\Common\Minimal\semtest.c|..\Common\Minimal\GenQTest.c|..\Common\Minimal\integer.c|..\Common\Minimal\blocktim.c|lcd.c|serial\serial.c|..\Common\Minimal\comtest.c|serial\serial_isr.S|timertest.c||<obj>||<lib>||<lkr>||\r
+SuiteArgsString=\r
+ToolArgsString=-o"$(BINDIR_)$(TARGETBASE).$(TARGETSUFFIX)" -Map="$(BINDIR_)$(TARGETBASE).map"\r
+TraceCmdString=\r
+[TOOL_LOC_STAMPS]\r
+tool_loc{92E15EC6-5E91-4BF4-B5FA-C80AD2601AA7}=C:\Devtools\Microchip\MPLAB C32\bin\pic32-as.exe\r
+tool_loc{430F471F-7ECB-4852-A80D-DEF9A5C8E751}=C:\Devtools\Microchip\MPLAB C32\bin\pic32-gcc.exe\r
+tool_loc{C68E5105-1196-4333-A0BF-3DC57271E614}=C:\Devtools\Microchip\MPLAB C32\bin\pic32-ld.exe\r
diff --git a/Demo/PIC32MX_MPLAB/RTOSDemo.mcw b/Demo/PIC32MX_MPLAB/RTOSDemo.mcw
new file mode 100644 (file)
index 0000000..304a381
Binary files /dev/null and b/Demo/PIC32MX_MPLAB/RTOSDemo.mcw differ
diff --git a/Demo/PIC32MX_MPLAB/RegisterTestTasks.s b/Demo/PIC32MX_MPLAB/RegisterTestTasks.s
new file mode 100644 (file)
index 0000000..55b5f52
--- /dev/null
@@ -0,0 +1,333 @@
+/*\r
+       FreeRTOS.org V4.6.1 - Copyright (C) 2003-2007 Richard Barry.\r
+\r
+       This file is part of the FreeRTOS.org distribution.\r
+\r
+       FreeRTOS.org is free software; you can redistribute it and/or modify\r
+       it under the terms of the GNU General Public License as published by\r
+       the Free Software Foundation; either version 2 of the License, or\r
+       (at your option) any later version.\r
+\r
+       FreeRTOS.org is distributed in the hope that it will be useful,\r
+       but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+       MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
+       GNU General Public License for more details.\r
+\r
+       You should have received a copy of the GNU General Public License\r
+       along with FreeRTOS.org; if not, write to the Free Software\r
+       Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
+\r
+       A special exception to the GPL can be applied should you wish to distribute\r
+       a combined work that includes FreeRTOS.org, without being obliged to provide\r
+       the source code for any proprietary components.  See the licensing section\r
+       of http://www.FreeRTOS.org for full details of how and when the exception\r
+       can be applied.\r
+\r
+       ***************************************************************************\r
+       See http://www.FreeRTOS.org for documentation, latest information, license\r
+       and contact details.  Please ensure to read the configuration and relevant\r
+       port sections of the online documentation.\r
+\r
+       Also see http://www.SafeRTOS.com a version that has been certified for use\r
+       in safety critical systems, plus commercial licensing, development and\r
+       support options.\r
+       ***************************************************************************\r
+*/\r
+\r
+\r
+#include <p32xxxx.h>\r
+#include <sys/asm.h>\r
\r
+       .set    nomips16\r
+       .set    noreorder\r
+       \r
+       \r
+       .global vRegTest1\r
+       .global vRegTest2\r
+\r
+\r
+/*     .section        .FreeRTOS, ax, @progbits */\r
+       .set            noreorder\r
+       .set            noat\r
+       .ent            vRegTest1\r
+\r
+/* Address of $4 ulStatus1 is held in A0, so don't mess with the value of $4 */\r
+\r
+vRegTest1:\r
+                       addiu   $1, $0, 0x11\r
+                       addiu   $2, $0, 0x12                                            \r
+                       addiu   $3, $0, 0x13                                            \r
+                       addiu   $5, $0, 0x15                                            \r
+                       addiu   $6, $0, 0x16                                            \r
+                       addiu   $7, $0, 0x17                                            \r
+                       addiu   $8, $0, 0x18                                            \r
+                       addiu   $9, $0, 0x19                                            \r
+                       addiu   $10, $0, 0x110                                          \r
+                       addiu   $11, $0, 0x111                                          \r
+                       addiu   $12, $0, 0x112                                          \r
+                       addiu   $13, $0, 0x113                                          \r
+                       addiu   $14, $0, 0x114                                          \r
+                       addiu   $15, $0, 0x115                                          \r
+                       addiu   $16, $0, 0x116                                          \r
+                       addiu   $17, $0, 0x117                                          \r
+                       addiu   $18, $0, 0x118                                          \r
+                       addiu   $19, $0, 0x119                                          \r
+                       addiu   $20, $0, 0x120                                          \r
+                       addiu   $21, $0, 0x121                                          \r
+                       addiu   $22, $0, 0x122                                          \r
+                       addiu   $23, $0, 0x123                                          \r
+                       addiu   $24, $0, 0x124                                          \r
+                       addiu   $25, $0, 0x125                                          \r
+                       addiu   $30, $0, 0x130                                          \r
+\r
+                       #if configUSE_PREEMPTION == 0\r
+                               syscall 0\r
+                       #endif\r
+\r
+                       addiu   $1, $1, -0x11\r
+                       beq             $1, $0, .+12\r
+                       nop\r
+                       sw              $0,     0($4) \r
+                       addiu   $2, $2, -0x12                                   \r
+                       beq     $2, $0, .+12                                    \r
+                       nop                                                                     \r
+                       sw              $0,     0($4) \r
+                       addiu   $3, $3, -0x13                                   \r
+                       beq     $3, $0, .+12                                    \r
+                       nop                                                                     \r
+                       sw              $0,     0($4)                                   \r
+                       addiu   $5, $5, -0x15                                   \r
+                       beq     $5, $0, .+12                                    \r
+                       nop                                                                     \r
+                       sw              $0,     0($4)                                   \r
+                       addiu   $6, $6, -0x16                                   \r
+                       beq     $6, $0, .+12                                    \r
+                       nop                                                                     \r
+                       sw              $0,     0($4)                                   \r
+                       addiu   $7, $7, -0x17                                   \r
+                       beq     $7, $0, .+12                                    \r
+                       nop                                                                     \r
+                       sw              $0,     0($4)                                   \r
+                       addiu   $8, $8, -0x18                                   \r
+                       beq     $8, $0, .+12                                    \r
+                       nop                                                                     \r
+                       sw              $0,     0($4)                                   \r
+                       addiu   $9, $9, -0x19                                   \r
+                       beq     $9, $0, .+12                                    \r
+                       nop                                                                     \r
+                       sw              $0,     0($4)                                   \r
+                       addiu   $10, $10, -0x110                                \r
+                       beq     $10, $0, .+12                                   \r
+                       nop                                                                     \r
+                       sw              $0,     0($4)                                   \r
+                       addiu   $11, $11, -0x111                                \r
+                       beq     $11, $0, .+12                                   \r
+                       nop                                                                     \r
+                       sw              $0,     0($4)                                   \r
+                       addiu   $12, $12, -0x112                                \r
+                       beq     $12, $0, .+12                                   \r
+                       nop                                                                     \r
+                       sw              $0,     0($4)                                   \r
+                       addiu   $13, $13, -0x113                                \r
+                       beq     $13, $0, .+12                                   \r
+                       nop                                                                     \r
+                       sw              $0,     0($4)                                   \r
+                       addiu   $14, $14, -0x114                                \r
+                       beq     $14, $0, .+12                                   \r
+                       nop                                                                     \r
+                       sw              $0,     0($4)                                   \r
+                       addiu   $15, $15, -0x115                                \r
+                       beq     $15, $0, .+12                                   \r
+                       nop                                                                     \r
+                       sw              $0,     0($4)                                   \r
+                       addiu   $16, $16, -0x116                                \r
+                       beq     $16, $0, .+12                                   \r
+                       nop                                                                     \r
+                       sw              $0,     0($4)                                   \r
+                       addiu   $17, $17, -0x117                                \r
+                       beq     $17, $0, .+12                                   \r
+                       nop                                                                     \r
+                       sw              $0,     0($4)                                   \r
+                       addiu   $18, $18, -0x118                                \r
+                       beq     $18, $0, .+12                                   \r
+                       nop                                                                     \r
+                       sw              $0,     0($4)                                   \r
+                       addiu   $19, $19, -0x119                                \r
+                       beq     $19, $0, .+12                                   \r
+                       nop                                                                     \r
+                       sw              $0,     0($4)                                   \r
+                       addiu   $20, $20, -0x120                                \r
+                       beq     $20, $0, .+12                                   \r
+                       nop                                                                     \r
+                       sw              $0,     0($4)                                   \r
+                       addiu   $21, $21, -0x121                                \r
+                       beq     $21, $0, .+12                                   \r
+                       nop                                                                     \r
+                       sw              $0,     0($4)                                   \r
+                       addiu   $22, $22, -0x122                                \r
+                       beq     $22, $0, .+12                                   \r
+                       nop                                                                     \r
+                       sw              $0,     0($4)                                   \r
+                       addiu   $23, $23, -0x123                                \r
+                       beq     $23, $0, .+12                                   \r
+                       nop                                                                     \r
+                       sw              $0,     0($4)                                   \r
+                       addiu   $24, $24, -0x124                                \r
+                       beq     $24, $0, .+12                                   \r
+                       nop                                                                     \r
+                       sw              $0,     0($4)                                   \r
+                       addiu   $25, $25, -0x125                                \r
+                       beq     $25, $0, .+12                                   \r
+                       nop                                                                     \r
+                       sw              $0,     0($4)                                   \r
+                       addiu   $30, $30, -0x130                                \r
+                       beq     $30, $0, .+12                                   \r
+                       nop                                                                     \r
+                       sw              $0,     0($4)                                   \r
+                       jr              $31\r
+                       nop\r
+\r
+       .end            vRegTest1\r
+\r
+\r
+/*     .section        .FreeRTOS, ax, @progbits */\r
+       .set            noreorder\r
+       .set            noat\r
+       .ent            vRegTest2\r
+\r
+vRegTest2:\r
+\r
+                       addiu   $1, $0, 0x10\r
+                       addiu   $2, $0, 0x20                                    \r
+                       addiu   $3, $0, 0x30                                    \r
+                       addiu   $5, $0, 0x50                                    \r
+                       addiu   $6, $0, 0x60                                    \r
+                       addiu   $7, $0, 0x70                                    \r
+                       addiu   $8, $0, 0x80                                    \r
+                       addiu   $9, $0, 0x90                                    \r
+                       addiu   $10, $0, 0x100                                  \r
+                       addiu   $11, $0, 0x110                                  \r
+                       addiu   $12, $0, 0x120                                  \r
+                       addiu   $13, $0, 0x130                                  \r
+                       addiu   $14, $0, 0x140                                  \r
+                       addiu   $15, $0, 0x150                                  \r
+                       addiu   $16, $0, 0x160                                  \r
+                       addiu   $17, $0, 0x170                                  \r
+                       addiu   $18, $0, 0x180                                  \r
+                       addiu   $19, $0, 0x190                                  \r
+                       addiu   $20, $0, 0x200                                  \r
+                       addiu   $21, $0, 0x210                                  \r
+                       addiu   $22, $0, 0x220                                  \r
+                       addiu   $23, $0, 0x230                                  \r
+                       addiu   $24, $0, 0x240                                  \r
+                       addiu   $25, $0, 0x250                                  \r
+                       addiu   $30, $0, 0x300                                  \r
+\r
+                       #if configUSE_PREEMPTION == 0\r
+                               syscall 0\r
+                       #endif\r
+\r
+                       addiu   $1, $1, -0x10\r
+                       beq             $1, $0, .+12\r
+                       nop\r
+                       sw              $0,     0($4) \r
+                       addiu   $2, $2, -0x20                                   \r
+                       beq     $2, $0, .+12                                    \r
+                       nop                                                                     \r
+                       sw              $0,     0($4)                                   \r
+                       addiu   $3, $3, -0x30                                   \r
+                       beq     $3, $0, .+12                                    \r
+                       nop                                                                     \r
+                       sw              $0,     0($4)                                   \r
+                       addiu   $5, $5, -0x50                                   \r
+                       beq     $5, $0, .+12                                    \r
+                       nop                                                                     \r
+                       sw              $0,     0($4)                                   \r
+                       addiu   $6, $6, -0x60                                   \r
+                       beq     $6, $0, .+12                                    \r
+                       nop                                                                     \r
+                       sw              $0,     0($4)                                   \r
+                       addiu   $7, $7, -0x70                                   \r
+                       beq     $7, $0, .+12                                    \r
+                       nop                                                                     \r
+                       sw              $0,     0($4)                                   \r
+                       addiu   $8, $8, -0x80                                   \r
+                       beq     $8, $0, .+12                                    \r
+                       nop                                                                     \r
+                       sw              $0,     0($4)                                   \r
+                       addiu   $9, $9, -0x90                                   \r
+                       beq     $9, $0, .+12                                    \r
+                       nop                                                                     \r
+                       sw              $0,     0($4)                                   \r
+                       addiu   $10, $10, -0x100                                \r
+                       beq     $10, $0, .+12                                   \r
+                       nop                                                                     \r
+                       sw              $0,     0($4)                                   \r
+                       addiu   $11, $11, -0x110                                \r
+                       beq     $11, $0, .+12                                   \r
+                       nop                                                                     \r
+                       sw              $0,     0($4)                                   \r
+                       addiu   $12, $12, -0x120                                \r
+                       beq     $12, $0, .+12                                   \r
+                       nop                                                                     \r
+                       sw              $0,     0($4)                                   \r
+                       addiu   $13, $13, -0x130                                \r
+                       beq     $13, $0, .+12                                   \r
+                       nop                                                                     \r
+                       sw              $0,     0($4)                                   \r
+                       addiu   $14, $14, -0x140                                \r
+                       beq     $14, $0, .+12                                   \r
+                       nop                                                                     \r
+                       sw              $0,     0($4)                                   \r
+                       addiu   $15, $15, -0x150                                \r
+                       beq     $15, $0, .+12                                   \r
+                       nop                                                                     \r
+                       sw              $0,     0($4)                                   \r
+                       addiu   $16, $16, -0x160                                \r
+                       beq     $16, $0, .+12                                   \r
+                       nop                                                                     \r
+                       sw              $0,     0($4)                                   \r
+                       addiu   $17, $17, -0x170                                \r
+                       beq     $17, $0, .+12                                   \r
+                       nop                                                                     \r
+                       sw              $0,     0($4)                                   \r
+                       addiu   $18, $18, -0x180                                \r
+                       beq     $18, $0, .+12                                   \r
+                       nop                                                                     \r
+                       sw              $0,     0($4)                                   \r
+                       addiu   $19, $19, -0x190                                \r
+                       beq     $19, $0, .+12                                   \r
+                       nop                                                                     \r
+                       sw              $0,     0($4)                                   \r
+                       addiu   $20, $20, -0x200                                \r
+                       beq     $20, $0, .+12                                   \r
+                       nop                                                                     \r
+                       sw              $0,     0($4)                                   \r
+                       addiu   $21, $21, -0x210                                \r
+                       beq     $21, $0, .+12                                   \r
+                       nop                                                                     \r
+                       sw              $0,     0($4)                                   \r
+                       addiu   $22, $22, -0x220                                \r
+                       beq     $22, $0, .+12                                   \r
+                       nop                                                                     \r
+                       sw              $0,     0($4)                                   \r
+                       addiu   $23, $23, -0x230                                \r
+                       beq     $23, $0, .+12                                   \r
+                       nop                                                                     \r
+                       sw              $0,     0($4)                                   \r
+                       addiu   $24, $24, -0x240                                \r
+                       beq     $24, $0, .+12                                   \r
+                       nop                                                                     \r
+                       sw              $0,     0($4)                                   \r
+                       addiu   $25, $25, -0x250                                \r
+                       beq     $25, $0, .+12                                   \r
+                       nop                                                                     \r
+                       sw              $0,     0($4)                                   \r
+                       addiu   $30, $30, -0x300                                \r
+                       beq     $30, $0, .+12                                   \r
+                       nop                                                                     \r
+                       sw              $0,     0($4)                                   \r
+                       jr              $31\r
+                       nop\r
+\r
+       .end vRegTest2\r
diff --git a/Demo/PIC32MX_MPLAB/lcd.c b/Demo/PIC32MX_MPLAB/lcd.c
new file mode 100644 (file)
index 0000000..6d20b54
--- /dev/null
@@ -0,0 +1,243 @@
+/*\r
+       FreeRTOS.org V4.6.1 - Copyright (C) 2003-2007 Richard Barry.\r
+\r
+       This file is part of the FreeRTOS.org distribution.\r
+\r
+       FreeRTOS.org is free software; you can redistribute it and/or modify\r
+       it under the terms of the GNU General Public License as published by\r
+       the Free Software Foundation; either version 2 of the License, or\r
+       (at your option) any later version.\r
+\r
+       FreeRTOS.org is distributed in the hope that it will be useful,\r
+       but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+       MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
+       GNU General Public License for more details.\r
+\r
+       You should have received a copy of the GNU General Public License\r
+       along with FreeRTOS.org; if not, write to the Free Software\r
+       Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
+\r
+       A special exception to the GPL can be applied should you wish to distribute\r
+       a combined work that includes FreeRTOS.org, without being obliged to provide\r
+       the source code for any proprietary components.  See the licensing section \r
+       of http://www.FreeRTOS.org for full details of how and when the exception\r
+       can be applied.\r
+\r
+       ***************************************************************************\r
+       See http://www.FreeRTOS.org for documentation, latest information, license \r
+       and contact details.  Please ensure to read the configuration and relevant \r
+       port sections of the online documentation.\r
+\r
+       Also see http://www.SafeRTOS.com a version that has been certified for use\r
+       in safety critical systems, plus commercial licensing, development and\r
+       support options.\r
+       ***************************************************************************\r
+*/\r
+\r
+/* peripheral library include */\r
+#include <plib.h>\r
+\r
+/* Scheduler includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+#include "queue.h"\r
+\r
+/* Demo includes. */\r
+#include "lcd.h"\r
+\r
+/*\r
+ * The LCD is written to by more than one task so is controlled by this\r
+ * 'gatekeeper' task.  This is the only task that is actually permitted to\r
+ * access the LCD directly.  Other tasks wanting to display a message send\r
+ * the message to the gatekeeper.\r
+ */\r
+static void vLCDTask( void *pvParameters );\r
+\r
+/*\r
+ * Setup the peripherals required to communicate with the LCD.\r
+ */\r
+static void prvSetupLCD( void );\r
+\r
+/* \r
+ * Move to the first (0) or second (1) row of the LCD. \r
+ */\r
+static void prvLCDGotoRow( unsigned portSHORT usRow );\r
+\r
+/* \r
+ * Write a string of text to the LCD. \r
+ */\r
+static void prvLCDPutString( portCHAR *pcString );\r
+\r
+/* \r
+ * Clear the LCD. \r
+ */\r
+static void prvLCDClear( void );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Brief delay to permit the LCD to catch up with commands. */\r
+#define lcdVERY_SHORT_DELAY    ( 1 )\r
+#define lcdSHORT_DELAY         ( 4 / portTICK_RATE_MS )\r
+#define lcdLONG_DELAY          ( 15 / portTICK_RATE_MS )\r
+\r
+/* LCD specific definitions. */\r
+#define LCD_CLEAR_DISPLAY_CMD                  0x01\r
+#define LCD_CURSOR_HOME_CMD                            0x02\r
+#define LCD_ENTRY_MODE_CMD                             0x04\r
+#define LCD_ENTRY_MODE_INCREASE                        0x02\r
+#define LCD_DISPLAY_CTRL_CMD                   0x08\r
+#define LCD_DISPLAY_CTRL_DISPLAY_ON            0x04\r
+#define LCD_FUNCTION_SET_CMD                   0x20\r
+#define LCD_FUNCTION_SET_8_BITS                        0x10\r
+#define LCD_FUNCTION_SET_2_LINES               0x08\r
+#define LCD_FUNCTION_SET_LRG_FONT              0x04\r
+#define LCD_NEW_LINE                                   0xC0\r
+#define LCD_COMMAND_ADDRESS                            0x00\r
+#define LCD_DATA_ADDRESS                               0x01\r
+\r
+/* The length of the queue used to send messages to the LCD gatekeeper task. */\r
+#define lcdQUEUE_SIZE          3\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* The queue used to send messages to the LCD task. */\r
+xQueueHandle xLCDQueue;\r
+\r
+/* LCD access functions. */\r
+static void prvLCDCommand( portCHAR cCommand );\r
+static void prvLCDData( portCHAR cChar );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+xQueueHandle xStartLCDTask( void )\r
+{\r
+       /* Create the queue used by the LCD task.  Messages for display on the LCD\r
+       are received via this queue. */\r
+       xLCDQueue = xQueueCreate( lcdQUEUE_SIZE, sizeof( xLCDMessage ));\r
+\r
+       /* Start the task that will write to the LCD.  The LCD hardware is\r
+       initialised from within the task itself so delays can be used. */\r
+       xTaskCreate( vLCDTask, ( signed portCHAR * ) "LCD", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY + 1, NULL );\r
+\r
+       return xLCDQueue;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvLCDGotoRow( unsigned portSHORT usRow )\r
+{\r
+       if(usRow == 0) \r
+       {\r
+               prvLCDCommand( LCD_CURSOR_HOME_CMD );\r
+       } \r
+       else \r
+       {\r
+               prvLCDCommand( LCD_NEW_LINE );\r
+       }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvLCDCommand( portCHAR cCommand ) \r
+{\r
+       PMPSetAddress( LCD_COMMAND_ADDRESS );\r
+       PMPMasterWrite( cCommand );\r
+       vTaskDelay( lcdSHORT_DELAY );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvLCDData( portCHAR cChar )\r
+{\r
+       PMPSetAddress( LCD_DATA_ADDRESS );\r
+       PMPMasterWrite( cChar );\r
+       vTaskDelay( lcdVERY_SHORT_DELAY );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvLCDPutString( portCHAR *pcString )\r
+{\r
+       /* Write out each character with appropriate delay between each. */\r
+       while(*pcString)\r
+       {\r
+               prvLCDData(*pcString);\r
+               pcString++;\r
+               vTaskDelay(lcdSHORT_DELAY);\r
+       }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvLCDClear(void)\r
+{\r
+       prvLCDCommand(LCD_CLEAR_DISPLAY_CMD);\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvSetupLCD(void)\r
+{\r
+       /* Wait for proper power up. */\r
+       vTaskDelay( lcdLONG_DELAY );\r
+       \r
+       /* Open the PMP port */\r
+       mPMPOpen((PMP_ON | PMP_READ_WRITE_EN | PMP_CS2_CS1_EN |\r
+                         PMP_LATCH_POL_HI | PMP_CS2_POL_HI | PMP_CS1_POL_HI |\r
+                         PMP_WRITE_POL_HI | PMP_READ_POL_HI),\r
+                        (PMP_MODE_MASTER1 | PMP_WAIT_BEG_4 | PMP_WAIT_MID_15 |\r
+                         PMP_WAIT_END_4),\r
+                         PMP_PEN_0, 0);\r
+                        \r
+       /* Wait for the LCD to power up correctly. */\r
+       vTaskDelay( lcdLONG_DELAY );\r
+       vTaskDelay( lcdLONG_DELAY );\r
+       vTaskDelay( lcdLONG_DELAY );\r
+\r
+       /* Set up the LCD function. */\r
+       prvLCDCommand( LCD_FUNCTION_SET_CMD | LCD_FUNCTION_SET_8_BITS | LCD_FUNCTION_SET_2_LINES | LCD_FUNCTION_SET_LRG_FONT );\r
+       \r
+       /* Turn the display on. */\r
+       prvLCDCommand( LCD_DISPLAY_CTRL_CMD | LCD_DISPLAY_CTRL_DISPLAY_ON );\r
+       \r
+       /* Clear the display. */\r
+       prvLCDCommand( LCD_CLEAR_DISPLAY_CMD );\r
+       vTaskDelay( lcdLONG_DELAY );    \r
+       \r
+       /* Increase the cursor. */\r
+       prvLCDCommand( LCD_ENTRY_MODE_CMD | LCD_ENTRY_MODE_INCREASE );\r
+       vTaskDelay( lcdLONG_DELAY );                    \r
+       vTaskDelay( lcdLONG_DELAY );                    \r
+       vTaskDelay( lcdLONG_DELAY );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void vLCDTask(void *pvParameters)\r
+{\r
+xLCDMessage xMessage;\r
+unsigned portSHORT usRow = 0;\r
+\r
+       /* Initialise the hardware.  This uses delays so must not be called prior\r
+       to the scheduler being started. */\r
+       prvSetupLCD();\r
+\r
+       /* Welcome message. */\r
+       prvLCDPutString( "www.FreeRTOS.org" );\r
+\r
+       for(;;)\r
+       {\r
+               /* Wait for a message to arrive that requires displaying. */\r
+               while( xQueueReceive( xLCDQueue, &xMessage, portMAX_DELAY ) != pdPASS );\r
+\r
+               /* Clear the current display value. */\r
+               prvLCDClear();\r
+\r
+               /* Switch rows each time so we can see that the display is still being\r
+               updated. */\r
+               prvLCDGotoRow( usRow & 0x01 );\r
+               usRow++;\r
+               prvLCDPutString( xMessage.pcMessage );\r
+\r
+               /* Delay the requested amount of time to ensure the text just written \r
+               to the LCD is not overwritten. */\r
+               vTaskDelay( xMessage.xMinDisplayTime );         \r
+       }\r
+}\r
+\r
+\r
+\r
+\r
diff --git a/Demo/PIC32MX_MPLAB/lcd.h b/Demo/PIC32MX_MPLAB/lcd.h
new file mode 100644 (file)
index 0000000..ba08a96
--- /dev/null
@@ -0,0 +1,58 @@
+/*\r
+       FreeRTOS.org V4.6.1 - Copyright (C) 2003-2007 Richard Barry.\r
+\r
+       This file is part of the FreeRTOS.org distribution.\r
+\r
+       FreeRTOS.org is free software; you can redistribute it and/or modify\r
+       it under the terms of the GNU General Public License as published by\r
+       the Free Software Foundation; either version 2 of the License, or\r
+       (at your option) any later version.\r
+\r
+       FreeRTOS.org is distributed in the hope that it will be useful,\r
+       but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+       MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
+       GNU General Public License for more details.\r
+\r
+       You should have received a copy of the GNU General Public License\r
+       along with FreeRTOS.org; if not, write to the Free Software\r
+       Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
+\r
+       A special exception to the GPL can be applied should you wish to distribute\r
+       a combined work that includes FreeRTOS.org, without being obliged to provide\r
+       the source code for any proprietary components.  See the licensing section \r
+       of http://www.FreeRTOS.org for full details of how and when the exception\r
+       can be applied.\r
+\r
+       ***************************************************************************\r
+       See http://www.FreeRTOS.org for documentation, latest information, license \r
+       and contact details.  Please ensure to read the configuration and relevant \r
+       port sections of the online documentation.\r
+\r
+       Also see http://www.SafeRTOS.com a version that has been certified for use\r
+       in safety critical systems, plus commercial licensing, development and\r
+       support options.\r
+       ***************************************************************************\r
+*/\r
+\r
+#ifndef LCD_INC_H\r
+#define LCD_INC_H\r
+\r
+/* Create the task that will control the LCD.  Returned is a handle to the queue\r
+on which messages to get written to the LCD should be written. */\r
+xQueueHandle xStartLCDTask( void );\r
+\r
+typedef struct\r
+{\r
+       /* The minimum amount of time the message should remain on the LCD without\r
+       being overwritten. */\r
+       portTickType xMinDisplayTime;\r
+\r
+       /* A pointer to the string to be displayed. */\r
+       portCHAR *pcMessage;\r
+\r
+} xLCDMessage;\r
+\r
+\r
+#endif /* LCD_INC_H */\r
+\r
+\r
diff --git a/Demo/PIC32MX_MPLAB/main.c b/Demo/PIC32MX_MPLAB/main.c
new file mode 100644 (file)
index 0000000..4f68a7e
--- /dev/null
@@ -0,0 +1,362 @@
+/*\r
+       FreeRTOS.org V4.6.1 - Copyright (C) 2003-2007 Richard Barry.\r
+\r
+       This file is part of the FreeRTOS.org distribution.\r
+\r
+       FreeRTOS.org is free software; you can redistribute it and/or modify\r
+       it under the terms of the GNU General Public License as published by\r
+       the Free Software Foundation; either version 2 of the License, or\r
+       (at your option) any later version.\r
+\r
+       FreeRTOS.org is distributed in the hope that it will be useful,\r
+       but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+       MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
+       GNU General Public License for more details.\r
+\r
+       You should have received a copy of the GNU General Public License\r
+       along with FreeRTOS.org; if not, write to the Free Software\r
+       Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
+\r
+       A special exception to the GPL can be applied should you wish to distribute\r
+       a combined work that includes FreeRTOS.org, without being obliged to provide\r
+       the source code for any proprietary components.  See the licensing section\r
+       of http://www.FreeRTOS.org for full details of how and when the exception\r
+       can be applied.\r
+\r
+       ***************************************************************************\r
+       See http://www.FreeRTOS.org for documentation, latest information, license\r
+       and contact details.  Please ensure to read the configuration and relevant\r
+       port sections of the online documentation.\r
+\r
+       Also see http://www.SafeRTOS.com a version that has been certified for use\r
+       in safety critical systems, plus commercial licensing, development and\r
+       support options.\r
+       ***************************************************************************\r
+*/\r
+\r
+/*\r
+ * Creates all the demo application tasks, then starts the scheduler.  The WEB\r
+ * documentation provides more details of the standard demo application tasks.\r
+ * In addition to the standard demo tasks, the following tasks and tests are\r
+ * defined and/or created within this file:\r
+ *\r
+ * "Fast Interrupt Test" - A high frequency periodic interrupt is generated\r
+ * using a free running timer to demonstrate the use of the\r
+ * configKERNEL_INTERRUPT_PRIORITY configuration constant.  The interrupt\r
+ * service routine measures the number of processor clocks that occur between\r
+ * each interrupt - and in so doing measures the jitter in the interrupt timing.\r
+ * The maximum measured jitter time is latched in the ulMaxJitter variable, and\r
+ * displayed on the LCD display by the 'LCD' task as described below.  The\r
+ * fast interrupt is configured and handled in the timertest.c source file.\r
+ *\r
+ * "LCD" task - the LCD task is a 'gatekeeper' task.  It is the only task that\r
+ * is permitted to access the display directly.  Other tasks wishing to write a\r
+ * message to the LCD send the message on a queue to the LCD task instead of\r
+ * accessing the LCD themselves.  The LCD task just blocks on the queue waiting\r
+ * for messages - waking and displaying the messages as they arrive.\r
+ *\r
+ * "Check" task -  This only executes every three seconds but has the highest\r
+ * priority so is guaranteed to get processor time.  Its main function is to \r
+ * check that all the standard demo tasks are still operational.  Should any \r
+ * unexpected behaviour within a demo task be discovered the check task will \r
+ * write an error to the LCD (via the LCD task).  If all the demo tasks are \r
+ * executing with their expected behaviour then the check task writes the \r
+ * maximum jitter time to the LCD (as described above) - again via the LCD task.\r
+ *\r
+ * "Register test" tasks - These tasks are used in part to test the kernel port.\r
+ * They set each processor register to a known value, then check that the \r
+ * register still contains that value.  Each of the tasks sets the registers\r
+ * to different values, and will get swapping in and out between setting and \r
+ * then subsequently checking the register values.  Discovery of an incorrect\r
+ * value would be indicative of an error in the task switching mechanism.\r
+ */\r
+\r
+/* Standard includes. */\r
+#include <stdio.h>\r
+\r
+/* Scheduler includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+#include "queue.h"\r
+\r
+/* Demo application includes. */\r
+#include "partest.h"\r
+#include "integer.h"\r
+#include "blocktim.h"\r
+#include "flash.h"\r
+#include "semtest.h"\r
+#include "GenQTest.h"\r
+#include "QPeek.h"\r
+#include "lcd.h"\r
+#include "comtest2.h"\r
+#include "timertest.h"\r
+\r
+#pragma config FPLLMUL = MUL_18, FPLLIDIV = DIV_2, FPLLODIV = DIV_1, FWDTEN = OFF\r
+#pragma config POSCMOD = HS, FNOSC = PRIPLL, FPBDIV = DIV_2\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* The rate at which the LED controlled by the 'check' task will flash when no\r
+errors have been detected. */\r
+#define mainNO_ERROR_PERIOD    ( 3000 / portTICK_RATE_MS )\r
+\r
+/* The rate at which the LED controlled by the 'check' task will flash when an\r
+error has been detected. */\r
+#define mainERROR_PERIOD       ( 500 )\r
+\r
+/* The priorities of the various demo application tasks. */\r
+#define mainCHECK_TASK_PRIORITY                                ( tskIDLE_PRIORITY + 4 )\r
+#define mainSEM_TEST_PRIORITY                          ( tskIDLE_PRIORITY + 1 )\r
+#define mainBLOCK_Q_PRIORITY                           ( tskIDLE_PRIORITY + 2 )\r
+#define mainCOM_TEST_PRIORITY                          ( tskIDLE_PRIORITY + 2 )\r
+#define mainINTEGER_TASK_PRIORITY           ( tskIDLE_PRIORITY )\r
+#define mainGEN_QUEUE_TASK_PRIORITY                    ( tskIDLE_PRIORITY )\r
+\r
+/* The LED controlled by the 'check' task. */\r
+#define mainCHECK_LED                                          ( 7 )\r
+\r
+/* The LED used by the comtest tasks.  mainCOM_TEST_LED + 1 is also used.\r
+See the comtest.c file for more information. */\r
+#define mainCOM_TEST_LED                                       ( 4 )\r
+\r
+/* Baud rate used by the comtest tasks. */\r
+#define mainCOM_TEST_BAUD_RATE                         ( 115200 )\r
+\r
+/* Misc. */\r
+#define mainDONT_WAIT                                          ( 0 )\r
+\r
+/* Dimension the buffer used to hold the value of the maximum jitter time when\r
+it is converted to a string. */\r
+#define mainMAX_STRING_LENGTH                          ( 20 )\r
+\r
+/* The frequency at which the "fast interrupt test" interrupt will occur. */\r
+#define mainTEST_INTERRUPT_FREQUENCY           ( 20000 )\r
+\r
+/* The number of timer clocks we expect to occur between each "fast\r
+interrupt test" interrupt. */\r
+#define mainEXPECTED_CLOCKS_BETWEEN_INTERRUPTS ( ( configCPU_CLOCK_HZ >> 1 ) / mainTEST_INTERRUPT_FREQUENCY )\r
+\r
+/* The number of nano seconds between each core clock. */\r
+#define mainNS_PER_CLOCK ( ( unsigned portLONG ) ( ( 1.0 / ( double ) ( configCPU_CLOCK_HZ >> 1 ) ) * 1000000000.0 ) )\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * Setup the processor ready for the demo.\r
+ */\r
+static void prvSetupHardware( void );\r
+\r
+/*\r
+ * Implements the 'check' task functionality as described at the top of this \r
+ * file. \r
+ */\r
+static void prvCheckTask( void *pvParameters ) __attribute__((noreturn));\r
+\r
+/*\r
+ * Tasks that test the context switch mechanism by filling the processor \r
+ * registers with known values, then checking that the values contained\r
+ * within the registers is as expected.  The tasks are likely to get swapped\r
+ * in and out between setting the register values and checking the register\r
+ * values. */\r
+static void prvTestTask1( void *pvParameters );\r
+static void prvTestTask2( void *pvParameters );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* The queue used to send messages to the LCD task. */\r
+static xQueueHandle xLCDQueue;\r
+\r
+/* Flag used by prvTestTask1() and prvTestTask2() to indicate their status\r
+(pass/fail). */\r
+unsigned portLONG ulStatus1 = pdPASS;\r
+\r
+/* Variables incremented by prvTestTask1() and prvTestTask2() respectively on \r
+each iteration of their function.  This is used to detect either task stopping\r
+their execution.. */\r
+unsigned portLONG ulRegTest1Cycles = 0, ulRegTest2Cycles = 0;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+\r
+/*\r
+ * Create the demo tasks then start the scheduler.\r
+ */\r
+int main( void )\r
+{\r
+       /* Configure any hardware required for this demo. */\r
+       prvSetupHardware();\r
+\r
+       /* Create the LCD task - this returns the queue to use when writing \r
+       messages to the LCD. */\r
+       xLCDQueue = xStartLCDTask();\r
+\r
+       /* Create all the other standard demo tasks. */\r
+       vStartLEDFlashTasks( tskIDLE_PRIORITY );\r
+    vCreateBlockTimeTasks();\r
+    vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
+    vStartIntegerMathTasks( mainINTEGER_TASK_PRIORITY );\r
+    vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );\r
+    vStartQueuePeekTasks();\r
+       vAltStartComTestTasks( mainCOM_TEST_PRIORITY, mainCOM_TEST_BAUD_RATE, mainCOM_TEST_LED );\r
+\r
+       /* Create the tasks defined within this file. */\r
+       xTaskCreate( prvTestTask1, "Tst1", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );\r
+       xTaskCreate( prvTestTask2, "Tst2", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );\r
+\r
+       /* prvCheckTask uses sprintf so requires more stack. */\r
+       xTaskCreate( prvCheckTask, "Check", configMINIMAL_STACK_SIZE * 2, NULL, mainCHECK_TASK_PRIORITY, NULL );\r
+\r
+       /* Setup the high frequency, high priority, timer test. */\r
+       vSetupTimerTest( mainTEST_INTERRUPT_FREQUENCY );\r
+\r
+       /* Finally start the scheduler. */\r
+       vTaskStartScheduler();\r
+\r
+       /* Will only reach here if there is insufficient heap available to start\r
+       the scheduler. */\r
+       return 0;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvTestTask1( void *pvParameters )\r
+{\r
+extern void vRegTest1( unsigned long * );\r
+\r
+       for( ;; )\r
+       {\r
+               /* Perform the register test function. */\r
+               vRegTest1( &ulStatus1 );\r
+\r
+               /* Increment the counter so the check task knows we are still \r
+               running. */\r
+               ulRegTest1Cycles++;\r
+       }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvTestTask2( void *pvParameters )\r
+{\r
+extern void vRegTest2( unsigned long * );\r
+\r
+       for( ;; )\r
+       {\r
+               /* Perform the register test function. */\r
+               vRegTest2( &ulStatus1 );\r
+\r
+               /* Increment the counter so the check task knows we are still\r
+               running. */\r
+               ulRegTest2Cycles++;\r
+       }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvSetupHardware( void )\r
+{\r
+       /* Set the system and peripheral bus speeds and enable the program cache*/\r
+    SYSTEMConfigPerformance( configCPU_CLOCK_HZ );\r
+\r
+       /* Setup to use the external interrupt controller. */\r
+    INTEnableSystemMultiVectoredInt();\r
+\r
+       portDISABLE_INTERRUPTS();\r
+\r
+       /* Setup the digital IO for the LED's. */\r
+       vParTestInitialise();\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvCheckTask( void *pvParameters )\r
+{\r
+unsigned portLONG ulLastRegTest1Value = 0, ulLastRegTest2Value = 0, ulTicksToWait = mainNO_ERROR_PERIOD;\r
+portTickType xLastExecutionTime;\r
+\r
+/* Buffer into which the maximum jitter time is written as a string. */\r
+static portCHAR cStringBuffer[ mainMAX_STRING_LENGTH ];\r
+\r
+/* The maximum jitter time measured by the fast interrupt test. */\r
+extern unsigned portLONG ulMaxJitter ;\r
+xLCDMessage xMessage = { ( 200 / portTICK_RATE_MS ), cStringBuffer };\r
+\r
+       /* Initialise the variable used to control our iteration rate prior to\r
+       its first use. */\r
+       xLastExecutionTime = xTaskGetTickCount();\r
+\r
+       for( ;; )\r
+       {\r
+               /* Wait until it is time to run the tests again. */\r
+               vTaskDelayUntil( &xLastExecutionTime, ulTicksToWait );\r
+\r
+               /* Has either register check 1 or 2 task discovered an error? */\r
+               if( ulStatus1 != pdPASS )\r
+               {\r
+                       ulTicksToWait = mainERROR_PERIOD;\r
+                       xMessage.pcMessage = "Error: Reg test1";\r
+               }\r
+\r
+               /* Check that the register test 1 task is still running. */\r
+               if( ulLastRegTest1Value == ulRegTest1Cycles )\r
+               {\r
+                       ulTicksToWait = mainERROR_PERIOD;\r
+                       xMessage.pcMessage = "Error: Reg test2";\r
+               }\r
+               ulLastRegTest1Value = ulRegTest1Cycles;\r
+\r
+               \r
+               /* Check that the register test 2 task is still running. */\r
+               if( ulLastRegTest2Value == ulRegTest2Cycles )\r
+               {\r
+                       ulTicksToWait = mainERROR_PERIOD;\r
+                       xMessage.pcMessage = "Error: Reg test3";\r
+               }\r
+               ulLastRegTest2Value = ulRegTest2Cycles;\r
+               \r
+\r
+               /* Have any of the standard demo tasks detected an error in their \r
+               operation? */\r
+               if( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
+               {\r
+                       ulTicksToWait = mainERROR_PERIOD;\r
+                       xMessage.pcMessage = "Error: Gen Q";\r
+               }\r
+               else if( xAreQueuePeekTasksStillRunning() != pdTRUE )\r
+               {\r
+                       ulTicksToWait = mainERROR_PERIOD;\r
+                       xMessage.pcMessage = "Error: Q Peek";\r
+               }\r
+               else if( xAreComTestTasksStillRunning() != pdTRUE )\r
+               {\r
+                       ulTicksToWait = mainERROR_PERIOD;\r
+                       xMessage.pcMessage = "Error: COM test";\r
+               }\r
+               else if( xAreBlockTimeTestTasksStillRunning() != pdTRUE )\r
+               {\r
+                       ulTicksToWait = mainERROR_PERIOD;\r
+                       xMessage.pcMessage = "Error: Blck time";\r
+               }\r
+           else if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
+           {\r
+               ulTicksToWait = mainERROR_PERIOD;\r
+                       xMessage.pcMessage = "Error: Sem test";\r
+           }\r
+           else if( xAreIntegerMathsTaskStillRunning() != pdTRUE )\r
+           {\r
+               ulTicksToWait = mainERROR_PERIOD;\r
+                       xMessage.pcMessage = "Error: Int math";\r
+           }\r
+\r
+               /* Write the max jitter time to the string buffer.  It will only be \r
+               displayed if no errors have been detected. */\r
+               sprintf( cStringBuffer, "%dns max jitter", ( int ) ( ( ulMaxJitter - mainEXPECTED_CLOCKS_BETWEEN_INTERRUPTS ) * mainNS_PER_CLOCK ) );\r
+\r
+               xQueueSend( xLCDQueue, &xMessage, mainDONT_WAIT );\r
+               vParTestToggleLED( mainCHECK_LED );\r
+       }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vApplicationGeneralExceptionHandler( unsigned portLONG ulCause, unsigned portLONG ulStatus )\r
+{\r
+       /* This overrides the definition provided by the kernel.  Other exceptions \r
+       should be handled here. */\r
+       for( ;; );\r
+}\r
diff --git a/Demo/PIC32MX_MPLAB/serial/serial.c b/Demo/PIC32MX_MPLAB/serial/serial.c
new file mode 100644 (file)
index 0000000..415c355
--- /dev/null
@@ -0,0 +1,190 @@
+/*\r
+       FreeRTOS.org V4.6.1 - Copyright (C) 2003-2007 Richard Barry.\r
+\r
+       This file is part of the FreeRTOS.org distribution.\r
+\r
+       FreeRTOS.org is free software; you can redistribute it and/or modify\r
+       it under the terms of the GNU General Public License as published by\r
+       the Free Software Foundation; either version 2 of the License, or\r
+       (at your option) any later version.\r
+\r
+       FreeRTOS.org is distributed in the hope that it will be useful,\r
+       but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+       MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
+       GNU General Public License for more details.\r
+\r
+       You should have received a copy of the GNU General Public License\r
+       along with FreeRTOS.org; if not, write to the Free Software\r
+       Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
+\r
+       A special exception to the GPL can be applied should you wish to distribute\r
+       a combined work that includes FreeRTOS.org, without being obliged to provide\r
+       the source code for any proprietary components.  See the licensing section \r
+       of http://www.FreeRTOS.org for full details of how and when the exception\r
+       can be applied.\r
+\r
+       ***************************************************************************\r
+       See http://www.FreeRTOS.org for documentation, latest information, license \r
+       and contact details.  Please ensure to read the configuration and relevant \r
+       port sections of the online documentation.\r
+\r
+       Also see http://www.SafeRTOS.com a version that has been certified for use\r
+       in safety critical systems, plus commercial licensing, development and\r
+       support options.\r
+       ***************************************************************************\r
+*/\r
+\r
+\r
+/* BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER. \r
+\r
+NOTE:  This driver is primarily to test the scheduler functionality.  It does\r
+not effectively use the buffers or DMA and is therefore not intended to be\r
+an example of an efficient driver. */\r
+\r
+/* Standard include file. */\r
+#include <stdlib.h>\r
+#include <plib.h>\r
+\r
+/* Scheduler include files. */\r
+#include "FreeRTOS.h"\r
+#include "queue.h"\r
+#include "task.h"\r
+\r
+/* Demo app include files. */\r
+#include "serial.h"\r
+\r
+/* Hardware setup. */\r
+#define serSET_FLAG                                            ( 1 )\r
+\r
+/* The queues used to communicate between tasks and ISR's. */\r
+static xQueueHandle xRxedChars; \r
+static xQueueHandle xCharsForTx; \r
+\r
+/* Flag used to indicate the tx status. */\r
+static portBASE_TYPE xTxHasEnded;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* The UART interrupt handler. */\r
+void __attribute__( (interrupt(ipl1), vector(_UART2_VECTOR))) vU2InterruptWrapper( void );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )\r
+{\r
+unsigned portSHORT usBRG;\r
+\r
+       /* Create the queues used by the com test task. */\r
+       xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );\r
+       xCharsForTx = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );\r
+\r
+       /* Configure the UART and interrupts. */\r
+       usBRG = (unsigned portSHORT)(( (float)configPERIPHERAL_CLOCK_HZ / ( (float)16 * (float)ulWantedBaud ) ) - (float)0.5);\r
+       OpenUART2( UART_EN, UART_RX_ENABLE | UART_TX_ENABLE | UART_INT_TX | UART_INT_RX_CHAR, usBRG );\r
+       ConfigIntUART2( configKERNEL_INTERRUPT_PRIORITY | UART_INT_SUB_PR0 | UART_TX_INT_EN | UART_RX_INT_EN );\r
+\r
+       xTxHasEnded = pdTRUE;\r
+\r
+       /* Only a single port is implemented so we don't need to return anything. */\r
+       return NULL;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime )\r
+{\r
+       /* Only one port is supported. */\r
+       ( void ) pxPort;\r
+\r
+       /* Get the next character from the buffer.  Return false if no characters\r
+       are available or arrive before xBlockTime expires. */\r
+       if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )\r
+       {\r
+               return pdTRUE;\r
+       }\r
+       else\r
+       {\r
+               return pdFALSE;\r
+       }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )\r
+{\r
+       /* Only one port is supported. */\r
+       ( void ) pxPort;\r
+\r
+       /* Return false if after the block time there is no room on the Tx queue. */\r
+       if( xQueueSend( xCharsForTx, &cOutChar, xBlockTime ) != pdPASS )\r
+       {\r
+               return pdFAIL;\r
+       }\r
+\r
+       /* A critical section should not be required as xTxHasEnded will not be\r
+       written to by the ISR if it is already 0 (is this correct?). */\r
+       if( xTxHasEnded )\r
+       {\r
+               xTxHasEnded = pdFALSE;\r
+               IFS1bits.U2TXIF = serSET_FLAG;\r
+       }\r
+\r
+       return pdPASS;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vSerialClose( xComPortHandle xPort )\r
+{\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vU2InterruptHandler( void )\r
+{\r
+/* Declared static to minimise stack use. */\r
+static portCHAR cChar;\r
+static portBASE_TYPE xYieldRequired;\r
+\r
+       xYieldRequired = pdFALSE;\r
+\r
+       /* Are any Rx interrupts pending? */\r
+       if( mU2RXGetIntFlag() )\r
+       {\r
+               while( U2STAbits.URXDA )\r
+               {\r
+                       /* Retrieve the received character and place it in the queue of\r
+                       received characters. */\r
+                       cChar = U2RXREG;\r
+                       xYieldRequired = xQueueSendFromISR( xRxedChars, &cChar, xYieldRequired );\r
+               }\r
+               mU2RXClearIntFlag();\r
+       }\r
+\r
+       /* Are any Tx interrupts pending? */\r
+       if( mU2TXGetIntFlag() )\r
+       {\r
+               while( !( U2STAbits.UTXBF ) )\r
+               {\r
+                       if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xYieldRequired ) == pdTRUE )\r
+                       {\r
+                               /* Send the next character queued for Tx. */\r
+                               U2TXREG = cChar;\r
+                       }\r
+                       else\r
+                       {\r
+                               /* Queue empty, nothing to send. */\r
+                               xTxHasEnded = pdTRUE;\r
+                               break;\r
+                       }\r
+               }\r
+\r
+               mU2TXClearIntFlag();\r
+       }\r
+\r
+       /* If sending or receiving necessitates a context switch, then switch now. */\r
+       portEND_SWITCHING_ISR( xYieldRequired );\r
+}\r
+\r
+\r
+\r
+\r
+\r
+\r
+\r
diff --git a/Demo/PIC32MX_MPLAB/serial/serial_isr.S b/Demo/PIC32MX_MPLAB/serial/serial_isr.S
new file mode 100644 (file)
index 0000000..15c9773
--- /dev/null
@@ -0,0 +1,24 @@
+#include <p32xxxx.h>\r
+#include <sys/asm.h>\r
+#include "ISR_Support.h"\r
+\r
+       .set    nomips16\r
+       .set    noreorder\r
+       \r
+       .extern vU2InterruptHandler\r
+       .extern xISRStackTop\r
+       .global vU2InterruptWrapper\r
+\r
+       .set            noreorder\r
+       .set            noat\r
+       .ent            vU2InterruptWrapper\r
+\r
+vU2InterruptWrapper:\r
+\r
+       portSAVE_CONTEXT\r
+       jal vU2InterruptHandler\r
+       nop\r
+       portRESTORE_CONTEXT\r
+\r
+       .end            vU2InterruptWrapper\r
+\r
diff --git a/Demo/PIC32MX_MPLAB/timertest.c b/Demo/PIC32MX_MPLAB/timertest.c
new file mode 100644 (file)
index 0000000..831c3fc
--- /dev/null
@@ -0,0 +1,125 @@
+/*\r
+       FreeRTOS.org V4.6.1 - Copyright (C) 2003-2007 Richard Barry.\r
+\r
+       This file is part of the FreeRTOS.org distribution.\r
+\r
+       FreeRTOS.org is free software; you can redistribute it and/or modify\r
+       it under the terms of the GNU General Public License as published by\r
+       the Free Software Foundation; either version 2 of the License, or\r
+       (at your option) any later version.\r
+\r
+       FreeRTOS.org is distributed in the hope that it will be useful,\r
+       but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+       MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
+       GNU General Public License for more details.\r
+\r
+       You should have received a copy of the GNU General Public License\r
+       along with FreeRTOS.org; if not, write to the Free Software\r
+       Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
+\r
+       A special exception to the GPL can be applied should you wish to distribute\r
+       a combined work that includes FreeRTOS.org, without being obliged to provide\r
+       the source code for any proprietary components.  See the licensing section \r
+       of http://www.FreeRTOS.org for full details of how and when the exception\r
+       can be applied.\r
+\r
+       ***************************************************************************\r
+       See http://www.FreeRTOS.org for documentation, latest information, license \r
+       and contact details.  Please ensure to read the configuration and relevant \r
+       port sections of the online documentation.\r
+\r
+       Also see http://www.SafeRTOS.com a version that has been certified for use\r
+       in safety critical systems, plus commercial licensing, development and\r
+       support options.\r
+       ***************************************************************************\r
+*/\r
+\r
+/* High speed timer test as described in main.c. */\r
+\r
+\r
+/* Scheduler includes. */\r
+#include "FreeRTOS.h"\r
+\r
+/* Demo includes. */\r
+#include "partest.h"\r
+\r
+/* The number of interrupts to pass before we start looking at the jitter. */\r
+#define timerSETTLE_TIME                       200\r
+\r
+/* The maximum value the 16bit timer can contain. */\r
+#define timerMAX_COUNT                         0xffff\r
+\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* The maximum time (in processor clocks) between two consecutive timer\r
+interrupts so far. */\r
+unsigned portLONG ulMaxJitter = 0;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+void vSetupTimerTest( unsigned portSHORT usFrequencyHz )\r
+{\r
+       /* T2 is used to generate interrupts.  The core timer is used to provide an \r
+       accurate time measurement. */\r
+       T2CON = 0;\r
+       TMR2 = 0;\r
+\r
+       /* Timer 2 is going to interrupt at usFrequencyHz Hz. */\r
+       PR2 = ( unsigned portSHORT ) ( configPERIPHERAL_CLOCK_HZ / ( unsigned portLONG ) usFrequencyHz );\r
+\r
+       /* Setup timer 2 interrupt priority to be above the kernel priority so \r
+       the timer jitter is not effected by the kernel activity. */\r
+       ConfigIntTimer2( T2_INT_ON | ( configKERNEL_INTERRUPT_PRIORITY + 1 ) );\r
+\r
+       /* Clear the interrupt as a starting condition. */\r
+       IFS0bits.T2IF = 0;\r
+\r
+       /* Enable the interrupt. */\r
+       IEC0bits.T2IE = 1;\r
+\r
+       /* Start the timer. */\r
+       T2CONbits.TON = 1;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void __attribute__( (interrupt(ipl0), vector(_TIMER_2_VECTOR))) vT2InterruptHandler( void );\r
+void vT2InterruptHandler( void )\r
+{\r
+static unsigned portLONG ulLastCount = 0, ulSettleCount = 0;\r
+static unsigned portLONG ulThisCount, ulDifference;\r
+\r
+       /* Capture the timer value as we enter the interrupt. */\r
+       ulThisCount = _CP0_GET_COUNT();\r
+\r
+       if( ulSettleCount >= timerSETTLE_TIME )\r
+       {\r
+               /* What is the difference between the timer value in this interrupt\r
+               and the value from the last interrupt. */\r
+               ulDifference = ulThisCount - ulLastCount;\r
+\r
+               /* Store the difference in the timer values if it is larger than the\r
+               currently stored largest value.  The difference over and above the \r
+               expected difference will give the 'jitter' in the processing of these\r
+               interrupts. */\r
+               if( ulDifference > ulMaxJitter )\r
+               {\r
+                       ulMaxJitter = ulDifference;\r
+               }\r
+       }\r
+       else\r
+       {\r
+               /* Don't bother storing any values for the first couple of \r
+               interrupts. */\r
+               ulSettleCount++;\r
+       }\r
+\r
+       /* Remember what the timer value was this time through, so we can calculate\r
+       the difference the next time through. */\r
+       ulLastCount = ulThisCount;\r
+\r
+       /* Clear the timer interrupt. */\r
+       IFS0bits.T2IF = 0;\r
+}\r
+\r
+\r
diff --git a/Demo/PIC32MX_MPLAB/timertest.h b/Demo/PIC32MX_MPLAB/timertest.h
new file mode 100644 (file)
index 0000000..e5481f2
--- /dev/null
@@ -0,0 +1,46 @@
+/*\r
+       FreeRTOS.org V4.6.1 - Copyright (C) 2003-2007 Richard Barry.\r
+\r
+       This file is part of the FreeRTOS.org distribution.\r
+\r
+       FreeRTOS.org is free software; you can redistribute it and/or modify\r
+       it under the terms of the GNU General Public License as published by\r
+       the Free Software Foundation; either version 2 of the License, or\r
+       (at your option) any later version.\r
+\r
+       FreeRTOS.org is distributed in the hope that it will be useful,\r
+       but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+       MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
+       GNU General Public License for more details.\r
+\r
+       You should have received a copy of the GNU General Public License\r
+       along with FreeRTOS.org; if not, write to the Free Software\r
+       Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
+\r
+       A special exception to the GPL can be applied should you wish to distribute\r
+       a combined work that includes FreeRTOS.org, without being obliged to provide\r
+       the source code for any proprietary components.  See the licensing section \r
+       of http://www.FreeRTOS.org for full details of how and when the exception\r
+       can be applied.\r
+\r
+       ***************************************************************************\r
+       See http://www.FreeRTOS.org for documentation, latest information, license \r
+       and contact details.  Please ensure to read the configuration and relevant \r
+       port sections of the online documentation.\r
+\r
+       Also see http://www.SafeRTOS.com a version that has been certified for use\r
+       in safety critical systems, plus commercial licensing, development and\r
+       support options.\r
+       ***************************************************************************\r
+*/\r
+\r
+#ifndef TIMER_TEST_H\r
+#define TIMER_TEST_H\r
+\r
+/* Setup the high frequency timer interrupt. */\r
+void vSetupTimerTest( unsigned portSHORT usFrequencyHz );\r
+\r
+#endif /* TIMER_TEST_H */\r
+\r
+\r
+\r