Report correct core instruction state for ARMv/A targets

git-svn-id: svn://svn.berlios.de/openocd/trunk@2678 b42882b7-edfa-0310-969c-e2dbd0fdcd60

diff --git a/src/target/armv7a.c b/src/target/armv7a.c
index 3eb0f3ed355949c9bf7de90c4028f56a8b48e769..cebf79da76f48e1fb0855757c9cd4593aa84e99d 100644 (file)
--- a/src/target/armv7a.c
+++ b/src/target/armv7a.c
@@ -192,7 +192,7 @@ int armv7a_arch_state(struct target_s *target)
        LOG_USER("target halted in %s state due to %s, current mode: %s\n"
                         "%s: 0x%8.8" PRIx32 " pc: 0x%8.8" PRIx32 "\n"
                         "MMU: %s, D-Cache: %s, I-Cache: %s",
-                armv7a_state_strings[armv4_5->core_state],
+                armv7a_state_strings[armv7a->core_state],
                 Jim_Nvp_value2name_simple(nvp_target_debug_reason,
                                target->debug_reason)->name,
                 armv7a_mode_strings[