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- <option id="xilinx.gnu.c.link.option.ldflags.1590675094" superClass="xilinx.gnu.c.link.option.ldflags" value="" valueType="string"/>\r
+ <option id="xilinx.gnu.c.link.option.ldflags.1590675094" name="Linker Flags" superClass="xilinx.gnu.c.link.option.ldflags" value="" valueType="string"/>\r
<inputType id="xilinx.gnu.linker.input.384537517" superClass="xilinx.gnu.linker.input">\r
<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>\r
<additionalInput kind="additionalinput" paths="$(LIBS)"/>\r
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</tool>\r
<tool id="xilinx.gnu.mb.size.debug.778946449" name="MicroBlaze Print Size" superClass="xilinx.gnu.mb.size.debug"/>\r
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</tool>\r
<tool id="xilinx.gnu.mb.size.debug.536351174" name="MicroBlaze Print Size" superClass="xilinx.gnu.mb.size.debug"/>\r
<tool id="xilinx.elfcheck.mb.debug.1281142255" name="Xilinx ELF Check" superClass="xilinx.elfcheck.mb.debug">\r
#include <string.h>\r
\r
/* Hardware includes. */\r
-#include <xparameters.h>\r
-#include <xintc.h>\r
#include <xintc_i.h>\r
-#include <xtmrctr.h>\r
#include <xil_exception.h>\r
-#include <mb_interface.h>\r
+#include <microblaze_exceptions_i.h>\r
+#include <microblaze_exceptions_g.h>\r
\r
/* Tasks are started with a critical section nesting of 0 - however prior\r
to the scheduler being commenced we don't want the critical nesting level\r
*/\r
static portBASE_TYPE prvInitialiseInterruptController( void );\r
\r
+static void prvExceptionHandler( void *pvExceptionID );\r
+\r
/*\r
* Call an application provided callback to set up the periodic interrupt used\r
* for the RTOS tick. Using an application callback allows the application\r
}\r
/*-----------------------------------------------------------*/\r
\r
+static void prvExceptionHandler( void *pvExceptionID )\r
+{\r
+volatile unsigned long ulExceptionID;\r
+\r
+ ulExceptionID = ( unsigned long ) pvExceptionID;\r
+ for( ;; )\r
+ {\r
+ portNOP();\r
+ }\r
+\r
+ ( void ) ulExceptionID;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
static portBASE_TYPE prvInitialiseInterruptController( void )\r
{\r
portBASE_TYPE xStatus;\r
/* Service all pending interrupts each time the handler is entered. */\r
XIntc_SetIntrSvcOption( xInterruptControllerInstance.BaseAddress, XIN_SVC_ALL_ISRS_OPTION );\r
\r
+ /* Install exception handlers. */\r
+ #if MICROBLAZE_EXCEPTIONS_ENABLED == 1\r
+\r
+ #if XPAR_MICROBLAZE_0_UNALIGNED_EXCEPTIONS == 1\r
+ microblaze_register_exception_handler( XEXC_ID_UNALIGNED_ACCESS, prvExceptionHandler, ( void * ) XEXC_ID_UNALIGNED_ACCESS );\r
+ #endif /* XPAR_MICROBLAZE_0_UNALIGNED_EXCEPTIONS*/\r
+\r
+ #if XPAR_MICROBLAZE_0_ILL_OPCODE_EXCEPTION == 1\r
+ microblaze_register_exception_handler( XEXC_ID_ILLEGAL_OPCODE, prvExceptionHandler, ( void * ) XEXC_ID_ILLEGAL_OPCODE );\r
+ #endif /* XPAR_MICROBLAZE_0_ILL_OPCODE_EXCEPTION*/\r
+\r
+ #if XPAR_MICROBLAZE_0_M_AXI_I_BUS_EXCEPTION == 1\r
+ microblaze_register_exception_handler( XEXC_ID_M_AXI_I_EXCEPTION, prvExceptionHandler, ( void * ) XEXC_ID_M_AXI_I_EXCEPTION );\r
+ #endif /* XPAR_MICROBLAZE_0_M_AXI_I_BUS_EXCEPTION*/\r
+\r
+ #if XPAR_MICROBLAZE_0_M_AXI_D_BUS_EXCEPTION == 1\r
+ microblaze_register_exception_handler( XEXC_ID_M_AXI_D_EXCEPTION, prvExceptionHandler, ( void * ) XEXC_ID_M_AXI_D_EXCEPTION );\r
+ #endif /* XPAR_MICROBLAZE_0_M_AXI_D_BUS_EXCEPTION*/\r
+\r
+ #if XPAR_MICROBLAZE_0_IPLB_BUS_EXCEPTION == 1\r
+ microblaze_register_exception_handler( XEXC_ID_IPLB_EXCEPTION, prvExceptionHandler, ( void * ) XEXC_ID_IPLB_EXCEPTION );\r
+ #endif /* XPAR_MICROBLAZE_0_IPLB_BUS_EXCEPTION*/\r
+\r
+ #if XPAR_MICROBLAZE_0_DPLB_BUS_EXCEPTION == 1\r
+ microblaze_register_exception_handler( XEXC_ID_DPLB_EXCEPTION, prvExceptionHandler, ( void * ) XEXC_ID_DPLB_EXCEPTION );\r
+ #endif /* XPAR_MICROBLAZE_0_DPLB_BUS_EXCEPTION*/\r
+\r
+ #if XPAR_MICROBLAZE_0_DIV_ZERO_EXCEPTION == 1\r
+ microblaze_register_exception_handler( XEXC_ID_DIV_BY_ZERO, prvExceptionHandler, ( void * ) XEXC_ID_DIV_BY_ZERO );\r
+ #endif /* XPAR_MICROBLAZE_0_DIV_ZERO_EXCEPTION*/\r
+\r
+ #if XPAR_MICROBLAZE_0_FPU_EXCEPTION == 1\r
+ microblaze_register_exception_handler( XEXC_ID_FPU, prvExceptionHandler, ( void * ) XEXC_ID_FPU );\r
+ #endif /* XPAR_MICROBLAZE_0_FPU_EXCEPTION*/\r
+\r
+ #if XPAR_MICROBLAZE_0_FSL_EXCEPTION == 1\r
+ microblaze_register_exception_handler( XEXC_ID_FSL, prvExceptionHandler, ( void * ) XEXC_ID_FSL );\r
+ #endif /* XPAR_MICROBLAZE_0_FSL_EXCEPTION*/\r
+\r
+ #endif /* MICROBLAZE_EXCEPTIONS_ENABLED */\r
+\r
/* Start the interrupt controller. Interrupts are enabled when the\r
scheduler starts. */\r
xStatus = XIntc_Start( &xInterruptControllerInstance, XIN_REAL_MODE );\r
\r
configASSERT( ( xStatus == ( portBASE_TYPE ) XST_SUCCESS ) )\r
\r
+/*_RB_ Exception test code.\r
+__asm volatile (\r
+ "bralid r15, 1234 \n"\r
+ "or r0, r0, r0 \n"\r
+ );\r
+*/\r
+\r
return xStatus;\r
}\r
-\r
-\r
+/*-----------------------------------------------------------*/\r
\r
\r