some more changes -- atarixl target basically works now

diff --git a/libsrc/atari/crt0.s b/libsrc/atari/crt0.s
index dfaa626fa80b4ad0636c168a312f4573e6696803..d8578d4ac75344b83ad6ff3c82659959a8709269 100644 (file)
--- a/libsrc/atari/crt0.s
+++ b/libsrc/atari/crt0.s
@@ -13,8 +13,12 @@
 
         .import         initlib, donelib
         .import         callmain, zerobss
-        .import         __STARTUP_LOAD__, __ZPSAVE_LOAD__
+        .import         __STARTUP_LOAD__, __ZPSAVE_LOAD__, __BSS_LOAD__
         .import         __RESERVED_MEMORY__
+       .import         __RAM_START__, __RAM_SIZE__
+       .import         zpsave
+       .import         sram_init
+
 
         .include        "zeropage.inc"
         .include        "atari.inc"
@@ -32,7 +36,11 @@
 .endif
 
         .word   __STARTUP_LOAD__
+.if .defined(__ATARIXL__)
+        .word   __BSS_LOAD__ - 1
+.else
         .word   __ZPSAVE_LOAD__ - 1
+.endif
 
 ; ------------------------------------------------------------------------
 ; Actual code
@@ -46,6 +54,8 @@
 
 ; Real entry point:
 
+.if .not .defined(__ATARIXL__)         ; already done in previous load chunk
+
 ; Save the zero page locations we need
 
         ldx     #zpspace-1
@@ -54,6 +64,12 @@ L1:     lda     sp,x
         dex
         bpl     L1
 
+.else
+
+       jsr     sram_init
+
+.endif
+
 ; Clear the BSS data
 
         jsr     zerobss
@@ -84,16 +100,17 @@ L1:     lda     sp,x
 
 .else
 
-       ; for now... needs to use value from linker script later
-        lda     MEMTOP
-        sta     sp
-        lda     MEMTOP+1
-        sta     sp+1
+       lda     #<(__RAM_START__ + __RAM_SIZE__ - 1)
+       sta     sp
+       lda     #>(__RAM_START__ + __RAM_SIZE__ - 1)
+       sta     sp+1
 
 .endif
 
 ; Call module constructors
 
+;      brk
+
         jsr     initlib
 
 ; Set left margin to 0
@@ -184,12 +201,6 @@ L2:     lda     zpsave,x
 
 ; ------------------------------------------------------------------------
 
-.segment        "ZPSAVE"
-
-zpsave: .res    zpspace
-
-; ------------------------------------------------------------------------
-
 .bss
 
 spsave:         .res    1

diff --git a/libsrc/atari/shadow_ram_prepare.s b/libsrc/atari/shadow_ram_prepare.s
index 2fc8ffbc3aa45b82b0152f44b9d9784bad31713e..60de9dbf16c45c7398c4f6648869b454a232f122 100644 (file)
--- a/libsrc/atari/shadow_ram_prepare.s
+++ b/libsrc/atari/shadow_ram_prepare.s
@@ -3,6 +3,7 @@
 ;
 ; Tasks:
 ; - move screen memory below load address
+; - copy ROM chargen to its new place
 ; - copy shadow RAM contents to their destination
 ;
 ; Christian Groessler, chris@groessler.org, 2013
@@ -13,8 +14,10 @@
        .export         sramprep
         .import         __SRPREP_LOAD__, __SRPREP_SIZE__
        .import         __SHADOW_RAM_LOAD__, __SHADOW_RAM_SIZE__
-       .import         __CHARGEN_LOAD__, __CHARGEN_SIZE__
+       .import         __SHADOW_RAM_RUN__
+       .import         __CHARGEN_START__, __CHARGEN_SIZE__
        .import         __SAVEAREA_LOAD__
+       .import         zpsave
 
         .include        "zeropage.inc"
         .include        "atari.inc"
@@ -35,7 +38,7 @@ cont: ldx     #0              ; channel 0
        sta     ICBLH,x
        lda     #PUTCHR
        sta     ICCOM,x
-       jsr     CIOV
+       jsr     CIOV_org
 .endmacro
 
 ; ------------------------------------------------------------------------
@@ -55,6 +58,7 @@ sramprep:
        print_string "in sramprep"
 
 ; save values of modified system variables and ports
+
        lda     RAMTOP
        sta     RAMTOP_save
        lda     MEMTOP
@@ -67,6 +71,31 @@ sramprep:
        sta     APPMHI_save+1
        lda     PORTB
        sta     PORTB_save
+       lda     CIOV            ; zero-page wrapper
+       sta     ZP_CIOV_save
+       lda     CIOV+1
+       sta     ZP_CIOV_save+1
+       lda     CIOV+2
+       sta     ZP_CIOV_save+2
+       lda     SIOV            ; zero-page wrapper
+       sta     ZP_SIOV_save
+       lda     SIOV+1
+       sta     ZP_SIOV_save+1
+       lda     SIOV+2
+       sta     ZP_SIOV_save+2
+
+       lda     $fffe
+       sta     IRQ_save
+       lda     $ffff
+       sta     IRQ_save+1
+       lda     $fffc
+       sta     RESET_save
+       lda     $fffd
+       sta     RESET_save+1
+       lda     $fffa
+       sta     NMI_save
+       lda     $fffb
+       sta     NMI_save+1
 
 ; disable BASIC
 
@@ -75,7 +104,7 @@ sramprep:
        sta     PORTB
 
 
-; ... change memory bla
+; ... change system memory variables bla
 
 CMPVAL = 64+255+992            ; you may ask, why these values...   @@@ document
 
@@ -91,10 +120,10 @@ sys_ok:    lda     #<__SAVEAREA_LOAD__
 
        lda     #>__SAVEAREA_LOAD__ - 1
        sta     RAMTOP
-       
-       
 
-; ... issue ar GRAPHICS 0 call (copied'n'pasted from TGI drivers)
+
+
+; ... issue a GRAPHICS 0 call (copied'n'pasted from TGI drivers)
 
 
        ldx     #$50            ; take any IOCB, hopefully free (@@@ fixme)
@@ -114,7 +143,7 @@ sys_ok:     lda     #<__SAVEAREA_LOAD__
         sta     ICBLL,x
         lda     #>screen_device_length
         sta     ICBLH,x
-        jsr     CIOV
+        jsr     CIOV_org
        bpl     okoko
 
        print_string "GR 0 FAILED"
@@ -122,7 +151,8 @@ sys_ok:     lda     #<__SAVEAREA_LOAD__
        jsr     delay
        jsr     delay
 
-       jmp xxx
+       jmp     (DOSVEC)                ; abort loading
+
 
 okoko:
 
@@ -130,23 +160,146 @@ okoko:
         ; Now close it again; we don't need it anymore :)
         lda     #CLOSE
         sta     ICCOM,x
-        jsr     CIOV
+        jsr     CIOV_org
 
        print_string "GR 0 OKOKO"
        jsr     delay
 
 
+; Save the zero page locations we need
+
+        ldx     #zpspace-1
+L1:     lda     sp,x
+        sta     zpsave,x
+        dex
+        bpl     L1
+
+; copy chargen to low memory
+
+       lda     #>(__SRPREP_LOAD__ + __SRPREP_SIZE__)
+       sta     ptr3+1
+       lda     #<(__SRPREP_LOAD__ + __SRPREP_SIZE__)
+       sta     ptr3
+       beq     cg_addr_ok
+
+       ; page align the new chargen address
+       inc     ptr3+1
+       lda     #0
+       sta     ptr3
+
+cg_addr_ok:
+       lda     #<DCSORG
+       sta     ptr1
+       lda     #>DCSORG
+       sta     ptr1+1
+       lda     ptr3
+       sta     ptr2
+       lda     ptr3+1
+       sta     ptr2+1
+       lda     #>__CHARGEN_SIZE__
+       sta     tmp2
+       lda     #<__CHARGEN_SIZE__
+       sta     tmp2+1
+       jsr     memcopy
+
+; TODO: switch to this temp. chargen
+
+; disable ROMs
+       sei
+       ldx     #0
+       stx     NMIEN           ; disable NMI
+       lda     PORTB
+       and     #$fe
+       sta     PORTB           ; now ROM is mapped out
+
+; copy shadow RAM contents to their destination
+
+       lda     #<__SHADOW_RAM_SIZE__
+       bne     do_copy
+       lda     #>__SHADOW_RAM_SIZE__
+       beq     no_copy                         ; we have no shadow RAM contents
+
+       ; ptr1 - src; ptr2 - dest; tmp1, tmp2 - len
+do_copy:lda    #<__SHADOW_RAM_LOAD__
+       sta     ptr1
+       lda     #>__SHADOW_RAM_LOAD__
+       sta     ptr1+1
+       lda     #<__SHADOW_RAM_RUN__
+       sta     ptr2
+       lda     #>__SHADOW_RAM_RUN__
+       sta     ptr2+1
+       lda     #<__SHADOW_RAM_SIZE__
+       sta     tmp1
+       lda     #>__SHADOW_RAM_SIZE__
+       sta     tmp2
+
+       jsr     memcopy
+
+no_copy:
+
+; copy chargen to its new location
+
+       lda     ptr3
+       sta     ptr1
+       lda     ptr3+1
+       sta     ptr1+1
+       lda     #<__CHARGEN_START__
+       sta     ptr2
+       lda     #>__CHARGEN_START__
+       sta     ptr2+1
+       lda     #>__CHARGEN_SIZE__
+       sta     tmp2
+       lda     #<__CHARGEN_SIZE__
+       sta     tmp2+1
+       jsr     memcopy
+
+; re-enable ROM
+
+       lda     PORTB
+       ora     #1
+       sta     PORTB
+       lda     #$40
+       sta     NMIEN                   ; enable VB again
+       cli                             ; and enable IRQs
+
+        rts
 
 
+; my 6502 fu is rusty, so I took a routine from the internet (http://www.obelisk.demon.co.uk/6502/algorithms.html)
 
+; copy memory
+; ptr1      - source
+; ptr2      - destination
+; tmp2:tmp1 - len
 
-xxx:
+.proc  memcopy
 
+       ldy     #0
+       ldx     tmp2
+       beq     last
+pagecp:        lda     (ptr1),y
+       sta     (ptr2),y
+       iny
+       bne     pagecp
+       inc     ptr1+1
+       inc     ptr2+1
+       dex
+       bne     pagecp
+last:  cpy     tmp1
+       beq     done
+       lda     (ptr1),y
+       sta     (ptr2),y
+       iny
+       bne     last
+done:  rts
 
+.endproc
 
 
+.byte "HERE ****************** HERE ***************>>>>>>"
 
-        rts
+sramsize:
+       .word   __SHADOW_RAM_SIZE__
 
 ; short delay
 .proc  delay
@@ -173,6 +326,13 @@ screen_device_length = * - screen_device
 
        .byte   " ** srprep ** end-->"
 
+; ------------------------------------------------------------------------
+; Provide an empty SHADOW_RAM segment in order that the linker is happy
+; if the user program doesn't have a SHADOW_RAM segment.
+
+.segment        "SHADOW_RAM"
+
+
 ; ------------------------------------------------------------------------
 ; Chunk "trailer" - sets INITAD