tcl: remove silly ocd_ prefix to array2mem and mem2array

ocd_ prefix is used internally in OpenOCD as a kludge more
or less to deal with the two kinds of commands that OpenOCD
has.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>

diff --git a/doc/openocd.texi b/doc/openocd.texi
index 0e57c1afeea80b5e8abac71b9df99d17110671c5..3cf5bfeebf68e57279c50b690b3a28b4dbcb5923 100644 (file)
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -7209,10 +7209,10 @@ Low-level commands are (should be) prefixed with "ocd_", e.g.
 is the low level API upon which @command{flash banks} is implemented.
 
 @itemize @bullet
-@item @b{ocd_mem2array} <@var{varname}> <@var{width}> <@var{addr}> <@var{nelems}>
+@item @b{mem2array} <@var{varname}> <@var{width}> <@var{addr}> <@var{nelems}>
 
 Read memory and return as a Tcl array for script processing
-@item @b{ocd_array2mem} <@var{varname}> <@var{width}> <@var{addr}> <@var{nelems}>
+@item @b{array2mem} <@var{varname}> <@var{width}> <@var{addr}> <@var{nelems}>
 
 Convert a Tcl array to memory locations and write the values
 @item @b{ocd_flash_banks} <@var{driver}> <@var{base}> <@var{size}> <@var{chip_width}> <@var{bus_width}> <@var{target}> [@option{driver options} ...]

diff --git a/src/target/target.c b/src/target/target.c
index d7607e3a4710e9bfd85cd0353e67267909467301..16caea5fc9a04c37a38106bf0c7b7905de185ea3 100644 (file)
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -5296,7 +5296,7 @@ static const struct command_registration target_exec_command_handlers[] = {
                .usage = "filename [offset [type]]",
        },
        {
-               .name = "ocd_mem2array",
+               .name = "mem2array",
                .mode = COMMAND_EXEC,
                .jim_handler = jim_mem2array,
                .help = "read 8/16/32 bit memory and return as a TCL array "
@@ -5304,7 +5304,7 @@ static const struct command_registration target_exec_command_handlers[] = {
                .usage = "arrayname bitwidth address count",
        },
        {
-               .name = "ocd_array2mem",
+               .name = "array2mem",
                .mode = COMMAND_EXEC,
                .jim_handler = jim_array2mem,
                .help = "convert a TCL array to memory locations "

diff --git a/tcl/board/at91cap7a-stk-sdram.cfg b/tcl/board/at91cap7a-stk-sdram.cfg
index 6a7e22b278f6ac116368546b79a33f9f9f4c0a3e..cca12119cb1077f42149b0b69427237e82e9e9fc 100644 (file)
--- a/tcl/board/at91cap7a-stk-sdram.cfg
+++ b/tcl/board/at91cap7a-stk-sdram.cfg
@@ -32,7 +32,7 @@ $_TARGETNAME configure -event reset-start {
 }
 
 proc peek32 {address} {
-       ocd_mem2array t 32 $address 1
+       mem2array t 32 $address 1
        return $t(0)
 }
 

diff --git a/tcl/board/at91sam9g20-ek.cfg b/tcl/board/at91sam9g20-ek.cfg
index b50e8c863d97a7e8195f362d34f744fce3ad60a8..15a9caf2889c5cadb9f0d22e6c50263b8c0bc9cb 100644 (file)
--- a/tcl/board/at91sam9g20-ek.cfg
+++ b/tcl/board/at91sam9g20-ek.cfg
@@ -67,7 +67,7 @@ at91sam9 ce 0 0xfffff800 14
 
 proc read_register {register} {
         set result ""
-        ocd_mem2array result 32 $register 1
+        mem2array result 32 $register 1
         return $result(0)
 }
 

diff --git a/tcl/chip/atmel/at91/aic.tcl b/tcl/chip/atmel/at91/aic.tcl
index 8c276aa5b9160f53d53cb1a2f6b437236e61c9cc..366be6d07fdf42a3e5498740e4e671d95d80d724 100644 (file)
--- a/tcl/chip/atmel/at91/aic.tcl
+++ b/tcl/chip/atmel/at91/aic.tcl
@@ -54,7 +54,7 @@ proc show_AIC_IMR_helper { NAME ADDR VAL } {
 
 proc show_AIC { } {
     global AIC_SMR
-    if [catch { ocd_mem2array aaa 32 $AIC_SMR [expr 32 * 4] } msg ] {
+    if [catch { mem2array aaa 32 $AIC_SMR [expr 32 * 4] } msg ] {
        error [format "%s (%s)" $msg AIC_SMR]
     }
     puts "AIC_SMR: Mode & Type"
@@ -71,7 +71,7 @@ proc show_AIC { } {
        incr x
     }
     global AIC_SVR
-    if [catch { ocd_mem2array aaa 32 $AIC_SVR [expr 32 * 4] } msg ] {
+    if [catch { mem2array aaa 32 $AIC_SVR [expr 32 * 4] } msg ] {
        error [format "%s (%s)" $msg AIC_SVR]
     }
     puts "AIC_SVR: Vectors"

diff --git a/tcl/memory.tcl b/tcl/memory.tcl
index c4418fa1bed5ef4dc5659b4588305a96b13f3ccc..2719d3feccfe34f666fa93170d7b479a0ddf5d99 100644 (file)
--- a/tcl/memory.tcl
+++ b/tcl/memory.tcl
@@ -80,7 +80,7 @@ proc address_info { ADDRESS } {
 
 proc memread32 {ADDR} {
     set foo(0) 0
-    if ![ catch { ocd_mem2array foo 32 $ADDR 1  } msg ] {
+    if ![ catch { mem2array foo 32 $ADDR 1  } msg ] {
        return $foo(0)
     } else {
        error "memread32: $msg"
@@ -89,7 +89,7 @@ proc memread32 {ADDR} {
 
 proc memread16 {ADDR} {
     set foo(0) 0
-    if ![ catch { ocd_mem2array foo 16 $ADDR 1  } msg ] {
+    if ![ catch { mem2array foo 16 $ADDR 1  } msg ] {
        return $foo(0)
     } else {
        error "memread16: $msg"
@@ -98,7 +98,7 @@ proc memread16 {ADDR} {
 
 proc memread8 {ADDR} {
     set foo(0) 0
-    if ![ catch { ocd_mem2array foo 8 $ADDR 1  } msg ] {
+    if ![ catch { mem2array foo 8 $ADDR 1  } msg ] {
        return $foo(0)
     } else {
        error "memread8: $msg"
@@ -107,7 +107,7 @@ proc memread8 {ADDR} {
 
 proc memwrite32 {ADDR DATA} {
     set foo(0) $DATA
-    if ![ catch { ocd_array2mem foo 32 $ADDR 1  } msg ] {
+    if ![ catch { array2mem foo 32 $ADDR 1  } msg ] {
        return $foo(0)
     } else {
        error "memwrite32: $msg"
@@ -116,7 +116,7 @@ proc memwrite32 {ADDR DATA} {
 
 proc memwrite16 {ADDR DATA} {
     set foo(0) $DATA
-    if ![ catch { ocd_array2mem foo 16 $ADDR 1  } msg ] {
+    if ![ catch { array2mem foo 16 $ADDR 1  } msg ] {
        return $foo(0)
     } else {
        error "memwrite16: $msg"
@@ -125,7 +125,7 @@ proc memwrite16 {ADDR DATA} {
 
 proc memwrite8 {ADDR DATA} {
     set foo(0) $DATA
-    if ![ catch { ocd_array2mem foo 8 $ADDR 1  } msg ] {
+    if ![ catch { array2mem foo 8 $ADDR 1  } msg ] {
        return $foo(0)
     } else {
        error "memwrite8: $msg"

diff --git a/tcl/target/c100helper.tcl b/tcl/target/c100helper.tcl
index 2a12c362218279de9d68c4e1266907b905fe75d9..45adc62c6a6e02c8448de4495d45ba8ab98f32d1 100644 (file)
--- a/tcl/target/c100helper.tcl
+++ b/tcl/target/c100helper.tcl
@@ -29,14 +29,14 @@ proc helpC100 {} {
 # mrw: "memory read word", returns value of $reg
 proc mrw {reg} {
     set value ""
-    ocd_mem2array value 32 $reg 1
+    mem2array value 32 $reg 1
     return $value(0)
 }
 
 # read a 64-bit register (memory mapped)
 proc mr64bit {reg} {
     set value ""
-    ocd_mem2array value 32 $reg 2
+    mem2array value 32 $reg 2
     return $value
 }
 
@@ -131,7 +131,7 @@ proc showAmbaClk {} {
     set PLL_CLK_BYPASS              [regs PLL_CLK_BYPASS]
 
     puts [format "CLKCORE_AHB_CLK_CNTRL       (0x%x): 0x%x" $CLKCORE_AHB_CLK_CNTRL [mrw $CLKCORE_AHB_CLK_CNTRL]]
-    ocd_mem2array value 32 $CLKCORE_AHB_CLK_CNTRL 1
+    mem2array value 32 $CLKCORE_AHB_CLK_CNTRL 1
     # see if the PLL is in bypass mode
     set bypass [expr ($value(0) & $PLL_CLK_BYPASS) >> 24 ]
     puts [format "PLL bypass bit: %d" $bypass]
@@ -206,7 +206,7 @@ proc showArmClk {} {
     set PLL_CLK_BYPASS         [regs PLL_CLK_BYPASS]
 
     puts [format "CLKCORE_ARM_CLK_CNTRL       (0x%x): 0x%x" $CLKCORE_ARM_CLK_CNTRL [mrw $CLKCORE_ARM_CLK_CNTRL]]
-    ocd_mem2array value 32 $CLKCORE_ARM_CLK_CNTRL 1
+    mem2array value 32 $CLKCORE_ARM_CLK_CNTRL 1
     # see if the PLL is in bypass mode
     set bypass [expr ($value(0) & $PLL_CLK_BYPASS) >> 24 ]
     puts [format "PLL bypass bit: %d" $bypass]

diff --git a/tcl/target/davinci.cfg b/tcl/target/davinci.cfg
index 31750dd5f734b21ca0d00d1477c4b6b56ca2c50b..6c6769fa9597d684c6124eb4b866fd181d6f532e 100644 (file)
--- a/tcl/target/davinci.cfg
+++ b/tcl/target/davinci.cfg
@@ -10,7 +10,7 @@ proc davinci_pinmux {soc reg value} {
 # mrw: "memory read word", returns value of $reg
 proc mrw {reg} {
        set value ""
-       ocd_mem2array value 32 $reg 1
+       mem2array value 32 $reg 1
        return $value(0)
 }
 

diff --git a/testing/examples/cortex/cm3-ftest.cfg b/testing/examples/cortex/cm3-ftest.cfg
index 2c7809d3ef674ae4d1501f79a82adba53f91b061..379370360593a37ee0a4a276aba51a413f530b7b 100644 (file)
--- a/testing/examples/cortex/cm3-ftest.cfg
+++ b/testing/examples/cortex/cm3-ftest.cfg
@@ -50,7 +50,7 @@ proc load_and_run { name halfwords n_instr } {
        echo "# code to trigger $name vector"
        set addr 0x20000000
 
-       # ocd_array2mem should be faster, though we'd need to
+       # array2mem should be faster, though we'd need to
        # compute the resulting $addr ourselves
        foreach opcode $halfwords {
                mwh $addr $opcode