--- /dev/null
+/*\r
+ FreeRTOS.org V5.0.4 - Copyright (C) 2003-2008 Richard Barry.\r
+\r
+ This file is part of the FreeRTOS.org distribution.\r
+\r
+ FreeRTOS.org is free software; you can redistribute it and/or modify\r
+ it under the terms of the GNU General Public License as published by\r
+ the Free Software Foundation; either version 2 of the License, or\r
+ (at your option) any later version.\r
+\r
+ FreeRTOS.org is distributed in the hope that it will be useful,\r
+ but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\r
+ GNU General Public License for more details.\r
+\r
+ You should have received a copy of the GNU General Public License\r
+ along with FreeRTOS.org; if not, write to the Free Software\r
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA\r
+\r
+ A special exception to the GPL can be applied should you wish to distribute\r
+ a combined work that includes FreeRTOS.org, without being obliged to provide\r
+ the source code for any proprietary components. See the licensing section \r
+ of http://www.FreeRTOS.org for full details of how and when the exception\r
+ can be applied.\r
+\r
+ ***************************************************************************\r
+ ***************************************************************************\r
+ * *\r
+ * SAVE TIME AND MONEY! We can port FreeRTOS.org to your own hardware, *\r
+ * and even write all or part of your application on your behalf. *\r
+ * See http://www.OpenRTOS.com for details of the services we provide to *\r
+ * expedite your project. *\r
+ * *\r
+ ***************************************************************************\r
+ ***************************************************************************\r
+\r
+ Please ensure to read the configuration and relevant port sections of the\r
+ online documentation.\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and \r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety \r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting, \r
+ licensing and training services.\r
+*/\r
+\r
+\r
+/* Standard includes. */\r
+#include <stdlib.h>\r
+\r
+/* Scheduler includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+\r
+/* Constants required to setup the initial task context. */\r
+#define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */\r
+#define portTHUMB_MODE_BIT ( ( portSTACK_TYPE ) 0x20 )\r
+#define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 )\r
+#define portNO_CRITICAL_SECTION_NESTING ( ( portSTACK_TYPE ) 0 )\r
+\r
+/* Constants required to setup the tick ISR. */\r
+#define portENABLE_TIMER ( ( unsigned portCHAR ) 0x01 )\r
+#define portPRESCALE_VALUE 0x00\r
+#define portINTERRUPT_ON_MATCH ( ( unsigned portLONG ) 0x01 )\r
+#define portRESET_COUNT_ON_MATCH ( ( unsigned portLONG ) 0x02 )\r
+\r
+/* Constants required to setup the VIC for the tick ISR. */\r
+#define portTIMER_VIC_CHANNEL ( ( unsigned portLONG ) 0x0004 )\r
+#define portTIMER_VIC_CHANNEL_BIT ( ( unsigned portLONG ) 0x0010 )\r
+#define portTIMER_VIC_ENABLE ( ( unsigned portLONG ) 0x0020 )\r
+\r
+/* Constants required to handle interrupts. */\r
+#define portTIMER_MATCH_ISR_BIT ( ( unsigned portCHAR ) 0x01 )\r
+#define portCLEAR_VIC_INTERRUPT ( ( unsigned portLONG ) 0 )\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* The code generated by the Keil compiler does not maintain separate\r
+stack and frame pointers. The portENTER_CRITICAL macro cannot therefore\r
+use the stack as per other ports. Instead a variable is used to keep\r
+track of the critical section nesting. This variable has to be stored\r
+as part of the task context and must be initialised to a non zero value. */\r
+\r
+#define portNO_CRITICAL_NESTING ( ( unsigned portLONG ) 0 )\r
+volatile unsigned portLONG ulCriticalNesting = 9999UL;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Setup the timer to generate the tick interrupts. */\r
+static void prvSetupTimerInterrupt( void );\r
+\r
+/* \r
+ * The scheduler can only be started from ARM mode, so \r
+ * vPortStartFirstSTask() is defined in portISR.c. \r
+ */\r
+extern __asm void vPortStartFirstTask( void );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* \r
+ * See header file for description. \r
+ */\r
+portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+{\r
+portSTACK_TYPE *pxOriginalTOS;\r
+\r
+ /* Setup the initial stack of the task. The stack is set exactly as \r
+ expected by the portRESTORE_CONTEXT() macro.\r
+\r
+ Remember where the top of the (simulated) stack is before we place \r
+ anything on it. */\r
+ pxOriginalTOS = pxTopOfStack;\r
+\r
+ /* First on the stack is the return address - which in this case is the\r
+ start of the task. The offset is added to make the return address appear\r
+ as it would within an IRQ ISR. */\r
+ *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE; \r
+ pxTopOfStack--;\r
+\r
+ *pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa; /* R14 */\r
+ pxTopOfStack--; \r
+ *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */\r
+ pxTopOfStack--; \r
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */\r
+ pxTopOfStack--; \r
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */\r
+ pxTopOfStack--; \r
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */\r
+ pxTopOfStack--; \r
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */\r
+ pxTopOfStack--; \r
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */\r
+ pxTopOfStack--; \r
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */\r
+ pxTopOfStack--; \r
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */\r
+ pxTopOfStack--; \r
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */\r
+ pxTopOfStack--; \r
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */\r
+ pxTopOfStack--; \r
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */\r
+ pxTopOfStack--; \r
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */\r
+ pxTopOfStack--; \r
+ *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */\r
+ pxTopOfStack--;\r
+\r
+ /* The last thing onto the stack is the status register, which is set for\r
+ system mode, with interrupts enabled. */\r
+ *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;\r
+\r
+ #ifdef KEIL_THUMB_INTERWORK\r
+ { \r
+ /* We want the task to start in thumb mode. */\r
+ *pxTopOfStack |= portTHUMB_MODE_BIT;\r
+ }\r
+ #endif\r
+\r
+ pxTopOfStack--;\r
+\r
+ /* The code generated by the Keil compiler does not maintain separate\r
+ stack and frame pointers. The portENTER_CRITICAL macro cannot therefore\r
+ use the stack as per other ports. Instead a variable is used to keep\r
+ track of the critical section nesting. This variable has to be stored\r
+ as part of the task context and is initially set to zero. */\r
+ *pxTopOfStack = portNO_CRITICAL_SECTION_NESTING;\r
+\r
+ return pxTopOfStack;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+portBASE_TYPE xPortStartScheduler( void )\r
+{\r
+ /* Start the timer that generates the tick ISR. */\r
+ prvSetupTimerInterrupt();\r
+\r
+ /* Start the first task. This is done from portISR.c as ARM mode must be\r
+ used. */\r
+ vPortStartFirstTask();\r
+\r
+ /* Should not get here! */\r
+ return 0;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vPortEndScheduler( void )\r
+{\r
+ /* It is unlikely that the ARM port will require this function as there\r
+ is nothing to return to. If this is required - stop the tick ISR then\r
+ return back to main. */\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+#if configUSE_PREEMPTION == 0\r
+\r
+ /* \r
+ * The cooperative scheduler requires a normal IRQ service routine to \r
+ * simply increment the system tick. \r
+ */\r
+ void vNonPreemptiveTick( void ) __irq;\r
+ void vNonPreemptiveTick( void ) __irq\r
+ {\r
+ /* Increment the tick count - this may make a delaying task ready\r
+ to run - but a context switch is not performed. */ \r
+ vTaskIncrementTick();\r
+\r
+ T0IR = portTIMER_MATCH_ISR_BIT; /* Clear the timer event */\r
+ VICVectAddr = portCLEAR_VIC_INTERRUPT; /* Acknowledge the Interrupt */\r
+ }\r
+\r
+ #else\r
+\r
+ /*\r
+ **************************************************************************\r
+ * The preemptive scheduler ISR is written in assembler and can be found \r
+ * in the portASM.s file. This will only get used if portUSE_PREEMPTION\r
+ * is set to 1 in portmacro.h\r
+ ************************************************************************** \r
+ */\r
+\r
+ void vPreemptiveTick( void );\r
+\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvSetupTimerInterrupt( void )\r
+{\r
+unsigned portLONG ulCompareMatch;\r
+\r
+ /* A 1ms tick does not require the use of the timer prescale. This is\r
+ defaulted to zero but can be used if necessary. */\r
+ T0PR = portPRESCALE_VALUE;\r
+\r
+ /* Calculate the match value required for our wanted tick rate. */\r
+ ulCompareMatch = configCPU_CLOCK_HZ / configTICK_RATE_HZ;\r
+\r
+ /* Protect against divide by zero. Using an if() statement still results\r
+ in a warning - hence the #if. */\r
+ #if portPRESCALE_VALUE != 0\r
+ {\r
+ ulCompareMatch /= ( portPRESCALE_VALUE + 1 );\r
+ }\r
+ #endif\r
+\r
+ T0MR0 = ulCompareMatch;\r
+\r
+ /* Generate tick with timer 0 compare match. */\r
+ T0MCR = portRESET_COUNT_ON_MATCH | portINTERRUPT_ON_MATCH;\r
+\r
+ /* Setup the VIC for the timer. */\r
+ VICIntSelect &= ~( portTIMER_VIC_CHANNEL_BIT );\r
+ VICIntEnable |= portTIMER_VIC_CHANNEL_BIT;\r
+ \r
+ /* The ISR installed depends on whether the preemptive or cooperative\r
+ scheduler is being used. */\r
+ #if configUSE_PREEMPTION == 1\r
+ { \r
+ VICVectAddr0 = ( unsigned portLONG ) vPreemptiveTick;\r
+ }\r
+ #else\r
+ {\r
+ VICVectAddr0 = ( unsigned portLONG ) vNonPreemptiveTick;\r
+ }\r
+ #endif\r
+\r
+ VICVectCntl0 = portTIMER_VIC_CHANNEL | portTIMER_VIC_ENABLE;\r
+\r
+ /* Start the timer - interrupts are disabled when this function is called\r
+ so it is okay to do this here. */\r
+ T0TCR = portENABLE_TIMER;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vPortEnterCritical( void )\r
+{\r
+ /* Disable interrupts as per portDISABLE_INTERRUPTS(); */\r
+ __disable_irq();\r
+\r
+ /* Now interrupts are disabled ulCriticalNesting can be accessed \r
+ directly. Increment ulCriticalNesting to keep a count of how many times\r
+ portENTER_CRITICAL() has been called. */\r
+ ulCriticalNesting++;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vPortExitCritical( void )\r
+{\r
+ if( ulCriticalNesting > portNO_CRITICAL_NESTING )\r
+ {\r
+ /* Decrement the nesting count as we are leaving a critical section. */\r
+ ulCriticalNesting--;\r
+\r
+ /* If the nesting level has reached zero then interrupts should be\r
+ re-enabled. */\r
+ if( ulCriticalNesting == portNO_CRITICAL_NESTING )\r
+ {\r
+ /* Enable interrupts as per portEXIT_CRITICAL(). */\r
+ __enable_irq();\r
+ }\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+\r
--- /dev/null
+;/*\r
+; FreeRTOS.org V5.0.4 - Copyright (C) 2003-2008 Richard Barry.\r
+;\r
+; This file is part of the FreeRTOS.org distribution.\r
+;\r
+; FreeRTOS.org is free software; you can redistribute it and/or modify\r
+; it under the terms of the GNU General Public License as published by\r
+; the Free Software Foundation; either version 2 of the License, or\r
+; (at your option) any later version.\r
+; \r
+; FreeRTOS.org is distributed in the hope that it will be useful,\r
+; but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\r
+; GNU General Public License for more details.\r
+;\r
+; You should have received a copy of the GNU General Public License\r
+; along with FreeRTOS.org; if not, write to the Free Software\r
+; Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA\r
+;\r
+; A special exception to the GPL can be applied should you wish to distribute\r
+; a combined work that includes FreeRTOS.org, without being obliged to provide\r
+; the source code for any proprietary components. See the licensing section \r
+; of http://www.FreeRTOS.org for full details of how and when the exception\r
+; can be applied.\r
+;\r
+; ***************************************************************************\r
+; ***************************************************************************\r
+; * *\r
+; * SAVE TIME AND MONEY! We can port FreeRTOS.org to your own hardware, *\r
+; * and even write all or part of your application on your behalf. *\r
+; * See http://www.OpenRTOS.com for details of the services we provide to *\r
+; * expedite your project. *\r
+; * *\r
+; ***************************************************************************\r
+; ***************************************************************************\r
+;\r
+; Please ensure to read the configuration and relevant port sections of the\r
+; online documentation.\r
+;\r
+; http://www.FreeRTOS.org - Documentation, latest information, license and \r
+; contact details.\r
+;\r
+; http://www.SafeRTOS.com - A version that is certified for use in safety \r
+; critical systems.\r
+;\r
+; http://www.OpenRTOS.com - Commercial support, development, porting, \r
+; licensing and training services.\r
+;*/\r
+\r
+ INCLUDE portmacro.inc\r
+\r
+ IMPORT vTaskSwitchContext\r
+ IMPORT vTaskIncrementTick\r
+\r
+ EXPORT vPortYieldProcessor\r
+ EXPORT vPortStartFirstTask\r
+ EXPORT vPreemptiveTick\r
+\r
+\r
+\r
+VICVECTADDR EQU 0xFFFFF030\r
+T0IR EQU 0xE0004000\r
+T0MATCHBIT EQU 0x00000001\r
+\r
+\r
+ ARM\r
+ AREA PORT_ASM, CODE, READONLY\r
+ PRESERVE8\r
+\r
+\r
+\r
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;\r
+; Starting the first task is done by just restoring the context \r
+; setup by pxPortInitialiseStack\r
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;\r
+vPortStartFirstTask\r
+ portRESTORE_CONTEXT\r
+\r
+\r
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;\r
+; Interrupt service routine for the SWI interrupt. The vector table is\r
+; configured in the startup.s file.\r
+;\r
+; vPortYieldProcessor() is used to manually force a context switch. The\r
+; SWI interrupt is generated by a call to taskYIELD() or portYIELD().\r
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;\r
+\r
+vPortYieldProcessor\r
+\r
+ ; Within an IRQ ISR the link register has an offset from the true return \r
+ ; address, but an SWI ISR does not. Add the offset manually so the same \r
+ ; ISR return code can be used in both cases.\r
+ ADD LR, LR, #4\r
+\r
+ ; Perform the context switch.\r
+ portSAVE_CONTEXT ; Save current task context \r
+ LDR R0, =vTaskSwitchContext ; Get the address of the context switch function\r
+ MOV LR, PC ; Store the return address\r
+ BX R0 ; Call the contedxt switch function\r
+ portRESTORE_CONTEXT ; restore the context of the selected task \r
+\r
+\r
+\r
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;\r
+; Interrupt service routine for preemptive scheduler tick timer\r
+; Only used if portUSE_PREEMPTION is set to 1 in portmacro.h\r
+;\r
+; Uses timer 0 of LPC21XX Family\r
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; \r
+\r
+vPreemptiveTick\r
+ portSAVE_CONTEXT ; Save the context of the current task. \r
+\r
+ LDR R0, =vTaskIncrementTick ; Increment the tick count. \r
+ MOV LR, PC ; This may make a delayed task ready\r
+ BX R0 ; to run.\r
+ \r
+ LDR R0, =vTaskSwitchContext ; Find the highest priority task that \r
+ MOV LR, PC ; is ready to run.\r
+ BX R0\r
+ \r
+ MOV R0, #T0MATCHBIT ; Clear the timer event\r
+ LDR R1, =T0IR\r
+ STR R0, [R1] \r
+\r
+ LDR R0, =VICVECTADDR ; Acknowledge the interrupt \r
+ STR R0,[R0]\r
+\r
+ portRESTORE_CONTEXT ; Restore the context of the highest \r
+ ; priority task that is ready to run.\r
+ END\r
+\r
--- /dev/null
+/*\r
+ FreeRTOS.org V5.0.4 - Copyright (C) 2003-2008 Richard Barry.\r
+\r
+ This file is part of the FreeRTOS.org distribution.\r
+\r
+ FreeRTOS.org is free software; you can redistribute it and/or modify\r
+ it under the terms of the GNU General Public License as published by\r
+ the Free Software Foundation; either version 2 of the License, or\r
+ (at your option) any later version.\r
+\r
+ FreeRTOS.org is distributed in the hope that it will be useful,\r
+ but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\r
+ GNU General Public License for more details.\r
+\r
+ You should have received a copy of the GNU General Public License\r
+ along with FreeRTOS.org; if not, write to the Free Software\r
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA\r
+\r
+ A special exception to the GPL can be applied should you wish to distribute\r
+ a combined work that includes FreeRTOS.org, without being obliged to provide\r
+ the source code for any proprietary components. See the licensing section \r
+ of http://www.FreeRTOS.org for full details of how and when the exception\r
+ can be applied.\r
+\r
+ ***************************************************************************\r
+ ***************************************************************************\r
+ * *\r
+ * SAVE TIME AND MONEY! We can port FreeRTOS.org to your own hardware, *\r
+ * and even write all or part of your application on your behalf. *\r
+ * See http://www.OpenRTOS.com for details of the services we provide to *\r
+ * expedite your project. *\r
+ * *\r
+ ***************************************************************************\r
+ ***************************************************************************\r
+\r
+ Please ensure to read the configuration and relevant port sections of the\r
+ online documentation.\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and \r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety \r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting, \r
+ licensing and training services.\r
+*/\r
+\r
+\r
+#ifndef PORTMACRO_H\r
+#define PORTMACRO_H\r
+\r
+#ifdef __cplusplus\r
+extern "C" {\r
+#endif\r
+\r
+/*-----------------------------------------------------------\r
+ * Port specific definitions. \r
+ *\r
+ * The settings in this file configure FreeRTOS correctly for the\r
+ * given hardware and compiler.\r
+ *\r
+ * These settings should not be altered.\r
+ *-----------------------------------------------------------\r
+ */\r
+\r
+/* Type definitions. */\r
+#define portCHAR char\r
+#define portFLOAT float\r
+#define portDOUBLE double\r
+#define portLONG long\r
+#define portSHORT short\r
+#define portSTACK_TYPE unsigned portLONG\r
+#define portBASE_TYPE portLONG\r
+\r
+#if( configUSE_16_BIT_TICKS == 1 )\r
+ typedef unsigned portSHORT portTickType;\r
+ #define portMAX_DELAY ( portTickType ) 0xffff\r
+#else\r
+ typedef unsigned portLONG portTickType;\r
+ #define portMAX_DELAY ( portTickType ) 0xffffffff\r
+#endif\r
+/*-----------------------------------------------------------*/ \r
+\r
+/* Hardware specifics. */\r
+#define portSTACK_GROWTH ( -1 )\r
+#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
+#define portBYTE_ALIGNMENT 4\r
+/*-----------------------------------------------------------*/ \r
+\r
+/* Task utilities. */\r
+\r
+/*-----------------------------------------------------------\r
+ * ISR entry and exit macros. These are only required if a task switch\r
+ * is required from an ISR.\r
+ *----------------------------------------------------------*/\r
+\r
+/* If a switch is required then we just need to call */ \r
+/* vTaskSwitchContext() as the context has already been */\r
+/* saved. */\r
+\r
+#define portEXIT_SWITCHING_ISR(SwitchRequired) \\r
+{ \\r
+extern void vTaskSwitchContext(void); \\r
+ \\r
+ if(SwitchRequired) \\r
+ { \\r
+ vTaskSwitchContext(); \\r
+ } \\r
+} \\r
+\r
+#define portYIELD() __asm{ SVC 0 }\r
+\r
+\r
+/* Critical section management. */\r
+\r
+/*\r
+ ****************************************************************** \r
+ * We don't need to worry about whether we're in ARM or\r
+ * THUMB mode with the Keil Real View compiler when enabling \r
+ * or disabling interrupts as the compiler's intrinsic functions \r
+ * take care of that for us.\r
+ *******************************************************************\r
+ */\r
+#define portDISABLE_INTERRUPTS() __disable_irq() \r
+#define portENABLE_INTERRUPTS() __enable_irq()\r
+\r
+\r
+/*-----------------------------------------------------------\r
+ * Critical section control\r
+ *\r
+ * The code generated by the Keil compiler does not maintain separate\r
+ * stack and frame pointers. The portENTER_CRITICAL macro cannot therefore\r
+ * use the stack as per other ports. Instead a variable is used to keep\r
+ * track of the critical section nesting. This necessitates the use of a \r
+ * function in place of the macro.\r
+ *----------------------------------------------------------*/\r
+\r
+extern void vPortEnterCritical( void );\r
+extern void vPortExitCritical( void );\r
+\r
+#define portENTER_CRITICAL() vPortEnterCritical();\r
+#define portEXIT_CRITICAL() vPortExitCritical();\r
+/*-----------------------------------------------------------*/ \r
+\r
+/* Compiler specifics. */\r
+#define inline\r
+#define register\r
+#define portNOP() __asm{ NOP }\r
+/*-----------------------------------------------------------*/ \r
+\r
+/* Task function macros as described on the FreeRTOS.org WEB site. */\r
+#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
+#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
+\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+\r
+#endif /* PORTMACRO_H */\r
+\r
--- /dev/null
+;/*\r
+; FreeRTOS.org V5.0.4 - Copyright (C) 2003-2008 Richard Barry.\r
+;\r
+; This file is part of the FreeRTOS.org distribution.\r
+;\r
+; FreeRTOS.org is free software; you can redistribute it and/or modify\r
+; it under the terms of the GNU General Public License as published by\r
+; the Free Software Foundation; either version 2 of the License, or\r
+; (at your option) any later version.\r
+;\r
+; FreeRTOS.org is distributed in the hope that it will be useful,\r
+; but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\r
+; GNU General Public License for more details.\r
+;\r
+; You should have received a copy of the GNU General Public License\r
+; along with FreeRTOS.org; if not, write to the Free Software\r
+; Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA\r
+;\r
+; A special exception to the GPL can be applied should you wish to distribute\r
+; a combined work that includes FreeRTOS.org, without being obliged to provide\r
+; the source code for any proprietary components. See the licensing section \r
+; of http://www.FreeRTOS.org for full details of how and when the exception\r
+; can be applied.\r
+;\r
+; ***************************************************************************\r
+; ***************************************************************************\r
+; * *\r
+; * SAVE TIME AND MONEY! We can port FreeRTOS.org to your own hardware, *\r
+; * and even write all or part of your application on your behalf. *\r
+; * See http://www.OpenRTOS.com for details of the services we provide to *\r
+; * expedite your project. *\r
+; * *\r
+; ***************************************************************************\r
+; ***************************************************************************\r
+;\r
+; Please ensure to read the configuration and relevant port sections of the\r
+; online documentation.\r
+;\r
+; http://www.FreeRTOS.org - Documentation, latest information, license and \r
+; contact details.\r
+;\r
+; http://www.SafeRTOS.com - A version that is certified for use in safety \r
+; critical systems.\r
+;\r
+; http://www.OpenRTOS.com - Commercial support, development, porting, \r
+; licensing and training services.\r
+;*/\r
+\r
+ IMPORT ulCriticalNesting ;\r
+ IMPORT pxCurrentTCB ;\r
+\r
+\r
+ MACRO\r
+ portRESTORE_CONTEXT\r
+\r
+\r
+ LDR R0, =pxCurrentTCB ; Set the LR to the task stack. The location was...\r
+ LDR R0, [R0] ; ... stored in pxCurrentTCB\r
+ LDR LR, [R0]\r
+\r
+ LDR R0, =ulCriticalNesting ; The critical nesting depth is the first item on... \r
+ LDMFD LR!, {R1} ; ...the stack. Load it into the ulCriticalNesting var.\r
+ STR R1, [R0] ;\r
+\r
+ LDMFD LR!, {R0} ; Get the SPSR from the stack.\r
+ MSR SPSR_cxsf, R0 ;\r
+\r
+ LDMFD LR, {R0-R14}^ ; Restore all system mode registers for the task.\r
+ NOP ;\r
+\r
+ LDR LR, [LR, #+60] ; Restore the return address\r
+\r
+ ; And return - correcting the offset in the LR to obtain ...\r
+ SUBS PC, LR, #4 ; ...the correct address.\r
+\r
+ MEND\r
+\r
+; /**********************************************************************/\r
+\r
+ MACRO\r
+ portSAVE_CONTEXT\r
+\r
+\r
+ STMDB SP!, {R0} ; Store R0 first as we need to use it.\r
+\r
+ STMDB SP,{SP}^ ; Set R0 to point to the task stack pointer.\r
+ NOP ;\r
+ SUB SP, SP, #4 ;\r
+ LDMIA SP!,{R0} ;\r
+\r
+ STMDB R0!, {LR} ; Push the return address onto the stack.\r
+ MOV LR, R0 ; Now we have saved LR we can use it instead of R0.\r
+ LDMIA SP!, {R0} ; Pop R0 so we can save it onto the system mode stack.\r
+\r
+ STMDB LR,{R0-LR}^ ; Push all the system mode registers onto the task stack.\r
+ NOP ;\r
+ SUB LR, LR, #60 ;\r
+\r
+ MRS R0, SPSR ; Push the SPSR onto the task stack.\r
+ STMDB LR!, {R0} ;\r
+\r
+ LDR R0, =ulCriticalNesting ;\r
+ LDR R0, [R0] ;\r
+ STMDB LR!, {R0} ;\r
+\r
+ LDR R0, =pxCurrentTCB ; Store the new top of stack for the task.\r
+ LDR R1, [R0] ; \r
+ STR LR, [R1] ;\r
+ \r
+ MEND\r
+ \r
+ END\r
projects / freertos / commitdiff