--- /dev/null
+/***********************************************************************/\r
+/* */\r
+/* PROJECT NAME : RTOSDemo */\r
+/* FILE : iodefine.h */\r
+/* DESCRIPTION : Definition of I/O Registers */\r
+/* CPU SERIES : RL78 - G1C */\r
+/* CPU TYPE : R5F10JBC */\r
+/* */\r
+/* This file is generated by e2studio. */\r
+/* */\r
+/***********************************************************************/\r
+\r
+/************************************************************************/\r
+/* Header file generated from device file: */\r
+/* DR5F10JBC.DVF */\r
+/* Copyright(C) 2012 Renesas */\r
+/* File Version V1.00 */\r
+/* Tool Version 1.9.7121 */\r
+/* Date Generated 13/11/2012 */\r
+/************************************************************************/\r
+\r
+#ifndef __IOREG_BIT_STRUCTURES\r
+#define __IOREG_BIT_STRUCTURES\r
+typedef struct {\r
+ unsigned char no0 :1;\r
+ unsigned char no1 :1;\r
+ unsigned char no2 :1;\r
+ unsigned char no3 :1;\r
+ unsigned char no4 :1;\r
+ unsigned char no5 :1;\r
+ unsigned char no6 :1;\r
+ unsigned char no7 :1;\r
+} __BITS8;\r
+\r
+typedef struct {\r
+ unsigned short no0 :1;\r
+ unsigned short no1 :1;\r
+ unsigned short no2 :1;\r
+ unsigned short no3 :1;\r
+ unsigned short no4 :1;\r
+ unsigned short no5 :1;\r
+ unsigned short no6 :1;\r
+ unsigned short no7 :1;\r
+ unsigned short no8 :1;\r
+ unsigned short no9 :1;\r
+ unsigned short no10 :1;\r
+ unsigned short no11 :1;\r
+ unsigned short no12 :1;\r
+ unsigned short no13 :1;\r
+ unsigned short no14 :1;\r
+ unsigned short no15 :1;\r
+} __BITS16;\r
+\r
+#endif\r
+\r
+#ifndef IODEFINE_H\r
+#define IODEFINE_H\r
+\r
+/*\r
+ IO Registers\r
+ */\r
+union un_p0 {\r
+ unsigned char p0;\r
+ __BITS8 BIT;\r
+};\r
+union un_p1 {\r
+ unsigned char p1;\r
+ __BITS8 BIT;\r
+};\r
+union un_p2 {\r
+ unsigned char p2;\r
+ __BITS8 BIT;\r
+};\r
+union un_p3 {\r
+ unsigned char p3;\r
+ __BITS8 BIT;\r
+};\r
+union un_p4 {\r
+ unsigned char p4;\r
+ __BITS8 BIT;\r
+};\r
+union un_p5 {\r
+ unsigned char p5;\r
+ __BITS8 BIT;\r
+};\r
+union un_p6 {\r
+ unsigned char p6;\r
+ __BITS8 BIT;\r
+};\r
+union un_p7 {\r
+ unsigned char p7;\r
+ __BITS8 BIT;\r
+};\r
+union un_p12 {\r
+ unsigned char p12;\r
+ __BITS8 BIT;\r
+};\r
+union un_p13 {\r
+ unsigned char p13;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm0 {\r
+ unsigned char pm0;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm1 {\r
+ unsigned char pm1;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm2 {\r
+ unsigned char pm2;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm3 {\r
+ unsigned char pm3;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm4 {\r
+ unsigned char pm4;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm5 {\r
+ unsigned char pm5;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm6 {\r
+ unsigned char pm6;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm7 {\r
+ unsigned char pm7;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm12 {\r
+ unsigned char pm12;\r
+ __BITS8 BIT;\r
+};\r
+union un_adm0 {\r
+ unsigned char adm0;\r
+ __BITS8 BIT;\r
+};\r
+union un_ads {\r
+ unsigned char ads;\r
+ __BITS8 BIT;\r
+};\r
+union un_adm1 {\r
+ unsigned char adm1;\r
+ __BITS8 BIT;\r
+};\r
+union un_egp0 {\r
+ unsigned char egp0;\r
+ __BITS8 BIT;\r
+};\r
+union un_egn0 {\r
+ unsigned char egn0;\r
+ __BITS8 BIT;\r
+};\r
+union un_egp1 {\r
+ unsigned char egp1;\r
+ __BITS8 BIT;\r
+};\r
+union un_egn1 {\r
+ unsigned char egn1;\r
+ __BITS8 BIT;\r
+};\r
+union un_iics0 {\r
+ unsigned char iics0;\r
+ __BITS8 BIT;\r
+};\r
+union un_iicf0 {\r
+ unsigned char iicf0;\r
+ __BITS8 BIT;\r
+};\r
+union un_flars {\r
+ unsigned char flars;\r
+ __BITS8 BIT;\r
+};\r
+union un_fssq {\r
+ unsigned char fssq;\r
+ __BITS8 BIT;\r
+};\r
+union un_flrst {\r
+ unsigned char flrst;\r
+ __BITS8 BIT;\r
+};\r
+union un_fsastl {\r
+ unsigned char fsastl;\r
+ __BITS8 BIT;\r
+};\r
+union un_fsasth {\r
+ unsigned char fsasth;\r
+ __BITS8 BIT;\r
+};\r
+union un_rtcc0 {\r
+ unsigned char rtcc0;\r
+ __BITS8 BIT;\r
+};\r
+union un_rtcc1 {\r
+ unsigned char rtcc1;\r
+ __BITS8 BIT;\r
+};\r
+union un_csc {\r
+ unsigned char csc;\r
+ __BITS8 BIT;\r
+};\r
+union un_ostc {\r
+ unsigned char ostc;\r
+ __BITS8 BIT;\r
+};\r
+union un_ckc {\r
+ unsigned char ckc;\r
+ __BITS8 BIT;\r
+};\r
+union un_cks0 {\r
+ unsigned char cks0;\r
+ __BITS8 BIT;\r
+};\r
+union un_cks1 {\r
+ unsigned char cks1;\r
+ __BITS8 BIT;\r
+};\r
+union un_lvim {\r
+ unsigned char lvim;\r
+ __BITS8 BIT;\r
+};\r
+union un_lvis {\r
+ unsigned char lvis;\r
+ __BITS8 BIT;\r
+};\r
+union un_monsta0 {\r
+ unsigned char monsta0;\r
+ __BITS8 BIT;\r
+};\r
+union un_asim {\r
+ unsigned char asim;\r
+ __BITS8 BIT;\r
+};\r
+union un_dmc0 {\r
+ unsigned char dmc0;\r
+ __BITS8 BIT;\r
+};\r
+union un_dmc1 {\r
+ unsigned char dmc1;\r
+ __BITS8 BIT;\r
+};\r
+union un_drc0 {\r
+ unsigned char drc0;\r
+ __BITS8 BIT;\r
+};\r
+union un_drc1 {\r
+ unsigned char drc1;\r
+ __BITS8 BIT;\r
+};\r
+union un_if2 {\r
+ unsigned short if2;\r
+ __BITS16 BIT;\r
+};\r
+union un_if2l {\r
+ unsigned char if2l;\r
+ __BITS8 BIT;\r
+};\r
+union un_if2h {\r
+ unsigned char if2h;\r
+ __BITS8 BIT;\r
+};\r
+union un_mk2 {\r
+ unsigned short mk2;\r
+ __BITS16 BIT;\r
+};\r
+union un_mk2l {\r
+ unsigned char mk2l;\r
+ __BITS8 BIT;\r
+};\r
+union un_mk2h {\r
+ unsigned char mk2h;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr02 {\r
+ unsigned short pr02;\r
+ __BITS16 BIT;\r
+};\r
+union un_pr02l {\r
+ unsigned char pr02l;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr02h {\r
+ unsigned char pr02h;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr12 {\r
+ unsigned short pr12;\r
+ __BITS16 BIT;\r
+};\r
+union un_pr12l {\r
+ unsigned char pr12l;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr12h {\r
+ unsigned char pr12h;\r
+ __BITS8 BIT;\r
+};\r
+union un_if0 {\r
+ unsigned short if0;\r
+ __BITS16 BIT;\r
+};\r
+union un_if0l {\r
+ unsigned char if0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_if0h {\r
+ unsigned char if0h;\r
+ __BITS8 BIT;\r
+};\r
+union un_if1 {\r
+ unsigned short if1;\r
+ __BITS16 BIT;\r
+};\r
+union un_if1l {\r
+ unsigned char if1l;\r
+ __BITS8 BIT;\r
+};\r
+union un_if1h {\r
+ unsigned char if1h;\r
+ __BITS8 BIT;\r
+};\r
+union un_mk0 {\r
+ unsigned short mk0;\r
+ __BITS16 BIT;\r
+};\r
+union un_mk0l {\r
+ unsigned char mk0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_mk0h {\r
+ unsigned char mk0h;\r
+ __BITS8 BIT;\r
+};\r
+union un_mk1 {\r
+ unsigned short mk1;\r
+ __BITS16 BIT;\r
+};\r
+union un_mk1l {\r
+ unsigned char mk1l;\r
+ __BITS8 BIT;\r
+};\r
+union un_mk1h {\r
+ unsigned char mk1h;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr00 {\r
+ unsigned short pr00;\r
+ __BITS16 BIT;\r
+};\r
+union un_pr00l {\r
+ unsigned char pr00l;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr00h {\r
+ unsigned char pr00h;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr01 {\r
+ unsigned short pr01;\r
+ __BITS16 BIT;\r
+};\r
+union un_pr01l {\r
+ unsigned char pr01l;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr01h {\r
+ unsigned char pr01h;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr10 {\r
+ unsigned short pr10;\r
+ __BITS16 BIT;\r
+};\r
+union un_pr10l {\r
+ unsigned char pr10l;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr10h {\r
+ unsigned char pr10h;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr11 {\r
+ unsigned short pr11;\r
+ __BITS16 BIT;\r
+};\r
+union un_pr11l {\r
+ unsigned char pr11l;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr11h {\r
+ unsigned char pr11h;\r
+ __BITS8 BIT;\r
+};\r
+union un_pmc {\r
+ unsigned char pmc;\r
+ __BITS8 BIT;\r
+};\r
+\r
+#define P0 (*(volatile union un_p0 *)0xFFF00).p0\r
+#define P0_bit (*(volatile union un_p0 *)0xFFF00).BIT\r
+#define P1 (*(volatile union un_p1 *)0xFFF01).p1\r
+#define P1_bit (*(volatile union un_p1 *)0xFFF01).BIT\r
+#define P2 (*(volatile union un_p2 *)0xFFF02).p2\r
+#define P2_bit (*(volatile union un_p2 *)0xFFF02).BIT\r
+#define P3 (*(volatile union un_p3 *)0xFFF03).p3\r
+#define P3_bit (*(volatile union un_p3 *)0xFFF03).BIT\r
+#define P4 (*(volatile union un_p4 *)0xFFF04).p4\r
+#define P4_bit (*(volatile union un_p4 *)0xFFF04).BIT\r
+#define P5 (*(volatile union un_p5 *)0xFFF05).p5\r
+#define P5_bit (*(volatile union un_p5 *)0xFFF05).BIT\r
+#define P6 (*(volatile union un_p6 *)0xFFF06).p6\r
+#define P6_bit (*(volatile union un_p6 *)0xFFF06).BIT\r
+#define P7 (*(volatile union un_p7 *)0xFFF07).p7\r
+#define P7_bit (*(volatile union un_p7 *)0xFFF07).BIT\r
+#define P12 (*(volatile union un_p12 *)0xFFF0C).p12\r
+#define P12_bit (*(volatile union un_p12 *)0xFFF0C).BIT\r
+#define P13 (*(volatile union un_p13 *)0xFFF0D).p13\r
+#define P13_bit (*(volatile union un_p13 *)0xFFF0D).BIT\r
+#define SDR00 (*(volatile unsigned short *)0xFFF10)\r
+#define SIO00 (*(volatile unsigned char *)0xFFF10)\r
+#define TXD0 (*(volatile unsigned char *)0xFFF10)\r
+#define SDR01 (*(volatile unsigned short *)0xFFF12)\r
+#define RXD0 (*(volatile unsigned char *)0xFFF12)\r
+#define SIO01 (*(volatile unsigned char *)0xFFF12)\r
+#define TDR00 (*(volatile unsigned short *)0xFFF18)\r
+#define TDR01 (*(volatile unsigned short *)0xFFF1A)\r
+#define TDR01L (*(volatile unsigned char *)0xFFF1A)\r
+#define TDR01H (*(volatile unsigned char *)0xFFF1B)\r
+#define ADCR (*(volatile unsigned short *)0xFFF1E)\r
+#define ADCRH (*(volatile unsigned char *)0xFFF1F)\r
+#define PM0 (*(volatile union un_pm0 *)0xFFF20).pm0\r
+#define PM0_bit (*(volatile union un_pm0 *)0xFFF20).BIT\r
+#define PM1 (*(volatile union un_pm1 *)0xFFF21).pm1\r
+#define PM1_bit (*(volatile union un_pm1 *)0xFFF21).BIT\r
+#define PM2 (*(volatile union un_pm2 *)0xFFF22).pm2\r
+#define PM2_bit (*(volatile union un_pm2 *)0xFFF22).BIT\r
+#define PM3 (*(volatile union un_pm3 *)0xFFF23).pm3\r
+#define PM3_bit (*(volatile union un_pm3 *)0xFFF23).BIT\r
+#define PM4 (*(volatile union un_pm4 *)0xFFF24).pm4\r
+#define PM4_bit (*(volatile union un_pm4 *)0xFFF24).BIT\r
+#define PM5 (*(volatile union un_pm5 *)0xFFF25).pm5\r
+#define PM5_bit (*(volatile union un_pm5 *)0xFFF25).BIT\r
+#define PM6 (*(volatile union un_pm6 *)0xFFF26).pm6\r
+#define PM6_bit (*(volatile union un_pm6 *)0xFFF26).BIT\r
+#define PM7 (*(volatile union un_pm7 *)0xFFF27).pm7\r
+#define PM7_bit (*(volatile union un_pm7 *)0xFFF27).BIT\r
+#define PM12 (*(volatile union un_pm12 *)0xFFF2C).pm12\r
+#define PM12_bit (*(volatile union un_pm12 *)0xFFF2C).BIT\r
+#define ADM0 (*(volatile union un_adm0 *)0xFFF30).adm0\r
+#define ADM0_bit (*(volatile union un_adm0 *)0xFFF30).BIT\r
+#define ADS (*(volatile union un_ads *)0xFFF31).ads\r
+#define ADS_bit (*(volatile union un_ads *)0xFFF31).BIT\r
+#define ADM1 (*(volatile union un_adm1 *)0xFFF32).adm1\r
+#define ADM1_bit (*(volatile union un_adm1 *)0xFFF32).BIT\r
+#define EGP0 (*(volatile union un_egp0 *)0xFFF38).egp0\r
+#define EGP0_bit (*(volatile union un_egp0 *)0xFFF38).BIT\r
+#define EGN0 (*(volatile union un_egn0 *)0xFFF39).egn0\r
+#define EGN0_bit (*(volatile union un_egn0 *)0xFFF39).BIT\r
+#define EGP1 (*(volatile union un_egp1 *)0xFFF3A).egp1\r
+#define EGP1_bit (*(volatile union un_egp1 *)0xFFF3A).BIT\r
+#define EGN1 (*(volatile union un_egn1 *)0xFFF3B).egn1\r
+#define EGN1_bit (*(volatile union un_egn1 *)0xFFF3B).BIT\r
+#define IICA0 (*(volatile unsigned char *)0xFFF50)\r
+#define IICS0 (*(volatile union un_iics0 *)0xFFF51).iics0\r
+#define IICS0_bit (*(volatile union un_iics0 *)0xFFF51).BIT\r
+#define IICF0 (*(volatile union un_iicf0 *)0xFFF52).iicf0\r
+#define IICF0_bit (*(volatile union un_iicf0 *)0xFFF52).BIT\r
+#define CFIFO (*(volatile unsigned short *)0xFFF54)\r
+#define CFIFOL (*(volatile unsigned char *)0xFFF54)\r
+#define D0FIFO (*(volatile unsigned short *)0xFFF58)\r
+#define D0FIFOL (*(volatile unsigned char *)0xFFF58)\r
+#define D1FIFO (*(volatile unsigned short *)0xFFF5C)\r
+#define D1FIFOL (*(volatile unsigned char *)0xFFF5C)\r
+#define TDR02 (*(volatile unsigned short *)0xFFF64)\r
+#define TDR03 (*(volatile unsigned short *)0xFFF66)\r
+#define TDR03L (*(volatile unsigned char *)0xFFF66)\r
+#define TDR03H (*(volatile unsigned char *)0xFFF67)\r
+#define FLPMC (*(volatile unsigned char *)0xFFF80)\r
+#define FLARS (*(volatile union un_flars *)0xFFF81).flars\r
+#define FLARS_bit (*(volatile union un_flars *)0xFFF81).BIT\r
+#define FLAPL (*(volatile unsigned short *)0xFFF82)\r
+#define FLAPH (*(volatile unsigned char *)0xFFF84)\r
+#define FSSQ (*(volatile union un_fssq *)0xFFF85).fssq\r
+#define FSSQ_bit (*(volatile union un_fssq *)0xFFF85).BIT\r
+#define FLSEDL (*(volatile unsigned short *)0xFFF86)\r
+#define FLSEDH (*(volatile unsigned char *)0xFFF88)\r
+#define FLRST (*(volatile union un_flrst *)0xFFF89).flrst\r
+#define FLRST_bit (*(volatile union un_flrst *)0xFFF89).BIT\r
+#define FSASTL (*(volatile union un_fsastl *)0xFFF8A).fsastl\r
+#define FSASTL_bit (*(volatile union un_fsastl *)0xFFF8A).BIT\r
+#define FSASTH (*(volatile union un_fsasth *)0xFFF8B).fsasth\r
+#define FSASTH_bit (*(volatile union un_fsasth *)0xFFF8B).BIT\r
+#define FLWL (*(volatile unsigned short *)0xFFF8C)\r
+#define FLWH (*(volatile unsigned short *)0xFFF8E)\r
+#define ITMC (*(volatile unsigned short *)0xFFF90)\r
+#define SEC (*(volatile unsigned char *)0xFFF92)\r
+#define MIN (*(volatile unsigned char *)0xFFF93)\r
+#define HOUR (*(volatile unsigned char *)0xFFF94)\r
+#define WEEK (*(volatile unsigned char *)0xFFF95)\r
+#define DAY (*(volatile unsigned char *)0xFFF96)\r
+#define MONTH (*(volatile unsigned char *)0xFFF97)\r
+#define YEAR (*(volatile unsigned char *)0xFFF98)\r
+#define SUBCUD (*(volatile unsigned char *)0xFFF99)\r
+#define ALARMWM (*(volatile unsigned char *)0xFFF9A)\r
+#define ALARMWH (*(volatile unsigned char *)0xFFF9B)\r
+#define ALARMWW (*(volatile unsigned char *)0xFFF9C)\r
+#define RTCC0 (*(volatile union un_rtcc0 *)0xFFF9D).rtcc0\r
+#define RTCC0_bit (*(volatile union un_rtcc0 *)0xFFF9D).BIT\r
+#define RTCC1 (*(volatile union un_rtcc1 *)0xFFF9E).rtcc1\r
+#define RTCC1_bit (*(volatile union un_rtcc1 *)0xFFF9E).BIT\r
+#define CMC (*(volatile unsigned char *)0xFFFA0)\r
+#define CSC (*(volatile union un_csc *)0xFFFA1).csc\r
+#define CSC_bit (*(volatile union un_csc *)0xFFFA1).BIT\r
+#define OSTC (*(volatile union un_ostc *)0xFFFA2).ostc\r
+#define OSTC_bit (*(volatile union un_ostc *)0xFFFA2).BIT\r
+#define OSTS (*(volatile unsigned char *)0xFFFA3)\r
+#define CKC (*(volatile union un_ckc *)0xFFFA4).ckc\r
+#define CKC_bit (*(volatile union un_ckc *)0xFFFA4).BIT\r
+#define CKS0 (*(volatile union un_cks0 *)0xFFFA5).cks0\r
+#define CKS0_bit (*(volatile union un_cks0 *)0xFFFA5).BIT\r
+#define CKS1 (*(volatile union un_cks1 *)0xFFFA6).cks1\r
+#define CKS1_bit (*(volatile union un_cks1 *)0xFFFA6).BIT\r
+#define RESF (*(volatile unsigned char *)0xFFFA8)\r
+#define LVIM (*(volatile union un_lvim *)0xFFFA9).lvim\r
+#define LVIM_bit (*(volatile union un_lvim *)0xFFFA9).BIT\r
+#define LVIS (*(volatile union un_lvis *)0xFFFAA).lvis\r
+#define LVIS_bit (*(volatile union un_lvis *)0xFFFAA).BIT\r
+#define WDTE (*(volatile unsigned char *)0xFFFAB)\r
+#define CRCIN (*(volatile unsigned char *)0xFFFAC)\r
+#define RXB (*(volatile unsigned char *)0xFFFAD)\r
+#define TXS (*(volatile unsigned char *)0xFFFAD)\r
+#define MONSTA0 (*(volatile union un_monsta0 *)0xFFFAE).monsta0\r
+#define MONSTA0_bit (*(volatile union un_monsta0 *)0xFFFAE).BIT\r
+#define ASIM (*(volatile union un_asim *)0xFFFAF).asim\r
+#define ASIM_bit (*(volatile union un_asim *)0xFFFAF).BIT\r
+#define DSA0 (*(volatile unsigned char *)0xFFFB0)\r
+#define DSA1 (*(volatile unsigned char *)0xFFFB1)\r
+#define DRA0 (*(volatile unsigned short *)0xFFFB2)\r
+#define DRA0L (*(volatile unsigned char *)0xFFFB2)\r
+#define DRA0H (*(volatile unsigned char *)0xFFFB3)\r
+#define DRA1 (*(volatile unsigned short *)0xFFFB4)\r
+#define DRA1L (*(volatile unsigned char *)0xFFFB4)\r
+#define DRA1H (*(volatile unsigned char *)0xFFFB5)\r
+#define DBC0 (*(volatile unsigned short *)0xFFFB6)\r
+#define DBC0L (*(volatile unsigned char *)0xFFFB6)\r
+#define DBC0H (*(volatile unsigned char *)0xFFFB7)\r
+#define DBC1 (*(volatile unsigned short *)0xFFFB8)\r
+#define DBC1L (*(volatile unsigned char *)0xFFFB8)\r
+#define DBC1H (*(volatile unsigned char *)0xFFFB9)\r
+#define DMC0 (*(volatile union un_dmc0 *)0xFFFBA).dmc0\r
+#define DMC0_bit (*(volatile union un_dmc0 *)0xFFFBA).BIT\r
+#define DMC1 (*(volatile union un_dmc1 *)0xFFFBB).dmc1\r
+#define DMC1_bit (*(volatile union un_dmc1 *)0xFFFBB).BIT\r
+#define DRC0 (*(volatile union un_drc0 *)0xFFFBC).drc0\r
+#define DRC0_bit (*(volatile union un_drc0 *)0xFFFBC).BIT\r
+#define DRC1 (*(volatile union un_drc1 *)0xFFFBD).drc1\r
+#define DRC1_bit (*(volatile union un_drc1 *)0xFFFBD).BIT\r
+#define IF2 (*(volatile union un_if2 *)0xFFFD0).if2\r
+#define IF2_bit (*(volatile union un_if2 *)0xFFFD0).BIT\r
+#define IF2L (*(volatile union un_if2l *)0xFFFD0).if2l\r
+#define IF2L_bit (*(volatile union un_if2l *)0xFFFD0).BIT\r
+#define IF2H (*(volatile union un_if2h *)0xFFFD1).if2h\r
+#define IF2H_bit (*(volatile union un_if2h *)0xFFFD1).BIT\r
+#define MK2 (*(volatile union un_mk2 *)0xFFFD4).mk2\r
+#define MK2_bit (*(volatile union un_mk2 *)0xFFFD4).BIT\r
+#define MK2L (*(volatile union un_mk2l *)0xFFFD4).mk2l\r
+#define MK2L_bit (*(volatile union un_mk2l *)0xFFFD4).BIT\r
+#define MK2H (*(volatile union un_mk2h *)0xFFFD5).mk2h\r
+#define MK2H_bit (*(volatile union un_mk2h *)0xFFFD5).BIT\r
+#define PR02 (*(volatile union un_pr02 *)0xFFFD8).pr02\r
+#define PR02_bit (*(volatile union un_pr02 *)0xFFFD8).BIT\r
+#define PR02L (*(volatile union un_pr02l *)0xFFFD8).pr02l\r
+#define PR02L_bit (*(volatile union un_pr02l *)0xFFFD8).BIT\r
+#define PR02H (*(volatile union un_pr02h *)0xFFFD9).pr02h\r
+#define PR02H_bit (*(volatile union un_pr02h *)0xFFFD9).BIT\r
+#define PR12 (*(volatile union un_pr12 *)0xFFFDC).pr12\r
+#define PR12_bit (*(volatile union un_pr12 *)0xFFFDC).BIT\r
+#define PR12L (*(volatile union un_pr12l *)0xFFFDC).pr12l\r
+#define PR12L_bit (*(volatile union un_pr12l *)0xFFFDC).BIT\r
+#define PR12H (*(volatile union un_pr12h *)0xFFFDD).pr12h\r
+#define PR12H_bit (*(volatile union un_pr12h *)0xFFFDD).BIT\r
+#define IF0 (*(volatile union un_if0 *)0xFFFE0).if0\r
+#define IF0_bit (*(volatile union un_if0 *)0xFFFE0).BIT\r
+#define IF0L (*(volatile union un_if0l *)0xFFFE0).if0l\r
+#define IF0L_bit (*(volatile union un_if0l *)0xFFFE0).BIT\r
+#define IF0H (*(volatile union un_if0h *)0xFFFE1).if0h\r
+#define IF0H_bit (*(volatile union un_if0h *)0xFFFE1).BIT\r
+#define IF1 (*(volatile union un_if1 *)0xFFFE2).if1\r
+#define IF1_bit (*(volatile union un_if1 *)0xFFFE2).BIT\r
+#define IF1L (*(volatile union un_if1l *)0xFFFE2).if1l\r
+#define IF1L_bit (*(volatile union un_if1l *)0xFFFE2).BIT\r
+#define IF1H (*(volatile union un_if1h *)0xFFFE3).if1h\r
+#define IF1H_bit (*(volatile union un_if1h *)0xFFFE3).BIT\r
+#define MK0 (*(volatile union un_mk0 *)0xFFFE4).mk0\r
+#define MK0_bit (*(volatile union un_mk0 *)0xFFFE4).BIT\r
+#define MK0L (*(volatile union un_mk0l *)0xFFFE4).mk0l\r
+#define MK0L_bit (*(volatile union un_mk0l *)0xFFFE4).BIT\r
+#define MK0H (*(volatile union un_mk0h *)0xFFFE5).mk0h\r
+#define MK0H_bit (*(volatile union un_mk0h *)0xFFFE5).BIT\r
+#define MK1 (*(volatile union un_mk1 *)0xFFFE6).mk1\r
+#define MK1_bit (*(volatile union un_mk1 *)0xFFFE6).BIT\r
+#define MK1L (*(volatile union un_mk1l *)0xFFFE6).mk1l\r
+#define MK1L_bit (*(volatile union un_mk1l *)0xFFFE6).BIT\r
+#define MK1H (*(volatile union un_mk1h *)0xFFFE7).mk1h\r
+#define MK1H_bit (*(volatile union un_mk1h *)0xFFFE7).BIT\r
+#define PR00 (*(volatile union un_pr00 *)0xFFFE8).pr00\r
+#define PR00_bit (*(volatile union un_pr00 *)0xFFFE8).BIT\r
+#define PR00L (*(volatile union un_pr00l *)0xFFFE8).pr00l\r
+#define PR00L_bit (*(volatile union un_pr00l *)0xFFFE8).BIT\r
+#define PR00H (*(volatile union un_pr00h *)0xFFFE9).pr00h\r
+#define PR00H_bit (*(volatile union un_pr00h *)0xFFFE9).BIT\r
+#define PR01 (*(volatile union un_pr01 *)0xFFFEA).pr01\r
+#define PR01_bit (*(volatile union un_pr01 *)0xFFFEA).BIT\r
+#define PR01L (*(volatile union un_pr01l *)0xFFFEA).pr01l\r
+#define PR01L_bit (*(volatile union un_pr01l *)0xFFFEA).BIT\r
+#define PR01H (*(volatile union un_pr01h *)0xFFFEB).pr01h\r
+#define PR01H_bit (*(volatile union un_pr01h *)0xFFFEB).BIT\r
+#define PR10 (*(volatile union un_pr10 *)0xFFFEC).pr10\r
+#define PR10_bit (*(volatile union un_pr10 *)0xFFFEC).BIT\r
+#define PR10L (*(volatile union un_pr10l *)0xFFFEC).pr10l\r
+#define PR10L_bit (*(volatile union un_pr10l *)0xFFFEC).BIT\r
+#define PR10H (*(volatile union un_pr10h *)0xFFFED).pr10h\r
+#define PR10H_bit (*(volatile union un_pr10h *)0xFFFED).BIT\r
+#define PR11 (*(volatile union un_pr11 *)0xFFFEE).pr11\r
+#define PR11_bit (*(volatile union un_pr11 *)0xFFFEE).BIT\r
+#define PR11L (*(volatile union un_pr11l *)0xFFFEE).pr11l\r
+#define PR11L_bit (*(volatile union un_pr11l *)0xFFFEE).BIT\r
+#define PR11H (*(volatile union un_pr11h *)0xFFFEF).pr11h\r
+#define PR11H_bit (*(volatile union un_pr11h *)0xFFFEF).BIT\r
+#define MDAL (*(volatile unsigned short *)0xFFFF0)\r
+#define MULA (*(volatile unsigned short *)0xFFFF0)\r
+#define MDAH (*(volatile unsigned short *)0xFFFF2)\r
+#define MULB (*(volatile unsigned short *)0xFFFF2)\r
+#define MDBH (*(volatile unsigned short *)0xFFFF4)\r
+#define MULOH (*(volatile unsigned short *)0xFFFF4)\r
+#define MDBL (*(volatile unsigned short *)0xFFFF6)\r
+#define MULOL (*(volatile unsigned short *)0xFFFF6)\r
+#define PMC (*(volatile union un_pmc *)0xFFFFE).pmc\r
+#define PMC_bit (*(volatile union un_pmc *)0xFFFFE).BIT\r
+\r
+/*\r
+ Sfr bits\r
+ */\r
+#define ADCE ADM0_bit.no0\r
+#define ADCS ADM0_bit.no7\r
+#define SPD0 IICS0_bit.no0\r
+#define STD0 IICS0_bit.no1\r
+#define ACKD0 IICS0_bit.no2\r
+#define TRC0 IICS0_bit.no3\r
+#define COI0 IICS0_bit.no4\r
+#define EXC0 IICS0_bit.no5\r
+#define ALD0 IICS0_bit.no6\r
+#define MSTS0 IICS0_bit.no7\r
+#define IICRSV0 IICF0_bit.no0\r
+#define STCEN0 IICF0_bit.no1\r
+#define IICBSY0 IICF0_bit.no6\r
+#define STCF0 IICF0_bit.no7\r
+#define FSSTP FSSQ_bit.no6\r
+#define SQST FSSQ_bit.no7\r
+#define SQEND FSASTH_bit.no6\r
+#define ESQEND FSASTH_bit.no7\r
+#define RTCE RTCC0_bit.no7\r
+#define RWAIT RTCC1_bit.no0\r
+#define RWST RTCC1_bit.no1\r
+#define RIFG RTCC1_bit.no3\r
+#define WAFG RTCC1_bit.no4\r
+#define WALIE RTCC1_bit.no6\r
+#define WALE RTCC1_bit.no7\r
+#define HIOSTOP CSC_bit.no0\r
+#define XTSTOP CSC_bit.no6\r
+#define MSTOP CSC_bit.no7\r
+#define MCM0 CKC_bit.no4\r
+#define MCS CKC_bit.no5\r
+#define CSS CKC_bit.no6\r
+#define PCLOE0 CKS0_bit.no7\r
+#define PCLOE1 CKS1_bit.no7\r
+#define LVIF LVIM_bit.no0\r
+#define LVIOMSK LVIM_bit.no1\r
+#define LVISEN LVIM_bit.no7\r
+#define LVILV LVIS_bit.no0\r
+#define LVIMD LVIS_bit.no7\r
+#define DWAIT0 DMC0_bit.no4\r
+#define DS0 DMC0_bit.no5\r
+#define DRS0 DMC0_bit.no6\r
+#define STG0 DMC0_bit.no7\r
+#define DWAIT1 DMC1_bit.no4\r
+#define DS1 DMC1_bit.no5\r
+#define DRS1 DMC1_bit.no6\r
+#define STG1 DMC1_bit.no7\r
+#define DST0 DRC0_bit.no0\r
+#define DEN0 DRC0_bit.no7\r
+#define DST1 DRC1_bit.no0\r
+#define DEN1 DRC1_bit.no7\r
+#define PIF8 IF2_bit.no5\r
+#define PIF9 IF2_bit.no6\r
+#define MDIF IF2H_bit.no5\r
+#define FLIF IF2H_bit.no7\r
+#define PMK8 MK2_bit.no5\r
+#define PMK9 MK2_bit.no6\r
+#define MDMK MK2H_bit.no5\r
+#define FLMK MK2H_bit.no7\r
+#define PPR08 PR02_bit.no5\r
+#define PPR09 PR02_bit.no6\r
+#define MDPR0 PR02H_bit.no5\r
+#define FLPR0 PR02H_bit.no7\r
+#define PPR18 PR12_bit.no5\r
+#define PPR19 PR12_bit.no6\r
+#define MDPR1 PR12H_bit.no5\r
+#define FLPR1 PR12H_bit.no7\r
+#define WDTIIF IF0_bit.no0\r
+#define LVIIF IF0_bit.no1\r
+#define PIF0 IF0_bit.no2\r
+#define PIF1 IF0_bit.no3\r
+#define PIF2 IF0_bit.no4\r
+#define PIF3 IF0_bit.no5\r
+#define PIF4 IF0_bit.no6\r
+#define PIF5 IF0_bit.no7\r
+#define DMAIF0 IF0H_bit.no3\r
+#define DMAIF1 IF0H_bit.no4\r
+#define CSIIF00 IF0H_bit.no5\r
+#define IICIF00 IF0H_bit.no5\r
+#define STIF0 IF0H_bit.no5\r
+#define TMIF00 IF0H_bit.no6\r
+#define CSIIF01 IF0H_bit.no7\r
+#define IICIF01 IF0H_bit.no7\r
+#define SRIF0 IF0H_bit.no7\r
+#define SREIF0 IF1_bit.no0\r
+#define TMIF01H IF1_bit.no0\r
+#define TMIF03H IF1_bit.no3\r
+#define IICAIF0 IF1_bit.no4\r
+#define TMIF01 IF1_bit.no5\r
+#define TMIF02 IF1_bit.no6\r
+#define TMIF03 IF1_bit.no7\r
+#define ADIF IF1H_bit.no0\r
+#define RTCIF IF1H_bit.no1\r
+#define ITIF IF1H_bit.no2\r
+#define USBIF IF1H_bit.no4\r
+#define RSUIF IF1H_bit.no5\r
+#define WDTIMK MK0_bit.no0\r
+#define LVIMK MK0_bit.no1\r
+#define PMK0 MK0_bit.no2\r
+#define PMK1 MK0_bit.no3\r
+#define PMK2 MK0_bit.no4\r
+#define PMK3 MK0_bit.no5\r
+#define PMK4 MK0_bit.no6\r
+#define PMK5 MK0_bit.no7\r
+#define DMAMK0 MK0H_bit.no3\r
+#define DMAMK1 MK0H_bit.no4\r
+#define CSIMK00 MK0H_bit.no5\r
+#define IICMK00 MK0H_bit.no5\r
+#define STMK0 MK0H_bit.no5\r
+#define TMMK00 MK0H_bit.no6\r
+#define CSIMK01 MK0H_bit.no7\r
+#define IICMK01 MK0H_bit.no7\r
+#define SRMK0 MK0H_bit.no7\r
+#define SREMK0 MK1_bit.no0\r
+#define TMMK01H MK1_bit.no0\r
+#define TMMK03H MK1_bit.no3\r
+#define IICAMK0 MK1_bit.no4\r
+#define TMMK01 MK1_bit.no5\r
+#define TMMK02 MK1_bit.no6\r
+#define TMMK03 MK1_bit.no7\r
+#define ADMK MK1H_bit.no0\r
+#define RTCMK MK1H_bit.no1\r
+#define ITMK MK1H_bit.no2\r
+#define USBMK MK1H_bit.no4\r
+#define RSUMK MK1H_bit.no5\r
+#define WDTIPR0 PR00_bit.no0\r
+#define LVIPR0 PR00_bit.no1\r
+#define PPR00 PR00_bit.no2\r
+#define PPR01 PR00_bit.no3\r
+#define PPR02 PR00_bit.no4\r
+#define PPR03 PR00_bit.no5\r
+#define PPR04 PR00_bit.no6\r
+#define PPR05 PR00_bit.no7\r
+#define DMAPR00 PR00H_bit.no3\r
+#define DMAPR01 PR00H_bit.no4\r
+#define CSIPR000 PR00H_bit.no5\r
+#define IICPR000 PR00H_bit.no5\r
+#define STPR00 PR00H_bit.no5\r
+#define TMPR000 PR00H_bit.no6\r
+#define CSIPR001 PR00H_bit.no7\r
+#define IICPR001 PR00H_bit.no7\r
+#define SRPR00 PR00H_bit.no7\r
+#define SREPR00 PR01_bit.no0\r
+#define TMPR001H PR01_bit.no0\r
+#define TMPR003H PR01_bit.no3\r
+#define IICAPR00 PR01_bit.no4\r
+#define TMPR001 PR01_bit.no5\r
+#define TMPR002 PR01_bit.no6\r
+#define TMPR003 PR01_bit.no7\r
+#define ADPR0 PR01H_bit.no0\r
+#define RTCPR0 PR01H_bit.no1\r
+#define ITPR0 PR01H_bit.no2\r
+#define USBPR0 PR01H_bit.no4\r
+#define RSUPR0 PR01H_bit.no5\r
+#define WDTIPR1 PR10_bit.no0\r
+#define LVIPR1 PR10_bit.no1\r
+#define PPR10 PR10_bit.no2\r
+#define PPR11 PR10_bit.no3\r
+#define PPR12 PR10_bit.no4\r
+#define PPR13 PR10_bit.no5\r
+#define PPR14 PR10_bit.no6\r
+#define PPR15 PR10_bit.no7\r
+#define DMAPR10 PR10H_bit.no3\r
+#define DMAPR11 PR10H_bit.no4\r
+#define CSIPR100 PR10H_bit.no5\r
+#define IICPR100 PR10H_bit.no5\r
+#define STPR10 PR10H_bit.no5\r
+#define TMPR100 PR10H_bit.no6\r
+#define CSIPR101 PR10H_bit.no7\r
+#define IICPR101 PR10H_bit.no7\r
+#define SRPR10 PR10H_bit.no7\r
+#define SREPR10 PR11_bit.no0\r
+#define TMPR101H PR11_bit.no0\r
+#define TMPR103H PR11_bit.no3\r
+#define IICAPR10 PR11_bit.no4\r
+#define TMPR101 PR11_bit.no5\r
+#define TMPR102 PR11_bit.no6\r
+#define TMPR103 PR11_bit.no7\r
+#define ADPR1 PR11H_bit.no0\r
+#define RTCPR1 PR11H_bit.no1\r
+#define ITPR1 PR11H_bit.no2\r
+#define USBPR1 PR11H_bit.no4\r
+#define RSUPR1 PR11H_bit.no5\r
+#define MAA PMC_bit.no0\r
+\r
+/*\r
+ Interrupt vector addresses\r
+ */\r
+#define RST_vect (0x0)\r
+#define INTDBG_vect (0x2)\r
+#define INTSRO_vect (0x4)\r
+#define INTWDTI_vect (0x4)\r
+#define INTLVI_vect (0x6)\r
+#define INTP0_vect (0x8)\r
+#define INTP1_vect (0xA)\r
+#define INTP2_vect (0xC)\r
+#define INTP3_vect (0xE)\r
+#define INTP4_vect (0x10)\r
+#define INTP5_vect (0x12)\r
+#define INTDMA0_vect (0x1A)\r
+#define INTDMA1_vect (0x1C)\r
+#define INTCSI00_vect (0x1E)\r
+#define INTIIC00_vect (0x1E)\r
+#define INTST0_vect (0x1E)\r
+#define INTTM00_vect (0x20)\r
+#define INTCSI01_vect (0x22)\r
+#define INTIIC01_vect (0x22)\r
+#define INTSR0_vect (0x22)\r
+#define INTSRE0_vect (0x24)\r
+#define INTTM01H_vect (0x24)\r
+#define INTTM03H_vect (0x2A)\r
+#define INTIICA0_vect (0x2C)\r
+#define INTTM01_vect (0x2E)\r
+#define INTTM02_vect (0x30)\r
+#define INTTM03_vect (0x32)\r
+#define INTAD_vect (0x34)\r
+#define INTRTC_vect (0x36)\r
+#define INTIT_vect (0x38)\r
+#define INTUSB_vect (0x3C)\r
+#define INTRSUM_vect (0x3E)\r
+#define INTP8_vect (0x4E)\r
+#define INTP9_vect (0x50)\r
+#define INTMD_vect (0x5E)\r
+#define INTFL_vect (0x62)\r
+#define BRK_I_vect (0x7E)\r
+#endif\r
--- /dev/null
+/***********************************************************************/\r
+/* */\r
+/* PROJECT NAME : RTOSDemo */\r
+/* FILE : iodefine_ext.h */\r
+/* DESCRIPTION : Definition of Extended SFRs */\r
+/* CPU SERIES : RL78 - G1C */\r
+/* CPU TYPE : R5F10JBC */\r
+/* */\r
+/* This file is generated by e2studio. */\r
+/* */\r
+/***********************************************************************/\r
+\r
+/************************************************************************/\r
+/* Header file generated from device file: */\r
+/* DR5F10JBC.DVF */\r
+/* Copyright(C) 2012 Renesas */\r
+/* File Version V1.00 */\r
+/* Tool Version 1.9.7121 */\r
+/* Date Generated 13/11/2012 */\r
+/************************************************************************/\r
+\r
+#ifndef __IOREG_BIT_STRUCTURES\r
+#define __IOREG_BIT_STRUCTURES\r
+typedef struct {\r
+ unsigned char no0 :1;\r
+ unsigned char no1 :1;\r
+ unsigned char no2 :1;\r
+ unsigned char no3 :1;\r
+ unsigned char no4 :1;\r
+ unsigned char no5 :1;\r
+ unsigned char no6 :1;\r
+ unsigned char no7 :1;\r
+} __BITS8;\r
+\r
+typedef struct {\r
+ unsigned short no0 :1;\r
+ unsigned short no1 :1;\r
+ unsigned short no2 :1;\r
+ unsigned short no3 :1;\r
+ unsigned short no4 :1;\r
+ unsigned short no5 :1;\r
+ unsigned short no6 :1;\r
+ unsigned short no7 :1;\r
+ unsigned short no8 :1;\r
+ unsigned short no9 :1;\r
+ unsigned short no10 :1;\r
+ unsigned short no11 :1;\r
+ unsigned short no12 :1;\r
+ unsigned short no13 :1;\r
+ unsigned short no14 :1;\r
+ unsigned short no15 :1;\r
+} __BITS16;\r
+\r
+#endif\r
+\r
+#ifndef IODEFINE_EXT_H\r
+#define IODEFINE_EXT_H\r
+\r
+/*\r
+ IO Registers\r
+ */\r
+union un_adm2 {\r
+ unsigned char adm2;\r
+ __BITS8 BIT;\r
+};\r
+union un_pms {\r
+ unsigned char pms;\r
+ __BITS8 BIT;\r
+};\r
+union un_pu0 {\r
+ unsigned char pu0;\r
+ __BITS8 BIT;\r
+};\r
+union un_pu1 {\r
+ unsigned char pu1;\r
+ __BITS8 BIT;\r
+};\r
+union un_pu3 {\r
+ unsigned char pu3;\r
+ __BITS8 BIT;\r
+};\r
+union un_pu4 {\r
+ unsigned char pu4;\r
+ __BITS8 BIT;\r
+};\r
+union un_pu5 {\r
+ unsigned char pu5;\r
+ __BITS8 BIT;\r
+};\r
+union un_pu7 {\r
+ unsigned char pu7;\r
+ __BITS8 BIT;\r
+};\r
+union un_pu12 {\r
+ unsigned char pu12;\r
+ __BITS8 BIT;\r
+};\r
+union un_pim0 {\r
+ unsigned char pim0;\r
+ __BITS8 BIT;\r
+};\r
+union un_pim3 {\r
+ unsigned char pim3;\r
+ __BITS8 BIT;\r
+};\r
+union un_pim5 {\r
+ unsigned char pim5;\r
+ __BITS8 BIT;\r
+};\r
+union un_pom0 {\r
+ unsigned char pom0;\r
+ __BITS8 BIT;\r
+};\r
+union un_pom3 {\r
+ unsigned char pom3;\r
+ __BITS8 BIT;\r
+};\r
+union un_pom5 {\r
+ unsigned char pom5;\r
+ __BITS8 BIT;\r
+};\r
+union un_pmc0 {\r
+ unsigned char pmc0;\r
+ __BITS8 BIT;\r
+};\r
+union un_pmc12 {\r
+ unsigned char pmc12;\r
+ __BITS8 BIT;\r
+};\r
+union un_nfen0 {\r
+ unsigned char nfen0;\r
+ __BITS8 BIT;\r
+};\r
+union un_nfen1 {\r
+ unsigned char nfen1;\r
+ __BITS8 BIT;\r
+};\r
+union un_isc {\r
+ unsigned char isc;\r
+ __BITS8 BIT;\r
+};\r
+union un_dflctl {\r
+ unsigned char dflctl;\r
+ __BITS8 BIT;\r
+};\r
+union un_bectl {\r
+ unsigned char bectl;\r
+ __BITS8 BIT;\r
+};\r
+union un_fsse {\r
+ unsigned char fsse;\r
+ __BITS8 BIT;\r
+};\r
+union un_pfs {\r
+ unsigned char pfs;\r
+ __BITS8 BIT;\r
+};\r
+union un_mduc {\r
+ unsigned char mduc;\r
+ __BITS8 BIT;\r
+};\r
+union un_per0 {\r
+ unsigned char per0;\r
+ __BITS8 BIT;\r
+};\r
+union un_rmc {\r
+ unsigned char rmc;\r
+ __BITS8 BIT;\r
+};\r
+union un_rpectl {\r
+ unsigned char rpectl;\r
+ __BITS8 BIT;\r
+};\r
+union un_se0l {\r
+ unsigned char se0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_ss0l {\r
+ unsigned char ss0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_st0l {\r
+ unsigned char st0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_soe0l {\r
+ unsigned char soe0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_te0l {\r
+ unsigned char te0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_ts0l {\r
+ unsigned char ts0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_tt0l {\r
+ unsigned char tt0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_toe0l {\r
+ unsigned char toe0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_iicctl00 {\r
+ unsigned char iicctl00;\r
+ __BITS8 BIT;\r
+};\r
+union un_iicctl01 {\r
+ unsigned char iicctl01;\r
+ __BITS8 BIT;\r
+};\r
+union un_dscctl {\r
+ unsigned char dscctl;\r
+ __BITS8 BIT;\r
+};\r
+union un_mckc {\r
+ unsigned char mckc;\r
+ __BITS8 BIT;\r
+};\r
+union un_crc0ctl {\r
+ unsigned char crc0ctl;\r
+ __BITS8 BIT;\r
+};\r
+\r
+#define ADM2 (*(volatile union un_adm2 *)0xF0010).adm2\r
+#define ADM2_bit (*(volatile union un_adm2 *)0xF0010).BIT\r
+#define ADUL (*(volatile unsigned char *)0xF0011)\r
+#define ADLL (*(volatile unsigned char *)0xF0012)\r
+#define ADTES (*(volatile unsigned char *)0xF0013)\r
+#define PMS (*(volatile union un_pms *)0xF0018).pms\r
+#define PMS_bit (*(volatile union un_pms *)0xF0018).BIT\r
+#define PIOR (*(volatile unsigned char *)0xF001A)\r
+#define PU0 (*(volatile union un_pu0 *)0xF0030).pu0\r
+#define PU0_bit (*(volatile union un_pu0 *)0xF0030).BIT\r
+#define PU1 (*(volatile union un_pu1 *)0xF0031).pu1\r
+#define PU1_bit (*(volatile union un_pu1 *)0xF0031).BIT\r
+#define PU3 (*(volatile union un_pu3 *)0xF0033).pu3\r
+#define PU3_bit (*(volatile union un_pu3 *)0xF0033).BIT\r
+#define PU4 (*(volatile union un_pu4 *)0xF0034).pu4\r
+#define PU4_bit (*(volatile union un_pu4 *)0xF0034).BIT\r
+#define PU5 (*(volatile union un_pu5 *)0xF0035).pu5\r
+#define PU5_bit (*(volatile union un_pu5 *)0xF0035).BIT\r
+#define PU7 (*(volatile union un_pu7 *)0xF0037).pu7\r
+#define PU7_bit (*(volatile union un_pu7 *)0xF0037).BIT\r
+#define PU12 (*(volatile union un_pu12 *)0xF003C).pu12\r
+#define PU12_bit (*(volatile union un_pu12 *)0xF003C).BIT\r
+#define PIM0 (*(volatile union un_pim0 *)0xF0040).pim0\r
+#define PIM0_bit (*(volatile union un_pim0 *)0xF0040).BIT\r
+#define PIM3 (*(volatile union un_pim3 *)0xF0043).pim3\r
+#define PIM3_bit (*(volatile union un_pim3 *)0xF0043).BIT\r
+#define PIM5 (*(volatile union un_pim5 *)0xF0045).pim5\r
+#define PIM5_bit (*(volatile union un_pim5 *)0xF0045).BIT\r
+#define POM0 (*(volatile union un_pom0 *)0xF0050).pom0\r
+#define POM0_bit (*(volatile union un_pom0 *)0xF0050).BIT\r
+#define POM3 (*(volatile union un_pom3 *)0xF0053).pom3\r
+#define POM3_bit (*(volatile union un_pom3 *)0xF0053).BIT\r
+#define POM5 (*(volatile union un_pom5 *)0xF0055).pom5\r
+#define POM5_bit (*(volatile union un_pom5 *)0xF0055).BIT\r
+#define PMC0 (*(volatile union un_pmc0 *)0xF0060).pmc0\r
+#define PMC0_bit (*(volatile union un_pmc0 *)0xF0060).BIT\r
+#define PMC12 (*(volatile union un_pmc12 *)0xF006C).pmc12\r
+#define PMC12_bit (*(volatile union un_pmc12 *)0xF006C).BIT\r
+#define NFEN0 (*(volatile union un_nfen0 *)0xF0070).nfen0\r
+#define NFEN0_bit (*(volatile union un_nfen0 *)0xF0070).BIT\r
+#define NFEN1 (*(volatile union un_nfen1 *)0xF0071).nfen1\r
+#define NFEN1_bit (*(volatile union un_nfen1 *)0xF0071).BIT\r
+#define ISC (*(volatile union un_isc *)0xF0073).isc\r
+#define ISC_bit (*(volatile union un_isc *)0xF0073).BIT\r
+#define TIS0 (*(volatile unsigned char *)0xF0074)\r
+#define ADPC (*(volatile unsigned char *)0xF0076)\r
+#define IAWCTL (*(volatile unsigned char *)0xF0077)\r
+#define PRDSEL (*(volatile unsigned short *)0xF007E)\r
+#define TOOLEN (*(volatile unsigned char *)0xF0080)\r
+#define BPAL0 (*(volatile unsigned char *)0xF0081)\r
+#define BPAH0 (*(volatile unsigned char *)0xF0082)\r
+#define BPAS0 (*(volatile unsigned char *)0xF0083)\r
+#define BACDVL0 (*(volatile unsigned char *)0xF0084)\r
+#define BACDVH0 (*(volatile unsigned char *)0xF0085)\r
+#define BACDML0 (*(volatile unsigned char *)0xF0086)\r
+#define BACDMH0 (*(volatile unsigned char *)0xF0087)\r
+#define MONMOD (*(volatile unsigned char *)0xF0088)\r
+#define DFLCTL (*(volatile union un_dflctl *)0xF0090).dflctl\r
+#define DFLCTL_bit (*(volatile union un_dflctl *)0xF0090).BIT\r
+#define HIOTRM (*(volatile unsigned char *)0xF00A0)\r
+#define BECTL (*(volatile union un_bectl *)0xF00A1).bectl\r
+#define BECTL_bit (*(volatile union un_bectl *)0xF00A1).BIT\r
+#define HOCODIV (*(volatile unsigned char *)0xF00A8)\r
+#define TEMPCAL0 (*(volatile unsigned char *)0xF00AC)\r
+#define TEMPCAL1 (*(volatile unsigned char *)0xF00AD)\r
+#define TEMPCAL2 (*(volatile unsigned char *)0xF00AE)\r
+#define TEMPCAL3 (*(volatile unsigned char *)0xF00AF)\r
+#define FLSEC (*(volatile unsigned short *)0xF00B0)\r
+#define FLFSWS (*(volatile unsigned short *)0xF00B2)\r
+#define FLFSWE (*(volatile unsigned short *)0xF00B4)\r
+#define FSSET (*(volatile unsigned char *)0xF00B6)\r
+#define FSSE (*(volatile union un_fsse *)0xF00B7).fsse\r
+#define FSSE_bit (*(volatile union un_fsse *)0xF00B7).BIT\r
+#define FLFADL (*(volatile unsigned short *)0xF00B8)\r
+#define FLFADH (*(volatile unsigned char *)0xF00BA)\r
+#define PFCMD (*(volatile unsigned char *)0xF00C0)\r
+#define PFS (*(volatile union un_pfs *)0xF00C1).pfs\r
+#define PFS_bit (*(volatile union un_pfs *)0xF00C1).BIT\r
+#define FLRL (*(volatile unsigned short *)0xF00C2)\r
+#define FLRH (*(volatile unsigned short *)0xF00C4)\r
+#define FLWE (*(volatile unsigned char *)0xF00C6)\r
+#define FLRE (*(volatile unsigned char *)0xF00C7)\r
+#define FLTMS (*(volatile unsigned short *)0xF00C8)\r
+#define DFLMC (*(volatile unsigned short *)0xF00CA)\r
+#define FLMCL (*(volatile unsigned short *)0xF00CC)\r
+#define FLMCH (*(volatile unsigned char *)0xF00CE)\r
+#define FSCTL (*(volatile unsigned char *)0xF00CF)\r
+#define ICEADR (*(volatile unsigned short *)0xF00D0)\r
+#define ICEDAT (*(volatile unsigned short *)0xF00D2)\r
+#define MDCL (*(volatile unsigned short *)0xF00E0)\r
+#define MDCH (*(volatile unsigned short *)0xF00E2)\r
+#define MDUC (*(volatile union un_mduc *)0xF00E8).mduc\r
+#define MDUC_bit (*(volatile union un_mduc *)0xF00E8).BIT\r
+#define PER0 (*(volatile union un_per0 *)0xF00F0).per0\r
+#define PER0_bit (*(volatile union un_per0 *)0xF00F0).BIT\r
+#define OSMC (*(volatile unsigned char *)0xF00F3)\r
+#define RMC (*(volatile union un_rmc *)0xF00F4).rmc\r
+#define RMC_bit (*(volatile union un_rmc *)0xF00F4).BIT\r
+#define RPECTL (*(volatile union un_rpectl *)0xF00F5).rpectl\r
+#define RPECTL_bit (*(volatile union un_rpectl *)0xF00F5).BIT\r
+#define BCDADJ (*(volatile unsigned char *)0xF00FE)\r
+#define VECTCTRL (*(volatile unsigned char *)0xF00FF)\r
+#define SSR00 (*(volatile unsigned short *)0xF0100)\r
+#define SSR00L (*(volatile unsigned char *)0xF0100)\r
+#define SSR01 (*(volatile unsigned short *)0xF0102)\r
+#define SSR01L (*(volatile unsigned char *)0xF0102)\r
+#define SIR00 (*(volatile unsigned short *)0xF0108)\r
+#define SIR00L (*(volatile unsigned char *)0xF0108)\r
+#define SIR01 (*(volatile unsigned short *)0xF010A)\r
+#define SIR01L (*(volatile unsigned char *)0xF010A)\r
+#define SMR00 (*(volatile unsigned short *)0xF0110)\r
+#define SMR01 (*(volatile unsigned short *)0xF0112)\r
+#define SCR00 (*(volatile unsigned short *)0xF0118)\r
+#define SCR01 (*(volatile unsigned short *)0xF011A)\r
+#define SE0 (*(volatile unsigned short *)0xF0120)\r
+#define SE0L (*(volatile union un_se0l *)0xF0120).se0l\r
+#define SE0L_bit (*(volatile union un_se0l *)0xF0120).BIT\r
+#define SS0 (*(volatile unsigned short *)0xF0122)\r
+#define SS0L (*(volatile union un_ss0l *)0xF0122).ss0l\r
+#define SS0L_bit (*(volatile union un_ss0l *)0xF0122).BIT\r
+#define ST0 (*(volatile unsigned short *)0xF0124)\r
+#define ST0L (*(volatile union un_st0l *)0xF0124).st0l\r
+#define ST0L_bit (*(volatile union un_st0l *)0xF0124).BIT\r
+#define SPS0 (*(volatile unsigned short *)0xF0126)\r
+#define SPS0L (*(volatile unsigned char *)0xF0126)\r
+#define SO0 (*(volatile unsigned short *)0xF0128)\r
+#define SOE0 (*(volatile unsigned short *)0xF012A)\r
+#define SOE0L (*(volatile union un_soe0l *)0xF012A).soe0l\r
+#define SOE0L_bit (*(volatile union un_soe0l *)0xF012A).BIT\r
+#define EDR00 (*(volatile unsigned short *)0xF012C)\r
+#define EDR00L (*(volatile unsigned char *)0xF012C)\r
+#define EDR01 (*(volatile unsigned short *)0xF012E)\r
+#define EDR01L (*(volatile unsigned char *)0xF012E)\r
+#define SOL0 (*(volatile unsigned short *)0xF0134)\r
+#define SOL0L (*(volatile unsigned char *)0xF0134)\r
+#define SSC0 (*(volatile unsigned short *)0xF0138)\r
+#define SSC0L (*(volatile unsigned char *)0xF0138)\r
+#define TCR00 (*(volatile unsigned short *)0xF0180)\r
+#define TCR01 (*(volatile unsigned short *)0xF0182)\r
+#define TCR02 (*(volatile unsigned short *)0xF0184)\r
+#define TCR03 (*(volatile unsigned short *)0xF0186)\r
+#define TMR00 (*(volatile unsigned short *)0xF0190)\r
+#define TMR01 (*(volatile unsigned short *)0xF0192)\r
+#define TMR02 (*(volatile unsigned short *)0xF0194)\r
+#define TMR03 (*(volatile unsigned short *)0xF0196)\r
+#define TSR00 (*(volatile unsigned short *)0xF01A0)\r
+#define TSR00L (*(volatile unsigned char *)0xF01A0)\r
+#define TSR01 (*(volatile unsigned short *)0xF01A2)\r
+#define TSR01L (*(volatile unsigned char *)0xF01A2)\r
+#define TSR02 (*(volatile unsigned short *)0xF01A4)\r
+#define TSR02L (*(volatile unsigned char *)0xF01A4)\r
+#define TSR03 (*(volatile unsigned short *)0xF01A6)\r
+#define TSR03L (*(volatile unsigned char *)0xF01A6)\r
+#define TE0 (*(volatile unsigned short *)0xF01B0)\r
+#define TE0L (*(volatile union un_te0l *)0xF01B0).te0l\r
+#define TE0L_bit (*(volatile union un_te0l *)0xF01B0).BIT\r
+#define TS0 (*(volatile unsigned short *)0xF01B2)\r
+#define TS0L (*(volatile union un_ts0l *)0xF01B2).ts0l\r
+#define TS0L_bit (*(volatile union un_ts0l *)0xF01B2).BIT\r
+#define TT0 (*(volatile unsigned short *)0xF01B4)\r
+#define TT0L (*(volatile union un_tt0l *)0xF01B4).tt0l\r
+#define TT0L_bit (*(volatile union un_tt0l *)0xF01B4).BIT\r
+#define TPS0 (*(volatile unsigned short *)0xF01B6)\r
+#define TO0 (*(volatile unsigned short *)0xF01B8)\r
+#define TO0L (*(volatile unsigned char *)0xF01B8)\r
+#define TOE0 (*(volatile unsigned short *)0xF01BA)\r
+#define TOE0L (*(volatile union un_toe0l *)0xF01BA).toe0l\r
+#define TOE0L_bit (*(volatile union un_toe0l *)0xF01BA).BIT\r
+#define TOL0 (*(volatile unsigned short *)0xF01BC)\r
+#define TOL0L (*(volatile unsigned char *)0xF01BC)\r
+#define TOM0 (*(volatile unsigned short *)0xF01BE)\r
+#define TOM0L (*(volatile unsigned char *)0xF01BE)\r
+#define IICCTL00 (*(volatile union un_iicctl00 *)0xF0230).iicctl00\r
+#define IICCTL00_bit (*(volatile union un_iicctl00 *)0xF0230).BIT\r
+#define IICCTL01 (*(volatile union un_iicctl01 *)0xF0231).iicctl01\r
+#define IICCTL01_bit (*(volatile union un_iicctl01 *)0xF0231).BIT\r
+#define IICWL0 (*(volatile unsigned char *)0xF0232)\r
+#define IICWH0 (*(volatile unsigned char *)0xF0233)\r
+#define SVA0 (*(volatile unsigned char *)0xF0234)\r
+#define IICSE0 (*(volatile unsigned char *)0xF0235)\r
+#define DSCCTL (*(volatile union un_dscctl *)0xF02E5).dscctl\r
+#define DSCCTL_bit (*(volatile union un_dscctl *)0xF02E5).BIT\r
+#define MCKC (*(volatile union un_mckc *)0xF02E6).mckc\r
+#define MCKC_bit (*(volatile union un_mckc *)0xF02E6).BIT\r
+#define CRC0CTL (*(volatile union un_crc0ctl *)0xF02F0).crc0ctl\r
+#define CRC0CTL_bit (*(volatile union un_crc0ctl *)0xF02F0).BIT\r
+#define PGCRCL (*(volatile unsigned short *)0xF02F2)\r
+#define CRCD (*(volatile unsigned short *)0xF02FA)\r
+#define SYSCFG (*(volatile unsigned short *)0xF0400)\r
+#define SYSCFG1 (*(volatile unsigned short *)0xF0402)\r
+#define SYSSTS0 (*(volatile unsigned short *)0xF0404)\r
+#define SYSSTS1 (*(volatile unsigned short *)0xF0406)\r
+#define DVSTCTR0 (*(volatile unsigned short *)0xF0408)\r
+#define DVSTCTR1 (*(volatile unsigned short *)0xF040A)\r
+#define DMA0PCFG (*(volatile unsigned short *)0xF0410)\r
+#define DMA1PCFG (*(volatile unsigned short *)0xF0412)\r
+#define CFIFOM (*(volatile unsigned short *)0xF0414)\r
+#define CFIFOML (*(volatile unsigned char *)0xF0414)\r
+#define D0FIFOM (*(volatile unsigned short *)0xF0418)\r
+#define D0FIFOML (*(volatile unsigned char *)0xF0418)\r
+#define D1FIFOM (*(volatile unsigned short *)0xF041C)\r
+#define D1FIFOML (*(volatile unsigned char *)0xF041C)\r
+#define CFIFOSEL (*(volatile unsigned short *)0xF0420)\r
+#define CFIFOCTR (*(volatile unsigned short *)0xF0422)\r
+#define D0FIFOSEL (*(volatile unsigned short *)0xF0428)\r
+#define D0FIFOCTR (*(volatile unsigned short *)0xF042A)\r
+#define D1FIFOSEL (*(volatile unsigned short *)0xF042C)\r
+#define D1FIFOCTR (*(volatile unsigned short *)0xF042E)\r
+#define INTENB0 (*(volatile unsigned short *)0xF0430)\r
+#define INTENB1 (*(volatile unsigned short *)0xF0432)\r
+#define INTENB2 (*(volatile unsigned short *)0xF0434)\r
+#define BRDYENB (*(volatile unsigned short *)0xF0436)\r
+#define NRDYENB (*(volatile unsigned short *)0xF0438)\r
+#define BEMPENB (*(volatile unsigned short *)0xF043A)\r
+#define SOFCFG (*(volatile unsigned short *)0xF043C)\r
+#define INTSTS0 (*(volatile unsigned short *)0xF0440)\r
+#define INTSTS1 (*(volatile unsigned short *)0xF0442)\r
+#define INTSTS2 (*(volatile unsigned short *)0xF0444)\r
+#define BRDYSTS (*(volatile unsigned short *)0xF0446)\r
+#define NRDYSTS (*(volatile unsigned short *)0xF0448)\r
+#define BEMPSTS (*(volatile unsigned short *)0xF044A)\r
+#define FRMNUM (*(volatile unsigned short *)0xF044C)\r
+#define USBADDR (*(volatile unsigned short *)0xF0450)\r
+#define USBREQ (*(volatile unsigned short *)0xF0454)\r
+#define USBVAL (*(volatile unsigned short *)0xF0456)\r
+#define USBINDX (*(volatile unsigned short *)0xF0458)\r
+#define USBLENG (*(volatile unsigned short *)0xF045A)\r
+#define DCPCFG (*(volatile unsigned short *)0xF045C)\r
+#define DCPMAXP (*(volatile unsigned short *)0xF045E)\r
+#define DCPCTR (*(volatile unsigned short *)0xF0460)\r
+#define PIPESEL (*(volatile unsigned short *)0xF0464)\r
+#define PIPECFG (*(volatile unsigned short *)0xF0468)\r
+#define PIPEMAXP (*(volatile unsigned short *)0xF046C)\r
+#define PIPEPERI (*(volatile unsigned short *)0xF046E)\r
+#define PIPE4CTR (*(volatile unsigned short *)0xF0476)\r
+#define PIPE5CTR (*(volatile unsigned short *)0xF0478)\r
+#define PIPE6CTR (*(volatile unsigned short *)0xF047A)\r
+#define PIPE7CTR (*(volatile unsigned short *)0xF047C)\r
+#define PIPE4TRE (*(volatile unsigned short *)0xF049C)\r
+#define PIPE4TRN (*(volatile unsigned short *)0xF049E)\r
+#define PIPE5TRE (*(volatile unsigned short *)0xF04A0)\r
+#define PIPE5TRN (*(volatile unsigned short *)0xF04A2)\r
+#define USBBCCTRL0 (*(volatile unsigned short *)0xF04B0)\r
+#define USBBCCTRL1 (*(volatile unsigned short *)0xF04B4)\r
+#define USBBCOPT0 (*(volatile unsigned short *)0xF04B8)\r
+#define USBBCOPT1 (*(volatile unsigned short *)0xF04BC)\r
+#define USBMC (*(volatile unsigned short *)0xF04CC)\r
+#define DEVADD0 (*(volatile unsigned short *)0xF04D0)\r
+#define DEVADD1 (*(volatile unsigned short *)0xF04D2)\r
+#define DEVADD2 (*(volatile unsigned short *)0xF04D4)\r
+#define DEVADD3 (*(volatile unsigned short *)0xF04D6)\r
+#define DEVADD4 (*(volatile unsigned short *)0xF04D8)\r
+#define DEVADD5 (*(volatile unsigned short *)0xF04DA)\r
+\r
+/*\r
+ Sfr bits\r
+ */\r
+#define ADTYP ADM2_bit.no0\r
+#define AWC ADM2_bit.no2\r
+#define ADRCK ADM2_bit.no3\r
+#define DFLEN DFLCTL_bit.no0\r
+#define BRSAM BECTL_bit.no0\r
+#define ESQST FSSE_bit.no7\r
+#define DIVST MDUC_bit.no0\r
+#define MACSF MDUC_bit.no1\r
+#define MACOF MDUC_bit.no2\r
+#define MDSM MDUC_bit.no3\r
+#define MACMODE MDUC_bit.no6\r
+#define DIVMODE MDUC_bit.no7\r
+#define TAU0EN PER0_bit.no0\r
+#define SAU0EN PER0_bit.no2\r
+#define IICA0EN PER0_bit.no4\r
+#define ADCEN PER0_bit.no5\r
+#define RTCEN PER0_bit.no7\r
+#define PAENB RMC_bit.no0\r
+#define WDVOL RMC_bit.no7\r
+#define RPEF RPECTL_bit.no0\r
+#define RPERDIS RPECTL_bit.no7\r
+#define SPT0 IICCTL00_bit.no0\r
+#define STT0 IICCTL00_bit.no1\r
+#define ACKE0 IICCTL00_bit.no2\r
+#define WTIM0 IICCTL00_bit.no3\r
+#define SPIE0 IICCTL00_bit.no4\r
+#define WREL0 IICCTL00_bit.no5\r
+#define LREL0 IICCTL00_bit.no6\r
+#define IICE0 IICCTL00_bit.no7\r
+#define PRS0 IICCTL01_bit.no0\r
+#define DFC0 IICCTL01_bit.no2\r
+#define SMC0 IICCTL01_bit.no3\r
+#define DAD0 IICCTL01_bit.no4\r
+#define CLD0 IICCTL01_bit.no5\r
+#define WUP0 IICCTL01_bit.no7\r
+#define CRC0EN CRC0CTL_bit.no7\r
+\r
+/*\r
+ Interrupt vector addresses\r
+ */\r
+#endif\r
projects / freertos / commitdiff