Update Keil XMC1000 to later version.

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@2035 1d2547de-c912-0410-9cb9-b8ca96c0e9e2

diff --git a/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/Keil_Specific/system_XMC1100.c b/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/Keil_Specific/system_XMC1100.c
index 99884b3e9a21aaf8b50c56441ea2de8933314e43..95d7a36bd9a449ba7f451d82fe9aec2c3eb690dd 100644 (file)
--- a/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/Keil_Specific/system_XMC1100.c
+++ b/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/Keil_Specific/system_XMC1100.c
@@ -2,8 +2,8 @@
  * @file     system_XMC1100.c\r
  * @brief    Device specific initialization for the XMC1100-Series according \r
  * to CMSIS\r
- * @version  V1.2\r
- * @date     13 Dec 2012\r
+ * @version  V1.4\r
+ * @date     01 Feb 2013\r
  *\r
  * @note\r
  * Copyright (C) 2012-2013 Infineon Technologies AG. All rights reserved.\r
@@ -28,6 +28,8 @@
 /*\r
  * *************************** Change history ********************************\r
  * V1.2, 13 Dec 2012, PKB : Created change history table\r
+ * V1.3, 20 Dec 2012, PKB : Fixed SystemCoreClock computation\r
+ * V1.3, 01 Feb 2013, PKB : SCU_CLOCK -> SCU_CLK\r
  */\r
 \r
 #include "system_XMC1100.h"\r
@@ -41,14 +43,23 @@ extern uint32_t AllowClkInitByStartup(void);
 /*----------------------------------------------------------------------------\r
   Clock Global defines\r
  *----------------------------------------------------------------------------*/\r
-#define DCO_DCLK       64000000UL\r
-\r
+#define DCO_DCLK                  64000000UL\r
+#define DCO_DCLK_MULTIPLIER       16384000UL\r
+#define DCO_DCLK_DIVIDER          9UL\r
+#define MCLK_MHZ                  32000000UL\r
+#define KHZ_MULTIPLIER            1000UL\r
+#define FRACBITS                  8UL\r
 /*----------------------------------------------------------------------------\r
   Clock Variable definitions\r
  *----------------------------------------------------------------------------*/\r
-/*!< System Clock Frequency (Core Clock)*/\r
+/*!< System Clock Frequency (Core Clock) (MCLK on TIMM1) */\r
 uint32_t SystemCoreClock;\r
 \r
+/*----------------------------------------------------------------------------\r
+  Fixed point math definitions\r
+ *----------------------------------------------------------------------------*/\r
+typedef int32_t Q_24_8;\r
+typedef int32_t Q_15_0;\r
 \r
 /**\r
   * @brief  Setup the microcontroller system.\r
@@ -57,6 +68,7 @@ uint32_t SystemCoreClock;
   */\r
 void SystemInit(void)\r
 {    \r
+\r
   /*\r
    * Clock tree setup by CMSIS routines is allowed only in the absence of DAVE\r
    * Clock app.\r
@@ -80,20 +92,39 @@ void SystemInit(void)
   */\r
 void SystemCoreClockUpdate(void)\r
 {\r
-  uint32_t IDIV, CLKCR;\r
+  uint32_t IDIV, FDIV, CLKCR, Clock;\r
 \r
-  CLKCR = SCU_CLOCK -> CLKCR;\r
-  \r
-  IDIV = (CLKCR & SCU_CLOCK_CLKCR_IDIV_Msk) >> SCU_CLOCK_CLKCR_IDIV_Pos;\r
+  CLKCR = SCU_CLK -> CLKCR;\r
+  IDIV = (CLKCR & SCU_CLK_CLKCR_IDIV_Msk) >> SCU_CLK_CLKCR_IDIV_Pos;\r
+  FDIV = (CLKCR & SCU_CLK_CLKCR_FDIV_Msk) >> SCU_CLK_CLKCR_FDIV_Pos;\r
   \r
   if(IDIV)\r
   {\r
-    SystemCoreClock = DCO_DCLK / (2 * IDIV );\r
+    /* Divider is enabled and used */\r
+    if(0 == FDIV)\r
+     {\r
+       /* No fractional divider, so MCLK = DCO_Clk / (2 * IDIV) */\r
+       Clock = MCLK_MHZ / IDIV;\r
+     }\r
+    else\r
+     {\r
+       /* Both integer and fractional divider must be considered */\r
+       /* 1. IDIV + FDIV/256 */\r
+       Q_24_8 FDiv_IDiv_Sum = (IDIV << FRACBITS) + FDIV;  \r
+\r
+       /* 2. Fixed point division Q24.8 / Q9.8 = Q15.0 */\r
+       Q_15_0 ClockVal = (DCO_DCLK_MULTIPLIER << FRACBITS)/ FDiv_IDiv_Sum;\r
+       Clock = ((uint32_t)ClockVal) * KHZ_MULTIPLIER;\r
+       Clock = Clock >> DCO_DCLK_DIVIDER;\r
+     }\r
   }\r
   else\r
   {\r
-    /* Divider bypassed */\r
-    SystemCoreClock = DCO_DCLK;\r
+    /* Divider bypassed. Simply divide DCO_DCLK by 2 */\r
+    Clock = MCLK_MHZ;\r
   }\r
+\r
+  /* Finally with the math class over, update SystemCoreClock */\r
+  SystemCoreClock = Clock;  \r
 }\r
 \r

diff --git a/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/Keil_Specific/system_XMC1200.c b/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/Keil_Specific/system_XMC1200.c
index 5b06bc4c1db90d9e8c25f1d70641c206915d155a..9d559e7e9c7f4f02d8ceccb0ed841689935292f6 100644 (file)
--- a/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/Keil_Specific/system_XMC1200.c
+++ b/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/Keil_Specific/system_XMC1200.c
@@ -2,8 +2,8 @@
  * @file     system_XMC1200.c\r
  * @brief    Device specific initialization for the XMC1200-Series according \r
  * to CMSIS\r
- * @version  V1.2\r
- * @date     13 Dec 2012\r
+ * @version  V1.4\r
+ * @date     01 Feb 2013\r
  *\r
  * @note\r
  * Copyright (C) 2012-2013 Infineon Technologies AG. All rights reserved.\r
@@ -28,9 +28,11 @@
 /*\r
  * *************************** Change history ********************************\r
  * V1.2, 13 Dec 2012, PKB : Created change history table\r
+ * V1.3, 20 Dec 2012, PKB : Fixed SystemCoreClock computation\r
+ * V1.4, 01 Feb 2013, PKB : SCU_CLOCK -> SCU_CLK\r
  */\r
 \r
-#include "System_XMC1200.h"\r
+#include "system_XMC1200.h"\r
 #include <XMC1200.h>\r
 \r
 /*---------------------------------------------------------------------------\r
@@ -41,14 +43,23 @@ extern uint32_t AllowClkInitByStartup(void);
 /*----------------------------------------------------------------------------\r
   Clock Global defines\r
  *----------------------------------------------------------------------------*/\r
-#define DCO_DCLK       64000000UL\r
-\r
+#define DCO_DCLK                  64000000UL\r
+#define DCO_DCLK_MULTIPLIER       16384000UL\r
+#define DCO_DCLK_DIVIDER          9UL\r
+#define MCLK_MHZ                  32000000UL\r
+#define KHZ_MULTIPLIER            1000UL\r
+#define FRACBITS                  8UL\r
 /*----------------------------------------------------------------------------\r
   Clock Variable definitions\r
  *----------------------------------------------------------------------------*/\r
-/*!< System Clock Frequency (Core Clock)*/\r
+/*!< System Clock Frequency (Core Clock) (MCLK on TIMM1) */\r
 uint32_t SystemCoreClock;\r
 \r
+/*----------------------------------------------------------------------------\r
+  Fixed point math definitions\r
+ *----------------------------------------------------------------------------*/\r
+typedef int32_t Q_24_8;\r
+typedef int32_t Q_15_0;\r
 \r
 /**\r
   * @brief  Setup the microcontroller system.\r
@@ -57,6 +68,7 @@ uint32_t SystemCoreClock;
   */\r
 void SystemInit(void)\r
 {    \r
+\r
   /*\r
    * Clock tree setup by CMSIS routines is allowed only in the absence of DAVE\r
    * Clock app.\r
@@ -80,20 +92,39 @@ void SystemInit(void)
   */\r
 void SystemCoreClockUpdate(void)\r
 {\r
-  uint32_t IDIV, CLKCR;\r
+  uint32_t IDIV, FDIV, CLKCR, Clock;\r
 \r
-  CLKCR = SCU_CLOCK -> CLKCR;\r
-  \r
-  IDIV = (CLKCR & SCU_CLOCK_CLKCR_IDIV_Msk) >> SCU_CLOCK_CLKCR_IDIV_Pos;\r
+  CLKCR = SCU_CLK -> CLKCR;\r
+  IDIV = (CLKCR & SCU_CLK_CLKCR_IDIV_Msk) >> SCU_CLK_CLKCR_IDIV_Pos;\r
+  FDIV = (CLKCR & SCU_CLK_CLKCR_FDIV_Msk) >> SCU_CLK_CLKCR_FDIV_Pos;\r
   \r
   if(IDIV)\r
   {\r
-    SystemCoreClock = DCO_DCLK / (2 * IDIV );\r
+    /* Divider is enabled and used */\r
+    if(0 == FDIV)\r
+     {\r
+       /* No fractional divider, so MCLK = DCO_Clk / (2 * IDIV) */\r
+       Clock = MCLK_MHZ / IDIV;\r
+     }\r
+    else\r
+     {\r
+       /* Both integer and fractional divider must be considered */\r
+       /* 1. IDIV + FDIV/256 */\r
+       Q_24_8 FDiv_IDiv_Sum = (IDIV << FRACBITS) + FDIV;  \r
+\r
+       /* 2. Fixed point division Q24.8 / Q9.8 = Q15.0 */\r
+       Q_15_0 ClockVal = (DCO_DCLK_MULTIPLIER << FRACBITS)/ FDiv_IDiv_Sum;\r
+       Clock = ((uint32_t)ClockVal) * KHZ_MULTIPLIER;\r
+       Clock = Clock >> DCO_DCLK_DIVIDER;\r
+     }\r
   }\r
   else\r
   {\r
-    /* Divider bypassed */\r
-    SystemCoreClock = DCO_DCLK;\r
+    /* Divider bypassed. Simply divide DCO_DCLK by 2 */\r
+    Clock = MCLK_MHZ;\r
   }\r
+\r
+  /* Finally with the math class over, update SystemCoreClock */\r
+  SystemCoreClock = Clock;  \r
 }\r
 \r

diff --git a/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/Keil_Specific/system_XMC1300.c b/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/Keil_Specific/system_XMC1300.c
index c83e3fec654803113183e7808f9962bf4126a435..44d0adc21c72048fe7f8226571bc94988d28e1ab 100644 (file)
--- a/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/Keil_Specific/system_XMC1300.c
+++ b/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/Keil_Specific/system_XMC1300.c
@@ -2,8 +2,8 @@
  * @file     system_XMC1300.c\r
  * @brief    Device specific initialization for the XMC1300-Series according \r
  * to CMSIS\r
- * @version  V1.2\r
- * @date     13 Dec 2012\r
+ * @version  V1.4\r
+ * @date     01 Feb 2013\r
  *\r
  * @note\r
  * Copyright (C) 2012-2013 Infineon Technologies AG. All rights reserved.\r
@@ -26,8 +26,10 @@
  *\r
  ******************************************************************************/\r
 /*\r
- * ************************** Change history *********************************\r
- * V1.2, 13 Dec 2012, PKB, Created this table, Changed System_ to system_\r
+ * *************************** Change history ********************************\r
+ * V1.2, 13 Dec 2012, PKB : Created change history table\r
+ * V1.3, 20 Dec 2012, PKB : Fixed SystemCoreClock computation\r
+ * V1.4, 02 Feb 2013, PKB : SCU_CLOCK -> SCU_CLK\r
  */\r
 \r
 #include "system_XMC1300.h"\r
@@ -41,14 +43,23 @@ extern uint32_t AllowClkInitByStartup(void);
 /*----------------------------------------------------------------------------\r
   Clock Global defines\r
  *----------------------------------------------------------------------------*/\r
-#define DCO_DCLK       64000000UL\r
-\r
+#define DCO_DCLK                  64000000UL\r
+#define DCO_DCLK_MULTIPLIER       16384000UL\r
+#define DCO_DCLK_DIVIDER          9UL\r
+#define MCLK_MHZ                  32000000UL\r
+#define KHZ_MULTIPLIER            1000UL\r
+#define FRACBITS                  8UL\r
 /*----------------------------------------------------------------------------\r
   Clock Variable definitions\r
  *----------------------------------------------------------------------------*/\r
-/*!< System Clock Frequency (Core Clock)*/\r
+/*!< System Clock Frequency (Core Clock) (MCLK on TIMM1) */\r
 uint32_t SystemCoreClock;\r
 \r
+/*----------------------------------------------------------------------------\r
+  Fixed point math definitions\r
+ *----------------------------------------------------------------------------*/\r
+typedef int32_t Q_24_8;\r
+typedef int32_t Q_15_0;\r
 \r
 /**\r
   * @brief  Setup the microcontroller system.\r
@@ -57,6 +68,7 @@ uint32_t SystemCoreClock;
   */\r
 void SystemInit(void)\r
 {    \r
+\r
   /*\r
    * Clock tree setup by CMSIS routines is allowed only in the absence of DAVE\r
    * Clock app.\r
@@ -80,20 +92,39 @@ void SystemInit(void)
   */\r
 void SystemCoreClockUpdate(void)\r
 {\r
-  uint32_t IDIV, CLKCR;\r
+  uint32_t IDIV, FDIV, CLKCR, Clock;\r
 \r
-  CLKCR = SCU_CLOCK -> CLKCR;\r
-  \r
-  IDIV = (CLKCR & SCU_CLOCK_CLKCR_IDIV_Msk) >> SCU_CLOCK_CLKCR_IDIV_Pos;\r
+  CLKCR = SCU_CLK -> CLKCR;\r
+  IDIV = (CLKCR & SCU_CLK_CLKCR_IDIV_Msk) >> SCU_CLK_CLKCR_IDIV_Pos;\r
+  FDIV = (CLKCR & SCU_CLK_CLKCR_FDIV_Msk) >> SCU_CLK_CLKCR_FDIV_Pos;\r
   \r
   if(IDIV)\r
   {\r
-    SystemCoreClock = DCO_DCLK / (2 * IDIV );\r
+    /* Divider is enabled and used */\r
+    if(0 == FDIV)\r
+     {\r
+       /* No fractional divider, so MCLK = DCO_Clk / (2 * IDIV) */\r
+       Clock = MCLK_MHZ / IDIV;\r
+     }\r
+    else\r
+     {\r
+       /* Both integer and fractional divider must be considered */\r
+       /* 1. IDIV + FDIV/256 */\r
+       Q_24_8 FDiv_IDiv_Sum = (IDIV << FRACBITS) + FDIV;  \r
+\r
+       /* 2. Fixed point division Q24.8 / Q9.8 = Q15.0 */\r
+       Q_15_0 ClockVal = (DCO_DCLK_MULTIPLIER << FRACBITS)/ FDiv_IDiv_Sum;\r
+       Clock = ((uint32_t)ClockVal) * KHZ_MULTIPLIER;\r
+       Clock = Clock >> DCO_DCLK_DIVIDER;\r
+     }\r
   }\r
   else\r
   {\r
-    /* Divider bypassed */\r
-    SystemCoreClock = DCO_DCLK;\r
+    /* Divider bypassed. Simply divide DCO_DCLK by 2 */\r
+    Clock = MCLK_MHZ;\r
   }\r
+\r
+  /* Finally with the math class over, update SystemCoreClock */\r
+  SystemCoreClock = Clock;  \r
 }\r
 \r

diff --git a/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/RTOSDemo.uvopt b/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/RTOSDemo.uvopt
index 56256eee2db80d99cbf5bb408d4051c92fc3a478..efd8fb8b63a5df85050c23e051e4309a67bb1a30 100644 (file)
--- a/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/RTOSDemo.uvopt
+++ b/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/RTOSDemo.uvopt
@@ -73,7 +73,7 @@
       <OPTFL>
         <tvExp>1</tvExp>
         <tvExpOptDlg>0</tvExpOptDlg>
-        <IsCurrentTarget>1</IsCurrentTarget>
+        <IsCurrentTarget>0</IsCurrentTarget>
       </OPTFL>
       <CpuCode>255</CpuCode>
       <Books>
@@ -150,7 +150,7 @@
         <SetRegEntry>
           <Number>0</Number>
           <Key>DLGUARM</Key>
-          <Name>/</Name>
+          <Name></Name>
         </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
@@ -345,7 +345,7 @@
         <SetRegEntry>
           <Number>0</Number>
           <Key>DLGUARM</Key>
-          <Name>/</Name>
+          <Name></Name>
         </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
@@ -497,7 +497,7 @@
       <OPTFL>
         <tvExp>1</tvExp>
         <tvExpOptDlg>0</tvExpOptDlg>
-        <IsCurrentTarget>0</IsCurrentTarget>
+        <IsCurrentTarget>1</IsCurrentTarget>
       </OPTFL>
       <CpuCode>255</CpuCode>
       <Books>
@@ -574,7 +574,7 @@
         <SetRegEntry>
           <Number>0</Number>
           <Key>DLGUARM</Key>
-          <Name></Name>
+          <Name>/</Name>
         </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
@@ -703,8 +703,8 @@
       <Focus>0</Focus>
       <ColumnNumber>0</ColumnNumber>
       <tvExpOptDlg>0</tvExpOptDlg>
-      <TopLine>0</TopLine>
-      <CurrentLine>0</CurrentLine>
+      <TopLine>1</TopLine>
+      <CurrentLine>1</CurrentLine>
       <bDave2>0</bDave2>
       <PathWithFileName>.\Keil_Specific\system_XMC1300.c</PathWithFileName>
       <FilenameWithoutPath>system_XMC1300.c</FilenameWithoutPath>
@@ -789,10 +789,10 @@
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <Focus>0</Focus>
-      <ColumnNumber>26</ColumnNumber>
+      <ColumnNumber>0</ColumnNumber>
       <tvExpOptDlg>0</tvExpOptDlg>
-      <TopLine>0</TopLine>
-      <CurrentLine>0</CurrentLine>
+      <TopLine>1028</TopLine>
+      <CurrentLine>1036</CurrentLine>
       <bDave2>0</bDave2>
       <PathWithFileName>..\..\Source\queue.c</PathWithFileName>
       <FilenameWithoutPath>queue.c</FilenameWithoutPath>
@@ -807,8 +807,8 @@
       <Focus>0</Focus>
       <ColumnNumber>0</ColumnNumber>
       <tvExpOptDlg>0</tvExpOptDlg>
-      <TopLine>2152</TopLine>
-      <CurrentLine>2153</CurrentLine>
+      <TopLine>0</TopLine>
+      <CurrentLine>0</CurrentLine>
       <bDave2>0</bDave2>
       <PathWithFileName>..\..\Source\tasks.c</PathWithFileName>
       <FilenameWithoutPath>tasks.c</FilenameWithoutPath>
@@ -823,8 +823,8 @@
       <Focus>0</Focus>
       <ColumnNumber>0</ColumnNumber>
       <tvExpOptDlg>0</tvExpOptDlg>
-      <TopLine>0</TopLine>
-      <CurrentLine>0</CurrentLine>
+      <TopLine>253</TopLine>
+      <CurrentLine>261</CurrentLine>
       <bDave2>0</bDave2>
       <PathWithFileName>..\..\Source\portable\RVDS\ARM_CM0\port.c</PathWithFileName>
       <FilenameWithoutPath>port.c</FilenameWithoutPath>
@@ -861,10 +861,10 @@
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <Focus>0</Focus>
-      <ColumnNumber>0</ColumnNumber>
+      <ColumnNumber>45</ColumnNumber>
       <tvExpOptDlg>0</tvExpOptDlg>
-      <TopLine>57</TopLine>
-      <CurrentLine>122</CurrentLine>
+      <TopLine>63</TopLine>
+      <CurrentLine>96</CurrentLine>
       <bDave2>0</bDave2>
       <PathWithFileName>.\main.c</PathWithFileName>
       <FilenameWithoutPath>main.c</FilenameWithoutPath>
@@ -959,8 +959,8 @@
       <Focus>0</Focus>
       <ColumnNumber>15</ColumnNumber>
       <tvExpOptDlg>0</tvExpOptDlg>
-      <TopLine>38</TopLine>
-      <CurrentLine>74</CurrentLine>
+      <TopLine>0</TopLine>
+      <CurrentLine>0</CurrentLine>
       <bDave2>0</bDave2>
       <PathWithFileName>.\ParTest_XMC1100.c</PathWithFileName>
       <FilenameWithoutPath>ParTest_XMC1100.c</FilenameWithoutPath>
@@ -975,8 +975,8 @@
       <Focus>0</Focus>
       <ColumnNumber>15</ColumnNumber>
       <tvExpOptDlg>0</tvExpOptDlg>
-      <TopLine>44</TopLine>
-      <CurrentLine>74</CurrentLine>
+      <TopLine>0</TopLine>
+      <CurrentLine>0</CurrentLine>
       <bDave2>0</bDave2>
       <PathWithFileName>.\ParTest_XMC1300.c</PathWithFileName>
       <FilenameWithoutPath>ParTest_XMC1300.c</FilenameWithoutPath>
@@ -999,8 +999,8 @@
       <Focus>0</Focus>
       <ColumnNumber>0</ColumnNumber>
       <tvExpOptDlg>0</tvExpOptDlg>
-      <TopLine>0</TopLine>
-      <CurrentLine>0</CurrentLine>
+      <TopLine>411</TopLine>
+      <CurrentLine>419</CurrentLine>
       <bDave2>0</bDave2>
       <PathWithFileName>..\Common\Minimal\dynamic.c</PathWithFileName>
       <FilenameWithoutPath>dynamic.c</FilenameWithoutPath>

diff --git a/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/main.c b/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/main.c
index c4d6fcc20c2e26efc1f46d352842620bf47705e1..d762e22f20c8cbb0c5faeca9d9eb7dc6ddedb759 100644 (file)
--- a/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/main.c
+++ b/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/main.c
@@ -93,7 +93,7 @@
 \r
 /* Set mainCREATE_SIMPLE_BLINKY_DEMO_ONLY to one to run the simple blinky demo,\r
 or 0 to run the more comprehensive test and demo application. */\r
-#define mainCREATE_SIMPLE_BLINKY_DEMO_ONLY     0\r
+#define mainCREATE_SIMPLE_BLINKY_DEMO_ONLY     1\r
 \r
 \r
 /*-----------------------------------------------------------*/\r

diff --git a/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/settings/RTOSDemo.wsdt b/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/settings/RTOSDemo.wsdt
index 3bb336da83fc97e109d4577f409a3fa4c2c95a83..0c08a5408ff703078fe4a6f21fb9c7365d9190c7 100644 (file)
--- a/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/settings/RTOSDemo.wsdt
+++ b/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/settings/RTOSDemo.wsdt
@@ -25,7 +25,7 @@
     <Windows>\r
       \r
       \r
-    <Wnd2>\r
+    <Wnd0>\r
         <Tabs>\r
           <Tab>\r
             <Identity>TabID-23707-15152</Identity>\r
@@ -37,7 +37,7 @@
           </Tab>\r
         </Tabs>\r
         \r
-      <SelectedTab>0</SelectedTab></Wnd2><Wnd3>\r
+      <SelectedTab>0</SelectedTab></Wnd0><Wnd1>\r
         <Tabs>\r
           <Tab>\r
             <Identity>TabID-19002-15240</Identity>\r
@@ -47,7 +47,7 @@
           </Tab>\r
         <Tab><Identity>TabID-13685-21727</Identity><TabName>Debug Log</TabName><Factory>Debug-Log</Factory><Session/></Tab></Tabs>\r
         \r
-      <SelectedTab>0</SelectedTab></Wnd3></Windows>\r
+      <SelectedTab>0</SelectedTab></Wnd1></Windows>\r
     <Editor>\r
       \r
       \r
@@ -60,7 +60,7 @@
       \r
       \r
       \r
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