--- /dev/null
+; Lynx system hardware includes
+; Shawn Jefferson
+; June 18th, 2004
+;
+; Reference:
+; Bastian Schick's Lynx Documentation
+; http://www.geocities.com/SiliconValley/Byte/4242/lynx/
+;
+
+; ***
+; *** Suzy Addresses
+; ***
+
+; Sprite Control Block
+
+TMPADRL = $FC00
+TMPADRH = $FC01
+TILTACUML = $FC02
+TILTACUMH = $FC03
+HOFFL = $FC04
+HOFFH = $FC05
+VOFFL = $FC06
+VOFFH = $FC07
+VIDBASL = $FC08
+VIDBASH = $FC09
+COLLBASL = $FC0A
+COLLBASH = $FC0B
+VIDADRL = $FC0C
+VIDADRH = $FC0D
+COLLADRL = $FC0E
+COLLADRH = $FC0F
+SCBNEXTL = $FC10
+SCBNEXTH = $FC11
+SPRDLINEL = $FC12
+SPRDLINEH = $FC13
+HPOSSTRTL = $FC14
+HPOSSTRTH = $FC15
+VPOSSTRTL = $FC16
+VPOSSTRTH = $FC17
+SPRHSIZL = $FC18
+SPRHSIZH = $FC19
+SPRVSIZL = $FC1A
+SPRVSIZH = $FC1B
+STRETCHL = $FC1C
+STRETCHH = $FC1D
+TILTL = $FC1E
+TILTH = $FC1F
+SPRDOFFL = $FC20
+SPRDOFFH = $FC21
+SPRVPOSL = $FC22
+SPRVPOSH = $FC23
+COLLOFFL = $FC24
+COLLOFFH = $FC25
+VSIZACUML = $FC26
+VSIZACUMH = $FC27
+HSIZOFFL = $FC28
+HSIZOFFH = $FC29
+VSIZOFFL = $FC2A
+VSIZOFFH = $FC2B
+SCBADRL = $FC2C
+SCBADRH = $FC2D
+PROCADRL = $FC2E
+PROCADRH = $FC2F
+
+; Suzy Math
+
+MATHD = $FC52
+MATHC = $FC53
+MATHB = $FC54
+MATHA = $FC55
+MATHP = $FC56
+MATHN = $FC57
+MATHH = $FC60
+MATHG = $FC61
+MATHF = $FC62
+MATHE = $FC63
+MATHM = $FC6C
+MATHL = $FC6D
+MATHK = $FC6E
+MATHJ = $FC6F
+
+; Suzy Misc
+
+SPRCTL0 = $FC80
+SPRCTL1 = $FC81
+SPRCOLL = $FC82
+SPRINIT = $FC83
+SUZYHREV = $FC88
+SUZYSREV = $FC89
+SUZYBUSEN = $FC90
+SPRGO = $FC91
+SPRSYS = $FC92
+JOYSTICK = $FCB0
+SWITCHES = $FCB1
+RCART0 = $FCB2
+RCART1 = $FCB3
+LEDS = $FCC0
+PARSTATUS = $FCC2
+PARDATA = $FCC3
+HOWIE = $FCC4
+
+
+; ***
+; *** Mikey Addresses
+; ***
+
+; Mikey Timers
+
+TIMER0 = $FD00
+TIMER1 = $FD04
+TIMER2 = $FD08
+TIMER3 = $FD0C
+TIMER4 = $FD10
+TIMER5 = $FD14
+TIMER6 = $FD18
+TIMER7 = $FD1C
+HTIMER = $FD00 ; horizontal line timer (timer 0)
+VTIMER = $FD08 ; vertical blank timer (timer 2)
+
+HTIMBKUP = $FD00 ; horizontal line timer (timer 0)
+HTIMCTLA = $FD01
+HTIMCNT = $FD02
+HTIMCTLB = $FD03
+VTIMBKUP = $FD08 ; vertical blank timer (timer 2)
+VTIMCTLA = $FD09
+VTIMCNT = $FD0A
+VTIMCTLB = $FD0B
+BAUDBKUP = $FD10 ; serial timer (timer 4)
+
+TIM0BKUP = $FD00
+TIM0CTLA = $FD01
+TIM0CNT = $FD02
+TIM0CTLB = $FD03
+TIM1BKUP = $FD04
+TIM1CTLA = $FD05
+TIM1CNT = $FD06
+TIM1CTLB = $FD07
+TIM2BKUP = $FD08
+TIM2CTLA = $FD09
+TIM2CNT = $FD0A
+TIM2CTLB = $FD0B
+TIM3BKUP = $FD0C
+TIM3CTLA = $FD0D
+TIM3CNT = $FD0E
+TIM3CTLB = $FD0F
+TIM4BKUP = $FD10
+TIM4CTLA = $FD11
+TIM4CNT = $FD12
+TIM4CTLB = $FD13
+TIM5BKUP = $FD14
+TIM5CTLA = $FD15
+TIM5CNT = $FD16
+TIM5CTLB = $FD17
+TIM6BKUP = $FD18
+TIM6CTLA = $FD19
+TIM6CNT = $FD1A
+TIM6CTLB = $FD1B
+TIM7BKUP = $FD1C
+TIM7CTLA = $FD1D
+TIM7CNT = $FD1E
+TIM7CTLB = $FD1F
+
+; Mikey Audio
+
+AUDIO0 = $FD20 ; audio channel 0
+AUDIO1 = $FD28 ; audio channel 1
+AUDIO2 = $FD30 ; audio channel 2
+AUDIO3 = $FD38 ; audio channel 3
+
+AUD0VOL = $FD20
+AUD0FEED = $FD21
+AUD0OUT = $FD22
+AUD0SHIFT = $FD23
+AUD0BKUP = $FD24
+AUD0CTLA = $FD25
+AUD0CNT = $FD26
+AUD0CTLB = $FD27
+AUD1VOL = $FD28
+AUD1FEED = $FD29
+AUD1OUT = $FD2A
+AUD1SHIFT = $FD2B
+AUD1BKUP = $FD2C
+AUD1CTLA = $FD2D
+AUD1CNT = $FD2E
+AUD1CTLB = $FD2F
+AUD2VOL = $FD30
+AUD2FEED = $FD31
+AUD2OUT = $FD32
+AUD2SHIFT = $FD33
+AUD2BKUP = $FD34
+AUD2CTLA = $FD35
+AUD2CNT = $FD36
+AUD2CTLB = $FD37
+AUD3VOL = $FD38
+AUD3FEED = $FD39
+AUD3OUT = $FD3A
+AUD3SHIFT = $FD3B
+AUD3BKUP = $FD3C
+AUD3CTLA = $FD3D
+AUD3CNT = $FD3E
+AUD3CTLB = $FD3F
+MSTEREO = $FD50
+
+; Mikey Misc
+
+INTRST = $FD80
+INTSET = $FD81
+MAGRDY0 = $FD84
+MAGRDY1 = $FD85
+AUDIN = $FD86
+SYSCTL1 = $FD87
+MIKEYHREV = $FD88
+MIKEYSREV = $FD89
+IODIR = $FD8A
+IODAT = $FD8B
+SERCTL = $FD8C
+SERDAT = $FD8D
+SDONEACK = $FD90
+CPUSLEEP = $FD91
+DISPCTL = $FD92
+PBKUP = $FD93
+DISPADRL = $FD94
+DISPADRH = $FD95
+MTEST0 = $FD9C
+MTEST1 = $FD9D
+MTEST2 = $FD9E
+PALETTE = $FDA0 ; hardware rgb palette
+GCOLMAP = $FDA0 ; hardware rgb palette (green)
+RBCOLMAP = $FDB0 ; hardware rgb palette (red-blue)
+
+
+; ***
+; *** Misc Hardware + 6502 vectors
+; ***
+
+MAPCTL = $FFF9
+VECTORS = $FFFB
+INTVECTL = $FFFE
+INTVECTH = $FFFF
+RSTVECTL = $FFFC
+RSTVECTH = $FFFD
+NMIVECTL = $FFFA
+NMIVECTH = $FFFB
+
--- /dev/null
+#
+# makefile for CC65 runtime library
+#
+
+.SUFFIXES: .o .s .c
+
+
+#--------------------------------------------------------------------------
+# Rules
+
+%.o: %.c
+ @$(CC) $(CFLAGS) $<
+ @$(AS) -o $@ $(AFLAGS) $(*).s
+
+%.o: %.s
+ @$(AS) -g -o $@ $(AFLAGS) $<
+
+%.emd: %.o ../runtime/zeropage.o
+ @$(LD) -t module -o $@ $^
+
+%.joy: %.o ../runtime/zeropage.o
+ @$(LD) -t module -o $@ $^
+
+%.mou: %.o ../runtime/zeropage.o
+ @$(LD) -t module -o $@ $^
+
+%.ser: %.o ../runtime/zeropage.o
+ @$(LD) -t module -o $@ $^
+
+%.tgi: %.o ../runtime/zeropage.o
+ @$(LD) -t module -o $@ $^
+
+#--------------------------------------------------------------------------
+# Object files
+
+OBJS = crt0.o
+
+#--------------------------------------------------------------------------
+# Drivers
+
+EMDS =
+
+JOYS =
+
+MOUS =
+
+SERS =
+
+TGIS =
+
+#--------------------------------------------------------------------------
+# Targets
+
+.PHONY: all clean zap
+
+all: $(OBJS) $(EMDS) $(JOYS) $(MOUS) $(SERS) $(TGIS)
+
+../runtime/zeropage.o:
+ $(MAKE) -C $(dir $@) $(notdir $@)
+
+clean:
+ @$(RM) $(OBJS) $(EMDS:.emd=.o) $(JOYS:.joy=.o) $(MOUS:.mou=.o) $(SERS:.ser=.o) $(TGIS:.tgi=.o)
+
+zap: clean
+ @$(RM) $(EMDS) $(JOYS) $(MOUS) $(SERS) $(TGIS)
+
--- /dev/null
+; ***
+; CC65 Lynx Library
+;
+; Originally by Bastian Schick
+; http://www.geocities.com/SiliconValley/Byte/4242/lynx/
+;
+; Ported to cc65 (http://www.cc65.org) by
+; Shawn Jefferson, June 2004
+;
+; ***
+;
+; Startup code for cc65 (Lynx version). Based on Atari 8-bit startup
+; code structure. The C stack is located at the end of the RAM memory
+; segment and grows downward. Bastian Schick's executable header is put
+; on the front of the fully linked binary (see EXEHDR segment.)
+;
+; This must be the *first* file on the linker command line
+;
+
+ .include "lynx.inc"
+ .export _exit
+ .exportzp __iodat,__iodir,__viddma,__sprsys
+
+ .import initlib, donelib
+ .import zerobss
+ .import callmain
+ .import _main
+ .import __CODE_LOAD__, __BSS_LOAD__
+ .import __RAM_START__, __RAM_SIZE__
+
+ .include "zeropage.inc"
+
+
+; ------------------------------------------------------------------------
+; EXE header (BLL header)
+
+ .segment "EXEHDR"
+ .word $0880
+ .byte >__CODE_LOAD__, <__CODE_LOAD__
+ .byte >__BSS_LOAD__, <(__BSS_LOAD__ - 1)
+ .byte $42,$53
+ .byte $39,$33
+
+
+; ------------------------------------------------------------------------
+; Mikey and Suzy init data, reg offsets and data
+
+ .rodata
+
+SuzyInitReg: .byte $28,$2a,$04,$06,$92,$83,$90
+SuzyInitData: .byte $7f,$7f,$00,$00,$24,$f3,$01
+
+MikeyInitReg: .byte $00,$01,$08,$09,$20,$28,$30,$38,$44,$50,$8a,$8b,$8c,$92,$93
+MikeyInitData: .byte $9e,$18,$68,$1f,$00,$00,$00,$00,$00,$ff,$1a,$1b,$04,$0d,$29
+
+
+; ------------------------------------------------------------------------
+; mikey and suzy shadow registers
+
+ .segment "EXTZP" : zeropage
+
+__iodat: .res 1
+__iodir: .res 1
+__viddma: .res 1
+__sprsys: .res 1
+
+
+; ------------------------------------------------------------------------
+; Actual code
+
+ .code
+
+; set up system
+
+ sei
+ cld
+ ldx #$FF
+ txs
+
+; init bank switching
+
+ lda #$C
+ sta MAPCTL ; $FFF9
+
+; disable all timer interrupts
+
+ lda #$80
+ trb TIM0CTLA
+ trb TIM1CTLA
+ trb TIM2CTLA
+ trb TIM3CTLA
+ trb TIM5CTLA
+ trb TIM6CTLA
+ trb TIM7CTLA
+
+; disable TX/RX IRQ, set to 8E1
+
+ lda #%11101
+ sta SERCTL
+
+; clear all pending interrupts
+
+ lda INTSET
+ sta INTRST
+
+; setup the stack
+
+ lda #<(__RAM_START__ + __RAM_SIZE__)
+ sta sp
+ lda #>(__RAM_START__ + __RAM_SIZE__)
+ sta sp+1
+
+; Init Mickey
+
+ ldx #.sizeof(MikeyInitReg)-1
+mloop: ldy MikeyInitReg,x
+ lda MikeyInitData,x
+ sta $fd00,y
+ dex
+ bpl mloop
+
+; these are RAM-shadows of read only regs
+
+ ldx #$1b
+ stx __iodat
+ dex ; $1A
+ stx __iodir
+ ldx #$d
+ stx __viddma
+
+; Init Suzy
+
+ ldx #.sizeof(SuzyInitReg)-1
+sloop: ldy SuzyInitReg,x
+ lda SuzyInitData,x
+ sta $fc00,y
+ dex
+ bpl sloop
+
+ lda #$24
+ sta __sprsys
+
+; Clear the BSS data
+
+ jsr zerobss
+
+; Call module constructors
+
+ jsr initlib
+
+; Push arguments and call main
+
+ jsr callmain
+
+; Call module destructors. This is also the _exit entry.
+
+_exit: jsr donelib ; Run module destructors
+
+; Endless loop
+
+noret: bra noret
+
+
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