ecos/at91eb40a.elf target/lm3s6965.cfg interface/parport.cfg \
event/omap5912_reset.script interface/amontec-tiny.cfg interface/str9-comstick.cfg \
target/epc9301.cfg target/ipx42x.cfg target/lpc2129.cfg target/netx500.cfg \
- target/omap5912.cfg target/pxa270.cfg target/str750.cfg target/str9comstick.cfg
+ target/omap5912.cfg target/pxa270.cfg target/str750.cfg target/str9comstick.cfg \
+ target/str730.cfg target/stm32stick.cfg
--- /dev/null
+# Hitex stm32 performance stick\r
+jtag_nsrst_delay 100\r
+jtag_ntrst_delay 100\r
+\r
+#use combined on interfaces or targets that can't set TRST/SRST separately\r
+reset_config trst_and_srst\r
+\r
+#jtag scan chain\r
+#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)\r
+jtag_device 4 0x1 0xf 0xe\r
+jtag_device 5 0x1 0x1 0x1e\r
+jtag_device 4 0x1 0xf 0xe\r
+\r
+#target <type> <startup mode>\r
+#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>\r
+target cortex_m3 little reset_init 0\r
+run_and_halt_time 0 30\r
+\r
+working_area 0 0x20000000 16384 nobackup\r
+\r
+#flash bank str7x <base> <size> 0 0 <target#> <variant>\r
+flash bank stm32x 0 0 0 0 0\r
+\r
+# For more information about the configuration files, take a look at:\r
+# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger\r
--- /dev/null
+#STR730 CPU\r
+\r
+#use combined on interfaces or targets that can\92t set TRST/SRST separately\r
+#reset_config trst_and_srst srst_pulls_trst\r
+reset_config trst_and_srst srst_pulls_trst\r
+\r
+#jtag scan chain\r
+#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)\r
+jtag_device 4 0x1 0xf 0xe\r
+\r
+#jtag nTRST and nSRST delay\r
+jtag_nsrst_delay 500\r
+jtag_ntrst_delay 500\r
+\r
+#target configuration\r
+daemon_startup reset\r
+\r
+#target <type> <startup mode>\r
+#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>\r
+target arm7tdmi little run_and_halt 0 arm7tdmi\r
+\r
+run_and_halt_time 0 30\r
+\r
+working_area 0 0x40000000 0x4000 nobackup\r
+\r
+#flash bank <driver> <base> <size> <chip_width> <bus_width>\r
+flash bank str7x 0x20000000 0x00040000 0 0 0 STR3x\r
+\r
#STR750 CPU\r
+\r
#use combined on interfaces or targets that can\92t set TRST/SRST separately\r
#reset_config trst_and_srst srst_pulls_trst\r
reset_config trst_and_srst srst_pulls_trst\r
+\r
#jtag scan chain\r
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)\r
jtag_device 4 0x1 0xf 0xe\r
+\r
#jtag nTRST and nSRST delay\r
jtag_nsrst_delay 500\r
jtag_ntrst_delay 500\r
+\r
#target configuration\r
daemon_startup reset\r
+\r
#target <type> <startup mode>\r
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>\r
target arm7tdmi little run_and_halt 0 arm7tdmi\r
+\r
run_and_halt_time 0 30\r
+\r
working_area 0 0x40000000 0x4000 nobackup\r
+\r
#flash bank <driver> <base> <size> <chip_width> <bus_width>\r
-flash bank str7x 0x20000000 0x000040000 0 0 0 STR75x\r
+flash bank str7x 0x20000000 0x00040000 0 0 0 STR75x\r
+flash bank str7x 0x200C0000 0x00004000 0 0 0 STR75x\r
+\r