]> git.sur5r.net Git - openocd/commitdiff
arm_dpm: Add new state ARM_STATE_AARCH64
authorDavid Ung <davidu@nvidia.com>
Fri, 3 Apr 2015 23:55:59 +0000 (16:55 -0700)
committerMatthias Welwarsky <matthias.welwarsky@sysgo.com>
Fri, 10 Feb 2017 12:52:52 +0000 (13:52 +0100)
Add new enum ARM_STATE_AARCH64 to the list of possible states.

Change-Id: I3cb2df70f8d5803a63d8374bf3eb75de988e24f8
Signed-off-by: David Ung <david.ung.42@gmail.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
src/target/arm.h
src/target/arm_dpm.c
src/target/cortex_a.c

index 77a2f7b01b6c9841f418414e96280716e1c7572d..5713fc08bbb0648896b50370a12bbc1a0b9f7fb0 100644 (file)
@@ -78,6 +78,7 @@ enum arm_state {
        ARM_STATE_THUMB,
        ARM_STATE_JAZELLE,
        ARM_STATE_THUMB_EE,
+       ARM_STATE_AARCH64,
 };
 
 #define ARM_COMMON_MAGIC 0x0A450A45
index 62c6175524d71830011055699a8cfcbddad9016e..3b18719a502d6b83dbffa97ab04f38f16ab5b1e3 100644 (file)
@@ -165,6 +165,9 @@ static int dpm_read_reg(struct arm_dpm *dpm, struct reg *r, unsigned regnum)
                                        /* core-specific ... ? */
                                        LOG_WARNING("Jazelle PC adjustment unknown");
                                        break;
+                               case ARM_STATE_AARCH64:
+                                       LOG_ERROR("AARCH64: 32bit read requested");
+                                       break;
                        }
                        break;
                default:
@@ -905,6 +908,7 @@ void arm_dpm_report_wfar(struct arm_dpm *dpm, uint32_t addr)
                        addr -= 4;
                        break;
                case ARM_STATE_JAZELLE:
+               case ARM_STATE_AARCH64:
                        /* ?? */
                        break;
        }
index 62ac361e6374e0a4a5a07637261d0e096719356e..1cf66560474db7493f8b4058eec56ce0cdeff7dc 100644 (file)
@@ -992,6 +992,9 @@ static int cortex_a_internal_restore(struct target *target, int current,
                case ARM_STATE_JAZELLE:
                        LOG_ERROR("How do I resume into Jazelle state??");
                        return ERROR_FAIL;
+               case ARM_STATE_AARCH64:
+                       LOG_ERROR("Shoudn't be in AARCH64 state");
+                       return ERROR_FAIL;
        }
        LOG_DEBUG("resume pc = 0x%08" PRIx32, resume_pc);
        buf_set_u32(arm->pc->value, 0, 32, resume_pc);