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--- /dev/null
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--- /dev/null
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--- /dev/null
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+ </trimArea>\r
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+and fill target memory ranges</ScriptDescription><ScriptPath type="string">V:\UDE\AddOns\Macro\MacroLibrary\StdMacros1.dsm</ScriptPath><ScriptSource type="string">' \r
+' $Header: /Ude/AddOns/Macro/MacroLibrary/StdMacros.dsm 3 30.04.04 9:34 Weisses $\r
+'_______________________________________________________\r
+'\r
+' universal debug engine\r
+' \r
+' Standard command line macros - part 1 \r
+'\r
+' pls Development Tools 1999-2004\r
+'\r
+' 28.04.04 SW correction for UDE 1.10\r
+' 03.06.03 SW initial version\r
+'_______________________________________________________\r
+\r
+'_______________________________________________________\r
+'\r
+' UnAss command line function\r
+' \r
+' generates disassembly file \r
+'\r
+' command line UnAss output-file range1 [range2] [range3] .....\r
+' range description:\r
+' C:<startaddress>,<length> or - code\r
+' DB:<startaddress>,<length> or - data byte\r
+' DW:<startaddress>,<length> or - data word\r
+' DD:<startaddress>,<length> or - data dword\r
+'_______________________________________________________\r
+\r
+Sub UnAss(File,ParameterObj)\r
+\r
+ set debugger = workspace.Coredebugger(0)\r
+ set DisASMObj = debugger.DisASMObj\r
+ If Not IsObject(ParameterObj) Then\r
+ MsgBox "Number of parameters wrong"\r
+ Exit Sub \r
+ End If\r
+ If IsNumeric(File) Then\r
+ MsgBox "File parameter wrong - " & File\r
+ Exit Sub \r
+ End If\r
+ DisASMObj.OutputPath = CStr(File)\r
+ bRetVal = DisASMObj.CreateStream(True,"UDE Disassembler output of current Program",False)\r
+ If bRetVal = True Then\r
+ ParmeterCnt = ParameterObj.ParameterCount\r
+ If ParmeterCnt = 0 Then\r
+ MsgBox "Number of parameters wrong " & ParmeterCnt\r
+ Exit Sub \r
+ End If\r
+ If ( ParmeterCnt Mod 3 ) <> 0 Then\r
+ MsgBox "Number of parameters wrong " & ParmeterCnt\r
+ Exit Sub \r
+ End If\r
+ RangeCnt = ParmeterCnt/3\r
+ ParamIndex = 0\r
+ For Range = 0 To RangeCnt -1 \r
+ KindOfRange = CStr(ParameterObj.Parameter(ParamIndex)) \r
+ KindOfRange = UCase(KindOfRange)\r
+ Address = CLng(ParameterObj.Parameter(ParamIndex +1)) \r
+ Length = CLng(ParameterObj.Parameter(ParamIndex +2))\r
+ ParamIndex = ParamIndex +3\r
+ If IsNumeric(KindOfRange) Then\r
+ If KindOfRange = 12 Then\r
+ DisASMObj.AddRange Address,Length,1\r
+ ElseIf KindOfRange = 219 Then\r
+ DisASMObj.AddRange Address,Length,2\r
+ ElseIf KindOfRange = 221 Then\r
+ DisASMObj.AddRange Address,Length,4\r
+ Else\r
+ MsgBox "Invalid range type " & KindOfRange & "of range " & Range +1\r
+ Exit Sub \r
+ End If\r
+ Else\r
+ If KindOfRange = "C" Then\r
+ DisASMObj.AddRange Address,Length,1\r
+ ElseIf KindOfRange = "DB" Then\r
+ DisASMObj.AddRange Address,Length,2\r
+ ElseIf KindOfRange = "DW" Then\r
+ DisASMObj.AddRange Address,Length,3\r
+ ElseIf KindOfRange = "DD" Then\r
+ DisASMObj.AddRange Address,Length,4\r
+ Else\r
+ MsgBox "Invalid range type " & KindOfRange & "of range " & Range +1\r
+ Exit Sub \r
+ End If\r
+ End If\r
+ Next\r
+ DisASMObj.HexFileModeFlag = False\r
+ DisASMObj.ListModeFlag = False\r
+ DisASMObj.WriteAllRanges(False)\r
+ End If\r
+\r
+End Sub\r
+\r
+'_______________________________________________________\r
+'\r
+' SaveHEX command line function\r
+' \r
+' generates intel-HEX file \r
+'\r
+' command line SaveHex output-file range1 [range2] [range3] .....\r
+' range description:\r
+' <startaddress>,<length> \r
+'_______________________________________________________\r
+\r
+Sub SaveHEX(File,ParameterObj)\r
+\r
+ set debugger = workspace.Coredebugger(0)\r
+ set DisASMObj = debugger.DisASMObj\r
+ If Not IsObject(ParameterObj) Then\r
+ MsgBox "Number of parameters wrong"\r
+ Exit Sub \r
+ End If\r
+ If IsNumeric(File) Then\r
+ MsgBox "File parameter wrong - " & File\r
+ Exit Sub \r
+ End If\r
+ DisASMObj.OutputPath = CStr(File)\r
+ bRetVal = DisASMObj.CreateStream(True,"UDE generated intel-Hex file of current Program",False)\r
+ If bRetVal = True Then\r
+ ParmeterCnt = ParameterObj.ParameterCount\r
+ If ParmeterCnt = 0 Then\r
+ MsgBox "Number of parameters wrong " & ParmeterCnt\r
+ Exit Sub \r
+ End If\r
+ If ( ParmeterCnt Mod 2 ) <> 0 Then\r
+ MsgBox "Number of parameters wrong " & ParmeterCnt\r
+ Exit Sub \r
+ End If\r
+ RangeCnt = ParmeterCnt/2\r
+ ParamIndex = 0\r
+ For Range = 0 To RangeCnt -1 \r
+ Address = CLng(ParameterObj.Parameter(ParamIndex)) \r
+ Length = CLng(ParameterObj.Parameter(ParamIndex +1))\r
+ ParamIndex = ParamIndex +2\r
+ DisASMObj.AddRange Address,Length,0\r
+ Next\r
+ DisASMObj.HexFileModeFlag = True\r
+ DisASMObj.WriteAllRanges(False)\r
+ End If\r
+\r
+End Sub\r
+\r
+'_______________________________________________________\r
+'\r
+' FillByte command line function\r
+' \r
+' fills memory range with byte pattern \r
+'\r
+' command line FillByte range1,pattern1 [range2,pattern2] [range3,pattern3] .....\r
+' range description:\r
+' <startaddress>,<length> \r
+'_______________________________________________________\r
+\r
+Sub FillByte(ParameterObj)\r
+\r
+ set debugger = workspace.Coredebugger(0)\r
+ set DisASMObj = debugger.DisASMObj\r
+ If Not IsObject(ParameterObj) Then\r
+ MsgBox "Number of parameters wrong"\r
+ Exit Sub \r
+ End If\r
+ ParmeterCnt = ParameterObj.ParameterCount\r
+ If ParmeterCnt = 0 Then\r
+ MsgBox "Number of parameters wrong " & ParmeterCnt\r
+ Exit Sub \r
+ End If\r
+ If ( ParmeterCnt Mod 3 ) <> 0 Then\r
+ MsgBox "Number of parameters wrong " & ParmeterCnt\r
+ Exit Sub \r
+ End If\r
+ RangeCnt = ParmeterCnt/3\r
+ ParamIndex = 0\r
+ set udearrayobj = debugger.ByteArrayObj(1)\r
+ For Range = 0 To RangeCnt -1 \r
+ Address = CLng(ParameterObj.Parameter(ParamIndex)) \r
+ Length = CLng(ParameterObj.Parameter(ParamIndex +1))\r
+ Pattern = CLng(ParameterObj.Parameter(ParamIndex +2))\r
+ ParamIndex = ParamIndex +3\r
+ udearrayobj.Resize(Length)\r
+ udearrayobj.Fill(Pattern)\r
+ debugger.Write Address,udearrayobj\r
+ Next\r
+\r
+End Sub\r
+\r
+'_______________________________________________________\r
+'\r
+' FillWord command line function\r
+' \r
+' fills memory range with word pattern \r
+'\r
+' command line FillWord range1,pattern1 [range2,pattern2] [range3,pattern3] .....\r
+' range description:\r
+' <startaddress>,<length> \r
+'_______________________________________________________\r
+\r
+Sub FillWord(ParameterObj)\r
+\r
+ set debugger = workspace.Coredebugger(0)\r
+ set DisASMObj = debugger.DisASMObj\r
+ If Not IsObject(ParameterObj) Then\r
+ MsgBox "Number of parameters wrong"\r
+ Exit Sub \r
+ End If\r
+ ParmeterCnt = ParameterObj.ParameterCount\r
+ If ParmeterCnt = 0 Then\r
+ MsgBox "Number of parameters wrong " & ParmeterCnt\r
+ Exit Sub \r
+ End If\r
+ If ( ParmeterCnt Mod 3 ) <> 0 Then\r
+ MsgBox "Number of parameters wrong " & ParmeterCnt\r
+ Exit Sub \r
+ End If\r
+ RangeCnt = ParmeterCnt/3\r
+ ParamIndex = 0\r
+ set udearrayobj = debugger.WordArrayObj(1)\r
+ For Range = 0 To RangeCnt -1 \r
+ Address = CLng(ParameterObj.Parameter(ParamIndex)) \r
+ Length = CLng(ParameterObj.Parameter(ParamIndex +1)/2)\r
+ Pattern = CLng(ParameterObj.Parameter(ParamIndex +2))\r
+ ParamIndex = ParamIndex +3\r
+ udearrayobj.Resize(Length)\r
+ udearrayobj.Fill(Pattern)\r
+ debugger.Write Address,udearrayobj\r
+ Next\r
+\r
+End Sub\r
+\r
+'_______________________________________________________\r
+'\r
+' FillDWord command line function\r
+' \r
+' fills memory range with dword pattern \r
+'\r
+' command line FillDWord range1,pattern1 [range2,pattern2] [range3,pattern3] .....\r
+' range description:\r
+' <startaddress>,<length> \r
+'_______________________________________________________\r
+\r
+Sub FillDWord(ParameterObj)\r
+\r
+ set debugger = workspace.Coredebugger(0)\r
+ set DisASMObj = debugger.DisASMObj\r
+ If Not IsObject(ParameterObj) Then\r
+ MsgBox "Number of parameters wrong"\r
+ Exit Sub \r
+ End If\r
+ ParmeterCnt = ParameterObj.ParameterCount\r
+ If ParmeterCnt = 0 Then\r
+ MsgBox "Number of parameters wrong " & ParmeterCnt\r
+ Exit Sub \r
+ End If\r
+ If ( ParmeterCnt Mod 3 ) <> 0 Then\r
+ MsgBox "Number of parameters wrong " & ParmeterCnt\r
+ Exit Sub \r
+ End If\r
+ RangeCnt = ParmeterCnt/3\r
+ ParamIndex = 0\r
+ set udearrayobj = debugger.DWordArrayObj(1)\r
+ For Range = 0 To RangeCnt -1 \r
+ Address = CLng(ParameterObj.Parameter(ParamIndex)) \r
+ Length = CLng(ParameterObj.Parameter(ParamIndex +1)/4)\r
+ Pattern = CLng(ParameterObj.Parameter(ParamIndex +2))\r
+ ParamIndex = ParamIndex +3\r
+ udearrayobj.Resize(Length)\r
+ udearrayobj.Fill(Pattern)\r
+ debugger.Write Address,udearrayobj\r
+ Next\r
+\r
+End Sub</ScriptSource><ScriptArchitecture type="int">63</ScriptArchitecture><ScriptEngine type="string">VBScript</ScriptEngine><MacroFileTime type="string">24.11.2006 14:43:20:000</MacroFileTime><ScriptFromStg type="flag">1</ScriptFromStg><LocalComputerName type="string">WS_CORE_DUO</LocalComputerName><ExternalScriptPath type="string"></ExternalScriptPath><NextNodeName type="string">Macro_17_10_11_12_00_09_0</NextNodeName><UnAss type="key"><GUIEntry type="key"><MenuID type="int">10</MenuID><MenuString type="string">Execute UnAss ..</MenuString><ToolTipString type="string">Macro UnAss</ToolTipString><MessageString type="string">Execute macro UnAss</MessageString><DebugFlag type="flag">0</DebugFlag></GUIEntry><FuncParameterCnt type="int">2</FuncParameterCnt><GUIEntryDescription type="string"></GUIEntryDescription></UnAss><SaveHEX type="key"><GUIEntry type="key"><MenuID type="int">10</MenuID><MenuString type="string">Execute SaveHEX ..</MenuString><ToolTipString type="string">Macro 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type="string">..\RTOSDemo\Common_Demo_Source\flash.c</MRUSrcFile4></MRUSourceFileList></Core><TargetInfoFile type="string">.target\TriBoard_TC1782.cfg</TargetInfoFile><LastWriteDate type="string">17.10.2011 12:00:09:000</LastWriteDate></stg>\r
--- /dev/null
+REM This file should be executed from the command line prior to the first\r
+REM build. It will be necessary to refresh the Eclipse project once the\r
+REM .bat file has been executed (normally just press F5 to refresh).\r
+\r
+REM Copies all the required files from their location within the standard\r
+REM FreeRTOS directory structure to under the Eclipse project directory.\r
+REM This permits the Eclipse project to be used in 'managed' mode and without\r
+REM having to setup any linked resources.\r
+\r
+REM Standard paths\r
+SET FREERTOS_SOURCE=..\..\..\Source\r
+SET COMMON_SOURCE=..\..\Common\minimal\r
+SET COMMON_INCLUDE=..\..\Common\include\r
+\r
+REM Have the files already been copied?\r
+IF EXIST FreeRTOS_Source Goto END\r
+\r
+ REM Create the required directory structure.\r
+ MD FreeRTOS_Source\r
+ MD FreeRTOS_Source\include \r
+ MD FreeRTOS_Source\portable\GCC\r
+ MD FreeRTOS_Source\portable\GCC\TriCore_1782\r
+ MD FreeRTOS_Source\portable\MemMang \r
+ MD Common_Demo_Source\r
+ MD Common_Demo_Source\include\r
+ \r
+ REM Copy the core kernel files into the SDK projects directory\r
+ copy %FREERTOS_SOURCE%\tasks.c FreeRTOS_Source\r
+ copy %FREERTOS_SOURCE%\queue.c FreeRTOS_Source\r
+ copy %FREERTOS_SOURCE%\list.c FreeRTOS_Source\r
+ copy %FREERTOS_SOURCE%\timers.c FreeRTOS_Source\r
+\r
+ REM Copy the common header files into the SDK projects directory\r
+ copy %FREERTOS_SOURCE%\include\*.* FreeRTOS_Source\include\r
+ \r
+ REM Copy the portable layer files into the projects directory\r
+ copy %FREERTOS_SOURCE%\portable\GCC\TriCore_1782\*.* FreeRTOS_Source\portable\GCC\TriCore_1782\r
+ \r
+ REM Copy the basic memory allocation files into the SDK projects directory\r
+ copy %FREERTOS_SOURCE%\portable\MemMang\heap_2.c FreeRTOS_Source\portable\MemMang\r
+\r
+ REM Copy the files that define the common demo tasks.\r
+ copy %COMMON_SOURCE%\dynamic.c Common_Demo_Source\r
+ copy %COMMON_SOURCE%\BlockQ.c Common_Demo_Source\r
+ copy %COMMON_SOURCE%\death.c Common_Demo_Source\r
+ copy %COMMON_SOURCE%\blocktim.c Common_Demo_Source\r
+ copy %COMMON_SOURCE%\semtest.c Common_Demo_Source\r
+ copy %COMMON_SOURCE%\PollQ.c Common_Demo_Source\r
+ copy %COMMON_SOURCE%\GenQTest.c Common_Demo_Source\r
+ copy %COMMON_SOURCE%\QPeek.c Common_Demo_Source\r
+ copy %COMMON_SOURCE%\recmutex.c Common_Demo_Source\r
+ copy %COMMON_SOURCE%\flop.c Common_Demo_Source\r
+ copy %COMMON_SOURCE%\flash.c Common_Demo_Source\r
+ copy %COMMON_SOURCE%\comtest.c Common_Demo_Source\r
+ copy %COMMON_SOURCE%\TimerDemo.c Common_Demo_Source\r
+ copy %COMMON_SOURCE%\countsem.c Common_Demo_Source\r
+ copy %COMMON_SOURCE%\integer.c Common_Demo_Source\r
+ \r
+ REM Copy the common demo file headers.\r
+ copy %COMMON_INCLUDE%\*.h Common_Demo_Source\include\r
+ \r
+: END\r
--- /dev/null
+/*\r
+ FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd.\r
+\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS tutorial books are available in pdf and paperback. *\r
+ * Complete, revised, and edited pdf reference manuals are also *\r
+ * available. *\r
+ * *\r
+ * Purchasing FreeRTOS documentation will not only help you, by *\r
+ * ensuring you get running as quickly as possible and with an *\r
+ * in-depth knowledge of how to use FreeRTOS, it will also help *\r
+ * the FreeRTOS project to continue with its mission of providing *\r
+ * professional grade, cross platform, de facto standard solutions *\r
+ * for microcontrollers - completely free of charge! *\r
+ * *\r
+ * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
+ * *\r
+ * Thank you for using FreeRTOS, and thank you for your support! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+ >>>NOTE<<< The modification to the GPL is included to allow you to\r
+ distribute a combined work that includes FreeRTOS without being obliged to\r
+ provide the source code for proprietary components outside of the FreeRTOS\r
+ kernel. FreeRTOS is distributed in the hope that it will be useful, but\r
+ WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details. You should have received a copy of the GNU General Public\r
+ License and the FreeRTOS license exception along with FreeRTOS; if not it\r
+ can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
+ by writing to Richard Barry, contact details for whom are available on the\r
+ FreeRTOS WEB site.\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and\r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety\r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting,\r
+ licensing and training services.\r
+*/\r
+\r
+#ifndef FREERTOS_CONFIG_H\r
+#define FREERTOS_CONFIG_H\r
+\r
+/*-----------------------------------------------------------\r
+ * Application specific definitions.\r
+ *\r
+ * These definitions should be adjusted for your particular hardware and\r
+ * application requirements.\r
+ *\r
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE\r
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.\r
+ *\r
+ * See http://www.freertos.org/a00110.html.\r
+ */\r
+\r
+/*----------------------------------------------------------*/\r
+\r
+#define configUSE_PREEMPTION 1\r
+#define configUSE_IDLE_HOOK 0\r
+#define configUSE_TICK_HOOK 0\r
+/* CPU is actually 150MHz but FPIDIV is 1 meaning divide by 2. */\r
+#define configCPU_CLOCK_HZ ( ( unsigned long ) 150000000UL )\r
+#define configPERIPHERAL_CLOCK_HZ ( ( unsigned long ) configCPU_CLOCK_HZ / 2UL )\r
+#define configTICK_RATE_HZ ( ( portTickType ) 1000UL )\r
+#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 5 )\r
+#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 128 )\r
+#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 32 * 1024 ) )\r
+#define configMAX_TASK_NAME_LEN ( 16 )\r
+#define configUSE_TRACE_FACILITY 0\r
+#define configUSE_16_BIT_TICKS 0\r
+#define configIDLE_SHOULD_YIELD 0\r
+#define configUSE_MALLOC_FAILED_HOOK 1\r
+#define configCHECK_FOR_STACK_OVERFLOW 0\r
+\r
+/* Co-routine definitions. */\r
+#define configUSE_CO_ROUTINES 0\r
+#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )\r
+\r
+/* Mutual Exclusion. */\r
+#define configUSE_COUNTING_SEMAPHORES 1\r
+#define configUSE_RECURSIVE_MUTEXES 1\r
+#define configUSE_MUTEXES 1\r
+\r
+/* Timer functionality. */\r
+#define configUSE_TIMERS 0\r
+#define configTIMER_TASK_PRIORITY ( 4 )\r
+#define configTIMER_QUEUE_LENGTH ( 2 )\r
+\r
+/* Set the following definitions to 1 to include the API function, or zero\r
+ to exclude the API function.\r
+ We use --gc-sections when linking, so there is no harm is setting all of these to 1 */\r
+\r
+#define INCLUDE_vTaskPrioritySet 1\r
+#define INCLUDE_uxTaskPriorityGet 1\r
+#define INCLUDE_vTaskDelete 1\r
+#define INCLUDE_vTaskCleanUpResources 1\r
+#define INCLUDE_vTaskSuspend 1\r
+#define INCLUDE_vTaskDelayUntil 1\r
+#define INCLUDE_vTaskDelay 1\r
+\r
+#define BLOCKQ_1 0\r
+\r
+#define portCLEANUP_TCB( pxTCB ) vPortReclaimCSA( ( unsigned portBASE_TYPE *) ( pxTCB ) )\r
+\r
+#endif /* FREERTOS_CONFIG_H */\r
+\r
--- /dev/null
+/*\r
+ FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd.\r
+\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS tutorial books are available in pdf and paperback. *\r
+ * Complete, revised, and edited pdf reference manuals are also *\r
+ * available. *\r
+ * *\r
+ * Purchasing FreeRTOS documentation will not only help you, by *\r
+ * ensuring you get running as quickly as possible and with an *\r
+ * in-depth knowledge of how to use FreeRTOS, it will also help *\r
+ * the FreeRTOS project to continue with its mission of providing *\r
+ * professional grade, cross platform, de facto standard solutions *\r
+ * for microcontrollers - completely free of charge! *\r
+ * *\r
+ * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
+ * *\r
+ * Thank you for using FreeRTOS, and thank you for your support! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+ >>>NOTE<<< The modification to the GPL is included to allow you to\r
+ distribute a combined work that includes FreeRTOS without being obliged to\r
+ provide the source code for proprietary components outside of the FreeRTOS\r
+ kernel. FreeRTOS is distributed in the hope that it will be useful, but\r
+ WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details. You should have received a copy of the GNU General Public\r
+ License and the FreeRTOS license exception along with FreeRTOS; if not it\r
+ can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
+ by writing to Richard Barry, contact details for whom are available on the\r
+ FreeRTOS WEB site.\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and\r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety\r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting,\r
+ licensing and training services.\r
+*/\r
+\r
+/* Scheduler Includes. */\r
+#include "FreeRTOS.h"\r
+\r
+/* Demo Includes. */\r
+#include "partest.h"\r
+\r
+/* Machine Includes. */\r
+#include <tc1782.h>\r
+/*---------------------------------------------------------------------------*/\r
+\r
+void vParTestInitialise( void )\r
+{\r
+ /* The TriBoard TC1782 v2.1 has 8 LEDs connected to GPIO5. */\r
+ P5_IOCR0.reg = 0xC0C0C0C0;\r
+ P5_IOCR4.reg = 0xC0C0C0C0;\r
+\r
+ P5_PDR.reg = 0x00000000;\r
+\r
+ P5_OMR.reg = 0x0000FFFF;\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+\r
+void vParTestSetLED( unsigned portBASE_TYPE uxLED, signed portBASE_TYPE xValue )\r
+{\r
+unsigned long ulBitPattern = 1UL << uxLED;\r
+ if ( xValue != 0 )\r
+ {\r
+ P5_OMR.reg = ulBitPattern;\r
+ }\r
+ else\r
+ {\r
+ P5_OMR.reg = ulBitPattern << 16;\r
+ }\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+\r
+void vParTestToggleLED( unsigned portBASE_TYPE uxLED )\r
+{\r
+unsigned long ulBitPattern = 1UL << uxLED;\r
+ P5_OMR.reg = ( ulBitPattern << 16 ) | ulBitPattern;\r
+}\r
+/*---------------------------------------------------------------------------*/\r
--- /dev/null
+/*====================================================================
+* Project: Board Support Package (BSP)
+* Developed using:
+* Function: Determine the frequency the CPU is running at (TC1782)
+*
+* Copyright HighTec EDV-Systeme GmbH 1982-2010
+*====================================================================*/
+
+#include <machine/wdtcon.h>
+#include <tc1782/scu.h>
+#include <tc1782/cpu.h>
+
+
+#ifndef DEF_FRQ
+#define DEF_FRQ 20000000U /* TriBoard-TC1782 quartz frequency is 20 MHz */
+#endif /* DEF_FRQ */
+
+#define VCOBASE_FREQ 400000000U /* ?? */
+
+/* divider values for 150 MHz */
+#define SYS_CFG_PDIV 2
+#define SYS_CFG_NDIV 30
+#define SYS_CFG_K1DIV 2
+#define SYS_CFG_K2DIV 2
+
+
+/* prototypes for global functions */
+void set_cpu_frequency(void);
+unsigned int get_cpu_frequency(void);
+
+/* initialization flag: prevent multiple initialization of PLL_CLC */
+static int freq_init = 0;
+
+
+/* Set the frequency the CPU is running at */
+
+void set_cpu_frequency(void)
+{
+ SCU_PLLCON0_t_nonv pllcon0;
+ SCU_PLLCON1_t_nonv pllcon1;
+
+ if (freq_init)
+ {
+ return;
+ }
+
+ freq_init = 1;
+
+ /* check whether we are already running at desired clockrate */
+ pllcon0 = SCU_PLLCON0;
+ pllcon1 = SCU_PLLCON1;
+ if ( ((SYS_CFG_NDIV - 1) == pllcon0.bits.NDIV)
+ && ((SYS_CFG_PDIV - 1) == pllcon0.bits.PDIV)
+ && ((SYS_CFG_K1DIV - 1) == pllcon1.bits.K1DIV)
+ && ((SYS_CFG_K2DIV - 1) == pllcon1.bits.K2DIV)
+ && SCU_PLLSTAT.bits.VCOLOCK)
+ {
+ return;
+ }
+
+ if (!SCU_PLLSTAT.bits.PWDSTAT)
+ {
+ /* set speed to 180 MHz with 20MHz Crystal */
+ pllcon0.reg = 0;
+ pllcon1.reg = 0;
+ pllcon0.bits.NDIV = SYS_CFG_NDIV - 1;
+ pllcon0.bits.PDIV = SYS_CFG_PDIV - 1;
+ pllcon1.bits.K2DIV = SYS_CFG_K2DIV - 1;
+ pllcon1.bits.K1DIV = SYS_CFG_K1DIV - 1;
+ pllcon0.bits.VCOBYP = 1;
+ pllcon0.bits.CLRFINDIS = 1;
+ pllcon0.bits.PLLPWD = 1;
+ pllcon0.bits.RESLD = 1;
+
+ unlock_wdtcon();
+ /* FPI at half CPU speed */
+ SCU_CCUCON0.reg = 1;
+
+ /* force prescaler mode */
+ SCU_PLLCON0.bits.VCOBYP = 1;
+
+ /* wait for prescaler mode */
+ while (!SCU_PLLSTAT.bits.VCOBYST)
+ ;
+
+ /* write new control values */
+ SCU_PLLCON1 = pllcon1;
+ SCU_PLLCON0 = pllcon0;
+ lock_wdtcon();
+
+ /* wait for stable VCO frequency */
+ while (!SCU_PLLSTAT.bits.VCOLOCK)
+ ;
+
+ unlock_wdtcon();
+ /* leave prescaler mode */
+ SCU_PLLCON0.bits.VCOBYP = 0;
+ lock_wdtcon();
+ }
+}
+
+/* Determine the frequency the CPU is running at */
+
+unsigned int get_cpu_frequency(void)
+{
+ unsigned int frequency;
+ unsigned int fpidiv;
+ SCU_PLLCON0_t_nonv pllcon0;
+ SCU_PLLCON1_t_nonv pllcon1;
+ SCU_PLLSTAT_t_nonv pllstat;
+
+ if (!freq_init)
+ {
+ set_cpu_frequency();
+
+#ifdef ENABLE_ICACHE
+ /* enable instruction cache (PMI_CON0) */
+ unlock_wdtcon();
+ PMI_CON0.bits.PCBYP = 0;
+ lock_wdtcon();
+#endif /* ENABLE_ICACHE */
+ }
+
+ pllcon0 = SCU_PLLCON0;
+ pllcon1 = SCU_PLLCON1;
+ pllstat = SCU_PLLSTAT;
+
+ /* read FPI divider value */
+ fpidiv = SCU_CCUCON0.bits.FPIDIV;
+
+ if (pllstat.bits.VCOBYST)
+ {
+ /* prescaler mode */
+ unsigned int k_div;
+
+ k_div = pllcon1.bits.K1DIV + 1;
+ frequency = DEF_FRQ / k_div;
+ }
+ else if (pllstat.bits.FINDIS)
+ {
+ /* freerunning mode */
+ unsigned int k_div;
+
+ k_div = pllcon1.bits.K2DIV + 1;
+ frequency = VCOBASE_FREQ / k_div;
+ }
+ else
+ {
+ /* normal mode */
+ unsigned int k_div, n_div, p_div;
+
+ n_div = pllcon0.bits.NDIV + 1;
+ p_div = pllcon0.bits.PDIV + 1;
+ k_div = pllcon1.bits.K2DIV + 1;
+
+ frequency = DEF_FRQ * n_div / (k_div * p_div);
+ }
+
+ frequency /= (fpidiv + 1);
+
+ return frequency;
+}
--- /dev/null
+/*\r
+ FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd.\r
+\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS tutorial books are available in pdf and paperback. *\r
+ * Complete, revised, and edited pdf reference manuals are also *\r
+ * available. *\r
+ * *\r
+ * Purchasing FreeRTOS documentation will not only help you, by *\r
+ * ensuring you get running as quickly as possible and with an *\r
+ * in-depth knowledge of how to use FreeRTOS, it will also help *\r
+ * the FreeRTOS project to continue with its mission of providing *\r
+ * professional grade, cross platform, de facto standard solutions *\r
+ * for microcontrollers - completely free of charge! *\r
+ * *\r
+ * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
+ * *\r
+ * Thank you for using FreeRTOS, and thank you for your support! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+ >>>NOTE<<< The modification to the GPL is included to allow you to\r
+ distribute a combined work that includes FreeRTOS without being obliged to\r
+ provide the source code for proprietary components outside of the FreeRTOS\r
+ kernel. FreeRTOS is distributed in the hope that it will be useful, but\r
+ WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details. You should have received a copy of the GNU General Public\r
+ License and the FreeRTOS license exception along with FreeRTOS; if not it\r
+ can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
+ by writing to Richard Barry, contact details for whom are available on the\r
+ FreeRTOS WEB site.\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and\r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety\r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting,\r
+ licensing and training services.\r
+*/\r
+\r
+/* Standard includes. */\r
+#include <stdlib.h>\r
+#include <string.h>\r
+\r
+/* Scheduler includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+#include "croutine.h"\r
+\r
+/* Demo application includes. */\r
+#include "partest.h"\r
+#include "flash.h"\r
+#include "integer.h"\r
+#include "PollQ.h"\r
+#include "comtest2.h"\r
+#include "semtest.h"\r
+#include "dynamic.h"\r
+#include "BlockQ.h"\r
+#include "blocktim.h"\r
+#include "countsem.h"\r
+#include "GenQTest.h"\r
+#include "recmutex.h"\r
+#include "serial.h"\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Constants for the ComTest tasks. */\r
+#define mainCOM_TEST_BAUD_RATE ( ( unsigned long ) 115200 )\r
+#define mainCOM_TEST_LED ( 5 )\r
+\r
+/* Priorities for the demo application tasks. */\r
+#define mainLED_TASK_PRIORITY ( ( tskIDLE_PRIORITY + 1 ) | portPRIVILEGE_BIT )\r
+#define mainCOM_TEST_PRIORITY ( ( tskIDLE_PRIORITY + 2 ) | portPRIVILEGE_BIT )\r
+#define mainQUEUE_POLL_PRIORITY ( tskIDLE_PRIORITY + 2 )\r
+#define mainCHECK_TASK_PRIORITY ( ( tskIDLE_PRIORITY + 4 ) | portPRIVILEGE_BIT )\r
+#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1 )\r
+#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 2 )\r
+\r
+/* The rate at which the on board LED will toggle when there is/is not an\r
+error. */\r
+#define mainNO_ERROR_FLASH_PERIOD ( ( portTickType ) 5000 / portTICK_RATE_MS )\r
+#define mainERROR_FLASH_PERIOD ( ( portTickType ) 500 / portTICK_RATE_MS )\r
+#define mainON_BOARD_LED_BIT ( ( unsigned long ) 7 )\r
+#define mainREG_TEST_TASKS 1\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * Checks that all the demo application tasks are still executing without error\r
+ * - as described at the top of the file.\r
+ */\r
+static long prvCheckOtherTasksAreStillRunning( void );\r
+\r
+/*\r
+ * The task that executes at the highest priority and calls\r
+ * prvCheckOtherTasksAreStillRunning(). See the description at the top\r
+ * of the file.\r
+ */\r
+static void vErrorChecks( void *pvParameters );\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * Configure the processor for use with the Olimex demo board. This includes\r
+ * setup for the I/O, system clock, and access timings.\r
+ */\r
+static void prvSetupHardware( void );\r
+\r
+/*\r
+ * Function to create the heavily restricted RegTest tasks.\r
+ */\r
+static void vStartRegTestTasks( unsigned portBASE_TYPE uxPriority );\r
+\r
+#if mainREG_TEST_TASKS == 1\r
+\r
+/*\r
+ * Writes to and checks the value of each register that is used in the context\r
+ * of a task.\r
+ */\r
+static void vRegTask1( void *pvParameters );\r
+static void vRegTask2( void *pvParameters );\r
+\r
+/*\r
+ * Specific check to see if the Register test functions are still operating.\r
+ */\r
+static portBASE_TYPE xAreRegTestTasksStillRunning( void );\r
+\r
+#endif /* mainREG_TEST_TASKS */\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Used by the register test tasks to indicated liveness. */\r
+static unsigned long ulRegisterTest1Count = 0;\r
+static unsigned long ulRegisterTest2Count = 0;\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * Starts all the other tasks, then starts the scheduler.\r
+ */\r
+int main( void )\r
+{\r
+ /* Setup the hardware for use with the TriCore evaluation board. */\r
+ prvSetupHardware();\r
+\r
+ /* Start the demo/test application tasks. */\r
+ vStartIntegerMathTasks( tskIDLE_PRIORITY );\r
+ vStartLEDFlashTasks( mainLED_TASK_PRIORITY );\r
+ vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );\r
+ vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
+ vStartDynamicPriorityTasks();\r
+ vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
+ vCreateBlockTimeTasks();\r
+ vStartCountingSemaphoreTasks();\r
+ vStartGenericQueueTasks( tskIDLE_PRIORITY );\r
+ vStartRecursiveMutexTasks();\r
+ vAltStartComTestTasks( mainCOM_TEST_PRIORITY, mainCOM_TEST_BAUD_RATE, mainCOM_TEST_LED );\r
+ vStartRegTestTasks( tskIDLE_PRIORITY );\r
+\r
+ /* Start the check task - which is defined in this file. */\r
+ xTaskCreate( vErrorChecks, ( signed char * ) "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );\r
+\r
+ /* Now all the tasks have been started - start the scheduler. */\r
+ vTaskStartScheduler();\r
+\r
+ /* Should never reach here! */\r
+ for( ;; );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void vErrorChecks( void *pvParameters )\r
+{\r
+portTickType xDelayPeriod = mainNO_ERROR_FLASH_PERIOD;\r
+\r
+ /* Just to stop compiler warnings. */\r
+ ( void ) pvParameters;\r
+\r
+ /* Cycle for ever, delaying then checking all the other tasks are still\r
+ operating without error. If an error is detected then the delay period\r
+ is decreased from mainNO_ERROR_FLASH_PERIOD to mainERROR_FLASH_PERIOD so\r
+ the on board LED flash rate will increase. */\r
+\r
+ for( ;; )\r
+ {\r
+ /* Delay until it is time to execute again. */\r
+ vTaskDelay( xDelayPeriod );\r
+\r
+ /* Check all the standard demo application tasks are executing without\r
+ error. */\r
+ if( prvCheckOtherTasksAreStillRunning() != pdPASS )\r
+ {\r
+ /* An error has been detected in one of the tasks - flash faster. */\r
+ xDelayPeriod = mainERROR_FLASH_PERIOD;\r
+ }\r
+\r
+ /* The toggle rate of the LED depends on how long this task delays for.\r
+ An error reduces the delay period and so increases the toggle rate. */\r
+ vParTestToggleLED( mainON_BOARD_LED_BIT );\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static long prvCheckOtherTasksAreStillRunning( void )\r
+{\r
+long lReturn = pdPASS;\r
+\r
+ /* Check all the demo tasks (other than the flash tasks) to ensure\r
+ that they are all still running, and that none of them have detected\r
+ an error. */\r
+\r
+ if( xAreIntegerMathsTaskStillRunning() != pdTRUE )\r
+ {\r
+ lReturn = pdFAIL;\r
+ }\r
+\r
+ if( xAreComTestTasksStillRunning() != pdTRUE )\r
+ {\r
+ lReturn = pdFAIL;\r
+ }\r
+\r
+ if( xArePollingQueuesStillRunning() != pdTRUE )\r
+ {\r
+ lReturn = pdFAIL;\r
+ }\r
+\r
+ if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
+ {\r
+ lReturn = pdFAIL;\r
+ }\r
+\r
+ if( xAreDynamicPriorityTasksStillRunning() != pdTRUE )\r
+ {\r
+ lReturn = pdFAIL;\r
+ }\r
+\r
+ if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
+ {\r
+ lReturn = pdFAIL;\r
+ }\r
+\r
+ if ( xAreBlockTimeTestTasksStillRunning() != pdTRUE )\r
+ {\r
+ lReturn = pdFAIL;\r
+ }\r
+\r
+ if ( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
+ {\r
+ lReturn = pdFAIL;\r
+ }\r
+\r
+ if ( xAreRecursiveMutexTasksStillRunning() != pdTRUE )\r
+ {\r
+ lReturn = pdFAIL;\r
+ }\r
+\r
+ if( xAreRegTestTasksStillRunning() != pdTRUE )\r
+ {\r
+ lReturn = pdFAIL;\r
+ }\r
+\r
+ return lReturn;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvSetupHardware( void )\r
+{\r
+extern void set_cpu_frequency(void);\r
+\r
+ /* Set-up the PLL. */\r
+ set_cpu_frequency();\r
+\r
+ /* Initialise LED outputs. */\r
+ vParTestInitialise();\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vApplicationMallocFailedHook( void )\r
+{\r
+ /* This function will be called if a call to pvPortMalloc() fails to return\r
+ the requested memory. pvPortMalloc() is called internally by the scheduler\r
+ whenever a task, queue or semaphore is created. */\r
+ _debug();\r
+ for( ;; );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vApplicationTickHook( void )\r
+{\r
+ /*\r
+ * This function will be called whenever the system tick is incremented.\r
+ * Note that it is executed as part of an interrupt and as such should\r
+ * not block nor be used for any long running execution.\r
+ */\r
+ vParTestToggleLED( mainON_BOARD_LED_BIT - 1 );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vApplicationIdleHook( void )\r
+{\r
+ /*\r
+ * This function will be called during the normal execution of the IDLE task.\r
+ */\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+#if mainREG_TEST_TASKS == 1\r
+\r
+static void vStartRegTestTasks( unsigned portBASE_TYPE uxPriority )\r
+{\r
+ (void)xTaskCreate( vRegTask1, ( signed char * ) "Reg 1", configMINIMAL_STACK_SIZE, &ulRegisterTest1Count, uxPriority, NULL );\r
+ (void)xTaskCreate( vRegTask2, ( signed char * ) "Reg 2", configMINIMAL_STACK_SIZE, &ulRegisterTest2Count, uxPriority, NULL );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+portBASE_TYPE xAreRegTestTasksStillRunning( void )\r
+{\r
+static unsigned long ulPreviousRegisterTest1Count = 0;\r
+static unsigned long ulPreviousRegisterTest2Count = 0;\r
+portBASE_TYPE xReturn = pdFALSE;\r
+\r
+ /* Check to see if the Counts have changed since the last check. */\r
+ xReturn = ( ulPreviousRegisterTest1Count != ulRegisterTest1Count );\r
+ xReturn = xReturn && ( ulPreviousRegisterTest2Count != ulRegisterTest2Count );\r
+\r
+ /* Record the last count. */\r
+ ulPreviousRegisterTest1Count = ulRegisterTest1Count;\r
+ ulPreviousRegisterTest2Count = ulRegisterTest2Count;\r
+\r
+ return xReturn;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * Set all of the registers that are used as part of the task context\r
+ * to known values and test that those values are maintained across\r
+ * context switches.\r
+ */\r
+void vRegTask1( void *pvParameters )\r
+{\r
+ /* Make space on the stack for the parameter and a counter. */\r
+ __asm volatile( " sub.a %sp, 4 \n"\r
+ " st.a [%sp], %a4 \n"\r
+ " mov %d15, 0 \n"\r
+ " st.w [%sp]4, %d15 \n" );\r
+\r
+ for (;;)\r
+ {\r
+ /* Change all of the Context sensitive registers (except SP and RA). */\r
+ __asm volatile(\r
+ " mov %d0, 0 \n"\r
+ " mov %d1, 1 \n"\r
+ " mov %d2, 2 \n"\r
+ " mov %d3, 3 \n"\r
+ " mov %d4, 4 \n"\r
+ " mov %d5, 5 \n"\r
+ " mov %d6, 6 \n"\r
+ " mov %d7, 7 \n"\r
+ " mov %d8, 8 \n"\r
+ " mov %d9, 9 \n"\r
+ " mov %d10, 10 \n"\r
+ " mov %d11, 11 \n"\r
+ " mov %d12, 12 \n"\r
+ " mov %d13, 13 \n"\r
+ " mov %d14, 14 \n"\r
+ " mov %d15, 15 \n"\r
+ " mov.a %a2, 2 \n"\r
+ " mov.a %a3, 3 \n"\r
+ " mov.a %a4, 4 \n"\r
+ " mov.a %a5, 5 \n"\r
+ " mov.a %a6, 6 \n"\r
+ " mov.a %a7, 7 \n"\r
+ " mov.a %a12, 12 \n"\r
+ " mov.a %a13, 13 \n"\r
+ " mov.a %a14, 14 \n" );\r
+ /* Yield to force a context switch. */\r
+ taskYIELD();\r
+ /* Check the values of the registers. */\r
+ __asm( " eq %d0, %d0, 0 \n" \\r
+ " jne %d0, 1, _task1_loop \n" \\r
+ " eq %d1, %d1, 1 \n" \\r
+ " jne %d1, 1, _task1_loop \n" \\r
+ " eq %d2, %d2, 2 \n" \\r
+ " jne %d2, 1, _task1_loop \n" \\r
+ " eq %d3, %d3, 3 \n" \\r
+ " jne %d3, 1, _task1_loop \n" \\r
+ " eq %d4, %d4, 4 \n" \\r
+ " jne %d4, 1, _task1_loop \n" \\r
+ " eq %d5, %d5, 5 \n" \\r
+ " jne %d5, 1, _task1_loop \n" \\r
+ " eq %d6, %d6, 6 \n" \\r
+ " jne %d6, 1, _task1_loop \n" \\r
+ " eq %d7, %d7, 7 \n" \\r
+ " jne %d7, 1, _task1_loop \n" \\r
+ " eq %d8, %d8, 8 \n" \\r
+ " jne %d8, 1, _task1_loop \n" \\r
+ " eq %d9, %d9, 9 \n" \\r
+ " jne %d9, 1, _task1_loop \n" \\r
+ " eq %d10, %d10, 10 \n" \\r
+ " jne %d10, 1, _task1_loop \n" \\r
+ " eq %d11, %d11, 11 \n" \\r
+ " jne %d11, 1, _task1_loop \n" \\r
+ " eq %d12, %d12, 12 \n" \\r
+ " jne %d12, 1, _task1_loop \n" \\r
+ " eq %d13, %d13, 13 \n" \\r
+ " jne %d13, 1, _task1_loop \n" \\r
+ " eq %d14, %d14, 14 \n" \\r
+ " jne %d14, 1, _task1_loop \n" \\r
+ " eq %d15, %d15, 15 \n" \\r
+ " jne %d15, 1, _task1_loop \n" \\r
+ " mov.a %a15, 2 \n" \\r
+ " jne.a %a15, %a2, _task1_loop \n" \\r
+ " mov.a %a15, 3 \n" \\r
+ " jne.a %a15, %a3, _task1_loop \n" \\r
+ " mov.a %a15, 4 \n" \\r
+ " jne.a %a15, %a4, _task1_loop \n" \\r
+ " mov.a %a15, 5 \n" \\r
+ " jne.a %a15, %a5, _task1_loop \n" \\r
+ " mov.a %a15, 6 \n" \\r
+ " jne.a %a15, %a6, _task1_loop \n" \\r
+ " mov.a %a15, 7 \n" \\r
+ " jne.a %a15, %a7, _task1_loop \n" \\r
+ " mov.a %a15, 12 \n" \\r
+ " jne.a %a15, %a12, _task1_loop \n" \\r
+ " mov.a %a15, 13 \n" \\r
+ " jne.a %a15, %a13, _task1_loop \n" \\r
+ " mov.a %a15, 14 \n" \\r
+ " jne.a %a15, %a14, _task1_loop \n" \\r
+ " j _task1_skip \n" \\r
+ "_task1_loop: \n" \\r
+ " debug \n" \\r
+ " j _task1_loop \n" \\r
+ "_task1_skip: \n" );\r
+\r
+ /* Load the parameter address from the stack and modify the value. */\r
+ __asm volatile( \\r
+ " ld.w %d15, [%sp]4 \n" \\r
+ " add %d15, %d15, 1 \n" \\r
+ " st.w [%sp]4, %d15 \n" \\r
+ " ld.a %a4, [%sp] \n" \\r
+ " st.w [%a4], %d15 \n" );\r
+ }\r
+\r
+ /* The parameter is used but in the assembly. */\r
+ (void)pvParameters;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * Set all of the registers that are used as part of the task context\r
+ * to known values and test that those values are maintained across\r
+ * context switches.\r
+ */\r
+void vRegTask2( void *pvParameters )\r
+{\r
+ /* Make space on the stack for the parameter and a counter. */\r
+ __asm volatile( " sub.a %sp, 4 \n" \\r
+ " st.a [%sp], %a4 \n" \\r
+ " mov %d15, 0 \n" \\r
+ " st.w [%sp]4, %d15 \n" );\r
+\r
+ for (;;)\r
+ {\r
+ /* Change all of the Context sensitive registers (except SP and RA). */\r
+ __asm( " mov %d0, 7 \n" \\r
+ " mov %d1, 6 \n" \\r
+ " mov %d2, 5 \n" \\r
+ " mov %d3, 4 \n" \\r
+ " mov %d4, 3 \n" \\r
+ " mov %d5, 2 \n" \\r
+ " mov %d6, 1 \n" \\r
+ " mov %d7, 0 \n" \\r
+ " mov %d8, 15 \n" \\r
+ " mov %d9, 14 \n" \\r
+ " mov %d10, 13 \n" \\r
+ " mov %d11, 12 \n" \\r
+ " mov %d12, 11 \n" \\r
+ " mov %d13, 10 \n" \\r
+ " mov %d14, 9 \n" \\r
+ " mov %d15, 8 \n" \\r
+ " mov.a %a2, 14 \n" \\r
+ " mov.a %a3, 13 \n" \\r
+ " mov.a %a4, 12 \n" \\r
+ " mov.a %a5, 7 \n" \\r
+ " mov.a %a6, 6 \n" \\r
+ " mov.a %a7, 5 \n" \\r
+ " mov.a %a12, 4 \n" \\r
+ " mov.a %a13, 3 \n" \\r
+ " mov.a %a14, 2 \n" );\r
+ /* Yield to force a context switch. */\r
+ taskYIELD();\r
+ /* Check the values of the registers. */\r
+ __asm( " eq %d0, %d0, 7 \n" \\r
+ " jne %d0, 1, _task2_loop \n" \\r
+ " eq %d1, %d1, 6 \n" \\r
+ " jne %d1, 1, _task2_loop \n" \\r
+ " eq %d2, %d2, 5 \n" \\r
+ " jne %d2, 1, _task2_loop \n" \\r
+ " eq %d3, %d3, 4 \n" \\r
+ " jne %d3, 1, _task2_loop \n" \\r
+ " eq %d4, %d4, 3 \n" \\r
+ " jne %d4, 1, _task2_loop \n" \\r
+ " eq %d5, %d5, 2 \n" \\r
+ " jne %d5, 1, _task2_loop \n" \\r
+ " eq %d6, %d6, 1 \n" \\r
+ " jne %d6, 1, _task2_loop \n" \\r
+ " eq %d7, %d7, 0 \n" \\r
+ " jne %d7, 1, _task2_loop \n" \\r
+ " eq %d8, %d8, 15 \n" \\r
+ " jne %d8, 1, _task2_loop \n" \\r
+ " eq %d9, %d9, 14 \n" \\r
+ " jne %d9, 1, _task2_loop \n" \\r
+ " eq %d10, %d10, 13 \n" \\r
+ " jne %d10, 1, _task2_loop \n" \\r
+ " eq %d11, %d11, 12 \n" \\r
+ " jne %d11, 1, _task2_loop \n" \\r
+ " eq %d12, %d12, 11 \n" \\r
+ " jne %d12, 1, _task2_loop \n" \\r
+ " eq %d13, %d13, 10 \n" \\r
+ " jne %d13, 1, _task2_loop \n" \\r
+ " eq %d14, %d14, 9 \n" \\r
+ " jne %d14, 1, _task2_loop \n" \\r
+ " eq %d15, %d15, 8 \n" \\r
+ " jne %d15, 1, _task2_loop \n" \\r
+ " mov.a %a15, 14 \n" \\r
+ " jne.a %a15, %a2, _task2_loop \n" \\r
+ " mov.a %a15, 13 \n" \\r
+ " jne.a %a15, %a3, _task2_loop \n" \\r
+ " mov.a %a15, 12 \n" \\r
+ " jne.a %a15, %a4, _task2_loop \n" \\r
+ " mov.a %a15, 7 \n" \\r
+ " jne.a %a15, %a5, _task2_loop \n" \\r
+ " mov.a %a15, 6 \n" \\r
+ " jne.a %a15, %a6, _task2_loop \n" \\r
+ " mov.a %a15, 5 \n" \\r
+ " jne.a %a15, %a7, _task2_loop \n" \\r
+ " mov.a %a15, 4 \n" \\r
+ " jne.a %a15, %a12, _task2_loop \n" \\r
+ " mov.a %a15, 3 \n" \\r
+ " jne.a %a15, %a13, _task2_loop \n" \\r
+ " mov.a %a15, 2 \n" \\r
+ " jne.a %a15, %a14, _task2_loop \n" \\r
+ " j _task2_skip \n" \\r
+ "_task2_loop: \n" \\r
+ " j _task2_loop \n" \\r
+ "_task2_skip: \n" );\r
+\r
+ /* Load the parameter address from the stack and modify the value. */\r
+ __asm volatile( \\r
+ " ld.w %d15, [%sp]4 \n" \\r
+ " add %d15, %d15, 1 \n" \\r
+ " st.w [%sp]4, %d15 \n" \\r
+ " ld.a %a4, [%sp] \n" \\r
+ " st.w [%a4], %d15 \n" );\r
+ }\r
+\r
+ /* The parameter is used but in the assembly. */\r
+ (void)pvParameters;\r
+}\r
+/*-----------------------------------------------------------*/\r
+#endif /* mainREG_TEST_TASKS */\r
--- /dev/null
+/*\r
+ FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd.\r
+\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS tutorial books are available in pdf and paperback. *\r
+ * Complete, revised, and edited pdf reference manuals are also *\r
+ * available. *\r
+ * *\r
+ * Purchasing FreeRTOS documentation will not only help you, by *\r
+ * ensuring you get running as quickly as possible and with an *\r
+ * in-depth knowledge of how to use FreeRTOS, it will also help *\r
+ * the FreeRTOS project to continue with its mission of providing *\r
+ * professional grade, cross platform, de facto standard solutions *\r
+ * for microcontrollers - completely free of charge! *\r
+ * *\r
+ * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
+ * *\r
+ * Thank you for using FreeRTOS, and thank you for your support! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+ >>>NOTE<<< The modification to the GPL is included to allow you to\r
+ distribute a combined work that includes FreeRTOS without being obliged to\r
+ provide the source code for proprietary components outside of the FreeRTOS\r
+ kernel. FreeRTOS is distributed in the hope that it will be useful, but\r
+ WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details. You should have received a copy of the GNU General Public\r
+ License and the FreeRTOS license exception along with FreeRTOS; if not it\r
+ can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
+ by writing to Richard Barry, contact details for whom are available on the\r
+ FreeRTOS WEB site.\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and\r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety\r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting,\r
+ licensing and training services.\r
+*/\r
+\r
+#include <tc1782.h>\r
+#include <machine/intrinsics.h>\r
+#include <machine/cint.h>\r
+#include <machine/wdtcon.h>\r
+\r
+/* Scheduler Includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+#include "queue.h"\r
+\r
+/* Demo Includes. */\r
+#include "serial.h"\r
+/*---------------------------------------------------------------------------*/\r
+\r
+#define serialINTERRUPT_PRIORITY_TX 16\r
+#define serialINTERRUPT_PRIORITY_RX 18\r
+/*---------------------------------------------------------------------------*/\r
+\r
+/*\r
+ * This reference is required by the Save/Restore Context Macros.\r
+ */\r
+extern volatile unsigned portBASE_TYPE * pxCurrentTCB;\r
+/*-----------------------------------------------------------*/\r
+\r
+/**\r
+ * This function will check to see whether the Serial Transmit Interrupt is currently\r
+ * activated, meaning that the interrupt is working through the back log of bytes\r
+ * that it needs to send. If the ISR is not enabled, then it will be triggered to send\r
+ * the first byte and it will be automatically re-triggered when that byte has been\r
+ * sent. When the queue is exhausted, the ISR disables itself.\r
+ * This function is privileged because it will trigger an interrupt.
+ */\r
+static void prvCheckTransmit( void ) PRIVILEGED_FUNCTION;\r
+/*-----------------------------------------------------------*/\r
+\r
+void vSerialTransmitBufferInterrupt( int iArg ) __attribute__((longcall));\r
+void vSerialReceiveInterrupt( int iArg )__attribute__((longcall));\r
+/*-----------------------------------------------------------*/\r
+\r
+static xQueueHandle xSerialTransmitQueue = NULL;\r
+static xQueueHandle xSerialReceiveQueue = NULL;\r
+static volatile portBASE_TYPE xTransmitStatus = 0UL;\r
+/*---------------------------------------------------------------------------*/\r
+\r
+xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )\r
+{\r
+unsigned long ulReloadValue = 0UL;\r
+ ulReloadValue = ( configPERIPHERAL_CLOCK_HZ / ( 32 * ulWantedBaud ) ) - 1;\r
+\r
+ if ( NULL == xSerialTransmitQueue )\r
+ {\r
+ xSerialTransmitQueue = xQueueCreate( uxQueueLength, sizeof( char ) );\r
+ xSerialReceiveQueue = xQueueCreate( uxQueueLength, sizeof( char ) );\r
+ }\r
+\r
+ /* Enable ASC0 Module. */\r
+ unlock_wdtcon();\r
+ while ( 0 != ( WDT_CON0.reg & 0x1UL ) );\r
+ ASC0_CLC.reg = 0x0200UL;\r
+ lock_wdtcon();\r
+\r
+ /* Disable the Operation. */\r
+ ASC0_CON.reg &= 0xFFFF7FFF;\r
+\r
+ /* Set-up the GPIO Ports. */\r
+ P3_IOCR0.reg = 0x00009000; /* 3.0 ASC In, 3.1 Alt ASC Out */\r
+ /* Do we need to set 3.1 high? OMR.PS1 = 1??? */\r
+\r
+ /* Write the Baudrate. */\r
+ ASC0_BG.reg = ulReloadValue;\r
+\r
+ /* Reconfigure and re-initialise the Operation. */\r
+ ASC0_PISEL.reg = 0UL;\r
+ ASC0_CON.reg = 0x00008011; /* 1 Start, 1 Stop, 8 Data, No Parity, No Error Checking, Receive On, Module On. */\r
+\r
+ /* Install the Tx interrupt. */\r
+ if ( 0 != _install_int_handler( serialINTERRUPT_PRIORITY_TX, vSerialTransmitBufferInterrupt, 0 ) )\r
+ {\r
+ ASC0_TBSRC.reg = serialINTERRUPT_PRIORITY_TX | 0x5000UL;\r
+ xTransmitStatus = 0UL;\r
+ }\r
+\r
+ /* Install the Rx interrupt. */\r
+ if ( 0 != _install_int_handler( serialINTERRUPT_PRIORITY_RX, vSerialReceiveInterrupt, 0 ) )\r
+ {\r
+ ASC0_RSRC.reg = serialINTERRUPT_PRIORITY_RX | 0x5000UL;\r
+ }\r
+\r
+ /* COM Handle is never used by demo code. */\r
+ return (xComPortHandle) pdPASS;\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+\r
+void vSerialPutString( xComPortHandle pxPort, const signed char * const pcString, unsigned short usStringLength )\r
+{\r
+unsigned short usChar;\r
+ for ( usChar = 0; usChar < usStringLength; usChar++ )\r
+ {\r
+ (void)xSerialPutChar( pxPort, pcString[ usChar ], portMAX_DELAY );\r
+ }\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+\r
+signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed char *pcRxedChar, portTickType xBlockTime )\r
+{\r
+ return xQueueReceive( xSerialReceiveQueue, pcRxedChar, xBlockTime );\r
+ (void)pxPort;\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+\r
+signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed char cOutChar, portTickType xBlockTime )\r
+{\r
+portBASE_TYPE xReturn = pdPASS;\r
+\r
+ /* Send the character to the interrupt handler. */\r
+ xReturn = xQueueSend( xSerialTransmitQueue, &cOutChar, xBlockTime );\r
+\r
+ /* Start the transmission of bytes if necessary. */\r
+ prvCheckTransmit();\r
+\r
+ return xReturn;\r
+\r
+ (void)pxPort;\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+\r
+void vSerialTransmitBufferInterrupt( int iArg )\r
+{\r
+portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;\r
+unsigned char ucTx;\r
+\r
+ /* ACK. */\r
+ ASC0_TBSRC.reg |= 0x4000UL;\r
+ xTransmitStatus = 1UL;\r
+\r
+ /* Enter the Critical Section. */\r
+ portINTERRUPT_ENTER_CRITICAL();\r
+ {\r
+ /* TBUF Can be refilled. */\r
+ if ( pdPASS == xQueueReceiveFromISR( xSerialTransmitQueue, &ucTx, &xHigherPriorityTaskWoken ) )\r
+ {\r
+ ASC0_TBUF.reg = ucTx;\r
+ }\r
+ else\r
+ {\r
+ /* Failed to get a character out of the Queue. No longer busy. */\r
+ xTransmitStatus = 0UL;\r
+ }\r
+ }\r
+ portINTERRUPT_EXIT_CRITICAL();\r
+\r
+ /* Finally end ISR and switch Task. */\r
+ portYIELD_FROM_ISR( xHigherPriorityTaskWoken );\r
+\r
+ (void)iArg;\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+\r
+void vSerialReceiveInterrupt( int iArg )\r
+{\r
+portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;\r
+unsigned char ucRx;\r
+\r
+ /* Grab the character as early as possible. */\r
+ ucRx = (unsigned char)ASC0_RBUF.reg;\r
+\r
+ /* ACK. */\r
+ ASC0_RSRC.reg |= 0x4000UL;\r
+\r
+ /* Enter the Critical Section. */\r
+ portINTERRUPT_ENTER_CRITICAL();\r
+ {\r
+ /* Frame available in RBUF. */\r
+ if ( pdPASS != xQueueSendFromISR( xSerialReceiveQueue, &ucRx, &xHigherPriorityTaskWoken ) )\r
+ {\r
+ /* Need some error handling code. */\r
+ }\r
+ }\r
+ portINTERRUPT_EXIT_CRITICAL();\r
+\r
+ /* Finally end ISR and switch Task. */\r
+ portYIELD_FROM_ISR( xHigherPriorityTaskWoken );\r
+\r
+ (void)iArg;\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+\r
+void prvCheckTransmit( void )\r
+{\r
+ /* Check to see if the interrupt handler is working its way through the buffer. */\r
+ if ( 0 == xTransmitStatus )\r
+ {\r
+ /* Not currently operational so kick off the first byte. */\r
+ ASC0_TBSRC.reg |= 0x8000UL;\r
+ }\r
+}\r
+/*---------------------------------------------------------------------------*/\r
--- /dev/null
+\r
+/*\r
+ * Name: iRAM.ld \r
+ * \r
+ * Generated Linker Description File\r
+ * Copyright (C) 2010 HighTec EDV-Systeme GmbH. \r
+ * (!Do not edit outsite of the protection areas!)\r
+ *\r
+ * Description: \r
+ * internal RAM configuration\r
+ */\r
+\r
+/*\r
+ * Define Entrypoint of Executable\r
+ */\r
+ENTRY(_start)\r
+\r
+/*\r
+ * Global\r
+ */\r
+/*Program Flash Memory (PFLASH)*/ \r
+__PMU_PFLASH_BEGIN = 0x80000000;\r
+__PMU_PFLASH_SIZE = 2560K;\r
+/*Data Flash Memory (DFLASH0)*/ \r
+__PMU_DFLASH0_BEGIN = 0xAFE00000;\r
+__PMU_DFLASH0_SIZE = 64K;\r
+/*Data Flash Memory (DFLASH1)*/ \r
+__PMU_DFLASH1_BEGIN = 0xAFE10000;\r
+__PMU_DFLASH1_SIZE = 64K;\r
+/*Boot ROM (BROM)*/ \r
+__BROM_BEGIN = 0xAFFFC000;\r
+__BROM_SIZE = 16K;\r
+/*Scratch-Pad RAM (SPRAM)*/ \r
+__PMI_SPRAM_BEGIN = 0xC0000000;\r
+__PMI_SPRAM_SIZE = 40K;\r
+/*Local Data RAM (LDRAM)*/ \r
+__DMI_LDRAM_BEGIN = 0xD0000000;\r
+__DMI_LDRAM_SIZE = 128K;\r
+/*PCP Code Memory (CMEM)*/ \r
+__PCP_CMEM_BEGIN = 0xF0060000;\r
+__PCP_CMEM_SIZE = 32K;\r
+/*PCP Data Memory (PRAM)*/ \r
+__PCP_PRAM_BEGIN = 0xF0050000;\r
+__PCP_PRAM_SIZE = 16K;\r
+\r
+__ISTACK_SIZE = DEFINED (__ISTACK_SIZE) ? __ISTACK_SIZE : 256;\r
+__USTACK_SIZE = DEFINED (__USTACK_SIZE) ? __USTACK_SIZE : 1K;\r
+__HEAP_SIZE = DEFINED (__HEAP_SIZE) ? __HEAP_SIZE : 4K ;\r
+__CSA_SIZE = DEFINED (__CSA_SIZE) ? __CSA_SIZE : 16K ;\r
+\r
+/**\r
+ * User defined global region\r
+ */\r
+/*PROTECTED REGION ID(Protection:iRAM-Global) ENABLED START*/\r
+/*Protection-Area for your own LDF-Code*/\r
+/*PROTECTED REGION END*/\r
+\r
+/*\r
+ * internal RAM configuration\r
+ */\r
+MEMORY\r
+{\r
+ PMU_PFLASH (rx!p): org = 0x80000000, len = 2560K /*Program Flash Memory (PFLASH)*/ \r
+ PMU_DFLASH0 (r!xp): org = 0xAFE00000, len = 64K /*Data Flash Memory (DFLASH0)*/ \r
+ PMU_DFLASH1 (r!xp): org = 0xAFE10000, len = 64K /*Data Flash Memory (DFLASH1)*/ \r
+ BROM (rx!p): org = 0xAFFFC000, len = 16K /*Boot ROM (BROM)*/ \r
+ PMI_SPRAM (wx!p): org = 0xC0000000, len = 40K /*Scratch-Pad RAM (SPRAM)*/ \r
+ DMI_LDRAM (w!xp): org = 0xD0000000, len = 128K /*Local Data RAM (LDRAM)*/ \r
+ PCP_CMEM (rxp): org = 0xF0060000, len = 32K /*PCP Code Memory (CMEM)*/ \r
+ PCP_PRAM (wp!x): org = 0xF0050000, len = 16K /*PCP Data Memory (PRAM)*/ \r
+ \r
+} \r
+\r
+SECTIONS\r
+{\r
+ /*Code-Sections*/\r
+ \r
+ /*\r
+ * Startup code for TriCore\r
+ */\r
+ .startup_code :\r
+ {\r
+ PROVIDE(__startup_code_start = .);\r
+ \r
+ /*PROTECTED REGION ID(Protection: iRAM .startup_code.begin) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ *(.startup_code) /*Startup code for TriCore*/ \r
+ *(.startup_code*)\r
+ \r
+ /*PROTECTED REGION ID(Protection: iRAM .startup_code) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ PROVIDE(__startup_code_end = .);\r
+ . = ALIGN(8);\r
+ \r
+ } > PMI_SPRAM /* PMI_SPRAM: Scratch-Pad RAM (SPRAM) */ \r
+ \r
+ /*\r
+ * Code section\r
+ */\r
+ .text :\r
+ {\r
+ PROVIDE(__text_start = .);\r
+ \r
+ /*PROTECTED REGION ID(Protection: iRAM .text.begin) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ *(.text) /*Code section*/ \r
+ *(.text*)\r
+ *(.gnu.linkonce.t.*)\r
+ \r
+ /*PROTECTED REGION ID(Protection: iRAM .text) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ PROVIDE(__text_end = .);\r
+ . = ALIGN(8);\r
+ \r
+ } > PMI_SPRAM /* PMI_SPRAM: Scratch-Pad RAM (SPRAM) */ \r
+ \r
+ /*\r
+ * Code executed before calling main\r
+ */\r
+ .init :\r
+ {\r
+ PROVIDE(__init_start = .);\r
+ \r
+ /*PROTECTED REGION ID(Protection: iRAM .init.begin) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ KEEP(*(.init)) /*Code executed before calling main*/ \r
+ KEEP(*(.init*))\r
+ \r
+ /*PROTECTED REGION ID(Protection: iRAM .init) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ PROVIDE(__init_end = .);\r
+ . = ALIGN(8);\r
+ \r
+ } > PMI_SPRAM /* PMI_SPRAM: Scratch-Pad RAM (SPRAM) */ \r
+ \r
+ /*\r
+ * Code executed before exiting program\r
+ */\r
+ .fini :\r
+ {\r
+ PROVIDE(__fini_start = .);\r
+ \r
+ /*PROTECTED REGION ID(Protection: iRAM .fini.begin) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ KEEP(*(.fini)) /*Code executed before exiting program*/ \r
+ KEEP(*(.fini*))\r
+ \r
+ /*PROTECTED REGION ID(Protection: iRAM .fini) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ PROVIDE(__fini_end = .);\r
+ . = ALIGN(8);\r
+ \r
+ } > PMI_SPRAM /* PMI_SPRAM: Scratch-Pad RAM (SPRAM) */ \r
+ \r
+ /*\r
+ * Section for trap table\r
+ */\r
+ .traptab :\r
+ {\r
+ PROVIDE(__traptab_start = .);\r
+ \r
+ /*PROTECTED REGION ID(Protection: iRAM .traptab.begin) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ *(.traptab) /*Section for trap table*/ \r
+ *(.traptab*)\r
+ \r
+ /*PROTECTED REGION ID(Protection: iRAM .traptab) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ PROVIDE(__traptab_end = .);\r
+ . = ALIGN(8);\r
+ \r
+ } > PMI_SPRAM /* PMI_SPRAM: Scratch-Pad RAM (SPRAM) */ \r
+ \r
+ /*\r
+ * Section for interrupt table\r
+ */\r
+ .inttab :\r
+ {\r
+ PROVIDE(__inttab_start = .);\r
+ \r
+ /*PROTECTED REGION ID(Protection: iRAM .inttab.begin) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ *(.inttab) /*Section for interrupt table*/ \r
+ *(.inttab*)\r
+ \r
+ /*PROTECTED REGION ID(Protection: iRAM .inttab) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ PROVIDE(__inttab_end = .);\r
+ . = ALIGN(8);\r
+ \r
+ } > PMI_SPRAM /* PMI_SPRAM: Scratch-Pad RAM (SPRAM) */ \r
+ \r
+ /*\r
+ * Exception handling frame for C++ exceptions\r
+ */\r
+ .eh_frame :\r
+ {\r
+ PROVIDE(__eh_frame_start = .);\r
+ \r
+ /*PROTECTED REGION ID(Protection: iRAM .eh_frame.begin) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ *(.eh_frame) /*Exception handling frame for C++ exceptions*/ \r
+ *(.eh_frame*)\r
+ \r
+ /*PROTECTED REGION ID(Protection: iRAM .eh_frame) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ PROVIDE(__eh_frame_end = .);\r
+ . = ALIGN(8);\r
+ \r
+ } > PMI_SPRAM /* PMI_SPRAM: Scratch-Pad RAM (SPRAM) */ \r
+ \r
+ /*\r
+ * Section for constructors\r
+ */\r
+ .ctors :\r
+ {\r
+ PROVIDE(__ctors_start = .);\r
+ \r
+ /*PROTECTED REGION ID(Protection: iRAM .ctors.begin) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ KEEP(*(.ctors)) /*Section for constructors*/ \r
+ KEEP(*(.ctors*))\r
+ \r
+ /*PROTECTED REGION ID(Protection: iRAM .ctors) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ PROVIDE(__ctors_end = .);\r
+ . = ALIGN(8);\r
+ \r
+ } > PMI_SPRAM /* PMI_SPRAM: Scratch-Pad RAM (SPRAM) */ \r
+ \r
+ /*\r
+ * Section for destructors\r
+ */\r
+ .dtors :\r
+ {\r
+ PROVIDE(__dtors_start = .);\r
+ \r
+ /*PROTECTED REGION ID(Protection: iRAM .dtors.begin) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ KEEP(*(.dtors)) /*Section for destructors*/ \r
+ KEEP(*(.dtors*))\r
+ \r
+ /*PROTECTED REGION ID(Protection: iRAM .dtors) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ PROVIDE(__dtors_end = .);\r
+ . = ALIGN(8);\r
+ \r
+ } > PMI_SPRAM /* PMI_SPRAM: Scratch-Pad RAM (SPRAM) */ \r
+ \r
+\r
+ /*Absolute Data-Sections*/\r
+ \r
+ /*\r
+ * Initialised data addressed as absolute\r
+ */\r
+ .zdata :\r
+ {\r
+ PROVIDE(__zdata_start = .);\r
+ \r
+ /*PROTECTED REGION ID(Protection: iRAM .zdata.begin) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ *(.zdata) /*Initialised data addressed as absolute*/ \r
+ *(.zdata*)\r
+ *(.gnu.linkonce.z.*)\r
+ *(.gnu.linkonce.zr.*)\r
+ \r
+ /*PROTECTED REGION ID(Protection: iRAM .zdata) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+\r
+ PROVIDE(__zdata_end = .);\r
+ . = ALIGN(8);\r
+ \r
+ } > DMI_LDRAM /* DMI_LDRAM: Local Data RAM (LDRAM) */ \r
+ \r
+ /*\r
+ * Not initialised data addressed as absolute\r
+ */\r
+ .zbss (NOLOAD) :\r
+ {\r
+ PROVIDE(__zbss_start = .);\r
+ \r
+ /*PROTECTED REGION ID(Protection: iRAM .zbss.begin) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ *(.zbss) /*Not Initialised data addressed as absolute*/ \r
+ *(.zbss*)\r
+ *(.gnu.linkonce.zb.*)\r
+ \r
+ /*PROTECTED REGION ID(Protection: iRAM .zbss) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+\r
+ PROVIDE(__zbss_end = .);\r
+ . = ALIGN(8);\r
+ \r
+ } > DMI_LDRAM /* DMI_LDRAM: Local Data RAM (LDRAM) */ \r
+ \r
+ /*\r
+ * Not initialised bit data\r
+ */\r
+ .bbss (NOLOAD) :\r
+ {\r
+ PROVIDE(__bbss_start = .);\r
+ \r
+ /*PROTECTED REGION ID(Protection: iRAM .bbss.begin) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ *(.bbss) /*Not initialised bit data*/ \r
+ *(.bbss*)\r
+ \r
+ /*PROTECTED REGION ID(Protection: iRAM .bbss) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+\r
+ PROVIDE(__bbss_end = .);\r
+ . = ALIGN(8);\r
+ \r
+ } > DMI_LDRAM /* DMI_LDRAM: Local Data RAM (LDRAM) */ \r
+ \r
+ /*\r
+ * Bit variables\r
+ */\r
+ .bdata :\r
+ {\r
+ PROVIDE(__bdata_start = .);\r
+ \r
+ /*PROTECTED REGION ID(Protection: iRAM .bdata.begin) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ *(.bdata) /*Bit variables*/ \r
+ *(.bdata*)\r
+ \r
+ /*PROTECTED REGION ID(Protection: iRAM .bdata) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+\r
+ PROVIDE(__bdata_end = .);\r
+ . = ALIGN(8);\r
+ \r
+ } > DMI_LDRAM /* DMI_LDRAM: Local Data RAM (LDRAM) */ \r
+ \r
+\r
+ /*Small Data-Sections*/\r
+ \r
+ /*\r
+ * Storage of write-protected data addressed as small\r
+ */\r
+ .sdata2 :\r
+ {\r
+ PROVIDE(__sdata2_start = .);\r
+ \r
+ /*PROTECTED REGION ID(Protection: iRAM .sdata2.begin) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ *(.sdata.rodata) /*Storage of write-protected data addressed as small*/ \r
+ *(.sdata.rodata*)\r
+ *(.gnu.linkonce.sr.*)\r
+ \r
+ /*PROTECTED REGION ID(Protection: iRAM .sdata2) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ PROVIDE(__sdata2_end = .);\r
+ . = ALIGN(8);\r
+ \r
+ } > PMI_SPRAM /* PMI_SPRAM: Scratch-Pad RAM (SPRAM) */ \r
+ \r
+ /*\r
+ * Section stores initialised data which is addressable by small data area pointer (%a0)\r
+ */\r
+ .sdata :\r
+ {\r
+ PROVIDE(__sdata_start = .);\r
+ \r
+ /*PROTECTED REGION ID(Protection: iRAM .sdata.begin) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ *(.sdata) /*Section stores initialised data which is addressable by small data area pointer (%a0)*/ \r
+ *(.sdata*)\r
+ *(.gnu.linkonce.s.*)\r
+ \r
+ /*PROTECTED REGION ID(Protection: iRAM .sdata) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ PROVIDE(__sdata_end = .);\r
+ . = ALIGN(8);\r
+ \r
+ } > DMI_LDRAM /* DMI_LDRAM: Local Data RAM (LDRAM) */ \r
+ \r
+ /*\r
+ * Not initialised data in section ’.sbss’, addressable by small data area pointer (%a0)\r
+ */\r
+ .sbss (NOLOAD) :\r
+ {\r
+ PROVIDE(__sbss_start = .);\r
+ \r
+ /*PROTECTED REGION ID(Protection: iRAM .sbss.begin) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ *(.sbss) /*Not initialised data in section ’.sbss’, addressable by small data area pointer (%a0)*/ \r
+ *(.sbss*)\r
+ *(.gnu.linkonce.sb.*)\r
+ \r
+ /*PROTECTED REGION ID(Protection: iRAM .sbss) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ PROVIDE(__sbss_end = .);\r
+ . = ALIGN(8);\r
+ \r
+ } > DMI_LDRAM /* DMI_LDRAM: Local Data RAM (LDRAM) */ \r
+ \r
+\r
+ /*Normal Data-Sections*/\r
+ \r
+ /*\r
+ * Storage of write-protected data\r
+ */\r
+ .rodata :\r
+ {\r
+ PROVIDE(__rodata_start = .);\r
+ \r
+ /*PROTECTED REGION ID(Protection: iRAM .rodata.begin) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ *(.rodata) /*Storage of write-protected data*/ \r
+ *(.rodata*)\r
+ *(.gnu.linkonce.r.*)\r
+ *(.jcr.*)\r
+ \r
+ /*PROTECTED REGION ID(Protection: iRAM .rodata) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ PROVIDE(__rodata_end = .);\r
+ . = ALIGN(8);\r
+ \r
+ } > PMI_SPRAM /* PMI_SPRAM: Scratch-Pad RAM (SPRAM) */ \r
+ \r
+ /*\r
+ * Initialised data\r
+ */\r
+ .data :\r
+ {\r
+ PROVIDE(__data_start = .);\r
+ \r
+ /*PROTECTED REGION ID(Protection: iRAM .data.begin) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ *(.data) /*Initialised data*/ \r
+ *(.data*)\r
+ *(.gnu.linkonce.d.*)\r
+ \r
+ /*PROTECTED REGION ID(Protection: iRAM .data) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ PROVIDE(__data_end = .);\r
+ . = ALIGN(8);\r
+ \r
+ } > DMI_LDRAM /* DMI_LDRAM: Local Data RAM (LDRAM) */ \r
+ \r
+ /*\r
+ * Not Initialised data\r
+ */\r
+ .bss (NOLOAD) :\r
+ {\r
+ PROVIDE(__bss_start = .);\r
+ \r
+ /*PROTECTED REGION ID(Protection: iRAM .bss.begin) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ *(.bss) /*Not Initialised data*/ \r
+ *(.bss*)\r
+ *(.gnu.linkonce.b.*)\r
+ \r
+ /*PROTECTED REGION ID(Protection: iRAM .bss) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ PROVIDE(__bss_end = .);\r
+ . = ALIGN(8);\r
+ \r
+ } > DMI_LDRAM /* DMI_LDRAM: Local Data RAM (LDRAM) */ \r
+ \r
+ \r
+\r
+ /*PCP-Sections*/\r
+ \r
+ /*\r
+ * PCP Code Section\r
+ */\r
+ .pcptext :\r
+ {\r
+ PROVIDE(__pcptext_start = .);\r
+ \r
+ /*PROTECTED REGION ID(Protection: iRAM .pcptext.begin) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ KEEP(*(.pcptext)) /*PCP Code Section*/ \r
+ KEEP(*(.pcptext*))\r
+ \r
+ /*PROTECTED REGION ID(Protection: iRAM .pcptext) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ PROVIDE(__pcptext_end = .);\r
+ . = ALIGN(8);\r
+ \r
+ } > PCP_CMEM AT > PMI_SPRAM /* PCP_CMEM: PCP Code Memory (CMEM) */ /* PMI_SPRAM: Scratch-Pad RAM (SPRAM) */ \r
+ \r
+ /*\r
+ * PCP Data Section\r
+ */\r
+ .pcpdata :\r
+ {\r
+ PROVIDE(__pcpdata_start = .);\r
+ \r
+ /*PROTECTED REGION ID(Protection: iRAM .pcpdata.begin) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ KEEP(*(.pcpdata)) /*PCP Data Section*/ \r
+ KEEP(*(.pcpdata*))\r
+ \r
+ /*PROTECTED REGION ID(Protection: iRAM .pcpdata) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ PROVIDE(__pcpdata_end = .);\r
+ . = ALIGN(8);\r
+ \r
+ } > PCP_PRAM AT > PMI_SPRAM /* PCP_PRAM: PCP Data Memory (PRAM) */ /* PMI_SPRAM: Scratch-Pad RAM (SPRAM) */ \r
+ \r
+\r
+ \r
+ \r
+ .clear_sec :\r
+ {\r
+ . = ALIGN(8);\r
+ PROVIDE(__clear_table = .) ;\r
+ \r
+ LONG(0 + ADDR(.bss)); LONG(SIZEOF(.bss));\r
+ LONG(0 + ADDR(.sbss)); LONG(SIZEOF(.sbss));\r
+ LONG(0 + ADDR(.zbss)); LONG(SIZEOF(.zbss));\r
+ LONG(0 + ADDR(.bbss)); LONG(SIZEOF(.bbss));\r
+ /*PROTECTED REGION ID(Protection: iRAM clear section) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ LONG(-1); LONG(-1);\r
+ \r
+ } > PMI_SPRAM\r
+ \r
+ \r
+ .copy_sec :\r
+ {\r
+ . = ALIGN(8);\r
+ PROVIDE(__copy_table = .) ;\r
+ \r
+ LONG(LOADADDR(.pcptext)); LONG(0 + ADDR(.pcptext)); LONG(SIZEOF(.pcptext));\r
+ LONG(LOADADDR(.pcpdata)); LONG(0 + ADDR(.pcpdata)); LONG(SIZEOF(.pcpdata));\r
+ \r
+ /*PROTECTED REGION ID(Protection: iRAM copy section) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ LONG(-1); LONG(-1); LONG(-1);\r
+ } > PMI_SPRAM \r
+ \r
+ .csa (NOLOAD) :\r
+ {\r
+ . = ALIGN(64);\r
+ __CSA_BEGIN = . ;\r
+ . += __CSA_SIZE;\r
+ . = ALIGN(64);\r
+ __CSA_END = .;\r
+ } > DMI_LDRAM\r
+ \r
+ .heap (NOLOAD) :\r
+ {\r
+ . = ALIGN(8);\r
+ __HEAP = .;\r
+ . += __HEAP_SIZE;\r
+ __HEAP_END = .;\r
+ } > DMI_LDRAM\r
+ \r
+ .istack (NOLOAD) :\r
+ {\r
+ . = ALIGN(8);\r
+ . += __ISTACK_SIZE;\r
+ __ISTACK = .;\r
+ } > DMI_LDRAM\r
+ \r
+ .ustack (NOLOAD) :\r
+ {\r
+ . = ALIGN(8);\r
+ . += __USTACK_SIZE;\r
+ __USTACK = .;\r
+ } > DMI_LDRAM\r
+ \r
+ /*PROTECTED REGION ID(Protection:iRAM-User-Sections) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+}\r
+\r
--- /dev/null
+\r
+/*\r
+ * Name: iROM.ld \r
+ * \r
+ * Generated Linker Description File\r
+ * Copyright (C) 2010 HighTec EDV-Systeme GmbH. \r
+ * (!Do not edit outsite of the protection areas!)\r
+ *\r
+ * Description: \r
+ * internal flash configuration\r
+ */\r
+\r
+/*\r
+ * Define Entrypoint of Executable\r
+ */\r
+ENTRY(_start)\r
+\r
+/*\r
+ * Global\r
+ */\r
+/*Program Flash Memory (PFLASH)*/ \r
+__PMU_PFLASH_BEGIN = 0x80000000;\r
+__PMU_PFLASH_SIZE = 2560K;\r
+/*Data Flash Memory (DFLASH0)*/ \r
+__PMU_DFLASH0_BEGIN = 0xAFE00000;\r
+__PMU_DFLASH0_SIZE = 64K;\r
+/*Data Flash Memory (DFLASH1)*/ \r
+__PMU_DFLASH1_BEGIN = 0xAFE10000;\r
+__PMU_DFLASH1_SIZE = 64K;\r
+/*Boot ROM (BROM)*/ \r
+__BROM_BEGIN = 0xAFFFC000;\r
+__BROM_SIZE = 16K;\r
+/*Scratch-Pad RAM (SPRAM)*/ \r
+__PMI_SPRAM_BEGIN = 0xC0000000;\r
+__PMI_SPRAM_SIZE = 40K;\r
+/*Local Data RAM (LDRAM)*/ \r
+__DMI_LDRAM_BEGIN = 0xD0000000;\r
+__DMI_LDRAM_SIZE = 128K;\r
+/*PCP Code Memory (CMEM)*/ \r
+__PCP_CMEM_BEGIN = 0xF0060000;\r
+__PCP_CMEM_SIZE = 32K;\r
+/*PCP Data Memory (PRAM)*/ \r
+__PCP_PRAM_BEGIN = 0xF0050000;\r
+__PCP_PRAM_SIZE = 16K;\r
+\r
+__ISTACK_SIZE = DEFINED (__ISTACK_SIZE) ? __ISTACK_SIZE : 256;\r
+__USTACK_SIZE = DEFINED (__USTACK_SIZE) ? __USTACK_SIZE : 1K;\r
+__HEAP_SIZE = DEFINED (__HEAP_SIZE) ? __HEAP_SIZE : 4K ;\r
+__CSA_SIZE = DEFINED (__CSA_SIZE) ? __CSA_SIZE : 16K ;\r
+\r
+/**\r
+ * User defined global region\r
+ */\r
+/*PROTECTED REGION ID(Protection:iROM-Global) ENABLED START*/\r
+/*Protection-Area for your own LDF-Code*/\r
+/*PROTECTED REGION END*/\r
+\r
+/*\r
+ * internal flash configuration\r
+ */\r
+MEMORY\r
+{\r
+ PMU_PFLASH (rx!p): org = 0x80000000, len = 2560K /*Program Flash Memory (PFLASH)*/ \r
+ PMU_DFLASH0 (r!xp): org = 0xAFE00000, len = 64K /*Data Flash Memory (DFLASH0)*/ \r
+ PMU_DFLASH1 (r!xp): org = 0xAFE10000, len = 64K /*Data Flash Memory (DFLASH1)*/ \r
+ BROM (rx!p): org = 0xAFFFC000, len = 16K /*Boot ROM (BROM)*/ \r
+ PMI_SPRAM (wx!p): org = 0xC0000000, len = 40K /*Scratch-Pad RAM (SPRAM)*/ \r
+ DMI_LDRAM (w!xp): org = 0xD0000000, len = 128K /*Local Data RAM (LDRAM)*/ \r
+ PCP_CMEM (rxp): org = 0xF0060000, len = 32K /*PCP Code Memory (CMEM)*/ \r
+ PCP_PRAM (wp!x): org = 0xF0050000, len = 16K /*PCP Data Memory (PRAM)*/ \r
+ \r
+} \r
+\r
+SECTIONS\r
+{\r
+ /*Code-Sections*/\r
+ \r
+ /*\r
+ * Startup code for TriCore\r
+ */\r
+ .startup_code :\r
+ {\r
+ PROVIDE(__startup_code_start = .);\r
+ \r
+ /*PROTECTED REGION ID(Protection: iROM .startup_code.begin) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ *(.startup_code) /*Startup code for TriCore*/ \r
+ *(.startup_code*)\r
+ \r
+ /*PROTECTED REGION ID(Protection: iROM .startup_code) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ PROVIDE(__startup_code_end = .);\r
+ . = ALIGN(8);\r
+ \r
+ } > PMU_PFLASH /* PMU_PFLASH: Program Flash Memory (PFLASH) */ \r
+ \r
+ /*\r
+ * Code section\r
+ */\r
+ .text :\r
+ {\r
+ PROVIDE(__text_start = .);\r
+ \r
+ /*PROTECTED REGION ID(Protection: iROM .text.begin) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ *(.text) /*Code section*/ \r
+ *(.text*)\r
+ *(.gnu.linkonce.t.*)\r
+ \r
+ /*PROTECTED REGION ID(Protection: iROM .text) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ PROVIDE(__text_end = .);\r
+ . = ALIGN(8);\r
+ \r
+ } > PMU_PFLASH /* PMU_PFLASH: Program Flash Memory (PFLASH) */ \r
+ \r
+ /*\r
+ * Code executed before calling main\r
+ */\r
+ .init :\r
+ {\r
+ PROVIDE(__init_start = .);\r
+ \r
+ /*PROTECTED REGION ID(Protection: iROM .init.begin) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ KEEP(*(.init)) /*Code executed before calling main*/ \r
+ KEEP(*(.init*))\r
+ \r
+ /*PROTECTED REGION ID(Protection: iROM .init) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ PROVIDE(__init_end = .);\r
+ . = ALIGN(8);\r
+ \r
+ } > PMU_PFLASH /* PMU_PFLASH: Program Flash Memory (PFLASH) */ \r
+ \r
+ /*\r
+ * Code executed before exiting program\r
+ */\r
+ .fini :\r
+ {\r
+ PROVIDE(__fini_start = .);\r
+ \r
+ /*PROTECTED REGION ID(Protection: iROM .fini.begin) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ KEEP(*(.fini)) /*Code executed before exiting program*/ \r
+ KEEP(*(.fini*))\r
+ \r
+ /*PROTECTED REGION ID(Protection: iROM .fini) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ PROVIDE(__fini_end = .);\r
+ . = ALIGN(8);\r
+ \r
+ } > PMU_PFLASH /* PMU_PFLASH: Program Flash Memory (PFLASH) */ \r
+ \r
+ /*\r
+ * Section for trap table\r
+ */\r
+ .traptab :\r
+ {\r
+ PROVIDE(__traptab_start = .);\r
+ \r
+ /*PROTECTED REGION ID(Protection: iROM .traptab.begin) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ *(.traptab) /*Section for trap table*/ \r
+ *(.traptab*)\r
+ \r
+ /*PROTECTED REGION ID(Protection: iROM .traptab) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ PROVIDE(__traptab_end = .);\r
+ . = ALIGN(8);\r
+ \r
+ } > PMU_PFLASH /* PMU_PFLASH: Program Flash Memory (PFLASH) */ \r
+ \r
+ /*\r
+ * Section for interrupt table\r
+ */\r
+ .inttab :\r
+ {\r
+ PROVIDE(__inttab_start = .);\r
+ \r
+ /*PROTECTED REGION ID(Protection: iROM .inttab.begin) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ *(.inttab) /*Section for interrupt table*/ \r
+ *(.inttab*)\r
+ \r
+ /*PROTECTED REGION ID(Protection: iROM .inttab) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ PROVIDE(__inttab_end = .);\r
+ . = ALIGN(8);\r
+ \r
+ } > PMU_PFLASH /* PMU_PFLASH: Program Flash Memory (PFLASH) */ \r
+ \r
+ /*\r
+ * Exception handling frame for C++ exceptions\r
+ */\r
+ .eh_frame :\r
+ {\r
+ PROVIDE(__eh_frame_start = .);\r
+ \r
+ /*PROTECTED REGION ID(Protection: iROM .eh_frame.begin) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ *(.eh_frame) /*Exception handling frame for C++ exceptions*/ \r
+ *(.eh_frame*)\r
+ \r
+ /*PROTECTED REGION ID(Protection: iROM .eh_frame) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ PROVIDE(__eh_frame_end = .);\r
+ . = ALIGN(8);\r
+ \r
+ } > PMU_PFLASH /* PMU_PFLASH: Program Flash Memory (PFLASH) */ \r
+ \r
+ /*\r
+ * Section for constructors\r
+ */\r
+ .ctors :\r
+ {\r
+ PROVIDE(__ctors_start = .);\r
+ \r
+ /*PROTECTED REGION ID(Protection: iROM .ctors.begin) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ KEEP(*(.ctors)) /*Section for constructors*/ \r
+ KEEP(*(.ctors*))\r
+ \r
+ /*PROTECTED REGION ID(Protection: iROM .ctors) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ PROVIDE(__ctors_end = .);\r
+ . = ALIGN(8);\r
+ \r
+ } > PMU_PFLASH /* PMU_PFLASH: Program Flash Memory (PFLASH) */ \r
+ \r
+ /*\r
+ * Section for destructors\r
+ */\r
+ .dtors :\r
+ {\r
+ PROVIDE(__dtors_start = .);\r
+ \r
+ /*PROTECTED REGION ID(Protection: iROM .dtors.begin) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ KEEP(*(.dtors)) /*Section for destructors*/ \r
+ KEEP(*(.dtors*))\r
+ \r
+ /*PROTECTED REGION ID(Protection: iROM .dtors) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ PROVIDE(__dtors_end = .);\r
+ . = ALIGN(8);\r
+ \r
+ } > PMU_PFLASH /* PMU_PFLASH: Program Flash Memory (PFLASH) */ \r
+ \r
+\r
+ /*Absolute Data-Sections*/\r
+ \r
+ /*\r
+ * Initialised data addressed as absolute\r
+ */\r
+ .zdata :\r
+ {\r
+ PROVIDE(__zdata_start = .);\r
+ \r
+ /*PROTECTED REGION ID(Protection: iROM .zdata.begin) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ *(.zdata) /*Initialised data addressed as absolute*/ \r
+ *(.zdata*)\r
+ *(.gnu.linkonce.z.*)\r
+ *(.gnu.linkonce.zr.*)\r
+ \r
+ /*PROTECTED REGION ID(Protection: iROM .zdata) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+\r
+ PROVIDE(__zdata_end = .);\r
+ . = ALIGN(8);\r
+ \r
+ } > DMI_LDRAM /* DMI_LDRAM: Local Data RAM (LDRAM) */ \r
+ \r
+ /*\r
+ * Not initialised data addressed as absolute\r
+ */\r
+ .zbss (NOLOAD) :\r
+ {\r
+ PROVIDE(__zbss_start = .);\r
+ \r
+ /*PROTECTED REGION ID(Protection: iROM .zbss.begin) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ *(.zbss) /*Not Initialised data addressed as absolute*/ \r
+ *(.zbss*)\r
+ *(.gnu.linkonce.zb.*)\r
+ \r
+ /*PROTECTED REGION ID(Protection: iROM .zbss) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+\r
+ PROVIDE(__zbss_end = .);\r
+ . = ALIGN(8);\r
+ \r
+ } > DMI_LDRAM /* DMI_LDRAM: Local Data RAM (LDRAM) */ \r
+ \r
+ /*\r
+ * Not initialised bit data\r
+ */\r
+ .bbss (NOLOAD) :\r
+ {\r
+ PROVIDE(__bbss_start = .);\r
+ \r
+ /*PROTECTED REGION ID(Protection: iROM .bbss.begin) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ *(.bbss) /*Not initialised bit data*/ \r
+ *(.bbss*)\r
+ \r
+ /*PROTECTED REGION ID(Protection: iROM .bbss) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+\r
+ PROVIDE(__bbss_end = .);\r
+ . = ALIGN(8);\r
+ \r
+ } > DMI_LDRAM /* DMI_LDRAM: Local Data RAM (LDRAM) */ \r
+ \r
+ /*\r
+ * Bit variables\r
+ */\r
+ .bdata :\r
+ {\r
+ PROVIDE(__bdata_start = .);\r
+ \r
+ /*PROTECTED REGION ID(Protection: iROM .bdata.begin) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ *(.bdata) /*Bit variables*/ \r
+ *(.bdata*)\r
+ \r
+ /*PROTECTED REGION ID(Protection: iROM .bdata) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+\r
+ PROVIDE(__bdata_end = .);\r
+ . = ALIGN(8);\r
+ \r
+ } > DMI_LDRAM /* DMI_LDRAM: Local Data RAM (LDRAM) */ \r
+ \r
+\r
+ /*Small Data-Sections*/\r
+ \r
+ /*\r
+ * Storage of write-protected data addressed as small\r
+ */\r
+ .sdata2 :\r
+ {\r
+ PROVIDE(__sdata2_start = .);\r
+ \r
+ /*PROTECTED REGION ID(Protection: iROM .sdata2.begin) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ *(.sdata.rodata) /*Storage of write-protected data addressed as small*/ \r
+ *(.sdata.rodata*)\r
+ *(.gnu.linkonce.sr.*)\r
+ \r
+ /*PROTECTED REGION ID(Protection: iROM .sdata2) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ PROVIDE(__sdata2_end = .);\r
+ . = ALIGN(8);\r
+ \r
+ } > PMU_PFLASH /* PMU_PFLASH: Program Flash Memory (PFLASH) */ \r
+ \r
+ /*\r
+ * Section stores initialised data which is addressable by small data area pointer (%a0)\r
+ */\r
+ .sdata :\r
+ {\r
+ PROVIDE(__sdata_start = .);\r
+ \r
+ /*PROTECTED REGION ID(Protection: iROM .sdata.begin) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ *(.sdata) /*Section stores initialised data which is addressable by small data area pointer (%a0)*/ \r
+ *(.sdata*)\r
+ *(.gnu.linkonce.s.*)\r
+ \r
+ /*PROTECTED REGION ID(Protection: iROM .sdata) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ PROVIDE(__sdata_end = .);\r
+ . = ALIGN(8);\r
+ \r
+ } > DMI_LDRAM /* DMI_LDRAM: Local Data RAM (LDRAM) */ \r
+ \r
+ /*\r
+ * Not initialised data in section ’.sbss’, addressable by small data area pointer (%a0)\r
+ */\r
+ .sbss (NOLOAD) :\r
+ {\r
+ PROVIDE(__sbss_start = .);\r
+ \r
+ /*PROTECTED REGION ID(Protection: iROM .sbss.begin) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ *(.sbss) /*Not initialised data in section ’.sbss’, addressable by small data area pointer (%a0)*/ \r
+ *(.sbss*)\r
+ *(.gnu.linkonce.sb.*)\r
+ \r
+ /*PROTECTED REGION ID(Protection: iROM .sbss) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ PROVIDE(__sbss_end = .);\r
+ . = ALIGN(8);\r
+ \r
+ } > DMI_LDRAM /* DMI_LDRAM: Local Data RAM (LDRAM) */ \r
+ \r
+\r
+ /*Normal Data-Sections*/\r
+ \r
+ /*\r
+ * Storage of write-protected data\r
+ */\r
+ .rodata :\r
+ {\r
+ PROVIDE(__rodata_start = .);\r
+ \r
+ /*PROTECTED REGION ID(Protection: iROM .rodata.begin) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ *(.rodata) /*Storage of write-protected data*/ \r
+ *(.rodata*)\r
+ *(.gnu.linkonce.r.*)\r
+ *(.jcr.*)\r
+ \r
+ /*PROTECTED REGION ID(Protection: iROM .rodata) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ PROVIDE(__rodata_end = .);\r
+ . = ALIGN(8);\r
+ \r
+ } > PMU_PFLASH /* PMU_PFLASH: Program Flash Memory (PFLASH) */ \r
+ \r
+ /*\r
+ * Initialised data\r
+ */\r
+ .data :\r
+ {\r
+ PROVIDE(__data_start = .);\r
+ \r
+ /*PROTECTED REGION ID(Protection: iROM .data.begin) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ *(.data) /*Initialised data*/ \r
+ *(.data*)\r
+ *(.gnu.linkonce.d.*)\r
+ \r
+ /*PROTECTED REGION ID(Protection: iROM .data) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ PROVIDE(__data_end = .);\r
+ . = ALIGN(8);\r
+ \r
+ } > DMI_LDRAM /* DMI_LDRAM: Local Data RAM (LDRAM) */ \r
+ \r
+ /*\r
+ * Not Initialised data\r
+ */\r
+ .bss (NOLOAD) :\r
+ {\r
+ PROVIDE(__bss_start = .);\r
+ \r
+ /*PROTECTED REGION ID(Protection: iROM .bss.begin) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ *(.bss) /*Not Initialised data*/ \r
+ *(.bss*)\r
+ *(.gnu.linkonce.b.*)\r
+ \r
+ /*PROTECTED REGION ID(Protection: iROM .bss) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ PROVIDE(__bss_end = .);\r
+ . = ALIGN(8);\r
+ \r
+ } > DMI_LDRAM /* DMI_LDRAM: Local Data RAM (LDRAM) */ \r
+ \r
+ \r
+\r
+ /*PCP-Sections*/\r
+ \r
+ /*\r
+ * PCP Code Section\r
+ */\r
+ .pcptext :\r
+ {\r
+ PROVIDE(__pcptext_start = .);\r
+ \r
+ /*PROTECTED REGION ID(Protection: iROM .pcptext.begin) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ KEEP(*(.pcptext)) /*PCP Code Section*/ \r
+ KEEP(*(.pcptext*))\r
+ \r
+ /*PROTECTED REGION ID(Protection: iROM .pcptext) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ PROVIDE(__pcptext_end = .);\r
+ . = ALIGN(8);\r
+ \r
+ } > PCP_CMEM AT > PMU_PFLASH /* PCP_CMEM: PCP Code Memory (CMEM) */ /* PMU_PFLASH: Program Flash Memory (PFLASH) */ \r
+ \r
+ /*\r
+ * PCP Data Section\r
+ */\r
+ .pcpdata :\r
+ {\r
+ PROVIDE(__pcpdata_start = .);\r
+ \r
+ /*PROTECTED REGION ID(Protection: iROM .pcpdata.begin) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ KEEP(*(.pcpdata)) /*PCP Data Section*/ \r
+ KEEP(*(.pcpdata*))\r
+ \r
+ /*PROTECTED REGION ID(Protection: iROM .pcpdata) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+ PROVIDE(__pcpdata_end = .);\r
+ . = ALIGN(8);\r
+ \r
+ } > PCP_PRAM AT > PMU_PFLASH /* PCP_PRAM: PCP Data Memory (PRAM) */ /* PMU_PFLASH: Program Flash Memory (PFLASH) */ \r
+ \r
+\r
+ \r
+ \r
+ .clear_sec :\r
+ {\r
+ . = ALIGN(8);\r
+ PROVIDE(__clear_table = .) ;\r
+ \r
+ LONG(0 + ADDR(.bss)); LONG(SIZEOF(.bss));\r
+ LONG(0 + ADDR(.sbss)); LONG(SIZEOF(.sbss));\r
+ LONG(0 + ADDR(.zbss)); LONG(SIZEOF(.zbss));\r
+ LONG(0 + ADDR(.bbss)); LONG(SIZEOF(.bbss));\r
+ /*PROTECTED REGION ID(Protection: iROM clear section) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ LONG(-1); LONG(-1);\r
+ \r
+ } > PMU_PFLASH\r
+ \r
+ \r
+ .copy_sec :\r
+ {\r
+ . = ALIGN(8);\r
+ PROVIDE(__copy_table = .) ;\r
+ \r
+ LONG(LOADADDR(.pcptext)); LONG(0 + ADDR(.pcptext)); LONG(SIZEOF(.pcptext));\r
+ LONG(LOADADDR(.pcpdata)); LONG(0 + ADDR(.pcpdata)); LONG(SIZEOF(.pcpdata));\r
+ \r
+ /*PROTECTED REGION ID(Protection: iROM copy section) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ LONG(-1); LONG(-1); LONG(-1);\r
+ } > PMU_PFLASH \r
+ \r
+ .csa (NOLOAD) :\r
+ {\r
+ . = ALIGN(64);\r
+ __CSA_BEGIN = . ;\r
+ . += __CSA_SIZE;\r
+ . = ALIGN(64);\r
+ __CSA_END = .;\r
+ } > DMI_LDRAM\r
+ \r
+ .heap (NOLOAD) :\r
+ {\r
+ . = ALIGN(8);\r
+ __HEAP = .;\r
+ . += __HEAP_SIZE;\r
+ __HEAP_END = .;\r
+ } > DMI_LDRAM\r
+ \r
+ .istack (NOLOAD) :\r
+ {\r
+ . = ALIGN(8);\r
+ . += __ISTACK_SIZE;\r
+ __ISTACK = .;\r
+ } > DMI_LDRAM\r
+ \r
+ .ustack (NOLOAD) :\r
+ {\r
+ . = ALIGN(8);\r
+ . += __USTACK_SIZE;\r
+ __USTACK = .;\r
+ } > DMI_LDRAM\r
+ \r
+ /*PROTECTED REGION ID(Protection:iROM-User-Sections) ENABLED START*/\r
+ /*Protection-Area for your own LDF-Code*/\r
+ /*PROTECTED REGION END*/\r
+ \r
+}\r
+\r
--- /dev/null
+<?xml version="1.0" encoding="UTF-8"?>\r
+<LinkerModel:LDFProject xmi:version="2.0" xmlns:xmi="http://www.omg.org/XMI" xmlns:LinkerModel="http://LinkerModel">\r
+ <MemoryRegionDescription href="../TriBoard-TC1782.mdm#/"/>\r
+ <Configurations>\r
+ <LDF href="../iRAM.lm#/"/>\r
+ <LDF href="../iROM.lm#/"/>\r
+ </Configurations>\r
+</LinkerModel:LDFProject>\r
--- /dev/null
+<?xml version="1.0" encoding="UTF-8"?>\r
+<LinkerModel:LDFMemoryDescripton xmi:version="2.0" xmlns:xmi="http://www.omg.org/XMI" xmlns:LinkerModel="http://LinkerModel" Description="" Name="TriBoard-TC1782" EBMCFG="">\r
+ <Memory Description="Program Memory Unit (PMU)" Name="Program Unit">\r
+ <Region Description="Program Flash Memory (PFLASH)" Name="PMU_PFLASH" Begin="0x80000000" Attributes="rx!p" Length="2560" LengthUnit="KB"/>\r
+ <Region Description="Data Flash Memory (DFLASH0)" Name="PMU_DFLASH0" Begin="0xAFE00000" Attributes="r!xp" Length="64" LengthUnit="KB"/>\r
+ <Region Description="Data Flash Memory (DFLASH1)" Name="PMU_DFLASH1" Begin="0xAFE10000" Attributes="r!xp" Length="64" LengthUnit="KB"/>\r
+ <Region Description="Boot ROM (BROM)" Name="BROM" Begin="0xAFFFC000" Attributes="rx!p" Length="16" LengthUnit="KB"/>\r
+ </Memory>\r
+ <Memory Description="Program Memory Interface (PMI)" Name="Program Interface">\r
+ <Region Description="Scratch-Pad RAM (SPRAM)" Name="PMI_SPRAM" Begin="0xC0000000" Attributes="wx!p" Length="40" LengthUnit="KB"/>\r
+ </Memory>\r
+ <Memory Description="Data Memory Interface (DMI)" Name="Data Interface">\r
+ <Region Description="Local Data RAM (LDRAM)" Name="DMI_LDRAM" Begin="0xD0000000" Attributes="w!xp" Length="128" LengthUnit="KB"/>\r
+ </Memory>\r
+ <Memory Description="PCP Memory" Name="PCP">\r
+ <Region Description="PCP Code Memory (CMEM)" Name="PCP_CMEM" Begin="0xF0060000" Attributes="rxp" Length="32" LengthUnit="KB"/>\r
+ <Region Description="PCP Data Memory (PRAM)" Name="PCP_PRAM" Begin="0xF0050000" Attributes="wp!x" Length="16" LengthUnit="KB"/>\r
+ </Memory>\r
+</LinkerModel:LDFMemoryDescripton>\r
--- /dev/null
+<?xml version="1.0" encoding="UTF-8"?>\r
+<LinkerModel:LinkerDescriptionFile xmi:version="2.0" xmlns:xmi="http://www.omg.org/XMI" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:LinkerModel="http://LinkerModel" xmlns:memorydescription="http://MemoryDescription" Description="internal RAM configuration" Name="iRAM">\r
+ <Output>\r
+ <Code>\r
+ <DeepOutputSection Description="Startup code for TriCore" Name=".startup_code" RuntimeAddressVMA="//@LocalAliases/@Alias.1">\r
+ <InputEntry Description="Startup code for TriCore" Name=".startup_code" InputSection="//@Input/@InputSection.0"/>\r
+ </DeepOutputSection>\r
+ <DeepOutputSection Description="Code section" Name=".text" RuntimeAddressVMA="//@LocalAliases/@Alias.1">\r
+ <InputEntry Description="Code section" Name=".text" InputSection="//@Input/@InputSection.3"/>\r
+ </DeepOutputSection>\r
+ <DeepOutputSection Description="Code executed before calling main" Name=".init" RuntimeAddressVMA="//@LocalAliases/@Alias.1">\r
+ <InputEntry Description="Code executed before calling main" Name=".init" InputSection="//@Input/@InputSection.5" KEEP="true"/>\r
+ </DeepOutputSection>\r
+ <DeepOutputSection Description="Code executed before exiting program" Name=".fini" RuntimeAddressVMA="//@LocalAliases/@Alias.1">\r
+ <InputEntry Description="Code executed before exiting program" Name=".fini" InputSection="//@Input/@InputSection.6" KEEP="true"/>\r
+ </DeepOutputSection>\r
+ <DeepOutputSection Description="Section for trap table" Name=".traptab" RuntimeAddressVMA="//@LocalAliases/@Alias.1">\r
+ <InputEntry Description="Section for trap table" Name=".traptab" InputSection="//@Input/@InputSection.7"/>\r
+ </DeepOutputSection>\r
+ <DeepOutputSection Description="Section for interrupt table" Name=".inttab" RuntimeAddressVMA="//@LocalAliases/@Alias.1">\r
+ <InputEntry Description="Section for interrupt table" Name=".inttab" InputSection="//@Input/@InputSection.8"/>\r
+ </DeepOutputSection>\r
+ <DeepOutputSection Description="Exception handling frame for C++ exceptions" Name=".eh_frame" RuntimeAddressVMA="//@LocalAliases/@Alias.1">\r
+ <InputEntry Description="Exception handling frame for C++ exceptions" Name=".eh_frame" InputSection="//@Input/@InputSection.17"/>\r
+ </DeepOutputSection>\r
+ <DeepOutputSection Description="Section for constructors" Name=".ctors" RuntimeAddressVMA="//@LocalAliases/@Alias.1">\r
+ <InputEntry Description="Section for constructors" Name=".ctors" InputSection="//@Input/@InputSection.18" KEEP="true"/>\r
+ </DeepOutputSection>\r
+ <DeepOutputSection Description="Section for destructors" Name=".dtors" RuntimeAddressVMA="//@LocalAliases/@Alias.1">\r
+ <InputEntry Description="Section for destructors" Name=".dtors" InputSection="//@Input/@InputSection.19" KEEP="true"/>\r
+ </DeepOutputSection>\r
+ </Code>\r
+ <Data>\r
+ <Absolute>\r
+ <DeepOutputSection Description="Initialised data addressed as absolute" Name=".zdata">\r
+ <RuntimeAddressVMA xsi:type="memorydescription:Region" href="TriBoard-TC1782.mdm#//@Memory.2/@Region.0"/>\r
+ <InputEntry Description="Initialised data addressed as absolute" Name=".zdata" InputSection="//@Input/@InputSection.13"/>\r
+ </DeepOutputSection>\r
+ <DeepOutputSection Description="Not initialised data addressed as absolute" Name=".zbss" NOLOAD="true">\r
+ <RuntimeAddressVMA xsi:type="memorydescription:Region" href="TriBoard-TC1782.mdm#//@Memory.2/@Region.0"/>\r
+ <InputEntry Description="Not Initialised data addressed as absolute" Name=".zbss" InputSection="//@Input/@InputSection.14"/>\r
+ </DeepOutputSection>\r
+ <DeepOutputSection Description="Not initialised bit data" Name=".bbss" NOLOAD="true">\r
+ <RuntimeAddressVMA xsi:type="memorydescription:Region" href="TriBoard-TC1782.mdm#//@Memory.2/@Region.0"/>\r
+ <InputEntry Description="Not initialised bit data" Name=".bbss" InputSection="//@Input/@InputSection.16"/>\r
+ </DeepOutputSection>\r
+ <DeepOutputSection Description="Bit variables" Name=".bdata">\r
+ <RuntimeAddressVMA xsi:type="memorydescription:Region" href="TriBoard-TC1782.mdm#//@Memory.2/@Region.0"/>\r
+ <InputEntry Description="Bit variables" Name=".bdata" InputSection="//@Input/@InputSection.20"/>\r
+ </DeepOutputSection>\r
+ </Absolute>\r
+ <Small>\r
+ <DeepOutputSection Description="Storage of write-protected data addressed as small" Name=".sdata2" RuntimeAddressVMA="//@LocalAliases/@Alias.1">\r
+ <InputEntry Description="Storage of write-protected data addressed as small" Name=".sdata.rodata" InputSection="//@Input/@InputSection.10"/>\r
+ </DeepOutputSection>\r
+ <DeepOutputSection Description="Section stores initialised data which is addressable by small data area pointer (%a0)" Name=".sdata" RuntimeAddressVMA="//@LocalAliases/@Alias.0">\r
+ <InputEntry Description="Section stores initialised data which is addressable by small data area pointer (%a0)" Name=".sdata" InputSection="//@Input/@InputSection.11"/>\r
+ </DeepOutputSection>\r
+ <DeepOutputSection Description="Not initialised data in section ’.sbss’, addressable by small data area pointer (%a0)" Name=".sbss" RuntimeAddressVMA="//@LocalAliases/@Alias.0" NOLOAD="true">\r
+ <InputEntry Description="Not initialised data in section ’.sbss’, addressable by small data area pointer (%a0)" Name=".sbss" InputSection="//@Input/@InputSection.15"/>\r
+ </DeepOutputSection>\r
+ </Small>\r
+ <Normal>\r
+ <DeepOutputSection Description="Storage of write-protected data" Name=".rodata" RuntimeAddressVMA="//@LocalAliases/@Alias.1">\r
+ <InputEntry Description="Storage of write-protected data" Name=".rodata" InputSection="//@Input/@InputSection.1"/>\r
+ </DeepOutputSection>\r
+ <DeepOutputSection Description="Initialised data" Name=".data" RuntimeAddressVMA="//@LocalAliases/@Alias.0">\r
+ <InputEntry Description="Initialised data" Name=".data" InputSection="//@Input/@InputSection.2"/>\r
+ </DeepOutputSection>\r
+ <DeepOutputSection Description="Not Initialised data" Name=".bss" RuntimeAddressVMA="//@LocalAliases/@Alias.0" NOLOAD="true">\r
+ <InputEntry Description="Not Initialised data" Name=".bss" InputSection="//@Input/@InputSection.4"/>\r
+ </DeepOutputSection>\r
+ </Normal>\r
+ </Data>\r
+ <PCP>\r
+ <DeepOutputSection Description="PCP Code Section" Name=".pcptext" LoadMachineAddressLMA="//@LocalAliases/@Alias.1">\r
+ <RuntimeAddressVMA xsi:type="memorydescription:Region" href="TriBoard-TC1782.mdm#//@Memory.3/@Region.0"/>\r
+ <InputEntry Description="PCP Code Section" Name=".pcptext" InputSection="//@Input/@InputSection.9" KEEP="true"/>\r
+ </DeepOutputSection>\r
+ <DeepOutputSection Description="PCP Data Section" Name=".pcpdata" LoadMachineAddressLMA="//@LocalAliases/@Alias.1">\r
+ <RuntimeAddressVMA xsi:type="memorydescription:Region" href="TriBoard-TC1782.mdm#//@Memory.3/@Region.1"/>\r
+ <InputEntry Description="PCP Data Section" Name=".pcpdata" InputSection="//@Input/@InputSection.12" KEEP="true"/>\r
+ </DeepOutputSection>\r
+ </PCP>\r
+ <Environment IStackSize="256" IStackUnit="B" UStackUnit="KB" UStackSize="1" CSASize="16" CSAUnit="KB" ClearTableRegion="//@LocalAliases/@Alias.1" CopyTableRegion="//@LocalAliases/@Alias.1" HeapSize="4" HeapUnit="KB">\r
+ <CSARegionRef xsi:type="memorydescription:Region" href="TriBoard-TC1782.mdm#//@Memory.2/@Region.0"/>\r
+ <IStackRegion xsi:type="memorydescription:Region" href="TriBoard-TC1782.mdm#//@Memory.2/@Region.0"/>\r
+ <UStackRegion xsi:type="memorydescription:Region" href="TriBoard-TC1782.mdm#//@Memory.2/@Region.0"/>\r
+ <HeapRegion xsi:type="memorydescription:Region" href="TriBoard-TC1782.mdm#//@Memory.2/@Region.0"/>\r
+ </Environment>\r
+ </Output>\r
+ <Input>\r
+ <InputSection Description="Startup code for TriCore" Name=".startup_code"/>\r
+ <InputSection Description="Storage of write-protected data" Name=".rodata"/>\r
+ <InputSection Description="Initialised data" Name=".data"/>\r
+ <InputSection Description="Code section" Name=".text"/>\r
+ <InputSection Description="Not Initialised data" Name=".bss"/>\r
+ <InputSection Description="Code executed before calling main" Name=".init"/>\r
+ <InputSection Description="Code executed before exiting program" Name=".fini"/>\r
+ <InputSection Description="Section for trap table" Name=".traptab"/>\r
+ <InputSection Description="Section for interrupt table" Name=".inttab"/>\r
+ <InputSection Description="PCP Code Section" Name=".pcptext"/>\r
+ <InputSection Description="Storage of write-protected data addressed as small" Name=".sdata.rodata"/>\r
+ <InputSection Description="Section stores initialised data which is addressable by small data area pointer (%a0)" Name=".sdata"/>\r
+ <InputSection Description="PCP Data Section" Name=".pcpdata"/>\r
+ <InputSection Description="Initialised data addressed as absolute" Name=".zdata"/>\r
+ <InputSection Description="Not Initialised data addressed as absolute" Name=".zbss"/>\r
+ <InputSection Description="Not initialised data in section ’.sbss’, addressable by small data area pointer (%a0)" Name=".sbss"/>\r
+ <InputSection Description="Not initialised bit data" Name=".bbss"/>\r
+ <InputSection Description="Exception handling frame for C++ exceptions" Name=".eh_frame"/>\r
+ <InputSection Description="Section for constructors" Name=".ctors"/>\r
+ <InputSection Description="Section for destructors" Name=".dtors"/>\r
+ <InputSection Description="Bit variables" Name=".bdata"/>\r
+ </Input>\r
+ <Files/>\r
+ <LocalAliases>\r
+ <Alias Description="Alias for RAM" Name="DATA">\r
+ <Region href="TriBoard-TC1782.mdm#//@Memory.2/@Region.0"/>\r
+ </Alias>\r
+ <Alias Description="Alias for Code" Name="CODE">\r
+ <Region href="TriBoard-TC1782.mdm#//@Memory.1/@Region.0"/>\r
+ </Alias>\r
+ </LocalAliases>\r
+</LinkerModel:LinkerDescriptionFile>\r
--- /dev/null
+<?xml version="1.0" encoding="UTF-8"?>\r
+<LinkerModel:LinkerDescriptionFile xmi:version="2.0" xmlns:xmi="http://www.omg.org/XMI" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:LinkerModel="http://LinkerModel" xmlns:memorydescription="http://MemoryDescription" Description="internal flash configuration" Name="iROM">\r
+ <Output>\r
+ <Code>\r
+ <DeepOutputSection Description="Startup code for TriCore" Name=".startup_code" RuntimeAddressVMA="//@LocalAliases/@Alias.1">\r
+ <InputEntry Description="Startup code for TriCore" Name=".startup_code" InputSection="//@Input/@InputSection.0"/>\r
+ </DeepOutputSection>\r
+ <DeepOutputSection Description="Code section" Name=".text" RuntimeAddressVMA="//@LocalAliases/@Alias.1">\r
+ <InputEntry Description="Code section" Name=".text" InputSection="//@Input/@InputSection.3"/>\r
+ </DeepOutputSection>\r
+ <DeepOutputSection Description="Code executed before calling main" Name=".init" RuntimeAddressVMA="//@LocalAliases/@Alias.1">\r
+ <InputEntry Description="Code executed before calling main" Name=".init" InputSection="//@Input/@InputSection.5" KEEP="true"/>\r
+ </DeepOutputSection>\r
+ <DeepOutputSection Description="Code executed before exiting program" Name=".fini" RuntimeAddressVMA="//@LocalAliases/@Alias.1">\r
+ <InputEntry Description="Code executed before exiting program" Name=".fini" InputSection="//@Input/@InputSection.6" KEEP="true"/>\r
+ </DeepOutputSection>\r
+ <DeepOutputSection Description="Section for trap table" Name=".traptab" RuntimeAddressVMA="//@LocalAliases/@Alias.1">\r
+ <InputEntry Description="Section for trap table" Name=".traptab" InputSection="//@Input/@InputSection.7"/>\r
+ </DeepOutputSection>\r
+ <DeepOutputSection Description="Section for interrupt table" Name=".inttab" RuntimeAddressVMA="//@LocalAliases/@Alias.1">\r
+ <InputEntry Description="Section for interrupt table" Name=".inttab" InputSection="//@Input/@InputSection.8"/>\r
+ </DeepOutputSection>\r
+ <DeepOutputSection Description="Exception handling frame for C++ exceptions" Name=".eh_frame" RuntimeAddressVMA="//@LocalAliases/@Alias.1">\r
+ <InputEntry Description="Exception handling frame for C++ exceptions" Name=".eh_frame" InputSection="//@Input/@InputSection.17"/>\r
+ </DeepOutputSection>\r
+ <DeepOutputSection Description="Section for constructors" Name=".ctors" RuntimeAddressVMA="//@LocalAliases/@Alias.1">\r
+ <InputEntry Description="Section for constructors" Name=".ctors" InputSection="//@Input/@InputSection.18" KEEP="true"/>\r
+ </DeepOutputSection>\r
+ <DeepOutputSection Description="Section for destructors" Name=".dtors" RuntimeAddressVMA="//@LocalAliases/@Alias.1">\r
+ <InputEntry Description="Section for destructors" Name=".dtors" InputSection="//@Input/@InputSection.19" KEEP="true"/>\r
+ </DeepOutputSection>\r
+ </Code>\r
+ <Data>\r
+ <Absolute>\r
+ <DeepOutputSection Description="Initialised data addressed as absolute" Name=".zdata">\r
+ <RuntimeAddressVMA xsi:type="memorydescription:Region" href="TriBoard-TC1782.mdm#//@Memory.2/@Region.0"/>\r
+ <InputEntry Description="Initialised data addressed as absolute" Name=".zdata" InputSection="//@Input/@InputSection.13"/>\r
+ </DeepOutputSection>\r
+ <DeepOutputSection Description="Not initialised data addressed as absolute" Name=".zbss" NOLOAD="true">\r
+ <RuntimeAddressVMA xsi:type="memorydescription:Region" href="TriBoard-TC1782.mdm#//@Memory.2/@Region.0"/>\r
+ <InputEntry Description="Not Initialised data addressed as absolute" Name=".zbss" InputSection="//@Input/@InputSection.14"/>\r
+ </DeepOutputSection>\r
+ <DeepOutputSection Description="Not initialised bit data" Name=".bbss" NOLOAD="true">\r
+ <RuntimeAddressVMA xsi:type="memorydescription:Region" href="TriBoard-TC1782.mdm#//@Memory.2/@Region.0"/>\r
+ <InputEntry Description="Not initialised bit data" Name=".bbss" InputSection="//@Input/@InputSection.16"/>\r
+ </DeepOutputSection>\r
+ <DeepOutputSection Description="Bit variables" Name=".bdata">\r
+ <RuntimeAddressVMA xsi:type="memorydescription:Region" href="TriBoard-TC1782.mdm#//@Memory.2/@Region.0"/>\r
+ <InputEntry Description="Bit variables" Name=".bdata" InputSection="//@Input/@InputSection.20"/>\r
+ </DeepOutputSection>\r
+ </Absolute>\r
+ <Small>\r
+ <DeepOutputSection Description="Storage of write-protected data addressed as small" Name=".sdata2" RuntimeAddressVMA="//@LocalAliases/@Alias.1">\r
+ <InputEntry Description="Storage of write-protected data addressed as small" Name=".sdata.rodata" InputSection="//@Input/@InputSection.10"/>\r
+ </DeepOutputSection>\r
+ <DeepOutputSection Description="Section stores initialised data which is addressable by small data area pointer (%a0)" Name=".sdata" RuntimeAddressVMA="//@LocalAliases/@Alias.0">\r
+ <InputEntry Description="Section stores initialised data which is addressable by small data area pointer (%a0)" Name=".sdata" InputSection="//@Input/@InputSection.11"/>\r
+ </DeepOutputSection>\r
+ <DeepOutputSection Description="Not initialised data in section ’.sbss’, addressable by small data area pointer (%a0)" Name=".sbss" RuntimeAddressVMA="//@LocalAliases/@Alias.0" NOLOAD="true">\r
+ <InputEntry Description="Not initialised data in section ’.sbss’, addressable by small data area pointer (%a0)" Name=".sbss" InputSection="//@Input/@InputSection.15"/>\r
+ </DeepOutputSection>\r
+ </Small>\r
+ <Normal>\r
+ <DeepOutputSection Description="Storage of write-protected data" Name=".rodata" RuntimeAddressVMA="//@LocalAliases/@Alias.1">\r
+ <InputEntry Description="Storage of write-protected data" Name=".rodata" InputSection="//@Input/@InputSection.1"/>\r
+ </DeepOutputSection>\r
+ <DeepOutputSection Description="Initialised data" Name=".data" RuntimeAddressVMA="//@LocalAliases/@Alias.0">\r
+ <InputEntry Description="Initialised data" Name=".data" InputSection="//@Input/@InputSection.2"/>\r
+ </DeepOutputSection>\r
+ <DeepOutputSection Description="Not Initialised data" Name=".bss" RuntimeAddressVMA="//@LocalAliases/@Alias.0" NOLOAD="true">\r
+ <InputEntry Description="Not Initialised data" Name=".bss" InputSection="//@Input/@InputSection.4"/>\r
+ </DeepOutputSection>\r
+ </Normal>\r
+ </Data>\r
+ <PCP>\r
+ <DeepOutputSection Description="PCP Code Section" Name=".pcptext" LoadMachineAddressLMA="//@LocalAliases/@Alias.1">\r
+ <RuntimeAddressVMA xsi:type="memorydescription:Region" href="TriBoard-TC1782.mdm#//@Memory.3/@Region.0"/>\r
+ <InputEntry Description="PCP Code Section" Name=".pcptext" InputSection="//@Input/@InputSection.9" KEEP="true"/>\r
+ </DeepOutputSection>\r
+ <DeepOutputSection Description="PCP Data Section" Name=".pcpdata" LoadMachineAddressLMA="//@LocalAliases/@Alias.1">\r
+ <RuntimeAddressVMA xsi:type="memorydescription:Region" href="TriBoard-TC1782.mdm#//@Memory.3/@Region.1"/>\r
+ <InputEntry Description="PCP Data Section" Name=".pcpdata" InputSection="//@Input/@InputSection.12" KEEP="true"/>\r
+ </DeepOutputSection>\r
+ </PCP>\r
+ <Environment IStackSize="256" IStackUnit="B" UStackUnit="KB" UStackSize="1" CSASize="16" CSAUnit="KB" ClearTableRegion="//@LocalAliases/@Alias.1" CopyTableRegion="//@LocalAliases/@Alias.1" HeapSize="4" HeapUnit="KB">\r
+ <CSARegionRef xsi:type="memorydescription:Region" href="TriBoard-TC1782.mdm#//@Memory.2/@Region.0"/>\r
+ <IStackRegion xsi:type="memorydescription:Region" href="TriBoard-TC1782.mdm#//@Memory.2/@Region.0"/>\r
+ <UStackRegion xsi:type="memorydescription:Region" href="TriBoard-TC1782.mdm#//@Memory.2/@Region.0"/>\r
+ <HeapRegion xsi:type="memorydescription:Region" href="TriBoard-TC1782.mdm#//@Memory.2/@Region.0"/>\r
+ </Environment>\r
+ </Output>\r
+ <Input>\r
+ <InputSection Description="Startup code for TriCore" Name=".startup_code"/>\r
+ <InputSection Description="Storage of write-protected data" Name=".rodata"/>\r
+ <InputSection Description="Initialised data" Name=".data"/>\r
+ <InputSection Description="Code section" Name=".text"/>\r
+ <InputSection Description="Not Initialised data" Name=".bss"/>\r
+ <InputSection Description="Code executed before calling main" Name=".init"/>\r
+ <InputSection Description="Code executed before exiting program" Name=".fini"/>\r
+ <InputSection Description="Section for trap table" Name=".traptab"/>\r
+ <InputSection Description="Section for interrupt table" Name=".inttab"/>\r
+ <InputSection Description="PCP Code Section" Name=".pcptext"/>\r
+ <InputSection Description="Storage of write-protected data addressed as small" Name=".sdata.rodata"/>\r
+ <InputSection Description="Section stores initialised data which is addressable by small data area pointer (%a0)" Name=".sdata"/>\r
+ <InputSection Description="PCP Data Section" Name=".pcpdata"/>\r
+ <InputSection Description="Initialised data addressed as absolute" Name=".zdata"/>\r
+ <InputSection Description="Not Initialised data addressed as absolute" Name=".zbss"/>\r
+ <InputSection Description="Not initialised data in section ’.sbss’, addressable by small data area pointer (%a0)" Name=".sbss"/>\r
+ <InputSection Description="Not initialised bit data" Name=".bbss"/>\r
+ <InputSection Description="Exception handling frame for C++ exceptions" Name=".eh_frame"/>\r
+ <InputSection Description="Section for constructors" Name=".ctors"/>\r
+ <InputSection Description="Section for destructors" Name=".dtors"/>\r
+ <InputSection Description="Bit variables" Name=".bdata"/>\r
+ </Input>\r
+ <Files/>\r
+ <LocalAliases>\r
+ <Alias Description="Alias for RAM" Name="DATA">\r
+ <Region href="TriBoard-TC1782.mdm#//@Memory.2/@Region.0"/>\r
+ </Alias>\r
+ <Alias Description="Alias for Code" Name="CODE">\r
+ <Region href="TriBoard-TC1782.mdm#//@Memory.0/@Region.0"/>\r
+ </Alias>\r
+ </LocalAliases>\r
+</LinkerModel:LinkerDescriptionFile>\r
projects / freertos / commitdiff