#define serWANTED_CLOCK_SCALING ( ( unsigned portLONG ) 16 )\r
\r
/* Constants to setup and access the VIC. */\r
-#define serU0VIC_CHANNEL ( ( unsigned portLONG ) 0x0006 )\r
-#define serU0VIC_CHANNEL_BIT ( ( unsigned portLONG ) 0x0040 )\r
-#define serU0VIC_ENABLE ( ( unsigned portLONG ) 0x0020 )\r
+#define serU1VIC_CHANNEL ( ( unsigned portLONG ) 0x0007 )\r
+#define serU1VIC_CHANNEL_BIT ( ( unsigned portLONG ) 0x0080 )\r
+#define serU1VIC_ENABLE ( ( unsigned portLONG ) 0x0020 )\r
\r
/* Misc. */\r
#define serINVALID_QUEUE ( ( xQueueHandle ) 0 )\r
#define serSOURCE_ERROR ( ( unsigned portCHAR ) 0x06 )\r
#define serSOURCE_RX ( ( unsigned portCHAR ) 0x04 )\r
#define serINTERRUPT_SOURCE_MASK ( ( unsigned portCHAR ) 0x0f )\r
+#define serINTERRUPT_IS_PENDING ( ( unsigned portCHAR ) 0x01 )\r
\r
/*-----------------------------------------------------------*/\r
\r
/*\r
* The asm wrapper for the interrupt service routine.\r
*/\r
-extern void vUART_ISREntry(void);\r
+extern void vUART_ISREntry( void );\r
\r
/* \r
* The C function called from the asm wrapper. \r
ulDivisor = configCPU_CLOCK_HZ / ulWantedClock;\r
\r
/* Set the DLAB bit so we can access the divisor. */\r
- U0LCR |= serDLAB;\r
+ U1LCR |= serDLAB;\r
\r
/* Setup the divisor. */\r
- U0DLL = ( unsigned portCHAR ) ( ulDivisor & ( unsigned portLONG ) 0xff );\r
+ U1DLL = ( unsigned portCHAR ) ( ulDivisor & ( unsigned portLONG ) 0xff );\r
ulDivisor >>= 8;\r
- U0DLM = ( unsigned portCHAR ) ( ulDivisor & ( unsigned portLONG ) 0xff );\r
+ U1DLM = ( unsigned portCHAR ) ( ulDivisor & ( unsigned portLONG ) 0xff );\r
\r
/* Turn on the FIFO's and clear the buffers. */\r
- U0FCR = ( serFIFO_ON | serCLEAR_FIFO );\r
+ U1FCR = ( serFIFO_ON | serCLEAR_FIFO );\r
\r
/* Setup transmission format. */\r
- U0LCR = serNO_PARITY | ser1_STOP_BIT | ser8_BIT_CHARS;\r
+ U1LCR = serNO_PARITY | ser1_STOP_BIT | ser8_BIT_CHARS;\r
\r
/* Setup the VIC for the UART. */\r
- VICIntSelect &= ~( serU0VIC_CHANNEL_BIT );\r
- VICIntEnable |= serU0VIC_CHANNEL_BIT;\r
+ VICIntSelect &= ~( serU1VIC_CHANNEL_BIT );\r
+ VICIntEnable |= serU1VIC_CHANNEL_BIT;\r
VICVectAddr1 = ( unsigned portLONG ) vUART_ISREntry;\r
- VICVectCntl1 = serU0VIC_CHANNEL | serU0VIC_ENABLE;\r
+ VICVectCntl1 = serU1VIC_CHANNEL | serU1VIC_ENABLE;\r
\r
/* Enable UART0 interrupts. */\r
- U0IER |= serENABLE_INTERRUPTS;\r
+ U1IER |= serENABLE_INTERRUPTS;\r
}\r
portEXIT_CRITICAL();\r
}\r
/* We wrote the character directly to the UART, so was \r
successful. */\r
lTHREEmpty = pdFALSE;\r
- U0THR = cOutChar;\r
+ U1THR = cOutChar;\r
xReturn = pdPASS;\r
}\r
else \r
{\r
xQueueReceive( xCharsForTx, &cOutChar, serNO_BLOCK );\r
lTHREEmpty = pdFALSE;\r
- U0THR = cOutChar;\r
+ U1THR = cOutChar;\r
}\r
}\r
}\r
void vUART_ISRHandler( void )\r
{\r
signed portCHAR cChar;\r
-portBASE_TYPE xTaskWokenByRx, xTaskWokenByTx;\r
+portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;\r
+unsigned portCHAR ucInterrupt;\r
\r
- xTaskWokenByTx = pdFALSE;\r
- xTaskWokenByRx = pdFALSE;\r
+ ucInterrupt = U1IIR;\r
\r
- /* What caused the interrupt? */\r
- switch( U0IIR & serINTERRUPT_SOURCE_MASK )\r
+ /* The interrupt pending bit is active low. */\r
+ while( ( ucInterrupt & serINTERRUPT_IS_PENDING ) == 0 )\r
{\r
- case serSOURCE_ERROR : /* Not handling this, but clear the interrupt. */\r
- cChar = U0LSR;\r
- break;\r
-\r
- case serSOURCE_THRE : /* The THRE is empty. If there is another\r
- character in the Tx queue, send it now. */\r
- if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWokenByTx ) == pdTRUE )\r
- {\r
- U0THR = cChar;\r
- }\r
- else\r
- {\r
- /* There are no further characters \r
- queued to send so we can indicate \r
- that the THRE is available. */\r
- lTHREEmpty = pdTRUE;\r
- }\r
- break;\r
-\r
- case serSOURCE_RX_TIMEOUT :\r
- case serSOURCE_RX : /* A character was received. Place it in \r
- the queue of received characters. */\r
- cChar = U0RBR;\r
- if( xQueueSendFromISR( xRxedChars, &cChar, pdFALSE ) )\r
- {\r
- xTaskWokenByRx = pdTRUE;\r
- }\r
- break;\r
-\r
- default : /* There is nothing to do, leave the ISR. */\r
- break;\r
+ /* What caused the interrupt? */\r
+ switch( ucInterrupt & serINTERRUPT_SOURCE_MASK )\r
+ {\r
+ case serSOURCE_ERROR : /* Not handling this, but clear the interrupt. */\r
+ cChar = U1LSR;\r
+ break;\r
+ \r
+ case serSOURCE_THRE : /* The THRE is empty. If there is another\r
+ character in the Tx queue, send it now. */\r
+ if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )\r
+ {\r
+ U1THR = cChar;\r
+ }\r
+ else\r
+ {\r
+ /* There are no further characters \r
+ queued to send so we can indicate \r
+ that the THRE is available. */\r
+ lTHREEmpty = pdTRUE;\r
+ }\r
+ break;\r
+ \r
+ case serSOURCE_RX_TIMEOUT :\r
+ case serSOURCE_RX : /* A character was received. Place it in \r
+ the queue of received characters. */\r
+ cChar = U1RBR;\r
+ xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );\r
+ break;\r
+ \r
+ default : /* There is nothing to do, leave the ISR. */\r
+ break;\r
+ }\r
+\r
+ ucInterrupt = U1IIR;\r
}\r
\r
/* Clear the ISR in the VIC. */\r
\r
/* Exit the ISR. If a task was woken by either a character being received\r
or transmitted then a context switch will occur. */\r
- portEXIT_SWITCHING_ISR( ( xTaskWokenByTx || xTaskWokenByRx ) );\r
+ portEXIT_SWITCHING_ISR( xHigherPriorityTaskWoken );\r
}\r
/*-----------------------------------------------------------*/\r
\r