Update Cortex-A port layers to ensure the ICCRPR and ICCPMR registers are always...

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@2229 1d2547de-c912-0410-9cb9-b8ca96c0e9e2

diff --git a/FreeRTOS/Source/portable/GCC/ARM_CA9/port.c b/FreeRTOS/Source/portable/GCC/ARM_CA9/port.c
index 64e7ac404b4b5a8f4f9ac69039d502f915b9a9e3..9fed5b649c30a47fb6ad8c2c21161ac3871bf8b8 100644 (file)
--- a/FreeRTOS/Source/portable/GCC/ARM_CA9/port.c
+++ b/FreeRTOS/Source/portable/GCC/ARM_CA9/port.c
@@ -120,7 +120,7 @@ this value. */
 \r
 /* In all GICs 255 can be written to the priority mask register to unmask all\r
 (but the lowest) interrupt priority. */\r
-#define portUNMASK_VALUE                               ( 0xFF )\r
+#define portUNMASK_VALUE                               ( 0xFFUL )\r
 \r
 /* Tasks are not created with a floating point context, but can be given a\r
 floating point context after they have been created.  A variable is stored as\r
@@ -407,7 +407,7 @@ void FreeRTOS_Tick_Handler( void )
        necessary to turn off interrupts in the CPU itself while the ICCPMR is being\r
        updated. */\r
        portCPU_IRQ_DISABLE();\r
-       portICCPMR_PRIORITY_MASK_REGISTER = ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT );\r
+       portICCPMR_PRIORITY_MASK_REGISTER = ( uint32_t ) ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT );\r
        __asm(  "dsb            \n"\r
                        "isb            \n" );\r
        portCPU_IRQ_ENABLE();\r
@@ -453,7 +453,7 @@ uint32_t ulReturn;
        /* Interrupt in the CPU must be turned off while the ICCPMR is being\r
        updated. */\r
        portCPU_IRQ_DISABLE();\r
-       if( portICCPMR_PRIORITY_MASK_REGISTER == ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT ) )\r
+       if( portICCPMR_PRIORITY_MASK_REGISTER == ( uint32_t ) ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT ) )\r
        {\r
                /* Interrupts were already masked. */\r
                ulReturn = pdTRUE;\r
@@ -461,7 +461,7 @@ uint32_t ulReturn;
        else\r
        {\r
                ulReturn = pdFALSE;\r
-               portICCPMR_PRIORITY_MASK_REGISTER = ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT );\r
+               portICCPMR_PRIORITY_MASK_REGISTER = ( uint32_t ) ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT );\r
                __asm(  "dsb            \n"\r
                                "isb            \n" );\r
        }\r
@@ -493,7 +493,7 @@ uint32_t ulReturn;
                The following links provide detailed information:\r
                http://www.freertos.org/RTOS-Cortex-M3-M4.html\r
                http://www.freertos.org/FAQHelp.html */\r
-               configASSERT( portICCRPR_RUNNING_PRIORITY_REGISTER >= ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT ) );\r
+               configASSERT( portICCRPR_RUNNING_PRIORITY_REGISTER >= ( uint32_t ) ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT ) );\r
 \r
                /* Priority grouping:  The interrupt controller (GIC) allows the bits\r
                that define each interrupt's priority to be split between bits that\r

diff --git a/FreeRTOS/Source/portable/GCC/ARM_CA9/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM_CA9/portmacro.h
index 3b3556cd03a85300bdd5d413d068c024c28f81ff..23be87c67aafc7e0d31511e86fc8bd6c171db275 100644 (file)
--- a/FreeRTOS/Source/portable/GCC/ARM_CA9/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/ARM_CA9/portmacro.h
@@ -215,12 +215,12 @@ number of bits implemented by the interrupt controller. */
 #define portICCRPR_RUNNING_PRIORITY_OFFSET                                             ( 0x14 )\r
 \r
 #define portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS                 ( configINTERRUPT_CONTROLLER_BASE_ADDRESS + configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET )\r
-#define portICCPMR_PRIORITY_MASK_REGISTER                                      ( *( ( volatile uint8_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET ) ) )\r
+#define portICCPMR_PRIORITY_MASK_REGISTER                                      ( *( ( volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET ) ) )\r
 #define portICCIAR_INTERRUPT_ACKNOWLEDGE_REGISTER_ADDRESS      ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCIAR_INTERRUPT_ACKNOWLEDGE_OFFSET )\r
 #define portICCEOIR_END_OF_INTERRUPT_REGISTER_ADDRESS          ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCEOIR_END_OF_INTERRUPT_OFFSET )\r
 #define portICCPMR_PRIORITY_MASK_REGISTER_ADDRESS                      ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET )\r
 #define portICCBPR_BINARY_POINT_REGISTER                                       ( *( ( const volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCBPR_BINARY_POINT_OFFSET ) ) )\r
-#define portICCRPR_RUNNING_PRIORITY_REGISTER                           ( *( ( const volatile uint8_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCRPR_RUNNING_PRIORITY_OFFSET ) ) )\r
+#define portICCRPR_RUNNING_PRIORITY_REGISTER                           ( *( ( const volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCRPR_RUNNING_PRIORITY_OFFSET ) ) )\r
 \r
 #endif /* PORTMACRO_H */\r
 \r

diff --git a/FreeRTOS/Source/portable/IAR/ARM_CA9/port.c b/FreeRTOS/Source/portable/IAR/ARM_CA9/port.c
index 01be837d6216fc8c04ec21a59d0a9766d3de1053..3124e1719e56d951573f1317490c63e90ff71608 100644 (file)
--- a/FreeRTOS/Source/portable/IAR/ARM_CA9/port.c
+++ b/FreeRTOS/Source/portable/IAR/ARM_CA9/port.c
@@ -123,7 +123,7 @@ this value. */
 \r
 /* In all GICs 255 can be written to the priority mask register to unmask all\r
 (but the lowest) interrupt priority. */\r
-#define portUNMASK_VALUE                               ( 0xFF )\r
+#define portUNMASK_VALUE                               ( 0xFFUL )\r
 \r
 /* Tasks are not created with a floating point context, but can be given a\r
 floating point context after they have been created.  A variable is stored as\r
@@ -344,7 +344,7 @@ void FreeRTOS_Tick_Handler( void )
        handler runs at the lowest priority, so interrupts cannot already be masked,\r
        so there is no need to save and restore the current mask value. */\r
        __disable_irq();\r
-       portICCPMR_PRIORITY_MASK_REGISTER = ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT );\r
+       portICCPMR_PRIORITY_MASK_REGISTER = ( uint32_t ) ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT );\r
        __asm(  "DSB            \n"\r
                        "ISB            \n" );\r
        __enable_irq();\r
@@ -388,7 +388,7 @@ uint32_t ulPortSetInterruptMask( void )
 uint32_t ulReturn;\r
 \r
        __disable_irq();\r
-       if( portICCPMR_PRIORITY_MASK_REGISTER == ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT ) )\r
+       if( portICCPMR_PRIORITY_MASK_REGISTER == ( uint32_t ) ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT ) )\r
        {\r
                /* Interrupts were already masked. */\r
                ulReturn = pdTRUE;\r
@@ -396,7 +396,7 @@ uint32_t ulReturn;
        else\r
        {\r
                ulReturn = pdFALSE;\r
-               portICCPMR_PRIORITY_MASK_REGISTER = ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT );\r
+               portICCPMR_PRIORITY_MASK_REGISTER = ( uint32_t ) ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT );\r
                __asm(  "DSB            \n"\r
                                "ISB            \n" );\r
        }\r
@@ -428,7 +428,7 @@ uint32_t ulReturn;
                The following links provide detailed information:\r
                http://www.freertos.org/RTOS-Cortex-M3-M4.html\r
                http://www.freertos.org/FAQHelp.html */\r
-               configASSERT( portICCRPR_RUNNING_PRIORITY_REGISTER >= ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT ) );\r
+               configASSERT( portICCRPR_RUNNING_PRIORITY_REGISTER >= ( uint32_t ) ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT ) );\r
 \r
                /* Priority grouping:  The interrupt controller (GIC) allows the bits\r
                that define each interrupt's priority to be split between bits that\r

diff --git a/FreeRTOS/Source/portable/IAR/ARM_CA9/portmacro.h b/FreeRTOS/Source/portable/IAR/ARM_CA9/portmacro.h
index 8fccbf1b081932e2f551abbb0e97d733bc0e529f..b0eb90f0111b0cd48dd1290a00182d7630f0d724 100644 (file)
--- a/FreeRTOS/Source/portable/IAR/ARM_CA9/portmacro.h
+++ b/FreeRTOS/Source/portable/IAR/ARM_CA9/portmacro.h
@@ -228,12 +228,12 @@ number of bits implemented by the interrupt controller. */
 #define portICCRPR_RUNNING_PRIORITY_OFFSET                                             ( 0x14 )\r
 \r
 #define portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS                 ( configINTERRUPT_CONTROLLER_BASE_ADDRESS + configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET )\r
-#define portICCPMR_PRIORITY_MASK_REGISTER                                      ( *( ( volatile uint8_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET ) ) )\r
+#define portICCPMR_PRIORITY_MASK_REGISTER                                      ( *( ( volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET ) ) )\r
 #define portICCIAR_INTERRUPT_ACKNOWLEDGE_REGISTER_ADDRESS      ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCIAR_INTERRUPT_ACKNOWLEDGE_OFFSET )\r
 #define portICCEOIR_END_OF_INTERRUPT_REGISTER_ADDRESS          ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCEOIR_END_OF_INTERRUPT_OFFSET )\r
 #define portICCPMR_PRIORITY_MASK_REGISTER_ADDRESS                      ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET )\r
 #define portICCBPR_BINARY_POINT_REGISTER                                       ( *( ( const volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCBPR_BINARY_POINT_OFFSET ) ) )\r
-#define portICCRPR_RUNNING_PRIORITY_REGISTER                           ( *( ( const volatile uint8_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCRPR_RUNNING_PRIORITY_OFFSET ) ) )\r
+#define portICCRPR_RUNNING_PRIORITY_REGISTER                           ( *( ( const volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCRPR_RUNNING_PRIORITY_OFFSET ) ) )\r
 \r
 #endif /* PORTMACRO_H */\r
 \r

diff --git a/FreeRTOS/Source/portable/RVDS/ARM_CA9/port.c b/FreeRTOS/Source/portable/RVDS/ARM_CA9/port.c
index b75349878be69314ead172e13748ce9f3db4d958..456b585c60c6c36e9a2783f3103374841634ac58 100644 (file)
--- a/FreeRTOS/Source/portable/RVDS/ARM_CA9/port.c
+++ b/FreeRTOS/Source/portable/RVDS/ARM_CA9/port.c
@@ -141,7 +141,7 @@ this value. */
 \r
 /* In all GICs 255 can be written to the priority mask register to unmask all\r
 (but the lowest) interrupt priority. */\r
-#define portUNMASK_VALUE                               ( 0xFF )\r
+#define portUNMASK_VALUE                               ( 0xFFUL )\r
 \r
 /* Tasks are not created with a floating point context, but can be given a\r
 floating point context after they have been created.  A variable is stored as\r
@@ -162,7 +162,7 @@ context. */
 #define portICCEOIR_END_OF_INTERRUPT_REGISTER_ADDRESS          ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCEOIR_END_OF_INTERRUPT_OFFSET )\r
 #define portICCPMR_PRIORITY_MASK_REGISTER_ADDRESS                      ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET )\r
 #define portICCBPR_BINARY_POINT_REGISTER                                       ( *( ( const volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCBPR_BINARY_POINT_OFFSET ) ) )\r
-#define portICCRPR_RUNNING_PRIORITY_REGISTER                           ( *( ( const volatile uint8_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCRPR_RUNNING_PRIORITY_OFFSET ) ) )\r
+#define portICCRPR_RUNNING_PRIORITY_REGISTER                           ( *( ( const volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCRPR_RUNNING_PRIORITY_OFFSET ) ) )\r
 \r
 /* Used by portASSERT_IF_INTERRUPT_PRIORITY_INVALID() when ensuring the binary\r
 point is zero. */\r
@@ -383,7 +383,7 @@ void FreeRTOS_Tick_Handler( void )
        handler runs at the lowest priority, so interrupts cannot already be masked,\r
        so there is no need to save and restore the current mask value. */\r
        __disable_irq();\r
-       portICCPMR_PRIORITY_MASK_REGISTER = ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT );\r
+       portICCPMR_PRIORITY_MASK_REGISTER = ( uint32_t ) ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT );\r
        __asm(  "DSB            \n"\r
                        "ISB            \n" );\r
        __enable_irq();\r
@@ -427,7 +427,7 @@ uint32_t ulPortSetInterruptMask( void )
 uint32_t ulReturn;\r
 \r
        __disable_irq();\r
-       if( portICCPMR_PRIORITY_MASK_REGISTER == ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT ) )\r
+       if( portICCPMR_PRIORITY_MASK_REGISTER == ( uint32_t ) ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT ) )\r
        {\r
                /* Interrupts were already masked. */\r
                ulReturn = pdTRUE;\r
@@ -435,7 +435,7 @@ uint32_t ulReturn;
        else\r
        {\r
                ulReturn = pdFALSE;\r
-               portICCPMR_PRIORITY_MASK_REGISTER = ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT );\r
+               portICCPMR_PRIORITY_MASK_REGISTER = ( uint32_t ) ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT );\r
                __asm(  "DSB            \n"\r
                                "ISB            \n" );\r
        }\r

diff --git a/FreeRTOS/Source/timers.c b/FreeRTOS/Source/timers.c
index a7625887480d618793628a5848f5e9bf9ce6b0f0..4ec998ff9cabe4fff32b03131607c59fa51d46b1 100644 (file)
--- a/FreeRTOS/Source/timers.c
+++ b/FreeRTOS/Source/timers.c
@@ -804,7 +804,7 @@ Timer_t *pxTimer = ( Timer_t * ) xTimer;
                /* Checking to see if it is in the NULL list in effect checks to see if\r
                it is referenced from either the current or the overflow timer lists in\r
                one go, but the logic has to be reversed, hence the '!'. */\r
-               xTimerIsInActiveList = !( listIS_CONTAINED_WITHIN( NULL, &( pxTimer->xTimerListItem ) ) );\r
+               xTimerIsInActiveList = ( BaseType_t ) !( listIS_CONTAINED_WITHIN( NULL, &( pxTimer->xTimerListItem ) ) );\r
        }\r
        taskEXIT_CRITICAL();\r
 \r