Those commands presume support for the "classic" set of CPU
modes (FIQ, supervisor, IRQ, etc) ... which aren't supported
by the ARMv7-M or ARMv6-M architectures. They also presume
a "struct arm" base type, which this code doesn't use.
We haven't cleaned up the register handling enough to be able
to share any of those "base" methods.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
COMMAND_REGISTRATION_DONE
};
static const struct command_registration cortex_m3_command_handlers[] = {
- {
- .chain = arm_command_handlers,
- },
{
.chain = armv7m_command_handlers,
},