--- /dev/null
+/*\r
+ * FreeRTOS Kernel V10.2.0\r
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.\r
+ *\r
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of\r
+ * this software and associated documentation files (the "Software"), to deal in\r
+ * the Software without restriction, including without limitation the rights to\r
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\r
+ * the Software, and to permit persons to whom the Software is furnished to do so,\r
+ * subject to the following conditions:\r
+ *\r
+ * The above copyright notice and this permission notice shall be included in all\r
+ * copies or substantial portions of the Software.\r
+ *\r
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\r
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\r
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\r
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\r
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\r
+ *\r
+ * http://www.FreeRTOS.org\r
+ * http://aws.amazon.com/freertos\r
+ *\r
+ * 1 tab == 4 spaces!\r
+ */\r
+\r
+/* Standard includes. */\r
+#include <stdlib.h>\r
+\r
+/* Scheduler includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+\r
+#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1\r
+ /* Check the configuration. */\r
+ #if( configMAX_PRIORITIES > 32 )\r
+ #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.\r
+ #endif\r
+#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */\r
+\r
+#ifndef configSETUP_TICK_INTERRUPT\r
+ #error configSETUP_TICK_INTERRUPT() must be defined in FreeRTOSConfig.h to call the function that sets up the tick interrupt.\r
+#endif\r
+\r
+#ifndef configCLEAR_TICK_INTERRUPT\r
+ #error configCLEAR_TICK_INTERRUPT must be defined in FreeRTOSConfig.h to clear which ever interrupt was used to generate the tick interrupt.\r
+#endif\r
+\r
+/* A critical section is exited when the critical section nesting count reaches\r
+this value. */\r
+#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )\r
+\r
+/* Tasks are not created with a floating point context, but can be given a\r
+floating point context after they have been created. A variable is stored as\r
+part of the tasks context that holds portNO_FLOATING_POINT_CONTEXT if the task\r
+does not have an FPU context, or any other value if the task does have an FPU\r
+context. */\r
+#define portNO_FLOATING_POINT_CONTEXT ( ( StackType_t ) 0 )\r
+\r
+/* Constants required to setup the initial task context. */\r
+#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, IRQ enabled FIQ enabled. */\r
+#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )\r
+#define portTHUMB_MODE_ADDRESS ( 0x01UL )\r
+\r
+/* Masks all bits in the APSR other than the mode bits. */\r
+#define portAPSR_MODE_BITS_MASK ( 0x1F )\r
+\r
+/* The value of the mode bits in the APSR when the CPU is executing in user\r
+mode. */\r
+#define portAPSR_USER_MODE ( 0x10 )\r
+\r
+/* Let the user override the pre-loading of the initial LR with the address of\r
+prvTaskExitError() in case it messes up unwinding of the stack in the\r
+debugger. */\r
+#ifdef configTASK_RETURN_ADDRESS\r
+ #define portTASK_RETURN_ADDRESS configTASK_RETURN_ADDRESS\r
+#else\r
+ #define portTASK_RETURN_ADDRESS prvTaskExitError\r
+#endif\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * Starts the first task executing. This function is necessarily written in\r
+ * assembly code so is implemented in portASM.s.\r
+ */\r
+extern void vPortRestoreTaskContext( void );\r
+\r
+/*\r
+ * Used to catch tasks that attempt to return from their implementing function.\r
+ */\r
+static void prvTaskExitError( void );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* A variable is used to keep track of the critical section nesting. This\r
+variable has to be stored as part of the task context and must be initialised to\r
+a non zero value to ensure interrupts don't inadvertently become unmasked before\r
+the scheduler starts. As it is stored as part of the task context it will\r
+automatically be set to 0 when the first task is started. */\r
+volatile uint32_t ulCriticalNesting = 9999UL;\r
+\r
+/* Saved as part of the task context. If ulPortTaskHasFPUContext is non-zero then\r
+a floating point context must be saved and restored for the task. */\r
+volatile uint32_t ulPortTaskHasFPUContext = pdFALSE;\r
+\r
+/* Set to 1 to pend a context switch from an ISR. */\r
+volatile uint32_t ulPortYieldRequired = pdFALSE;\r
+\r
+/* Counts the interrupt nesting depth. A context switch is only performed if\r
+if the nesting depth is 0. */\r
+volatile uint32_t ulPortInterruptNesting = 0UL;\r
+\r
+/* Used in the asm file to clear an interrupt. */\r
+__attribute__(( used )) const uint32_t ulICCEOIR = configEOI_ADDRESS;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * See header file for description.\r
+ */\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )\r
+{\r
+ /* Setup the initial stack of the task. The stack is set exactly as\r
+ expected by the portRESTORE_CONTEXT() macro.\r
+\r
+ The fist real value on the stack is the status register, which is set for\r
+ system mode, with interrupts enabled. A few NULLs are added first to ensure\r
+ GDB does not try decoding a non-existent return address. */\r
+ *pxTopOfStack = ( StackType_t ) NULL;\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( StackType_t ) NULL;\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( StackType_t ) NULL;\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;\r
+\r
+ if( ( ( uint32_t ) pxCode & portTHUMB_MODE_ADDRESS ) != 0x00UL )\r
+ {\r
+ /* The task will start in THUMB mode. */\r
+ *pxTopOfStack |= portTHUMB_MODE_BIT;\r
+ }\r
+\r
+ pxTopOfStack--;\r
+\r
+ /* Next the return address, which in this case is the start of the task. */\r
+ *pxTopOfStack = ( StackType_t ) pxCode;\r
+ pxTopOfStack--;\r
+\r
+ /* Next all the registers other than the stack pointer. */\r
+ *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* R14 */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */\r
+ pxTopOfStack--;\r
+\r
+ /* The task will start with a critical nesting count of 0 as interrupts are\r
+ enabled. */\r
+ *pxTopOfStack = portNO_CRITICAL_NESTING;\r
+ pxTopOfStack--;\r
+\r
+ /* The task will start without a floating point context. A task that uses\r
+ the floating point hardware must call vPortTaskUsesFPU() before executing\r
+ any floating point instructions. */\r
+ *pxTopOfStack = portNO_FLOATING_POINT_CONTEXT;\r
+\r
+ return pxTopOfStack;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvTaskExitError( void )\r
+{\r
+ /* A function that implements a task must not exit or attempt to return to\r
+ its caller as there is nothing to return to. If a task wants to exit it\r
+ should instead call vTaskDelete( NULL ).\r
+\r
+ Artificially force an assert() to be triggered if configASSERT() is\r
+ defined, then stop here so application writers can catch the error. */\r
+ configASSERT( ulPortInterruptNesting == ~0UL );\r
+ portDISABLE_INTERRUPTS();\r
+ for( ;; );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+BaseType_t xPortStartScheduler( void )\r
+{\r
+uint32_t ulAPSR;\r
+\r
+ /* Only continue if the CPU is not in User mode. The CPU must be in a\r
+ Privileged mode for the scheduler to start. */\r
+ __asm volatile ( "MRS %0, APSR" : "=r" ( ulAPSR ) );\r
+ ulAPSR &= portAPSR_MODE_BITS_MASK;\r
+ configASSERT( ulAPSR != portAPSR_USER_MODE );\r
+\r
+ if( ulAPSR != portAPSR_USER_MODE )\r
+ {\r
+ /* Start the timer that generates the tick ISR. */\r
+ portDISABLE_INTERRUPTS();\r
+ configSETUP_TICK_INTERRUPT();\r
+\r
+ /* Start the first task executing. */\r
+ vPortRestoreTaskContext();\r
+ }\r
+\r
+ /* Will only get here if vTaskStartScheduler() was called with the CPU in\r
+ a non-privileged mode or the binary point register was not set to its lowest\r
+ possible value. prvTaskExitError() is referenced to prevent a compiler\r
+ warning about it being defined but not referenced in the case that the user\r
+ defines their own exit address. */\r
+ ( void ) prvTaskExitError;\r
+ return 0;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vPortEndScheduler( void )\r
+{\r
+ /* Not implemented in ports where there is nothing to return to.\r
+ Artificially force an assert. */\r
+ configASSERT( ulCriticalNesting == 1000UL );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vPortEnterCritical( void )\r
+{\r
+ portDISABLE_INTERRUPTS();\r
+\r
+ /* Now interrupts are disabled ulCriticalNesting can be accessed\r
+ directly. Increment ulCriticalNesting to keep a count of how many times\r
+ portENTER_CRITICAL() has been called. */\r
+ ulCriticalNesting++;\r
+\r
+ /* This is not the interrupt safe version of the enter critical function so\r
+ assert() if it is being called from an interrupt context. Only API\r
+ functions that end in "FromISR" can be used in an interrupt. Only assert if\r
+ the critical nesting count is 1 to protect against recursive calls if the\r
+ assert function also uses a critical section. */\r
+ if( ulCriticalNesting == 1 )\r
+ {\r
+ configASSERT( ulPortInterruptNesting == 0 );\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vPortExitCritical( void )\r
+{\r
+ if( ulCriticalNesting > portNO_CRITICAL_NESTING )\r
+ {\r
+ /* Decrement the nesting count as the critical section is being\r
+ exited. */\r
+ ulCriticalNesting--;\r
+\r
+ /* If the nesting level has reached zero then all interrupt\r
+ priorities must be re-enabled. */\r
+ if( ulCriticalNesting == portNO_CRITICAL_NESTING )\r
+ {\r
+ /* Critical nesting has reached zero so all interrupt priorities\r
+ should be unmasked. */\r
+ portENABLE_INTERRUPTS();\r
+ }\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void FreeRTOS_Tick_Handler( void )\r
+{\r
+uint32_t ulInterruptStatus;\r
+\r
+ ulInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();\r
+\r
+ /* Increment the RTOS tick. */\r
+ if( xTaskIncrementTick() != pdFALSE )\r
+ {\r
+ ulPortYieldRequired = pdTRUE;\r
+ }\r
+\r
+ portCLEAR_INTERRUPT_MASK_FROM_ISR( ulInterruptStatus );\r
+\r
+ configCLEAR_TICK_INTERRUPT();\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vPortTaskUsesFPU( void )\r
+{\r
+#if configFPU == 1\r
+uint32_t ulInitialFPSCR = 0;\r
+\r
+ /* A task is registering the fact that it needs an FPU context. Set the\r
+ FPU flag (which is saved as part of the task context). */\r
+ ulPortTaskHasFPUContext = pdTRUE;\r
+\r
+ /* Initialise the floating point status register. */\r
+ __asm volatile ( "FMXR FPSCR, %0" :: "r" (ulInitialFPSCR) );\r
+#else\r
+ /* If FreeRTOS was built without FPU support but a task is using the FPU, we have a problem */\r
+ configASSERT( 0 );\r
+#endif\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+\r
--- /dev/null
+/*\r
+ * FreeRTOS Kernel V10.2.0\r
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.\r
+ *\r
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of\r
+ * this software and associated documentation files (the "Software"), to deal in\r
+ * the Software without restriction, including without limitation the rights to\r
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\r
+ * the Software, and to permit persons to whom the Software is furnished to do so,\r
+ * subject to the following conditions:\r
+ *\r
+ * The above copyright notice and this permission notice shall be included in all\r
+ * copies or substantial portions of the Software.\r
+ *\r
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\r
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\r
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\r
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\r
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\r
+ *\r
+ * http://www.FreeRTOS.org\r
+ * http://aws.amazon.com/freertos\r
+ *\r
+ * 1 tab == 4 spaces!\r
+ */\r
+\r
+ .text\r
+ .arm\r
+\r
+ .set SYS_MODE, 0x1f\r
+ .set SVC_MODE, 0x13\r
+ .set IRQ_MODE, 0x12\r
+\r
+ /* Variables and functions. */\r
+ .extern ulMaxAPIPriorityMask\r
+ .extern _freertos_vector_table\r
+ .extern pxCurrentTCB\r
+ .extern vTaskSwitchContext\r
+ .extern vApplicationIRQHandler\r
+ .extern ulPortInterruptNesting\r
+ .extern ulPortTaskHasFPUContext\r
+ .extern ulICCEOIR\r
+ .extern ulPortYieldRequired\r
+\r
+ .global FreeRTOS_IRQ_Handler\r
+ .global FreeRTOS_SVC_Handler\r
+ .global vPortRestoreTaskContext\r
+\r
+\r
+.macro portSAVE_CONTEXT\r
+\r
+ /* Save the LR and SPSR onto the system mode stack before switching to\r
+ system mode to save the remaining system mode registers. */\r
+ SRSDB sp!, #SYS_MODE\r
+ CPS #SYS_MODE\r
+ PUSH {R0-R12, R14}\r
+\r
+ /* Push the critical nesting count. */\r
+ LDR R2, ulCriticalNestingConst\r
+ LDR R1, [R2]\r
+ PUSH {R1}\r
+\r
+ /* Does the task have a floating point context that needs saving? If\r
+ ulPortTaskHasFPUContext is 0 then no. */\r
+ LDR R2, ulPortTaskHasFPUContextConst\r
+ LDR R3, [R2]\r
+ CMP R3, #0\r
+\r
+#if configFPU == 1\r
+ /* Save the floating point context, if any. */\r
+ FMRXNE R1, FPSCR\r
+ VPUSHNE {D0-D15}\r
+#if configFPU_D32 == 1\r
+ VPUSHNE {D16-D31}\r
+#endif /* configFPU_D32 */\r
+ PUSHNE {R1}\r
+#endif\r
+\r
+ /* Save ulPortTaskHasFPUContext itself. */\r
+ PUSH {R3}\r
+\r
+ /* Save the stack pointer in the TCB. */\r
+ LDR R0, pxCurrentTCBConst\r
+ LDR R1, [R0]\r
+ STR SP, [R1]\r
+\r
+ .endm\r
+\r
+; /**********************************************************************/\r
+\r
+.macro portRESTORE_CONTEXT\r
+\r
+ /* Set the SP to point to the stack of the task being restored. */\r
+ LDR R0, pxCurrentTCBConst\r
+ LDR R1, [R0]\r
+ LDR SP, [R1]\r
+\r
+ /* Is there a floating point context to restore? If the restored\r
+ ulPortTaskHasFPUContext is zero then no. */\r
+ LDR R0, ulPortTaskHasFPUContextConst\r
+ POP {R1}\r
+ STR R1, [R0]\r
+ CMP R1, #0\r
+\r
+#if configFPU == 1\r
+ /* Restore the floating point context, if any. */\r
+ POPNE {R0}\r
+#if configFPU_D32 == 1\r
+ VPOPNE {D16-D31}\r
+#endif /* configFPU_D32 */\r
+ VPOPNE {D0-D15}\r
+ VMSRNE FPSCR, R0\r
+#endif\r
+\r
+ /* Restore the critical section nesting depth. */\r
+ LDR R0, ulCriticalNestingConst\r
+ POP {R1}\r
+ STR R1, [R0]\r
+\r
+ /* Restore all system mode registers other than the SP (which is already\r
+ being used). */\r
+ POP {R0-R12, R14}\r
+\r
+ /* Return to the task code, loading CPSR on the way. */\r
+ RFEIA sp!\r
+\r
+ .endm\r
+\r
+\r
+\r
+\r
+/******************************************************************************\r
+ * SVC handler is used to yield.\r
+ *****************************************************************************/\r
+.align 4\r
+.type FreeRTOS_SVC_Handler, %function\r
+FreeRTOS_SVC_Handler:\r
+ /* Save the context of the current task and select a new task to run. */\r
+ portSAVE_CONTEXT\r
+ LDR R0, vTaskSwitchContextConst\r
+ BLX R0\r
+ portRESTORE_CONTEXT\r
+\r
+\r
+/******************************************************************************\r
+ * vPortRestoreTaskContext is used to start the scheduler.\r
+ *****************************************************************************/\r
+.align 4\r
+.type vPortRestoreTaskContext, %function\r
+vPortRestoreTaskContext:\r
+ /* Switch to system mode. */\r
+ CPS #SYS_MODE\r
+ portRESTORE_CONTEXT\r
+\r
+.align 4\r
+.type FreeRTOS_IRQ_Handler, %function\r
+FreeRTOS_IRQ_Handler:\r
+ /* Return to the interrupted instruction. */\r
+ SUB lr, lr, #4\r
+\r
+ /* Push the return address and SPSR. */\r
+ PUSH {lr}\r
+ MRS lr, SPSR\r
+ PUSH {lr}\r
+\r
+ /* Change to supervisor mode to allow reentry. */\r
+ CPS #0x13\r
+\r
+ /* Push used registers. */\r
+ PUSH {r0-r3, r12}\r
+\r
+ /* Increment nesting count. r3 holds the address of ulPortInterruptNesting\r
+ for future use. r1 holds the original ulPortInterruptNesting value for\r
+ future use. */\r
+ LDR r3, ulPortInterruptNestingConst\r
+ LDR r1, [r3]\r
+ ADD r0, r1, #1\r
+ STR r0, [r3]\r
+\r
+ /* Ensure bit 2 of the stack pointer is clear. r2 holds the bit 2 value for\r
+ future use. */\r
+ MOV r0, sp\r
+ AND r2, r0, #4\r
+ SUB sp, sp, r2\r
+\r
+ /* Call the interrupt handler. */\r
+ PUSH {r0-r3, lr}\r
+ LDR r1, vApplicationIRQHandlerConst\r
+ BLX r1\r
+ POP {r0-r3, lr}\r
+ ADD sp, sp, r2\r
+\r
+ CPSID i\r
+ DSB\r
+ ISB\r
+\r
+ /* Write to the EOI register. */\r
+ LDR r0, ulICCEOIRConst\r
+ LDR r2, [r0]\r
+ STR r0, [r2]\r
+\r
+ /* Restore the old nesting count. */\r
+ STR r1, [r3]\r
+\r
+ /* A context switch is never performed if the nesting count is not 0. */\r
+ CMP r1, #0\r
+ BNE exit_without_switch\r
+\r
+ /* Did the interrupt request a context switch? r1 holds the address of\r
+ ulPortYieldRequired and r0 the value of ulPortYieldRequired for future\r
+ use. */\r
+ LDR r1, ulPortYieldRequiredConst\r
+ LDR r0, [r1]\r
+ CMP r0, #0\r
+ BNE switch_before_exit\r
+\r
+exit_without_switch:\r
+ /* No context switch. Restore used registers, LR_irq and SPSR before\r
+ returning. */\r
+ POP {r0-r3, r12}\r
+ CPS #IRQ_MODE\r
+ POP {LR}\r
+ MSR SPSR_cxsf, LR\r
+ POP {LR}\r
+ MOVS PC, LR\r
+\r
+switch_before_exit:\r
+ /* A context swtich is to be performed. Clear the context switch pending\r
+ flag. */\r
+ MOV r0, #0\r
+ STR r0, [r1]\r
+\r
+ /* Restore used registers, LR-irq and SPSR before saving the context\r
+ to the task stack. */\r
+ POP {r0-r3, r12}\r
+ CPS #IRQ_MODE\r
+ POP {LR}\r
+ MSR SPSR_cxsf, LR\r
+ POP {LR}\r
+ portSAVE_CONTEXT\r
+\r
+ /* Call the function that selects the new task to execute.\r
+ vTaskSwitchContext() if vTaskSwitchContext() uses LDRD or STRD\r
+ instructions, or 8 byte aligned stack allocated data. LR does not need\r
+ saving as a new LR will be loaded by portRESTORE_CONTEXT anyway. */\r
+ LDR R0, vTaskSwitchContextConst\r
+ BLX R0\r
+\r
+ /* Restore the context of, and branch to, the task selected to execute\r
+ next. */\r
+ portRESTORE_CONTEXT\r
+\r
+ulICCEOIRConst: .word ulICCEOIR\r
+pxCurrentTCBConst: .word pxCurrentTCB\r
+ulCriticalNestingConst: .word ulCriticalNesting\r
+ulPortTaskHasFPUContextConst: .word ulPortTaskHasFPUContext\r
+vTaskSwitchContextConst: .word vTaskSwitchContext\r
+vApplicationIRQHandlerConst: .word vApplicationIRQHandler\r
+ulPortInterruptNestingConst: .word ulPortInterruptNesting\r
+ulPortYieldRequiredConst: .word ulPortYieldRequired\r
+\r
+.end\r
+\r
+\r
+\r
+\r
+\r
--- /dev/null
+/*\r
+ * FreeRTOS Kernel V10.2.0\r
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.\r
+ *\r
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of\r
+ * this software and associated documentation files (the "Software"), to deal in\r
+ * the Software without restriction, including without limitation the rights to\r
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\r
+ * the Software, and to permit persons to whom the Software is furnished to do so,\r
+ * subject to the following conditions:\r
+ *\r
+ * The above copyright notice and this permission notice shall be included in all\r
+ * copies or substantial portions of the Software.\r
+ *\r
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\r
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\r
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\r
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\r
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\r
+ *\r
+ * http://www.FreeRTOS.org\r
+ * http://aws.amazon.com/freertos\r
+ *\r
+ * 1 tab == 4 spaces!\r
+ */\r
+\r
+#ifndef PORTMACRO_H\r
+#define PORTMACRO_H\r
+\r
+#ifdef __cplusplus\r
+ extern "C" {\r
+#endif\r
+\r
+/*-----------------------------------------------------------\r
+ * Port specific definitions.\r
+ *\r
+ * The settings in this file configure FreeRTOS correctly for the given hardware\r
+ * and compiler.\r
+ *\r
+ * These settings should not be altered.\r
+ *-----------------------------------------------------------\r
+ */\r
+\r
+/* Type definitions. */\r
+#define portCHAR char\r
+#define portFLOAT float\r
+#define portDOUBLE double\r
+#define portLONG long\r
+#define portSHORT short\r
+#define portSTACK_TYPE uint32_t\r
+#define portBASE_TYPE long\r
+\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
+typedef uint32_t TickType_t;\r
+#define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
+\r
+/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do\r
+not need to be guarded with a critical section. */\r
+#define portTICK_TYPE_IS_ATOMIC 1\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Hardware specifics. */\r
+#define portSTACK_GROWTH ( -1 )\r
+#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
+#define portBYTE_ALIGNMENT 8\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Task utilities. */\r
+\r
+/* Called at the end of an ISR that can cause a context switch. */\r
+#define portEND_SWITCHING_ISR( xSwitchRequired )\\r
+{ \\r
+extern volatile uint32_t ulPortYieldRequired; \\r
+ \\r
+ if( xSwitchRequired != pdFALSE ) \\r
+ { \\r
+ ulPortYieldRequired = pdTRUE; \\r
+ } \\r
+}\r
+\r
+#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )\r
+#define portYIELD() __asm volatile ( "SWI 0 \n" \\r
+ "ISB " );\r
+\r
+\r
+/*-----------------------------------------------------------\r
+ * Critical section control\r
+ *----------------------------------------------------------*/\r
+\r
+extern void vPortEnterCritical( void );\r
+extern void vPortExitCritical( void );\r
+extern uint32_t ulPortSetInterruptMask( void );\r
+extern void vPortClearInterruptMask( uint32_t ulNewMaskValue );\r
+extern void vPortInstallFreeRTOSVectorTable( void );\r
+\r
+/* The I bit within the CPSR. */\r
+#define portINTERRUPT_ENABLE_BIT ( 1 << 7 )\r
+\r
+/* In the absence of a priority mask register, these functions and macros\r
+globally enable and disable interrupts. */\r
+#define portENTER_CRITICAL() vPortEnterCritical();\r
+#define portEXIT_CRITICAL() vPortExitCritical();\r
+#define portENABLE_INTERRUPTS() __asm volatile ( "CPSIE i \n" );\r
+#define portDISABLE_INTERRUPTS() __asm volatile ( "CPSID i \n" \\r
+ "DSB \n" \\r
+ "ISB " );\r
+\r
+__attribute__( ( always_inline ) ) static __inline uint32_t portINLINE_SET_INTERRUPT_MASK_FROM_ISR( void )\r
+{\r
+volatile uint32_t ulCPSR;\r
+\r
+ __asm volatile ( "MRS %0, CPSR" : "=r" (ulCPSR) );\r
+ ulCPSR &= portINTERRUPT_ENABLE_BIT;\r
+ portDISABLE_INTERRUPTS();\r
+ return ulCPSR;\r
+}\r
+\r
+#define portSET_INTERRUPT_MASK_FROM_ISR() portINLINE_SET_INTERRUPT_MASK_FROM_ISR()\r
+#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) if( x == 0 ) portENABLE_INTERRUPTS()\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Task function macros as described on the FreeRTOS.org WEB site. These are\r
+not required for this port but included in case common demo code that uses these\r
+macros is used. */\r
+#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
+#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
+\r
+/* Tickless idle/low power functionality. */\r
+#ifndef portSUPPRESS_TICKS_AND_SLEEP\r
+ extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );\r
+ #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )\r
+#endif\r
+\r
+/* Prototype of the FreeRTOS tick handler. This must be installed as the\r
+handler for whichever peripheral is used to generate the RTOS tick. */\r
+void FreeRTOS_Tick_Handler( void );\r
+\r
+/* Any task that uses the floating point unit MUST call vPortTaskUsesFPU()\r
+before any floating point instructions are executed. */\r
+void vPortTaskUsesFPU( void );\r
+#define portTASK_USES_FLOATING_POINT() vPortTaskUsesFPU()\r
+\r
+#define portLOWEST_INTERRUPT_PRIORITY ( ( ( uint32_t ) configUNIQUE_INTERRUPT_PRIORITIES ) - 1UL )\r
+#define portLOWEST_USABLE_INTERRUPT_PRIORITY ( portLOWEST_INTERRUPT_PRIORITY - 1UL )\r
+\r
+/* Architecture specific optimisations. */\r
+#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION\r
+ #define configUSE_PORT_OPTIMISED_TASK_SELECTION 1\r
+#endif\r
+\r
+#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1\r
+\r
+ /* Store/clear the ready priorities in a bit map. */\r
+ #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )\r
+ #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )\r
+\r
+ /*-----------------------------------------------------------*/\r
+\r
+ #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) __builtin_clz( uxReadyPriorities ) )\r
+\r
+#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */\r
+\r
+#define portNOP() __asm volatile( "NOP" )\r
+#define portINLINE __inline\r
+\r
+#ifdef __cplusplus\r
+ } /* extern C */\r
+#endif\r
+\r
+\r
+#endif /* PORTMACRO_H */\r
+\r
projects / freertos / commitdiff