{
FNC_INFO;
int retval;
-
- struct arm11_common * arm11 = target->arch_info;
-
+ struct arm11_common *arm11 = target_to_arm11(target);
uint32_t dscr;
CHECK_RETVAL(arm11_read_DSCR(arm11, &dscr));
/* architecture specific status reply */
static int arm11_arch_state(struct target *target)
{
- struct arm11_common * arm11 = target->arch_info;
+ struct arm11_common *arm11 = target_to_arm11(target);
LOG_USER("target halted due to %s\ncpsr: 0x%8.8" PRIx32 " pc: 0x%8.8" PRIx32 "",
Jim_Nvp_value2name_simple(nvp_target_debug_reason, target->debug_reason)->name,
static int arm11_halt(struct target *target)
{
FNC_INFO;
-
- struct arm11_common * arm11 = target->arch_info;
+ struct arm11_common *arm11 = target_to_arm11(target);
LOG_DEBUG("target->state: %s",
target_state_name(target));
// LOG_DEBUG("current %d address %08x handle_breakpoints %d debug_execution %d",
// current, address, handle_breakpoints, debug_execution);
- struct arm11_common * arm11 = target->arch_info;
+ struct arm11_common *arm11 = target_to_arm11(target);
LOG_DEBUG("target->state: %s",
target_state_name(target));
return ERROR_TARGET_NOT_HALTED;
}
- struct arm11_common * arm11 = target->arch_info;
+ struct arm11_common *arm11 = target_to_arm11(target);
if (!current)
R(PC) = address;
{
FNC_INFO;
int retval;
+ struct arm11_common *arm11 = target_to_arm11(target);
- struct arm11_common * arm11 = target->arch_info;
retval = arm11_check_init(arm11, NULL);
if (retval != ERROR_OK)
return retval;
struct reg **reg_list[], int *reg_list_size)
{
FNC_INFO;
-
- struct arm11_common * arm11 = target->arch_info;
+ struct arm11_common *arm11 = target_to_arm11(target);
*reg_list_size = ARM11_GDB_REGISTER_COUNT;
*reg_list = malloc(sizeof(struct reg*) * ARM11_GDB_REGISTER_COUNT);
LOG_DEBUG("ADDR %08" PRIx32 " SIZE %08" PRIx32 " COUNT %08" PRIx32 "", address, size, count);
- struct arm11_common * arm11 = target->arch_info;
+ struct arm11_common *arm11 = target_to_arm11(target);
retval = arm11_run_instr_data_prepare(arm11);
if (retval != ERROR_OK)
LOG_DEBUG("ADDR %08" PRIx32 " SIZE %08" PRIx32 " COUNT %08" PRIx32 "", address, size, count);
- struct arm11_common * arm11 = target->arch_info;
+ struct arm11_common *arm11 = target_to_arm11(target);
retval = arm11_run_instr_data_prepare(arm11);
if (retval != ERROR_OK)
struct breakpoint *breakpoint)
{
FNC_INFO;
-
- struct arm11_common * arm11 = target->arch_info;
+ struct arm11_common *arm11 = target_to_arm11(target);
#if 0
if (breakpoint->type == BKPT_SOFT)
struct breakpoint *breakpoint)
{
FNC_INFO;
-
- struct arm11_common * arm11 = target->arch_info;
+ struct arm11_common *arm11 = target_to_arm11(target);
arm11->free_brps++;
uint32_t entry_point, uint32_t exit_point,
int timeout_ms, void *arch_info)
{
- struct arm11_common *arm11 = target->arch_info;
+ struct arm11_common *arm11 = target_to_arm11(target);
// enum armv4_5_state core_state = arm11->core_state;
// enum armv4_5_mode core_mode = arm11->core_mode;
uint32_t context[16];
return ERROR_COMMAND_SYNTAX_ERROR;
}
- target->arch_info = arm11;
+ armv4_5_init_arch_info(target, &arm11->arm);
+
+ arm11->jtag_info.tap = target->tap;
+ arm11->jtag_info.scann_size = 5;
+ arm11->jtag_info.scann_instr = ARM11_SCAN_N;
+ /* cur_scan_chain == 0 */
+ arm11->jtag_info.intest_instr = ARM11_INTEST;
return ERROR_OK;
}
int retval;
FNC_INFO;
-
- struct arm11_common * arm11 = target->arch_info;
+ struct arm11_common *arm11 = target_to_arm11(target);
/* check IDCODE */
case 0x07B56000: LOG_INFO("found ARM1156"); break;
case 0x07B76000: LOG_INFO("found ARM1176"); break;
default:
- {
LOG_ERROR("'target arm11' expects IDCODE 0x*7B*7****");
return ERROR_FAIL;
}
- }
arm11->debug_version = (arm11->didr >> 16) & 0x0F;
/** \todo TODO: Check this. We assume that all registers are fetched at debug entry. */
#if 0
- struct arm11_common *arm11 = target->arch_info;
- const struct arm11_reg_defs * arm11_reg_info = arm11_reg_defs + ((struct arm11_reg_state *)reg->arch_info)->def_index;
+ struct arm11_common *arm11 = target_to_arm11(target);
+ const struct arm11_reg_defs *arm11_reg_info = arm11_reg_defs + ((struct arm11_reg_state *)reg->arch_info)->def_index;
#endif
return ERROR_OK;
{
FNC_INFO;
- struct target * target = ((struct arm11_reg_state *)reg->arch_info)->target;
- struct arm11_common *arm11 = target->arch_info;
-// const struct arm11_reg_defs * arm11_reg_info = arm11_reg_defs + ((struct arm11_reg_state *)reg->arch_info)->def_index;
+ struct target *target = ((struct arm11_reg_state *)reg->arch_info)->target;
+ struct arm11_common *arm11 = target_to_arm11(target);
+// const struct arm11_reg_defs *arm11_reg_info = arm11_reg_defs + ((struct arm11_reg_state *)reg->arch_info)->def_index;
arm11->reg_values[((struct arm11_reg_state *)reg->arch_info)->def_index] = buf_get_u32(buf, 0, 32);
reg->valid = 1;
static int arm11_build_reg_cache(struct target *target)
{
- struct arm11_common *arm11 = target->arch_info;
+ struct arm11_common *arm11 = target_to_arm11(target);
NEW(struct reg_cache, cache, 1);
NEW(struct reg, reg_list, ARM11_REGCACHE_COUNT);
uint32_t *value, bool read)
{
int retval;
-
+ struct arm11_common *arm11 = target_to_arm11(target);
+
if (target->state != TARGET_HALTED)
{
LOG_ERROR("Target not halted");
return ERROR_FAIL;
}
-
- struct arm11_common * arm11 = target->arch_info;
uint32_t instr = 0xEE000010 |
(cpnum << 8) |