--- /dev/null
+source [find target/atheros_ar2313.cfg]
+
+reset_config trst_and_srst
+
+$_TARGETNAME configure -event reset-init {
+ mips32 cp0 12 0 0x10400000
+
+ # configure sdram controller
+ mww 0xb8300004 0x0e03
+ sleep 100
+ mww 0xb8300004 0x0e01
+ mww 0xb8300008 0x10
+ sleep 500
+ mww 0xb8300004 0x0e02
+
+ mww 0xb8300000 0x6c0088
+ mww 0xb8300008 0x57e
+ mww 0xb8300004 0x0e00
+ mww 0xb8300004 0xb00
+
+ # configure flash
+ # 0x00000001 - 0x01 << FLASHCTL_IDCY_S
+ # 0x000000e0 - 0x07 << FLASHCTL_WST1_S
+ # FLASHCTL_RBLE 0x00000400 - Read byte lane enable
+ # 0x00003800 - 0x07 << FLASHCTL_WST2_S
+ # FLASHCTL_AC_8M 0x00060000 - Size of flash
+ # FLASHCTL_E 0x00080000 - Flash bank enable (added)
+ # FLASHCTL_WP 0x04000000 - write protect. If used, CFI mode wont work!!
+ # FLASHCTL_MWx16 0x10000000 - 16bit mode. Do not use it!!
+ # FLASHCTL_MWx8 0x00000000 - 8bit mode.
+ mww 0xb8400000 0x000d3ce1
+}
+
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME cfi 0xbe000000 0x00400000 1 1 $_TARGETNAME x16_as_x8
--- /dev/null
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $_CHIPNAME
+} else {
+ set _CHIPNAME ar2313
+}
+
+if { [info exists CPUTAPID] } {
+ set _CPUTAPID $CPUTAPID
+} else {
+ set _CPUTAPID 0x00000001
+}
+
+jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id $_CPUTAPID
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME mips_m4k -endian big -chain-position $_TARGETNAME