.register_commands = arm720t_register_commands,
.target_create = arm720t_target_create,
.init_target = arm720t_init_target,
- .examine = arm7tdmi_examine,
+ .examine = arm7_9_examine,
.mrc = arm720t_mrc,
.mcr = arm720t_mcr,
-
};
#include "arm_simulator.h"
-int arm7_9_debug_entry(struct target *target);
+/**
+ * @file
+ * Hold common code supporting the ARM7 and ARM9 core generations.
+ *
+ * While the ARM core implementations evolved substantially during these
+ * two generations, they look quite similar from the JTAG perspective.
+ * Both have similar debug facilities, based on the same two scan chains
+ * providing access to the core and to an EmbeddedICE module. Both can
+ * support similar ETM and ETB modules, for tracing. And both expose
+ * what could be viewed as "ARM Classic", with multiple processor modes,
+ * shadowed registers, and support for the Thumb instruction set.
+ *
+ * Processor differences include things like presence or absence of MMU
+ * and cache, pipeline sizes, use of a modified Harvard Architecure
+ * (with separate instruction and data busses from the CPU), support
+ * for cpu clock gating during idle, and more.
+ */
+
+static int arm7_9_debug_entry(struct target *target);
/**
* Clear watchpoints for an ARM7/9 target.
* @param target Pointer to target that is entering debug mode
* @return Error code if anything fails, otherwise ERROR_OK
*/
-int arm7_9_debug_entry(struct target *target)
+static int arm7_9_debug_entry(struct target *target)
{
int i;
uint32_t context[16];
return ERROR_OK;
}
+/**
+ * Perform per-target setup that requires JTAG access.
+ */
+int arm7_9_examine(struct target *target)
+{
+ struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
+ int retval;
+
+ if (!target_was_examined(target)) {
+ struct reg_cache *t, **cache_p;
+
+ t = embeddedice_build_reg_cache(target, arm7_9);
+ if (t == NULL)
+ return ERROR_FAIL;
+
+ cache_p = register_get_last_cache_p(&target->reg_cache);
+ (*cache_p) = t;
+ arm7_9->eice_cache = (*cache_p);
+
+ if (arm7_9->armv4_5_common.etm)
+ (*cache_p)->next = etm_build_reg_cache(target,
+ &arm7_9->jtag_info,
+ arm7_9->armv4_5_common.etm);
+
+ target_set_examined(target);
+ }
+
+ retval = embeddedice_setup(target);
+ if (retval == ERROR_OK)
+ retval = arm7_9_setup(target);
+ if (retval == ERROR_OK && arm7_9->armv4_5_common.etm)
+ retval = etm_setup(target);
+ return retval;
+}
+
+
COMMAND_HANDLER(handle_arm7_9_write_xpsr_command)
{
uint32_t value;
int arm7_9_execute_sys_speed(struct target *target);
int arm7_9_init_arch_info(struct target *target, struct arm7_9_common *arm7_9);
+int arm7_9_examine(struct target *target);
#endif /* ARM7_9_COMMON_H */
armv4_5->core_cache = (*cache_p);
}
-int arm7tdmi_examine(struct target *target)
-{
- struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
- int retval;
-
-
- if (!target_was_examined(target))
- {
- /* get pointers to arch-specific information */
- struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache);
- struct reg_cache *t = embeddedice_build_reg_cache(target, arm7_9);
- if (t == NULL)
- return ERROR_FAIL;
-
- (*cache_p) = t;
- arm7_9->eice_cache = (*cache_p);
-
- if (arm7_9->armv4_5_common.etm)
- (*cache_p)->next = etm_build_reg_cache(target,
- &arm7_9->jtag_info,
- arm7_9->armv4_5_common.etm);
-
- target_set_examined(target);
- }
- if ((retval = embeddedice_setup(target)) != ERROR_OK)
- return retval;
- if ((retval = arm7_9_setup(target)) != ERROR_OK)
- return retval;
- if (arm7_9->armv4_5_common.etm)
- {
- if ((retval = etm_setup(target)) != ERROR_OK)
- return retval;
- }
- return ERROR_OK;
-}
-
int arm7tdmi_init_target(struct command_context *cmd_ctx, struct target *target)
{
arm7tdmi_build_reg_cache(target);
.register_commands = arm7_9_register_commands,
.target_create = arm7tdmi_target_create,
.init_target = arm7tdmi_init_target,
- .examine = arm7tdmi_examine,
+ .examine = arm7_9_examine,
};
int arm7tdmi_init_arch_info(struct target *target, struct arm7tdmi_common *arm7tdmi, struct jtag_tap *tap);
int arm7tdmi_init_target(struct command_context *cmd_ctx, struct target *target);
-int arm7tdmi_examine(struct target *target);
#endif /* ARM7TDMI_H */
.register_commands = arm920t_register_commands,
.target_create = arm920t_target_create,
.init_target = arm9tdmi_init_target,
- .examine = arm9tdmi_examine,
+ .examine = arm7_9_examine,
.mrc = arm920t_mrc,
.mcr = arm920t_mcr,
};
.register_commands = arm926ejs_register_commands,
.target_create = arm926ejs_target_create,
.init_target = arm9tdmi_init_target,
- .examine = arm9tdmi_examine,
+ .examine = arm7_9_examine,
.virt2phys = arm926ejs_virt2phys,
.mmu = arm926ejs_mmu,
.register_commands = arm966e_register_commands,
.target_create = arm966e_target_create,
.init_target = arm9tdmi_init_target,
- .examine = arm9tdmi_examine,
+ .examine = arm7_9_examine,
};
armv4_5->core_cache = (*cache_p);
}
-int arm9tdmi_examine(struct target *target)
-{
- int retval;
- struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
-
- if (!target_was_examined(target))
- {
- struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache);
- struct reg_cache *t;
- /* one extra register (vector catch) */
- t = embeddedice_build_reg_cache(target, arm7_9);
- if (t == NULL)
- return ERROR_FAIL;
- (*cache_p) = t;
- arm7_9->eice_cache = (*cache_p);
-
- if (arm7_9->armv4_5_common.etm)
- (*cache_p)->next = etm_build_reg_cache(target,
- &arm7_9->jtag_info,
- arm7_9->armv4_5_common.etm);
-
- target_set_examined(target);
- }
- if ((retval = embeddedice_setup(target)) != ERROR_OK)
- return retval;
- if ((retval = arm7_9_setup(target)) != ERROR_OK)
- return retval;
- if (arm7_9->armv4_5_common.etm)
- {
- if ((retval = etm_setup(target)) != ERROR_OK)
- return retval;
- }
- return ERROR_OK;
-}
-
int arm9tdmi_init_target(struct command_context *cmd_ctx,
struct target *target)
{
.register_commands = arm9tdmi_register_commands,
.target_create = arm9tdmi_target_create,
.init_target = arm9tdmi_init_target,
- .examine = arm9tdmi_examine,
+ .examine = arm7_9_examine,
};
int arm9tdmi_init_target(struct command_context *cmd_ctx,
struct target *target);
-int arm9tdmi_examine(struct target *target);
int arm9tdmi_init_arch_info(struct target *target,
struct arm9tdmi_common *arm9tdmi, struct jtag_tap *tap);
int arm9tdmi_register_commands(struct command_context *cmd_ctx);
.register_commands = arm920t_register_commands,
.target_create = fa526_target_create,
.init_target = arm9tdmi_init_target,
- .examine = arm9tdmi_examine,
+ .examine = arm7_9_examine,
};
struct arm7_9_common *arm7_9;
int retval;
- retval = arm9tdmi_examine(target);
+ retval = arm7_9_examine(target);
if (retval != ERROR_OK)
return retval;