--- /dev/null
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--- /dev/null
+[Init_DeviceSetting]\r
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+[CFG_SYSTEM]\r
+CpuReWrite=0\r
+PerfCounterUser=0\r
+TraceDebugAs=0\r
+[CFG_FLASHCLEAR_R5F562N8_00]\r
+BlockCount=54\r
+BlockData=000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000\r
+[Config_Property]\r
+HideNext=0\r
--- /dev/null
+/***********************************************************************/\r
+/* */\r
+/* FILE :hwinit.c */\r
+/* DATE :Wed, Aug 25, 2010 */\r
+/* DESCRIPTION :Hardware Setup file */\r
+/* CPU TYPE :Other */\r
+/* */\r
+/* This file is generated by KPIT GNU Project Generator. */\r
+/* */\r
+/***********************************************************************/\r
+ \r
+\r
+\r
+#include "iodefine.h"\r
+#ifdef __cplusplus\r
+extern "C" {\r
+#endif\r
+extern void hw_initialise(void);\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+\r
+void hw_initialise(void)\r
+{\r
+/*\r
+ SCI.SMR.BYTE = 0;\r
+ SCI.SMR.BIT.CA = 1;\r
+ SCI.SMR.BIT.CHR = 1;\r
+ SCI.SMR.BIT.OE = 1;\r
+ SCI.SMR.BIT.STOP = 1;\r
+ SCI.SMR.BIT.MP = 1;\r
+ SCI.SMR.BIT.CKS = 3;\r
+ SCI.BRR = 0;\r
+ SCI.SCR.BYTE = 0;\r
+ SCI.SCR.BIT.TIE = 1;\r
+ SCI.SCR.BIT.RIE = 1;\r
+ SCI.SCR.BIT.TE = 1;\r
+ SCI.SCR.BIT.RE = 1;\r
+ SCI.SCR.BIT.MPIE = 1;\r
+ SCI.SCR.BIT.TEIE = 1;\r
+ SCI.SCR.BIT.CKE = 3;\r
+ SCI.TDR = 0;\r
+ SCI.SSR.BYTE = 0;\r
+ SCI.SSR.BIT.TDRE = 1;\r
+ SCI.SSR.BIT.RDRF = 1;\r
+ SCI.SSR.BIT.ORER = 1;\r
+ SCI.SSR.BIT.FER = 1;\r
+ SCI.SSR.BIT.PER = 1;\r
+ SCI.SSR.BIT.TEND = 1;\r
+ SCI.SSR.BIT.MPB = 1;\r
+ SCI.SSR.BIT.MPBT = 1;\r
+ SCI.RDR = 0;\r
+\r
+*/\r
+}\r
--- /dev/null
+/***********************************************************************/\r
+/* */\r
+/* FILE :inthandler.c */\r
+/* DATE :Wed, Aug 25, 2010 */\r
+/* DESCRIPTION :Interrupt Handler */\r
+/* CPU TYPE :Other */\r
+/* */\r
+/* This file is generated by KPIT GNU Project Generator. */\r
+/* */\r
+/***********************************************************************/\r
+ \r
+\r
+\r
+\r
+#include "inthandler.h"\r
+\r
+// Exception(Supervisor Instruction)\r
+void INT_Excep_SuperVisorInst(void){/* brk(); */}\r
+\r
+// Exception(Undefined Instruction)\r
+void INT_Excep_UndefinedInst(void){/* brk(); */}\r
+\r
+// Exception(Floating Point)\r
+void INT_Excep_FloatingPoint(void){/* brk(); */}\r
+\r
+// NMI\r
+void INT_NonMaskableInterrupt(void){/* brk(); */}\r
+\r
+// Dummy\r
+void Dummy(void){/* brk(); */}\r
+\r
+// BRK\r
+void INT_Excep_BRK(void){ /*wait(); */}\r
+\r
+// BUSERR\r
+void INT_Excep_BUSERR(void){ }\r
+\r
+// FCU_FCUERR\r
+void INT_Excep_FCU_FCUERR(void){ }\r
+\r
+// FCU_FRDYI\r
+void INT_Excep_FCU_FRDYI(void){ }\r
+\r
+// CMTU0_CMT0\r
+void INT_Excep_CMTU0_CMT0(void){ }\r
+\r
+// CMTU0_CMT1\r
+void INT_Excep_CMTU0_CMT1(void){ }\r
+\r
+// CMTU1_CMT2\r
+void INT_Excep_CMTU1_CMT2(void){ }\r
+\r
+// CMTU1_CMT3\r
+void INT_Excep_CMTU1_CMT3(void){ }\r
+\r
+// IRQ0\r
+void INT_Excep_IRQ0(void){ }\r
+\r
+// IRQ1\r
+void INT_Excep_IRQ1(void){ }\r
+\r
+// IRQ2\r
+void INT_Excep_IRQ2(void){ }\r
+\r
+// IRQ3\r
+void INT_Excep_IRQ3(void){ }\r
+\r
+// IRQ4\r
+void INT_Excep_IRQ4(void){ }\r
+\r
+// IRQ5\r
+void INT_Excep_IRQ5(void){ }\r
+\r
+// IRQ6\r
+void INT_Excep_IRQ6(void){ }\r
+\r
+// IRQ7\r
+void INT_Excep_IRQ7(void){ }\r
+\r
+// IRQ8\r
+void INT_Excep_IRQ8(void){ }\r
+\r
+// IRQ9\r
+void INT_Excep_IRQ9(void){ }\r
+\r
+// IRQ10\r
+void INT_Excep_IRQ10(void){ }\r
+\r
+// IRQ11\r
+void INT_Excep_IRQ11(void){ }\r
+\r
+// IRQ12\r
+void INT_Excep_IRQ12(void){ }\r
+\r
+// IRQ13\r
+void INT_Excep_IRQ13(void){ }\r
+\r
+// IRQ14\r
+void INT_Excep_IRQ14(void){ }\r
+\r
+// IRQ15\r
+void INT_Excep_IRQ15(void){ }\r
+\r
+// WDT_WOVI\r
+void INT_Excep_WDT_WOVI(void){ }\r
+\r
+// AD0_ADI0\r
+void INT_Excep_AD0_ADI0(void){ }\r
+\r
+// AD1_ADI1\r
+void INT_Excep_AD1_ADI1(void){ }\r
+\r
+// AD2_ADI2\r
+void INT_Excep_AD2_ADI2(void){ }\r
+\r
+// AD3_ADI3\r
+void INT_Excep_AD3_ADI3(void){ }\r
+\r
+// TPU0_TGI0A\r
+void INT_Excep_TPU0_TGI0A(void){ }\r
+\r
+// TPU0_TGI0B\r
+void INT_Excep_TPU0_TGI0B(void){ }\r
+\r
+// TPU0_TGI0C\r
+void INT_Excep_TPU0_TGI0C(void){ }\r
+\r
+// TPU0_TGI0D\r
+void INT_Excep_TPU0_TGI0D(void){ }\r
+\r
+// TPU0_TCI0V\r
+void INT_Excep_TPU0_TCI0V(void){ }\r
+\r
+// TPU1_TGI1A\r
+void INT_Excep_TPU1_TGI1A(void){ }\r
+\r
+// TPU1_TGI1B\r
+void INT_Excep_TPU1_TGI1B(void){ }\r
+\r
+// TPU1_TCI1V\r
+void INT_Excep_TPU1_TCI1V(void){ }\r
+\r
+// TPU1_TCI1U\r
+void INT_Excep_TPU1_TCI1U(void){ }\r
+\r
+// TPU2_TGI2A\r
+void INT_Excep_TPU2_TGI2A(void){ }\r
+\r
+// TPU2_TGI2B\r
+void INT_Excep_TPU2_TGI2B(void){ }\r
+\r
+// TPU2_TCI2V\r
+void INT_Excep_TPU2_TCI2V(void){ }\r
+\r
+// TPU2_TCI2U\r
+void INT_Excep_TPU2_TCI2U(void){ }\r
+\r
+// TPU3_TGI3A\r
+void INT_Excep_TPU3_TGI3A(void){ }\r
+\r
+// TPU3_TGI3B\r
+void INT_Excep_TPU3_TGI3B(void){ }\r
+\r
+// TPU3_TGI3C\r
+void INT_Excep_TPU3_TGI3C(void){ }\r
+\r
+// TPU3_TGI3D\r
+void INT_Excep_TPU3_TGI3D(void){ }\r
+\r
+// TPU3_TCI3V\r
+void INT_Excep_TPU3_TCI3V(void){ }\r
+\r
+// TPU4_TGI4A\r
+void INT_Excep_TPU4_TGI4A(void){ }\r
+\r
+// TPU4_TGI4B\r
+void INT_Excep_TPU4_TGI4B(void){ }\r
+\r
+// TPU4_TCI4V\r
+void INT_Excep_TPU4_TCI4V(void){ }\r
+\r
+// TPU4_TCI4U\r
+void INT_Excep_TPU4_TCI4U(void){ }\r
+\r
+// TPU5_TGI5A\r
+void INT_Excep_TPU5_TGI5A(void){ }\r
+\r
+// TPU5_TGI5B\r
+void INT_Excep_TPU5_TGI5B(void){ }\r
+\r
+// TPU5_TCI5V\r
+void INT_Excep_TPU5_TCI5V(void){ }\r
+\r
+// TPU5_TCI5U\r
+void INT_Excep_TPU5_TCI5U(void){ }\r
+\r
+// TPU6_TGI6A\r
+void INT_Excep_TPU6_TGI6A(void){ }\r
+\r
+// TPU6_TGI6B\r
+void INT_Excep_TPU6_TGI6B(void){ }\r
+\r
+// TPU6_TGI6C\r
+void INT_Excep_TPU6_TGI6C(void){ }\r
+\r
+// TPU6_TGI6D\r
+void INT_Excep_TPU6_TGI6D(void){ }\r
+\r
+// TPU6_TCI6V\r
+void INT_Excep_TPU6_TCI6V(void){ }\r
+\r
+// TPU7_TGI7A\r
+void INT_Excep_TPU7_TGI7A(void){ }\r
+\r
+// TPU7_TGI7B\r
+void INT_Excep_TPU7_TGI7B(void){ }\r
+\r
+// TPU7_TCI7V\r
+void INT_Excep_TPU7_TCI7V(void){ }\r
+\r
+// TPU7_TCI7U\r
+void INT_Excep_TPU7_TCI7U(void){ }\r
+\r
+// TPU8_TGI8A\r
+void INT_Excep_TPU8_TGI8A(void){ }\r
+\r
+// TPU8_TGI8B\r
+void INT_Excep_TPU8_TGI8B(void){ }\r
+\r
+// TPU8_TCI8V\r
+void INT_Excep_TPU8_TCI8V(void){ }\r
+\r
+// TPU8_TCI8U\r
+void INT_Excep_TPU8_TCI8U(void){ }\r
+\r
+// TPU9_TGI9A\r
+void INT_Excep_TPU9_TGI9A(void){ }\r
+\r
+// TPU9_TGI9B\r
+void INT_Excep_TPU9_TGI9B(void){ }\r
+\r
+// TPU9_TGI9C\r
+void INT_Excep_TPU9_TGI9C(void){ }\r
+\r
+// TPU9_TGI9D\r
+void INT_Excep_TPU9_TGI9D(void){ }\r
+\r
+// TPU9_TCI9V\r
+void INT_Excep_TPU9_TCI9V(void){ }\r
+\r
+// TPU10_TGI10A\r
+void INT_Excep_TPU10_TGI10A(void){ }\r
+\r
+// TPU10_TGI10B\r
+void INT_Excep_TPU10_TGI10B(void){ }\r
+\r
+// TPU10_TCI10V\r
+void INT_Excep_TPU10_TCI10V(void){ }\r
+\r
+// TPU10_TCI10U\r
+void INT_Excep_TPU10_TCI10U(void){ }\r
+\r
+// TPU11_TGI11A\r
+void INT_Excep_TPU11_TGI11A(void){ }\r
+\r
+// TPU11_TGI11B\r
+void INT_Excep_TPU11_TGI11B(void){ }\r
+\r
+// TPU11_TCI11V\r
+void INT_Excep_TPU11_TCI11V(void){ }\r
+\r
+// TPU11_TCI11U\r
+void INT_Excep_TPU11_TCI11U(void){ }\r
+\r
+// TMR0_CMI0A\r
+void INT_Excep_TMR0_CMI0A(void){ }\r
+\r
+// TMR0_CMI0B\r
+void INT_Excep_TMR0_CMI0B(void){ }\r
+\r
+// TMR0_OV0I\r
+void INT_Excep_TMR0_OV0I(void){ }\r
+\r
+// TMR1_CMI1A\r
+void INT_Excep_TMR1_CMI1A(void){ }\r
+\r
+// TMR1_CMI1B\r
+void INT_Excep_TMR1_CMI1B(void){ }\r
+\r
+// TMR1_OV1I\r
+void INT_Excep_TMR1_OV1I(void){ }\r
+\r
+// TMR2_CMI2A\r
+void INT_Excep_TMR2_CMI2A(void){ }\r
+\r
+// TMR2_CMI2B\r
+void INT_Excep_TMR2_CMI2B(void){ }\r
+\r
+// TMR2_OV2I\r
+void INT_Excep_TMR2_OV2I(void){ }\r
+\r
+// TMR3_CMI3A\r
+void INT_Excep_TMR3_CMI3A(void){ }\r
+\r
+// TMR3_CMI3B\r
+void INT_Excep_TMR3_CMI3B(void){ }\r
+\r
+// TMR3_OV3I\r
+void INT_Excep_TMR3_OV3I(void){ }\r
+\r
+// DMAC_DMTEND0\r
+void INT_Excep_DMAC_DMTEND0(void){ }\r
+\r
+// DMAC_DMTEND1\r
+void INT_Excep_DMAC_DMTEND1(void){ }\r
+\r
+// DMAC_DMTEND2\r
+void INT_Excep_DMAC_DMTEND2(void){ }\r
+\r
+// DMAC_DMTEND3\r
+void INT_Excep_DMAC_DMTEND3(void){ }\r
+\r
+// SCI0_ERI0\r
+void INT_Excep_SCI0_ERI0(void){ }\r
+\r
+// SCI0_RXI0\r
+void INT_Excep_SCI0_RXI0(void){ }\r
+\r
+// SCI0_TXI0\r
+void INT_Excep_SCI0_TXI0(void){ }\r
+\r
+// SCI0_TEI0\r
+void INT_Excep_SCI0_TEI0(void){ }\r
+\r
+// SCI1_ERI1\r
+void INT_Excep_SCI1_ERI1(void){ }\r
+\r
+// SCI1_RXI1\r
+void INT_Excep_SCI1_RXI1(void){ }\r
+\r
+// SCI1_TXI1\r
+void INT_Excep_SCI1_TXI1(void){ }\r
+\r
+// SCI1_TEI1\r
+void INT_Excep_SCI1_TEI1(void){ }\r
+\r
+// SCI2_ERI2\r
+void INT_Excep_SCI2_ERI2(void){ }\r
+\r
+// SCI2_RXI2\r
+void INT_Excep_SCI2_RXI2(void){ }\r
+\r
+// SCI2_TXI2\r
+void INT_Excep_SCI2_TXI2(void){ }\r
+\r
+// SCI2_TEI2\r
+void INT_Excep_SCI2_TEI2(void){ }\r
+\r
+// SCI3_ERI3\r
+void INT_Excep_SCI3_ERI3(void){ }\r
+\r
+// SCI3_RXI3\r
+void INT_Excep_SCI3_RXI3(void){ }\r
+\r
+// SCI3_TXI3\r
+void INT_Excep_SCI3_TXI3(void){ }\r
+\r
+// SCI3_TEI3\r
+void INT_Excep_SCI3_TEI3(void){ }\r
+\r
+// SCI4_ERI4\r
+void INT_Excep_SCI4_ERI4(void){ }\r
+\r
+// SCI4_RXI4\r
+void INT_Excep_SCI4_RXI4(void){ }\r
+\r
+// SCI4_TXI4\r
+void INT_Excep_SCI4_TXI4(void){ }\r
+\r
+// SCI4_TEI4\r
+void INT_Excep_SCI4_TEI4(void){ }\r
+\r
+// SCI5_ERI5\r
+void INT_Excep_SCI5_ERI5(void){ }\r
+\r
+// SCI5_RXI5\r
+void INT_Excep_SCI5_RXI5(void){ }\r
+\r
+// SCI5_TXI5\r
+void INT_Excep_SCI5_TXI5(void){ }\r
+\r
+// SCI5_TEI5\r
+void INT_Excep_SCI5_TEI5(void){ }\r
+\r
+// SCI6_ERI6\r
+void INT_Excep_SCI6_ERI6(void){ }\r
+\r
+// SCI6_RXI6\r
+void INT_Excep_SCI6_RXI6(void){ }\r
+\r
+// SCI6_TXI6\r
+void INT_Excep_SCI6_TXI6(void){ }\r
+\r
+// SCI6_TEI6\r
+void INT_Excep_SCI6_TEI6(void){ }\r
+\r
+// RIIC0_EEI0\r
+void INT_Excep_RIIC0_EEI0(void){ }\r
+\r
+// RIIC0_RXI0\r
+void INT_Excep_RIIC0_RXI0(void){ }\r
+\r
+// RIIC0_TXI0\r
+void INT_Excep_RIIC0_TXI0(void){ }\r
+\r
+// RIIC0_TEI0\r
+void INT_Excep_RIIC0_TEI0(void){ }\r
+\r
+// RIIC1_EEI1\r
+void INT_Excep_RIIC1_EEI1(void){ }\r
+\r
+// RIIC1_RXI1\r
+void INT_Excep_RIIC1_RXI1(void){ }\r
+\r
+// RIIC1_TXI1\r
+void INT_Excep_RIIC1_TXI1(void){ }\r
+\r
+// RIIC1_TEI1\r
+void INT_Excep_RIIC1_TEI1(void){ }\r
+\r
+\r
--- /dev/null
+/*------------------------------------------------------------------------\r
+ |\r
+ FILE : start.asm |\r
+ DATE : Wed, Aug 25, 2010 |\r
+ DESCRIPTION : Reset Program |\r
+ CPU TYPE : Other |\r
+ |\r
+ This file is generated by KPIT GNU Project Generator (Ver.4.5). |\r
+ |\r
+------------------------------------------------------------------------*/\r
+ \r
+\r
+\r
+ /*Start.asm*/\r
+\r
+ .list\r
+ .section .text\r
+ .global _start /*global Start routine */\r
+ \r
+#ifdef CPPAPP \r
+___dso_handle:\r
+ .global ___dso_handle\r
+#endif \r
+\r
+ .extern _hw_initialise /*external Sub-routine to initialise Hardware*/\r
+ .extern _data\r
+ .extern _mdata\r
+ .extern _ebss\r
+ .extern _bss\r
+ .extern _edata\r
+ .extern _main \r
+ .extern _ustack\r
+ .extern _istack\r
+ .extern _rvectors\r
+#if DEBUG\r
+ .extern _exit\r
+#endif\r
+\r
+ \r
+_start:\r
+/* initialise user stack pointer */\r
+ mvtc #_ustack,USP\r
+\r
+/* initialise interrupt stack pointer */\r
+ mvtc #_istack,ISP\r
+\r
+/* setup intb */\r
+ mvtc #_rvectors_start, intb /* INTERRUPT VECTOR ADDRESS definition */\r
+\r
+/* setup FPSW */\r
+ mvtc #100h, fpsw \r
+\r
+/* load data section from ROM to RAM */\r
+\r
+ mov #_mdata,r2 /* src ROM address of data section in R2 */\r
+ mov #_data,r1 /* dest start RAM address of data section in R1 */\r
+ mov #_edata,r3 /* end RAM address of data section in R3 */\r
+ sub r1,r3 /* size of data section in R3 (R3=R3-R1) */\r
+ smovf /* block copy R3 bytes from R2 to R1 */\r
+\r
+/* bss initialisation : zero out bss */\r
+\r
+ mov #00h,r2 /* load R2 reg with zero */\r
+ mov #_ebss, r3 /* store the end address of bss in R3 */\r
+ mov #_bss, r1 /* store the start address of bss in R1 */\r
+ sub r1,r3 /* size of bss section in R3 (R3=R3-R1) */\r
+ sstr.b\r
+\r
+/* call the hardware initialiser */\r
+ bsr.a _hw_initialise \r
+ nop\r
+\r
+/* setup PSW */\r
+ mvtc #10000h, psw /* Set Ubit & Ibit for PSW */\r
+\r
+/* change PSW PM to user-mode */\r
+ MVFC PSW,R1\r
+ OR #00100000h,R1\r
+ PUSH.L R1\r
+ MVFC PC,R1\r
+ ADD #10,R1\r
+ PUSH.L R1\r
+ RTE\r
+ NOP\r
+ NOP\r
+\r
+/* start user program */\r
+ bsr.a _main \r
+ \r
+/* call to exit*/\r
+_exit:\r
+ bsr.a _exit\r
+ \r
+ .end\r
--- /dev/null
+[HIMDBVersion]\r
+2.0\r
+[DATABASE_VERSION]\r
+"2.8" \r
+[PROJECT_DETAILS]\r
+"RTOSDemo" "C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N_MDK_GNURX\RTOSDemo" "C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N_MDK_GNURX\RTOSDemo\RTOSDemo.hwp" "RX" "KPIT GNURX [ELF]" "C Application" "RX600" "Other" \r
+[INFORMATION]\r
+"No project information available" \r
+[TOOL_CHAIN]\r
+"KPIT GNURX [ELF] Toolchain" "v10.02" \r
+[CONFIGURATIONS]\r
+"Debug" "C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N_MDK_GNURX\RTOSDemo\Debug" \r
+"Debug_RX600_E1_E20_SYSTEM" "C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N_MDK_GNURX\RTOSDemo\Debug_RX600_E1_E20_SYSTEM" \r
+"Release" "C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N_MDK_GNURX\RTOSDemo\Release" \r
+[BUILD_PHASES]\r
+"GNU Assembler" 1 \r
+"GNU Compiler" 1 \r
+"GNU Library Generator" 1 \r
+"GNU Linker" 1 \r
+[TOOL_ENVIRONMENT]\r
+[EXTENSIONS]\r
+"Absolute file" "ABS" \r
+"Archive File" "A" \r
+"Assembly include file" "INC" \r
+"Assembly list file" "LIS" \r
+"Assembly source file" "S" \r
+"Assembly source file" "SRC" \r
+"Binary file" "BIN" \r
+"C header file" "H" \r
+"C list file" "LST" \r
+"C source file" "C" \r
+"C++ header file" "HPP" \r
+"C++ list file" "LPP" \r
+"C++ source file" "CC" \r
+"C++ source file" "CP" \r
+"C++ source file" "CPP" \r
+"CPU information file" "CPU" \r
+"Calling information file" "CAL" \r
+"Debug information file" "DBG" \r
+"Expanded assembly source file" "EXP" \r
+"Hex file" "HEX" \r
+"Library file" "LIB" \r
+"Library information file" "LBP" \r
+"Linkage map file" "MAP" \r
+"Object file" "OBJ" \r
+"Optimize map file" "bls" \r
+"Preprocess Assembly file" "ASM" \r
+"Preprocessed C source file" "P" \r
+"Preprocessed C++ source file" "PP" \r
+"Profile file" "PRO" \r
+"Relocatable file" "REL" \r
+"Rts information file" "RTS" \r
+"S-Record file" "MOT" \r
+"Stack information file" "SNI" \r
+"TD include object file" "RTI" \r
+[FILE_GROUPS]\r
+"Absolute file" "BIN" "NONE" "" \r
+"Archive File" "BIN" "NONE" "" \r
+"Assembly include file" "TEXT" "EDITOR" "" \r
+"Assembly list file" "TEXT" "EDITOR" "" \r
+"Assembly source file" "TEXT" "EDITOR" "" \r
+"Binary file" "BIN" "NONE" "" \r
+"C header file" "TEXT" "EDITOR" "" \r
+"C list file" "TEXT" "EDITOR" "" \r
+"C source file" "TEXT" "EDITOR" "" \r
+"C++ header file" "TEXT" "EDITOR" "" \r
+"C++ list file" "TEXT" "EDITOR" "" \r
+"C++ source file" "TEXT" "EDITOR" "" \r
+"CPU information file" "BIN" "NONE" "" \r
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+[ASSOCIATED_APPLICATIONS]\r
+[TOOLCHAIN_PHASE]\r
+"GNU Assembler" \r
+"GNU Compiler" \r
+"GNU Library Generator" \r
+"GNU Linker" \r
+[UTILITY_PHASE]\r
+[CUSTOM_PHASES]\r
+[CUSTOM_PHASE_INPUT_GROUP]\r
+[CUSTOM_PHASE_OUTPUT_SYNTAX]\r
+[BUILD_ORDER]\r
+"GNU Library Generator" 1 \r
+"GNU Compiler" 1 \r
+"GNU Assembler" 1 \r
+"GNU Linker" 1 \r
+[BUILD_PHASE_DETAILS]\r
+"GNU Assembler" "Assembly source file" 1 \r
+"GNU Compiler" "C source file|C++ source file|Preprocess Assembly file" 1 \r
+"GNU Library Generator" "" 0 \r
+"GNU Linker" "Object file|Library file|Relocatable file" 0 \r
+[BUILD_FILE_ORDER_Assembly source file]\r
+"GNU Assembler" 1 \r
+[BUILD_FILE_ORDER_C source file]\r
+"GNU Compiler" 1 \r
+[BUILD_FILE_ORDER_C++ source file]\r
+"GNU Compiler" 1 \r
+[BUILD_FILE_ORDER_Preprocess Assembly file]\r
+"GNU Compiler" 1 \r
+[SCRAP]\r
+"Project Generator Setup File" "" \r
+[MAPPINGS]\r
+"Assembly source file" "GNU Assembler" "GNU Compiler" \r
+"Object file" "GNU Linker" "GNU Assembler" \r
+"Object file" "GNU Linker" "GNU Compiler" \r
+[PROJECT_FILES]\r
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+"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N_MDK_GNURX\RTOSDemo\GNU-Files\inthandler.c" "User" "C source file|GNU-Files" 2 \r
+"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N_MDK_GNURX\RTOSDemo\GNU-Files\start.asm" "User" "Preprocess Assembly file" 2 \r
+"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N_MDK_GNURX\RTOSDemo\inthandler.h" "User" "C header file" 2 \r
+"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N_MDK_GNURX\RTOSDemo\iodefine.h" "User" "C header file" 2 \r
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+"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N_MDK_GNURX\RTOSDemo\typedefine.h" "User" "C header file" 2 \r
+"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N_MDK_GNURX\RTOSDemo\vects.c" "User" "C source file" 2 \r
+[FOLDER]\r
+"C header file" "C header file" \r
+"C source file" "C source file" \r
+"C source file|GNU-Files" "" \r
+"Preprocess Assembly file" "Preprocess Assembly file" \r
+[GENERAL_DATA_PROJECT]\r
+"USE_CUSTOM_LINKAGE_ORDER" "0" \r
+[ON_DEMAND_COMPONENTS_LOADED]\r
+[SYNC_SESSION_NAMES]\r
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+[GENERAL_DATA_SESSION_DefaultSession]\r
+[GENERAL_DATA_SESSION_SessionRX600_E1_E20_SYSTEM]\r
+[OPTIONS_Debug_GNU Assembler]\r
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+[OPTIONS_Debug_GNU Compiler]\r
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+"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N_MDK_GNURX\RTOSDemo\GNU-Files\inthandler.c" "02a2a3fe5744bc10" 3 \r
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+[OPTIONS_Debug_GNU Library Generator]\r
+"Single Shot" "0e2d0de05744bc10" 1 \r
+[OPTIONS_Debug_GNU Linker]\r
+"Single Shot" "015ee3fe5744bc10" 5 \r
+[OPTIONS_Debug]\r
+"" 0 \r
+"[V|VERSION|2] [S|INCDIR|^"$(TCINSTALL)\rx-elf\rx-elf\optlibinc^"|^"$(TCINSTALL)\rx-elf\lib\gcc\rx-elf\4.5-GNURX_v10.02\optlibinc^"|^"$(PROJDIR)\include^"] [S|DEFINES|DEBUG] [S|OUTPUT|OBJECT] [S|OBJPATH|^"$(CONFIGDIR)\$(FILELEAF).o^"] [B|DEBUG|1] [S|DEBUGFT|Native] [I|DEBUGLV|2] [S|ALIGN4|ALL] [B|OPTIMIZE|0] [I|OPTLV|2] [B|NOSTDINC|1] [S|APPTXT|^"-Wa,-gdwarf2^"] [S|CPUTYPE|RX600] [S|ENDIAN|LITTLE] [S|CPU|Other] [I|RMINTREGVAL|0] [I|RMMAXCONSTVAL|0] [I|RMMAXVARSVAL|0] [S|PROJECTTYPE|CAPPPROJECT] [B|DOOPTLIB|1]\r
+" 2 \r
+"[V|VERSION|2] [S|INCDIR|^"$(TCINSTALL)\rx-elf\rx-elf\optlibinc^"|^"$(TCINSTALL)\rx-elf\lib\gcc\rx-elf\4.5-GNURX_v10.02\optlibinc^"|^"$(PROJDIR)\include^"] [S|DEFINES|DEBUG] [S|OUTPUT|OBJECT] [S|OBJPATH|^"$(CONFIGDIR)\$(FILELEAF).o^"] [B|DEBUG|1] [S|DEBUGFT|Native] [I|DEBUGLV|2] [S|ALIGN4|ALL] [B|OPTIMIZE|0] [I|OPTLV|2] [B|NOSTDINC|1] [S|CPUTYPE|RX600] [S|ENDIAN|LITTLE] [S|CPU|Other] [I|RMINTREGVAL|0] [I|RMMAXCONSTVAL|0] [I|RMMAXVARSVAL|0] [S|PROJECTTYPE|CAPPPROJECT] [B|DOOPTLIB|1]\r
+" 3 \r
+"[V|VERSION|2] [S|OBJPATH|^"$(CONFIGDIR)\$(FILELEAF).o^"] [I|DEBUGLV|2] [B|LINCHLS|1] [B|LINCASS|1] [B|LINCSYM|1] [S|LFILE|^"$(CONFIGDIR)\$(FILELEAF).^"] [S|PROJECTTYPE|CAPPPROJECT] [S|INCDIR|^"$(PROJDIR)^"] [S|CPUTYPE|RX600] [S|ENDIAN|LITTLE] [S|CPU|Other] " 4 \r
+"[V|VERSION|2] [S|OUTFORM|BOTH] [B|MFILEGEN|1] [S|PLMFILE|^"$(CONFIGDIR)\$(PROJECTNAME).map^"] [S|APPTXT|^"-e _start^"] [S|OUTFILE|^"$(CONFIGDIR)\$(PROJECTNAME).x^"] [B|RSARCH|1] [B|FIXUPLIBS|1] [B|SUBCOMMAND|0] [S|PROJECTTYPE|CAPPPROJECT] [S|ENDIAN|LITTLE] [S|CPUTYPE|RX600] [S|CPU|Other] [B|DOOPTLIB|1] [B|DOPROJBUILT|1] [S|ARCHIVE|libRTOSDemo.a*libgcc.a] [S|INCDIR|^"$(TCINSTALL)\rx-elf\lib\gcc\rx-elf\4.5-GNURX_v10.02^"|^"$(CONFIGDIR)^"] [S|GROUPDET|.fvectors|0|0||1|0xFFFFFF80|0|1|0|.fvectors|All-files|<<FEND>>|<<CEND>>|<<GEND>>|.text|0|0||1|0xFFFF8000|0|0|0|.text|All-files|<<FEND>>|0|.text.*|All-files|<<FEND>>|0|P|All-files|<<FEND>>|1|etext|<<FEND>>|<<CEND>>|<<GEND>>|.rvectors|0|0||0||0|1|1|_rvectors_start|<<FEND>>|0|.rvectors|All-files|<<FEND>>|1|_rvectors_end|<<FEND>>|<<CEND>>|<<GEND>>|.init|0|0||0||0|0|0|.init|All-files|<<FEND>>|<<CEND>>|<<GEND>>|.fini|0|0||0||0|0|0|.fini|All-files|<<FEND>>|<<CEND>>|<<GEND>>|.got|0|0||0||0|0|0|.got|All-files|<<FEND>>|0|.got.plt|All-files|<<FEND>>|<<CEND>>|<<GEND>>|.rodata|0|0||0||0|0|0|.rodata|All-files|<<FEND>>|0|.rodata.*|All-files|<<FEND>>|0|C_1|All-files|<<FEND>>|0|C_2|All-files|<<FEND>>|0|C|All-files|<<FEND>>|1|_erodata|<<FEND>>|<<CEND>>|<<GEND>>|.eh_frame_hdr|0|0||0||0|0|0|.eh_frame_hdr|All-files|<<FEND>>|<<CEND>>|<<GEND>>|.eh_frame|0|0||0||0|0|0|.eh_frame|All-files|<<FEND>>|<<CEND>>|<<GEND>>|.jcr|0|0||0||0|0|0|.jcr|All-files|<<FEND>>|<<CEND>>|<<GEND>>|.tors|0|0||0||0|0|1|__CTOR_LIST__|<<FEND>>|1|___ctors|<<FEND>>|0|.ctors|All-files|<<FEND>>|1|___ctors_end|<<FEND>>|1|__CTOR_END__|<<FEND>>|1|__DTOR_LIST__|<<FEND>>|1|___dtors|<<FEND>>|0|.dtors|All-files|<<FEND>>|1|___dtors_end|<<FEND>>|1|__DTOR_END__|<<FEND>>|1|_mdata|<<FEND>>|<<CEND>>|<<GEND>>|.istack|0|0||1|0x00001808|0|0|1|_istack|<<FEND>>|<<CEND>>|<<GEND>>|.ustack|0|0||1|0x00001708|0|0|1|_ustack|<<FEND>>|<<CEND>>|<<GEND>>|.data|0|2|_mdata|1|0x00001001|0|0|1|_data|<<FEND>>|0|.data|All-files|<<FEND>>|0|.data.*|All-files|<<FEND>>|0|D|All-files|<<FEND>>|0|D_1|All-files|<<FEND>>|0|D_2|All-files|<<FEND>>|1|_edata|<<FEND>>|<<CEND>>|<<GEND>>|.gcc_exc|0|0||0||0|0|0|.gcc_exc|All-files|<<FEND>>|<<CEND>>|<<GEND>>|.bss|0|0||0||0|0|1|_bss|<<FEND>>|0|.bss|All-files|<<FEND>>|0|.bss.*|All-files|<<FEND>>|0|COMMON|All-files|<<FEND>>|0|B|All-files|<<FEND>>|0|B_1|All-files|<<FEND>>|0|B_2|All-files|<<FEND>>|1|_ebss|<<FEND>>|1|_end|<<FEND>>|<<CEND>>|<<GEND>>] " 5 \r
+"[V|VERSION|2] [S|OUTPUTPATH|^"$(CONFIGDIR)\lib$(PROJECTNAME).a^"] [B|OPTIMIZE|1] [I|OPTTYPE|1] [S|MODE|BUILD/CHANGED] [S|CPUTYPE|RX600] [S|ENDIAN|LITTLE] [S|CPU|Other] [B|DOPROJBUILT|1] [B|DOOPTLIB|1] [B|MATH|1] [B|STDIO|1] [B|STDLIB|1] [B|STRING|1] " 1 \r
+[EXCLUDED_FILES_Debug]\r
+[LINKAGE_ORDER_Debug]\r
+[GENERAL_DATA_CONFIGURATION_Debug]\r
+[OPTIONS_Debug_RX600_E1_E20_SYSTEM_GNU Assembler]\r
+"Assembly source file" "0e2d0de05744bc10" 3 \r
+[OPTIONS_Debug_RX600_E1_E20_SYSTEM_GNU Compiler]\r
+"C source file" "0e2d0de05744bc10" 2 \r
+"C++ source file" "0e2d0de05744bc10" 2 \r
+"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N_MDK_GNURX\RTOSDemo\GNU-Files\hwinit.c" "02a2a3fe5744bc10" 2 \r
+"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N_MDK_GNURX\RTOSDemo\GNU-Files\inthandler.c" "02a2a3fe5744bc10" 2 \r
+"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N_MDK_GNURX\RTOSDemo\GNU-Files\start.asm" "02a2a3fe5744bc10" 2 \r
+"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N_MDK_GNURX\RTOSDemo\main.c" "0cec443c5744bc10" 2 \r
+"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N_MDK_GNURX\RTOSDemo\vects.c" "0e2d0de05744bc10" 2 \r
+"Preprocess Assembly file" "0e2d0de05744bc10" 2 \r
+[OPTIONS_Debug_RX600_E1_E20_SYSTEM_GNU Library Generator]\r
+"Single Shot" "0e2d0de05744bc10" 1 \r
+[OPTIONS_Debug_RX600_E1_E20_SYSTEM_GNU Linker]\r
+"Single Shot" "015ee3fe5744bc10" 4 \r
+[OPTIONS_Debug_RX600_E1_E20_SYSTEM]\r
+"" 0 \r
+"[V|VERSION|2] [S|OBJPATH|^"$(CONFIGDIR)\$(FILELEAF).o^"] [I|DEBUGLV|2] [B|LINCHLS|1] [B|LINCASS|1] [B|LINCSYM|1] [S|LFILE|^"$(CONFIGDIR)\$(FILELEAF).^"] [S|PROJECTTYPE|CAPPPROJECT] [S|INCDIR|^"$(PROJDIR)^"] [S|CPUTYPE|RX600] [S|ENDIAN|LITTLE] [S|CPU|Other] " 3 \r
+"[V|VERSION|2] [S|OUTFORM|BOTH] [B|MFILEGEN|1] [S|PLMFILE|^"$(CONFIGDIR)\$(PROJECTNAME).map^"] [S|APPTXT|^"-e _start^"] [S|OUTFILE|^"$(CONFIGDIR)\$(PROJECTNAME).x^"] [B|RSARCH|1] [B|FIXUPLIBS|1] [B|SUBCOMMAND|0] [S|PROJECTTYPE|CAPPPROJECT] [S|ENDIAN|LITTLE] [S|CPUTYPE|RX600] [S|CPU|Other] [B|DOOPTLIB|1] [B|DOPROJBUILT|1] [S|ARCHIVE|libRTOSDemo.a*libgcc.a] [S|INCDIR|^"$(TCINSTALL)\rx-elf\lib\gcc\rx-elf\4.5-GNURX_v10.02^"|^"$(CONFIGDIR)^"] [S|GROUPDET|.fvectors|0|0||1|0xFFFFFF80|0|1|0|.fvectors|All-files|<<FEND>>|<<CEND>>|<<GEND>>|.text|0|0||1|0xFFFF8000|0|0|0|.text|All-files|<<FEND>>|0|.text.*|All-files|<<FEND>>|0|P|All-files|<<FEND>>|1|etext|<<FEND>>|<<CEND>>|<<GEND>>|.rvectors|0|0||0||0|1|1|_rvectors_start|<<FEND>>|0|.rvectors|All-files|<<FEND>>|1|_rvectors_end|<<FEND>>|<<CEND>>|<<GEND>>|.init|0|0||0||0|0|0|.init|All-files|<<FEND>>|<<CEND>>|<<GEND>>|.fini|0|0||0||0|0|0|.fini|All-files|<<FEND>>|<<CEND>>|<<GEND>>|.got|0|0||0||0|0|0|.got|All-files|<<FEND>>|0|.got.plt|All-files|<<FEND>>|<<CEND>>|<<GEND>>|.rodata|0|0||0||0|0|0|.rodata|All-files|<<FEND>>|0|.rodata.*|All-files|<<FEND>>|0|C_1|All-files|<<FEND>>|0|C_2|All-files|<<FEND>>|0|C|All-files|<<FEND>>|1|_erodata|<<FEND>>|<<CEND>>|<<GEND>>|.eh_frame_hdr|0|0||0||0|0|0|.eh_frame_hdr|All-files|<<FEND>>|<<CEND>>|<<GEND>>|.eh_frame|0|0||0||0|0|0|.eh_frame|All-files|<<FEND>>|<<CEND>>|<<GEND>>|.jcr|0|0||0||0|0|0|.jcr|All-files|<<FEND>>|<<CEND>>|<<GEND>>|.tors|0|0||0||0|0|1|__CTOR_LIST__|<<FEND>>|1|___ctors|<<FEND>>|0|.ctors|All-files|<<FEND>>|1|___ctors_end|<<FEND>>|1|__CTOR_END__|<<FEND>>|1|__DTOR_LIST__|<<FEND>>|1|___dtors|<<FEND>>|0|.dtors|All-files|<<FEND>>|1|___dtors_end|<<FEND>>|1|__DTOR_END__|<<FEND>>|1|_mdata|<<FEND>>|<<CEND>>|<<GEND>>|.istack|0|0||1|0x00001808|0|0|1|_istack|<<FEND>>|<<CEND>>|<<GEND>>|.ustack|0|0||1|0x00001708|0|0|1|_ustack|<<FEND>>|<<CEND>>|<<GEND>>|.data|0|2|_mdata|1|0x00001001|0|0|1|_data|<<FEND>>|0|.data|All-files|<<FEND>>|0|.data.*|All-files|<<FEND>>|0|D|All-files|<<FEND>>|0|D_1|All-files|<<FEND>>|0|D_2|All-files|<<FEND>>|1|_edata|<<FEND>>|<<CEND>>|<<GEND>>|.gcc_exc|0|0||0||0|0|0|.gcc_exc|All-files|<<FEND>>|<<CEND>>|<<GEND>>|.bss|0|0||0||0|0|1|_bss|<<FEND>>|0|.bss|All-files|<<FEND>>|0|.bss.*|All-files|<<FEND>>|0|COMMON|All-files|<<FEND>>|0|B|All-files|<<FEND>>|0|B_1|All-files|<<FEND>>|0|B_2|All-files|<<FEND>>|1|_ebss|<<FEND>>|1|_end|<<FEND>>|<<CEND>>|<<GEND>>] " 4 \r
+"[V|VERSION|2] [S|OUTPUTPATH|^"$(CONFIGDIR)\lib$(PROJECTNAME).a^"] [B|OPTIMIZE|1] [I|OPTTYPE|1] [S|MODE|BUILD/CHANGED] [S|CPUTYPE|RX600] [S|ENDIAN|LITTLE] [S|CPU|Other] [B|DOPROJBUILT|1] [B|DOOPTLIB|1] [B|MATH|1] [B|STDIO|1] [B|STDLIB|1] [B|STRING|1] " 1 \r
+"[V|VERSION|2] [S|OUTPUT|OBJECT] [S|OBJPATH|^"$(CONFIGDIR)\$(FILELEAF).o^"] [B|OPTIMIZE|0] [I|OPTLV|2] [B|DEBUG|1] [I|DEBUGLV|2] [S|DEBUGFT|Native] [S|DEFINES|DEBUG] [S|PROJECTTYPE|CAPPPROJECT] [S|CPUTYPE|RX600] [S|ENDIAN|LITTLE] [S|CPU|Other] [B|DOOPTLIB|1] [S|INCDIR|^"$(TCINSTALL)\rx-elf\rx-elf\optlibinc^"|^"$(TCINSTALL)\rx-elf\lib\gcc\rx-elf\4.5-GNURX_v10.02\optlibinc^"] [B|NOSTDINC|1] " 2 \r
+[EXCLUDED_FILES_Debug_RX600_E1_E20_SYSTEM]\r
+[LINKAGE_ORDER_Debug_RX600_E1_E20_SYSTEM]\r
+[GENERAL_DATA_CONFIGURATION_Debug_RX600_E1_E20_SYSTEM]\r
+[OPTIONS_Release_GNU Assembler]\r
+"Assembly source file" "0e2d0de05744bc10" 3 \r
+[OPTIONS_Release_GNU Compiler]\r
+"C source file" "0e2d0de05744bc10" 2 \r
+"C++ source file" "0e2d0de05744bc10" 2 \r
+"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N_MDK_GNURX\RTOSDemo\GNU-Files\hwinit.c" "02a2a3fe5744bc10" 2 \r
+"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N_MDK_GNURX\RTOSDemo\GNU-Files\inthandler.c" "02a2a3fe5744bc10" 2 \r
+"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N_MDK_GNURX\RTOSDemo\GNU-Files\start.asm" "02a2a3fe5744bc10" 2 \r
+"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N_MDK_GNURX\RTOSDemo\main.c" "0cec443c5744bc10" 2 \r
+"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N_MDK_GNURX\RTOSDemo\vects.c" "0e2d0de05744bc10" 2 \r
+"Preprocess Assembly file" "0e2d0de05744bc10" 2 \r
+[OPTIONS_Release_GNU Library Generator]\r
+"Single Shot" "0e2d0de05744bc10" 1 \r
+[OPTIONS_Release_GNU Linker]\r
+"Single Shot" "015ee3fe5744bc10" 4 \r
+[OPTIONS_Release]\r
+"" 0 \r
+"[V|VERSION|2] [S|OBJPATH|^"$(CONFIGDIR)\$(FILELEAF).o^"] [I|DEBUGLV|0] [B|LINCHLS|1] [B|LINCASS|1] [B|LINCSYM|1] [S|LFILE|^"$(CONFIGDIR)\$(FILELEAF).^"] [S|PROJECTTYPE|CAPPPROJECT] [S|INCDIR|^"$(PROJDIR)^"] [S|CPUTYPE|RX600] [S|ENDIAN|LITTLE] [S|CPU|Other] " 3 \r
+"[V|VERSION|2] [S|OUTFORM|BOTH] [B|MFILEGEN|1] [S|PLMFILE|^"$(CONFIGDIR)\$(PROJECTNAME).map^"] [S|APPTXT|^"-e _start^"] [S|OUTFILE|^"$(CONFIGDIR)\$(PROJECTNAME).x^"] [B|RSARCH|1] [B|OPTMEM|1] [B|ODEBSYM|1] [B|FIXUPLIBS|1] [B|SUBCOMMAND|0] [S|PROJECTTYPE|CAPPPROJECT] [S|ENDIAN|LITTLE] [S|CPUTYPE|RX600] [S|CPU|Other] [B|DOOPTLIB|1] [B|DOPROJBUILT|1] [S|ARCHIVE|libRTOSDemo.a*libgcc.a] [S|INCDIR|^"$(TCINSTALL)\rx-elf\lib\gcc\rx-elf\4.5-GNURX_v10.02^"|^"$(CONFIGDIR)^"] [S|GROUPDET|.fvectors|0|0||1|0xFFFFFF80|0|1|0|.fvectors|All-files|<<FEND>>|<<CEND>>|<<GEND>>|.text|0|0||1|0xFFFF8000|0|0|0|.text|All-files|<<FEND>>|0|.text.*|All-files|<<FEND>>|0|P|All-files|<<FEND>>|1|etext|<<FEND>>|<<CEND>>|<<GEND>>|.rvectors|0|0||0||0|1|1|_rvectors_start|<<FEND>>|0|.rvectors|All-files|<<FEND>>|1|_rvectors_end|<<FEND>>|<<CEND>>|<<GEND>>|.init|0|0||0||0|0|0|.init|All-files|<<FEND>>|<<CEND>>|<<GEND>>|.fini|0|0||0||0|0|0|.fini|All-files|<<FEND>>|<<CEND>>|<<GEND>>|.got|0|0||0||0|0|0|.got|All-files|<<FEND>>|0|.got.plt|All-files|<<FEND>>|<<CEND>>|<<GEND>>|.rodata|0|0||0||0|0|0|.rodata|All-files|<<FEND>>|0|.rodata.*|All-files|<<FEND>>|0|C_1|All-files|<<FEND>>|0|C_2|All-files|<<FEND>>|0|C|All-files|<<FEND>>|1|_erodata|<<FEND>>|<<CEND>>|<<GEND>>|.eh_frame_hdr|0|0||0||0|0|0|.eh_frame_hdr|All-files|<<FEND>>|<<CEND>>|<<GEND>>|.eh_frame|0|0||0||0|0|0|.eh_frame|All-files|<<FEND>>|<<CEND>>|<<GEND>>|.jcr|0|0||0||0|0|0|.jcr|All-files|<<FEND>>|<<CEND>>|<<GEND>>|.tors|0|0||0||0|0|1|__CTOR_LIST__|<<FEND>>|1|___ctors|<<FEND>>|0|.ctors|All-files|<<FEND>>|1|___ctors_end|<<FEND>>|1|__CTOR_END__|<<FEND>>|1|__DTOR_LIST__|<<FEND>>|1|___dtors|<<FEND>>|0|.dtors|All-files|<<FEND>>|1|___dtors_end|<<FEND>>|1|__DTOR_END__|<<FEND>>|1|_mdata|<<FEND>>|<<CEND>>|<<GEND>>|.istack|0|0||1|0x00001808|0|0|1|_istack|<<FEND>>|<<CEND>>|<<GEND>>|.ustack|0|0||1|0x00001708|0|0|1|_ustack|<<FEND>>|<<CEND>>|<<GEND>>|.data|0|2|_mdata|1|0x00001001|0|0|1|_data|<<FEND>>|0|.data|All-files|<<FEND>>|0|.data.*|All-files|<<FEND>>|0|D|All-files|<<FEND>>|0|D_1|All-files|<<FEND>>|0|D_2|All-files|<<FEND>>|1|_edata|<<FEND>>|<<CEND>>|<<GEND>>|.gcc_exc|0|0||0||0|0|0|.gcc_exc|All-files|<<FEND>>|<<CEND>>|<<GEND>>|.bss|0|0||0||0|0|1|_bss|<<FEND>>|0|.bss|All-files|<<FEND>>|0|.bss.*|All-files|<<FEND>>|0|COMMON|All-files|<<FEND>>|0|B|All-files|<<FEND>>|0|B_1|All-files|<<FEND>>|0|B_2|All-files|<<FEND>>|1|_ebss|<<FEND>>|1|_end|<<FEND>>|<<CEND>>|<<GEND>>] " 4 \r
+"[V|VERSION|2] [S|OUTPUTPATH|^"$(CONFIGDIR)\lib$(PROJECTNAME).a^"] [B|OPTIMIZE|1] [I|OPTTYPE|1] [S|MODE|BUILD/CHANGED] [S|CPUTYPE|RX600] [S|ENDIAN|LITTLE] [S|CPU|Other] [B|DOPROJBUILT|1] [B|DOOPTLIB|1] [B|MATH|1] [B|STDIO|1] [B|STDLIB|1] [B|STRING|1] " 1 \r
+"[V|VERSION|2] [S|OUTPUT|OBJECT] [S|OBJPATH|^"$(CONFIGDIR)\$(FILELEAF).o^"] [B|OPTIMIZE|1] [I|OPTLV|2] [B|DEBUG|0] [I|DEBUGLV|2] [S|DEBUGFT|Native] [S|DEFINES|RELEASE] [S|PROJECTTYPE|CAPPPROJECT] [S|CPUTYPE|RX600] [S|ENDIAN|LITTLE] [S|CPU|Other] [B|DOOPTLIB|1] [S|INCDIR|^"$(TCINSTALL)\rx-elf\rx-elf\optlibinc^"|^"$(TCINSTALL)\rx-elf\lib\gcc\rx-elf\4.5-GNURX_v10.02\optlibinc^"] [B|NOSTDINC|1] " 2 \r
+[EXCLUDED_FILES_Release]\r
+[LINKAGE_ORDER_Release]\r
+[GENERAL_DATA_CONFIGURATION_Release]\r
+[GENERAL_DATA_CONFIGURATION_SESSION_Debug_DefaultSession]\r
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+"MEMORY_MAPPING_OPTIONS" "" \r
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+[SESSION_DATA_CONFIGURATION_SESSION_Debug_SessionRX600_E1_E20_SYSTEM]\r
+"MEMORY_MAPPING_OPTIONS" "Unknown Options" \r
+[GENERAL_DATA_CONFIGURATION_SESSION_Debug_RX600_E1_E20_SYSTEM_DefaultSession]\r
+[SESSION_DATA_CONFIGURATION_SESSION_Debug_RX600_E1_E20_SYSTEM_DefaultSession]\r
+"MEMORY_MAPPING_OPTIONS" "" \r
+[GENERAL_DATA_CONFIGURATION_SESSION_Debug_RX600_E1_E20_SYSTEM_SessionRX600_E1_E20_SYSTEM]\r
+[SESSION_DATA_CONFIGURATION_SESSION_Debug_RX600_E1_E20_SYSTEM_SessionRX600_E1_E20_SYSTEM]\r
+"MEMORY_MAPPING_OPTIONS" "Unknown Options" \r
+[GENERAL_DATA_CONFIGURATION_SESSION_Release_DefaultSession]\r
+[SESSION_DATA_CONFIGURATION_SESSION_Release_DefaultSession]\r
+"MEMORY_MAPPING_OPTIONS" "" \r
+[GENERAL_DATA_CONFIGURATION_SESSION_Release_SessionRX600_E1_E20_SYSTEM]\r
+[SESSION_DATA_CONFIGURATION_SESSION_Release_SessionRX600_E1_E20_SYSTEM]\r
+"MEMORY_MAPPING_OPTIONS" "Unknown Options" \r
+[EXT_DEBUGGER_INFO]\r
+0 "" "" "" "" \r
+[END]\r
--- /dev/null
+[HIMDBVersion]\r
+2.0\r
+[DATABASE_VERSION]\r
+"1.1" \r
+[SESSIONS_]\r
+"DefaultSession" \r
+"SessionRX600_E1_E20_SYSTEM" \r
+[CONFIGURATIONS]\r
+"Debug" \r
+"Debug_RX600_E1_E20_SYSTEM" \r
+"Release" \r
+[CURRENT_CONFIGURATION]\r
+"Debug" \r
+[CURRENT_SESSION]\r
+"DefaultSession" \r
+[GENERAL_DATA_PROJECT]\r
+[GENERAL_DATA_CONFIGURATION_Debug]\r
+"PROJECT_FILES_MODIFIED_DATA_TAG" "FALSE" \r
+[SESSIONS_Debug]\r
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+"DefaultSession" \r
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+"DefaultSession" \r
+"SessionRX600_E1_E20_SYSTEM" \r
+[GENERAL_DATA_CONFIGURATION_SESSION_Release_SessionRX600_E1_E20_SYSTEM]\r
+[GENERAL_DATA_SESSION_DefaultSession]\r
+[GENERAL_DATA_CONFIGURATION_SESSION_Debug_RX600_E1_E20_SYSTEM_SessionRX600_E1_E20_SYSTEM]\r
+[GENERAL_DATA_CONFIGURATION_SESSION_Debug_DefaultSession]\r
+[GENERAL_DATA_CONFIGURATION_SESSION_Debug_RX600_E1_E20_SYSTEM_DefaultSession]\r
+[GENERAL_DATA_CONFIGURATION_SESSION_Debug_SessionRX600_E1_E20_SYSTEM]\r
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+[GENERAL_DATA_SESSION_SessionRX600_E1_E20_SYSTEM]\r
+[END]\r
--- /dev/null
+[HIMDBVersion]\r
+2.0\r
+[DATABASE_VERSION]\r
+"2.3" \r
+[SESSION_DETAILS]\r
+"" \r
+[INFORMATION]\r
+"" \r
+[GENERAL_DATA]\r
+"RESET_CPU_AFTER_DOWNLOAD_TAG" "VARIANT_TRUE_STORE_TAG" \r
+[LANGUAGE]\r
+"English" \r
+[CONFIG_INFO_VD1]\r
+0 \r
+[CONFIG_INFO_VD2]\r
+0 \r
+[CONFIG_INFO_VD3]\r
+0 \r
+[CONFIG_INFO_VD4]\r
+0 \r
+[WINDOW_POSITION_STATE_DATA_VD1]\r
+[WINDOW_POSITION_STATE_DATA_VD2]\r
+[WINDOW_POSITION_STATE_DATA_VD3]\r
+[WINDOW_POSITION_STATE_DATA_VD4]\r
+[WINDOW_Z_ORDER]\r
+[TARGET_NAME]\r
+"RX600 E1/E20 SYSTEM" "" 0 \r
+[STATUSBAR_STATEINFO_VD1]\r
+"MasterShowState" 1 \r
+"ApplicationShowState" 1 \r
+"DebuggerShowState" 1 \r
+[STATUSBAR_STATEINFO_VD2]\r
+"MasterShowState" 1 \r
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+"DebuggerShowState" 1 \r
+[STATUSBAR_DEBUGGER_PANESTATE_VD1]\r
+[STATUSBAR_DEBUGGER_PANESTATE_VD2]\r
+[STATUSBAR_DEBUGGER_PANESTATE_VD3]\r
+[STATUSBAR_DEBUGGER_PANESTATE_VD4]\r
+[DEBUGGER_OPTIONS]\r
+"Unknown Options" \r
+[DOWNLOAD_MODULES]\r
+"$(CONFIGDIR)\$(PROJECTNAME).x" 0 "Elf/Dwarf2_KPIT" 0 0 1 0 \r
+[CONNECT_ON_GO]\r
+"FALSE" \r
+[DOWNLOAD_MODULES_AFTER_BUILD]\r
+"TRUE" \r
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+"TRUE" \r
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+"FALSE" \r
+[LIMIT_DISASSEMBLY_MEMORY_ACCESS]\r
+"FALSE" \r
+[DISABLE_MEMORY_ACCESS_DURING_EXECUTION]\r
+"FALSE" \r
+[DEBUGGER_OPTIONS_PROPERTIES]\r
+"1" \r
+[COMMAND_FILES]\r
+[DEFAULT_DEBUG_FORMAT]\r
+"" \r
+[FLASH_DETAILS]\r
+"" 0 0 "" 0 "" 0 0 "" 0 0 0 0 0 0 0 "" "" "" "" "" \r
+[BREAKPOINTS]\r
+[END]\r
--- /dev/null
+/***********************************************************************/\r
+/* */\r
+/* FILE :inthandler.h */\r
+/* DATE :Wed, Aug 25, 2010 */\r
+/* DESCRIPTION :Interrupt Handler Declarations */\r
+/* CPU TYPE :Other */\r
+/* */\r
+/* This file is generated by KPIT GNU Project Generator. */\r
+/* */\r
+/***********************************************************************/\r
+ \r
+\r
+\r
+#ifndef INTHANDLER_H\r
+#define INTHANDLER_H\r
+\r
+// Exception(Supervisor Instruction)\r
+void INT_Excep_SuperVisorInst(void) __attribute__ ((interrupt));\r
+\r
+// Exception(Undefined Instruction)\r
+void INT_Excep_UndefinedInst(void) __attribute__ ((interrupt));\r
+\r
+// Exception(Floating Point)\r
+void INT_Excep_FloatingPoint(void) __attribute__ ((interrupt));\r
+\r
+// NMI\r
+void INT_NonMaskableInterrupt(void) __attribute__ ((interrupt));\r
+\r
+// Dummy\r
+void Dummy (void) __attribute__ ((interrupt));\r
+\r
+// BRK\r
+void INT_Excep_BRK(void) __attribute__ ((interrupt));\r
+\r
+// vector 1 reserved\r
+// vector 2 reserved\r
+// vector 3 reserved\r
+// vector 4 reserved\r
+// vector 5 reserved\r
+// vector 6 reserved\r
+// vector 7 reserved\r
+// vector 8 reserved\r
+// vector 9 reserved\r
+// vector 10 reserved\r
+// vector 11 reserved\r
+// vector 12 reserved\r
+// vector 13 reserved\r
+// vector 14 reserved\r
+// vector 15 reserved\r
+\r
+// BUSERR\r
+\r
+void INT_Excep_BUSERR(void) __attribute__ ((interrupt));\r
+\r
+// vector 17 reserved\r
+// vector 18 reserved\r
+// vector 19 reserved\r
+// vector 20 reserved\r
+\r
+// FCU_FCUERR\r
+\r
+void INT_Excep_FCU_FCUERR(void) __attribute__ ((interrupt));\r
+\r
+// vector 22 reserved\r
+\r
+// FCU_FRDYI\r
+\r
+void INT_Excep_FCU_FRDYI(void) __attribute__ ((interrupt));\r
+\r
+// vector 24 reserved\r
+// vector 25 reserved\r
+// vector 26 reserved\r
+// vector 27 reserved\r
+\r
+// CMTU0_CMT0\r
+\r
+void INT_Excep_CMTU0_CMT0(void) __attribute__ ((interrupt));\r
+\r
+// CMTU0_CMT1\r
+\r
+void INT_Excep_CMTU0_CMT1(void) __attribute__ ((interrupt));\r
+\r
+// CMTU1_CMT2\r
+\r
+void INT_Excep_CMTU1_CMT2(void) __attribute__ ((interrupt));\r
+\r
+// CMTU1_CMT3\r
+\r
+void INT_Excep_CMTU1_CMT3(void) __attribute__ ((interrupt));\r
+\r
+// vector 32 reserved\r
+// vector 33 reserved\r
+// vector 34 reserved\r
+// vector 35 reserved\r
+// vector 36 reserved\r
+// vector 37 reserved\r
+// vector 38 reserved\r
+// vector 39 reserved\r
+// vector 40 reserved\r
+// vector 41 reserved\r
+// vector 42 reserved\r
+// vector 43 reserved\r
+// vector 44 reserved\r
+// vector 45 reserved\r
+// vector 46 reserved\r
+// vector 47 reserved\r
+// vector 48 reserved\r
+// vector 49 reserved\r
+// vector 50 reserved\r
+// vector 51 reserved\r
+// vector 52 reserved\r
+// vector 53 reserved\r
+// vector 54 reserved\r
+// vector 55 reserved\r
+// vector 56 reserved\r
+// vector 57 reserved\r
+// vector 58 reserved\r
+// vector 59 reserved\r
+// vector 60 reserved\r
+// vector 61 reserved\r
+// vector 62 reserved\r
+// vector 63 reserved\r
+\r
+// IRQ0\r
+\r
+void INT_Excep_IRQ0(void) __attribute__ ((interrupt));\r
+\r
+// IRQ1\r
+\r
+void INT_Excep_IRQ1(void) __attribute__ ((interrupt));\r
+\r
+// IRQ2\r
+\r
+void INT_Excep_IRQ2(void) __attribute__ ((interrupt));\r
+\r
+// IRQ3\r
+\r
+void INT_Excep_IRQ3(void) __attribute__ ((interrupt));\r
+\r
+// IRQ4\r
+\r
+void INT_Excep_IRQ4(void) __attribute__ ((interrupt));\r
+\r
+// IRQ5\r
+\r
+void INT_Excep_IRQ5(void) __attribute__ ((interrupt));\r
+\r
+// IRQ6\r
+\r
+void INT_Excep_IRQ6(void) __attribute__ ((interrupt));\r
+\r
+// IRQ7\r
+\r
+void INT_Excep_IRQ7(void) __attribute__ ((interrupt));\r
+\r
+// IRQ8\r
+\r
+void INT_Excep_IRQ8(void) __attribute__ ((interrupt));\r
+\r
+// IRQ9\r
+\r
+void INT_Excep_IRQ9(void) __attribute__ ((interrupt));\r
+\r
+// IRQ10\r
+\r
+void INT_Excep_IRQ10(void) __attribute__ ((interrupt));\r
+\r
+// IRQ11\r
+\r
+void INT_Excep_IRQ11(void) __attribute__ ((interrupt));\r
+\r
+// IRQ12\r
+\r
+void INT_Excep_IRQ12(void) __attribute__ ((interrupt));\r
+\r
+// IRQ13\r
+\r
+void INT_Excep_IRQ13(void) __attribute__ ((interrupt));\r
+\r
+// IRQ14\r
+\r
+void INT_Excep_IRQ14(void) __attribute__ ((interrupt));\r
+\r
+// IRQ15\r
+\r
+void INT_Excep_IRQ15(void) __attribute__ ((interrupt));\r
+\r
+// vector 80 reserved\r
+// vector 81 reserved\r
+// vector 82 reserved\r
+// vector 83 reserved\r
+// vector 84 reserved\r
+// vector 85 reserved\r
+// vector 86 reserved\r
+// vector 87 reserved\r
+// vector 88 reserved\r
+// vector 89 reserved\r
+// vector 90 reserved\r
+// vector 91 reserved\r
+// vector 92 reserved\r
+// vector 93 reserved\r
+// vector 94 reserved\r
+// vector 95 reserved\r
+\r
+// WDT_WOVI\r
+\r
+void INT_Excep_WDT_WOVI(void) __attribute__ ((interrupt));\r
+\r
+// vector 97 reserved\r
+\r
+// AD0_ADI0\r
+\r
+void INT_Excep_AD0_ADI0(void) __attribute__ ((interrupt));\r
+\r
+// AD1_ADI1\r
+\r
+void INT_Excep_AD1_ADI1(void) __attribute__ ((interrupt));\r
+\r
+// AD2_ADI2\r
+\r
+void INT_Excep_AD2_ADI2(void) __attribute__ ((interrupt));\r
+\r
+// AD3_ADI3\r
+\r
+void INT_Excep_AD3_ADI3(void) __attribute__ ((interrupt));\r
+\r
+// vector 102 reserved\r
+// vector 103 reserved\r
+\r
+// TPU0_TGI0A\r
+\r
+void INT_Excep_TPU0_TGI0A(void) __attribute__ ((interrupt));\r
+\r
+// TPU0_TGI0B\r
+\r
+void INT_Excep_TPU0_TGI0B(void) __attribute__ ((interrupt));\r
+\r
+// TPU0_TGI0C\r
+\r
+void INT_Excep_TPU0_TGI0C(void) __attribute__ ((interrupt));\r
+\r
+// TPU0_TGI0D\r
+\r
+void INT_Excep_TPU0_TGI0D(void) __attribute__ ((interrupt));\r
+\r
+// TPU0_TCI0V\r
+\r
+void INT_Excep_TPU0_TCI0V(void) __attribute__ ((interrupt));\r
+\r
+// vector 109 reserved\r
+// vector 110 reserved\r
+\r
+// TPU1_TGI1A\r
+\r
+void INT_Excep_TPU1_TGI1A(void) __attribute__ ((interrupt));\r
+\r
+// TPU1_TGI1B\r
+\r
+void INT_Excep_TPU1_TGI1B(void) __attribute__ ((interrupt));\r
+\r
+// vector 113 reserved\r
+// vector 114 reserved\r
+\r
+// TPU1_TCI1V\r
+\r
+void INT_Excep_TPU1_TCI1V(void) __attribute__ ((interrupt));\r
+\r
+// TPU1_TCI1U\r
+\r
+void INT_Excep_TPU1_TCI1U(void) __attribute__ ((interrupt));\r
+\r
+// TPU2_TGI2A\r
+\r
+void INT_Excep_TPU2_TGI2A(void) __attribute__ ((interrupt));\r
+\r
+// TPU2_TGI2B\r
+\r
+void INT_Excep_TPU2_TGI2B(void) __attribute__ ((interrupt));\r
+\r
+// vector 119 reserved\r
+\r
+// TPU2_TCI2V\r
+\r
+void INT_Excep_TPU2_TCI2V(void) __attribute__ ((interrupt));\r
+\r
+// TPU2_TCI2U\r
+\r
+void INT_Excep_TPU2_TCI2U(void) __attribute__ ((interrupt));\r
+\r
+// TPU3_TGI3A\r
+\r
+void INT_Excep_TPU3_TGI3A(void) __attribute__ ((interrupt));\r
+\r
+// TPU3_TGI3B\r
+\r
+void INT_Excep_TPU3_TGI3B(void) __attribute__ ((interrupt));\r
+\r
+// TPU3_TGI3C\r
+\r
+void INT_Excep_TPU3_TGI3C(void) __attribute__ ((interrupt));\r
+\r
+// TPU3_TGI3D\r
+\r
+void INT_Excep_TPU3_TGI3D(void) __attribute__ ((interrupt));\r
+\r
+// TPU3_TCI3V\r
+\r
+void INT_Excep_TPU3_TCI3V(void) __attribute__ ((interrupt));\r
+\r
+// TPU4_TGI4A\r
+\r
+void INT_Excep_TPU4_TGI4A(void) __attribute__ ((interrupt));\r
+\r
+// TPU4_TGI4B\r
+\r
+void INT_Excep_TPU4_TGI4B(void) __attribute__ ((interrupt));\r
+\r
+// vector 129 reserved\r
+// vector 130 reserved\r
+\r
+// TPU4_TCI4V\r
+\r
+void INT_Excep_TPU4_TCI4V(void) __attribute__ ((interrupt));\r
+\r
+// TPU4_TCI4U\r
+\r
+void INT_Excep_TPU4_TCI4U(void) __attribute__ ((interrupt));\r
+\r
+// TPU5_TGI5A\r
+\r
+void INT_Excep_TPU5_TGI5A(void) __attribute__ ((interrupt));\r
+\r
+// TPU5_TGI5B\r
+\r
+void INT_Excep_TPU5_TGI5B(void) __attribute__ ((interrupt));\r
+\r
+// vector 135 reserved\r
+\r
+// TPU5_TCI5V\r
+\r
+void INT_Excep_TPU5_TCI5V(void) __attribute__ ((interrupt));\r
+\r
+// TPU5_TCI5U\r
+\r
+void INT_Excep_TPU5_TCI5U(void) __attribute__ ((interrupt));\r
+\r
+// TPU6_TGI6A\r
+\r
+void INT_Excep_TPU6_TGI6A(void) __attribute__ ((interrupt));\r
+\r
+// TPU6_TGI6B\r
+\r
+void INT_Excep_TPU6_TGI6B(void) __attribute__ ((interrupt));\r
+\r
+// TPU6_TGI6C\r
+\r
+void INT_Excep_TPU6_TGI6C(void) __attribute__ ((interrupt));\r
+\r
+// TPU6_TGI6D\r
+\r
+void INT_Excep_TPU6_TGI6D(void) __attribute__ ((interrupt));\r
+\r
+// TPU6_TCI6V\r
+\r
+void INT_Excep_TPU6_TCI6V(void) __attribute__ ((interrupt));\r
+\r
+// vector 143 reserved\r
+// vector 144 reserved\r
+\r
+// TPU7_TGI7A\r
+\r
+void INT_Excep_TPU7_TGI7A(void) __attribute__ ((interrupt));\r
+\r
+// TPU7_TGI7B\r
+\r
+void INT_Excep_TPU7_TGI7B(void) __attribute__ ((interrupt));\r
+\r
+// vector 147 reserved\r
+// vector 148 reserved\r
+\r
+// TPU7_TCI7V\r
+\r
+void INT_Excep_TPU7_TCI7V(void) __attribute__ ((interrupt));\r
+\r
+// TPU7_TCI7U\r
+\r
+void INT_Excep_TPU7_TCI7U(void) __attribute__ ((interrupt));\r
+\r
+// TPU8_TGI8A\r
+\r
+void INT_Excep_TPU8_TGI8A(void) __attribute__ ((interrupt));\r
+\r
+// TPU8_TGI8B\r
+\r
+void INT_Excep_TPU8_TGI8B(void) __attribute__ ((interrupt));\r
+\r
+// vector 153 reserved\r
+\r
+// TPU8_TCI8V\r
+\r
+void INT_Excep_TPU8_TCI8V(void) __attribute__ ((interrupt));\r
+\r
+// TPU8_TCI8U\r
+\r
+void INT_Excep_TPU8_TCI8U(void) __attribute__ ((interrupt));\r
+\r
+// TPU9_TGI9A\r
+\r
+void INT_Excep_TPU9_TGI9A(void) __attribute__ ((interrupt));\r
+\r
+// TPU9_TGI9B\r
+\r
+void INT_Excep_TPU9_TGI9B(void) __attribute__ ((interrupt));\r
+\r
+// TPU9_TGI9C\r
+\r
+void INT_Excep_TPU9_TGI9C(void) __attribute__ ((interrupt));\r
+\r
+// TPU9_TGI9D\r
+\r
+void INT_Excep_TPU9_TGI9D(void) __attribute__ ((interrupt));\r
+\r
+// TPU9_TCI9V\r
+\r
+void INT_Excep_TPU9_TCI9V(void) __attribute__ ((interrupt));\r
+\r
+// TPU10_TGI10A\r
+\r
+void INT_Excep_TPU10_TGI10A(void) __attribute__ ((interrupt));\r
+\r
+// TPU10_TGI10B\r
+\r
+void INT_Excep_TPU10_TGI10B(void) __attribute__ ((interrupt));\r
+\r
+// vector 163 reserved\r
+// vector 164 reserved\r
+\r
+// TPU10_TCI10V\r
+\r
+void INT_Excep_TPU10_TCI10V(void) __attribute__ ((interrupt));\r
+\r
+// TPU10_TCI10U\r
+\r
+void INT_Excep_TPU10_TCI10U(void) __attribute__ ((interrupt));\r
+\r
+// TPU11_TGI11A\r
+\r
+void INT_Excep_TPU11_TGI11A(void) __attribute__ ((interrupt));\r
+\r
+// TPU11_TGI11B\r
+\r
+void INT_Excep_TPU11_TGI11B(void) __attribute__ ((interrupt));\r
+\r
+// vector 169 reserved\r
+\r
+// TPU11_TCI11V\r
+\r
+void INT_Excep_TPU11_TCI11V(void) __attribute__ ((interrupt));\r
+\r
+// TPU11_TCI11U\r
+\r
+void INT_Excep_TPU11_TCI11U(void) __attribute__ ((interrupt));\r
+\r
+// vector 172 reserved\r
+// vector 173 reserved\r
+\r
+// TMR0_CMI0A\r
+\r
+void INT_Excep_TMR0_CMI0A(void) __attribute__ ((interrupt));\r
+\r
+// TMR0_CMI0B\r
+\r
+void INT_Excep_TMR0_CMI0B(void) __attribute__ ((interrupt));\r
+\r
+// TMR0_OV0I\r
+\r
+void INT_Excep_TMR0_OV0I(void) __attribute__ ((interrupt));\r
+\r
+// TMR1_CMI1A\r
+\r
+void INT_Excep_TMR1_CMI1A(void) __attribute__ ((interrupt));\r
+\r
+// TMR1_CMI1B\r
+\r
+void INT_Excep_TMR1_CMI1B(void) __attribute__ ((interrupt));\r
+\r
+// TMR1_OV1I\r
+\r
+void INT_Excep_TMR1_OV1I(void) __attribute__ ((interrupt));\r
+\r
+// TMR2_CMI2A\r
+\r
+void INT_Excep_TMR2_CMI2A(void) __attribute__ ((interrupt));\r
+\r
+// TMR2_CMI2B\r
+\r
+void INT_Excep_TMR2_CMI2B(void) __attribute__ ((interrupt));\r
+\r
+// TMR2_OV2I\r
+\r
+void INT_Excep_TMR2_OV2I(void) __attribute__ ((interrupt));\r
+\r
+// TMR3_CMI3A\r
+\r
+void INT_Excep_TMR3_CMI3A(void) __attribute__ ((interrupt));\r
+\r
+// TMR3_CMI3B\r
+\r
+void INT_Excep_TMR3_CMI3B(void) __attribute__ ((interrupt));\r
+\r
+// TMR3_OV3I\r
+\r
+void INT_Excep_TMR3_OV3I(void) __attribute__ ((interrupt));\r
+\r
+// vector 186 reserved\r
+// vector 187 reserved\r
+// vector 188 reserved\r
+// vector 189 reserved\r
+// vector 190 reserved\r
+// vector 191 reserved\r
+// vector 192 reserved\r
+// vector 193 reserved\r
+// vector 194 reserved\r
+// vector 195 reserved\r
+// vector 196 reserved\r
+// vector 197 reserved\r
+\r
+// DMAC_DMTEND0\r
+\r
+void INT_Excep_DMAC_DMTEND0(void);\r
+\r
+// DMAC_DMTEND1\r
+\r
+void INT_Excep_DMAC_DMTEND1(void) __attribute__ ((interrupt));\r
+\r
+// DMAC_DMTEND2\r
+\r
+void INT_Excep_DMAC_DMTEND2(void) __attribute__ ((interrupt));\r
+\r
+// DMAC_DMTEND3\r
+\r
+void INT_Excep_DMAC_DMTEND3(void) __attribute__ ((interrupt));\r
+\r
+// vector 202 reserved\r
+// vector 203 reserved\r
+// vector 204 reserved\r
+// vector 205 reserved\r
+// vector 206 reserved\r
+// vector 207 reserved\r
+// vector 208 reserved\r
+// vector 209 reserved\r
+// vector 210 reserved\r
+// vector 211 reserved\r
+// vector 212 reserved\r
+// vector 213 reserved\r
+\r
+// SCI0_ERI0\r
+\r
+void INT_Excep_SCI0_ERI0(void) __attribute__ ((interrupt));\r
+\r
+// SCI0_RXI0\r
+\r
+void INT_Excep_SCI0_RXI0(void) __attribute__ ((interrupt));\r
+\r
+// SCI0_TXI0\r
+\r
+void INT_Excep_SCI0_TXI0(void) __attribute__ ((interrupt));\r
+\r
+// SCI0_TEI0\r
+\r
+void INT_Excep_SCI0_TEI0(void) __attribute__ ((interrupt));\r
+\r
+// SCI1_ERI1\r
+\r
+void INT_Excep_SCI1_ERI1(void) __attribute__ ((interrupt));\r
+\r
+// SCI1_RXI1\r
+\r
+void INT_Excep_SCI1_RXI1(void) __attribute__ ((interrupt));\r
+\r
+// SCI1_TXI1\r
+\r
+void INT_Excep_SCI1_TXI1(void) __attribute__ ((interrupt));\r
+\r
+// SCI1_TEI1\r
+\r
+void INT_Excep_SCI1_TEI1(void) __attribute__ ((interrupt));\r
+\r
+// SCI2_ERI2\r
+\r
+void INT_Excep_SCI2_ERI2(void) __attribute__ ((interrupt));\r
+\r
+// SCI2_RXI2\r
+\r
+void INT_Excep_SCI2_RXI2(void) __attribute__ ((interrupt));\r
+\r
+// SCI2_TXI2\r
+\r
+void INT_Excep_SCI2_TXI2(void) __attribute__ ((interrupt));\r
+\r
+// SCI2_TEI2\r
+\r
+void INT_Excep_SCI2_TEI2(void) __attribute__ ((interrupt));\r
+\r
+// SCI3_ERI3\r
+\r
+void INT_Excep_SCI3_ERI3(void) __attribute__ ((interrupt));\r
+\r
+// SCI3_RXI3\r
+\r
+void INT_Excep_SCI3_RXI3(void) __attribute__ ((interrupt));\r
+\r
+// SCI3_TXI3\r
+\r
+void INT_Excep_SCI3_TXI3(void) __attribute__ ((interrupt));\r
+\r
+// SCI3_TEI3\r
+\r
+void INT_Excep_SCI3_TEI3(void) __attribute__ ((interrupt));\r
+\r
+// SCI4_ERI4\r
+\r
+void INT_Excep_SCI4_ERI4(void) __attribute__ ((interrupt));\r
+\r
+// SCI4_RXI4\r
+\r
+void INT_Excep_SCI4_RXI4(void) __attribute__ ((interrupt));\r
+\r
+// SCI4_TXI4\r
+\r
+void INT_Excep_SCI4_TXI4(void) __attribute__ ((interrupt));\r
+\r
+// SCI4_TEI4\r
+\r
+void INT_Excep_SCI4_TEI4(void) __attribute__ ((interrupt));\r
+\r
+// SCI5_ERI5\r
+\r
+void INT_Excep_SCI5_ERI5(void) __attribute__ ((interrupt));\r
+\r
+// SCI5_RXI5\r
+\r
+void INT_Excep_SCI5_RXI5(void) __attribute__ ((interrupt));\r
+\r
+// SCI5_TXI5\r
+\r
+void INT_Excep_SCI5_TXI5(void) __attribute__ ((interrupt));\r
+\r
+// SCI5_TEI5\r
+\r
+void INT_Excep_SCI5_TEI5(void) __attribute__ ((interrupt));\r
+\r
+// SCI6_ERI6\r
+\r
+void INT_Excep_SCI6_ERI6(void) __attribute__ ((interrupt));\r
+\r
+// SCI6_RXI6\r
+\r
+void INT_Excep_SCI6_RXI6(void) __attribute__ ((interrupt));\r
+\r
+// SCI6_TXI6\r
+\r
+void INT_Excep_SCI6_TXI6(void) __attribute__ ((interrupt));\r
+\r
+// SCI6_TEI6\r
+\r
+void INT_Excep_SCI6_TEI6(void) __attribute__ ((interrupt));\r
+\r
+// vector 242 reserved\r
+// vector 243 reserved\r
+// vector 244 reserved\r
+// vector 245 reserved\r
+\r
+// RIIC0_EEI0\r
+\r
+void INT_Excep_RIIC0_EEI0(void) __attribute__ ((interrupt));\r
+\r
+// RIIC0_RXI0\r
+\r
+void INT_Excep_RIIC0_RXI0(void) __attribute__ ((interrupt));\r
+\r
+// RIIC0_TXI0\r
+\r
+void INT_Excep_RIIC0_TXI0(void) __attribute__ ((interrupt));\r
+\r
+// RIIC0_TEI0\r
+\r
+void INT_Excep_RIIC0_TEI0(void) __attribute__ ((interrupt));\r
+\r
+// RIIC1_EEI1\r
+\r
+void INT_Excep_RIIC1_EEI1(void) __attribute__ ((interrupt));\r
+\r
+// RIIC1_RXI1\r
+\r
+void INT_Excep_RIIC1_RXI1(void) __attribute__ ((interrupt));\r
+\r
+// RIIC1_TXI1\r
+\r
+void INT_Excep_RIIC1_TXI1(void) __attribute__ ((interrupt));\r
+\r
+// RIIC1_TEI1\r
+\r
+void INT_Excep_RIIC1_TEI1(void) __attribute__ ((interrupt));\r
+\r
+// vector 254 reserved\r
+// vector 255 reserved\r
+\r
+//;<<VECTOR DATA START (POWER ON RESET)>>\r
+//;Power On Reset PC\r
+extern void PowerON_Reset_PC(void) __attribute__ ((interrupt)); \r
+//;<<VECTOR DATA END (POWER ON RESET)>>\r
+\r
+#endif
\ No newline at end of file
--- /dev/null
+/***********************************************************************/\r
+/* */\r
+/* FILE :iodefine.h */\r
+/* DATE :Wed, Aug 25, 2010 */\r
+/* DESCRIPTION :Definition of I/O Register */\r
+/* CPU TYPE :Other */\r
+/* */\r
+/* This file is generated by KPIT GNU Project Generator. */\r
+/* */\r
+/***********************************************************************/\r
--- /dev/null
+/***********************************************************************/\r
+/* */\r
+/* FILE :typedefine.h */\r
+/* DATE :Wed, Aug 25, 2010 */\r
+/* DESCRIPTION :Aliases of Integer Type */\r
+/* CPU TYPE :Other */\r
+/* */\r
+/* This file is generated by KPIT GNU Project Generator. */\r
+/* */\r
+/***********************************************************************/\r
+ \r
+ \r
+ \r
+typedef signed char _SBYTE;\r
+typedef unsigned char _UBYTE;\r
+typedef signed short _SWORD;\r
+typedef unsigned short _UWORD;\r
+typedef signed int _SINT;\r
+typedef unsigned int _UINT;\r
+typedef signed long _SDWORD;\r
+typedef unsigned long _UDWORD;\r
+typedef signed long long _SQWORD;\r
+typedef unsigned long long _UQWORD;\r
--- /dev/null
+/***********************************************************************/\r
+/* */\r
+/* FILE :RTOSDemo.c */\r
+/* DATE :Wed, Aug 25, 2010 */\r
+/* DESCRIPTION :Main Program */\r
+/* CPU TYPE :Other */\r
+/* */\r
+/* This file is generated by KPIT GNU Project Generator. */\r
+/* */\r
+/***********************************************************************/\r
+ \r
+ \r
+ \r
+#include "iodefine.h"\r
+\r
+#ifdef CPPAPP\r
+//Initialize global constructors\r
+extern "C" void __main()\r
+{\r
+ static int initialized;\r
+ if (! initialized)\r
+ {\r
+ typedef void (*pfunc) ();\r
+ extern pfunc __ctors[];\r
+ extern pfunc __ctors_end[];\r
+ pfunc *p;\r
+\r
+ initialized = 1;\r
+ for (p = __ctors_end; p > __ctors; )\r
+ (*--p) ();\r
+\r
+ }\r
+}\r
+#endif \r
+\r
+int main(void)\r
+{\r
+ // TODO: add application code here\r
+\r
+ while (1) {\r
+ }\r
+ return 0;\r
+}\r
--- /dev/null
+/***********************************************************************/\r
+/* */\r
+/* FILE :vects.c */\r
+/* DATE :Wed, Aug 25, 2010 */\r
+/* DESCRIPTION :Vector Table */\r
+/* CPU TYPE :Other */\r
+/* */\r
+/* This file is generated by KPIT GNU Project Generator. */\r
+/* */\r
+/***********************************************************************/\r
+ \r
+\r
+\r
+\r
+#include "inthandler.h"\r
+\r
+typedef void (*fp) (void);\r
+extern void start(void);\r
+extern void stack (void);\r
+\r
+#define FVECT_SECT __attribute__ ((section (".fvectors")))\r
+\r
+const fp HardwareVectors[] FVECT_SECT = {\r
+//;0xffffff80 Reserved\r
+ (fp)0,\r
+//;0xffffff84 Reserved\r
+ (fp)0,\r
+//;0xffffff88 Reserved\r
+ (fp)0,\r
+//;0xffffff8C Reserved\r
+ (fp)0,\r
+//;0xffffff90 Reserved\r
+ (fp)0,\r
+//;0xffffff94 Reserved\r
+ (fp)0,\r
+//;0xffffff98 Reserved\r
+ (fp)0,\r
+//;0xffffff9C Reserved\r
+ (fp)0,\r
+//;0xffffffA0 Reserved\r
+ (fp)0,\r
+//;0xffffffA4 Reserved\r
+ (fp)0,\r
+//;0xffffffA8 Reserved\r
+ (fp)0,\r
+//;0xffffffAC Reserved\r
+ (fp)0,\r
+//;0xffffffB0 Reserved\r
+ (fp)0,\r
+//;0xffffffB4 Reserved\r
+ (fp)0,\r
+//;0xffffffB8 Reserved\r
+ (fp)0,\r
+//;0xffffffBC Reserved\r
+ (fp)0,\r
+//;0xffffffC0 Reserved\r
+ (fp)0,\r
+//;0xffffffC4 Reserved\r
+ (fp)0,\r
+//;0xffffffC8 Reserved\r
+ (fp)0,\r
+//;0xffffffCC Reserved\r
+ (fp)0,\r
+//;0xffffffd0 Exception(Supervisor Instruction)\r
+ INT_Excep_SuperVisorInst,\r
+//;0xffffffd4 Reserved\r
+ (fp)0,\r
+//;0xffffffd8 Reserved\r
+ (fp)0,\r
+//;0xffffffdc Exception(Undefined Instruction)\r
+ INT_Excep_UndefinedInst,\r
+//;0xffffffe0 Reserved\r
+ (fp)0,\r
+//;0xffffffe4 Exception(Floating Point)\r
+ INT_Excep_FloatingPoint,\r
+//;0xffffffe8 Reserved\r
+ (fp)0,\r
+//;0xffffffec Reserved\r
+ (fp)0,\r
+//;0xfffffff0 Reserved\r
+ (fp)0,\r
+//;0xfffffff4 Reserved\r
+ (fp)0,\r
+//;0xfffffff8 NMI\r
+ INT_NonMaskableInterrupt,\r
+//;0xfffffffc RESET\r
+//;<<VECTOR DATA START (POWER ON RESET)>>\r
+//;Power On Reset PC\r
+ start \r
+//;<<VECTOR DATA END (POWER ON RESET)>>\r
+};\r
+\r
+#define RVECT_SECT __attribute__ ((section (".rvectors")))\r
+\r
+const fp RelocatableVectors[] RVECT_SECT = {\r
+//;0x0000 Reserved\r
+ (fp)0,\r
+//;0x0004 Reserved\r
+ (fp)0,\r
+//;0x0008 Reserved\r
+ (fp)0,\r
+//;0x000C Reserved\r
+ (fp)0,\r
+//;0x0010 Reserved\r
+ (fp)0,\r
+//;0x0014 Reserved\r
+ (fp)0,\r
+//;0x0018 Reserved\r
+ (fp)0,\r
+//;0x001C Reserved\r
+ (fp)0,\r
+//;0x0020 Reserved\r
+ (fp)0,\r
+//;0x0024 Reserved\r
+ (fp)0,\r
+//;0x0028 Reserved\r
+ (fp)0,\r
+//;0x002C Reserved\r
+ (fp)0,\r
+//;0x0030 Reserved\r
+ (fp)0,\r
+//;0x0034 Reserved\r
+ (fp)0,\r
+//;0x0038 Reserved\r
+ (fp)0,\r
+//;0x003C Reserved\r
+ (fp)0,\r
+//;0x0040 BUSERR\r
+ (fp)INT_Excep_BUSERR,\r
+//;0x0044 Reserved\r
+ (fp)0,\r
+//;0x0048 Reserved\r
+ (fp)0,\r
+//;0x004C Reserved\r
+ (fp)0,\r
+//;0x0050 Reserved\r
+ (fp)0,\r
+//;0x0054 FCUERR\r
+ (fp)INT_Excep_FCU_FCUERR,\r
+//;0x0058 Reserved\r
+ (fp)0,\r
+//;0x005C FRDYI\r
+ (fp)INT_Excep_FCU_FRDYI,\r
+//;0x0060 Reserved\r
+ (fp)0,\r
+//;0x0064 Reserved\r
+ (fp)0,\r
+//;0x0068 Reserved\r
+ (fp)0,\r
+//;0x006C Reserved\r
+ (fp)0,\r
+//;0x0070 CMTU0_CMT0\r
+ (fp)INT_Excep_CMTU0_CMT0,\r
+//;0x0074 CMTU0_CMT1\r
+ (fp)INT_Excep_CMTU0_CMT1,\r
+//;0x0078 CMTU1_CMT2\r
+ (fp)INT_Excep_CMTU1_CMT2,\r
+//;0x007C CMTU1_CMT3\r
+ (fp)INT_Excep_CMTU1_CMT3,\r
+//;0x0080 Reserved\r
+ (fp)0,\r
+//;0x0084 Reserved\r
+ (fp)0,\r
+//;0x0088 Reserved\r
+ (fp)0,\r
+//;0x008C Reserved\r
+ (fp)0,\r
+//;0x0090 Reserved\r
+ (fp)0,\r
+//;0x0094 Reserved\r
+ (fp)0,\r
+//;0x0098 Reserved\r
+ (fp)0,\r
+//;0x009C Reserved\r
+ (fp)0,\r
+//;0x00A0 Reserved\r
+ (fp)0,\r
+//;0x00A4 Reserved\r
+ (fp)0,\r
+//;0x00A8 Reserved\r
+ (fp)0,\r
+//;0x00AC Reserved\r
+ (fp)0,\r
+//;0x00B0 Reserved\r
+ (fp)0,\r
+//;0x00B4 Reserved\r
+ (fp)0,\r
+//;0x00B8 Reserved\r
+ (fp)0,\r
+//;0x00BC Reserved\r
+ (fp)0,\r
+//;0x00C0 Reserved\r
+ (fp)0,\r
+//;0x00C4 Reserved\r
+ (fp)0,\r
+//;0x00C8 Reserved\r
+ (fp)0,\r
+//;0x00CC Reserved\r
+ (fp)0,\r
+//;0x00D0 Reserved\r
+ (fp)0,\r
+//;0x00D4 Reserved\r
+ (fp)0,\r
+//;0x00D8 Reserved\r
+ (fp)0,\r
+//;0x00DC Reserved\r
+ (fp)0,\r
+//;0x00E0 Reserved\r
+ (fp)0,\r
+//;0x00E4 Reserved\r
+ (fp)0,\r
+//;0x00E8 Reserved\r
+ (fp)0,\r
+//;0x00EC Reserved\r
+ (fp)0,\r
+//;0x00F0 Reserved\r
+ (fp)0,\r
+//;0x00F4 Reserved\r
+ (fp)0,\r
+//;0x00F8 Reserved\r
+ (fp)0,\r
+//;0x00FC Reserved\r
+ (fp)0,\r
+//;0x0100 IRQ0\r
+ (fp)INT_Excep_IRQ0,\r
+//;0x0104 IRQ1\r
+ (fp)INT_Excep_IRQ1,\r
+//;0x0108 IRQ2\r
+ (fp)INT_Excep_IRQ2,\r
+//;0x010C IRQ3\r
+ (fp)INT_Excep_IRQ3,\r
+//;0x0110 IRQ4\r
+ (fp)INT_Excep_IRQ4,\r
+//;0x0114 IRQ5\r
+ (fp)INT_Excep_IRQ5,\r
+//;0x0118 IRQ6\r
+ (fp)INT_Excep_IRQ6,\r
+//;0x011C IRQ7\r
+ (fp)INT_Excep_IRQ7,\r
+//;0x0120 IRQ8\r
+ (fp)INT_Excep_IRQ8,\r
+//;0x0124 IRQ9\r
+ (fp)INT_Excep_IRQ9,\r
+//;0x0128 IRQ10\r
+ (fp)INT_Excep_IRQ10,\r
+//;0x012C IRQ11\r
+ (fp)INT_Excep_IRQ11,\r
+//;0x0130 IRQ12\r
+ (fp)INT_Excep_IRQ12,\r
+//;0x0134 IRQ13\r
+ (fp)INT_Excep_IRQ13,\r
+//;0x0138 IRQ14\r
+ (fp)INT_Excep_IRQ14,\r
+//;0x013C IRQ15\r
+ (fp)INT_Excep_IRQ15,\r
+//;0x0140 Reserved\r
+ (fp)0,\r
+//;0x0144 Reserved\r
+ (fp)0,\r
+//;0x0148 Reserved\r
+ (fp)0,\r
+//;0x014C Reserved\r
+ (fp)0,\r
+//;0x0150 Reserved\r
+ (fp)0,\r
+//;0x0154 Reserved\r
+ (fp)0,\r
+//;0x0158 Reserved\r
+ (fp)0,\r
+//;0x015C Reserved\r
+ (fp)0,\r
+//;0x0160 Reserved\r
+ (fp)0,\r
+//;0x0164 Reserved\r
+ (fp)0,\r
+//;0x0168 Reserved\r
+ (fp)0,\r
+//;0x016C Reserved\r
+ (fp)0,\r
+//;0x0170 Reserved\r
+ (fp)0,\r
+//;0x0174 Reserved\r
+ (fp)0,\r
+//;0x0178 Reserved\r
+ (fp)0,\r
+//;0x017C Reserved\r
+ (fp)0,\r
+//;0x0180 WDT_WOVI\r
+ (fp)INT_Excep_WDT_WOVI,\r
+//;0x0184 Reserved\r
+ (fp)0,\r
+//;0x0188 AD0_ADI0\r
+ (fp)INT_Excep_AD0_ADI0,\r
+//;0x018C AD1_ADI1\r
+ (fp)INT_Excep_AD1_ADI1,\r
+//;0x0190 AD2_ADI2\r
+ (fp)INT_Excep_AD2_ADI2,\r
+//;0x0194 AD3_ADI3\r
+ (fp)INT_Excep_AD3_ADI3,\r
+//;0x0198 Reserved\r
+ (fp)0,\r
+//;0x019C Reserved\r
+ (fp)0,\r
+//;0x01A0 TPU0_TGI0A\r
+ (fp)INT_Excep_TPU0_TGI0A,\r
+//;0x01A4 TPU0_TGI0B\r
+ (fp)INT_Excep_TPU0_TGI0B,\r
+//;0x01A8 TPU0_TGI0C\r
+ (fp)INT_Excep_TPU0_TGI0C,\r
+//;0x01AC TPU0_TGI0D\r
+ (fp)INT_Excep_TPU0_TGI0D,\r
+//;0x01B0 TPU0_TCI0V\r
+ (fp)INT_Excep_TPU0_TCI0V,\r
+//;0x01B4 Reserved\r
+ (fp)0,\r
+//;0x01B8 Reserved\r
+ (fp)0,\r
+//;0x01BC TPU1_TGI1A\r
+ (fp)INT_Excep_TPU1_TGI1A,\r
+//;0x01C0 TPU1_TGI1B\r
+ (fp)INT_Excep_TPU1_TGI1B,\r
+//;0x01C4 Reserved\r
+ (fp)0,\r
+//;0x01C8 Reserved\r
+ (fp)0,\r
+//;0x01CC TPU1_TCI1V\r
+ (fp)INT_Excep_TPU1_TCI1V,\r
+//;0x01D0 TPU1_TCI1U\r
+ (fp)INT_Excep_TPU1_TCI1U,\r
+//;0x01D4 TPU2_TGI2A\r
+ (fp)INT_Excep_TPU2_TGI2A,\r
+//;0x01D8 TPU2_TGI2B\r
+ (fp)INT_Excep_TPU2_TGI2B,\r
+//;0x01DC Reserved\r
+ (fp)0,\r
+//;0x01E0 TPU2_TCI2V\r
+ (fp)INT_Excep_TPU2_TCI2V,\r
+//;0x01E4 TPU2_TCI2U\r
+ (fp)INT_Excep_TPU2_TCI2U,\r
+//;0x01E8 TPU3_TGI3A\r
+ (fp)INT_Excep_TPU3_TGI3A,\r
+//;0x01EC TPU3_TGI3B\r
+ (fp)INT_Excep_TPU3_TGI3B,\r
+//;0x01F0 TPU3_TGI3C\r
+ (fp)INT_Excep_TPU3_TGI3C,\r
+//;0x01F4 TPU3_TGI3D\r
+ (fp)INT_Excep_TPU3_TGI3D,\r
+//;0x01F8 TPU3_TCI3V\r
+ (fp)INT_Excep_TPU3_TCI3V,\r
+//;0x01FC TPU4_TGI4A\r
+ (fp)INT_Excep_TPU4_TGI4A,\r
+//;0x0200 TPU4_TGI4B\r
+ (fp)INT_Excep_TPU4_TGI4B,\r
+//;0x0204 Reserved\r
+ (fp)0,\r
+//;0x0208 Reserved\r
+ (fp)0,\r
+//;0x020C TPU4_TCI4V\r
+ (fp)INT_Excep_TPU4_TCI4V,\r
+//;0x0210 TPU4_TCI4U\r
+ (fp)INT_Excep_TPU4_TCI4U,\r
+//;0x0214 TPU5_TGI5A\r
+ (fp)INT_Excep_TPU5_TGI5A,\r
+//;0x0218 TPU5_TGI5B\r
+ (fp)INT_Excep_TPU5_TGI5B,\r
+//;0x021C Reserved\r
+ (fp)0,\r
+//;0x0220 TPU5_TCI5V\r
+ (fp)INT_Excep_TPU5_TCI5V,\r
+//;0x0224 TPU5_TCI5U\r
+ (fp)INT_Excep_TPU5_TCI5U,\r
+//;0x0228 TPU6_TGI6A\r
+ (fp)INT_Excep_TPU6_TGI6A,\r
+//;0x022C TPU6_TGI6B\r
+ (fp)INT_Excep_TPU6_TGI6B,\r
+//;0x0230 TPU6_TGI6C\r
+ (fp)INT_Excep_TPU6_TGI6C,\r
+//;0x0234 TPU6_TGI6D\r
+ (fp)INT_Excep_TPU6_TGI6D,\r
+//;0x0238 TPU6_TCI6V\r
+ (fp)INT_Excep_TPU6_TCI6V,\r
+//;0x023C Reserved\r
+ (fp)0,\r
+//;0x0240 Reserved\r
+ (fp)0,\r
+//;0x0244 TPU7_TGI7A\r
+ (fp)INT_Excep_TPU7_TGI7A,\r
+//;0x0248 TPU7_TGI7B\r
+ (fp)INT_Excep_TPU7_TGI7B,\r
+//;0x024C Reserved\r
+ (fp)0,\r
+//;0x0250 Reserved\r
+ (fp)0,\r
+//;0x0254 TPU7_TCI7V\r
+ (fp)INT_Excep_TPU7_TCI7V,\r
+//;0x0258 TPU7_TCI7U\r
+ (fp)INT_Excep_TPU7_TCI7U,\r
+//;0x025C TPU8_TGI8A\r
+ (fp)INT_Excep_TPU8_TGI8A,\r
+//;0x0260 TPU8_TGI8B\r
+ (fp)INT_Excep_TPU8_TGI8B,\r
+//;0x0264 Reserved\r
+ (fp)0,\r
+//;0x0268 TPU8_TCI8V\r
+ (fp)INT_Excep_TPU8_TCI8V,\r
+//;0x026C TPU8_TCI8U\r
+ (fp)INT_Excep_TPU8_TCI8U,\r
+//;0x0270 TPU9_TGI9A\r
+ (fp)INT_Excep_TPU9_TGI9A,\r
+//;0x0274 TPU9_TGI9B\r
+ (fp)INT_Excep_TPU9_TGI9B,\r
+//;0x0278 TPU9_TGI9C\r
+ (fp)INT_Excep_TPU9_TGI9C,\r
+//;0x027C TPU9_TGI9D\r
+ (fp)INT_Excep_TPU9_TGI9D,\r
+//;0x0280 TPU9_TCI9V\r
+ (fp)INT_Excep_TPU9_TCI9V,\r
+//;0x0284 TPU10_TGI10A\r
+ (fp)INT_Excep_TPU10_TGI10A,\r
+//;0x0288 TPU10_TGI10B\r
+ (fp)INT_Excep_TPU10_TGI10B,\r
+//;0x028C Reserved\r
+ (fp)0,\r
+//;0x0290 Reserved\r
+ (fp)0,\r
+//;0x0294 TPU10_TCI10V\r
+ (fp)INT_Excep_TPU10_TCI10V,\r
+//;0x0298 TPU10_TCI10U\r
+ (fp)INT_Excep_TPU10_TCI10U,\r
+//;0x029C TPU11_TGI11A\r
+ (fp)INT_Excep_TPU11_TGI11A,\r
+//;0x02A0 TPU11_TGI11B\r
+ (fp)INT_Excep_TPU11_TGI11B,\r
+//;0x02A4 Reserved\r
+ (fp)0,\r
+//;0x02A8 TPU11_TCI11V\r
+ (fp)INT_Excep_TPU11_TCI11V,\r
+//;0x02AC TPU11_TCI11U\r
+ (fp)INT_Excep_TPU11_TCI11U,\r
+//;0x02B0 Reserved\r
+ (fp)0,\r
+//;0x02B4 Reserved\r
+ (fp)0,\r
+//;0x02B8 TMR0_CMI0A\r
+ (fp)INT_Excep_TMR0_CMI0A,\r
+//;0x02BC TMR0_CMI0B\r
+ (fp)INT_Excep_TMR0_CMI0B,\r
+//;0x02C0 TMR0_OV0I\r
+ (fp)INT_Excep_TMR0_OV0I,\r
+//;0x02C4 TMR1_CMI1A\r
+ (fp)INT_Excep_TMR1_CMI1A,\r
+//;0x02C8 TMR1_CMI1B\r
+ (fp)INT_Excep_TMR1_CMI1B,\r
+//;0x02CC TMR1_OV1I\r
+ (fp)INT_Excep_TMR1_OV1I,\r
+//;0x02D0 TMR2_CMI2A\r
+ (fp)INT_Excep_TMR2_CMI2A,\r
+//;0x02D4 TMR2_CMI2B\r
+ (fp)INT_Excep_TMR2_CMI2B,\r
+//;0x02D8 TMR2_OV2I\r
+ (fp)INT_Excep_TMR2_OV2I,\r
+//;0x02DC TMR3_CMI3A\r
+ (fp)INT_Excep_TMR3_CMI3A,\r
+//;0x02E0 TMR3_CMI3B\r
+ (fp)INT_Excep_TMR3_CMI3B,\r
+//;0x02E4 TMR3_OV3I\r
+ (fp)INT_Excep_TMR3_OV3I,\r
+//;0x02E8 Reserved\r
+ (fp)0,\r
+//;0x02EC Reserved\r
+ (fp)0,\r
+//;0x02F0 Reserved\r
+ (fp)0,\r
+//;0x02F4 Reserved\r
+ (fp)0,\r
+//;0x02F8 Reserved\r
+ (fp)0,\r
+//;0x02FC Reserved\r
+ (fp)0,\r
+//;0x0300 Reserved\r
+ (fp)0,\r
+//;0x0304 Reserved\r
+ (fp)0,\r
+//;0x0308 Reserved\r
+ (fp)0,\r
+//;0x030C Reserved\r
+ (fp)0,\r
+//;0x0310 Reserved\r
+ (fp)0,\r
+//;0x0314 Reserved\r
+ (fp)0,\r
+//;0x0318 DMAC_DMTEND0\r
+ (fp)INT_Excep_DMAC_DMTEND0,\r
+//;0x031C DMAC_DMTEND1\r
+ (fp)INT_Excep_DMAC_DMTEND1,\r
+//;0x0320 DMAC_DMTEND2\r
+ (fp)INT_Excep_DMAC_DMTEND2,\r
+//;0x0324 DMAC_DMTEND3\r
+ (fp)INT_Excep_DMAC_DMTEND3,\r
+//;0x0328 Reserved\r
+ (fp)0,\r
+//;0x032C Reserved\r
+ (fp)0,\r
+//;0x0330 Reserved\r
+ (fp)0,\r
+//;0x0334 Reserved\r
+ (fp)0,\r
+//;0x0338 Reserved\r
+ (fp)0,\r
+//;0x033C Reserved\r
+ (fp)0,\r
+//;0x0340 Reserved\r
+ (fp)0,\r
+//;0x0344 Reserved\r
+ (fp)0,\r
+//;0x0348 Reserved\r
+ (fp)0,\r
+//;0x034C Reserved\r
+ (fp)0,\r
+//;0x0350 Reserved\r
+ (fp)0,\r
+//;0x0354 Reserved\r
+ (fp)0,\r
+//;0x0358 SCI0_ERI0\r
+ (fp)INT_Excep_SCI0_ERI0,\r
+//;0x035C SCI0_RXI0\r
+ (fp)INT_Excep_SCI0_RXI0,\r
+//;0x0360 SCI0_TXI0\r
+ (fp)INT_Excep_SCI0_TXI0,\r
+//;0x0364 SCI0_TEI0\r
+ (fp)INT_Excep_SCI0_TEI0,\r
+//;0x0368 SCI1_ERI1\r
+ (fp)INT_Excep_SCI1_ERI1,\r
+//;0x036C SCI1_RXI1\r
+ (fp)INT_Excep_SCI1_RXI1,\r
+//;0x0370 SCI1_TXI1\r
+ (fp)INT_Excep_SCI1_TXI1,\r
+//;0x0374 SCI1_TEI1\r
+ (fp)INT_Excep_SCI1_TEI1,\r
+//;0x0378 SCI2_ERI2\r
+ (fp)INT_Excep_SCI2_ERI2,\r
+//;0x037C SCI2_RXI2\r
+ (fp)INT_Excep_SCI2_RXI2,\r
+//;0x0380 SCI2_TXI2\r
+ (fp)INT_Excep_SCI2_TXI2,\r
+//;0x0384 SCI2_TEI2\r
+ (fp)INT_Excep_SCI2_TEI2,\r
+//;0x0388 SCI3_ERI3\r
+ (fp)INT_Excep_SCI3_ERI3,\r
+//;0x038C SCI3_RXI3\r
+ (fp)INT_Excep_SCI3_RXI3,\r
+//;0x0390 SCI3_TXI3\r
+ (fp)INT_Excep_SCI3_TXI3,\r
+//;0x0394 SCI3_TEI3\r
+ (fp)INT_Excep_SCI3_TEI3,\r
+//;0x0398 SCI4_ERI4\r
+ (fp)INT_Excep_SCI4_ERI4,\r
+//;0x039C SCI4_RXI4\r
+ (fp)INT_Excep_SCI4_RXI4,\r
+//;0x03A0 SCI4_TXI4\r
+ (fp)INT_Excep_SCI4_TXI4,\r
+//;0x03A4 SCI4_TEI4\r
+ (fp)INT_Excep_SCI4_TEI4,\r
+//;0x03A8 SCI5_ERI5\r
+ (fp)INT_Excep_SCI5_ERI5,\r
+//;0x03AC SCI5_RXI5\r
+ (fp)INT_Excep_SCI5_RXI5,\r
+//;0x03B0 SCI5_TXI5\r
+ (fp)INT_Excep_SCI5_TXI5,\r
+//;0x03B4 SCI5_TEI5\r
+ (fp)INT_Excep_SCI5_TEI5,\r
+//;0x03B8 SCI6_ERI6\r
+ (fp)INT_Excep_SCI6_ERI6,\r
+//;0x03BC SCI6_RXI6\r
+ (fp)INT_Excep_SCI6_RXI6,\r
+//;0x03C0 SCI6_TXI6\r
+ (fp)INT_Excep_SCI6_TXI6,\r
+//;0x03C4 SCI6_TEI6\r
+ (fp)INT_Excep_SCI6_TEI6,\r
+//;0x03C8 Reserved\r
+ (fp)0,\r
+//;0x03CC Reserved\r
+ (fp)0,\r
+//;0x03D0 Reserved\r
+ (fp)0,\r
+//;0x03D4 Reserved\r
+ (fp)0,\r
+//;0x03D8 RIIC0_EEI0\r
+ (fp)INT_Excep_RIIC0_EEI0,\r
+//;0x03DC RIIC0_RXI0\r
+ (fp)INT_Excep_RIIC0_RXI0,\r
+//;0x03E0 RIIC0_TXI0\r
+ (fp)INT_Excep_RIIC0_TXI0,\r
+//;0x03E4 RIIC0_TEI0\r
+ (fp)INT_Excep_RIIC0_TEI0,\r
+//;0x03E8 RIIC1_EEI1\r
+ (fp)INT_Excep_RIIC1_EEI1,\r
+//;0x03EC RIIC1_RXI1\r
+ (fp)INT_Excep_RIIC1_RXI1,\r
+//;0x03F0 RIIC1_TXI1\r
+ (fp)INT_Excep_RIIC1_TXI1,\r
+//;0x03F4 RIIC1_TEI1\r
+ (fp)INT_Excep_RIIC1_TEI1,\r
+//;0x03F8 Reserved\r
+ (fp)0,\r
+//;0x03FC Reserved\r
+ (fp)0,\r
+};\r
--- /dev/null
+[Setting]\r
+ToolChain=0\r
--- /dev/null
+[HIMDBVersion]\r
+2.0\r
+[DATABASE_VERSION]\r
+"11.0" \r
+[WORKSPACE_DETAILS]\r
+"RX600_RX62N_MDK_GNURX" "C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N_MDK_GNURX" "C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N_MDK_GNURX\RX600_RX62N_MDK_GNURX.hws" "RX" "KPIT GNURX [ELF]" \r
+[SHARED_WORKSPACE_CONTROL_STATUS]\r
+"" "" "" \r
+"" "" "" \r
+[PROJECTS]\r
+"RTOSDemo" "C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N_MDK_GNURX\RTOSDemo" "C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N_MDK_GNURX\RTOSDemo\RTOSDemo.hwp" 0 \r
+[INFORMATION]\r
+"No workspace information available" \r
+[SCRAP]\r
+[PROJECT_DEPENDENCY]\r
+[WORKSPACE_PROPERTIES]\r
+[HELP_FILES]\r
+[GENERAL_DATA_PROJECT]\r
+[USERMENUTOOLS]\r
+[CUSTOMPLACEHOLDERS]\r
+[MAKEFILE_BUILD_INFO]\r
+"$(WORKSPDIR)\make\$(PROJECTNAME)_$(CONFIGNAME).mak" "" "$(WORKSPDIR)\make" 0 0 0 \r
+[VD_CONFIGURATION_OPTIONS]\r
+"ACTIVE_DESKTOP" "0" \r
+[VD_CONFIGURATIONS]\r
+"0" "Default1" "1" \r
+"1" "Default2" "1" \r
+"2" "Default3" "1" \r
+"3" "Default4" "1" \r
+[OPTIONS_DEBUG_TAB]\r
+0 0 0 0 0 \r
+[VCS]\r
+"" "" "" 0 \r
+[VCS_PROJECT]\r
+[MAKEFILE_ENV_STRINGS]\r
+[MAKEFILE_ENV_FLAGS]\r
+1 0 0 \r
+[MAKEFILE_CLEAN_INFO]\r
+"" \r
+[END]\r
--- /dev/null
+[HIMDBVersion]\r
+2.0\r
+[DATABASE_VERSION]\r
+"1.2" \r
+[CURRENT_PROJECT]\r
+"RTOSDemo" \r
+[GENERAL_DATA]\r
+[BREAKPOINTS]\r
+[OPEN_WORKSPACE_FILES]\r
+"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N_MDK_GNURX\RTOSDemo\GNU-Files\start.asm" \r
+"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N_MDK_GNURX\RTOSDemo\main.c" \r
+[WORKSPACE_FILE_STATES]\r
+"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N_MDK_GNURX\RTOSDemo\GNU-Files\start.asm" 0 0 1104 409 0 0 \r
+"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N_MDK_GNURX\RTOSDemo\main.c" -4 -23 1314 638 1 1 \r
+[LOADED_PROJECTS]\r
+"RTOSDemo" \r
+[END]\r
projects / freertos / commitdiff