-<EDKSYSTEM EDKVERSION="13.1" EDWVERSION="1.2" TIMESTAMP="Sat Aug 27 12:49:14 2011">
+<EDKSYSTEM EDKVERSION="13.1" EDWVERSION="1.2" TIMESTAMP="Sat Aug 27 15:05:40 2011">
<SYSTEMINFO ARCH="spartan6" DEVICE="xc6slx45t" PACKAGE="fgg484" PART="xc6slx45tfgg484-3" SOURCE="C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/system.xmp" SPEEDGRADE="-3"/>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="1" NAME="C_BASEFAMILY" TYPE="STRING" VALUE="spartan6">
<DESCRIPTION>Base Family</DESCRIPTION>
</PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="2" NAME="C_NUM_SLAVE_SLOTS" TYPE="INTEGER" VALUE="3">
+ <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="2" NAME="C_NUM_SLAVE_SLOTS" TYPE="INTEGER" VALUE="5">
<DESCRIPTION>Number of Slave Slots </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="3" NAME="C_NUM_MASTER_SLOTS" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Number of Master Slots </DESCRIPTION>
</PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="4" NAME="C_AXI_ID_WIDTH" TYPE="INTEGER" VALUE="2">
+ <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="4" NAME="C_AXI_ID_WIDTH" TYPE="INTEGER" VALUE="3">
<DESCRIPTION>AXI ID Widgth </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="5" NAME="C_AXI_ADDR_WIDTH" TYPE="INTEGER" VALUE="32">
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="12" NAME="C_M_AXI_BASE_ADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0xffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff0000000080000000">
<DESCRIPTION>Master AXI Base Address</DESCRIPTION>
</PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="13" NAME="C_M_AXI_HIGH_ADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000087ffffff">
+ <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="13" NAME="C_M_AXI_HIGH_ADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000807fffff">
<DESCRIPTION>Master AXI High Address</DESCRIPTION>
</PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="14" NAME="C_S_AXI_BASE_ID" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000020000000100000000">
+ <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="14" NAME="C_S_AXI_BASE_ID" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000400000003000000020000000100000000">
<DESCRIPTION>Slave AXI Base ID</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="15" NAME="C_S_AXI_THREAD_ID_WIDTH" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000">
<PARAMETER MPD_INDEX="16" NAME="C_S_AXI_IS_INTERCONNECT" TYPE="STD_LOGIC_VECTOR" VALUE="0b0000000000000000">
<DESCRIPTION>Slave AXI Is Interconnect</DESCRIPTION>
</PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="17" NAME="C_S_AXI_ACLK_RATIO" TYPE="STD_LOGIC_VECTOR" VALUE="0x0000000100000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000105f5e10005f5e10005f5e100">
+ <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="17" NAME="C_S_AXI_ACLK_RATIO" TYPE="STD_LOGIC_VECTOR" VALUE="0x000000010000000100000001000000010000000100000001000000010000000100000001000000010000000105f5e10005f5e10005f5e10005f5e10005f5e100">
<DESCRIPTION>Slave AXI ACLK Ratio</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="18" NAME="C_S_AXI_IS_ACLK_ASYNC" TYPE="STD_LOGIC_VECTOR" VALUE="0b0000000000000000">
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="21" NAME="C_INTERCONNECT_ACLK_RATIO" TYPE="INTEGER" VALUE="100000000">
<DESCRIPTION>Interconnect Crossbar ACLK Frequency Ratio</DESCRIPTION>
</PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="22" NAME="C_S_AXI_SUPPORTS_WRITE" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111101">
+ <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="22" NAME="C_S_AXI_SUPPORTS_WRITE" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111110101">
<DESCRIPTION>Slave AXI Supports Write</DESCRIPTION>
</PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="23" NAME="C_S_AXI_SUPPORTS_READ" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111011">
+ <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="23" NAME="C_S_AXI_SUPPORTS_READ" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111101111">
<DESCRIPTION>Slave AXI Supports Read</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="24" NAME="C_M_AXI_SUPPORTS_WRITE" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111111">
<PARAMETER MPD_INDEX="26" NAME="C_AXI_SUPPORTS_USER_SIGNALS" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>Propagate USER Signals</DESCRIPTION>
</PARAMETER>
- <PARAMETER MPD_INDEX="27" NAME="C_AXI_AWUSER_WIDTH" TYPE="INTEGER" VALUE="1">
+ <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="27" NAME="C_AXI_AWUSER_WIDTH" TYPE="INTEGER" VALUE="5">
<DESCRIPTION>AWUSER Signal Width </DESCRIPTION>
</PARAMETER>
- <PARAMETER MPD_INDEX="28" NAME="C_AXI_ARUSER_WIDTH" TYPE="INTEGER" VALUE="1">
+ <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="28" NAME="C_AXI_ARUSER_WIDTH" TYPE="INTEGER" VALUE="5">
<DESCRIPTION>ARUSER Signal Width</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="29" NAME="C_AXI_WUSER_WIDTH" TYPE="INTEGER" VALUE="1">
<PARAMETER MPD_INDEX="31" NAME="C_AXI_BUSER_WIDTH" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>BUSER Signal Width</DESCRIPTION>
</PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="32" NAME="C_AXI_CONNECTIVITY" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007">
+ <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="32" NAME="C_AXI_CONNECTIVITY" TYPE="STD_LOGIC_VECTOR" VALUE="0x0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001f">
<DESCRIPTION>AXI Connectivity</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="33" NAME="C_S_AXI_SINGLE_THREAD" TYPE="STD_LOGIC_VECTOR" VALUE="0b0000000000000000">
<PARAMETER MPD_INDEX="34" NAME="C_M_AXI_SUPPORTS_REORDERING" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111111">
<DESCRIPTION>Master AXI Supports Reordering</DESCRIPTION>
</PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="35" NAME="C_S_AXI_SUPPORTS_NARROW_BURST" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111000">
+ <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="35" NAME="C_S_AXI_SUPPORTS_NARROW_BURST" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111100000">
<DESCRIPTION>Master generates narrow bursts</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="36" NAME="C_M_AXI_SUPPORTS_NARROW_BURST" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111110">
<DESCRIPTION>Slave accepts narrow bursts</DESCRIPTION>
</PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="37" NAME="C_S_AXI_WRITE_ACCEPTANCE" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000100000001000000040000000100000001">
+ <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="37" NAME="C_S_AXI_WRITE_ACCEPTANCE" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000400000001000000010000000100000020">
<DESCRIPTION>Slave AXI Write Acceptance</DESCRIPTION>
</PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="38" NAME="C_S_AXI_READ_ACCEPTANCE" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000400000001">
+ <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="38" NAME="C_S_AXI_READ_ACCEPTANCE" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000100000004000000010000000200000002">
<DESCRIPTION>Slave AXI Read Acceptance</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="39" NAME="C_M_AXI_WRITE_ISSUING" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000100000004">
<PARAMETER MPD_INDEX="42" NAME="C_M_AXI_SECURE" TYPE="STD_LOGIC_VECTOR" VALUE="0b0000000000000000">
<DESCRIPTION>Master AXI Secure</DESCRIPTION>
</PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="43" NAME="C_S_AXI_WRITE_FIFO_DEPTH" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002000000000000000000">
+ <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="43" NAME="C_S_AXI_WRITE_FIFO_DEPTH" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000020000000000000000000000000000000000">
<DESCRIPTION>Master AXI Write FIFO Depth</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="44" NAME="C_S_AXI_WRITE_FIFO_TYPE" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111111">
<PARAMETER MPD_INDEX="45" NAME="C_S_AXI_WRITE_FIFO_DELAY" TYPE="STD_LOGIC_VECTOR" VALUE="0b0000000000000000">
<DESCRIPTION>Slave AXI Write FIFO Delay</DESCRIPTION>
</PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="46" NAME="C_S_AXI_READ_FIFO_DEPTH" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000020000000000">
+ <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="46" NAME="C_S_AXI_READ_FIFO_DEPTH" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000200000000000000000000000000">
<DESCRIPTION>Slave AXI Read FIFO Depth</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="47" NAME="C_S_AXI_READ_FIFO_TYPE" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111111">
<PARAMETER MPD_INDEX="54" NAME="C_M_AXI_READ_FIFO_DELAY" TYPE="STD_LOGIC_VECTOR" VALUE="0b0000000000000000">
<DESCRIPTION>Master AXI Read FIFO Delay</DESCRIPTION>
</PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="55" NAME="C_S_AXI_AW_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000100000001">
+ <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="55" NAME="C_S_AXI_AW_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000001000000010000000100000001">
<DESCRIPTION>Slave AXI AW Register</DESCRIPTION>
</PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="56" NAME="C_S_AXI_AR_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000100000001">
+ <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="56" NAME="C_S_AXI_AR_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000001000000010000000100000001">
<DESCRIPTION>Slave AXI AR Register</DESCRIPTION>
</PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="57" NAME="C_S_AXI_W_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000100000001">
+ <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="57" NAME="C_S_AXI_W_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000001000000010000000100000001">
<DESCRIPTION>Slave AXI W Register </DESCRIPTION>
</PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="58" NAME="C_S_AXI_R_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000100000001">
+ <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="58" NAME="C_S_AXI_R_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000001000000010000000100000001">
<DESCRIPTION>Slave AXI R Register</DESCRIPTION>
</PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="59" NAME="C_S_AXI_B_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000100000001">
+ <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="59" NAME="C_S_AXI_B_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000001000000010000000100000001">
<DESCRIPTION>Slave AXI B Register</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="60" NAME="C_M_AXI_AW_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001">
<PORTS>
<PORT BUS="S_AXI_CTRL" CLKFREQUENCY="100000000" DEF_SIGNAME="__BUS__" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="0" NAME="interconnect_aclk" SIGIS="CLK" SIGNAME="clk_100_0000MHzPLL0"/>
<PORT DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="1" MPD_INDEX="1" NAME="INTERCONNECT_ARESETN" SIGIS="RST" SIGNAME="proc_sys_reset_0_Interconnect_aresetn"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARESETN" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="2" MSB="2" NAME="S_AXI_ARESET_OUT_N" RIGHT="0" SIGIS="RST" SIGNAME="axi4_0_S_ARESETN" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_ARESETN" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="2" MSB="4" NAME="S_AXI_ARESET_OUT_N" RIGHT="0" SIGIS="RST" SIGNAME="axi4_0_S_ARESETN" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_ARESETN" DIR="O" MPD_INDEX="3" NAME="M_AXI_ARESET_OUT_N" SIGIS="RST" SIGNAME="axi4_0_M_ARESETN" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
<PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="4" NAME="IRQ" SENSITIVITY="EDGE_RISING" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
- <PORT DEF_SIGNAME="clk_100_0000MHzPLL0&clk_100_0000MHzPLL0&clk_100_0000MHzPLL0" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="5" MSB="2" NAME="S_AXI_ACLK" RIGHT="0" SIGIS="CLK" SIGNAME="clk_100_0000MHzPLL0&clk_100_0000MHzPLL0&clk_100_0000MHzPLL0" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]">
+ <PORT DEF_SIGNAME="clk_100_0000MHzPLL0&clk_100_0000MHzPLL0&clk_100_0000MHzPLL0&clk_100_0000MHzPLL0&clk_100_0000MHzPLL0" DIR="I" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="5" MSB="4" NAME="S_AXI_ACLK" RIGHT="0" SIGIS="CLK" SIGNAME="clk_100_0000MHzPLL0&clk_100_0000MHzPLL0&clk_100_0000MHzPLL0&clk_100_0000MHzPLL0&clk_100_0000MHzPLL0" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]">
<SIGNALS>
<SIGNAL NAME="clk_100_0000MHzPLL0"/>
<SIGNAL NAME="clk_100_0000MHzPLL0"/>
<SIGNAL NAME="clk_100_0000MHzPLL0"/>
+ <SIGNAL NAME="clk_100_0000MHzPLL0"/>
+ <SIGNAL NAME="clk_100_0000MHzPLL0"/>
</SIGNALS>
</PORT>
- <PORT DEF_SIGNAME="axi4_0_S_AWID" DIR="I" ENDIAN="LITTLE" LEFT="5" LSB="0" MPD_INDEX="6" MSB="5" NAME="S_AXI_AWID" RIGHT="0" SIGNAME="axi4_0_S_AWID" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_AWADDR" DIR="I" ENDIAN="LITTLE" LEFT="95" LSB="0" MPD_INDEX="7" MSB="95" NAME="S_AXI_AWADDR" RIGHT="0" SIGNAME="axi4_0_S_AWADDR" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ADDR_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_AWLEN" DIR="I" ENDIAN="LITTLE" LEFT="23" LSB="0" MPD_INDEX="8" MSB="23" NAME="S_AXI_AWLEN" RIGHT="0" SIGNAME="axi4_0_S_AWLEN" VECFORMULA="[((C_NUM_SLAVE_SLOTS*8)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_AWSIZE" DIR="I" ENDIAN="LITTLE" LEFT="8" LSB="0" MPD_INDEX="9" MSB="8" NAME="S_AXI_AWSIZE" RIGHT="0" SIGNAME="axi4_0_S_AWSIZE" VECFORMULA="[((C_NUM_SLAVE_SLOTS*3)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_AWBURST" DIR="I" ENDIAN="LITTLE" LEFT="5" LSB="0" MPD_INDEX="10" MSB="5" NAME="S_AXI_AWBURST" RIGHT="0" SIGNAME="axi4_0_S_AWBURST" VECFORMULA="[((C_NUM_SLAVE_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_AWLOCK" DIR="I" ENDIAN="LITTLE" LEFT="5" LSB="0" MPD_INDEX="11" MSB="5" NAME="S_AXI_AWLOCK" RIGHT="0" SIGNAME="axi4_0_S_AWLOCK" VECFORMULA="[((C_NUM_SLAVE_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_AWCACHE" DIR="I" ENDIAN="LITTLE" LEFT="11" LSB="0" MPD_INDEX="12" MSB="11" NAME="S_AXI_AWCACHE" RIGHT="0" SIGNAME="axi4_0_S_AWCACHE" VECFORMULA="[((C_NUM_SLAVE_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_AWPROT" DIR="I" ENDIAN="LITTLE" LEFT="8" LSB="0" MPD_INDEX="13" MSB="8" NAME="S_AXI_AWPROT" RIGHT="0" SIGNAME="axi4_0_S_AWPROT" VECFORMULA="[((C_NUM_SLAVE_SLOTS*3)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_AWQOS" DIR="I" ENDIAN="LITTLE" LEFT="11" LSB="0" MPD_INDEX="14" MSB="11" NAME="S_AXI_AWQOS" RIGHT="0" SIGNAME="axi4_0_S_AWQOS" VECFORMULA="[((C_NUM_SLAVE_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_AWUSER" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="15" MSB="2" NAME="S_AXI_AWUSER" RIGHT="0" SIGNAME="axi4_0_S_AWUSER" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_AWUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_AWVALID" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="16" MSB="2" NAME="S_AXI_AWVALID" RIGHT="0" SIGNAME="axi4_0_S_AWVALID" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_AWREADY" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="17" MSB="2" NAME="S_AXI_AWREADY" RIGHT="0" SIGNAME="axi4_0_S_AWREADY" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_WDATA" DIR="I" ENDIAN="LITTLE" LEFT="95" LSB="0" MPD_INDEX="18" MSB="95" NAME="S_AXI_WDATA" RIGHT="0" SIGNAME="axi4_0_S_WDATA" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_DATA_MAX_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_WSTRB" DIR="I" ENDIAN="LITTLE" LEFT="11" LSB="0" MPD_INDEX="19" MSB="11" NAME="S_AXI_WSTRB" RIGHT="0" SIGNAME="axi4_0_S_WSTRB" VECFORMULA="[(((C_NUM_SLAVE_SLOTS*C_AXI_DATA_MAX_WIDTH)/8)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_WLAST" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="20" MSB="2" NAME="S_AXI_WLAST" RIGHT="0" SIGNAME="axi4_0_S_WLAST" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_WUSER" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="21" MSB="2" NAME="S_AXI_WUSER" RIGHT="0" SIGNAME="axi4_0_S_WUSER" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_WUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_WVALID" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="22" MSB="2" NAME="S_AXI_WVALID" RIGHT="0" SIGNAME="axi4_0_S_WVALID" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_WREADY" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="23" MSB="2" NAME="S_AXI_WREADY" RIGHT="0" SIGNAME="axi4_0_S_WREADY" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_BID" DIR="O" ENDIAN="LITTLE" LEFT="5" LSB="0" MPD_INDEX="24" MSB="5" NAME="S_AXI_BID" RIGHT="0" SIGNAME="axi4_0_S_BID" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_BRESP" DIR="O" ENDIAN="LITTLE" LEFT="5" LSB="0" MPD_INDEX="25" MSB="5" NAME="S_AXI_BRESP" RIGHT="0" SIGNAME="axi4_0_S_BRESP" VECFORMULA="[((C_NUM_SLAVE_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_BUSER" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="26" MSB="2" NAME="S_AXI_BUSER" RIGHT="0" SIGNAME="axi4_0_S_BUSER" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_BUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_BVALID" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="27" MSB="2" NAME="S_AXI_BVALID" RIGHT="0" SIGNAME="axi4_0_S_BVALID" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_BREADY" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="28" MSB="2" NAME="S_AXI_BREADY" RIGHT="0" SIGNAME="axi4_0_S_BREADY" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARID" DIR="I" ENDIAN="LITTLE" LEFT="5" LSB="0" MPD_INDEX="29" MSB="5" NAME="S_AXI_ARID" RIGHT="0" SIGNAME="axi4_0_S_ARID" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARADDR" DIR="I" ENDIAN="LITTLE" LEFT="95" LSB="0" MPD_INDEX="30" MSB="95" NAME="S_AXI_ARADDR" RIGHT="0" SIGNAME="axi4_0_S_ARADDR" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ADDR_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARLEN" DIR="I" ENDIAN="LITTLE" LEFT="23" LSB="0" MPD_INDEX="31" MSB="23" NAME="S_AXI_ARLEN" RIGHT="0" SIGNAME="axi4_0_S_ARLEN" VECFORMULA="[((C_NUM_SLAVE_SLOTS*8)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARSIZE" DIR="I" ENDIAN="LITTLE" LEFT="8" LSB="0" MPD_INDEX="32" MSB="8" NAME="S_AXI_ARSIZE" RIGHT="0" SIGNAME="axi4_0_S_ARSIZE" VECFORMULA="[((C_NUM_SLAVE_SLOTS*3)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARBURST" DIR="I" ENDIAN="LITTLE" LEFT="5" LSB="0" MPD_INDEX="33" MSB="5" NAME="S_AXI_ARBURST" RIGHT="0" SIGNAME="axi4_0_S_ARBURST" VECFORMULA="[((C_NUM_SLAVE_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARLOCK" DIR="I" ENDIAN="LITTLE" LEFT="5" LSB="0" MPD_INDEX="34" MSB="5" NAME="S_AXI_ARLOCK" RIGHT="0" SIGNAME="axi4_0_S_ARLOCK" VECFORMULA="[((C_NUM_SLAVE_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARCACHE" DIR="I" ENDIAN="LITTLE" LEFT="11" LSB="0" MPD_INDEX="35" MSB="11" NAME="S_AXI_ARCACHE" RIGHT="0" SIGNAME="axi4_0_S_ARCACHE" VECFORMULA="[((C_NUM_SLAVE_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARPROT" DIR="I" ENDIAN="LITTLE" LEFT="8" LSB="0" MPD_INDEX="36" MSB="8" NAME="S_AXI_ARPROT" RIGHT="0" SIGNAME="axi4_0_S_ARPROT" VECFORMULA="[((C_NUM_SLAVE_SLOTS*3)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARQOS" DIR="I" ENDIAN="LITTLE" LEFT="11" LSB="0" MPD_INDEX="37" MSB="11" NAME="S_AXI_ARQOS" RIGHT="0" SIGNAME="axi4_0_S_ARQOS" VECFORMULA="[((C_NUM_SLAVE_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARUSER" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="38" MSB="2" NAME="S_AXI_ARUSER" RIGHT="0" SIGNAME="axi4_0_S_ARUSER" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ARUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARVALID" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="39" MSB="2" NAME="S_AXI_ARVALID" RIGHT="0" SIGNAME="axi4_0_S_ARVALID" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARREADY" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="40" MSB="2" NAME="S_AXI_ARREADY" RIGHT="0" SIGNAME="axi4_0_S_ARREADY" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_RID" DIR="O" ENDIAN="LITTLE" LEFT="5" LSB="0" MPD_INDEX="41" MSB="5" NAME="S_AXI_RID" RIGHT="0" SIGNAME="axi4_0_S_RID" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_RDATA" DIR="O" ENDIAN="LITTLE" LEFT="95" LSB="0" MPD_INDEX="42" MSB="95" NAME="S_AXI_RDATA" RIGHT="0" SIGNAME="axi4_0_S_RDATA" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_DATA_MAX_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_RRESP" DIR="O" ENDIAN="LITTLE" LEFT="5" LSB="0" MPD_INDEX="43" MSB="5" NAME="S_AXI_RRESP" RIGHT="0" SIGNAME="axi4_0_S_RRESP" VECFORMULA="[((C_NUM_SLAVE_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_RLAST" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="44" MSB="2" NAME="S_AXI_RLAST" RIGHT="0" SIGNAME="axi4_0_S_RLAST" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_RUSER" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="45" MSB="2" NAME="S_AXI_RUSER" RIGHT="0" SIGNAME="axi4_0_S_RUSER" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_RUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_RVALID" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="46" MSB="2" NAME="S_AXI_RVALID" RIGHT="0" SIGNAME="axi4_0_S_RVALID" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_RREADY" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="47" MSB="2" NAME="S_AXI_RREADY" RIGHT="0" SIGNAME="axi4_0_S_RREADY" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_AWID" DIR="I" ENDIAN="LITTLE" LEFT="14" LSB="0" MPD_INDEX="6" MSB="14" NAME="S_AXI_AWID" RIGHT="0" SIGNAME="axi4_0_S_AWID" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_AWADDR" DIR="I" ENDIAN="LITTLE" LEFT="159" LSB="0" MPD_INDEX="7" MSB="159" NAME="S_AXI_AWADDR" RIGHT="0" SIGNAME="axi4_0_S_AWADDR" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ADDR_WIDTH)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_AWLEN" DIR="I" ENDIAN="LITTLE" LEFT="39" LSB="0" MPD_INDEX="8" MSB="39" NAME="S_AXI_AWLEN" RIGHT="0" SIGNAME="axi4_0_S_AWLEN" VECFORMULA="[((C_NUM_SLAVE_SLOTS*8)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_AWSIZE" DIR="I" ENDIAN="LITTLE" LEFT="14" LSB="0" MPD_INDEX="9" MSB="14" NAME="S_AXI_AWSIZE" RIGHT="0" SIGNAME="axi4_0_S_AWSIZE" VECFORMULA="[((C_NUM_SLAVE_SLOTS*3)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_AWBURST" DIR="I" ENDIAN="LITTLE" LEFT="9" LSB="0" MPD_INDEX="10" MSB="9" NAME="S_AXI_AWBURST" RIGHT="0" SIGNAME="axi4_0_S_AWBURST" VECFORMULA="[((C_NUM_SLAVE_SLOTS*2)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_AWLOCK" DIR="I" ENDIAN="LITTLE" LEFT="9" LSB="0" MPD_INDEX="11" MSB="9" NAME="S_AXI_AWLOCK" RIGHT="0" SIGNAME="axi4_0_S_AWLOCK" VECFORMULA="[((C_NUM_SLAVE_SLOTS*2)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_AWCACHE" DIR="I" ENDIAN="LITTLE" LEFT="19" LSB="0" MPD_INDEX="12" MSB="19" NAME="S_AXI_AWCACHE" RIGHT="0" SIGNAME="axi4_0_S_AWCACHE" VECFORMULA="[((C_NUM_SLAVE_SLOTS*4)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_AWPROT" DIR="I" ENDIAN="LITTLE" LEFT="14" LSB="0" MPD_INDEX="13" MSB="14" NAME="S_AXI_AWPROT" RIGHT="0" SIGNAME="axi4_0_S_AWPROT" VECFORMULA="[((C_NUM_SLAVE_SLOTS*3)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_AWQOS" DIR="I" ENDIAN="LITTLE" LEFT="19" LSB="0" MPD_INDEX="14" MSB="19" NAME="S_AXI_AWQOS" RIGHT="0" SIGNAME="axi4_0_S_AWQOS" VECFORMULA="[((C_NUM_SLAVE_SLOTS*4)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_AWUSER" DIR="I" ENDIAN="LITTLE" LEFT="24" LSB="0" MPD_INDEX="15" MSB="24" NAME="S_AXI_AWUSER" RIGHT="0" SIGNAME="axi4_0_S_AWUSER" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_AWUSER_WIDTH)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_AWVALID" DIR="I" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="16" MSB="4" NAME="S_AXI_AWVALID" RIGHT="0" SIGNAME="axi4_0_S_AWVALID" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_AWREADY" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="17" MSB="4" NAME="S_AXI_AWREADY" RIGHT="0" SIGNAME="axi4_0_S_AWREADY" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_WDATA" DIR="I" ENDIAN="LITTLE" LEFT="159" LSB="0" MPD_INDEX="18" MSB="159" NAME="S_AXI_WDATA" RIGHT="0" SIGNAME="axi4_0_S_WDATA" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_DATA_MAX_WIDTH)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_WSTRB" DIR="I" ENDIAN="LITTLE" LEFT="19" LSB="0" MPD_INDEX="19" MSB="19" NAME="S_AXI_WSTRB" RIGHT="0" SIGNAME="axi4_0_S_WSTRB" VECFORMULA="[(((C_NUM_SLAVE_SLOTS*C_AXI_DATA_MAX_WIDTH)/8)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_WLAST" DIR="I" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="20" MSB="4" NAME="S_AXI_WLAST" RIGHT="0" SIGNAME="axi4_0_S_WLAST" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_WUSER" DIR="I" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="21" MSB="4" NAME="S_AXI_WUSER" RIGHT="0" SIGNAME="axi4_0_S_WUSER" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_WUSER_WIDTH)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_WVALID" DIR="I" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="22" MSB="4" NAME="S_AXI_WVALID" RIGHT="0" SIGNAME="axi4_0_S_WVALID" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_WREADY" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="23" MSB="4" NAME="S_AXI_WREADY" RIGHT="0" SIGNAME="axi4_0_S_WREADY" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_BID" DIR="O" ENDIAN="LITTLE" LEFT="14" LSB="0" MPD_INDEX="24" MSB="14" NAME="S_AXI_BID" RIGHT="0" SIGNAME="axi4_0_S_BID" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_BRESP" DIR="O" ENDIAN="LITTLE" LEFT="9" LSB="0" MPD_INDEX="25" MSB="9" NAME="S_AXI_BRESP" RIGHT="0" SIGNAME="axi4_0_S_BRESP" VECFORMULA="[((C_NUM_SLAVE_SLOTS*2)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_BUSER" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="26" MSB="4" NAME="S_AXI_BUSER" RIGHT="0" SIGNAME="axi4_0_S_BUSER" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_BUSER_WIDTH)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_BVALID" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="27" MSB="4" NAME="S_AXI_BVALID" RIGHT="0" SIGNAME="axi4_0_S_BVALID" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_BREADY" DIR="I" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="28" MSB="4" NAME="S_AXI_BREADY" RIGHT="0" SIGNAME="axi4_0_S_BREADY" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_ARID" DIR="I" ENDIAN="LITTLE" LEFT="14" LSB="0" MPD_INDEX="29" MSB="14" NAME="S_AXI_ARID" RIGHT="0" SIGNAME="axi4_0_S_ARID" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_ARADDR" DIR="I" ENDIAN="LITTLE" LEFT="159" LSB="0" MPD_INDEX="30" MSB="159" NAME="S_AXI_ARADDR" RIGHT="0" SIGNAME="axi4_0_S_ARADDR" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ADDR_WIDTH)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_ARLEN" DIR="I" ENDIAN="LITTLE" LEFT="39" LSB="0" MPD_INDEX="31" MSB="39" NAME="S_AXI_ARLEN" RIGHT="0" SIGNAME="axi4_0_S_ARLEN" VECFORMULA="[((C_NUM_SLAVE_SLOTS*8)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_ARSIZE" DIR="I" ENDIAN="LITTLE" LEFT="14" LSB="0" MPD_INDEX="32" MSB="14" NAME="S_AXI_ARSIZE" RIGHT="0" SIGNAME="axi4_0_S_ARSIZE" VECFORMULA="[((C_NUM_SLAVE_SLOTS*3)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_ARBURST" DIR="I" ENDIAN="LITTLE" LEFT="9" LSB="0" MPD_INDEX="33" MSB="9" NAME="S_AXI_ARBURST" RIGHT="0" SIGNAME="axi4_0_S_ARBURST" VECFORMULA="[((C_NUM_SLAVE_SLOTS*2)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_ARLOCK" DIR="I" ENDIAN="LITTLE" LEFT="9" LSB="0" MPD_INDEX="34" MSB="9" NAME="S_AXI_ARLOCK" RIGHT="0" SIGNAME="axi4_0_S_ARLOCK" VECFORMULA="[((C_NUM_SLAVE_SLOTS*2)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_ARCACHE" DIR="I" ENDIAN="LITTLE" LEFT="19" LSB="0" MPD_INDEX="35" MSB="19" NAME="S_AXI_ARCACHE" RIGHT="0" SIGNAME="axi4_0_S_ARCACHE" VECFORMULA="[((C_NUM_SLAVE_SLOTS*4)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_ARPROT" DIR="I" ENDIAN="LITTLE" LEFT="14" LSB="0" MPD_INDEX="36" MSB="14" NAME="S_AXI_ARPROT" RIGHT="0" SIGNAME="axi4_0_S_ARPROT" VECFORMULA="[((C_NUM_SLAVE_SLOTS*3)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_ARQOS" DIR="I" ENDIAN="LITTLE" LEFT="19" LSB="0" MPD_INDEX="37" MSB="19" NAME="S_AXI_ARQOS" RIGHT="0" SIGNAME="axi4_0_S_ARQOS" VECFORMULA="[((C_NUM_SLAVE_SLOTS*4)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_ARUSER" DIR="I" ENDIAN="LITTLE" LEFT="24" LSB="0" MPD_INDEX="38" MSB="24" NAME="S_AXI_ARUSER" RIGHT="0" SIGNAME="axi4_0_S_ARUSER" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ARUSER_WIDTH)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_ARVALID" DIR="I" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="39" MSB="4" NAME="S_AXI_ARVALID" RIGHT="0" SIGNAME="axi4_0_S_ARVALID" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_ARREADY" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="40" MSB="4" NAME="S_AXI_ARREADY" RIGHT="0" SIGNAME="axi4_0_S_ARREADY" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_RID" DIR="O" ENDIAN="LITTLE" LEFT="14" LSB="0" MPD_INDEX="41" MSB="14" NAME="S_AXI_RID" RIGHT="0" SIGNAME="axi4_0_S_RID" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_RDATA" DIR="O" ENDIAN="LITTLE" LEFT="159" LSB="0" MPD_INDEX="42" MSB="159" NAME="S_AXI_RDATA" RIGHT="0" SIGNAME="axi4_0_S_RDATA" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_DATA_MAX_WIDTH)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_RRESP" DIR="O" ENDIAN="LITTLE" LEFT="9" LSB="0" MPD_INDEX="43" MSB="9" NAME="S_AXI_RRESP" RIGHT="0" SIGNAME="axi4_0_S_RRESP" VECFORMULA="[((C_NUM_SLAVE_SLOTS*2)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_RLAST" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="44" MSB="4" NAME="S_AXI_RLAST" RIGHT="0" SIGNAME="axi4_0_S_RLAST" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_RUSER" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="45" MSB="4" NAME="S_AXI_RUSER" RIGHT="0" SIGNAME="axi4_0_S_RUSER" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_RUSER_WIDTH)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_RVALID" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="46" MSB="4" NAME="S_AXI_RVALID" RIGHT="0" SIGNAME="axi4_0_S_RVALID" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_RREADY" DIR="I" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="47" MSB="4" NAME="S_AXI_RREADY" RIGHT="0" SIGNAME="axi4_0_S_RREADY" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
<PORT DEF_SIGNAME="clk_100_0000MHzPLL0" DIR="I" MPD_INDEX="48" NAME="M_AXI_ACLK" SIGIS="CLK" SIGNAME="clk_100_0000MHzPLL0" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_AWID" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="49" MSB="1" NAME="M_AXI_AWID" RIGHT="0" SIGNAME="axi4_0_M_AWID" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_M_AWID" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="49" MSB="2" NAME="M_AXI_AWID" RIGHT="0" SIGNAME="axi4_0_M_AWID" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_AWADDR" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="50" MSB="31" NAME="M_AXI_AWADDR" RIGHT="0" SIGNAME="axi4_0_M_AWADDR" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ADDR_WIDTH)-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_AWLEN" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="51" MSB="7" NAME="M_AXI_AWLEN" RIGHT="0" SIGNAME="axi4_0_M_AWLEN" VECFORMULA="[((C_NUM_MASTER_SLOTS*8)-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_AWSIZE" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="52" MSB="2" NAME="M_AXI_AWSIZE" RIGHT="0" SIGNAME="axi4_0_M_AWSIZE" VECFORMULA="[((C_NUM_MASTER_SLOTS*3)-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_AWPROT" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="56" MSB="2" NAME="M_AXI_AWPROT" RIGHT="0" SIGNAME="axi4_0_M_AWPROT" VECFORMULA="[((C_NUM_MASTER_SLOTS*3)-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_AWREGION" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="57" MSB="3" NAME="M_AXI_AWREGION" RIGHT="0" SIGNAME="axi4_0_M_AWREGION" VECFORMULA="[((C_NUM_MASTER_SLOTS*4)-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_AWQOS" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="58" MSB="3" NAME="M_AXI_AWQOS" RIGHT="0" SIGNAME="axi4_0_M_AWQOS" VECFORMULA="[((C_NUM_MASTER_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_AWUSER" DIR="O" MPD_INDEX="59" NAME="M_AXI_AWUSER" SIGNAME="axi4_0_M_AWUSER" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_AWUSER_WIDTH)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_M_AWUSER" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="59" MSB="4" NAME="M_AXI_AWUSER" RIGHT="0" SIGNAME="axi4_0_M_AWUSER" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_AWUSER_WIDTH)-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_AWVALID" DIR="O" MPD_INDEX="60" NAME="M_AXI_AWVALID" SIGNAME="axi4_0_M_AWVALID" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_AWREADY" DIR="I" MPD_INDEX="61" NAME="M_AXI_AWREADY" SIGNAME="axi4_0_M_AWREADY" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_WID" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="62" MSB="1" NAME="M_AXI_WID" RIGHT="0" SIGNAME="axi4_0_M_WID" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_M_WID" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="62" MSB="2" NAME="M_AXI_WID" RIGHT="0" SIGNAME="axi4_0_M_WID" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_WDATA" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="63" MSB="31" NAME="M_AXI_WDATA" RIGHT="0" SIGNAME="axi4_0_M_WDATA" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_DATA_MAX_WIDTH)-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_WSTRB" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="64" MSB="3" NAME="M_AXI_WSTRB" RIGHT="0" SIGNAME="axi4_0_M_WSTRB" VECFORMULA="[(((C_NUM_MASTER_SLOTS*C_AXI_DATA_MAX_WIDTH)/8)-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_WLAST" DIR="O" MPD_INDEX="65" NAME="M_AXI_WLAST" SIGNAME="axi4_0_M_WLAST" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_WUSER" DIR="O" MPD_INDEX="66" NAME="M_AXI_WUSER" SIGNAME="axi4_0_M_WUSER" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_WUSER_WIDTH)-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_WVALID" DIR="O" MPD_INDEX="67" NAME="M_AXI_WVALID" SIGNAME="axi4_0_M_WVALID" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_WREADY" DIR="I" MPD_INDEX="68" NAME="M_AXI_WREADY" SIGNAME="axi4_0_M_WREADY" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_BID" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="69" MSB="1" NAME="M_AXI_BID" RIGHT="0" SIGNAME="axi4_0_M_BID" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_M_BID" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="69" MSB="2" NAME="M_AXI_BID" RIGHT="0" SIGNAME="axi4_0_M_BID" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_BRESP" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="70" MSB="1" NAME="M_AXI_BRESP" RIGHT="0" SIGNAME="axi4_0_M_BRESP" VECFORMULA="[((C_NUM_MASTER_SLOTS*2)-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_BUSER" DIR="I" MPD_INDEX="71" NAME="M_AXI_BUSER" SIGNAME="axi4_0_M_BUSER" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_BUSER_WIDTH)-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_BVALID" DIR="I" MPD_INDEX="72" NAME="M_AXI_BVALID" SIGNAME="axi4_0_M_BVALID" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_BREADY" DIR="O" MPD_INDEX="73" NAME="M_AXI_BREADY" SIGNAME="axi4_0_M_BREADY" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_ARID" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="74" MSB="1" NAME="M_AXI_ARID" RIGHT="0" SIGNAME="axi4_0_M_ARID" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_M_ARID" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="74" MSB="2" NAME="M_AXI_ARID" RIGHT="0" SIGNAME="axi4_0_M_ARID" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_ARADDR" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="75" MSB="31" NAME="M_AXI_ARADDR" RIGHT="0" SIGNAME="axi4_0_M_ARADDR" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ADDR_WIDTH)-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_ARLEN" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="76" MSB="7" NAME="M_AXI_ARLEN" RIGHT="0" SIGNAME="axi4_0_M_ARLEN" VECFORMULA="[((C_NUM_MASTER_SLOTS*8)-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_ARSIZE" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="77" MSB="2" NAME="M_AXI_ARSIZE" RIGHT="0" SIGNAME="axi4_0_M_ARSIZE" VECFORMULA="[((C_NUM_MASTER_SLOTS*3)-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_ARPROT" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="81" MSB="2" NAME="M_AXI_ARPROT" RIGHT="0" SIGNAME="axi4_0_M_ARPROT" VECFORMULA="[((C_NUM_MASTER_SLOTS*3)-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_ARREGION" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="82" MSB="3" NAME="M_AXI_ARREGION" RIGHT="0" SIGNAME="axi4_0_M_ARREGION" VECFORMULA="[((C_NUM_MASTER_SLOTS*4)-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_ARQOS" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="83" MSB="3" NAME="M_AXI_ARQOS" RIGHT="0" SIGNAME="axi4_0_M_ARQOS" VECFORMULA="[((C_NUM_MASTER_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_ARUSER" DIR="O" MPD_INDEX="84" NAME="M_AXI_ARUSER" SIGNAME="axi4_0_M_ARUSER" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ARUSER_WIDTH)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_M_ARUSER" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="84" MSB="4" NAME="M_AXI_ARUSER" RIGHT="0" SIGNAME="axi4_0_M_ARUSER" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ARUSER_WIDTH)-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_ARVALID" DIR="O" MPD_INDEX="85" NAME="M_AXI_ARVALID" SIGNAME="axi4_0_M_ARVALID" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_ARREADY" DIR="I" MPD_INDEX="86" NAME="M_AXI_ARREADY" SIGNAME="axi4_0_M_ARREADY" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_RID" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="87" MSB="1" NAME="M_AXI_RID" RIGHT="0" SIGNAME="axi4_0_M_RID" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_M_RID" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="87" MSB="2" NAME="M_AXI_RID" RIGHT="0" SIGNAME="axi4_0_M_RID" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_RDATA" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="88" MSB="31" NAME="M_AXI_RDATA" RIGHT="0" SIGNAME="axi4_0_M_RDATA" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_DATA_MAX_WIDTH)-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_RRESP" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="89" MSB="1" NAME="M_AXI_RRESP" RIGHT="0" SIGNAME="axi4_0_M_RRESP" VECFORMULA="[((C_NUM_MASTER_SLOTS*2)-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_RLAST" DIR="I" MPD_INDEX="90" NAME="M_AXI_RLAST" SIGNAME="axi4_0_M_RLAST" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="12" NAME="C_M_AXI_BASE_ADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0xffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff0000000041c00000ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff0000000041200000ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff0000000041e00000ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff0000000041240000ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff0000000040000000ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff0000000040020000ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff0000000040600000ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff0000000074800000">
<DESCRIPTION>Master AXI Base Address</DESCRIPTION>
</PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="13" NAME="C_M_AXI_HIGH_ADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000041c0ffff000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004120ffff0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000041e0ffff000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004127ffff000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004000ffff000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004002ffff000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004060ffff00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000748fffff">
+ <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="13" NAME="C_M_AXI_HIGH_ADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000041c0ffff000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004120ffff0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000041e0ffff000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004127ffff000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004000ffff000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004002ffff000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004060ffff000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007480ffff">
<DESCRIPTION>Master AXI High Address</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="14" NAME="C_S_AXI_BASE_ID" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000">
<PARAMETER ADDRESS="NONE" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="7" MPD_INDEX="142" NAME="C_ICACHE_HIGHADDR" TYPE="std_logic_vector" VALUE="0xc7ffffff">
<DESCRIPTION>I-Cache High Address </DESCRIPTION>
</PARAMETER>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="8" MPD_INDEX="143" NAME="C_USE_ICACHE" TYPE="integer" VALUE="0">
+ <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="8" MPD_INDEX="143" NAME="C_USE_ICACHE" TYPE="integer" VALUE="1">
<DESCRIPTION>Enable Instruction Cache </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="144" NAME="C_ALLOW_ICACHE_WR" TYPE="integer" VALUE="1">
<DESCRIPTION>Enable I-Cache Writes</DESCRIPTION>
</PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="145" NAME="C_ADDR_TAG_BITS" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="146" NAME="C_CACHE_BYTE_SIZE" TYPE="integer" VALUE="8192">
+ <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="145" NAME="C_ADDR_TAG_BITS" TYPE="integer" VALUE="13"/>
+ <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="32" MPD_INDEX="146" NAME="C_CACHE_BYTE_SIZE" TYPE="integer" VALUE="16384">
<DESCRIPTION>Size of the I-Cache in Bytes</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="147" NAME="C_ICACHE_USE_FSL" TYPE="integer" VALUE="0"/>
<PARAMETER ADDRESS="NONE" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="11" MPD_INDEX="172" NAME="C_DCACHE_HIGHADDR" TYPE="std_logic_vector" VALUE="0xc7ffffff">
<DESCRIPTION>D-Cache High Address</DESCRIPTION>
</PARAMETER>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="12" MPD_INDEX="173" NAME="C_USE_DCACHE" TYPE="integer" VALUE="0">
+ <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="12" MPD_INDEX="173" NAME="C_USE_DCACHE" TYPE="integer" VALUE="1">
<DESCRIPTION>Enable Data Cache</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="174" NAME="C_ALLOW_DCACHE_WR" TYPE="integer" VALUE="1">
<DESCRIPTION>Enable D-Cache Writes</DESCRIPTION>
</PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="175" NAME="C_DCACHE_ADDR_TAG" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="176" NAME="C_DCACHE_BYTE_SIZE" TYPE="integer" VALUE="8192">
+ <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="175" NAME="C_DCACHE_ADDR_TAG" TYPE="integer" VALUE="13"/>
+ <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="33" MPD_INDEX="176" NAME="C_DCACHE_BYTE_SIZE" TYPE="integer" VALUE="16384">
<DESCRIPTION>Size of D-Cache in Bytes</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="177" NAME="C_DCACHE_USE_FSL" TYPE="integer" VALUE="0"/>
<PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_RLAST" DIR="I" MPD_INDEX="159" NAME="M_AXI_DP_RLAST" SIGNAME="axi4lite_0_S_RLAST"/>
<PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_RVALID" DIR="I" MPD_INDEX="160" NAME="M_AXI_DP_RVALID" SIGNAME="axi4lite_0_S_RVALID"/>
<PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_RREADY" DIR="O" MPD_INDEX="161" NAME="M_AXI_DP_RREADY" SIGNAME="axi4lite_0_S_RREADY"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="162" NAME="M_AXI_IC_AWID" SIGNAME="__NOC__" VECFORMULA="[(C_M_AXI_IC_THREAD_ID_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="163" MSB="31" NAME="M_AXI_IC_AWADDR" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_M_AXI_IC_ADDR_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="164" MSB="7" NAME="M_AXI_IC_AWLEN" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[7:0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="165" MSB="2" NAME="M_AXI_IC_AWSIZE" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[2:0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="166" MSB="1" NAME="M_AXI_IC_AWBURST" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="167" NAME="M_AXI_IC_AWLOCK" SIGNAME="__NOC__"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="168" MSB="3" NAME="M_AXI_IC_AWCACHE" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[3:0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="169" MSB="2" NAME="M_AXI_IC_AWPROT" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[2:0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="170" MSB="3" NAME="M_AXI_IC_AWQOS" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[3:0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="171" NAME="M_AXI_IC_AWVALID" SIGNAME="__NOC__"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="172" NAME="M_AXI_IC_AWREADY" SIGNAME="__NOC__"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="173" MSB="4" NAME="M_AXI_IC_AWUSER" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_M_AXI_IC_AWUSER_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="174" MSB="31" NAME="M_AXI_IC_WDATA" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_M_AXI_IC_DATA_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="175" MSB="3" NAME="M_AXI_IC_WSTRB" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[((C_M_AXI_IC_DATA_WIDTH/8)-1):0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="176" NAME="M_AXI_IC_WLAST" SIGNAME="__NOC__"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="177" NAME="M_AXI_IC_WVALID" SIGNAME="__NOC__"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="178" NAME="M_AXI_IC_WREADY" SIGNAME="__NOC__"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="179" NAME="M_AXI_IC_WUSER" SIGNAME="__NOC__" VECFORMULA="[(C_M_AXI_IC_WUSER_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="180" NAME="M_AXI_IC_BID" SIGNAME="__NOC__" VECFORMULA="[(C_M_AXI_IC_THREAD_ID_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="181" MSB="1" NAME="M_AXI_IC_BRESP" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="182" NAME="M_AXI_IC_BVALID" SIGNAME="__NOC__"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="183" NAME="M_AXI_IC_BREADY" SIGNAME="__NOC__"/>
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- <PORT BUS="M_AXI_IC" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="187" MSB="7" NAME="M_AXI_IC_ARLEN" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[7:0]"/>
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- <PORT BUS="M_AXI_IC" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="190" NAME="M_AXI_IC_ARLOCK" SIGNAME="__NOC__"/>
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- <PORT BUS="M_AXI_IC" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="192" MSB="2" NAME="M_AXI_IC_ARPROT" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[2:0]"/>
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- <PORT BUS="M_AXI_IC" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="194" NAME="M_AXI_IC_ARVALID" SIGNAME="__NOC__"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="195" NAME="M_AXI_IC_ARREADY" SIGNAME="__NOC__"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="196" MSB="4" NAME="M_AXI_IC_ARUSER" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_M_AXI_IC_ARUSER_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="197" NAME="M_AXI_IC_RID" SIGNAME="__NOC__" VECFORMULA="[(C_M_AXI_IC_THREAD_ID_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="198" MSB="31" NAME="M_AXI_IC_RDATA" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_M_AXI_IC_DATA_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="199" MSB="1" NAME="M_AXI_IC_RRESP" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="200" NAME="M_AXI_IC_RLAST" SIGNAME="__NOC__"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="201" NAME="M_AXI_IC_RVALID" SIGNAME="__NOC__"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="202" NAME="M_AXI_IC_RREADY" SIGNAME="__NOC__"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="203" NAME="M_AXI_IC_RUSER" SIGNAME="__NOC__" VECFORMULA="[(C_M_AXI_IC_RUSER_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="204" NAME="M_AXI_DC_AWID" SIGNAME="__NOC__" VECFORMULA="[(C_M_AXI_DC_THREAD_ID_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="205" MSB="31" NAME="M_AXI_DC_AWADDR" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_M_AXI_DC_ADDR_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="206" MSB="7" NAME="M_AXI_DC_AWLEN" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[7:0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="207" MSB="2" NAME="M_AXI_DC_AWSIZE" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[2:0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="208" MSB="1" NAME="M_AXI_DC_AWBURST" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="209" NAME="M_AXI_DC_AWLOCK" SIGNAME="__NOC__"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="210" MSB="3" NAME="M_AXI_DC_AWCACHE" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[3:0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="211" MSB="2" NAME="M_AXI_DC_AWPROT" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[2:0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="212" MSB="3" NAME="M_AXI_DC_AWQOS" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[3:0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="213" NAME="M_AXI_DC_AWVALID" SIGNAME="__NOC__"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="214" NAME="M_AXI_DC_AWREADY" SIGNAME="__NOC__"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="215" MSB="4" NAME="M_AXI_DC_AWUSER" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_M_AXI_DC_AWUSER_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="216" MSB="31" NAME="M_AXI_DC_WDATA" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_M_AXI_DC_DATA_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="217" MSB="3" NAME="M_AXI_DC_WSTRB" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[((C_M_AXI_DC_DATA_WIDTH/8)-1):0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="218" NAME="M_AXI_DC_WLAST" SIGNAME="__NOC__"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="219" NAME="M_AXI_DC_WVALID" SIGNAME="__NOC__"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="220" NAME="M_AXI_DC_WREADY" SIGNAME="__NOC__"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="221" NAME="M_AXI_DC_WUSER" SIGNAME="__NOC__" VECFORMULA="[(C_M_AXI_DC_WUSER_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="222" NAME="M_AXI_DC_BID" SIGNAME="__NOC__" VECFORMULA="[(C_M_AXI_DC_THREAD_ID_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="223" MSB="1" NAME="M_AXI_DC_BRESP" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="224" NAME="M_AXI_DC_BVALID" SIGNAME="__NOC__"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="225" NAME="M_AXI_DC_BREADY" SIGNAME="__NOC__"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="226" NAME="M_AXI_DC_BUSER" SIGNAME="__NOC__" VECFORMULA="[(C_M_AXI_DC_BUSER_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="227" NAME="M_AXI_DC_ARID" SIGNAME="__NOC__" VECFORMULA="[(C_M_AXI_DC_THREAD_ID_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="228" MSB="31" NAME="M_AXI_DC_ARADDR" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_M_AXI_DC_ADDR_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="229" MSB="7" NAME="M_AXI_DC_ARLEN" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[7:0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="230" MSB="2" NAME="M_AXI_DC_ARSIZE" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[2:0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="231" MSB="1" NAME="M_AXI_DC_ARBURST" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="232" NAME="M_AXI_DC_ARLOCK" SIGNAME="__NOC__"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="233" MSB="3" NAME="M_AXI_DC_ARCACHE" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[3:0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="234" MSB="2" NAME="M_AXI_DC_ARPROT" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[2:0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="235" MSB="3" NAME="M_AXI_DC_ARQOS" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[3:0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="236" NAME="M_AXI_DC_ARVALID" SIGNAME="__NOC__"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="237" NAME="M_AXI_DC_ARREADY" SIGNAME="__NOC__"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="238" MSB="4" NAME="M_AXI_DC_ARUSER" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_M_AXI_DC_ARUSER_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="239" NAME="M_AXI_DC_RID" SIGNAME="__NOC__" VECFORMULA="[(C_M_AXI_DC_THREAD_ID_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="240" MSB="31" NAME="M_AXI_DC_RDATA" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_M_AXI_DC_DATA_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="241" MSB="1" NAME="M_AXI_DC_RRESP" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="242" NAME="M_AXI_DC_RLAST" SIGNAME="__NOC__"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="243" NAME="M_AXI_DC_RVALID" SIGNAME="__NOC__"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="244" NAME="M_AXI_DC_RREADY" SIGNAME="__NOC__"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="245" NAME="M_AXI_DC_RUSER" SIGNAME="__NOC__" VECFORMULA="[(C_M_AXI_DC_RUSER_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_AWID" DIR="O" MPD_INDEX="162" NAME="M_AXI_IC_AWID" SIGNAME="axi4_0_S_AWID" VECFORMULA="[(C_M_AXI_IC_THREAD_ID_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_AWADDR" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="163" MSB="31" NAME="M_AXI_IC_AWADDR" RIGHT="0" SIGNAME="axi4_0_S_AWADDR" VECFORMULA="[(C_M_AXI_IC_ADDR_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_AWLEN" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="164" MSB="7" NAME="M_AXI_IC_AWLEN" RIGHT="0" SIGNAME="axi4_0_S_AWLEN" VECFORMULA="[7:0]"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_AWSIZE" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="165" MSB="2" NAME="M_AXI_IC_AWSIZE" RIGHT="0" SIGNAME="axi4_0_S_AWSIZE" VECFORMULA="[2:0]"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_AWBURST" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="166" MSB="1" NAME="M_AXI_IC_AWBURST" RIGHT="0" SIGNAME="axi4_0_S_AWBURST" VECFORMULA="[1:0]"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_AWLOCK" DIR="O" MPD_INDEX="167" NAME="M_AXI_IC_AWLOCK" SIGNAME="axi4_0_S_AWLOCK"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_AWCACHE" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="168" MSB="3" NAME="M_AXI_IC_AWCACHE" RIGHT="0" SIGNAME="axi4_0_S_AWCACHE" VECFORMULA="[3:0]"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_AWPROT" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="169" MSB="2" NAME="M_AXI_IC_AWPROT" RIGHT="0" SIGNAME="axi4_0_S_AWPROT" VECFORMULA="[2:0]"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_AWQOS" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="170" MSB="3" NAME="M_AXI_IC_AWQOS" RIGHT="0" SIGNAME="axi4_0_S_AWQOS" VECFORMULA="[3:0]"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_AWVALID" DIR="O" MPD_INDEX="171" NAME="M_AXI_IC_AWVALID" SIGNAME="axi4_0_S_AWVALID"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_AWREADY" DIR="I" MPD_INDEX="172" NAME="M_AXI_IC_AWREADY" SIGNAME="axi4_0_S_AWREADY"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_AWUSER" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="173" MSB="4" NAME="M_AXI_IC_AWUSER" RIGHT="0" SIGNAME="axi4_0_S_AWUSER" VECFORMULA="[(C_M_AXI_IC_AWUSER_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_WDATA" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="174" MSB="31" NAME="M_AXI_IC_WDATA" RIGHT="0" SIGNAME="axi4_0_S_WDATA" VECFORMULA="[(C_M_AXI_IC_DATA_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_WSTRB" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="175" MSB="3" NAME="M_AXI_IC_WSTRB" RIGHT="0" SIGNAME="axi4_0_S_WSTRB" VECFORMULA="[((C_M_AXI_IC_DATA_WIDTH/8)-1):0]"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_WLAST" DIR="O" MPD_INDEX="176" NAME="M_AXI_IC_WLAST" SIGNAME="axi4_0_S_WLAST"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_WVALID" DIR="O" MPD_INDEX="177" NAME="M_AXI_IC_WVALID" SIGNAME="axi4_0_S_WVALID"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_WREADY" DIR="I" MPD_INDEX="178" NAME="M_AXI_IC_WREADY" SIGNAME="axi4_0_S_WREADY"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_WUSER" DIR="O" MPD_INDEX="179" NAME="M_AXI_IC_WUSER" SIGNAME="axi4_0_S_WUSER" VECFORMULA="[(C_M_AXI_IC_WUSER_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_BID" DIR="I" MPD_INDEX="180" NAME="M_AXI_IC_BID" SIGNAME="axi4_0_S_BID" VECFORMULA="[(C_M_AXI_IC_THREAD_ID_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_BRESP" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="181" MSB="1" NAME="M_AXI_IC_BRESP" RIGHT="0" SIGNAME="axi4_0_S_BRESP" VECFORMULA="[1:0]"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_BVALID" DIR="I" MPD_INDEX="182" NAME="M_AXI_IC_BVALID" SIGNAME="axi4_0_S_BVALID"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_BREADY" DIR="O" MPD_INDEX="183" NAME="M_AXI_IC_BREADY" SIGNAME="axi4_0_S_BREADY"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_BUSER" DIR="I" MPD_INDEX="184" NAME="M_AXI_IC_BUSER" SIGNAME="axi4_0_S_BUSER" VECFORMULA="[(C_M_AXI_IC_BUSER_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_ARID" DIR="O" MPD_INDEX="185" NAME="M_AXI_IC_ARID" SIGNAME="axi4_0_S_ARID" VECFORMULA="[(C_M_AXI_IC_THREAD_ID_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_ARADDR" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="186" MSB="31" NAME="M_AXI_IC_ARADDR" RIGHT="0" SIGNAME="axi4_0_S_ARADDR" VECFORMULA="[(C_M_AXI_IC_ADDR_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_ARLEN" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="187" MSB="7" NAME="M_AXI_IC_ARLEN" RIGHT="0" SIGNAME="axi4_0_S_ARLEN" VECFORMULA="[7:0]"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_ARSIZE" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="188" MSB="2" NAME="M_AXI_IC_ARSIZE" RIGHT="0" SIGNAME="axi4_0_S_ARSIZE" VECFORMULA="[2:0]"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_ARBURST" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="189" MSB="1" NAME="M_AXI_IC_ARBURST" RIGHT="0" SIGNAME="axi4_0_S_ARBURST" VECFORMULA="[1:0]"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_ARLOCK" DIR="O" MPD_INDEX="190" NAME="M_AXI_IC_ARLOCK" SIGNAME="axi4_0_S_ARLOCK"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_ARCACHE" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="191" MSB="3" NAME="M_AXI_IC_ARCACHE" RIGHT="0" SIGNAME="axi4_0_S_ARCACHE" VECFORMULA="[3:0]"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_ARPROT" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="192" MSB="2" NAME="M_AXI_IC_ARPROT" RIGHT="0" SIGNAME="axi4_0_S_ARPROT" VECFORMULA="[2:0]"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_ARQOS" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="193" MSB="3" NAME="M_AXI_IC_ARQOS" RIGHT="0" SIGNAME="axi4_0_S_ARQOS" VECFORMULA="[3:0]"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_ARVALID" DIR="O" MPD_INDEX="194" NAME="M_AXI_IC_ARVALID" SIGNAME="axi4_0_S_ARVALID"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_ARREADY" DIR="I" MPD_INDEX="195" NAME="M_AXI_IC_ARREADY" SIGNAME="axi4_0_S_ARREADY"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_ARUSER" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="196" MSB="4" NAME="M_AXI_IC_ARUSER" RIGHT="0" SIGNAME="axi4_0_S_ARUSER" VECFORMULA="[(C_M_AXI_IC_ARUSER_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_RID" DIR="I" MPD_INDEX="197" NAME="M_AXI_IC_RID" SIGNAME="axi4_0_S_RID" VECFORMULA="[(C_M_AXI_IC_THREAD_ID_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_RDATA" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="198" MSB="31" NAME="M_AXI_IC_RDATA" RIGHT="0" SIGNAME="axi4_0_S_RDATA" VECFORMULA="[(C_M_AXI_IC_DATA_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_RRESP" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="199" MSB="1" NAME="M_AXI_IC_RRESP" RIGHT="0" SIGNAME="axi4_0_S_RRESP" VECFORMULA="[1:0]"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_RLAST" DIR="I" MPD_INDEX="200" NAME="M_AXI_IC_RLAST" SIGNAME="axi4_0_S_RLAST"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_RVALID" DIR="I" MPD_INDEX="201" NAME="M_AXI_IC_RVALID" SIGNAME="axi4_0_S_RVALID"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_RREADY" DIR="O" MPD_INDEX="202" NAME="M_AXI_IC_RREADY" SIGNAME="axi4_0_S_RREADY"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_RUSER" DIR="I" MPD_INDEX="203" NAME="M_AXI_IC_RUSER" SIGNAME="axi4_0_S_RUSER" VECFORMULA="[(C_M_AXI_IC_RUSER_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_AWID" DIR="O" MPD_INDEX="204" NAME="M_AXI_DC_AWID" SIGNAME="axi4_0_S_AWID" VECFORMULA="[(C_M_AXI_DC_THREAD_ID_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_AWADDR" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="205" MSB="31" NAME="M_AXI_DC_AWADDR" RIGHT="0" SIGNAME="axi4_0_S_AWADDR" VECFORMULA="[(C_M_AXI_DC_ADDR_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_AWLEN" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="206" MSB="7" NAME="M_AXI_DC_AWLEN" RIGHT="0" SIGNAME="axi4_0_S_AWLEN" VECFORMULA="[7:0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_AWSIZE" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="207" MSB="2" NAME="M_AXI_DC_AWSIZE" RIGHT="0" SIGNAME="axi4_0_S_AWSIZE" VECFORMULA="[2:0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_AWBURST" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="208" MSB="1" NAME="M_AXI_DC_AWBURST" RIGHT="0" SIGNAME="axi4_0_S_AWBURST" VECFORMULA="[1:0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_AWLOCK" DIR="O" MPD_INDEX="209" NAME="M_AXI_DC_AWLOCK" SIGNAME="axi4_0_S_AWLOCK"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_AWCACHE" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="210" MSB="3" NAME="M_AXI_DC_AWCACHE" RIGHT="0" SIGNAME="axi4_0_S_AWCACHE" VECFORMULA="[3:0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_AWPROT" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="211" MSB="2" NAME="M_AXI_DC_AWPROT" RIGHT="0" SIGNAME="axi4_0_S_AWPROT" VECFORMULA="[2:0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_AWQOS" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="212" MSB="3" NAME="M_AXI_DC_AWQOS" RIGHT="0" SIGNAME="axi4_0_S_AWQOS" VECFORMULA="[3:0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_AWVALID" DIR="O" MPD_INDEX="213" NAME="M_AXI_DC_AWVALID" SIGNAME="axi4_0_S_AWVALID"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_AWREADY" DIR="I" MPD_INDEX="214" NAME="M_AXI_DC_AWREADY" SIGNAME="axi4_0_S_AWREADY"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_AWUSER" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="215" MSB="4" NAME="M_AXI_DC_AWUSER" RIGHT="0" SIGNAME="axi4_0_S_AWUSER" VECFORMULA="[(C_M_AXI_DC_AWUSER_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_WDATA" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="216" MSB="31" NAME="M_AXI_DC_WDATA" RIGHT="0" SIGNAME="axi4_0_S_WDATA" VECFORMULA="[(C_M_AXI_DC_DATA_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_WSTRB" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="217" MSB="3" NAME="M_AXI_DC_WSTRB" RIGHT="0" SIGNAME="axi4_0_S_WSTRB" VECFORMULA="[((C_M_AXI_DC_DATA_WIDTH/8)-1):0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_WLAST" DIR="O" MPD_INDEX="218" NAME="M_AXI_DC_WLAST" SIGNAME="axi4_0_S_WLAST"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_WVALID" DIR="O" MPD_INDEX="219" NAME="M_AXI_DC_WVALID" SIGNAME="axi4_0_S_WVALID"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_WREADY" DIR="I" MPD_INDEX="220" NAME="M_AXI_DC_WREADY" SIGNAME="axi4_0_S_WREADY"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_WUSER" DIR="O" MPD_INDEX="221" NAME="M_AXI_DC_WUSER" SIGNAME="axi4_0_S_WUSER" VECFORMULA="[(C_M_AXI_DC_WUSER_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_BID" DIR="I" MPD_INDEX="222" NAME="M_AXI_DC_BID" SIGNAME="axi4_0_S_BID" VECFORMULA="[(C_M_AXI_DC_THREAD_ID_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_BRESP" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="223" MSB="1" NAME="M_AXI_DC_BRESP" RIGHT="0" SIGNAME="axi4_0_S_BRESP" VECFORMULA="[1:0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_BVALID" DIR="I" MPD_INDEX="224" NAME="M_AXI_DC_BVALID" SIGNAME="axi4_0_S_BVALID"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_BREADY" DIR="O" MPD_INDEX="225" NAME="M_AXI_DC_BREADY" SIGNAME="axi4_0_S_BREADY"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_BUSER" DIR="I" MPD_INDEX="226" NAME="M_AXI_DC_BUSER" SIGNAME="axi4_0_S_BUSER" VECFORMULA="[(C_M_AXI_DC_BUSER_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_ARID" DIR="O" MPD_INDEX="227" NAME="M_AXI_DC_ARID" SIGNAME="axi4_0_S_ARID" VECFORMULA="[(C_M_AXI_DC_THREAD_ID_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_ARADDR" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="228" MSB="31" NAME="M_AXI_DC_ARADDR" RIGHT="0" SIGNAME="axi4_0_S_ARADDR" VECFORMULA="[(C_M_AXI_DC_ADDR_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_ARLEN" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="229" MSB="7" NAME="M_AXI_DC_ARLEN" RIGHT="0" SIGNAME="axi4_0_S_ARLEN" VECFORMULA="[7:0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_ARSIZE" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="230" MSB="2" NAME="M_AXI_DC_ARSIZE" RIGHT="0" SIGNAME="axi4_0_S_ARSIZE" VECFORMULA="[2:0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_ARBURST" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="231" MSB="1" NAME="M_AXI_DC_ARBURST" RIGHT="0" SIGNAME="axi4_0_S_ARBURST" VECFORMULA="[1:0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_ARLOCK" DIR="O" MPD_INDEX="232" NAME="M_AXI_DC_ARLOCK" SIGNAME="axi4_0_S_ARLOCK"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_ARCACHE" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="233" MSB="3" NAME="M_AXI_DC_ARCACHE" RIGHT="0" SIGNAME="axi4_0_S_ARCACHE" VECFORMULA="[3:0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_ARPROT" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="234" MSB="2" NAME="M_AXI_DC_ARPROT" RIGHT="0" SIGNAME="axi4_0_S_ARPROT" VECFORMULA="[2:0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_ARQOS" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="235" MSB="3" NAME="M_AXI_DC_ARQOS" RIGHT="0" SIGNAME="axi4_0_S_ARQOS" VECFORMULA="[3:0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_ARVALID" DIR="O" MPD_INDEX="236" NAME="M_AXI_DC_ARVALID" SIGNAME="axi4_0_S_ARVALID"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_ARREADY" DIR="I" MPD_INDEX="237" NAME="M_AXI_DC_ARREADY" SIGNAME="axi4_0_S_ARREADY"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_ARUSER" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="238" MSB="4" NAME="M_AXI_DC_ARUSER" RIGHT="0" SIGNAME="axi4_0_S_ARUSER" VECFORMULA="[(C_M_AXI_DC_ARUSER_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_RID" DIR="I" MPD_INDEX="239" NAME="M_AXI_DC_RID" SIGNAME="axi4_0_S_RID" VECFORMULA="[(C_M_AXI_DC_THREAD_ID_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_RDATA" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="240" MSB="31" NAME="M_AXI_DC_RDATA" RIGHT="0" SIGNAME="axi4_0_S_RDATA" VECFORMULA="[(C_M_AXI_DC_DATA_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_RRESP" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="241" MSB="1" NAME="M_AXI_DC_RRESP" RIGHT="0" SIGNAME="axi4_0_S_RRESP" VECFORMULA="[1:0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_RLAST" DIR="I" MPD_INDEX="242" NAME="M_AXI_DC_RLAST" SIGNAME="axi4_0_S_RLAST"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_RVALID" DIR="I" MPD_INDEX="243" NAME="M_AXI_DC_RVALID" SIGNAME="axi4_0_S_RVALID"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_RREADY" DIR="O" MPD_INDEX="244" NAME="M_AXI_DC_RREADY" SIGNAME="axi4_0_S_RREADY"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_RUSER" DIR="I" MPD_INDEX="245" NAME="M_AXI_DC_RUSER" SIGNAME="axi4_0_S_RUSER" VECFORMULA="[(C_M_AXI_DC_RUSER_WIDTH-1):0]"/>
<PORT BUS="DEBUG" DEF_SIGNAME="microblaze_0_debug_Dbg_Clk" DIR="I" MPD_INDEX="246" NAME="DBG_CLK" SIGNAME="microblaze_0_debug_Dbg_Clk"/>
<PORT BUS="DEBUG" DEF_SIGNAME="microblaze_0_debug_Dbg_TDI" DIR="I" MPD_INDEX="247" NAME="DBG_TDI" SIGNAME="microblaze_0_debug_Dbg_TDI"/>
<PORT BUS="DEBUG" DEF_SIGNAME="microblaze_0_debug_Dbg_TDO" DIR="O" MPD_INDEX="248" NAME="DBG_TDO" SIGNAME="microblaze_0_debug_Dbg_TDO"/>
<PORTMAP DIR="O" PHYSICAL="M_AXI_IP_RREADY"/>
</PORTMAPS>
</BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_DATA="TRUE" IS_VALID="FALSE" MPD_INDEX="104" NAME="M_AXI_DC" PROTOCOL="AXI4" TYPE="MASTER">
+ <BUSINTERFACE BUSNAME="axi4_0" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_DATA="TRUE" IS_INSTANTIATED="TRUE" MHS_INDEX="4" MPD_INDEX="104" NAME="M_AXI_DC" PROTOCOL="AXI4" TYPE="MASTER">
<PORTMAPS>
<PORTMAP DIR="I" PHYSICAL="CLK"/>
<PORTMAP DIR="O" PHYSICAL="M_AXI_DC_AWID"/>
<PORTMAP DIR="I" PHYSICAL="M_AXI_DC_RUSER"/>
</PORTMAPS>
</BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_INSTRUCTION="TRUE" IS_VALID="FALSE" MPD_INDEX="105" NAME="M_AXI_IC" PROTOCOL="AXI4" TYPE="MASTER">
+ <BUSINTERFACE BUSNAME="axi4_0" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_INSTANTIATED="TRUE" IS_INSTRUCTION="TRUE" MHS_INDEX="5" MPD_INDEX="105" NAME="M_AXI_IC" PROTOCOL="AXI4" TYPE="MASTER">
<PORTMAPS>
<PORTMAP DIR="I" PHYSICAL="CLK"/>
<PORTMAP DIR="O" PHYSICAL="M_AXI_IC_AWID"/>
<ROUTEPNT INDEX="0" INSTANCE="microblaze_0_ilmb"/>
</ACCESSROUTE>
</MEMRANGE>
- <MEMRANGE BASEDECIMAL="1954545664" BASENAME="C_BASEADDR" BASEVALUE="0x74800000" HIGHDECIMAL="1955594239" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x748FFFFF" INSTANCE="debug_module" IS_DATA="TRUE" IS_INSTRUCTION="FALSE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="1048576" SIZEABRV="1M">
+ <MEMRANGE BASEDECIMAL="1954545664" BASENAME="C_BASEADDR" BASEVALUE="0x74800000" HIGHDECIMAL="1954611199" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x7480FFFF" INSTANCE="debug_module" IS_DATA="TRUE" IS_INSTRUCTION="FALSE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
<ACCESSROUTE>
<ROUTEPNT INDEX="0" INSTANCE="axi4lite_0"/>
</ACCESSROUTE>
<ROUTEPNT INDEX="0" INSTANCE="axi4lite_0"/>
</ACCESSROUTE>
</MEMRANGE>
+ <MEMRANGE BASEDECIMAL="2147483648" BASENAME="C_S0_AXI_BASEADDR" BASEVALUE="0x80000000" HIGHDECIMAL="2155872255" HIGHNAME="C_S0_AXI_HIGHADDR" HIGHVALUE="0x807FFFFF" INSTANCE="MCB_DDR3" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="MEMORY" SIZE="8388608" SIZEABRV="8M">
+ <ACCESSROUTE>
+ <ROUTEPNT INDEX="0" INSTANCE="axi4_0"/>
+ </ACCESSROUTE>
+ </MEMRANGE>
</MEMORYMAP>
<PERIPHERALS>
<PERIPHERAL INSTANCE="microblaze_0_d_bram_ctrl"/>
<PERIPHERAL INSTANCE="ETHERNET_dma"/>
<PERIPHERAL INSTANCE="microblaze_0_intc"/>
<PERIPHERAL INSTANCE="axi_timer_0"/>
+ <PERIPHERAL INSTANCE="MCB_DDR3"/>
</PERIPHERALS>
<INTERRUPTINFO TYPE="TARGET">
<SOURCE INSTANCE="microblaze_0_intc" INTC_INDEX="0"/>
<DESCRIPTION>LMB BRAM High Address</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="2" NAME="C_FAMILY" TYPE="string" VALUE="spartan6"/>
- <PARAMETER CHANGEDBY="SYSTEM" ENDIAN="BIG" LSB="31" MPD_INDEX="3" MSB="0" NAME="C_MASK" TYPE="std_logic_vector" VALUE="0x40000000">
+ <PARAMETER CHANGEDBY="SYSTEM" ENDIAN="BIG" LSB="31" MPD_INDEX="3" MSB="0" NAME="C_MASK" TYPE="std_logic_vector" VALUE="0xc0000000">
<DESCRIPTION>LMB Address Decode Mask</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="4" NAME="C_LMB_AWIDTH" TYPE="integer" VALUE="32">
<DESCRIPTION>LMB BRAM High Address</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="2" NAME="C_FAMILY" TYPE="string" VALUE="spartan6"/>
- <PARAMETER CHANGEDBY="SYSTEM" ENDIAN="BIG" LSB="31" MPD_INDEX="3" MSB="0" NAME="C_MASK" TYPE="std_logic_vector" VALUE="0x40000000">
+ <PARAMETER CHANGEDBY="SYSTEM" ENDIAN="BIG" LSB="31" MPD_INDEX="3" MSB="0" NAME="C_MASK" TYPE="std_logic_vector" VALUE="0xc0000000">
<DESCRIPTION>LMB Address Decode Mask</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="4" NAME="C_LMB_AWIDTH" TYPE="integer" VALUE="32">
<PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="9" MPD_INDEX="3" NAME="C_BASEADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x74800000">
<DESCRIPTION>Base Address</DESCRIPTION>
</PARAMETER>
- <PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="10" MPD_INDEX="4" NAME="C_HIGHADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x748FFFFF">
+ <PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="10" MPD_INDEX="4" NAME="C_HIGHADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x7480FFFF">
<DESCRIPTION>High Address</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="5" NAME="C_SPLB_AWIDTH" TYPE="INTEGER" VALUE="32">
</BUSINTERFACE>
</BUSINTERFACES>
<MEMORYMAP>
- <MEMRANGE BASEDECIMAL="1954545664" BASENAME="C_BASEADDR" BASEVALUE="0x74800000" HIGHDECIMAL="1955594239" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x748FFFFF" MEMTYPE="REGISTER" MINSIZE="0x100" SIZE="1048576" SIZEABRV="1M">
+ <MEMRANGE BASEDECIMAL="1954545664" BASENAME="C_BASEADDR" BASEVALUE="0x74800000" HIGHDECIMAL="1954611199" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x7480FFFF" MEMTYPE="REGISTER" MINSIZE="0x100" SIZE="65536" SIZEABRV="64K">
<SLAVES>
<SLAVE BUSINTERFACE="SPLB"/>
<SLAVE BUSINTERFACE="S_AXI"/>
<PARAMETER MPD_INDEX="3" NAME="C_MCB_PERFORMANCE" TYPE="STRING" VALUE="STANDARD"/>
<PARAMETER MPD_INDEX="4" NAME="C_BYPASS_CORE_UCF" VALUE="0"/>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="MEMORY" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="11" MPD_INDEX="5" NAME="C_S0_AXI_BASEADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x80000000"/>
- <PARAMETER ADDRESS="HIGH" ADDR_TYPE="MEMORY" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="12" MPD_INDEX="6" NAME="C_S0_AXI_HIGHADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x87ffffff"/>
+ <PARAMETER ADDRESS="HIGH" ADDR_TYPE="MEMORY" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="12" MPD_INDEX="6" NAME="C_S0_AXI_HIGHADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x807FFFFF"/>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="MEMORY" MPD_INDEX="7" NAME="C_S1_AXI_BASEADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0xFFFFFFFF"/>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="MEMORY" MPD_INDEX="8" NAME="C_S1_AXI_HIGHADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000"/>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="MEMORY" MPD_INDEX="9" NAME="C_S2_AXI_BASEADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0xFFFFFFFF"/>
<PARAMETER MPD_INDEX="67" NAME="C_ARB_TIME_SLOT_11" TYPE="STD_LOGIC_VECTOR" VALUE="0b000000011000001010"/>
<PARAMETER MPD_INDEX="68" NAME="C_S0_AXI_ENABLE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="69" NAME="C_S0_AXI_PROTOCOL" TYPE="STRING" VALUE="AXI4"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="70" NAME="C_S0_AXI_ID_WIDTH" TYPE="INTEGER" VALUE="2"/>
+ <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="70" NAME="C_S0_AXI_ID_WIDTH" TYPE="INTEGER" VALUE="3"/>
<PARAMETER MPD_INDEX="71" NAME="C_S0_AXI_ADDR_WIDTH" TYPE="INTEGER" VALUE="32"/>
<PARAMETER MPD_INDEX="72" NAME="C_S0_AXI_DATA_WIDTH" TYPE="INTEGER" VALUE="32"/>
<PARAMETER MPD_INDEX="73" NAME="C_S0_AXI_SUPPORTS_READ" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="151" NAME="C_INTERCONNECT_S5_AXI_WRITE_ACCEPTANCE" TYPE="INTEGER" VALUE="4"/>
<PARAMETER MPD_INDEX="152" NAME="C_MCB_USE_EXTERNAL_BUFPLL" TYPE="INTEGER" VALUE="0"/>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="153" NAME="C_SYS_RST_PRESENT" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="5" NAME="C_INTERCONNECT_S0_AXI_MASTERS" VALUE="ETHERNET_dma.M_AXI_SG & ETHERNET_dma.M_AXI_MM2S & ETHERNET_dma.M_AXI_S2MM"/>
+ <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="5" NAME="C_INTERCONNECT_S0_AXI_MASTERS" VALUE="microblaze_0.M_AXI_DC & microblaze_0.M_AXI_IC & ETHERNET_dma.M_AXI_SG & ETHERNET_dma.M_AXI_MM2S & ETHERNET_dma.M_AXI_S2MM"/>
<PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="6" NAME="C_INTERCONNECT_S0_AXI_AW_REGISTER" VALUE="1"/>
<PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="7" NAME="C_INTERCONNECT_S0_AXI_AR_REGISTER" VALUE="1"/>
<PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="8" NAME="C_INTERCONNECT_S0_AXI_W_REGISTER" VALUE="1"/>
<PORT DIR="O" MPD_INDEX="9" NAME="pll_ce_90_bufpll_o" SIGNAME="__NOC__"/>
<PORT DIR="O" MPD_INDEX="31" NAME="uo_done_cal" SIGNAME="__NOC__"/>
<PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_aresetn" DIR="I" MPD_INDEX="33" NAME="s0_axi_aresetn" SIGIS="RST" SIGNAME="axi4_0_M_aresetn"/>
- <PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_awid" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="34" MSB="1" NAME="s0_axi_awid" RIGHT="0" SIGNAME="axi4_0_M_awid" VECFORMULA="[(C_S0_AXI_ID_WIDTH-1):0]"/>
+ <PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_awid" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="34" MSB="2" NAME="s0_axi_awid" RIGHT="0" SIGNAME="axi4_0_M_awid" VECFORMULA="[(C_S0_AXI_ID_WIDTH-1):0]"/>
<PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_awaddr" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="35" MSB="31" NAME="s0_axi_awaddr" RIGHT="0" SIGNAME="axi4_0_M_awaddr" VECFORMULA="[(C_S0_AXI_ADDR_WIDTH-1):0]"/>
<PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_awlen" DIR="I" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="36" MSB="7" NAME="s0_axi_awlen" RIGHT="0" SIGNAME="axi4_0_M_awlen" VECFORMULA="[7:0]"/>
<PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_awsize" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="37" MSB="2" NAME="s0_axi_awsize" RIGHT="0" SIGNAME="axi4_0_M_awsize" VECFORMULA="[2:0]"/>
<PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_wlast" DIR="I" MPD_INDEX="47" NAME="s0_axi_wlast" SIGNAME="axi4_0_M_wlast"/>
<PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_wvalid" DIR="I" MPD_INDEX="48" NAME="s0_axi_wvalid" SIGNAME="axi4_0_M_wvalid"/>
<PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_wready" DIR="O" MPD_INDEX="49" NAME="s0_axi_wready" SIGNAME="axi4_0_M_wready"/>
- <PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_bid" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="50" MSB="1" NAME="s0_axi_bid" RIGHT="0" SIGNAME="axi4_0_M_bid" VECFORMULA="[(C_S0_AXI_ID_WIDTH-1):0]"/>
+ <PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_bid" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="50" MSB="2" NAME="s0_axi_bid" RIGHT="0" SIGNAME="axi4_0_M_bid" VECFORMULA="[(C_S0_AXI_ID_WIDTH-1):0]"/>
<PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_bresp" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="51" MSB="1" NAME="s0_axi_bresp" RIGHT="0" SIGNAME="axi4_0_M_bresp" VECFORMULA="[1:0]"/>
<PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_bvalid" DIR="O" MPD_INDEX="52" NAME="s0_axi_bvalid" SIGNAME="axi4_0_M_bvalid"/>
<PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_bready" DIR="I" MPD_INDEX="53" NAME="s0_axi_bready" SIGNAME="axi4_0_M_bready"/>
- <PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_arid" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="54" MSB="1" NAME="s0_axi_arid" RIGHT="0" SIGNAME="axi4_0_M_arid" VECFORMULA="[(C_S0_AXI_ID_WIDTH-1):0]"/>
+ <PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_arid" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="54" MSB="2" NAME="s0_axi_arid" RIGHT="0" SIGNAME="axi4_0_M_arid" VECFORMULA="[(C_S0_AXI_ID_WIDTH-1):0]"/>
<PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_araddr" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="55" MSB="31" NAME="s0_axi_araddr" RIGHT="0" SIGNAME="axi4_0_M_araddr" VECFORMULA="[(C_S0_AXI_ADDR_WIDTH-1):0]"/>
<PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_arlen" DIR="I" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="56" MSB="7" NAME="s0_axi_arlen" RIGHT="0" SIGNAME="axi4_0_M_arlen" VECFORMULA="[7:0]"/>
<PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_arsize" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="57" MSB="2" NAME="s0_axi_arsize" RIGHT="0" SIGNAME="axi4_0_M_arsize" VECFORMULA="[2:0]"/>
<PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_arqos" DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="62" MSB="3" NAME="s0_axi_arqos" RIGHT="0" SIGNAME="axi4_0_M_arqos" VECFORMULA="[3:0]"/>
<PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_arvalid" DIR="I" MPD_INDEX="63" NAME="s0_axi_arvalid" SIGNAME="axi4_0_M_arvalid"/>
<PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_arready" DIR="O" MPD_INDEX="64" NAME="s0_axi_arready" SIGNAME="axi4_0_M_arready"/>
- <PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_rid" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="65" MSB="1" NAME="s0_axi_rid" RIGHT="0" SIGNAME="axi4_0_M_rid" VECFORMULA="[(C_S0_AXI_ID_WIDTH-1):0]"/>
+ <PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_rid" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="65" MSB="2" NAME="s0_axi_rid" RIGHT="0" SIGNAME="axi4_0_M_rid" VECFORMULA="[(C_S0_AXI_ID_WIDTH-1):0]"/>
<PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_rdata" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="66" MSB="31" NAME="s0_axi_rdata" RIGHT="0" SIGNAME="axi4_0_M_rdata" VECFORMULA="[(C_S0_AXI_DATA_WIDTH-1):0]"/>
<PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_rresp" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="67" MSB="1" NAME="s0_axi_rresp" RIGHT="0" SIGNAME="axi4_0_M_rresp" VECFORMULA="[1:0]"/>
<PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_rlast" DIR="O" MPD_INDEX="68" NAME="s0_axi_rlast" SIGNAME="axi4_0_M_rlast"/>
<PORTMAP DIR="I" PHYSICAL="s0_axi_rready"/>
</PORTMAPS>
<MASTERS>
+ <MASTER BUSINTERFACE="M_AXI_DC" INSTANCE="microblaze_0"/>
+ <MASTER BUSINTERFACE="M_AXI_IC" INSTANCE="microblaze_0"/>
<MASTER BUSINTERFACE="M_AXI_SG" INSTANCE="ETHERNET_dma"/>
<MASTER BUSINTERFACE="M_AXI_MM2S" INSTANCE="ETHERNET_dma"/>
<MASTER BUSINTERFACE="M_AXI_S2MM" INSTANCE="ETHERNET_dma"/>
</IOINTERFACE>
</IOINTERFACES>
<MEMORYMAP>
- <MEMRANGE BASEDECIMAL="2147483648" BASENAME="C_S0_AXI_BASEADDR" BASEVALUE="0x80000000" HIGHDECIMAL="2281701375" HIGHNAME="C_S0_AXI_HIGHADDR" HIGHVALUE="0x87ffffff" IS_CACHEABLE="TRUE" IS_DCACHED="TRUE" IS_ICACHED="TRUE" MEMTYPE="MEMORY" MINSIZE="0x1000" SIZE="134217728" SIZEABRV="128M">
+ <MEMRANGE BASEDECIMAL="2147483648" BASENAME="C_S0_AXI_BASEADDR" BASEVALUE="0x80000000" HIGHDECIMAL="2155872255" HIGHNAME="C_S0_AXI_HIGHADDR" HIGHVALUE="0x807FFFFF" IS_CACHEABLE="TRUE" IS_DCACHED="TRUE" IS_ICACHED="TRUE" MEMTYPE="MEMORY" MINSIZE="0x1000" SIZE="8388608" SIZEABRV="8M">
<SLAVES>
<SLAVE BUSINTERFACE="S0_AXI"/>
</SLAVES>
\r
ADDRESS_SPACE microblaze_0_bram_block_combined RAMB16 [0x00000000:0x00001FFF]\r
BUS_BLOCK\r
- microblaze_0_bram_block/microblaze_0_bram_block/ramb16bwer_0 [31:24] INPUT = microblaze_0_bram_block_combined_0.mem PLACED = X0Y24;\r
- microblaze_0_bram_block/microblaze_0_bram_block/ramb16bwer_1 [23:16] INPUT = microblaze_0_bram_block_combined_1.mem PLACED = X0Y26;\r
- microblaze_0_bram_block/microblaze_0_bram_block/ramb16bwer_2 [15:8] INPUT = microblaze_0_bram_block_combined_2.mem PLACED = X0Y22;\r
- microblaze_0_bram_block/microblaze_0_bram_block/ramb16bwer_3 [7:0] INPUT = microblaze_0_bram_block_combined_3.mem PLACED = X0Y28;\r
+ microblaze_0_bram_block/microblaze_0_bram_block/ramb16bwer_0 [31:24] INPUT = microblaze_0_bram_block_combined_0.mem PLACED = X3Y26;\r
+ microblaze_0_bram_block/microblaze_0_bram_block/ramb16bwer_1 [23:16] INPUT = microblaze_0_bram_block_combined_1.mem PLACED = X3Y28;\r
+ microblaze_0_bram_block/microblaze_0_bram_block/ramb16bwer_2 [15:8] INPUT = microblaze_0_bram_block_combined_2.mem PLACED = X2Y30;\r
+ microblaze_0_bram_block/microblaze_0_bram_block/ramb16bwer_3 [7:0] INPUT = microblaze_0_bram_block_combined_3.mem PLACED = X2Y28;\r
END_BUS_BLOCK;\r
END_ADDRESS_SPACE;\r
\r
<TD COLSPAN="2" BGCOLOR="#AA0017" ALIGN="CENTER"><SPAN style="color:#FFFFFF; font: bold 14px Verdana,Arial,Helvetica,sans-serif">Specifics</SPAN></TD>
<TR></TR>
<TD COLSPAN="1" BGCOLOR="#CECECE" ALIGN="LEFT" WIDTH="30%"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">Generated</SPAN></TD>
-<TD COLSPAN="1" BGCOLOR="#FFFFFF" ALIGN="CENTER" WIDTH="70%"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">Sat Aug 27 12:49:18 2011</SPAN></TD>
+<TD COLSPAN="1" BGCOLOR="#FFFFFF" ALIGN="CENTER" WIDTH="70%"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">Sat Aug 27 15:05:44 2011</SPAN></TD>
<TR></TR>
<TD COLSPAN="1" BGCOLOR="#CECECE" ALIGN="LEFT" WIDTH="30%"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">EDK Version</SPAN></TD>
<TD COLSPAN="1" BGCOLOR="#FFFFFF" ALIGN="CENTER"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">13.1</SPAN></TD>
<TD COLSPAN="3" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><A HREF="#ANCHOR_microblaze_0_ilmb" style="text-decoration:none"><SPAN style="color:#AA0017; font: italic 12px Verdana,Arial,Helvetica,sans-serif">microblaze_0_ilmb</SPAN></A></TD>
<TD COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><A HREF="#ANCHOR_microblaze_0_i_bram_ctrl" style="text-decoration:none"><SPAN style="color:#AA0017; font: italic 12px Verdana,Arial,Helvetica,sans-serif">microblaze_0_i_bram_ctrl</SPAN></A></TD>
<TR></TR>
+<TD COLSPAN="1" WIDTH="10%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">M_AXI_DC</SPAN></TD>
+<TD COLSPAN="1" WIDTH="15%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">MASTER</SPAN></TD>
+<TD COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">AXI</SPAN></TD>
+<TD COLSPAN="3" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><A HREF="#ANCHOR_axi4_0" style="text-decoration:none"><SPAN style="color:#AA0017; font: italic 12px Verdana,Arial,Helvetica,sans-serif">axi4_0</SPAN></A></TD>
+<TD COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold italic 11px san-serif Verdana,Arial,Helvetica,sans-serif">2 Peripherals.</SPAN></TD>
+<TR></TR>
+<TD COLSPAN="1" WIDTH="10%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">M_AXI_IC</SPAN></TD>
+<TD COLSPAN="1" WIDTH="15%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">MASTER</SPAN></TD>
+<TD COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">AXI</SPAN></TD>
+<TD COLSPAN="3" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><A HREF="#ANCHOR_axi4_0" style="text-decoration:none"><SPAN style="color:#AA0017; font: italic 12px Verdana,Arial,Helvetica,sans-serif">axi4_0</SPAN></A></TD>
+<TD COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold italic 11px san-serif Verdana,Arial,Helvetica,sans-serif">2 Peripherals.</SPAN></TD>
+<TR></TR>
<TD COLSPAN="1" WIDTH="10%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">DEBUG</SPAN></TD>
<TD COLSPAN="1" WIDTH="15%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">TARGET</SPAN></TD>
<TD COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">XIL_MBDEBUG3</SPAN></TD>
<TD COLSPAN="1" WIDTH="50%" ALIGN="LEFT" BGCOLOR="#FFFFAA"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">C_ICACHE_HIGHADDR</SPAN></TD>
<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#FFFFAA"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">0xC7FFFFFF</SPAN></TD>
<TR></TR>
-<TD COLSPAN="1" WIDTH="50%" ALIGN="LEFT" BGCOLOR="#CECECE"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">C_USE_ICACHE</SPAN></TD>
-<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#CECECE"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">0</SPAN></TD>
+<TD COLSPAN="1" WIDTH="50%" ALIGN="LEFT" BGCOLOR="#FFFFAA"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">C_USE_ICACHE</SPAN></TD>
+<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#FFFFAA"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">1</SPAN></TD>
<TR></TR>
<TD COLSPAN="1" WIDTH="50%" ALIGN="LEFT" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">C_ALLOW_ICACHE_WR</SPAN></TD>
<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">1</SPAN></TD>
<TD COLSPAN="1" WIDTH="50%" ALIGN="LEFT" BGCOLOR="#CECECE"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">C_ADDR_TAG_BITS</SPAN></TD>
<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#CECECE"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">17</SPAN></TD>
<TR></TR>
-<TD COLSPAN="1" WIDTH="50%" ALIGN="LEFT" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">C_CACHE_BYTE_SIZE</SPAN></TD>
-<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">8192</SPAN></TD>
+<TD COLSPAN="1" WIDTH="50%" ALIGN="LEFT" BGCOLOR="#FFFFAA"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">C_CACHE_BYTE_SIZE</SPAN></TD>
+<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#FFFFAA"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">16384</SPAN></TD>
<TR></TR>
<TD COLSPAN="1" WIDTH="50%" ALIGN="LEFT" BGCOLOR="#CECECE"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">C_ICACHE_USE_FSL</SPAN></TD>
<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#CECECE"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">1</SPAN></TD>
<TD COLSPAN="1" WIDTH="50%" ALIGN="LEFT" BGCOLOR="#FFFFAA"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">C_DCACHE_HIGHADDR</SPAN></TD>
<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#FFFFAA"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">0xC7FFFFFF</SPAN></TD>
<TR></TR>
-<TD COLSPAN="1" WIDTH="50%" ALIGN="LEFT" BGCOLOR="#CECECE"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">C_USE_DCACHE</SPAN></TD>
-<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#CECECE"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">0</SPAN></TD>
+<TD COLSPAN="1" WIDTH="50%" ALIGN="LEFT" BGCOLOR="#FFFFAA"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">C_USE_DCACHE</SPAN></TD>
+<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#FFFFAA"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">1</SPAN></TD>
<TR></TR>
<TD COLSPAN="1" WIDTH="50%" ALIGN="LEFT" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">C_ALLOW_DCACHE_WR</SPAN></TD>
<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">1</SPAN></TD>
<TD COLSPAN="1" WIDTH="50%" ALIGN="LEFT" BGCOLOR="#CECECE"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">C_DCACHE_ADDR_TAG</SPAN></TD>
<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#CECECE"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">17</SPAN></TD>
<TR></TR>
-<TD COLSPAN="1" WIDTH="50%" ALIGN="LEFT" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">C_DCACHE_BYTE_SIZE</SPAN></TD>
-<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">8192</SPAN></TD>
+<TD COLSPAN="1" WIDTH="50%" ALIGN="LEFT" BGCOLOR="#FFFFAA"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">C_DCACHE_BYTE_SIZE</SPAN></TD>
+<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#FFFFAA"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">16384</SPAN></TD>
<TR></TR>
<TD COLSPAN="1" WIDTH="50%" ALIGN="LEFT" BGCOLOR="#CECECE"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">C_DCACHE_USE_FSL</SPAN></TD>
<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#CECECE"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">1</SPAN></TD>
<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#FFFFAA"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">0x74800000</SPAN></TD>
<TR></TR>
<TD COLSPAN="1" WIDTH="50%" ALIGN="left" BGCOLOR="#FFFFAA"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">C_HIGHADDR</SPAN></TD>
-<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#FFFFAA"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">0x748FFFFF</SPAN></TD>
+<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#FFFFAA"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">0x7480FFFF</SPAN></TD>
<TR></TR>
<TD COLSPAN="1" WIDTH="50%" ALIGN="left" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">C_SPLB_AWIDTH</SPAN></TD>
<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">32</SPAN></TD>
<TH COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#CECECE"><SPAN style="color:#000000; font: bold 9px Verdana,Arial,Helvetica,sans-serif">INTERFACE TYPE</SPAN></TH>
<TH COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#CECECE"><SPAN style="color:#000000; font: bold 9px Verdana,Arial,Helvetica,sans-serif">INTERFACE NAME</SPAN></TH>
<TR></TR>
+<TD COLSPAN="5" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><A HREF="#ANCHOR_microblaze_0" style="text-decoration:none"><SPAN style="color:#AA0017; font: italic 12px Verdana,Arial,Helvetica,sans-serif">microblaze_0</SPAN></A></TD>
+<TD COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">MASTER</SPAN></TD>
+<TD COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">M_AXI_DC</SPAN></TD>
+<TR></TR>
+<TD COLSPAN="5" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><A HREF="#ANCHOR_microblaze_0" style="text-decoration:none"><SPAN style="color:#AA0017; font: italic 12px Verdana,Arial,Helvetica,sans-serif">microblaze_0</SPAN></A></TD>
+<TD COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">MASTER</SPAN></TD>
+<TD COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">M_AXI_IC</SPAN></TD>
+<TR></TR>
<TD COLSPAN="5" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><A HREF="#ANCHOR_ETHERNET_dma" style="text-decoration:none"><SPAN style="color:#AA0017; font: italic 12px Verdana,Arial,Helvetica,sans-serif">ETHERNET_dma</SPAN></A></TD>
<TD COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">MASTER</SPAN></TD>
<TD COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">M_AXI_SG</SPAN></TD>
<TD COLSPAN="1" WIDTH="15%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">SLAVE</SPAN></TD>
<TD COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">AXI</SPAN></TD>
<TD COLSPAN="3" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><A HREF="#ANCHOR_axi4_0" style="text-decoration:none"><SPAN style="color:#AA0017; font: italic 12px Verdana,Arial,Helvetica,sans-serif">axi4_0</SPAN></A></TD>
-<TD COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><A HREF="#ANCHOR_ETHERNET_dma" style="text-decoration:none"><SPAN style="color:#AA0017; font: italic 12px Verdana,Arial,Helvetica,sans-serif">ETHERNET_dma</SPAN></A></TD>
+<TD COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold italic 11px san-serif Verdana,Arial,Helvetica,sans-serif">2 Peripherals.</SPAN></TD>
</TABLE>
<BR><BR>
</TD>
<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#FFFFAA"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">0x80000000</SPAN></TD>
<TR></TR>
<TD COLSPAN="1" WIDTH="50%" ALIGN="left" BGCOLOR="#FFFFAA"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">C_S0_AXI_HIGHADDR</SPAN></TD>
-<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#FFFFAA"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">0x87FFFFFF</SPAN></TD>
+<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#FFFFAA"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">0x807FFFFF</SPAN></TD>
<TR></TR>
<TD COLSPAN="1" WIDTH="50%" ALIGN="left" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">C_S1_AXI_BASEADDR</SPAN></TD>
<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">0xFFFFFFFF</SPAN></TD>
<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">0</SPAN></TD>
<TR></TR>
<TD COLSPAN="1" WIDTH="50%" ALIGN="LEFT" BGCOLOR="#CECECE"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">C_INTERCONNECT_S0_AXI_MASTERS</SPAN></TD>
-<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#CECECE"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">ETHERNET_dma.M_AXI_SG & ETHERNET_dma.M_AXI_MM2S & ETHERNET_dma.M_AXI_S2MM</SPAN></TD>
+<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#CECECE"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">microblaze_0.M_AXI_DC & microblaze_0.M_AXI_IC & ETHERNET_dma.M_AXI_SG & ETHERNET_dma.M_AXI_MM2S & ETHERNET_dma.M_AXI_S2MM</SPAN></TD>
<TR></TR>
<TD COLSPAN="1" WIDTH="50%" ALIGN="LEFT" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">C_INTERCONNECT_S0_AXI_AW_REGISTER</SPAN></TD>
<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">1</SPAN></TD>
<TD COLSPAN="1" WIDTH="15%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">MASTER</SPAN></TD>
<TD COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">AXI</SPAN></TD>
<TD COLSPAN="3" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><A HREF="#ANCHOR_axi4_0" style="text-decoration:none"><SPAN style="color:#AA0017; font: italic 12px Verdana,Arial,Helvetica,sans-serif">axi4_0</SPAN></A></TD>
-<TD COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><A HREF="#ANCHOR_MCB_DDR3" style="text-decoration:none"><SPAN style="color:#AA0017; font: italic 12px Verdana,Arial,Helvetica,sans-serif">MCB_DDR3</SPAN></A></TD>
+<TD COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold italic 11px san-serif Verdana,Arial,Helvetica,sans-serif">2 Peripherals.</SPAN></TD>
<TR></TR>
<TD COLSPAN="1" WIDTH="10%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">M_AXI_MM2S</SPAN></TD>
<TD COLSPAN="1" WIDTH="15%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">MASTER</SPAN></TD>
<TD COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">AXI</SPAN></TD>
<TD COLSPAN="3" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><A HREF="#ANCHOR_axi4_0" style="text-decoration:none"><SPAN style="color:#AA0017; font: italic 12px Verdana,Arial,Helvetica,sans-serif">axi4_0</SPAN></A></TD>
-<TD COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><A HREF="#ANCHOR_MCB_DDR3" style="text-decoration:none"><SPAN style="color:#AA0017; font: italic 12px Verdana,Arial,Helvetica,sans-serif">MCB_DDR3</SPAN></A></TD>
+<TD COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold italic 11px san-serif Verdana,Arial,Helvetica,sans-serif">2 Peripherals.</SPAN></TD>
<TR></TR>
<TD COLSPAN="1" WIDTH="10%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">M_AXI_S2MM</SPAN></TD>
<TD COLSPAN="1" WIDTH="15%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">MASTER</SPAN></TD>
<TD COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">AXI</SPAN></TD>
<TD COLSPAN="3" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><A HREF="#ANCHOR_axi4_0" style="text-decoration:none"><SPAN style="color:#AA0017; font: italic 12px Verdana,Arial,Helvetica,sans-serif">axi4_0</SPAN></A></TD>
-<TD COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><A HREF="#ANCHOR_MCB_DDR3" style="text-decoration:none"><SPAN style="color:#AA0017; font: italic 12px Verdana,Arial,Helvetica,sans-serif">MCB_DDR3</SPAN></A></TD>
+<TD COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold italic 11px san-serif Verdana,Arial,Helvetica,sans-serif">2 Peripherals.</SPAN></TD>
<TR></TR>
<TD COLSPAN="1" WIDTH="10%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">S_AXI_LITE</SPAN></TD>
<TD COLSPAN="1" WIDTH="15%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">SLAVE</SPAN></TD>
<TD COLSPAN="2" BGCOLOR="#AA0017" ALIGN="CENTER"><SPAN style="color:#FFFFFF; font: bold 14px Verdana,Arial,Helvetica,sans-serif">Specifics</SPAN></TD>
<TR></TR>
<TD COLSPAN="1" BGCOLOR="#CECECE" ALIGN="LEFT" WIDTH="30%"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">Generated</SPAN></TD>
-<TD COLSPAN="1" BGCOLOR="#FFFFFF" ALIGN="CENTER" WIDTH="70%"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">Sat Aug 27 12:49:18 2011</SPAN></TD>
+<TD COLSPAN="1" BGCOLOR="#FFFFFF" ALIGN="CENTER" WIDTH="70%"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">Sat Aug 27 15:05:44 2011</SPAN></TD>
<TR></TR>
<TD COLSPAN="1" BGCOLOR="#CECECE" ALIGN="LEFT" WIDTH="30%"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">EDK Version</SPAN></TD>
<TD COLSPAN="1" BGCOLOR="#FFFFFF" ALIGN="CENTER"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">13.1</SPAN></TD>
<TD COLSPAN="3" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><A HREF="#ANCHOR_microblaze_0_ilmb" style="text-decoration:none"><SPAN style="color:#AA0017; font: italic 12px Verdana,Arial,Helvetica,sans-serif">microblaze_0_ilmb</SPAN></A></TD>
<TD COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><A HREF="#ANCHOR_microblaze_0_i_bram_ctrl" style="text-decoration:none"><SPAN style="color:#AA0017; font: italic 12px Verdana,Arial,Helvetica,sans-serif">microblaze_0_i_bram_ctrl</SPAN></A></TD>
<TR></TR>
+<TD COLSPAN="1" WIDTH="10%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">M_AXI_DC</SPAN></TD>
+<TD COLSPAN="1" WIDTH="15%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">MASTER</SPAN></TD>
+<TD COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">AXI</SPAN></TD>
+<TD COLSPAN="3" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><A HREF="#ANCHOR_axi4_0" style="text-decoration:none"><SPAN style="color:#AA0017; font: italic 12px Verdana,Arial,Helvetica,sans-serif">axi4_0</SPAN></A></TD>
+<TD COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold italic 11px san-serif Verdana,Arial,Helvetica,sans-serif">2 Peripherals.</SPAN></TD>
+<TR></TR>
+<TD COLSPAN="1" WIDTH="10%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">M_AXI_IC</SPAN></TD>
+<TD COLSPAN="1" WIDTH="15%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">MASTER</SPAN></TD>
+<TD COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">AXI</SPAN></TD>
+<TD COLSPAN="3" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><A HREF="#ANCHOR_axi4_0" style="text-decoration:none"><SPAN style="color:#AA0017; font: italic 12px Verdana,Arial,Helvetica,sans-serif">axi4_0</SPAN></A></TD>
+<TD COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold italic 11px san-serif Verdana,Arial,Helvetica,sans-serif">2 Peripherals.</SPAN></TD>
+<TR></TR>
<TD COLSPAN="1" WIDTH="10%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">DEBUG</SPAN></TD>
<TD COLSPAN="1" WIDTH="15%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">TARGET</SPAN></TD>
<TD COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">XIL_MBDEBUG3</SPAN></TD>
<TD COLSPAN="1" WIDTH="50%" ALIGN="LEFT" BGCOLOR="#FFFFAA"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">C_ICACHE_HIGHADDR</SPAN></TD>
<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#FFFFAA"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">0xC7FFFFFF</SPAN></TD>
<TR></TR>
-<TD COLSPAN="1" WIDTH="50%" ALIGN="LEFT" BGCOLOR="#CECECE"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">C_USE_ICACHE</SPAN></TD>
-<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#CECECE"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">0</SPAN></TD>
+<TD COLSPAN="1" WIDTH="50%" ALIGN="LEFT" BGCOLOR="#FFFFAA"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">C_USE_ICACHE</SPAN></TD>
+<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#FFFFAA"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">1</SPAN></TD>
<TR></TR>
<TD COLSPAN="1" WIDTH="50%" ALIGN="LEFT" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">C_ALLOW_ICACHE_WR</SPAN></TD>
<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">1</SPAN></TD>
<TD COLSPAN="1" WIDTH="50%" ALIGN="LEFT" BGCOLOR="#CECECE"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">C_ADDR_TAG_BITS</SPAN></TD>
<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#CECECE"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">17</SPAN></TD>
<TR></TR>
-<TD COLSPAN="1" WIDTH="50%" ALIGN="LEFT" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">C_CACHE_BYTE_SIZE</SPAN></TD>
-<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">8192</SPAN></TD>
+<TD COLSPAN="1" WIDTH="50%" ALIGN="LEFT" BGCOLOR="#FFFFAA"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">C_CACHE_BYTE_SIZE</SPAN></TD>
+<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#FFFFAA"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">16384</SPAN></TD>
<TR></TR>
<TD COLSPAN="1" WIDTH="50%" ALIGN="LEFT" BGCOLOR="#CECECE"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">C_ICACHE_USE_FSL</SPAN></TD>
<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#CECECE"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">1</SPAN></TD>
<TD COLSPAN="1" WIDTH="50%" ALIGN="LEFT" BGCOLOR="#FFFFAA"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">C_DCACHE_HIGHADDR</SPAN></TD>
<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#FFFFAA"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">0xC7FFFFFF</SPAN></TD>
<TR></TR>
-<TD COLSPAN="1" WIDTH="50%" ALIGN="LEFT" BGCOLOR="#CECECE"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">C_USE_DCACHE</SPAN></TD>
-<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#CECECE"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">0</SPAN></TD>
+<TD COLSPAN="1" WIDTH="50%" ALIGN="LEFT" BGCOLOR="#FFFFAA"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">C_USE_DCACHE</SPAN></TD>
+<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#FFFFAA"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">1</SPAN></TD>
<TR></TR>
<TD COLSPAN="1" WIDTH="50%" ALIGN="LEFT" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">C_ALLOW_DCACHE_WR</SPAN></TD>
<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">1</SPAN></TD>
<TD COLSPAN="1" WIDTH="50%" ALIGN="LEFT" BGCOLOR="#CECECE"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">C_DCACHE_ADDR_TAG</SPAN></TD>
<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#CECECE"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">17</SPAN></TD>
<TR></TR>
-<TD COLSPAN="1" WIDTH="50%" ALIGN="LEFT" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">C_DCACHE_BYTE_SIZE</SPAN></TD>
-<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">8192</SPAN></TD>
+<TD COLSPAN="1" WIDTH="50%" ALIGN="LEFT" BGCOLOR="#FFFFAA"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">C_DCACHE_BYTE_SIZE</SPAN></TD>
+<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#FFFFAA"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">16384</SPAN></TD>
<TR></TR>
<TD COLSPAN="1" WIDTH="50%" ALIGN="LEFT" BGCOLOR="#CECECE"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">C_DCACHE_USE_FSL</SPAN></TD>
<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#CECECE"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">1</SPAN></TD>
<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#FFFFAA"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">0x74800000</SPAN></TD>
<TR></TR>
<TD COLSPAN="1" WIDTH="50%" ALIGN="left" BGCOLOR="#FFFFAA"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">C_HIGHADDR</SPAN></TD>
-<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#FFFFAA"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">0x748FFFFF</SPAN></TD>
+<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#FFFFAA"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">0x7480FFFF</SPAN></TD>
<TR></TR>
<TD COLSPAN="1" WIDTH="50%" ALIGN="left" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">C_SPLB_AWIDTH</SPAN></TD>
<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">32</SPAN></TD>
<TH COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#CECECE"><SPAN style="color:#000000; font: bold 9px Verdana,Arial,Helvetica,sans-serif">INTERFACE TYPE</SPAN></TH>
<TH COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#CECECE"><SPAN style="color:#000000; font: bold 9px Verdana,Arial,Helvetica,sans-serif">INTERFACE NAME</SPAN></TH>
<TR></TR>
+<TD COLSPAN="5" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><A HREF="#ANCHOR_microblaze_0" style="text-decoration:none"><SPAN style="color:#AA0017; font: italic 12px Verdana,Arial,Helvetica,sans-serif">microblaze_0</SPAN></A></TD>
+<TD COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">MASTER</SPAN></TD>
+<TD COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">M_AXI_DC</SPAN></TD>
+<TR></TR>
+<TD COLSPAN="5" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><A HREF="#ANCHOR_microblaze_0" style="text-decoration:none"><SPAN style="color:#AA0017; font: italic 12px Verdana,Arial,Helvetica,sans-serif">microblaze_0</SPAN></A></TD>
+<TD COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">MASTER</SPAN></TD>
+<TD COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">M_AXI_IC</SPAN></TD>
+<TR></TR>
<TD COLSPAN="5" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><A HREF="#ANCHOR_ETHERNET_dma" style="text-decoration:none"><SPAN style="color:#AA0017; font: italic 12px Verdana,Arial,Helvetica,sans-serif">ETHERNET_dma</SPAN></A></TD>
<TD COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">MASTER</SPAN></TD>
<TD COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">M_AXI_SG</SPAN></TD>
<TD COLSPAN="1" WIDTH="15%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">SLAVE</SPAN></TD>
<TD COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">AXI</SPAN></TD>
<TD COLSPAN="3" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><A HREF="#ANCHOR_axi4_0" style="text-decoration:none"><SPAN style="color:#AA0017; font: italic 12px Verdana,Arial,Helvetica,sans-serif">axi4_0</SPAN></A></TD>
-<TD COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><A HREF="#ANCHOR_ETHERNET_dma" style="text-decoration:none"><SPAN style="color:#AA0017; font: italic 12px Verdana,Arial,Helvetica,sans-serif">ETHERNET_dma</SPAN></A></TD>
+<TD COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold italic 11px san-serif Verdana,Arial,Helvetica,sans-serif">2 Peripherals.</SPAN></TD>
</TABLE>
<BR><BR>
</TD>
<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#FFFFAA"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">0x80000000</SPAN></TD>
<TR></TR>
<TD COLSPAN="1" WIDTH="50%" ALIGN="left" BGCOLOR="#FFFFAA"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">C_S0_AXI_HIGHADDR</SPAN></TD>
-<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#FFFFAA"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">0x87FFFFFF</SPAN></TD>
+<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#FFFFAA"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">0x807FFFFF</SPAN></TD>
<TR></TR>
<TD COLSPAN="1" WIDTH="50%" ALIGN="left" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">C_S1_AXI_BASEADDR</SPAN></TD>
<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">0xFFFFFFFF</SPAN></TD>
<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">0</SPAN></TD>
<TR></TR>
<TD COLSPAN="1" WIDTH="50%" ALIGN="LEFT" BGCOLOR="#CECECE"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">C_INTERCONNECT_S0_AXI_MASTERS</SPAN></TD>
-<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#CECECE"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">ETHERNET_dma.M_AXI_SG & ETHERNET_dma.M_AXI_MM2S & ETHERNET_dma.M_AXI_S2MM</SPAN></TD>
+<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#CECECE"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">microblaze_0.M_AXI_DC & microblaze_0.M_AXI_IC & ETHERNET_dma.M_AXI_SG & ETHERNET_dma.M_AXI_MM2S & ETHERNET_dma.M_AXI_S2MM</SPAN></TD>
<TR></TR>
<TD COLSPAN="1" WIDTH="50%" ALIGN="LEFT" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">C_INTERCONNECT_S0_AXI_AW_REGISTER</SPAN></TD>
<TD COLSPAN="1" WIDTH="50%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">1</SPAN></TD>
<TD COLSPAN="1" WIDTH="15%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">MASTER</SPAN></TD>
<TD COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">AXI</SPAN></TD>
<TD COLSPAN="3" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><A HREF="#ANCHOR_axi4_0" style="text-decoration:none"><SPAN style="color:#AA0017; font: italic 12px Verdana,Arial,Helvetica,sans-serif">axi4_0</SPAN></A></TD>
-<TD COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><A HREF="#ANCHOR_MCB_DDR3" style="text-decoration:none"><SPAN style="color:#AA0017; font: italic 12px Verdana,Arial,Helvetica,sans-serif">MCB_DDR3</SPAN></A></TD>
+<TD COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold italic 11px san-serif Verdana,Arial,Helvetica,sans-serif">2 Peripherals.</SPAN></TD>
<TR></TR>
<TD COLSPAN="1" WIDTH="10%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">M_AXI_MM2S</SPAN></TD>
<TD COLSPAN="1" WIDTH="15%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">MASTER</SPAN></TD>
<TD COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">AXI</SPAN></TD>
<TD COLSPAN="3" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><A HREF="#ANCHOR_axi4_0" style="text-decoration:none"><SPAN style="color:#AA0017; font: italic 12px Verdana,Arial,Helvetica,sans-serif">axi4_0</SPAN></A></TD>
-<TD COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><A HREF="#ANCHOR_MCB_DDR3" style="text-decoration:none"><SPAN style="color:#AA0017; font: italic 12px Verdana,Arial,Helvetica,sans-serif">MCB_DDR3</SPAN></A></TD>
+<TD COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold italic 11px san-serif Verdana,Arial,Helvetica,sans-serif">2 Peripherals.</SPAN></TD>
<TR></TR>
<TD COLSPAN="1" WIDTH="10%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">M_AXI_S2MM</SPAN></TD>
<TD COLSPAN="1" WIDTH="15%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">MASTER</SPAN></TD>
<TD COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">AXI</SPAN></TD>
<TD COLSPAN="3" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><A HREF="#ANCHOR_axi4_0" style="text-decoration:none"><SPAN style="color:#AA0017; font: italic 12px Verdana,Arial,Helvetica,sans-serif">axi4_0</SPAN></A></TD>
-<TD COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><A HREF="#ANCHOR_MCB_DDR3" style="text-decoration:none"><SPAN style="color:#AA0017; font: italic 12px Verdana,Arial,Helvetica,sans-serif">MCB_DDR3</SPAN></A></TD>
+<TD COLSPAN="1" WIDTH="25%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold italic 11px san-serif Verdana,Arial,Helvetica,sans-serif">2 Peripherals.</SPAN></TD>
<TR></TR>
<TD COLSPAN="1" WIDTH="10%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">S_AXI_LITE</SPAN></TD>
<TD COLSPAN="1" WIDTH="15%" ALIGN="CENTER" BGCOLOR="#FFFFFF"><SPAN style="color:#000000; font: bold 12px Verdana,Arial,Helvetica,sans-serif">SLAVE</SPAN></TD>
</spirit:modelParameter>\r
<spirit:modelParameter>\r
<spirit:name>C_INTERCONNECT_S0_AXI_MASTERS</spirit:name>\r
- <spirit:value spirit:format="string" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S0_AXI_MASTERS"> "ETHERNET_dma.M_AXI_SG & ETHERNET_dma.M_AXI_MM2S & ETHERNET_dma.M_AXI_S2MM" </spirit:value>\r
+ <spirit:value spirit:format="string" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S0_AXI_MASTERS"> "microblaze_0.M_AXI_DC & microblaze_0.M_AXI_IC & ETHERNET_dma.M_AXI_SG & ETHERNET_dma.M_AXI_MM2S & ETHERNET_dma.M_AXI_S2MM" </spirit:value>\r
</spirit:modelParameter>\r
<spirit:modelParameter>\r
<spirit:name>C_INTERCONNECT_S0_AXI_R_REGISTER</spirit:name>\r
</spirit:modelParameter>\r
<spirit:modelParameter>\r
<spirit:name>C_S0_AXI_HIGHADDR</spirit:name>\r
- <spirit:value spirit:format="STD_LOGIC_VECTOR" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_S0_AXI_HIGHADDR"> "0x87ffffff" </spirit:value>\r
+ <spirit:value spirit:format="STD_LOGIC_VECTOR" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_S0_AXI_HIGHADDR"> "0x807FFFFF" </spirit:value>\r
</spirit:modelParameter>\r
<spirit:modelParameter>\r
<spirit:name>C_S0_AXI_ID_WIDTH</spirit:name>\r
- <spirit:value spirit:format="INTEGER" spirit:resolve="UPDATE" spirit:id="MCB_DDR3.C_S0_AXI_ID_WIDTH"> "2" </spirit:value>\r
+ <spirit:value spirit:format="INTEGER" spirit:resolve="UPDATE" spirit:id="MCB_DDR3.C_S0_AXI_ID_WIDTH"> "3" </spirit:value>\r
</spirit:modelParameter>\r
<spirit:modelParameter>\r
<spirit:name>C_S0_AXI_PROTOCOL</spirit:name>\r
=========================================================================\r
-Time: Sat Aug 27 12:49:03 GMT Daylight Time 2011\r
-Running: run_batch_mode 96333944\r
+Time: Sat Aug 27 15:05:27 GMT Daylight Time 2011\r
+Running: run_batch_mode 96334104\r
{COLLECTING: INSTANCE MCB_DDR3 }\r
-{COLLECTING: C_INTERCONNECT_S0_AXI_MASTERS ETHERNET_dma.M_AXI_SG & ETHERNET_dma.M_AXI_MM2S & ETHERNET_dma.M_AXI_S2MM OPTIONAL string none ETHERNET_dma.M_AXI_SG & ETHERNET_dma.M_AXI_MM2S & ETHERNET_dma.M_AXI_S2MM}\r
+{COLLECTING: C_INTERCONNECT_S0_AXI_MASTERS microblaze_0.M_AXI_DC & microblaze_0.M_AXI_IC & ETHERNET_dma.M_AXI_SG & ETHERNET_dma.M_AXI_MM2S & ETHERNET_dma.M_AXI_S2MM OPTIONAL string none microblaze_0.M_AXI_DC & microblaze_0.M_AXI_IC & ETHERNET_dma.M_AXI_SG & ETHERNET_dma.M_AXI_MM2S & ETHERNET_dma.M_AXI_S2MM}\r
{COLLECTING: C_INTERCONNECT_S0_AXI_IS_ACLK_ASYNC 0 OPTIONAL_UPDATE integer 0 }\r
{COLLECTING: C_INTERCONNECT_S0_AXI_ACLK_RATIO 100000000 UPDATE integer 1 }\r
{COLLECTING: C_INTERCONNECT_S0_AXI_SECURE 0 OPTIONAL integer 0 }\r
{COLLECTING: C_MCB_PERFORMANCE STANDARD OPTIONAL STRING STANDARD }\r
{COLLECTING: C_BYPASS_CORE_UCF 0 OPTIONAL 0 }\r
{COLLECTING: C_S0_AXI_BASEADDR 0x80000000 OPTIONAL STD_LOGIC_VECTOR 0xFFFFFFFF 0x80000000}\r
-{COLLECTING: C_S0_AXI_HIGHADDR 0x87ffffff OPTIONAL STD_LOGIC_VECTOR 0x00000000 0x87ffffff}\r
+{COLLECTING: C_S0_AXI_HIGHADDR 0x807FFFFF OPTIONAL STD_LOGIC_VECTOR 0x00000000 0x807FFFFF}\r
{COLLECTING: C_S1_AXI_BASEADDR 0xFFFFFFFF OPTIONAL STD_LOGIC_VECTOR 0xFFFFFFFF }\r
{COLLECTING: C_S1_AXI_HIGHADDR 0x00000000 OPTIONAL STD_LOGIC_VECTOR 0x00000000 }\r
{COLLECTING: C_S2_AXI_BASEADDR 0xFFFFFFFF OPTIONAL STD_LOGIC_VECTOR 0xFFFFFFFF }\r
{COLLECTING: C_ARB_TIME_SLOT_11 0b000000011000001010 OPTIONAL STD_LOGIC_VECTOR 0b000000011000001010 }\r
{COLLECTING: C_S0_AXI_ENABLE 1 OPTIONAL INTEGER 1 }\r
{COLLECTING: C_S0_AXI_PROTOCOL AXI4 CONSTANT STRING AXI4 }\r
-{COLLECTING: C_S0_AXI_ID_WIDTH 2 UPDATE INTEGER 4 }\r
+{COLLECTING: C_S0_AXI_ID_WIDTH 3 UPDATE INTEGER 4 }\r
{COLLECTING: C_S0_AXI_ADDR_WIDTH 32 CONSTANT INTEGER 32 }\r
{COLLECTING: C_S0_AXI_DATA_WIDTH 32 OPTIONAL INTEGER 32 }\r
{COLLECTING: C_S0_AXI_SUPPORTS_READ 1 OPTIONAL_UPDATE INTEGER 1 }\r
{SENDING PARAMETER: C_INTERCONNECT_S0_AXI_AW_REGISTER : 1 integer OPTIONAL}\r
{SENDING PARAMETER: C_INTERCONNECT_S0_AXI_B_REGISTER : 1 integer OPTIONAL}\r
{SENDING PARAMETER: C_INTERCONNECT_S0_AXI_IS_ACLK_ASYNC : 0 integer OPTIONAL_UPDATE}\r
-{SENDING PARAMETER: C_INTERCONNECT_S0_AXI_MASTERS : {ETHERNET_dma.M_AXI_SG & ETHERNET_dma.M_AXI_MM2S & ETHERNET_dma.M_AXI_S2MM} string OPTIONAL}\r
+{SENDING PARAMETER: C_INTERCONNECT_S0_AXI_MASTERS : {microblaze_0.M_AXI_DC & microblaze_0.M_AXI_IC & ETHERNET_dma.M_AXI_SG & ETHERNET_dma.M_AXI_MM2S & ETHERNET_dma.M_AXI_S2MM} string OPTIONAL}\r
{SENDING PARAMETER: C_INTERCONNECT_S0_AXI_R_REGISTER : 1 integer OPTIONAL}\r
{SENDING PARAMETER: C_INTERCONNECT_S0_AXI_READ_ACCEPTANCE : 4 INTEGER OPTIONAL}\r
{SENDING PARAMETER: C_INTERCONNECT_S0_AXI_READ_FIFO_DEPTH : 0 integer OPTIONAL}\r
{SENDING PARAMETER: C_S0_AXI_DATA_WIDTH : 32 INTEGER OPTIONAL}\r
{SENDING PARAMETER: C_S0_AXI_ENABLE : 1 INTEGER OPTIONAL}\r
{SENDING PARAMETER: C_S0_AXI_ENABLE_AP : 0 INTEGER OPTIONAL}\r
-{SENDING PARAMETER: C_S0_AXI_HIGHADDR : 0x87ffffff STD_LOGIC_VECTOR OPTIONAL}\r
-{SENDING PARAMETER: C_S0_AXI_ID_WIDTH : 2 INTEGER UPDATE}\r
+{SENDING PARAMETER: C_S0_AXI_HIGHADDR : 0x807FFFFF STD_LOGIC_VECTOR OPTIONAL}\r
+{SENDING PARAMETER: C_S0_AXI_ID_WIDTH : 3 INTEGER UPDATE}\r
{SENDING PARAMETER: C_S0_AXI_PROTOCOL : AXI4 STRING CONSTANT}\r
{SENDING PARAMETER: C_S0_AXI_REG_EN0 : 0x00000 STD_LOGIC_VECTOR OPTIONAL_UPDATE}\r
{SENDING PARAMETER: C_S0_AXI_REG_EN1 : 0x01000 STD_LOGIC_VECTOR OPTIONAL}\r
{SET: IGNORE C_SKIP_IN_TERM_CAL = 0 (BATCH:OPTIONAL::MPD:MPDVAL)}\r
{SET: IGNORE C_MEM_DDR2_3_HIGH_TEMP_SR = NORMAL (BATCH:OPTIONAL::MPD:MPDVAL)}\r
{SET: UPDREM C_S0_AXI_SUPPORTS_READ = 1 (BATCH:OPTIONAL_UPDATE::MPD:MPDVAL)}\r
-{SET: IGNORE C_S0_AXI_HIGHADDR = 0x87ffffff (BATCH:OPTIONAL::MHS:COMPVAL)}\r
+{SET: IGNORE C_S0_AXI_HIGHADDR = 0x807FFFFF (BATCH:OPTIONAL::MHS:COMPVAL)}\r
{SET: IGNORE C_MEM_DDR1_2_ODS = FULL (BATCH:OPTIONAL::MPD:MPDVAL)}\r
{SET: IGNORE C_MEM_TYPE = DDR3 (BATCH:OPTIONAL::MPD:MPDVAL)}\r
{SET: CHECK C_MEM_ADDR_WIDTH = 13 (BATCH:OPTIONAL_UPDATE:CHECK:MPD:MPDVAL)}\r
{SET: IGNORE C_S3_AXI_ENABLE = 0 (BATCH:OPTIONAL::MPD:MPDVAL)}\r
{SET: UPDREM C_S0_AXI_SUPPORTS_WRITE = 1 (BATCH:OPTIONAL_UPDATE::MPD:MPDVAL)}\r
{SET: IGNORE C_S0_AXI_ADDR_WIDTH = 32 (BATCH:CONSTANT::MPD:MPDVAL)}\r
-{SET: IGNORE C_INTERCONNECT_S0_AXI_MASTERS = ETHERNET_dma.M_AXI_SG & ETHERNET_dma.M_AXI_MM2S & ETHERNET_dma.M_AXI_S2MM (BATCH:OPTIONAL::MHS:COMPVAL)}\r
+{SET: IGNORE C_INTERCONNECT_S0_AXI_MASTERS = microblaze_0.M_AXI_DC & microblaze_0.M_AXI_IC & ETHERNET_dma.M_AXI_SG & ETHERNET_dma.M_AXI_MM2S & ETHERNET_dma.M_AXI_S2MM (BATCH:OPTIONAL::MHS:COMPVAL)}\r
{SET: IGNORE C_MEM_DDR1_2_ADDR_CONTROL_SSTL_ODS = CLASS_II (BATCH:OPTIONAL::MPD:MPDVAL)}\r
{SET: IGNORE C_INTERCONNECT_S0_AXI_WRITE_ACCEPTANCE = 4 (BATCH:OPTIONAL::MPD:MPDVAL)}\r
{SET: UPDREM C_MEM_DDR3_CAS_WR_LATENCY = 5 (BATCH:UPDATE::MPD:MPDVAL)}\r
<?xml version='1.0' encoding='UTF-8'?>
<report-views version="2.0" >
<header>
- <DateModified>2011-08-27T11:01:38</DateModified>
+ <DateModified>2011-08-27T15:17:50</DateModified>
<ModuleName>system</ModuleName>
- <SummaryTimeStamp>2011-08-27T11:01:38</SummaryTimeStamp>
+ <SummaryTimeStamp>2011-08-27T15:17:49</SummaryTimeStamp>
<SavedFilePath>C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/ise/system.xreport</SavedFilePath>
<FilterFile>filter.filter</FilterFile>
<SavedFilterFilePath>C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/ise</SavedFilterFilePath>
-
-<EDKSYSTEM EDKVERSION="13.1" EDWVERSION="1.2" TIMESTAMP="Sat Aug 27 11:01:36 2011">
+<EDKSYSTEM EDKVERSION="13.1" EDWVERSION="1.2" TIMESTAMP="Sat Aug 27 15:17:48 2011">
<SYSTEMINFO ARCH="spartan6" DEVICE="xc6slx45t" PACKAGE="fgg484" PART="xc6slx45tfgg484-3" SOURCE="C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/system.xmp" SPEEDGRADE="-3"/>
+ <EXTERNALPORTS>
+ <PORT DIR="I" MHS_INDEX="0" NAME="RESET" RSTPOLARITY="1" SIGIS="RST" SIGNAME="RESET"/>
+ <PORT CLKFREQUENCY="200000000" DIFFPOLARITY="P" DIR="I" MHS_INDEX="1" NAME="CLK_P" SIGIS="CLK" SIGNAME="CLK"/>
+ <PORT CLKFREQUENCY="200000000" DIFFPOLARITY="N" DIR="I" MHS_INDEX="2" NAME="CLK_N" SIGIS="CLK" SIGNAME="CLK"/>
+ <PORT DIR="O" MHS_INDEX="3" NAME="RS232_Uart_1_sout" SIGNAME="RS232_Uart_1_sout"/>
+ <PORT DIR="I" MHS_INDEX="4" NAME="RS232_Uart_1_sin" SIGNAME="RS232_Uart_1_sin"/>
+ <PORT DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MHS_INDEX="5" MSB="3" NAME="LEDs_4Bits_TRI_O" RIGHT="0" SIGNAME="LEDs_4Bits_TRI_O"/>
+ <PORT DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MHS_INDEX="6" MSB="3" NAME="Push_Buttons_4Bits_TRI_I" RIGHT="0" SIGNAME="Push_Buttons_4Bits_TRI_I"/>
+ <PORT DIR="O" MHS_INDEX="7" NAME="mcbx_dram_clk" SIGNAME="mcbx_dram_clk"/>
+ <PORT DIR="O" MHS_INDEX="8" NAME="mcbx_dram_clk_n" SIGNAME="mcbx_dram_clk_n"/>
+ <PORT DIR="O" MHS_INDEX="9" NAME="mcbx_dram_cke" SIGNAME="mcbx_dram_cke"/>
+ <PORT DIR="O" MHS_INDEX="10" NAME="mcbx_dram_odt" SIGNAME="mcbx_dram_odt"/>
+ <PORT DIR="O" MHS_INDEX="11" NAME="mcbx_dram_ras_n" SIGNAME="mcbx_dram_ras_n"/>
+ <PORT DIR="O" MHS_INDEX="12" NAME="mcbx_dram_cas_n" SIGNAME="mcbx_dram_cas_n"/>
+ <PORT DIR="O" MHS_INDEX="13" NAME="mcbx_dram_we_n" SIGNAME="mcbx_dram_we_n"/>
+ <PORT DIR="O" MHS_INDEX="14" NAME="mcbx_dram_udm" SIGNAME="mcbx_dram_udm"/>
+ <PORT DIR="O" MHS_INDEX="15" NAME="mcbx_dram_ldm" SIGNAME="mcbx_dram_ldm"/>
+ <PORT DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MHS_INDEX="16" MSB="2" NAME="mcbx_dram_ba" RIGHT="0" SIGNAME="mcbx_dram_ba"/>
+ <PORT DIR="O" ENDIAN="LITTLE" LEFT="12" LSB="0" MHS_INDEX="17" MSB="12" NAME="mcbx_dram_addr" RIGHT="0" SIGNAME="mcbx_dram_addr"/>
+ <PORT DIR="O" MHS_INDEX="18" NAME="mcbx_dram_ddr3_rst" SIGNAME="mcbx_dram_ddr3_rst"/>
+ <PORT DIR="IO" ENDIAN="LITTLE" LEFT="15" LSB="0" MHS_INDEX="19" MSB="15" NAME="mcbx_dram_dq" RIGHT="0" SIGNAME="mcbx_dram_dq"/>
+ <PORT DIR="IO" MHS_INDEX="20" NAME="mcbx_dram_dqs" SIGNAME="mcbx_dram_dqs"/>
+ <PORT DIR="IO" MHS_INDEX="21" NAME="mcbx_dram_dqs_n" SIGNAME="mcbx_dram_dqs_n"/>
+ <PORT DIR="IO" MHS_INDEX="22" NAME="mcbx_dram_udqs" SIGNAME="mcbx_dram_udqs"/>
+ <PORT DIR="IO" MHS_INDEX="23" NAME="mcbx_dram_udqs_n" SIGNAME="mcbx_dram_udqs_n"/>
+ <PORT DIR="IO" MHS_INDEX="24" NAME="rzq" SIGNAME="rzq"/>
+ <PORT DIR="IO" MHS_INDEX="25" NAME="zio" SIGNAME="zio"/>
+ <PORT DIR="IO" MHS_INDEX="26" NAME="ETHERNET_MDIO" SIGNAME="ETHERNET_MDIO"/>
+ <PORT DIR="O" MHS_INDEX="27" NAME="ETHERNET_MDC" SIGNAME="ETHERNET_MDC"/>
+ <PORT DIR="O" MHS_INDEX="28" NAME="ETHERNET_TX_ER" SIGNAME="ETHERNET_TX_ER"/>
+ <PORT DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MHS_INDEX="29" MSB="7" NAME="ETHERNET_TXD" RIGHT="0" SIGNAME="ETHERNET_TXD"/>
+ <PORT DIR="O" MHS_INDEX="30" NAME="ETHERNET_TX_EN" SIGNAME="ETHERNET_TX_EN"/>
+ <PORT DIR="I" MHS_INDEX="31" NAME="ETHERNET_MII_TX_CLK" SIGNAME="ETHERNET_MII_TX_CLK"/>
+ <PORT DIR="O" MHS_INDEX="32" NAME="ETHERNET_TX_CLK" SIGNAME="ETHERNET_TX_CLK"/>
+ <PORT DIR="I" ENDIAN="LITTLE" LEFT="7" LSB="0" MHS_INDEX="33" MSB="7" NAME="ETHERNET_RXD" RIGHT="0" SIGNAME="ETHERNET_RXD"/>
+ <PORT DIR="I" MHS_INDEX="34" NAME="ETHERNET_RX_ER" SIGNAME="ETHERNET_RX_ER"/>
+ <PORT DIR="I" MHS_INDEX="35" NAME="ETHERNET_RX_CLK" SIGNAME="ETHERNET_RX_CLK"/>
+ <PORT DIR="I" MHS_INDEX="36" NAME="ETHERNET_RX_DV" SIGNAME="ETHERNET_RX_DV"/>
+ <PORT DIR="O" MHS_INDEX="37" NAME="ETHERNET_PHY_RST_N" SIGNAME="ETHERNET_PHY_RST_N"/>
+ </EXTERNALPORTS>
+
<MODULES>
<MODULE BUSSTD="AXI" BUSSTD_PSF="AXI" HWVERSION="1.02.a" INSTANCE="axi4_0" IPTYPE="BUS" IS_CROSSBAR="TRUE" MHS_INDEX="0" MODCLASS="BUS" MODTYPE="axi_interconnect">
<DESCRIPTION TYPE="SHORT">AXI Interconnect</DESCRIPTION>
<DOCUMENTATION>
<DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/axi_interconnect_v1_02_a/doc/ds768_axi_interconnect.pdf" TYPE="IP"/>
</DOCUMENTATION>
+ <LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETERS>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_FAMILY" TYPE="STRING" VALUE="spartan6"/>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="1" NAME="C_BASEFAMILY" TYPE="STRING" VALUE="spartan6"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="2" NAME="C_NUM_SLAVE_SLOTS" TYPE="INTEGER" VALUE="3"/>
+ <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="2" NAME="C_NUM_SLAVE_SLOTS" TYPE="INTEGER" VALUE="5"/>
<PARAMETER MPD_INDEX="3" NAME="C_NUM_MASTER_SLOTS" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="4" NAME="C_AXI_ID_WIDTH" TYPE="INTEGER" VALUE="2"/>
+ <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="4" NAME="C_AXI_ID_WIDTH" TYPE="INTEGER" VALUE="3"/>
<PARAMETER MPD_INDEX="5" NAME="C_AXI_ADDR_WIDTH" TYPE="INTEGER" VALUE="32"/>
<PARAMETER MPD_INDEX="6" NAME="C_AXI_DATA_MAX_WIDTH" TYPE="INTEGER" VALUE="32"/>
<PARAMETER MPD_INDEX="7" NAME="C_S_AXI_DATA_WIDTH" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000020000000200000002000000020000000200000002000000020000000200000002000000020000000200000002000000020000000200000002000000020"/>
<PARAMETER MPD_INDEX="10" NAME="C_S_AXI_PROTOCOL" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000"/>
<PARAMETER MPD_INDEX="11" NAME="C_M_AXI_PROTOCOL" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000"/>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="12" NAME="C_M_AXI_BASE_ADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0xffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff0000000080000000"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="13" NAME="C_M_AXI_HIGH_ADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000087ffffff"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="14" NAME="C_S_AXI_BASE_ID" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000020000000100000000"/>
+ <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="13" NAME="C_M_AXI_HIGH_ADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000807fffff"/>
+ <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="14" NAME="C_S_AXI_BASE_ID" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000400000003000000020000000100000000"/>
<PARAMETER MPD_INDEX="15" NAME="C_S_AXI_THREAD_ID_WIDTH" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000"/>
<PARAMETER MPD_INDEX="16" NAME="C_S_AXI_IS_INTERCONNECT" TYPE="STD_LOGIC_VECTOR" VALUE="0b0000000000000000"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="17" NAME="C_S_AXI_ACLK_RATIO" TYPE="STD_LOGIC_VECTOR" VALUE="0x0000000100000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000105f5e10005f5e10005f5e100"/>
+ <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="17" NAME="C_S_AXI_ACLK_RATIO" TYPE="STD_LOGIC_VECTOR" VALUE="0x000000010000000100000001000000010000000100000001000000010000000100000001000000010000000105f5e10005f5e10005f5e10005f5e10005f5e100"/>
<PARAMETER MPD_INDEX="18" NAME="C_S_AXI_IS_ACLK_ASYNC" TYPE="STD_LOGIC_VECTOR" VALUE="0b0000000000000000"/>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="19" NAME="C_M_AXI_ACLK_RATIO" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000105f5e100"/>
<PARAMETER MPD_INDEX="20" NAME="C_M_AXI_IS_ACLK_ASYNC" TYPE="STD_LOGIC_VECTOR" VALUE="0b0000000000000000"/>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="21" NAME="C_INTERCONNECT_ACLK_RATIO" TYPE="INTEGER" VALUE="100000000"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="22" NAME="C_S_AXI_SUPPORTS_WRITE" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111101"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="23" NAME="C_S_AXI_SUPPORTS_READ" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111011"/>
+ <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="22" NAME="C_S_AXI_SUPPORTS_WRITE" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111110101"/>
+ <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="23" NAME="C_S_AXI_SUPPORTS_READ" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111101111"/>
<PARAMETER MPD_INDEX="24" NAME="C_M_AXI_SUPPORTS_WRITE" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111111"/>
<PARAMETER MPD_INDEX="25" NAME="C_M_AXI_SUPPORTS_READ" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111111"/>
<PARAMETER MPD_INDEX="26" NAME="C_AXI_SUPPORTS_USER_SIGNALS" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="27" NAME="C_AXI_AWUSER_WIDTH" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="28" NAME="C_AXI_ARUSER_WIDTH" TYPE="INTEGER" VALUE="1"/>
+ <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="27" NAME="C_AXI_AWUSER_WIDTH" TYPE="INTEGER" VALUE="5"/>
+ <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="28" NAME="C_AXI_ARUSER_WIDTH" TYPE="INTEGER" VALUE="5"/>
<PARAMETER MPD_INDEX="29" NAME="C_AXI_WUSER_WIDTH" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="30" NAME="C_AXI_RUSER_WIDTH" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="31" NAME="C_AXI_BUSER_WIDTH" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="32" NAME="C_AXI_CONNECTIVITY" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007"/>
+ <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="32" NAME="C_AXI_CONNECTIVITY" TYPE="STD_LOGIC_VECTOR" VALUE="0x0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001f"/>
<PARAMETER MPD_INDEX="33" NAME="C_S_AXI_SINGLE_THREAD" TYPE="STD_LOGIC_VECTOR" VALUE="0b0000000000000000"/>
<PARAMETER MPD_INDEX="34" NAME="C_M_AXI_SUPPORTS_REORDERING" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111111"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="35" NAME="C_S_AXI_SUPPORTS_NARROW_BURST" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111000"/>
+ <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="35" NAME="C_S_AXI_SUPPORTS_NARROW_BURST" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111100000"/>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="36" NAME="C_M_AXI_SUPPORTS_NARROW_BURST" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111110"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="37" NAME="C_S_AXI_WRITE_ACCEPTANCE" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000100000001000000040000000100000001"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="38" NAME="C_S_AXI_READ_ACCEPTANCE" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000400000001"/>
+ <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="37" NAME="C_S_AXI_WRITE_ACCEPTANCE" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000400000001000000010000000100000020"/>
+ <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="38" NAME="C_S_AXI_READ_ACCEPTANCE" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000100000004000000010000000200000002"/>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="39" NAME="C_M_AXI_WRITE_ISSUING" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000100000004"/>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="40" NAME="C_M_AXI_READ_ISSUING" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000100000004"/>
<PARAMETER MPD_INDEX="41" NAME="C_S_AXI_ARB_PRIORITY" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000"/>
<PARAMETER MPD_INDEX="42" NAME="C_M_AXI_SECURE" TYPE="STD_LOGIC_VECTOR" VALUE="0b0000000000000000"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="43" NAME="C_S_AXI_WRITE_FIFO_DEPTH" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002000000000000000000"/>
+ <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="43" NAME="C_S_AXI_WRITE_FIFO_DEPTH" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000020000000000000000000000000000000000"/>
<PARAMETER MPD_INDEX="44" NAME="C_S_AXI_WRITE_FIFO_TYPE" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111111"/>
<PARAMETER MPD_INDEX="45" NAME="C_S_AXI_WRITE_FIFO_DELAY" TYPE="STD_LOGIC_VECTOR" VALUE="0b0000000000000000"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="46" NAME="C_S_AXI_READ_FIFO_DEPTH" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000020000000000"/>
+ <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="46" NAME="C_S_AXI_READ_FIFO_DEPTH" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000200000000000000000000000000"/>
<PARAMETER MPD_INDEX="47" NAME="C_S_AXI_READ_FIFO_TYPE" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111111"/>
<PARAMETER MPD_INDEX="48" NAME="C_S_AXI_READ_FIFO_DELAY" TYPE="STD_LOGIC_VECTOR" VALUE="0b0000000000000000"/>
<PARAMETER MPD_INDEX="49" NAME="C_M_AXI_WRITE_FIFO_DEPTH" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000"/>
<PARAMETER MPD_INDEX="52" NAME="C_M_AXI_READ_FIFO_DEPTH" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000"/>
<PARAMETER MPD_INDEX="53" NAME="C_M_AXI_READ_FIFO_TYPE" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111111"/>
<PARAMETER MPD_INDEX="54" NAME="C_M_AXI_READ_FIFO_DELAY" TYPE="STD_LOGIC_VECTOR" VALUE="0b0000000000000000"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="55" NAME="C_S_AXI_AW_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000100000001"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="56" NAME="C_S_AXI_AR_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000100000001"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="57" NAME="C_S_AXI_W_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000100000001"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="58" NAME="C_S_AXI_R_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000100000001"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="59" NAME="C_S_AXI_B_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000100000001"/>
+ <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="55" NAME="C_S_AXI_AW_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000001000000010000000100000001"/>
+ <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="56" NAME="C_S_AXI_AR_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000001000000010000000100000001"/>
+ <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="57" NAME="C_S_AXI_W_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000001000000010000000100000001"/>
+ <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="58" NAME="C_S_AXI_R_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000001000000010000000100000001"/>
+ <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="59" NAME="C_S_AXI_B_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000001000000010000000100000001"/>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="60" NAME="C_M_AXI_AW_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001"/>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="61" NAME="C_M_AXI_AR_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001"/>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="62" NAME="C_M_AXI_W_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001"/>
<PORTS>
<PORT BUS="S_AXI_CTRL" CLKFREQUENCY="100000000" DEF_SIGNAME="__BUS__" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="0" NAME="interconnect_aclk" SIGIS="CLK" SIGNAME="clk_100_0000MHzPLL0"/>
<PORT DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="1" MPD_INDEX="1" NAME="INTERCONNECT_ARESETN" SIGIS="RST" SIGNAME="proc_sys_reset_0_Interconnect_aresetn"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARESETN" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="2" MSB="2" NAME="S_AXI_ARESET_OUT_N" RIGHT="0" SIGIS="RST" SIGNAME="axi4_0_S_ARESETN" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_ARESETN" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="2" MSB="4" NAME="S_AXI_ARESET_OUT_N" RIGHT="0" SIGIS="RST" SIGNAME="axi4_0_S_ARESETN" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_ARESETN" DIR="O" MPD_INDEX="3" NAME="M_AXI_ARESET_OUT_N" SIGIS="RST" SIGNAME="axi4_0_M_ARESETN" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
<PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="4" NAME="IRQ" SENSITIVITY="EDGE_RISING" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
- <PORT DEF_SIGNAME="axi4_0_S_ACLK" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="5" MSB="2" NAME="S_AXI_ACLK" RIGHT="0" SIGIS="CLK" SIGNAME="axi4_0_S_ACLK" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_AWID" DIR="I" ENDIAN="LITTLE" LEFT="5" LSB="0" MPD_INDEX="6" MSB="5" NAME="S_AXI_AWID" RIGHT="0" SIGNAME="axi4_0_S_AWID" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_AWADDR" DIR="I" ENDIAN="LITTLE" LEFT="95" LSB="0" MPD_INDEX="7" MSB="95" NAME="S_AXI_AWADDR" RIGHT="0" SIGNAME="axi4_0_S_AWADDR" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ADDR_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_AWLEN" DIR="I" ENDIAN="LITTLE" LEFT="23" LSB="0" MPD_INDEX="8" MSB="23" NAME="S_AXI_AWLEN" RIGHT="0" SIGNAME="axi4_0_S_AWLEN" VECFORMULA="[((C_NUM_SLAVE_SLOTS*8)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_AWSIZE" DIR="I" ENDIAN="LITTLE" LEFT="8" LSB="0" MPD_INDEX="9" MSB="8" NAME="S_AXI_AWSIZE" RIGHT="0" SIGNAME="axi4_0_S_AWSIZE" VECFORMULA="[((C_NUM_SLAVE_SLOTS*3)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_AWBURST" DIR="I" ENDIAN="LITTLE" LEFT="5" LSB="0" MPD_INDEX="10" MSB="5" NAME="S_AXI_AWBURST" RIGHT="0" SIGNAME="axi4_0_S_AWBURST" VECFORMULA="[((C_NUM_SLAVE_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_AWLOCK" DIR="I" ENDIAN="LITTLE" LEFT="5" LSB="0" MPD_INDEX="11" MSB="5" NAME="S_AXI_AWLOCK" RIGHT="0" SIGNAME="axi4_0_S_AWLOCK" VECFORMULA="[((C_NUM_SLAVE_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_AWCACHE" DIR="I" ENDIAN="LITTLE" LEFT="11" LSB="0" MPD_INDEX="12" MSB="11" NAME="S_AXI_AWCACHE" RIGHT="0" SIGNAME="axi4_0_S_AWCACHE" VECFORMULA="[((C_NUM_SLAVE_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_AWPROT" DIR="I" ENDIAN="LITTLE" LEFT="8" LSB="0" MPD_INDEX="13" MSB="8" NAME="S_AXI_AWPROT" RIGHT="0" SIGNAME="axi4_0_S_AWPROT" VECFORMULA="[((C_NUM_SLAVE_SLOTS*3)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_AWQOS" DIR="I" ENDIAN="LITTLE" LEFT="11" LSB="0" MPD_INDEX="14" MSB="11" NAME="S_AXI_AWQOS" RIGHT="0" SIGNAME="axi4_0_S_AWQOS" VECFORMULA="[((C_NUM_SLAVE_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_AWUSER" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="15" MSB="2" NAME="S_AXI_AWUSER" RIGHT="0" SIGNAME="axi4_0_S_AWUSER" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_AWUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_AWVALID" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="16" MSB="2" NAME="S_AXI_AWVALID" RIGHT="0" SIGNAME="axi4_0_S_AWVALID" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_AWREADY" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="17" MSB="2" NAME="S_AXI_AWREADY" RIGHT="0" SIGNAME="axi4_0_S_AWREADY" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_WDATA" DIR="I" ENDIAN="LITTLE" LEFT="95" LSB="0" MPD_INDEX="18" MSB="95" NAME="S_AXI_WDATA" RIGHT="0" SIGNAME="axi4_0_S_WDATA" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_DATA_MAX_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_WSTRB" DIR="I" ENDIAN="LITTLE" LEFT="11" LSB="0" MPD_INDEX="19" MSB="11" NAME="S_AXI_WSTRB" RIGHT="0" SIGNAME="axi4_0_S_WSTRB" VECFORMULA="[(((C_NUM_SLAVE_SLOTS*C_AXI_DATA_MAX_WIDTH)/8)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_WLAST" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="20" MSB="2" NAME="S_AXI_WLAST" RIGHT="0" SIGNAME="axi4_0_S_WLAST" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_WUSER" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="21" MSB="2" NAME="S_AXI_WUSER" RIGHT="0" SIGNAME="axi4_0_S_WUSER" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_WUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_WVALID" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="22" MSB="2" NAME="S_AXI_WVALID" RIGHT="0" SIGNAME="axi4_0_S_WVALID" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_WREADY" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="23" MSB="2" NAME="S_AXI_WREADY" RIGHT="0" SIGNAME="axi4_0_S_WREADY" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_BID" DIR="O" ENDIAN="LITTLE" LEFT="5" LSB="0" MPD_INDEX="24" MSB="5" NAME="S_AXI_BID" RIGHT="0" SIGNAME="axi4_0_S_BID" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_BRESP" DIR="O" ENDIAN="LITTLE" LEFT="5" LSB="0" MPD_INDEX="25" MSB="5" NAME="S_AXI_BRESP" RIGHT="0" SIGNAME="axi4_0_S_BRESP" VECFORMULA="[((C_NUM_SLAVE_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_BUSER" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="26" MSB="2" NAME="S_AXI_BUSER" RIGHT="0" SIGNAME="axi4_0_S_BUSER" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_BUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_BVALID" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="27" MSB="2" NAME="S_AXI_BVALID" RIGHT="0" SIGNAME="axi4_0_S_BVALID" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_BREADY" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="28" MSB="2" NAME="S_AXI_BREADY" RIGHT="0" SIGNAME="axi4_0_S_BREADY" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARID" DIR="I" ENDIAN="LITTLE" LEFT="5" LSB="0" MPD_INDEX="29" MSB="5" NAME="S_AXI_ARID" RIGHT="0" SIGNAME="axi4_0_S_ARID" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARADDR" DIR="I" ENDIAN="LITTLE" LEFT="95" LSB="0" MPD_INDEX="30" MSB="95" NAME="S_AXI_ARADDR" RIGHT="0" SIGNAME="axi4_0_S_ARADDR" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ADDR_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARLEN" DIR="I" ENDIAN="LITTLE" LEFT="23" LSB="0" MPD_INDEX="31" MSB="23" NAME="S_AXI_ARLEN" RIGHT="0" SIGNAME="axi4_0_S_ARLEN" VECFORMULA="[((C_NUM_SLAVE_SLOTS*8)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARSIZE" DIR="I" ENDIAN="LITTLE" LEFT="8" LSB="0" MPD_INDEX="32" MSB="8" NAME="S_AXI_ARSIZE" RIGHT="0" SIGNAME="axi4_0_S_ARSIZE" VECFORMULA="[((C_NUM_SLAVE_SLOTS*3)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARBURST" DIR="I" ENDIAN="LITTLE" LEFT="5" LSB="0" MPD_INDEX="33" MSB="5" NAME="S_AXI_ARBURST" RIGHT="0" SIGNAME="axi4_0_S_ARBURST" VECFORMULA="[((C_NUM_SLAVE_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARLOCK" DIR="I" ENDIAN="LITTLE" LEFT="5" LSB="0" MPD_INDEX="34" MSB="5" NAME="S_AXI_ARLOCK" RIGHT="0" SIGNAME="axi4_0_S_ARLOCK" VECFORMULA="[((C_NUM_SLAVE_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARCACHE" DIR="I" ENDIAN="LITTLE" LEFT="11" LSB="0" MPD_INDEX="35" MSB="11" NAME="S_AXI_ARCACHE" RIGHT="0" SIGNAME="axi4_0_S_ARCACHE" VECFORMULA="[((C_NUM_SLAVE_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARPROT" DIR="I" ENDIAN="LITTLE" LEFT="8" LSB="0" MPD_INDEX="36" MSB="8" NAME="S_AXI_ARPROT" RIGHT="0" SIGNAME="axi4_0_S_ARPROT" VECFORMULA="[((C_NUM_SLAVE_SLOTS*3)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARQOS" DIR="I" ENDIAN="LITTLE" LEFT="11" LSB="0" MPD_INDEX="37" MSB="11" NAME="S_AXI_ARQOS" RIGHT="0" SIGNAME="axi4_0_S_ARQOS" VECFORMULA="[((C_NUM_SLAVE_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARUSER" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="38" MSB="2" NAME="S_AXI_ARUSER" RIGHT="0" SIGNAME="axi4_0_S_ARUSER" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ARUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARVALID" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="39" MSB="2" NAME="S_AXI_ARVALID" RIGHT="0" SIGNAME="axi4_0_S_ARVALID" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARREADY" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="40" MSB="2" NAME="S_AXI_ARREADY" RIGHT="0" SIGNAME="axi4_0_S_ARREADY" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_RID" DIR="O" ENDIAN="LITTLE" LEFT="5" LSB="0" MPD_INDEX="41" MSB="5" NAME="S_AXI_RID" RIGHT="0" SIGNAME="axi4_0_S_RID" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_RDATA" DIR="O" ENDIAN="LITTLE" LEFT="95" LSB="0" MPD_INDEX="42" MSB="95" NAME="S_AXI_RDATA" RIGHT="0" SIGNAME="axi4_0_S_RDATA" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_DATA_MAX_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_RRESP" DIR="O" ENDIAN="LITTLE" LEFT="5" LSB="0" MPD_INDEX="43" MSB="5" NAME="S_AXI_RRESP" RIGHT="0" SIGNAME="axi4_0_S_RRESP" VECFORMULA="[((C_NUM_SLAVE_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_RLAST" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="44" MSB="2" NAME="S_AXI_RLAST" RIGHT="0" SIGNAME="axi4_0_S_RLAST" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_RUSER" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="45" MSB="2" NAME="S_AXI_RUSER" RIGHT="0" SIGNAME="axi4_0_S_RUSER" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_RUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_RVALID" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="46" MSB="2" NAME="S_AXI_RVALID" RIGHT="0" SIGNAME="axi4_0_S_RVALID" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_RREADY" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="47" MSB="2" NAME="S_AXI_RREADY" RIGHT="0" SIGNAME="axi4_0_S_RREADY" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_ACLK" DIR="I" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="5" MSB="4" NAME="S_AXI_ACLK" RIGHT="0" SIGIS="CLK" SIGNAME="axi4_0_S_ACLK" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_AWID" DIR="I" ENDIAN="LITTLE" LEFT="14" LSB="0" MPD_INDEX="6" MSB="14" NAME="S_AXI_AWID" RIGHT="0" SIGNAME="axi4_0_S_AWID" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_AWADDR" DIR="I" ENDIAN="LITTLE" LEFT="159" LSB="0" MPD_INDEX="7" MSB="159" NAME="S_AXI_AWADDR" RIGHT="0" SIGNAME="axi4_0_S_AWADDR" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ADDR_WIDTH)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_AWLEN" DIR="I" ENDIAN="LITTLE" LEFT="39" LSB="0" MPD_INDEX="8" MSB="39" NAME="S_AXI_AWLEN" RIGHT="0" SIGNAME="axi4_0_S_AWLEN" VECFORMULA="[((C_NUM_SLAVE_SLOTS*8)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_AWSIZE" DIR="I" ENDIAN="LITTLE" LEFT="14" LSB="0" MPD_INDEX="9" MSB="14" NAME="S_AXI_AWSIZE" RIGHT="0" SIGNAME="axi4_0_S_AWSIZE" VECFORMULA="[((C_NUM_SLAVE_SLOTS*3)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_AWBURST" DIR="I" ENDIAN="LITTLE" LEFT="9" LSB="0" MPD_INDEX="10" MSB="9" NAME="S_AXI_AWBURST" RIGHT="0" SIGNAME="axi4_0_S_AWBURST" VECFORMULA="[((C_NUM_SLAVE_SLOTS*2)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_AWLOCK" DIR="I" ENDIAN="LITTLE" LEFT="9" LSB="0" MPD_INDEX="11" MSB="9" NAME="S_AXI_AWLOCK" RIGHT="0" SIGNAME="axi4_0_S_AWLOCK" VECFORMULA="[((C_NUM_SLAVE_SLOTS*2)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_AWCACHE" DIR="I" ENDIAN="LITTLE" LEFT="19" LSB="0" MPD_INDEX="12" MSB="19" NAME="S_AXI_AWCACHE" RIGHT="0" SIGNAME="axi4_0_S_AWCACHE" VECFORMULA="[((C_NUM_SLAVE_SLOTS*4)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_AWPROT" DIR="I" ENDIAN="LITTLE" LEFT="14" LSB="0" MPD_INDEX="13" MSB="14" NAME="S_AXI_AWPROT" RIGHT="0" SIGNAME="axi4_0_S_AWPROT" VECFORMULA="[((C_NUM_SLAVE_SLOTS*3)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_AWQOS" DIR="I" ENDIAN="LITTLE" LEFT="19" LSB="0" MPD_INDEX="14" MSB="19" NAME="S_AXI_AWQOS" RIGHT="0" SIGNAME="axi4_0_S_AWQOS" VECFORMULA="[((C_NUM_SLAVE_SLOTS*4)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_AWUSER" DIR="I" ENDIAN="LITTLE" LEFT="24" LSB="0" MPD_INDEX="15" MSB="24" NAME="S_AXI_AWUSER" RIGHT="0" SIGNAME="axi4_0_S_AWUSER" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_AWUSER_WIDTH)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_AWVALID" DIR="I" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="16" MSB="4" NAME="S_AXI_AWVALID" RIGHT="0" SIGNAME="axi4_0_S_AWVALID" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_AWREADY" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="17" MSB="4" NAME="S_AXI_AWREADY" RIGHT="0" SIGNAME="axi4_0_S_AWREADY" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_WDATA" DIR="I" ENDIAN="LITTLE" LEFT="159" LSB="0" MPD_INDEX="18" MSB="159" NAME="S_AXI_WDATA" RIGHT="0" SIGNAME="axi4_0_S_WDATA" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_DATA_MAX_WIDTH)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_WSTRB" DIR="I" ENDIAN="LITTLE" LEFT="19" LSB="0" MPD_INDEX="19" MSB="19" NAME="S_AXI_WSTRB" RIGHT="0" SIGNAME="axi4_0_S_WSTRB" VECFORMULA="[(((C_NUM_SLAVE_SLOTS*C_AXI_DATA_MAX_WIDTH)/8)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_WLAST" DIR="I" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="20" MSB="4" NAME="S_AXI_WLAST" RIGHT="0" SIGNAME="axi4_0_S_WLAST" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_WUSER" DIR="I" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="21" MSB="4" NAME="S_AXI_WUSER" RIGHT="0" SIGNAME="axi4_0_S_WUSER" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_WUSER_WIDTH)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_WVALID" DIR="I" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="22" MSB="4" NAME="S_AXI_WVALID" RIGHT="0" SIGNAME="axi4_0_S_WVALID" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_WREADY" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="23" MSB="4" NAME="S_AXI_WREADY" RIGHT="0" SIGNAME="axi4_0_S_WREADY" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_BID" DIR="O" ENDIAN="LITTLE" LEFT="14" LSB="0" MPD_INDEX="24" MSB="14" NAME="S_AXI_BID" RIGHT="0" SIGNAME="axi4_0_S_BID" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_BRESP" DIR="O" ENDIAN="LITTLE" LEFT="9" LSB="0" MPD_INDEX="25" MSB="9" NAME="S_AXI_BRESP" RIGHT="0" SIGNAME="axi4_0_S_BRESP" VECFORMULA="[((C_NUM_SLAVE_SLOTS*2)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_BUSER" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="26" MSB="4" NAME="S_AXI_BUSER" RIGHT="0" SIGNAME="axi4_0_S_BUSER" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_BUSER_WIDTH)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_BVALID" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="27" MSB="4" NAME="S_AXI_BVALID" RIGHT="0" SIGNAME="axi4_0_S_BVALID" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_BREADY" DIR="I" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="28" MSB="4" NAME="S_AXI_BREADY" RIGHT="0" SIGNAME="axi4_0_S_BREADY" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_ARID" DIR="I" ENDIAN="LITTLE" LEFT="14" LSB="0" MPD_INDEX="29" MSB="14" NAME="S_AXI_ARID" RIGHT="0" SIGNAME="axi4_0_S_ARID" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_ARADDR" DIR="I" ENDIAN="LITTLE" LEFT="159" LSB="0" MPD_INDEX="30" MSB="159" NAME="S_AXI_ARADDR" RIGHT="0" SIGNAME="axi4_0_S_ARADDR" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ADDR_WIDTH)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_ARLEN" DIR="I" ENDIAN="LITTLE" LEFT="39" LSB="0" MPD_INDEX="31" MSB="39" NAME="S_AXI_ARLEN" RIGHT="0" SIGNAME="axi4_0_S_ARLEN" VECFORMULA="[((C_NUM_SLAVE_SLOTS*8)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_ARSIZE" DIR="I" ENDIAN="LITTLE" LEFT="14" LSB="0" MPD_INDEX="32" MSB="14" NAME="S_AXI_ARSIZE" RIGHT="0" SIGNAME="axi4_0_S_ARSIZE" VECFORMULA="[((C_NUM_SLAVE_SLOTS*3)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_ARBURST" DIR="I" ENDIAN="LITTLE" LEFT="9" LSB="0" MPD_INDEX="33" MSB="9" NAME="S_AXI_ARBURST" RIGHT="0" SIGNAME="axi4_0_S_ARBURST" VECFORMULA="[((C_NUM_SLAVE_SLOTS*2)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_ARLOCK" DIR="I" ENDIAN="LITTLE" LEFT="9" LSB="0" MPD_INDEX="34" MSB="9" NAME="S_AXI_ARLOCK" RIGHT="0" SIGNAME="axi4_0_S_ARLOCK" VECFORMULA="[((C_NUM_SLAVE_SLOTS*2)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_ARCACHE" DIR="I" ENDIAN="LITTLE" LEFT="19" LSB="0" MPD_INDEX="35" MSB="19" NAME="S_AXI_ARCACHE" RIGHT="0" SIGNAME="axi4_0_S_ARCACHE" VECFORMULA="[((C_NUM_SLAVE_SLOTS*4)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_ARPROT" DIR="I" ENDIAN="LITTLE" LEFT="14" LSB="0" MPD_INDEX="36" MSB="14" NAME="S_AXI_ARPROT" RIGHT="0" SIGNAME="axi4_0_S_ARPROT" VECFORMULA="[((C_NUM_SLAVE_SLOTS*3)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_ARQOS" DIR="I" ENDIAN="LITTLE" LEFT="19" LSB="0" MPD_INDEX="37" MSB="19" NAME="S_AXI_ARQOS" RIGHT="0" SIGNAME="axi4_0_S_ARQOS" VECFORMULA="[((C_NUM_SLAVE_SLOTS*4)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_ARUSER" DIR="I" ENDIAN="LITTLE" LEFT="24" LSB="0" MPD_INDEX="38" MSB="24" NAME="S_AXI_ARUSER" RIGHT="0" SIGNAME="axi4_0_S_ARUSER" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ARUSER_WIDTH)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_ARVALID" DIR="I" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="39" MSB="4" NAME="S_AXI_ARVALID" RIGHT="0" SIGNAME="axi4_0_S_ARVALID" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_ARREADY" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="40" MSB="4" NAME="S_AXI_ARREADY" RIGHT="0" SIGNAME="axi4_0_S_ARREADY" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_RID" DIR="O" ENDIAN="LITTLE" LEFT="14" LSB="0" MPD_INDEX="41" MSB="14" NAME="S_AXI_RID" RIGHT="0" SIGNAME="axi4_0_S_RID" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_RDATA" DIR="O" ENDIAN="LITTLE" LEFT="159" LSB="0" MPD_INDEX="42" MSB="159" NAME="S_AXI_RDATA" RIGHT="0" SIGNAME="axi4_0_S_RDATA" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_DATA_MAX_WIDTH)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_RRESP" DIR="O" ENDIAN="LITTLE" LEFT="9" LSB="0" MPD_INDEX="43" MSB="9" NAME="S_AXI_RRESP" RIGHT="0" SIGNAME="axi4_0_S_RRESP" VECFORMULA="[((C_NUM_SLAVE_SLOTS*2)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_RLAST" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="44" MSB="4" NAME="S_AXI_RLAST" RIGHT="0" SIGNAME="axi4_0_S_RLAST" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_RUSER" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="45" MSB="4" NAME="S_AXI_RUSER" RIGHT="0" SIGNAME="axi4_0_S_RUSER" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_RUSER_WIDTH)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_RVALID" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="46" MSB="4" NAME="S_AXI_RVALID" RIGHT="0" SIGNAME="axi4_0_S_RVALID" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_S_RREADY" DIR="I" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="47" MSB="4" NAME="S_AXI_RREADY" RIGHT="0" SIGNAME="axi4_0_S_RREADY" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_ACLK" DIR="I" MPD_INDEX="48" NAME="M_AXI_ACLK" SIGIS="CLK" SIGNAME="axi4_0_M_ACLK" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_AWID" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="49" MSB="1" NAME="M_AXI_AWID" RIGHT="0" SIGNAME="axi4_0_M_AWID" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_M_AWID" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="49" MSB="2" NAME="M_AXI_AWID" RIGHT="0" SIGNAME="axi4_0_M_AWID" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_AWADDR" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="50" MSB="31" NAME="M_AXI_AWADDR" RIGHT="0" SIGNAME="axi4_0_M_AWADDR" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ADDR_WIDTH)-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_AWLEN" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="51" MSB="7" NAME="M_AXI_AWLEN" RIGHT="0" SIGNAME="axi4_0_M_AWLEN" VECFORMULA="[((C_NUM_MASTER_SLOTS*8)-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_AWSIZE" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="52" MSB="2" NAME="M_AXI_AWSIZE" RIGHT="0" SIGNAME="axi4_0_M_AWSIZE" VECFORMULA="[((C_NUM_MASTER_SLOTS*3)-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_AWPROT" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="56" MSB="2" NAME="M_AXI_AWPROT" RIGHT="0" SIGNAME="axi4_0_M_AWPROT" VECFORMULA="[((C_NUM_MASTER_SLOTS*3)-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_AWREGION" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="57" MSB="3" NAME="M_AXI_AWREGION" RIGHT="0" SIGNAME="axi4_0_M_AWREGION" VECFORMULA="[((C_NUM_MASTER_SLOTS*4)-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_AWQOS" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="58" MSB="3" NAME="M_AXI_AWQOS" RIGHT="0" SIGNAME="axi4_0_M_AWQOS" VECFORMULA="[((C_NUM_MASTER_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_AWUSER" DIR="O" MPD_INDEX="59" NAME="M_AXI_AWUSER" SIGNAME="axi4_0_M_AWUSER" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_AWUSER_WIDTH)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_M_AWUSER" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="59" MSB="4" NAME="M_AXI_AWUSER" RIGHT="0" SIGNAME="axi4_0_M_AWUSER" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_AWUSER_WIDTH)-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_AWVALID" DIR="O" MPD_INDEX="60" NAME="M_AXI_AWVALID" SIGNAME="axi4_0_M_AWVALID" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_AWREADY" DIR="I" MPD_INDEX="61" NAME="M_AXI_AWREADY" SIGNAME="axi4_0_M_AWREADY" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_WID" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="62" MSB="1" NAME="M_AXI_WID" RIGHT="0" SIGNAME="axi4_0_M_WID" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_M_WID" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="62" MSB="2" NAME="M_AXI_WID" RIGHT="0" SIGNAME="axi4_0_M_WID" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_WDATA" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="63" MSB="31" NAME="M_AXI_WDATA" RIGHT="0" SIGNAME="axi4_0_M_WDATA" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_DATA_MAX_WIDTH)-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_WSTRB" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="64" MSB="3" NAME="M_AXI_WSTRB" RIGHT="0" SIGNAME="axi4_0_M_WSTRB" VECFORMULA="[(((C_NUM_MASTER_SLOTS*C_AXI_DATA_MAX_WIDTH)/8)-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_WLAST" DIR="O" MPD_INDEX="65" NAME="M_AXI_WLAST" SIGNAME="axi4_0_M_WLAST" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_WUSER" DIR="O" MPD_INDEX="66" NAME="M_AXI_WUSER" SIGNAME="axi4_0_M_WUSER" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_WUSER_WIDTH)-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_WVALID" DIR="O" MPD_INDEX="67" NAME="M_AXI_WVALID" SIGNAME="axi4_0_M_WVALID" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_WREADY" DIR="I" MPD_INDEX="68" NAME="M_AXI_WREADY" SIGNAME="axi4_0_M_WREADY" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_BID" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="69" MSB="1" NAME="M_AXI_BID" RIGHT="0" SIGNAME="axi4_0_M_BID" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_M_BID" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="69" MSB="2" NAME="M_AXI_BID" RIGHT="0" SIGNAME="axi4_0_M_BID" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_BRESP" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="70" MSB="1" NAME="M_AXI_BRESP" RIGHT="0" SIGNAME="axi4_0_M_BRESP" VECFORMULA="[((C_NUM_MASTER_SLOTS*2)-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_BUSER" DIR="I" MPD_INDEX="71" NAME="M_AXI_BUSER" SIGNAME="axi4_0_M_BUSER" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_BUSER_WIDTH)-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_BVALID" DIR="I" MPD_INDEX="72" NAME="M_AXI_BVALID" SIGNAME="axi4_0_M_BVALID" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_BREADY" DIR="O" MPD_INDEX="73" NAME="M_AXI_BREADY" SIGNAME="axi4_0_M_BREADY" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_ARID" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="74" MSB="1" NAME="M_AXI_ARID" RIGHT="0" SIGNAME="axi4_0_M_ARID" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_M_ARID" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="74" MSB="2" NAME="M_AXI_ARID" RIGHT="0" SIGNAME="axi4_0_M_ARID" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_ARADDR" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="75" MSB="31" NAME="M_AXI_ARADDR" RIGHT="0" SIGNAME="axi4_0_M_ARADDR" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ADDR_WIDTH)-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_ARLEN" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="76" MSB="7" NAME="M_AXI_ARLEN" RIGHT="0" SIGNAME="axi4_0_M_ARLEN" VECFORMULA="[((C_NUM_MASTER_SLOTS*8)-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_ARSIZE" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="77" MSB="2" NAME="M_AXI_ARSIZE" RIGHT="0" SIGNAME="axi4_0_M_ARSIZE" VECFORMULA="[((C_NUM_MASTER_SLOTS*3)-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_ARPROT" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="81" MSB="2" NAME="M_AXI_ARPROT" RIGHT="0" SIGNAME="axi4_0_M_ARPROT" VECFORMULA="[((C_NUM_MASTER_SLOTS*3)-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_ARREGION" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="82" MSB="3" NAME="M_AXI_ARREGION" RIGHT="0" SIGNAME="axi4_0_M_ARREGION" VECFORMULA="[((C_NUM_MASTER_SLOTS*4)-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_ARQOS" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="83" MSB="3" NAME="M_AXI_ARQOS" RIGHT="0" SIGNAME="axi4_0_M_ARQOS" VECFORMULA="[((C_NUM_MASTER_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_ARUSER" DIR="O" MPD_INDEX="84" NAME="M_AXI_ARUSER" SIGNAME="axi4_0_M_ARUSER" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ARUSER_WIDTH)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_M_ARUSER" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="84" MSB="4" NAME="M_AXI_ARUSER" RIGHT="0" SIGNAME="axi4_0_M_ARUSER" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ARUSER_WIDTH)-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_ARVALID" DIR="O" MPD_INDEX="85" NAME="M_AXI_ARVALID" SIGNAME="axi4_0_M_ARVALID" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_ARREADY" DIR="I" MPD_INDEX="86" NAME="M_AXI_ARREADY" SIGNAME="axi4_0_M_ARREADY" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_RID" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="87" MSB="1" NAME="M_AXI_RID" RIGHT="0" SIGNAME="axi4_0_M_RID" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
+ <PORT DEF_SIGNAME="axi4_0_M_RID" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="87" MSB="2" NAME="M_AXI_RID" RIGHT="0" SIGNAME="axi4_0_M_RID" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_RDATA" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="88" MSB="31" NAME="M_AXI_RDATA" RIGHT="0" SIGNAME="axi4_0_M_RDATA" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_DATA_MAX_WIDTH)-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_RRESP" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="89" MSB="1" NAME="M_AXI_RRESP" RIGHT="0" SIGNAME="axi4_0_M_RRESP" VECFORMULA="[((C_NUM_MASTER_SLOTS*2)-1):0]"/>
<PORT DEF_SIGNAME="axi4_0_M_RLAST" DIR="I" MPD_INDEX="90" NAME="M_AXI_RLAST" SIGNAME="axi4_0_M_RLAST" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
</SLAVES>
</MEMRANGE>
</MEMORYMAP>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
</MODULE>
<MODULE BUSSTD="AXI" BUSSTD_PSF="AXI" HWVERSION="1.02.a" INSTANCE="axi4lite_0" IPTYPE="BUS" MHS_INDEX="1" MODCLASS="BUS" MODTYPE="axi_interconnect">
<DESCRIPTION TYPE="SHORT">AXI Interconnect</DESCRIPTION>
<DOCUMENTATION>
<DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/axi_interconnect_v1_02_a/doc/ds768_axi_interconnect.pdf" TYPE="IP"/>
</DOCUMENTATION>
+ <LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETERS>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_FAMILY" TYPE="STRING" VALUE="spartan6"/>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="1" NAME="C_BASEFAMILY" TYPE="STRING" VALUE="spartan6"/>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="10" NAME="C_S_AXI_PROTOCOL" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002"/>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="11" NAME="C_M_AXI_PROTOCOL" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000200000002000000020000000200000002000000020000000200000002"/>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="12" NAME="C_M_AXI_BASE_ADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0xffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff0000000041c00000ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff0000000041200000ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff0000000041e00000ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff0000000041240000ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff0000000040000000ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff0000000040020000ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff0000000040600000ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff0000000074800000"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="13" NAME="C_M_AXI_HIGH_ADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000041c0ffff000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004120ffff0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000041e0ffff000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004127ffff000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004000ffff000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004002ffff000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004060ffff00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000748fffff"/>
+ <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="13" NAME="C_M_AXI_HIGH_ADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000041c0ffff000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004120ffff0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000041e0ffff000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004127ffff000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004000ffff000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004002ffff000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004060ffff000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007480ffff"/>
<PARAMETER MPD_INDEX="14" NAME="C_S_AXI_BASE_ID" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000"/>
<PARAMETER MPD_INDEX="15" NAME="C_S_AXI_THREAD_ID_WIDTH" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000"/>
<PARAMETER MPD_INDEX="16" NAME="C_S_AXI_IS_INTERCONNECT" TYPE="STD_LOGIC_VECTOR" VALUE="0b0000000000000000"/>
</SLAVES>
</MEMRANGE>
</MEMORYMAP>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
</MODULE>
<MODULE HWVERSION="8.10.a" INSTANCE="microblaze_0" IPTYPE="PROCESSOR" MHS_INDEX="2" MODCLASS="PROCESSOR" MODTYPE="microblaze" PROCTYPE="MICROBLAZE">
<DESCRIPTION TYPE="SHORT">MicroBlaze</DESCRIPTION>
<DOCUMENTATION>
<DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/microblaze_v8_10_a/doc/microblaze.pdf" TYPE="IP"/>
</DOCUMENTATION>
+ <LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETERS>
<PARAMETER MPD_INDEX="0" NAME="C_SCO" TYPE="integer" VALUE="0"/>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="1" NAME="C_FREQ" TYPE="integer" VALUE="100000000"/>
<PARAMETER MPD_INDEX="140" NAME="C_S15_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
<PARAMETER ADDRESS="NONE" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="6" MPD_INDEX="141" NAME="C_ICACHE_BASEADDR" TYPE="std_logic_vector" VALUE="0xc0000000"/>
<PARAMETER ADDRESS="NONE" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="7" MPD_INDEX="142" NAME="C_ICACHE_HIGHADDR" TYPE="std_logic_vector" VALUE="0xc7ffffff"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="8" MPD_INDEX="143" NAME="C_USE_ICACHE" TYPE="integer" VALUE="0"/>
+ <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="8" MPD_INDEX="143" NAME="C_USE_ICACHE" TYPE="integer" VALUE="1"/>
<PARAMETER MPD_INDEX="144" NAME="C_ALLOW_ICACHE_WR" TYPE="integer" VALUE="1"/>
<PARAMETER MPD_INDEX="145" NAME="C_ADDR_TAG_BITS" TYPE="integer" VALUE="17"/>
- <PARAMETER MPD_INDEX="146" NAME="C_CACHE_BYTE_SIZE" TYPE="integer" VALUE="8192"/>
+ <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="32" MPD_INDEX="146" NAME="C_CACHE_BYTE_SIZE" TYPE="integer" VALUE="16384"/>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="147" NAME="C_ICACHE_USE_FSL" TYPE="integer" VALUE="0"/>
<PARAMETER MPD_INDEX="148" NAME="C_ICACHE_LINE_LEN" TYPE="integer" VALUE="4"/>
<PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="9" MPD_INDEX="149" NAME="C_ICACHE_ALWAYS_USED" TYPE="integer" VALUE="1"/>
<PARAMETER MPD_INDEX="170" NAME="C_INTERCONNECT_M_AXI_IC_READ_ISSUING" TYPE="integer" VALUE="2"/>
<PARAMETER ADDRESS="NONE" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="10" MPD_INDEX="171" NAME="C_DCACHE_BASEADDR" TYPE="std_logic_vector" VALUE="0xc0000000"/>
<PARAMETER ADDRESS="NONE" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="11" MPD_INDEX="172" NAME="C_DCACHE_HIGHADDR" TYPE="std_logic_vector" VALUE="0xc7ffffff"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="12" MPD_INDEX="173" NAME="C_USE_DCACHE" TYPE="integer" VALUE="0"/>
+ <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="12" MPD_INDEX="173" NAME="C_USE_DCACHE" TYPE="integer" VALUE="1"/>
<PARAMETER MPD_INDEX="174" NAME="C_ALLOW_DCACHE_WR" TYPE="integer" VALUE="1"/>
<PARAMETER MPD_INDEX="175" NAME="C_DCACHE_ADDR_TAG" TYPE="integer" VALUE="17"/>
- <PARAMETER MPD_INDEX="176" NAME="C_DCACHE_BYTE_SIZE" TYPE="integer" VALUE="8192"/>
+ <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="33" MPD_INDEX="176" NAME="C_DCACHE_BYTE_SIZE" TYPE="integer" VALUE="16384"/>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="177" NAME="C_DCACHE_USE_FSL" TYPE="integer" VALUE="0"/>
<PARAMETER MPD_INDEX="178" NAME="C_DCACHE_LINE_LEN" TYPE="integer" VALUE="4"/>
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+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_AWADDR" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="163" MSB="31" NAME="M_AXI_IC_AWADDR" RIGHT="0" SIGNAME="axi4_0_S_AWADDR" VECFORMULA="[(C_M_AXI_IC_ADDR_WIDTH-1):0]"/>
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+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_AWLOCK" DIR="O" MPD_INDEX="167" NAME="M_AXI_IC_AWLOCK" SIGNAME="axi4_0_S_AWLOCK"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_AWCACHE" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="168" MSB="3" NAME="M_AXI_IC_AWCACHE" RIGHT="0" SIGNAME="axi4_0_S_AWCACHE" VECFORMULA="[3:0]"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_AWPROT" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="169" MSB="2" NAME="M_AXI_IC_AWPROT" RIGHT="0" SIGNAME="axi4_0_S_AWPROT" VECFORMULA="[2:0]"/>
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+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_AWVALID" DIR="O" MPD_INDEX="171" NAME="M_AXI_IC_AWVALID" SIGNAME="axi4_0_S_AWVALID"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_AWREADY" DIR="I" MPD_INDEX="172" NAME="M_AXI_IC_AWREADY" SIGNAME="axi4_0_S_AWREADY"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_AWUSER" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="173" MSB="4" NAME="M_AXI_IC_AWUSER" RIGHT="0" SIGNAME="axi4_0_S_AWUSER" VECFORMULA="[(C_M_AXI_IC_AWUSER_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_WDATA" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="174" MSB="31" NAME="M_AXI_IC_WDATA" RIGHT="0" SIGNAME="axi4_0_S_WDATA" VECFORMULA="[(C_M_AXI_IC_DATA_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_WSTRB" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="175" MSB="3" NAME="M_AXI_IC_WSTRB" RIGHT="0" SIGNAME="axi4_0_S_WSTRB" VECFORMULA="[((C_M_AXI_IC_DATA_WIDTH/8)-1):0]"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_WLAST" DIR="O" MPD_INDEX="176" NAME="M_AXI_IC_WLAST" SIGNAME="axi4_0_S_WLAST"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_WVALID" DIR="O" MPD_INDEX="177" NAME="M_AXI_IC_WVALID" SIGNAME="axi4_0_S_WVALID"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_WREADY" DIR="I" MPD_INDEX="178" NAME="M_AXI_IC_WREADY" SIGNAME="axi4_0_S_WREADY"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_WUSER" DIR="O" MPD_INDEX="179" NAME="M_AXI_IC_WUSER" SIGNAME="axi4_0_S_WUSER" VECFORMULA="[(C_M_AXI_IC_WUSER_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_BID" DIR="I" MPD_INDEX="180" NAME="M_AXI_IC_BID" SIGNAME="axi4_0_S_BID" VECFORMULA="[(C_M_AXI_IC_THREAD_ID_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_BRESP" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="181" MSB="1" NAME="M_AXI_IC_BRESP" RIGHT="0" SIGNAME="axi4_0_S_BRESP" VECFORMULA="[1:0]"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_BVALID" DIR="I" MPD_INDEX="182" NAME="M_AXI_IC_BVALID" SIGNAME="axi4_0_S_BVALID"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_BREADY" DIR="O" MPD_INDEX="183" NAME="M_AXI_IC_BREADY" SIGNAME="axi4_0_S_BREADY"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_BUSER" DIR="I" MPD_INDEX="184" NAME="M_AXI_IC_BUSER" SIGNAME="axi4_0_S_BUSER" VECFORMULA="[(C_M_AXI_IC_BUSER_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_ARID" DIR="O" MPD_INDEX="185" NAME="M_AXI_IC_ARID" SIGNAME="axi4_0_S_ARID" VECFORMULA="[(C_M_AXI_IC_THREAD_ID_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_ARADDR" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="186" MSB="31" NAME="M_AXI_IC_ARADDR" RIGHT="0" SIGNAME="axi4_0_S_ARADDR" VECFORMULA="[(C_M_AXI_IC_ADDR_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_ARLEN" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="187" MSB="7" NAME="M_AXI_IC_ARLEN" RIGHT="0" SIGNAME="axi4_0_S_ARLEN" VECFORMULA="[7:0]"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_ARSIZE" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="188" MSB="2" NAME="M_AXI_IC_ARSIZE" RIGHT="0" SIGNAME="axi4_0_S_ARSIZE" VECFORMULA="[2:0]"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_ARBURST" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="189" MSB="1" NAME="M_AXI_IC_ARBURST" RIGHT="0" SIGNAME="axi4_0_S_ARBURST" VECFORMULA="[1:0]"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_ARLOCK" DIR="O" MPD_INDEX="190" NAME="M_AXI_IC_ARLOCK" SIGNAME="axi4_0_S_ARLOCK"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_ARCACHE" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="191" MSB="3" NAME="M_AXI_IC_ARCACHE" RIGHT="0" SIGNAME="axi4_0_S_ARCACHE" VECFORMULA="[3:0]"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_ARPROT" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="192" MSB="2" NAME="M_AXI_IC_ARPROT" RIGHT="0" SIGNAME="axi4_0_S_ARPROT" VECFORMULA="[2:0]"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_ARQOS" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="193" MSB="3" NAME="M_AXI_IC_ARQOS" RIGHT="0" SIGNAME="axi4_0_S_ARQOS" VECFORMULA="[3:0]"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_ARVALID" DIR="O" MPD_INDEX="194" NAME="M_AXI_IC_ARVALID" SIGNAME="axi4_0_S_ARVALID"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_ARREADY" DIR="I" MPD_INDEX="195" NAME="M_AXI_IC_ARREADY" SIGNAME="axi4_0_S_ARREADY"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_ARUSER" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="196" MSB="4" NAME="M_AXI_IC_ARUSER" RIGHT="0" SIGNAME="axi4_0_S_ARUSER" VECFORMULA="[(C_M_AXI_IC_ARUSER_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_RID" DIR="I" MPD_INDEX="197" NAME="M_AXI_IC_RID" SIGNAME="axi4_0_S_RID" VECFORMULA="[(C_M_AXI_IC_THREAD_ID_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_RDATA" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="198" MSB="31" NAME="M_AXI_IC_RDATA" RIGHT="0" SIGNAME="axi4_0_S_RDATA" VECFORMULA="[(C_M_AXI_IC_DATA_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_RRESP" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="199" MSB="1" NAME="M_AXI_IC_RRESP" RIGHT="0" SIGNAME="axi4_0_S_RRESP" VECFORMULA="[1:0]"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_RLAST" DIR="I" MPD_INDEX="200" NAME="M_AXI_IC_RLAST" SIGNAME="axi4_0_S_RLAST"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_RVALID" DIR="I" MPD_INDEX="201" NAME="M_AXI_IC_RVALID" SIGNAME="axi4_0_S_RVALID"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_RREADY" DIR="O" MPD_INDEX="202" NAME="M_AXI_IC_RREADY" SIGNAME="axi4_0_S_RREADY"/>
+ <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_RUSER" DIR="I" MPD_INDEX="203" NAME="M_AXI_IC_RUSER" SIGNAME="axi4_0_S_RUSER" VECFORMULA="[(C_M_AXI_IC_RUSER_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_AWID" DIR="O" MPD_INDEX="204" NAME="M_AXI_DC_AWID" SIGNAME="axi4_0_S_AWID" VECFORMULA="[(C_M_AXI_DC_THREAD_ID_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_AWADDR" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="205" MSB="31" NAME="M_AXI_DC_AWADDR" RIGHT="0" SIGNAME="axi4_0_S_AWADDR" VECFORMULA="[(C_M_AXI_DC_ADDR_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_AWLEN" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="206" MSB="7" NAME="M_AXI_DC_AWLEN" RIGHT="0" SIGNAME="axi4_0_S_AWLEN" VECFORMULA="[7:0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_AWSIZE" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="207" MSB="2" NAME="M_AXI_DC_AWSIZE" RIGHT="0" SIGNAME="axi4_0_S_AWSIZE" VECFORMULA="[2:0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_AWBURST" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="208" MSB="1" NAME="M_AXI_DC_AWBURST" RIGHT="0" SIGNAME="axi4_0_S_AWBURST" VECFORMULA="[1:0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_AWLOCK" DIR="O" MPD_INDEX="209" NAME="M_AXI_DC_AWLOCK" SIGNAME="axi4_0_S_AWLOCK"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_AWCACHE" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="210" MSB="3" NAME="M_AXI_DC_AWCACHE" RIGHT="0" SIGNAME="axi4_0_S_AWCACHE" VECFORMULA="[3:0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_AWPROT" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="211" MSB="2" NAME="M_AXI_DC_AWPROT" RIGHT="0" SIGNAME="axi4_0_S_AWPROT" VECFORMULA="[2:0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_AWQOS" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="212" MSB="3" NAME="M_AXI_DC_AWQOS" RIGHT="0" SIGNAME="axi4_0_S_AWQOS" VECFORMULA="[3:0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_AWVALID" DIR="O" MPD_INDEX="213" NAME="M_AXI_DC_AWVALID" SIGNAME="axi4_0_S_AWVALID"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_AWREADY" DIR="I" MPD_INDEX="214" NAME="M_AXI_DC_AWREADY" SIGNAME="axi4_0_S_AWREADY"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_AWUSER" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="215" MSB="4" NAME="M_AXI_DC_AWUSER" RIGHT="0" SIGNAME="axi4_0_S_AWUSER" VECFORMULA="[(C_M_AXI_DC_AWUSER_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_WDATA" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="216" MSB="31" NAME="M_AXI_DC_WDATA" RIGHT="0" SIGNAME="axi4_0_S_WDATA" VECFORMULA="[(C_M_AXI_DC_DATA_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_WSTRB" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="217" MSB="3" NAME="M_AXI_DC_WSTRB" RIGHT="0" SIGNAME="axi4_0_S_WSTRB" VECFORMULA="[((C_M_AXI_DC_DATA_WIDTH/8)-1):0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_WLAST" DIR="O" MPD_INDEX="218" NAME="M_AXI_DC_WLAST" SIGNAME="axi4_0_S_WLAST"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_WVALID" DIR="O" MPD_INDEX="219" NAME="M_AXI_DC_WVALID" SIGNAME="axi4_0_S_WVALID"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_WREADY" DIR="I" MPD_INDEX="220" NAME="M_AXI_DC_WREADY" SIGNAME="axi4_0_S_WREADY"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_WUSER" DIR="O" MPD_INDEX="221" NAME="M_AXI_DC_WUSER" SIGNAME="axi4_0_S_WUSER" VECFORMULA="[(C_M_AXI_DC_WUSER_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_BID" DIR="I" MPD_INDEX="222" NAME="M_AXI_DC_BID" SIGNAME="axi4_0_S_BID" VECFORMULA="[(C_M_AXI_DC_THREAD_ID_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_BRESP" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="223" MSB="1" NAME="M_AXI_DC_BRESP" RIGHT="0" SIGNAME="axi4_0_S_BRESP" VECFORMULA="[1:0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_BVALID" DIR="I" MPD_INDEX="224" NAME="M_AXI_DC_BVALID" SIGNAME="axi4_0_S_BVALID"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_BREADY" DIR="O" MPD_INDEX="225" NAME="M_AXI_DC_BREADY" SIGNAME="axi4_0_S_BREADY"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_BUSER" DIR="I" MPD_INDEX="226" NAME="M_AXI_DC_BUSER" SIGNAME="axi4_0_S_BUSER" VECFORMULA="[(C_M_AXI_DC_BUSER_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_ARID" DIR="O" MPD_INDEX="227" NAME="M_AXI_DC_ARID" SIGNAME="axi4_0_S_ARID" VECFORMULA="[(C_M_AXI_DC_THREAD_ID_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_ARADDR" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="228" MSB="31" NAME="M_AXI_DC_ARADDR" RIGHT="0" SIGNAME="axi4_0_S_ARADDR" VECFORMULA="[(C_M_AXI_DC_ADDR_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_ARLEN" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="229" MSB="7" NAME="M_AXI_DC_ARLEN" RIGHT="0" SIGNAME="axi4_0_S_ARLEN" VECFORMULA="[7:0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_ARSIZE" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="230" MSB="2" NAME="M_AXI_DC_ARSIZE" RIGHT="0" SIGNAME="axi4_0_S_ARSIZE" VECFORMULA="[2:0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_ARBURST" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="231" MSB="1" NAME="M_AXI_DC_ARBURST" RIGHT="0" SIGNAME="axi4_0_S_ARBURST" VECFORMULA="[1:0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_ARLOCK" DIR="O" MPD_INDEX="232" NAME="M_AXI_DC_ARLOCK" SIGNAME="axi4_0_S_ARLOCK"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_ARCACHE" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="233" MSB="3" NAME="M_AXI_DC_ARCACHE" RIGHT="0" SIGNAME="axi4_0_S_ARCACHE" VECFORMULA="[3:0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_ARPROT" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="234" MSB="2" NAME="M_AXI_DC_ARPROT" RIGHT="0" SIGNAME="axi4_0_S_ARPROT" VECFORMULA="[2:0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_ARQOS" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="235" MSB="3" NAME="M_AXI_DC_ARQOS" RIGHT="0" SIGNAME="axi4_0_S_ARQOS" VECFORMULA="[3:0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_ARVALID" DIR="O" MPD_INDEX="236" NAME="M_AXI_DC_ARVALID" SIGNAME="axi4_0_S_ARVALID"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_ARREADY" DIR="I" MPD_INDEX="237" NAME="M_AXI_DC_ARREADY" SIGNAME="axi4_0_S_ARREADY"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_ARUSER" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="238" MSB="4" NAME="M_AXI_DC_ARUSER" RIGHT="0" SIGNAME="axi4_0_S_ARUSER" VECFORMULA="[(C_M_AXI_DC_ARUSER_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_RID" DIR="I" MPD_INDEX="239" NAME="M_AXI_DC_RID" SIGNAME="axi4_0_S_RID" VECFORMULA="[(C_M_AXI_DC_THREAD_ID_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_RDATA" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="240" MSB="31" NAME="M_AXI_DC_RDATA" RIGHT="0" SIGNAME="axi4_0_S_RDATA" VECFORMULA="[(C_M_AXI_DC_DATA_WIDTH-1):0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_RRESP" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="241" MSB="1" NAME="M_AXI_DC_RRESP" RIGHT="0" SIGNAME="axi4_0_S_RRESP" VECFORMULA="[1:0]"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_RLAST" DIR="I" MPD_INDEX="242" NAME="M_AXI_DC_RLAST" SIGNAME="axi4_0_S_RLAST"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_RVALID" DIR="I" MPD_INDEX="243" NAME="M_AXI_DC_RVALID" SIGNAME="axi4_0_S_RVALID"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_RREADY" DIR="O" MPD_INDEX="244" NAME="M_AXI_DC_RREADY" SIGNAME="axi4_0_S_RREADY"/>
+ <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_RUSER" DIR="I" MPD_INDEX="245" NAME="M_AXI_DC_RUSER" SIGNAME="axi4_0_S_RUSER" VECFORMULA="[(C_M_AXI_DC_RUSER_WIDTH-1):0]"/>
<PORT BUS="DEBUG" DEF_SIGNAME="microblaze_0_debug_Dbg_Clk" DIR="I" MPD_INDEX="246" NAME="DBG_CLK" SIGNAME="microblaze_0_debug_Dbg_Clk"/>
<PORT BUS="DEBUG" DEF_SIGNAME="microblaze_0_debug_Dbg_TDI" DIR="I" MPD_INDEX="247" NAME="DBG_TDI" SIGNAME="microblaze_0_debug_Dbg_TDI"/>
<PORT BUS="DEBUG" DEF_SIGNAME="microblaze_0_debug_Dbg_TDO" DIR="O" MPD_INDEX="248" NAME="DBG_TDO" SIGNAME="microblaze_0_debug_Dbg_TDO"/>
<PORTMAP DIR="O" PHYSICAL="M_AXI_IP_RREADY"/>
</PORTMAPS>
</BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_DATA="TRUE" IS_VALID="FALSE" MPD_INDEX="104" NAME="M_AXI_DC" PROTOCOL="AXI4" TYPE="MASTER">
+ <BUSINTERFACE BUSNAME="axi4_0" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_DATA="TRUE" IS_INSTANTIATED="TRUE" MHS_INDEX="4" MPD_INDEX="104" NAME="M_AXI_DC" PROTOCOL="AXI4" TYPE="MASTER">
<PORTMAPS>
<PORTMAP DIR="I" PHYSICAL="CLK"/>
<PORTMAP DIR="O" PHYSICAL="M_AXI_DC_AWID"/>
<PORTMAP DIR="I" PHYSICAL="M_AXI_DC_RUSER"/>
</PORTMAPS>
</BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_INSTRUCTION="TRUE" IS_VALID="FALSE" MPD_INDEX="105" NAME="M_AXI_IC" PROTOCOL="AXI4" TYPE="MASTER">
+ <BUSINTERFACE BUSNAME="axi4_0" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_INSTANTIATED="TRUE" IS_INSTRUCTION="TRUE" MHS_INDEX="5" MPD_INDEX="105" NAME="M_AXI_IC" PROTOCOL="AXI4" TYPE="MASTER">
<PORTMAPS>
<PORTMAP DIR="I" PHYSICAL="CLK"/>
<PORTMAP DIR="O" PHYSICAL="M_AXI_IC_AWID"/>
</PORTMAPS>
</BUSINTERFACE>
</BUSINTERFACES>
- <INTERRUPTINFO TYPE="TARGET">
- <SOURCE INSTANCE="microblaze_0_intc" INTC_INDEX="0"/>
- </INTERRUPTINFO>
<MEMORYMAP>
<MEMRANGE BASEDECIMAL="0" BASENAME="C_BASEADDR" BASEVALUE="0x00000000" HIGHDECIMAL="8191" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x00001FFF" INSTANCE="microblaze_0_d_bram_ctrl" IS_DATA="TRUE" IS_INSTRUCTION="FALSE" IS_VALID="TRUE" MEMTYPE="MEMORY" SIZE="8192" SIZEABRV="8K">
<ACCESSROUTE>
<ROUTEPNT INDEX="0" INSTANCE="microblaze_0_ilmb"/>
</ACCESSROUTE>
</MEMRANGE>
- <MEMRANGE BASEDECIMAL="1954545664" BASENAME="C_BASEADDR" BASEVALUE="0x74800000" HIGHDECIMAL="1955594239" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x748FFFFF" INSTANCE="debug_module" IS_DATA="TRUE" IS_INSTRUCTION="FALSE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="1048576" SIZEABRV="1M">
+ <MEMRANGE BASEDECIMAL="1954545664" BASENAME="C_BASEADDR" BASEVALUE="0x74800000" HIGHDECIMAL="1954611199" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x7480FFFF" INSTANCE="debug_module" IS_DATA="TRUE" IS_INSTRUCTION="FALSE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
<ACCESSROUTE>
<ROUTEPNT INDEX="0" INSTANCE="axi4lite_0"/>
</ACCESSROUTE>
<ROUTEPNT INDEX="0" INSTANCE="axi4lite_0"/>
</ACCESSROUTE>
</MEMRANGE>
+ <MEMRANGE BASEDECIMAL="2147483648" BASENAME="C_S0_AXI_BASEADDR" BASEVALUE="0x80000000" HIGHDECIMAL="2155872255" HIGHNAME="C_S0_AXI_HIGHADDR" HIGHVALUE="0x807FFFFF" INSTANCE="MCB_DDR3" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="MEMORY" SIZE="8388608" SIZEABRV="8M">
+ <ACCESSROUTE>
+ <ROUTEPNT INDEX="0" INSTANCE="axi4_0"/>
+ </ACCESSROUTE>
+ </MEMRANGE>
</MEMORYMAP>
<PERIPHERALS>
<PERIPHERAL INSTANCE="microblaze_0_d_bram_ctrl"/>
<PERIPHERAL INSTANCE="ETHERNET_dma"/>
<PERIPHERAL INSTANCE="microblaze_0_intc"/>
<PERIPHERAL INSTANCE="axi_timer_0"/>
+ <PERIPHERAL INSTANCE="MCB_DDR3"/>
</PERIPHERALS>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
+ <INTERRUPTINFO TYPE="TARGET">
+ <SOURCE INSTANCE="microblaze_0_intc" INTC_INDEX="0"/>
+ </INTERRUPTINFO>
</MODULE>
<MODULE BUSSTD="LMB" BUSSTD_PSF="LMB" HWVERSION="2.00.a" INSTANCE="microblaze_0_ilmb" IPTYPE="BUS" MHS_INDEX="3" MODCLASS="BUS" MODTYPE="lmb_v10">
<DESCRIPTION TYPE="SHORT">Local Memory Bus (LMB) 1.0</DESCRIPTION>
<DOCUMENTATION>
<DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/lmb_v10_v2_00_a/doc/lmb_v10.pdf" TYPE="IP"/>
</DOCUMENTATION>
+ <LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETERS>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_LMB_NUM_SLAVES" TYPE="integer" VALUE="1"/>
<PARAMETER MPD_INDEX="1" NAME="C_LMB_AWIDTH" TYPE="integer" VALUE="32"/>
<IOINTERFACES>
<IOINTERFACE MPD_INDEX="0" NAME="reset_0"/>
</IOINTERFACES>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
</MODULE>
<MODULE BUSSTD="LMB" BUSSTD_PSF="LMB" HWVERSION="2.00.a" INSTANCE="microblaze_0_dlmb" IPTYPE="BUS" MHS_INDEX="4" MODCLASS="BUS" MODTYPE="lmb_v10">
<DESCRIPTION TYPE="SHORT">Local Memory Bus (LMB) 1.0</DESCRIPTION>
<DOCUMENTATION>
<DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/lmb_v10_v2_00_a/doc/lmb_v10.pdf" TYPE="IP"/>
</DOCUMENTATION>
+ <LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETERS>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_LMB_NUM_SLAVES" TYPE="integer" VALUE="1"/>
<PARAMETER MPD_INDEX="1" NAME="C_LMB_AWIDTH" TYPE="integer" VALUE="32"/>
<IOINTERFACES>
<IOINTERFACE MPD_INDEX="0" NAME="reset_0"/>
</IOINTERFACES>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
</MODULE>
<MODULE HWVERSION="3.00.a" INSTANCE="microblaze_0_i_bram_ctrl" IPTYPE="PERIPHERAL" MHS_INDEX="5" MODCLASS="MEMORY_CNTLR" MODTYPE="lmb_bram_if_cntlr">
<DESCRIPTION TYPE="SHORT">LMB BRAM Controller</DESCRIPTION>
<DOCUMENTATION>
<DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/lmb_bram_if_cntlr_v3_00_a/doc/lmb_bram_if_cntlr.pdf" TYPE="IP"/>
</DOCUMENTATION>
+ <LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETERS>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="MEMORY" CHANGEDBY="USER" ENDIAN="BIG" IS_INSTANTIATED="TRUE" LSB="31" MHS_INDEX="2" MPD_INDEX="0" MSB="0" NAME="C_BASEADDR" TYPE="std_logic_vector" VALUE="0x00000000"/>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="MEMORY" CHANGEDBY="USER" ENDIAN="BIG" IS_INSTANTIATED="TRUE" LSB="31" MHS_INDEX="3" MPD_INDEX="1" MSB="0" NAME="C_HIGHADDR" TYPE="std_logic_vector" VALUE="0x00001FFF"/>
</SLAVES>
</MEMRANGE>
</MEMORYMAP>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
</MODULE>
<MODULE HWVERSION="3.00.a" INSTANCE="microblaze_0_d_bram_ctrl" IPTYPE="PERIPHERAL" MHS_INDEX="6" MODCLASS="MEMORY_CNTLR" MODTYPE="lmb_bram_if_cntlr">
<DESCRIPTION TYPE="SHORT">LMB BRAM Controller</DESCRIPTION>
<DOCUMENTATION>
<DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/lmb_bram_if_cntlr_v3_00_a/doc/lmb_bram_if_cntlr.pdf" TYPE="IP"/>
</DOCUMENTATION>
+ <LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETERS>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="MEMORY" CHANGEDBY="USER" ENDIAN="BIG" IS_INSTANTIATED="TRUE" LSB="31" MHS_INDEX="2" MPD_INDEX="0" MSB="0" NAME="C_BASEADDR" TYPE="std_logic_vector" VALUE="0x00000000"/>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="MEMORY" CHANGEDBY="USER" ENDIAN="BIG" IS_INSTANTIATED="TRUE" LSB="31" MHS_INDEX="3" MPD_INDEX="1" MSB="0" NAME="C_HIGHADDR" TYPE="std_logic_vector" VALUE="0x00001FFF"/>
</SLAVES>
</MEMRANGE>
</MEMORYMAP>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
</MODULE>
<MODULE HWVERSION="1.00.a" INSTANCE="microblaze_0_bram_block" IPTYPE="PERIPHERAL" MHS_INDEX="7" MODCLASS="MEMORY" MODTYPE="bram_block">
<DESCRIPTION TYPE="SHORT">Block RAM (BRAM) Block</DESCRIPTION>
<DOCUMENTATION>
<DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/bram_block_v1_00_a/doc/bram_block.pdf" TYPE="IP"/>
</DOCUMENTATION>
+ <LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETERS>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_MEMSIZE" TYPE="integer" VALUE="0x2000"/>
<PARAMETER MPD_INDEX="1" NAME="C_PORT_DWIDTH" TYPE="integer" VALUE="32"/>
</PORTMAPS>
</BUSINTERFACE>
</BUSINTERFACES>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
</MODULE>
<MODULE HWVERSION="3.00.a" INSTANCE="proc_sys_reset_0" IPTYPE="PERIPHERAL" MHS_INDEX="8" MODCLASS="PERIPHERAL" MODTYPE="proc_sys_reset">
<DESCRIPTION TYPE="SHORT">Processor System Reset Module</DESCRIPTION>
<DOCUMENTATION>
<DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/proc_sys_reset_v3_00_a/doc/proc_sys_reset.pdf" TYPE="IP"/>
</DOCUMENTATION>
+ <LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETERS>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_SUBFAMILY" TYPE="string" VALUE="t"/>
<PARAMETER MPD_INDEX="1" NAME="C_EXT_RST_WIDTH" TYPE="integer" VALUE="4"/>
<IOINTERFACES>
<IOINTERFACE MPD_INDEX="0" NAME="reset_0"/>
</IOINTERFACES>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
</MODULE>
<MODULE HWVERSION="4.01.a" INSTANCE="clock_generator_0" IPTYPE="PERIPHERAL" MHS_INDEX="9" MODCLASS="IP" MODTYPE="clock_generator">
<DESCRIPTION TYPE="SHORT">Clock Generator</DESCRIPTION>
<DOCUMENTATION>
<DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/clock_generator_v4_01_a/doc/clock_generator.pdf" TYPE="IP"/>
</DOCUMENTATION>
+ <LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETERS>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_FAMILY" TYPE="STRING" VALUE="spartan6"/>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="1" NAME="C_DEVICE" TYPE="STRING" VALUE="6slx45t"/>
<PORT DIR="O" MPD_INDEX="22" NAME="PSDONE" SIGNAME="__NOC__"/>
</PORTS>
<BUSINTERFACES/>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
</MODULE>
<MODULE HWVERSION="2.00.b" INSTANCE="debug_module" IPTYPE="PERIPHERAL" MHS_INDEX="10" MODCLASS="DEBUG" MODTYPE="mdm">
<DESCRIPTION TYPE="SHORT">MicroBlaze Debug Module (MDM)</DESCRIPTION>
<DOCUMENTATION>
<DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/mdm_v2_00_b/doc/mdm.pdf" TYPE="IP"/>
</DOCUMENTATION>
+ <LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETERS>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_FAMILY" TYPE="STRING" VALUE="spartan6"/>
<PARAMETER MPD_INDEX="1" NAME="C_JTAG_CHAIN" TYPE="INTEGER" VALUE="2"/>
<PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="2" NAME="C_INTERCONNECT" TYPE="INTEGER" VALUE="2"/>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="9" MPD_INDEX="3" NAME="C_BASEADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x74800000"/>
- <PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="10" MPD_INDEX="4" NAME="C_HIGHADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x748FFFFF"/>
+ <PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="10" MPD_INDEX="4" NAME="C_HIGHADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x7480FFFF"/>
<PARAMETER MPD_INDEX="5" NAME="C_SPLB_AWIDTH" TYPE="INTEGER" VALUE="32"/>
<PARAMETER MPD_INDEX="6" NAME="C_SPLB_DWIDTH" TYPE="INTEGER" VALUE="32"/>
<PARAMETER MPD_INDEX="7" NAME="C_SPLB_P2P" TYPE="INTEGER" VALUE="0"/>
</BUSINTERFACE>
</BUSINTERFACES>
<MEMORYMAP>
- <MEMRANGE BASEDECIMAL="1954545664" BASENAME="C_BASEADDR" BASEVALUE="0x74800000" HIGHDECIMAL="1955594239" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x748FFFFF" MEMTYPE="REGISTER" MINSIZE="0x100" SIZE="1048576" SIZEABRV="1M">
+ <MEMRANGE BASEDECIMAL="1954545664" BASENAME="C_BASEADDR" BASEVALUE="0x74800000" HIGHDECIMAL="1954611199" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x7480FFFF" MEMTYPE="REGISTER" MINSIZE="0x100" SIZE="65536" SIZEABRV="64K">
<SLAVES>
<SLAVE BUSINTERFACE="SPLB"/>
<SLAVE BUSINTERFACE="S_AXI"/>
</SLAVES>
</MEMRANGE>
</MEMORYMAP>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
</MODULE>
<MODULE HWVERSION="1.01.a" INSTANCE="RS232_Uart_1" IPTYPE="PERIPHERAL" MHS_INDEX="11" MODCLASS="PERIPHERAL" MODTYPE="axi_uartlite">
<DESCRIPTION TYPE="SHORT">AXI UART (Lite)</DESCRIPTION>
<DOCUMENTATION>
<DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/axi_uartlite_v1_01_a/doc/axi_uartlite_ds741.pdf" TYPE="IP"/>
</DOCUMENTATION>
+ <LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETERS>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_FAMILY" TYPE="STRING" VALUE="spartan6"/>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="1" NAME="C_S_AXI_ACLK_FREQ_HZ" TYPE="INTEGER" VALUE="50000000"/>
</PORTMAPS>
</IOINTERFACE>
</IOINTERFACES>
- <INTERRUPTINFO TYPE="SOURCE">
- <TARGET INSTANCE="microblaze_0_intc" INTC_INDEX="0" PRIORITY="4"/>
- </INTERRUPTINFO>
<MEMORYMAP>
<MEMRANGE BASEDECIMAL="1080033280" BASENAME="C_BASEADDR" BASEVALUE="0x40600000" HIGHDECIMAL="1080098815" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x4060ffff" MEMTYPE="REGISTER" MINSIZE="0x1000" SIZE="65536" SIZEABRV="64K">
<SLAVES>
</SLAVES>
</MEMRANGE>
</MEMORYMAP>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
+ <INTERRUPTINFO TYPE="SOURCE">
+ <TARGET INSTANCE="microblaze_0_intc" INTC_INDEX="0" PRIORITY="4"/>
+ </INTERRUPTINFO>
</MODULE>
<MODULE HWVERSION="1.01.a" INSTANCE="LEDs_4Bits" IPTYPE="PERIPHERAL" MHS_INDEX="12" MODCLASS="PERIPHERAL" MODTYPE="axi_gpio">
<DESCRIPTION TYPE="SHORT">AXI General Purpose IO</DESCRIPTION>
<DOCUMENTATION>
<DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/axi_gpio_v1_01_a/doc/ds744_axi_gpio.pdf" TYPE="IP"/>
</DOCUMENTATION>
+ <LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETERS>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_FAMILY" TYPE="STRING" VALUE="spartan6"/>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="11" MPD_INDEX="1" NAME="C_BASEADDR" TYPE="std_logic_vector" VALUE="0x40020000"/>
</SLAVES>
</MEMRANGE>
</MEMORYMAP>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
</MODULE>
<MODULE HWVERSION="1.01.a" INSTANCE="Push_Buttons_4Bits" IPTYPE="PERIPHERAL" MHS_INDEX="13" MODCLASS="PERIPHERAL" MODTYPE="axi_gpio">
<DESCRIPTION TYPE="SHORT">AXI General Purpose IO</DESCRIPTION>
<DOCUMENTATION>
<DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/axi_gpio_v1_01_a/doc/ds744_axi_gpio.pdf" TYPE="IP"/>
</DOCUMENTATION>
+ <LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETERS>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_FAMILY" TYPE="STRING" VALUE="spartan6"/>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="11" MPD_INDEX="1" NAME="C_BASEADDR" TYPE="std_logic_vector" VALUE="0x40000000"/>
</PORTMAPS>
</IOINTERFACE>
</IOINTERFACES>
- <INTERRUPTINFO TYPE="SOURCE">
- <TARGET INSTANCE="microblaze_0_intc" INTC_INDEX="0" PRIORITY="3"/>
- </INTERRUPTINFO>
<MEMORYMAP>
<MEMRANGE BASEDECIMAL="1073741824" BASENAME="C_BASEADDR" BASEVALUE="0x40000000" HIGHDECIMAL="1073807359" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x4000ffff" MEMTYPE="REGISTER" MINSIZE="0x1000" SIZE="65536" SIZEABRV="64K">
<SLAVES>
</SLAVES>
</MEMRANGE>
</MEMORYMAP>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
+ <INTERRUPTINFO TYPE="SOURCE">
+ <TARGET INSTANCE="microblaze_0_intc" INTC_INDEX="0" PRIORITY="3"/>
+ </INTERRUPTINFO>
</MODULE>
<MODULE HWVERSION="1.02.a" INSTANCE="MCB_DDR3" IPTYPE="PERIPHERAL" MHS_INDEX="14" MODCLASS="MEMORY_CNTLR" MODTYPE="axi_s6_ddrx">
<DESCRIPTION TYPE="SHORT">AXI S6 Memory Controller(DDR/DDR2/DDR3)</DESCRIPTION>
<DOCUMENTATION>
<DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/axi_s6_ddrx_v1_02_a/doc/axi_s6_ddrx.pdf" TYPE="IP"/>
</DOCUMENTATION>
+ <LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETERS>
<PARAMETER MPD_INDEX="0" NAME="C_MCB_LOC" VALUE="MEMC3"/>
<PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="1" NAME="C_MCB_RZQ_LOC" TYPE="STRING" VALUE="K7"/>
<PARAMETER MPD_INDEX="3" NAME="C_MCB_PERFORMANCE" TYPE="STRING" VALUE="STANDARD"/>
<PARAMETER MPD_INDEX="4" NAME="C_BYPASS_CORE_UCF" VALUE="0"/>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="MEMORY" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="11" MPD_INDEX="5" NAME="C_S0_AXI_BASEADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x80000000"/>
- <PARAMETER ADDRESS="HIGH" ADDR_TYPE="MEMORY" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="12" MPD_INDEX="6" NAME="C_S0_AXI_HIGHADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x87ffffff"/>
+ <PARAMETER ADDRESS="HIGH" ADDR_TYPE="MEMORY" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="12" MPD_INDEX="6" NAME="C_S0_AXI_HIGHADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x807FFFFF"/>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="MEMORY" MPD_INDEX="7" NAME="C_S1_AXI_BASEADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0xFFFFFFFF"/>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="MEMORY" MPD_INDEX="8" NAME="C_S1_AXI_HIGHADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000"/>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="MEMORY" MPD_INDEX="9" NAME="C_S2_AXI_BASEADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0xFFFFFFFF"/>
<PARAMETER MPD_INDEX="67" NAME="C_ARB_TIME_SLOT_11" TYPE="STD_LOGIC_VECTOR" VALUE="0b000000011000001010"/>
<PARAMETER MPD_INDEX="68" NAME="C_S0_AXI_ENABLE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="69" NAME="C_S0_AXI_PROTOCOL" TYPE="STRING" VALUE="AXI4"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="70" NAME="C_S0_AXI_ID_WIDTH" TYPE="INTEGER" VALUE="2"/>
+ <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="70" NAME="C_S0_AXI_ID_WIDTH" TYPE="INTEGER" VALUE="3"/>
<PARAMETER MPD_INDEX="71" NAME="C_S0_AXI_ADDR_WIDTH" TYPE="INTEGER" VALUE="32"/>
<PARAMETER MPD_INDEX="72" NAME="C_S0_AXI_DATA_WIDTH" TYPE="INTEGER" VALUE="32"/>
<PARAMETER MPD_INDEX="73" NAME="C_S0_AXI_SUPPORTS_READ" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="151" NAME="C_INTERCONNECT_S5_AXI_WRITE_ACCEPTANCE" TYPE="INTEGER" VALUE="4"/>
<PARAMETER MPD_INDEX="152" NAME="C_MCB_USE_EXTERNAL_BUFPLL" TYPE="INTEGER" VALUE="0"/>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="153" NAME="C_SYS_RST_PRESENT" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="5" NAME="C_INTERCONNECT_S0_AXI_MASTERS" VALUE="ETHERNET_dma.M_AXI_SG & ETHERNET_dma.M_AXI_MM2S & ETHERNET_dma.M_AXI_S2MM"/>
+ <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="5" NAME="C_INTERCONNECT_S0_AXI_MASTERS" VALUE="microblaze_0.M_AXI_DC & microblaze_0.M_AXI_IC & ETHERNET_dma.M_AXI_SG & ETHERNET_dma.M_AXI_MM2S & ETHERNET_dma.M_AXI_S2MM"/>
<PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="6" NAME="C_INTERCONNECT_S0_AXI_AW_REGISTER" VALUE="1"/>
<PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="7" NAME="C_INTERCONNECT_S0_AXI_AR_REGISTER" VALUE="1"/>
<PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="8" NAME="C_INTERCONNECT_S0_AXI_W_REGISTER" VALUE="1"/>
<PORT DIR="O" MPD_INDEX="9" NAME="pll_ce_90_bufpll_o" SIGNAME="__NOC__"/>
<PORT DIR="O" MPD_INDEX="31" NAME="uo_done_cal" SIGNAME="__NOC__"/>
<PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_aresetn" DIR="I" MPD_INDEX="33" NAME="s0_axi_aresetn" SIGIS="RST" SIGNAME="axi4_0_M_aresetn"/>
- <PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_awid" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="34" MSB="1" NAME="s0_axi_awid" RIGHT="0" SIGNAME="axi4_0_M_awid" VECFORMULA="[(C_S0_AXI_ID_WIDTH-1):0]"/>
+ <PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_awid" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="34" MSB="2" NAME="s0_axi_awid" RIGHT="0" SIGNAME="axi4_0_M_awid" VECFORMULA="[(C_S0_AXI_ID_WIDTH-1):0]"/>
<PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_awaddr" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="35" MSB="31" NAME="s0_axi_awaddr" RIGHT="0" SIGNAME="axi4_0_M_awaddr" VECFORMULA="[(C_S0_AXI_ADDR_WIDTH-1):0]"/>
<PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_awlen" DIR="I" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="36" MSB="7" NAME="s0_axi_awlen" RIGHT="0" SIGNAME="axi4_0_M_awlen" VECFORMULA="[7:0]"/>
<PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_awsize" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="37" MSB="2" NAME="s0_axi_awsize" RIGHT="0" SIGNAME="axi4_0_M_awsize" VECFORMULA="[2:0]"/>
<PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_wlast" DIR="I" MPD_INDEX="47" NAME="s0_axi_wlast" SIGNAME="axi4_0_M_wlast"/>
<PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_wvalid" DIR="I" MPD_INDEX="48" NAME="s0_axi_wvalid" SIGNAME="axi4_0_M_wvalid"/>
<PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_wready" DIR="O" MPD_INDEX="49" NAME="s0_axi_wready" SIGNAME="axi4_0_M_wready"/>
- <PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_bid" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="50" MSB="1" NAME="s0_axi_bid" RIGHT="0" SIGNAME="axi4_0_M_bid" VECFORMULA="[(C_S0_AXI_ID_WIDTH-1):0]"/>
+ <PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_bid" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="50" MSB="2" NAME="s0_axi_bid" RIGHT="0" SIGNAME="axi4_0_M_bid" VECFORMULA="[(C_S0_AXI_ID_WIDTH-1):0]"/>
<PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_bresp" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="51" MSB="1" NAME="s0_axi_bresp" RIGHT="0" SIGNAME="axi4_0_M_bresp" VECFORMULA="[1:0]"/>
<PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_bvalid" DIR="O" MPD_INDEX="52" NAME="s0_axi_bvalid" SIGNAME="axi4_0_M_bvalid"/>
<PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_bready" DIR="I" MPD_INDEX="53" NAME="s0_axi_bready" SIGNAME="axi4_0_M_bready"/>
- <PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_arid" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="54" MSB="1" NAME="s0_axi_arid" RIGHT="0" SIGNAME="axi4_0_M_arid" VECFORMULA="[(C_S0_AXI_ID_WIDTH-1):0]"/>
+ <PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_arid" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="54" MSB="2" NAME="s0_axi_arid" RIGHT="0" SIGNAME="axi4_0_M_arid" VECFORMULA="[(C_S0_AXI_ID_WIDTH-1):0]"/>
<PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_araddr" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="55" MSB="31" NAME="s0_axi_araddr" RIGHT="0" SIGNAME="axi4_0_M_araddr" VECFORMULA="[(C_S0_AXI_ADDR_WIDTH-1):0]"/>
<PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_arlen" DIR="I" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="56" MSB="7" NAME="s0_axi_arlen" RIGHT="0" SIGNAME="axi4_0_M_arlen" VECFORMULA="[7:0]"/>
<PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_arsize" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="57" MSB="2" NAME="s0_axi_arsize" RIGHT="0" SIGNAME="axi4_0_M_arsize" VECFORMULA="[2:0]"/>
<PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_arqos" DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="62" MSB="3" NAME="s0_axi_arqos" RIGHT="0" SIGNAME="axi4_0_M_arqos" VECFORMULA="[3:0]"/>
<PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_arvalid" DIR="I" MPD_INDEX="63" NAME="s0_axi_arvalid" SIGNAME="axi4_0_M_arvalid"/>
<PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_arready" DIR="O" MPD_INDEX="64" NAME="s0_axi_arready" SIGNAME="axi4_0_M_arready"/>
- <PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_rid" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="65" MSB="1" NAME="s0_axi_rid" RIGHT="0" SIGNAME="axi4_0_M_rid" VECFORMULA="[(C_S0_AXI_ID_WIDTH-1):0]"/>
+ <PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_rid" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="65" MSB="2" NAME="s0_axi_rid" RIGHT="0" SIGNAME="axi4_0_M_rid" VECFORMULA="[(C_S0_AXI_ID_WIDTH-1):0]"/>
<PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_rdata" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="66" MSB="31" NAME="s0_axi_rdata" RIGHT="0" SIGNAME="axi4_0_M_rdata" VECFORMULA="[(C_S0_AXI_DATA_WIDTH-1):0]"/>
<PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_rresp" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="67" MSB="1" NAME="s0_axi_rresp" RIGHT="0" SIGNAME="axi4_0_M_rresp" VECFORMULA="[1:0]"/>
<PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_rlast" DIR="O" MPD_INDEX="68" NAME="s0_axi_rlast" SIGNAME="axi4_0_M_rlast"/>
<PORTMAP DIR="I" PHYSICAL="s0_axi_rready"/>
</PORTMAPS>
<MASTERS>
+ <MASTER BUSINTERFACE="M_AXI_DC" INSTANCE="microblaze_0"/>
+ <MASTER BUSINTERFACE="M_AXI_IC" INSTANCE="microblaze_0"/>
<MASTER BUSINTERFACE="M_AXI_SG" INSTANCE="ETHERNET_dma"/>
<MASTER BUSINTERFACE="M_AXI_MM2S" INSTANCE="ETHERNET_dma"/>
<MASTER BUSINTERFACE="M_AXI_S2MM" INSTANCE="ETHERNET_dma"/>
</IOINTERFACE>
</IOINTERFACES>
<MEMORYMAP>
- <MEMRANGE BASEDECIMAL="2147483648" BASENAME="C_S0_AXI_BASEADDR" BASEVALUE="0x80000000" HIGHDECIMAL="2281701375" HIGHNAME="C_S0_AXI_HIGHADDR" HIGHVALUE="0x87ffffff" IS_CACHEABLE="TRUE" IS_DCACHED="TRUE" IS_ICACHED="TRUE" MEMTYPE="MEMORY" MINSIZE="0x1000" SIZE="134217728" SIZEABRV="128M">
+ <MEMRANGE BASEDECIMAL="2147483648" BASENAME="C_S0_AXI_BASEADDR" BASEVALUE="0x80000000" HIGHDECIMAL="2155872255" HIGHNAME="C_S0_AXI_HIGHADDR" HIGHVALUE="0x807FFFFF" IS_CACHEABLE="TRUE" IS_DCACHED="TRUE" IS_ICACHED="TRUE" MEMTYPE="MEMORY" MINSIZE="0x1000" SIZE="8388608" SIZEABRV="8M">
<SLAVES>
<SLAVE BUSINTERFACE="S0_AXI"/>
</SLAVES>
</SLAVES>
</MEMRANGE>
</MEMORYMAP>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
</MODULE>
<MODULE HWVERSION="2.01.a" INSTANCE="ETHERNET" IPTYPE="PERIPHERAL" MHS_INDEX="15" MODCLASS="PERIPHERAL" MODTYPE="axi_ethernet">
<DESCRIPTION TYPE="SHORT">AXI Ethernet</DESCRIPTION>
<DOCUMENTATION>
<DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/axi_ethernet_v2_01_a/doc/ds759_axi_ethernet.pdf" TYPE="IP"/>
</DOCUMENTATION>
+ <LICENSEINFO EXPIRESON="Jan-30-2016" ICON_NAME="ps_core_preferred" STATE="Hardware Evaluation" TYPE="Hardware_Evaluation"/>
<PARAMETERS>
<PARAMETER MPD_INDEX="0" NAME="C_S_AXI_PROTOCOL" TYPE="STRING" VALUE="AXI4LITE"/>
<PARAMETER MPD_INDEX="1" NAME="C_AXI_STR_TXC_TDATA_WIDTH" TYPE="INTEGER" VALUE="32"/>
</PORTMAPS>
</IOINTERFACE>
</IOINTERFACES>
- <INTERRUPTINFO TYPE="SOURCE">
- <TARGET INSTANCE="microblaze_0_intc" INTC_INDEX="0" PRIORITY="0"/>
- </INTERRUPTINFO>
<MEMORYMAP>
<MEMRANGE BASEDECIMAL="1092878336" BASENAME="C_BASEADDR" BASEVALUE="0x41240000" HIGHDECIMAL="1093140479" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x4127ffff" MEMTYPE="REGISTER" MINSIZE="0x40000" SIZE="262144" SIZEABRV="256K">
<SLAVES>
</SLAVES>
</MEMRANGE>
</MEMORYMAP>
- <LICENSEINFO EXPIRESON="Jan-30-2016" ICON_NAME="ps_core_preferred" STATE="Hardware Evaluation" TYPE="Hardware_Evaluation"/>
+ <INTERRUPTINFO TYPE="SOURCE">
+ <TARGET INSTANCE="microblaze_0_intc" INTC_INDEX="0" PRIORITY="0"/>
+ </INTERRUPTINFO>
</MODULE>
<MODULE HWVERSION="3.00.a" INSTANCE="ETHERNET_dma" IPTYPE="PERIPHERAL" MHS_INDEX="16" MODCLASS="PERIPHERAL" MODTYPE="axi_dma">
<DESCRIPTION TYPE="SHORT">AXI DMA Engine</DESCRIPTION>
<DOCUMENTATION>
<DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/axi_dma_v3_00_a/doc/axi_dma_ds781.pdf" TYPE="IP"/>
</DOCUMENTATION>
+ <LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETERS>
<PARAMETER MPD_INDEX="0" NAME="C_S_AXI_LITE_ADDR_WIDTH" TYPE="INTEGER" VALUE="32"/>
<PARAMETER MPD_INDEX="1" NAME="C_S_AXI_LITE_DATA_WIDTH" TYPE="INTEGER" VALUE="32"/>
</PORTMAPS>
</BUSINTERFACE>
</BUSINTERFACES>
- <INTERRUPTINFO TYPE="SOURCE">
- <TARGET INSTANCE="microblaze_0_intc" INTC_INDEX="0" PRIORITY="1"/>
- <TARGET INSTANCE="microblaze_0_intc" INTC_INDEX="0" PRIORITY="2"/>
- </INTERRUPTINFO>
<MEMORYMAP>
<MEMRANGE BASEDECIMAL="1105199104" BASENAME="C_BASEADDR" BASEVALUE="0x41e00000" HIGHDECIMAL="1105264639" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x41e0ffff" MEMTYPE="REGISTER" MINSIZE="0x1000" SIZE="65536" SIZEABRV="64K">
<SLAVES>
</SLAVES>
</MEMRANGE>
</MEMORYMAP>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
+ <INTERRUPTINFO TYPE="SOURCE">
+ <TARGET INSTANCE="microblaze_0_intc" INTC_INDEX="0" PRIORITY="1"/>
+ <TARGET INSTANCE="microblaze_0_intc" INTC_INDEX="0" PRIORITY="2"/>
+ </INTERRUPTINFO>
</MODULE>
<MODULE HWVERSION="1.01.a" INSTANCE="microblaze_0_intc" IPTYPE="PERIPHERAL" MHS_INDEX="17" MODCLASS="INTERRUPT_CNTLR" MODTYPE="axi_intc">
<DESCRIPTION TYPE="SHORT">AXI Interrupt Controller</DESCRIPTION>
<DOCUMENTATION>
<DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/axi_intc_v1_01_a/doc/ds747_axi_intc.pdf" TYPE="IP"/>
</DOCUMENTATION>
+ <LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETERS>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_FAMILY" TYPE="STRING" VALUE="spartan6"/>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="7" MPD_INDEX="1" NAME="C_BASEADDR" TYPE="std_logic_vector" VALUE="0x41200000"/>
</PORTMAPS>
</BUSINTERFACE>
</BUSINTERFACES>
+ <MEMORYMAP>
+ <MEMRANGE BASEDECIMAL="1092616192" BASENAME="C_BASEADDR" BASEVALUE="0x41200000" HIGHDECIMAL="1092681727" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x4120ffff" MEMTYPE="REGISTER" MINSIZE="0x1000" SIZE="65536" SIZEABRV="64K">
+ <SLAVES>
+ <SLAVE BUSINTERFACE="S_AXI"/>
+ </SLAVES>
+ </MEMRANGE>
+ </MEMORYMAP>
<INTERRUPTINFO INTC_INDEX="0" TYPE="CONTROLLER">
<SOURCE INSTANCE="ETHERNET" PRIORITY="0" SIGNAME="ETHERNET_INTERRUPT"/>
<SOURCE INSTANCE="ETHERNET_dma" PRIORITY="1" SIGNAME="ETHERNET_dma_mm2s_introut"/>
<SOURCE INSTANCE="axi_timer_0" PRIORITY="5" SIGNAME="axi_timer_0_Interrupt"/>
<TARGET INSTANCE="microblaze_0"/>
</INTERRUPTINFO>
- <MEMORYMAP>
- <MEMRANGE BASEDECIMAL="1092616192" BASENAME="C_BASEADDR" BASEVALUE="0x41200000" HIGHDECIMAL="1092681727" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x4120ffff" MEMTYPE="REGISTER" MINSIZE="0x1000" SIZE="65536" SIZEABRV="64K">
- <SLAVES>
- <SLAVE BUSINTERFACE="S_AXI"/>
- </SLAVES>
- </MEMRANGE>
- </MEMORYMAP>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
</MODULE>
<MODULE HWVERSION="1.01.a" INSTANCE="axi_timer_0" IPTYPE="PERIPHERAL" MHS_INDEX="18" MODCLASS="PERIPHERAL" MODTYPE="axi_timer">
<DESCRIPTION TYPE="SHORT">AXI Timer/Counter</DESCRIPTION>
<DOCUMENTATION>
<DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/axi_timer_v1_01_a/doc/axi_timer_ds764.pdf" TYPE="IP"/>
</DOCUMENTATION>
+ <LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETERS>
<PARAMETER MPD_INDEX="0" NAME="C_S_AXI_PROTOCOL" TYPE="STRING" VALUE="AXI4LITE"/>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="1" NAME="C_FAMILY" TYPE="STRING" VALUE="spartan6"/>
</PORTMAPS>
</BUSINTERFACE>
</BUSINTERFACES>
- <INTERRUPTINFO TYPE="SOURCE">
- <TARGET INSTANCE="microblaze_0_intc" INTC_INDEX="0" PRIORITY="5"/>
- </INTERRUPTINFO>
<MEMORYMAP>
<MEMRANGE BASEDECIMAL="1103101952" BASENAME="C_BASEADDR" BASEVALUE="0x41c00000" HIGHDECIMAL="1103167487" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x41c0ffff" MEMTYPE="REGISTER" MINSIZE="0x1000" SIZE="65536" SIZEABRV="64K">
<SLAVES>
</SLAVES>
</MEMRANGE>
</MEMORYMAP>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
+ <INTERRUPTINFO TYPE="SOURCE">
+ <TARGET INSTANCE="microblaze_0_intc" INTC_INDEX="0" PRIORITY="5"/>
+ </INTERRUPTINFO>
</MODULE>
</MODULES>
- <EXTERNALPORTS>
- <PORT DIR="I" MHS_INDEX="0" NAME="RESET" RSTPOLARITY="1" SIGIS="RST" SIGNAME="RESET"/>
- <PORT CLKFREQUENCY="200000000" DIFFPOLARITY="P" DIR="I" MHS_INDEX="1" NAME="CLK_P" SIGIS="CLK" SIGNAME="CLK"/>
- <PORT CLKFREQUENCY="200000000" DIFFPOLARITY="N" DIR="I" MHS_INDEX="2" NAME="CLK_N" SIGIS="CLK" SIGNAME="CLK"/>
- <PORT DIR="O" MHS_INDEX="3" NAME="RS232_Uart_1_sout" SIGNAME="RS232_Uart_1_sout"/>
- <PORT DIR="I" MHS_INDEX="4" NAME="RS232_Uart_1_sin" SIGNAME="RS232_Uart_1_sin"/>
- <PORT DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MHS_INDEX="5" MSB="3" NAME="LEDs_4Bits_TRI_O" RIGHT="0" SIGNAME="LEDs_4Bits_TRI_O"/>
- <PORT DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MHS_INDEX="6" MSB="3" NAME="Push_Buttons_4Bits_TRI_I" RIGHT="0" SIGNAME="Push_Buttons_4Bits_TRI_I"/>
- <PORT DIR="O" MHS_INDEX="7" NAME="mcbx_dram_clk" SIGNAME="mcbx_dram_clk"/>
- <PORT DIR="O" MHS_INDEX="8" NAME="mcbx_dram_clk_n" SIGNAME="mcbx_dram_clk_n"/>
- <PORT DIR="O" MHS_INDEX="9" NAME="mcbx_dram_cke" SIGNAME="mcbx_dram_cke"/>
- <PORT DIR="O" MHS_INDEX="10" NAME="mcbx_dram_odt" SIGNAME="mcbx_dram_odt"/>
- <PORT DIR="O" MHS_INDEX="11" NAME="mcbx_dram_ras_n" SIGNAME="mcbx_dram_ras_n"/>
- <PORT DIR="O" MHS_INDEX="12" NAME="mcbx_dram_cas_n" SIGNAME="mcbx_dram_cas_n"/>
- <PORT DIR="O" MHS_INDEX="13" NAME="mcbx_dram_we_n" SIGNAME="mcbx_dram_we_n"/>
- <PORT DIR="O" MHS_INDEX="14" NAME="mcbx_dram_udm" SIGNAME="mcbx_dram_udm"/>
- <PORT DIR="O" MHS_INDEX="15" NAME="mcbx_dram_ldm" SIGNAME="mcbx_dram_ldm"/>
- <PORT DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MHS_INDEX="16" MSB="2" NAME="mcbx_dram_ba" RIGHT="0" SIGNAME="mcbx_dram_ba"/>
- <PORT DIR="O" ENDIAN="LITTLE" LEFT="12" LSB="0" MHS_INDEX="17" MSB="12" NAME="mcbx_dram_addr" RIGHT="0" SIGNAME="mcbx_dram_addr"/>
- <PORT DIR="O" MHS_INDEX="18" NAME="mcbx_dram_ddr3_rst" SIGNAME="mcbx_dram_ddr3_rst"/>
- <PORT DIR="IO" ENDIAN="LITTLE" LEFT="15" LSB="0" MHS_INDEX="19" MSB="15" NAME="mcbx_dram_dq" RIGHT="0" SIGNAME="mcbx_dram_dq"/>
- <PORT DIR="IO" MHS_INDEX="20" NAME="mcbx_dram_dqs" SIGNAME="mcbx_dram_dqs"/>
- <PORT DIR="IO" MHS_INDEX="21" NAME="mcbx_dram_dqs_n" SIGNAME="mcbx_dram_dqs_n"/>
- <PORT DIR="IO" MHS_INDEX="22" NAME="mcbx_dram_udqs" SIGNAME="mcbx_dram_udqs"/>
- <PORT DIR="IO" MHS_INDEX="23" NAME="mcbx_dram_udqs_n" SIGNAME="mcbx_dram_udqs_n"/>
- <PORT DIR="IO" MHS_INDEX="24" NAME="rzq" SIGNAME="rzq"/>
- <PORT DIR="IO" MHS_INDEX="25" NAME="zio" SIGNAME="zio"/>
- <PORT DIR="IO" MHS_INDEX="26" NAME="ETHERNET_MDIO" SIGNAME="ETHERNET_MDIO"/>
- <PORT DIR="O" MHS_INDEX="27" NAME="ETHERNET_MDC" SIGNAME="ETHERNET_MDC"/>
- <PORT DIR="O" MHS_INDEX="28" NAME="ETHERNET_TX_ER" SIGNAME="ETHERNET_TX_ER"/>
- <PORT DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MHS_INDEX="29" MSB="7" NAME="ETHERNET_TXD" RIGHT="0" SIGNAME="ETHERNET_TXD"/>
- <PORT DIR="O" MHS_INDEX="30" NAME="ETHERNET_TX_EN" SIGNAME="ETHERNET_TX_EN"/>
- <PORT DIR="I" MHS_INDEX="31" NAME="ETHERNET_MII_TX_CLK" SIGNAME="ETHERNET_MII_TX_CLK"/>
- <PORT DIR="O" MHS_INDEX="32" NAME="ETHERNET_TX_CLK" SIGNAME="ETHERNET_TX_CLK"/>
- <PORT DIR="I" ENDIAN="LITTLE" LEFT="7" LSB="0" MHS_INDEX="33" MSB="7" NAME="ETHERNET_RXD" RIGHT="0" SIGNAME="ETHERNET_RXD"/>
- <PORT DIR="I" MHS_INDEX="34" NAME="ETHERNET_RX_ER" SIGNAME="ETHERNET_RX_ER"/>
- <PORT DIR="I" MHS_INDEX="35" NAME="ETHERNET_RX_CLK" SIGNAME="ETHERNET_RX_CLK"/>
- <PORT DIR="I" MHS_INDEX="36" NAME="ETHERNET_RX_DV" SIGNAME="ETHERNET_RX_DV"/>
- <PORT DIR="O" MHS_INDEX="37" NAME="ETHERNET_PHY_RST_N" SIGNAME="ETHERNET_PHY_RST_N"/>
- </EXTERNALPORTS>
-
</EDKSYSTEM>
\ No newline at end of file
-
<FILTERS>
<IDENTIFICATION VERSION="1.2" XTLVERSION="1.2"/>
<SET CLASS="PROJECT" DISPLAYMODE="TREE" VIEW_ID="BUSINTERFACE">
<HEADERS HSCROLL="0" VSCROLL="0">
<VARIABLE COL_INDEX="0" COL_WIDTH="224" IS_VISIBLE="TRUE" VIEWDISP="Name" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="1" COL_WIDTH="525" IS_VISIBLE="TRUE" VIEWDISP="Bus Name" VIEWTYPE="HEADER"/>
+ <VARIABLE COL_INDEX="1" COL_WIDTH="542" IS_VISIBLE="TRUE" VIEWDISP="Bus Name" VIEWTYPE="HEADER"/>
<VARIABLE COL_INDEX="2" IS_VISIBLE="FALSE" VIEWDISP="Bus Standard" VIEWTYPE="HEADER"/>
<VARIABLE COL_INDEX="3" COL_WIDTH="230" IS_VISIBLE="TRUE" VIEWDISP="IP Type" VIEWTYPE="HEADER"/>
<VARIABLE COL_INDEX="4" COL_WIDTH="797" IS_VISIBLE="TRUE" VIEWDISP="IP Version" VIEWTYPE="HEADER"/>
<VARIABLE COL_INDEX="6" IS_VISIBLE="FALSE" VIEWDISP="Type" VIEWTYPE="HEADER"/>
</HEADERS>
<SPLITTERS COLLAPSIBLE="1" HANDLEWIDTH="4" MARKER="255" ORIENTATION="1" RESIZE="1" SIZES="172,900,325" VERSION="0"/>
+ <SET ID="MCB_DDR3" IS_EXPANDED="TRUE"/>
<STATUS>
<SELECTIONS>
<VARIABLE ID="S0_AXI" PARENT="MCB_DDR3"/>
<VARIABLE ID="RS232_Uart_1" ROW_INDEX="16"/>
<VARIABLE ID="LEDs_4Bits" ROW_INDEX="13"/>
<VARIABLE ID="Push_Buttons_4Bits" ROW_INDEX="14"/>
- <VARIABLE ID="MCB_DDR3" ROW_INDEX="8"/>
+ <VARIABLE ID="MCB_DDR3" IS_EXPANDED="TRUE" ROW_INDEX="8"/>
<VARIABLE ID="ETHERNET" ROW_INDEX="12"/>
<VARIABLE ID="ETHERNET_dma" ROW_INDEX="11"/>
<VARIABLE ID="microblaze_0_intc" ROW_INDEX="10"/>
<SPLITTERS COLLAPSIBLE="1" HANDLEWIDTH="4" MARKER="255" ORIENTATION="1" RESIZE="1" SIZES="0,630,180" VERSION="0"/>
<SET ID="microblaze_0" IS_EXPANDED="TRUE"/>
<STATUS>
- <SELECTIONS>
- <VARIABLE ID="microblaze_0.debug_module:C_BASEADDR:C_HIGHADDR" PARENT="microblaze_0"/>
- </SELECTIONS>
+ <SELECTIONS/>
</STATUS>
<SEQUENCES IS_DEF_SEQUENCES="TRUE">
<VARIABLE ID="microblaze_0" IS_EXPANDED="TRUE" ROW_INDEX="0"/>
- <VARIABLE ID="Unmapped Addresses" ROW_INDEX="1"/>
</SEQUENCES>
</SET>
PARAMETER C_DEBUG_ENABLED = 1\r
PARAMETER C_ICACHE_BASEADDR = 0xc0000000\r
PARAMETER C_ICACHE_HIGHADDR = 0xc7ffffff\r
- PARAMETER C_USE_ICACHE = 0\r
+ PARAMETER C_USE_ICACHE = 1\r
PARAMETER C_ICACHE_ALWAYS_USED = 1\r
PARAMETER C_DCACHE_BASEADDR = 0xc0000000\r
PARAMETER C_DCACHE_HIGHADDR = 0xc7ffffff\r
- PARAMETER C_USE_DCACHE = 0\r
+ PARAMETER C_USE_DCACHE = 1\r
PARAMETER C_DCACHE_ALWAYS_USED = 1\r
PARAMETER C_INTERCONNECT_M_AXI_DC_AW_REGISTER = 1\r
PARAMETER C_INTERCONNECT_M_AXI_DC_W_REGISTER = 1\r
PARAMETER C_NUMBER_OF_PC_BRK = 7\r
PARAMETER C_NUMBER_OF_WR_ADDR_BRK = 2\r
PARAMETER C_NUMBER_OF_RD_ADDR_BRK = 2\r
+ PARAMETER C_CACHE_BYTE_SIZE = 16384\r
+ PARAMETER C_DCACHE_BYTE_SIZE = 16384\r
BUS_INTERFACE M_AXI_DP = axi4lite_0\r
BUS_INTERFACE DEBUG = microblaze_0_debug\r
BUS_INTERFACE DLMB = microblaze_0_dlmb\r
BUS_INTERFACE ILMB = microblaze_0_ilmb\r
+ BUS_INTERFACE M_AXI_DC = axi4_0\r
+ BUS_INTERFACE M_AXI_IC = axi4_0\r
PORT MB_RESET = proc_sys_reset_0_MB_Reset\r
PORT CLK = clk_100_0000MHzPLL0\r
PORT INTERRUPT = microblaze_0_interrupt\r
PARAMETER C_INTERCONNECT_S_AXI_R_REGISTER = 1\r
PARAMETER C_INTERCONNECT_S_AXI_B_REGISTER = 1\r
PARAMETER C_BASEADDR = 0x74800000\r
- PARAMETER C_HIGHADDR = 0x748FFFFF\r
+ PARAMETER C_HIGHADDR = 0x7480FFFF\r
BUS_INTERFACE S_AXI = axi4lite_0\r
BUS_INTERFACE MBDEBUG_0 = microblaze_0_debug\r
PORT S_AXI_ACLK = clk_50_0000MHzPLL0\r
PARAMETER C_MCB_RZQ_LOC = K7\r
PARAMETER C_MCB_ZIO_LOC = R7\r
PARAMETER C_MEM_PARTNO = MT41J64M16XX-187E\r
- PARAMETER C_INTERCONNECT_S0_AXI_MASTERS = ETHERNET_dma.M_AXI_SG & ETHERNET_dma.M_AXI_MM2S & ETHERNET_dma.M_AXI_S2MM\r
+ PARAMETER C_INTERCONNECT_S0_AXI_MASTERS = microblaze_0.M_AXI_DC & microblaze_0.M_AXI_IC & ETHERNET_dma.M_AXI_SG & ETHERNET_dma.M_AXI_MM2S & ETHERNET_dma.M_AXI_S2MM\r
PARAMETER C_INTERCONNECT_S0_AXI_AW_REGISTER = 1\r
PARAMETER C_INTERCONNECT_S0_AXI_AR_REGISTER = 1\r
PARAMETER C_INTERCONNECT_S0_AXI_W_REGISTER = 1\r
PARAMETER C_INTERCONNECT_S0_AXI_R_REGISTER = 1\r
PARAMETER C_INTERCONNECT_S0_AXI_B_REGISTER = 1\r
PARAMETER C_S0_AXI_BASEADDR = 0x80000000\r
- PARAMETER C_S0_AXI_HIGHADDR = 0x87ffffff\r
+ PARAMETER C_S0_AXI_HIGHADDR = 0x807FFFFF\r
PARAMETER C_S0_AXI_STRICT_COHERENCY = 0\r
BUS_INTERFACE S0_AXI = axi4_0\r
PORT mcbx_dram_clk = mcbx_dram_clk\r
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