--- /dev/null
+/*\r
+ FreeRTOS V5.4.2 - Copyright (C) 2009 Real Time Engineers Ltd.\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation and modified by the FreeRTOS exception.\r
+ **NOTE** The exception to the GPL is included to allow you to distribute a\r
+ combined work that includes FreeRTOS without being obliged to provide the\r
+ source code for proprietary components outside of the FreeRTOS kernel.\r
+ Alternative commercial license and support terms are also available upon\r
+ request. See the licensing section of http://www.FreeRTOS.org for full\r
+ license details.\r
+\r
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT\r
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details.\r
+\r
+ You should have received a copy of the GNU General Public License along\r
+ with FreeRTOS; if not, write to the Free Software Foundation, Inc., 59\r
+ Temple Place, Suite 330, Boston, MA 02111-1307 USA.\r
+\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * Looking for a quick start? Then check out the FreeRTOS eBook! *\r
+ * See http://www.FreeRTOS.org/Documentation for details *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ Please ensure to read the configuration and relevant port sections of the\r
+ online documentation.\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and\r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety\r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting,\r
+ licensing and training services.\r
+*/\r
+\r
+#ifndef FREERTOS_CONFIG_H\r
+#define FREERTOS_CONFIG_H\r
+\r
+/*-----------------------------------------------------------\r
+ * Application specific definitions.\r
+ *\r
+ * These definitions should be adjusted for your particular hardware and\r
+ * application requirements.\r
+ *\r
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE\r
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.\r
+ *\r
+ * See http://www.freertos.org/a00110.html.\r
+ *----------------------------------------------------------*/\r
+\r
+#define configUSE_PREEMPTION 1\r
+#define configUSE_IDLE_HOOK 0\r
+#define configUSE_TICK_HOOK 1\r
+#define configCPU_CLOCK_HZ ( ( unsigned portLONG ) 50000000 )\r
+#define configTICK_RATE_HZ ( ( portTickType ) 1000 )\r
+#define configMINIMAL_STACK_SIZE ( ( unsigned portSHORT ) 80 )\r
+#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 24000 ) )\r
+#define configMAX_TASK_NAME_LEN ( 12 )\r
+#define configUSE_TRACE_FACILITY 1\r
+#define configUSE_16_BIT_TICKS 0\r
+#define configIDLE_SHOULD_YIELD 0\r
+#define configUSE_CO_ROUTINES 0\r
+#define configUSE_MUTEXES 1\r
+#define configCHECK_FOR_STACK_OVERFLOW 2\r
+#define configUSE_RECURSIVE_MUTEXES 1\r
+#define configQUEUE_REGISTRY_SIZE 10\r
+#define configGENERATE_RUN_TIME_STATS 1\r
+#define configUSE_MALLOC_FAILED_HOOK 1\r
+\r
+#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 5 )\r
+#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )\r
+\r
+/* Set the following definitions to 1 to include the API function, or zero\r
+to exclude the API function. */\r
+\r
+#define INCLUDE_vTaskPrioritySet 1\r
+#define INCLUDE_uxTaskPriorityGet 1\r
+#define INCLUDE_vTaskDelete 1\r
+#define INCLUDE_vTaskCleanUpResources 0\r
+#define INCLUDE_vTaskSuspend 1\r
+#define INCLUDE_vTaskDelayUntil 1\r
+#define INCLUDE_vTaskDelay 1\r
+#define INCLUDE_uxTaskGetStackHighWaterMark 1\r
+\r
+\r
+\r
+#define configKERNEL_INTERRUPT_PRIORITY ( ( unsigned portCHAR ) 7 << ( unsigned portCHAR ) 5 ) /* Priority 7, or 255 as only the top three bits are implemented. This is the lowest priority. */\r
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( ( unsigned portCHAR ) 5 << ( unsigned portCHAR ) 5 ) /* Priority 5, or 160 as only the top three bits are implemented. */\r
+\r
+extern volatile unsigned long ulHighFrequencyTimerTicks;\r
+/* There is already a high frequency timer running - just reset its count back\r
+to zero. */\r
+#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() ( ulHighFrequencyTimerTicks = 0UL )\r
+#define portGET_RUN_TIME_COUNTER_VALUE() ulHighFrequencyTimerTicks\r
+\r
+#endif /* FREERTOS_CONFIG_H */\r
--- /dev/null
+/*\r
+ FreeRTOS V5.4.2 - Copyright (C) 2009 Real Time Engineers Ltd.\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under \r
+ the terms of the GNU General Public License (version 2) as published by the \r
+ Free Software Foundation and modified by the FreeRTOS exception.\r
+ **NOTE** The exception to the GPL is included to allow you to distribute a\r
+ combined work that includes FreeRTOS without being obliged to provide the \r
+ source code for proprietary components outside of the FreeRTOS kernel. \r
+ Alternative commercial license and support terms are also available upon \r
+ request. See the licensing section of http://www.FreeRTOS.org for full \r
+ license details.\r
+\r
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT\r
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details.\r
+\r
+ You should have received a copy of the GNU General Public License along\r
+ with FreeRTOS; if not, write to the Free Software Foundation, Inc., 59\r
+ Temple Place, Suite 330, Boston, MA 02111-1307 USA.\r
+\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * Looking for a quick start? Then check out the FreeRTOS eBook! *\r
+ * See http://www.FreeRTOS.org/Documentation for details *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ Please ensure to read the configuration and relevant port sections of the\r
+ online documentation.\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and\r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety\r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting,\r
+ licensing and training services.\r
+*/\r
+\r
+/* Scheduler includes. */\r
+#include "FreeRTOS.h"\r
+\r
+/* Demo includes. */\r
+#include "IntQueueTimer.h"\r
+#include "IntQueue.h"\r
+\r
+/* Library includes. */\r
+#include "hw_ints.h"\r
+#include "hw_memmap.h"\r
+#include "hw_types.h"\r
+#include "interrupt.h"\r
+#include "sysctl.h"\r
+#include "lmi_timer.h"\r
+\r
+#define tmrTIMER_2_FREQUENCY ( 2000UL )\r
+#define tmrTIMER_3_FREQUENCY ( 2001UL )\r
+\r
+void vInitialiseTimerForIntQueueTest( void )\r
+{\r
+unsigned long ulFrequency;\r
+\r
+ /* Timer 2 and 3 are utilised for this test. */\r
+ SysCtlPeripheralEnable( SYSCTL_PERIPH_TIMER2 );\r
+ SysCtlPeripheralEnable( SYSCTL_PERIPH_TIMER3 );\r
+ TimerConfigure( TIMER2_BASE, TIMER_CFG_32_BIT_PER );\r
+ TimerConfigure( TIMER3_BASE, TIMER_CFG_32_BIT_PER );\r
+ \r
+ /* Set the timer interrupts to be above the kernel. The interrupts are\r
+ assigned different priorities so they nest with each other. */\r
+ IntPrioritySet( INT_TIMER2A, configMAX_SYSCALL_INTERRUPT_PRIORITY + ( 1 << 5 ) ); /* Shift left 5 as only the top 3 bits are implemented. */\r
+ IntPrioritySet( INT_TIMER3A, configMAX_SYSCALL_INTERRUPT_PRIORITY );\r
+\r
+ /* Ensure interrupts do not start until the scheduler is running. */\r
+ portDISABLE_INTERRUPTS();\r
+ \r
+ /* The rate at which the timers will interrupt. */\r
+ ulFrequency = configCPU_CLOCK_HZ / tmrTIMER_2_FREQUENCY; \r
+ TimerLoadSet( TIMER2_BASE, TIMER_A, ulFrequency );\r
+ IntEnable( INT_TIMER2A );\r
+ TimerIntEnable( TIMER2_BASE, TIMER_TIMA_TIMEOUT );\r
+\r
+ /* The rate at which the timers will interrupt. */\r
+ ulFrequency = configCPU_CLOCK_HZ / tmrTIMER_3_FREQUENCY; \r
+ TimerLoadSet( TIMER3_BASE, TIMER_A, ulFrequency );\r
+ IntEnable( INT_TIMER3A );\r
+ TimerIntEnable( TIMER3_BASE, TIMER_TIMA_TIMEOUT );\r
+\r
+ /* Enable both timers. */ \r
+ TimerEnable( TIMER2_BASE, TIMER_A );\r
+ TimerEnable( TIMER3_BASE, TIMER_A );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vT2InterruptHandler( void )\r
+{\r
+ TimerIntClear( TIMER2_BASE, TIMER_TIMA_TIMEOUT ); \r
+ portEND_SWITCHING_ISR( xFirstTimerHandler() );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vT3InterruptHandler( void )\r
+{\r
+ TimerIntClear( TIMER3_BASE, TIMER_TIMA_TIMEOUT );\r
+ portEND_SWITCHING_ISR( xSecondTimerHandler() );\r
+}\r
+\r
+\r
--- /dev/null
+/*\r
+ FreeRTOS V5.4.2 - Copyright (C) 2009 Real Time Engineers Ltd.\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under \r
+ the terms of the GNU General Public License (version 2) as published by the \r
+ Free Software Foundation and modified by the FreeRTOS exception.\r
+ **NOTE** The exception to the GPL is included to allow you to distribute a\r
+ combined work that includes FreeRTOS without being obliged to provide the \r
+ source code for proprietary components outside of the FreeRTOS kernel. \r
+ Alternative commercial license and support terms are also available upon \r
+ request. See the licensing section of http://www.FreeRTOS.org for full \r
+ license details.\r
+\r
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT\r
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details.\r
+\r
+ You should have received a copy of the GNU General Public License along\r
+ with FreeRTOS; if not, write to the Free Software Foundation, Inc., 59\r
+ Temple Place, Suite 330, Boston, MA 02111-1307 USA.\r
+\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * Looking for a quick start? Then check out the FreeRTOS eBook! *\r
+ * See http://www.FreeRTOS.org/Documentation for details *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ Please ensure to read the configuration and relevant port sections of the\r
+ online documentation.\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and\r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety\r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting,\r
+ licensing and training services.\r
+*/\r
+\r
+#ifndef INT_QUEUE_TIMER_H\r
+#define INT_QUEUE_TIMER_H\r
+\r
+void vInitialiseTimerForIntQueueTest( void );\r
+portBASE_TYPE xTimer0Handler( void );\r
+portBASE_TYPE xTimer1Handler( void );\r
+\r
+#endif\r
+\r
--- /dev/null
+/*****************************************************************************\r
+ * Copyright (c) 2006 Rowley Associates Limited. *\r
+ * *\r
+ * This file may be distributed under the terms of the License Agreement *\r
+ * provided with this software. *\r
+ * *\r
+ * THIS FILE IS PROVIDED AS IS WITH NO WARRANTY OF ANY KIND, INCLUDING THE *\r
+ * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. *\r
+ *****************************************************************************/\r
+\r
+/*****************************************************************************\r
+ * Preprocessor Definitions\r
+ * ------------------------\r
+ *\r
+ * STARTUP_FROM_RESET\r
+ *\r
+ * If defined, the program will startup from power-on/reset. If not defined\r
+ * the program will just loop endlessly from power-on/reset.\r
+ *\r
+ * This definition is not defined by default on this target because the\r
+ * debugger is unable to reset this target and maintain control of it over the\r
+ * JTAG interface. The advantage of doing this is that it allows the debugger\r
+ * to reset the CPU and run programs from a known reset CPU state on each run.\r
+ * It also acts as a safety net if you accidently download a program in FLASH\r
+ * that crashes and prevents the debugger from taking control over JTAG\r
+ * rendering the target unusable over JTAG. The obvious disadvantage of doing\r
+ * this is that your application will not startup without the debugger.\r
+ *\r
+ * We advise that on this target you keep STARTUP_FROM_RESET undefined whilst\r
+ * you are developing and only define STARTUP_FROM_RESET when development is\r
+ * complete.\r
+ *\r
+ *****************************************************************************/\r
+\r
+.extern xPortPendSVHandler\r
+.extern xPortSysTickHandler\r
+.extern vPortSVCHandler\r
+.extern Timer0IntHandler\r
+.extern vT2InterruptHandler\r
+.extern vT3InterruptHandler\r
+.extern vEMAC_ISR\r
+\r
+\r
+.global reset_handler\r
+\r
+.macro DEFAULT_ISR_HANDLER name=\r
+ .thumb_func\r
+ .weak \name\r
+\name:\r
+1: b 1b /* endless loop */\r
+.endm\r
+\r
+ .section .vectors, "ax"\r
+ .code 16\r
+ .align 0\r
+ .global _vectors\r
+\r
+_vectors:\r
+ .word __stack_end__\r
+#ifdef STARTUP_FROM_RESET\r
+ .word reset_handler\r
+#else\r
+ .word reset_wait\r
+#endif /* STARTUP_FROM_RESET */\r
+ .word Nmi_ISR\r
+ .word Fault_ISR\r
+ .word MPU_Fault_ISR\r
+ .word 0 /* Populate if using Bus fault */\r
+ .word 0 /* Populate if using Usage fault */\r
+ .word 0 /* Reserved */\r
+ .word 0 /* Reserved */\r
+ .word 0 /* Reserved */\r
+ .word 0 /* Reserved */\r
+ .word vPortSVCHandler\r
+ .word 0 /* Populate if using a debug monitor */\r
+ .word 0 /* Reserved */\r
+ .word xPortPendSVHandler\r
+ .word xPortSysTickHandler\r
+ .word GPIO_Port_A_ISR\r
+ .word GPIO_Port_B_ISR\r
+ .word GPIO_Port_C_ISR\r
+ .word GPIO_Port_D_ISR\r
+ .word GPIO_Port_E_ISR\r
+ .word UART0_ISR\r
+ .word UART1_ISR\r
+ .word SSI_ISR\r
+ .word I2C_ISR\r
+ .word PWM_Fault_ISR\r
+ .word PWM_Generator_0_ISR\r
+ .word PWM_Generator_1_ISR\r
+ .word PWM_Generator_2_ISR\r
+ .word QEI_ISR\r
+ .word ADC_Sequence_0_ISR\r
+ .word ADC_Sequence_1_ISR\r
+ .word ADC_Sequence_2_ISR\r
+ .word ADC_Sequence_3_ISR\r
+ .word Watchdog_Timer_ISR\r
+ .word Timer0IntHandler\r
+ .word Timer0B_ISR\r
+ .word Timer1A_ISR\r
+ .word Timer1B_ISR\r
+ .word vT2InterruptHandler\r
+ .word Timer2B_ISR\r
+ .word Analog_Comparator_0_ISR\r
+ .word Analog_Comparator_1_ISR\r
+ .word Analog_Comparator_2_ISR\r
+ .word System_Control_ISR\r
+ .word FLASH_Control_ISR\r
+ .word GPIO_Port_F_ISR\r
+ .word GPIO_Port_G_ISR\r
+ .word GPIO_Port_H_ISR\r
+ .word UART2_ISR\r
+ .word SSI1_ISR\r
+ .word vT3InterruptHandler\r
+ .word Timer3B_ISR\r
+ .word I2C1_ISR\r
+ .word QEI1_ISR\r
+ .word CAN0_ISR\r
+ .word CAN1_ISR\r
+ .word CAN2_ISR\r
+ .word vEMAC_ISR\r
+ .word HIBERNATE_ISR\r
+ .word USB0_ISR\r
+ .word PWM_Generator_3_ISR\r
+ .word uDMA_Software_Transfer_ISR\r
+ .word uDMA_Error_ISR\r
+_vectors_end:\r
+\r
+ .section .init, "ax"\r
+ .thumb_func\r
+\r
+reset_handler:\r
+#ifdef __RAM_BUILD\r
+ /* If this is a RAM build, configure vector table offset register to point\r
+ to the RAM vector table. */\r
+ ldr r0, =0xE000ED08\r
+ ldr r1, =_vectors\r
+ str r1, [r0]\r
+#endif\r
+ b _start\r
+\r
+DEFAULT_ISR_HANDLER Nmi_ISR\r
+DEFAULT_ISR_HANDLER Fault_ISR\r
+DEFAULT_ISR_HANDLER MPU_Fault_ISR\r
+DEFAULT_ISR_HANDLER SVCall_ISR\r
+DEFAULT_ISR_HANDLER SysTick_ISR\r
+DEFAULT_ISR_HANDLER PendSV_ISR\r
+DEFAULT_ISR_HANDLER GPIO_Port_A_ISR\r
+DEFAULT_ISR_HANDLER GPIO_Port_B_ISR\r
+DEFAULT_ISR_HANDLER GPIO_Port_C_ISR\r
+DEFAULT_ISR_HANDLER GPIO_Port_D_ISR\r
+DEFAULT_ISR_HANDLER GPIO_Port_E_ISR\r
+DEFAULT_ISR_HANDLER UART0_ISR\r
+DEFAULT_ISR_HANDLER UART1_ISR\r
+DEFAULT_ISR_HANDLER SSI_ISR\r
+DEFAULT_ISR_HANDLER I2C_ISR\r
+DEFAULT_ISR_HANDLER PWM_Fault_ISR\r
+DEFAULT_ISR_HANDLER PWM_Generator_0_ISR\r
+DEFAULT_ISR_HANDLER PWM_Generator_1_ISR\r
+DEFAULT_ISR_HANDLER PWM_Generator_2_ISR\r
+DEFAULT_ISR_HANDLER QEI_ISR\r
+DEFAULT_ISR_HANDLER ADC_Sequence_0_ISR\r
+DEFAULT_ISR_HANDLER ADC_Sequence_1_ISR\r
+DEFAULT_ISR_HANDLER ADC_Sequence_2_ISR\r
+DEFAULT_ISR_HANDLER ADC_Sequence_3_ISR\r
+DEFAULT_ISR_HANDLER Watchdog_Timer_ISR\r
+DEFAULT_ISR_HANDLER Timer0A_ISR\r
+DEFAULT_ISR_HANDLER Timer0B_ISR\r
+DEFAULT_ISR_HANDLER Timer1A_ISR\r
+DEFAULT_ISR_HANDLER Timer1B_ISR\r
+DEFAULT_ISR_HANDLER Timer2A_ISR\r
+DEFAULT_ISR_HANDLER Timer2B_ISR\r
+DEFAULT_ISR_HANDLER Analog_Comparator_0_ISR\r
+DEFAULT_ISR_HANDLER Analog_Comparator_1_ISR\r
+DEFAULT_ISR_HANDLER Analog_Comparator_2_ISR\r
+DEFAULT_ISR_HANDLER System_Control_ISR\r
+DEFAULT_ISR_HANDLER FLASH_Control_ISR\r
+DEFAULT_ISR_HANDLER GPIO_Port_F_ISR\r
+DEFAULT_ISR_HANDLER GPIO_Port_G_ISR\r
+DEFAULT_ISR_HANDLER GPIO_Port_H_ISR\r
+DEFAULT_ISR_HANDLER UART2_ISR\r
+DEFAULT_ISR_HANDLER SSI1_ISR\r
+DEFAULT_ISR_HANDLER Timer3A_ISR\r
+DEFAULT_ISR_HANDLER Timer3B_ISR\r
+DEFAULT_ISR_HANDLER I2C1_ISR\r
+DEFAULT_ISR_HANDLER QEI1_ISR\r
+DEFAULT_ISR_HANDLER CAN0_ISR\r
+DEFAULT_ISR_HANDLER CAN1_ISR\r
+DEFAULT_ISR_HANDLER CAN2_ISR\r
+DEFAULT_ISR_HANDLER ETHERNET_ISR\r
+DEFAULT_ISR_HANDLER HIBERNATE_ISR\r
+DEFAULT_ISR_HANDLER USB0_ISR\r
+DEFAULT_ISR_HANDLER PWM_Generator_3_ISR\r
+DEFAULT_ISR_HANDLER uDMA_Software_Transfer_ISR\r
+DEFAULT_ISR_HANDLER uDMA_Error_ISR\r
+\r
+#ifndef STARTUP_FROM_RESET\r
+DEFAULT_ISR_HANDLER reset_wait\r
+#endif /* STARTUP_FROM_RESET */\r
--- /dev/null
+/******************************************************************************\r
+ Target Script for LM3S.\r
+\r
+ Copyright (c) 2006 Rowley Associates Limited.\r
+\r
+ This file may be distributed under the terms of the License Agreement\r
+ provided with this software.\r
+\r
+ THIS FILE IS PROVIDED AS IS WITH NO WARRANTY OF ANY KIND, INCLUDING THE\r
+ WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.\r
+ ******************************************************************************/\r
+\r
+function Reset()\r
+{\r
+ TargetInterface.resetAndStop(1000);\r
+}\r
+\r
+function RAMReset()\r
+{\r
+ Reset();\r
+}\r
+\r
+function FLASHReset()\r
+{\r
+ Reset();\r
+}\r
+\r
+\r
--- /dev/null
+/*\r
+ FreeRTOS V5.4.2 - Copyright (C) 2009 Real Time Engineers Ltd.\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under \r
+ the terms of the GNU General Public License (version 2) as published by the \r
+ Free Software Foundation and modified by the FreeRTOS exception.\r
+ **NOTE** The exception to the GPL is included to allow you to distribute a\r
+ combined work that includes FreeRTOS without being obliged to provide the \r
+ source code for proprietary components outside of the FreeRTOS kernel. \r
+ Alternative commercial license and support terms are also available upon \r
+ request. See the licensing section of http://www.FreeRTOS.org for full \r
+ license details.\r
+\r
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT\r
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details.\r
+\r
+ You should have received a copy of the GNU General Public License along\r
+ with FreeRTOS; if not, write to the Free Software Foundation, Inc., 59\r
+ Temple Place, Suite 330, Boston, MA 02111-1307 USA.\r
+\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * Looking for a quick start? Then check out the FreeRTOS eBook! *\r
+ * See http://www.FreeRTOS.org/Documentation for details *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ Please ensure to read the configuration and relevant port sections of the\r
+ online documentation.\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and\r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety\r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting,\r
+ licensing and training services.\r
+*/\r
+\r
+/*-----------------------------------------------------------\r
+ * Simple parallel port IO routines.\r
+ *-----------------------------------------------------------*/\r
+\r
+/*\r
+*/\r
+\r
+/* Scheduler includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+\r
+/* Demo includes. */\r
+#include "partest.h"\r
+\r
+/* Library includes. */\r
+#include "hw_types.h"\r
+#include "gpio.h"\r
+#include "hw_memmap.h"\r
+\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+void vParTestInitialise( void )\r
+{\r
+ GPIODirModeSet( GPIO_PORTF_BASE, GPIO_PIN_0, GPIO_DIR_MODE_OUT );\r
+ GPIOPadConfigSet( GPIO_PORTF_BASE, GPIO_PIN_0, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD );\r
+ GPIOPinWrite( GPIO_PORTF_BASE, GPIO_PIN_0, 0 );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vParTestSetLED( unsigned portBASE_TYPE uxLED, signed portBASE_TYPE xValue )\r
+{\r
+ /* There is only one LED. */\r
+ ( void ) uxLED;\r
+ \r
+ GPIOPinWrite( GPIO_PORTF_BASE, GPIO_PIN_0, xValue );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+unsigned portBASE_TYPE uxParTestGetLED( unsigned portBASE_TYPE uxLED )\r
+{\r
+ /* There is only one LED. */\r
+ ( void ) uxLED;\r
+\r
+ return GPIOPinRead( GPIO_PORTF_BASE, GPIO_PIN_0 ); \r
+}\r
+\r
+\r
--- /dev/null
+<!DOCTYPE CrossStudio_Project_File>
+<solution Name="RTOSDemo" version="2">
+ <project Name="RTOSDemo">
+ <configuration Name="Common" Target="LM3S8962" arm_architecture="v7M" arm_core_type="Cortex-M3" arm_linker_fiq_stack_size="0" arm_linker_heap_size="0" arm_linker_irq_stack_size="0" arm_linker_stack_size="512" arm_simulator_memory_simulation_filename="$(PackagesDir)/targets/Luminary_LM3S/LM3SSimulatorMemory.dll" arm_simulator_memory_simulation_parameter="0x40000;0x10000" arm_target_debug_interface_type="ADIv5" arm_target_flash_loader_type="LIBMEM RPC Loader" build_remove_unused_symbols="No" c_preprocessor_definitions="PACK_STRUCT_END=__attribute((packed));ALIGN_STRUCT_END=__attribute((aligned(4)));sprintf=usprintf;snprintf=usnprintf;printf=uipprintf" c_user_include_directories="..\\Common\\ethernet\\uIP\\uip-1.0\\uip;..\\..\\Source\\include;..\\..\\Source\\portable\\GCC\\ARM_CM3;..\\Common\\include;..\\Common\\drivers\\LuminaryMicro;.\\webserver;.;$(SamplesDir)/Luminary_Stellaris_Driver_Library" linker_additional_files="" linker_memory_map_file="$(PackagesDir)/targets/Luminary_LM3S/LM3S8962_MemoryMap.xml" linker_output_format="None" linker_printf_fmt_level="int" linker_printf_width_precision_supported="No" linker_scanf_fmt_level="int" project_directory="" project_type="Executable" property_groups_file_path="$(PackagesDir)/targets/Luminary_LM3S/propertyGroups.xml"/>
+ <configuration Name="Flash" Placement="Flash" arm_target_flash_loader_file_path="$(PackagesDir)/targets/Luminary_LM3S/Release/Loader.elf" linker_section_placement_file="$(PackagesDir)/targets/Luminary_LM3S/flash_placement.xml" target_reset_script="FLASHReset()"/>
+ <configuration Name="RAM" Placement="RAM" linker_section_placement_file="$(PackagesDir)/targets/Luminary_LM3S/ram_placement.xml" target_reset_script="RAMReset()"/>
+ <folder Name="Source Files">
+ <configuration Name="Common" filter="c;cpp;cxx;cc;h;s;asm;inc"/>
+ <folder Name="FreeRTOS">
+ <folder Name="include">
+ <file file_name="../../Source/portable/GCC/ARM_CM3/portmacro.h"/>
+ <file file_name="../../Source/include/task.h"/>
+ <file file_name="../../Source/include/FreeRTOS.h"/>
+ <file file_name="../../Source/include/list.h"/>
+ <file file_name="../../Source/include/portable.h"/>
+ <file file_name="../../Source/include/projdefs.h"/>
+ <file file_name="../../Source/include/queue.h"/>
+ <file file_name="../../Source/include/semphr.h"/>
+ <file file_name="../../Source/include/StackMacros.h"/>
+ </folder>
+ <file file_name="../../Source/tasks.c"/>
+ <file file_name="../../Source/list.c"/>
+ <file file_name="../../Source/queue.c"/>
+ <file file_name="../../Source/portable/GCC/ARM_CM3/port.c"/>
+ <file file_name="../../Source/portable/MemMang/heap_2.c"/>
+ </folder>
+ <file file_name="main.c"/>
+ <file file_name="timertest.c"/>
+ <file file_name="formike128x128x16.c"/>
+ <file file_name="IntQueueTimer.c"/>
+ <folder Name="include">
+ <file file_name="bitmap.h"/>
+ <file file_name="formike128x128x16.h"/>
+ <file file_name="FreeRTOSConfig.h"/>
+ <file file_name="IntQueueTimer.h"/>
+ <file file_name="lcd_message.h"/>
+ <file file_name="osram128x64x4.h"/>
+ </folder>
+ <folder Name="Common Demo Tasks">
+ <file file_name="../Common/Minimal/IntQueue.c"/>
+ <file file_name="../Common/Minimal/PollQ.c"/>
+ <file file_name="../Common/Minimal/QPeek.c"/>
+ <file file_name="../Common/Minimal/recmutex.c"/>
+ <file file_name="../Common/Minimal/semtest.c"/>
+ <file file_name="../Common/Minimal/BlockQ.c"/>
+ <file file_name="../Common/Minimal/blocktim.c"/>
+ <file file_name="../Common/Minimal/death.c"/>
+ <file file_name="../Common/Minimal/GenQTest.c"/>
+ <file file_name="../Common/Minimal/integer.c"/>
+ <folder Name="include">
+ <file file_name="../Common/include/IntQueue.h"/>
+ <file file_name="../Common/include/PollQ.h"/>
+ <file file_name="../Common/include/QPeek.h"/>
+ <file file_name="../Common/include/recmutex.h"/>
+ <file file_name="../Common/include/semtest.h"/>
+ <file file_name="../Common/include/BlockQ.h"/>
+ <file file_name="../Common/include/blocktim.h"/>
+ <file file_name="../Common/include/death.h"/>
+ <file file_name="../Common/include/GenQTest.h"/>
+ <file file_name="../Common/include/integer.h"/>
+ </folder>
+ </folder>
+ <folder Name="WEB Server">
+ <file file_name="webserver/uIP_Task.c"/>
+ <file file_name="webserver/emac.c"/>
+ <file file_name="webserver/httpd.c"/>
+ <file file_name="webserver/httpd-cgi.c"/>
+ <file file_name="webserver/httpd-fs.c"/>
+ <file file_name="webserver/http-strings.c"/>
+ <folder Name="include">
+ <file file_name="webserver/webserver.h"/>
+ <file file_name="webserver/clock-arch.h"/>
+ <file file_name="webserver/emac.h"/>
+ <file file_name="webserver/httpd.h"/>
+ <file file_name="webserver/httpd-cgi.h"/>
+ <file file_name="webserver/httpd-fs.h"/>
+ <file file_name="webserver/httpd-fsdata.h"/>
+ <file file_name="webserver/http-strings.h"/>
+ <file file_name="webserver/uip-conf.h"/>
+ <file file_name="../Common/ethernet/uIP/uip-1.0/uip/clock.h"/>
+ <file file_name="../Common/ethernet/uIP/uip-1.0/uip/psock.h"/>
+ <file file_name="../Common/ethernet/uIP/uip-1.0/uip/pt.h"/>
+ <file file_name="../Common/ethernet/uIP/uip-1.0/uip/timer.h"/>
+ <file file_name="../Common/ethernet/uIP/uip-1.0/uip/uip.h"/>
+ <file file_name="../Common/ethernet/uIP/uip-1.0/uip/uip_arch.h"/>
+ <file file_name="../Common/ethernet/uIP/uip-1.0/uip/uip_arp.h"/>
+ <file file_name="../Common/ethernet/uIP/uip-1.0/uip/uiplib.h"/>
+ <file file_name="../Common/ethernet/uIP/uip-1.0/uip/uipopt.h"/>
+ </folder>
+ <file file_name="../Common/ethernet/uIP/uip-1.0/uip/uip.c"/>
+ <file file_name="../Common/ethernet/uIP/uip-1.0/uip/uip_arp.c"/>
+ <file file_name="../Common/ethernet/uIP/uip-1.0/uip/psock.c"/>
+ <file file_name="../Common/ethernet/uIP/uip-1.0/uip/timer.c"/>
+ </folder>
+ <folder Name="Libraries">
+ <file file_name="../Common/drivers/LuminaryMicro/Rowley/libgr.a"/>
+ <file file_name="../Common/drivers/LuminaryMicro/Rowley/libdriver.a"/>
+ </folder>
+ <file file_name="ParTest/ParTest.c"/>
+ <file file_name="rit128x96x4.c"/>
+ <file file_name="osram128x64x4.c"/>
+ <file file_name="../Common/drivers/LuminaryMicro/ustdlib.c"/>
+ </folder>
+ <folder Name="System Files">
+ <file file_name="thumb_crt0.s"/>
+ <file file_name="LM3S_Startup.s"/>
+ <file file_name="LM3S_Target.js">
+ <configuration Name="Common" build_exclude_from_build="Yes" file_type="Reset Script"/>
+ <configuration Name="THUMB Flash Debug" build_exclude_from_build="No"/>
+ </file>
+ </folder>
+ </project>
+ <configuration Name="THUMB Flash Debug" inherited_configurations="THUMB;Flash;Debug"/>
+ <configuration Name="THUMB" Platform="ARM" arm_instruction_set="THUMB" arm_library_instruction_set="THUMB" c_preprocessor_definitions="__THUMB" hidden="Yes"/>
+ <configuration Name="Flash" c_preprocessor_definitions="__FLASH_BUILD" hidden="Yes"/>
+ <configuration Name="Debug" build_debug_information="Yes" c_preprocessor_definitions="DEBUG" gcc_optimization_level="None" hidden="Yes" link_include_startup_code="No"/>
+ <configuration Name="THUMB Flash Release" inherited_configurations="THUMB;Flash;Release"/>
+ <configuration Name="Release" build_debug_information="No" c_additional_options="-g1" c_preprocessor_definitions="NDEBUG" gcc_optimization_level="Level 1" hidden="Yes" link_include_startup_code="No"/>
+</solution>
--- /dev/null
+<!DOCTYPE CrossStudio_for_ARM_Session_File>
+<session>
+ <Bookmarks/>
+ <Breakpoints/>
+ <ExecutionCountWindow/>
+ <Memory1>
+ <MemoryWindow autoEvaluate="0" addressText="0x200002d0" numColumns="8" sizeText="120" dataSize="1" radix="16" addressSpace="" />
+ </Memory1>
+ <Memory2>
+ <MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" addressSpace="" />
+ </Memory2>
+ <Memory3>
+ <MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" addressSpace="" />
+ </Memory3>
+ <Memory4>
+ <MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" addressSpace="" />
+ </Memory4>
+ <Project>
+ <ProjectSessionItem path="RTOSDemo" name="unnamed" />
+ <ProjectSessionItem path="RTOSDemo;RTOSDemo" name="unnamed" />
+ <ProjectSessionItem path="RTOSDemo;RTOSDemo;Source Files" name="unnamed" />
+ </Project>
+ <Register1>
+ <RegisterWindow openNodes="CPU;CPU/xPSR;CPU/CFBP" binaryNodes="" unsignedNodes="" visibleGroups="CPU" decimalNodes="" octalNodes="" asciiNodes="" />
+ </Register1>
+ <Register2>
+ <RegisterWindow openNodes="" binaryNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" />
+ </Register2>
+ <Register3>
+ <RegisterWindow openNodes="" binaryNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" />
+ </Register3>
+ <Register4>
+ <RegisterWindow openNodes="" binaryNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" />
+ </Register4>
+ <TargetWindow programAction="" uploadFileType="" programLoadAddress="" programSize="" uploadFileName="" uploadMemoryInterface="" programFileName="" uploadStartAddress="" programFileType="" uploadSize="" programMemoryInterface="" />
+ <TraceWindow>
+ <Trace enabled="Yes" />
+ </TraceWindow>
+ <Watch1>
+ <Watches active="1" update="Never" />
+ </Watch1>
+ <Watch2>
+ <Watches active="0" update="Never" />
+ </Watch2>
+ <Watch3>
+ <Watches active="0" update="Never" />
+ </Watch3>
+ <Watch4>
+ <Watches active="0" update="Never" />
+ </Watch4>
+ <Files>
+ <SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="C:\E\Dev\FreeRTOS\Trial\FreeRTOS_MPU\FreeRTOS\Demo\CORTEX_MPU_LM3Sxxxx_Rowley\main.c" y="219" path="C:\E\Dev\FreeRTOS\Trial\FreeRTOS_MPU\FreeRTOS\Demo\CORTEX_MPU_LM3Sxxxx_Rowley\main.c" left="0" selected="1" name="unnamed" top="209" />
+ </Files>
+ <ARMCrossStudioWindow activeProject="RTOSDemo" autoConnectTarget="Luminary USB Debug" debugSearchFileMap="" fileDialogInitialDirectory="C:\E\Dev\FreeRTOS\Trial\FreeRTOS_MPU\FreeRTOS\Demo\Common\drivers\LuminaryMicro" fileDialogDefaultFilter="*.*" autoConnectCapabilities="388991" debugSearchPath="" buildConfiguration="THUMB Flash Debug" />
+</session>
--- /dev/null
+#ifndef BITMAP_H\r
+#define BITMAP_H\r
+\r
+#define bmpBITMAP_HEIGHT 50\r
+#define bmpBITMAP_WIDTH 128\r
+\r
+const unsigned char pucBasicBitmap[] =\r
+{\r
+0x00, 0x0a, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0x00, 0x0a, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xa0, 0x0a, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xaa, 0xaa, 0xaa, 0xaf, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfa, 0xaa,\r
+0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0xff, 0xf7,\r
+0x00, 0x8f, 0xff, 0xff, 0xf8, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0xff, 0xff, 0xff, 0xff, 0xf8, 0x88, 0x88, 0x88,\r
+0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x8f, 0xff, 0xff, 0xff, 0xff, 0xff, 0x88, 0x77, 0x77, 0x78, 0x8f, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xf8, 0x88, 0x77, 0x77, 0x88, 0x8f, 0xff, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff,\r
+0xff, 0xff, 0xf0, 0x00, 0x00, 0x8f, 0x00, 0xff, 0x87, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x78, 0xff, 0xff,\r
+0xf7, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x78, 0xff, 0xff, 0xff, 0x87, 0x77, 0x77, 0x77, 0x77, 0x77,\r
+0x77, 0x77, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x7f, 0xff, 0xff, 0xfa, 0xaa,\r
+0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0x70, 0x00, 0x00, 0x8f, 0x00, 0xff, 0x87, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77,\r
+0x77, 0x77, 0xff, 0xff, 0xf7, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x78, 0xff, 0xff, 0xf8, 0x77, 0x77,\r
+0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x78, 0xff, 0xff, 0xff, 0xff, 0x87, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x8f,\r
+0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0x70, 0x08, 0x00, 0x8f, 0x00, 0xff, 0x87, 0x77, 0x77, 0x77,\r
+0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x8f, 0xff, 0xf7, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x78, 0xff,\r
+0xff, 0x87, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x8f, 0xff, 0xff, 0xf8, 0x77, 0x77, 0x77, 0x77, 0x77,\r
+0x77, 0x77, 0x77, 0x8f, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0x00, 0x0f, 0x00, 0x8f, 0x00, 0xff,\r
+0x87, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x78, 0xff, 0xf7, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77,\r
+0x77, 0x77, 0x78, 0xff, 0xf8, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x78, 0xff, 0xff, 0xf8, 0x77,\r
+0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x8f, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0x70, 0x07,\r
+0x00, 0x70, 0x00, 0xff, 0x87, 0x77, 0x77, 0x77, 0xff, 0xff, 0xf8, 0x77, 0x77, 0x77, 0x77, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0x77, 0x77, 0x77, 0x7f, 0xff, 0xff, 0xff, 0xff, 0x87, 0x77, 0x77, 0x77, 0x78, 0xff, 0xff, 0xf8, 0x77, 0x77, 0x77, 0x77,\r
+0xff, 0xff, 0x87, 0x77, 0x77, 0x77, 0x8f, 0xff, 0xff, 0xff, 0x88, 0x8f, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff,\r
+0xff, 0xff, 0x80, 0x00, 0x00, 0x00, 0x07, 0xff, 0x87, 0x77, 0x77, 0x77, 0xff, 0xff, 0xff, 0x87, 0x77, 0x77, 0x77, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0x77, 0x77, 0x77, 0x7f, 0xff, 0xff, 0xff, 0xff, 0x77, 0x77, 0x77, 0x77, 0xff, 0xff, 0xff, 0xff,\r
+0x87, 0x77, 0x77, 0x77, 0xff, 0xff, 0x77, 0x77, 0x77, 0x77, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfa, 0xaa,\r
+0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0xf7, 0x00, 0x00, 0x00, 0x0f, 0xff, 0x87, 0x77, 0x77, 0x77, 0xff, 0xff, 0xff, 0xf8,\r
+0x77, 0x77, 0x77, 0xff, 0xff, 0xff, 0xff, 0xff, 0x77, 0x77, 0x77, 0x7f, 0xff, 0xff, 0xff, 0xff, 0x77, 0x77, 0x77, 0x77,\r
+0xff, 0xff, 0xff, 0xff, 0xf7, 0x77, 0x77, 0x77, 0x8f, 0xff, 0x77, 0x77, 0x77, 0x77, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0xff, 0x70, 0x00, 0x00, 0xff, 0xff, 0x87, 0x77, 0x77, 0x77,\r
+0xff, 0xff, 0xff, 0xf8, 0x77, 0x77, 0x77, 0xff, 0xff, 0xff, 0xff, 0xff, 0x77, 0x77, 0x77, 0x7f, 0xff, 0xff, 0xff, 0xff,\r
+0x77, 0x77, 0x77, 0x78, 0xff, 0xff, 0xff, 0xff, 0xf8, 0x77, 0x77, 0x77, 0x8f, 0xff, 0x77, 0x77, 0x77, 0x77, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
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+0x77, 0x77, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x77, 0x77, 0x77, 0x7f, 0xff, 0xff, 0xff, 0xf8, 0x77, 0x77, 0x77, 0x7f,\r
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+0xff, 0xff, 0xff, 0xff, 0x77, 0x77, 0x77, 0x77, 0xff, 0xff, 0xff, 0xff, 0xf7, 0x77, 0x77, 0x77, 0x8f, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0x87, 0x77, 0x77, 0x77, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0x87, 0x88,\r
+0x88, 0x8f, 0xff, 0xff, 0x87, 0x77, 0x77, 0x77, 0xff, 0xff, 0xff, 0x77, 0x77, 0x77, 0x8f, 0xff, 0xff, 0xff, 0xff, 0xff,\r
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+0xff, 0xff, 0xff, 0xf8, 0x77, 0x77, 0x77, 0xff, 0xff, 0xff, 0xff, 0xff, 0x77, 0x77, 0x77, 0x7f, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0x87, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x8f, 0xff, 0xff, 0x87, 0x77, 0x77, 0x77, 0x77, 0x77,\r
+0x77, 0x77, 0x77, 0x7f, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0x70, 0x00, 0x00, 0x00, 0x00, 0xff,\r
+0x87, 0x77, 0x77, 0x77, 0xff, 0xff, 0xff, 0xf8, 0x77, 0x77, 0x77, 0x8f, 0xff, 0xff, 0xff, 0xff, 0x77, 0x77, 0x77, 0x7f,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xf8, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x78, 0xff, 0xff, 0xff, 0x87, 0x77,\r
+0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0xff, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0x70, 0x00,\r
+0x00, 0x00, 0x00, 0xff, 0x87, 0x77, 0x77, 0x77, 0xff, 0xff, 0xff, 0xff, 0x77, 0x77, 0x77, 0x7f, 0xff, 0xff, 0xff, 0xff,\r
+0x77, 0x77, 0x77, 0x7f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x87, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x8f, 0xff,\r
+0xff, 0xff, 0x87, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x8f, 0xff, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff,\r
+0xff, 0xff, 0x70, 0x00, 0x00, 0x00, 0x07, 0xff, 0x88, 0x88, 0x88, 0x88, 0xff, 0xff, 0xff, 0xff, 0x88, 0x88, 0x88, 0x88,\r
+0xff, 0xff, 0xff, 0xff, 0x88, 0x88, 0x88, 0x8f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xf8, 0x87, 0x77, 0x77, 0x77,\r
+0x88, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x88, 0x77, 0x77, 0x77, 0x77, 0x88, 0x8f, 0xff, 0xff, 0xff, 0xff, 0xfa, 0xaa,\r
+0xaa, 0xaf, 0xff, 0xff, 0x00, 0x0f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0x00, 0x0f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0x00, 0x0f, 0x70, 0x08, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0x00, 0x07, 0x70, 0x07,\r
+0x88, 0x88, 0x88, 0xff, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88,\r
+0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88,\r
+0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xfa, 0xaa,\r
+0xaa, 0xaf, 0xff, 0xff, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0xf7, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x70, 0x00, 0x00, 0x00,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0x70, 0x08, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0x70, 0x08,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfa, 0xaa,\r
+0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaa, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0x0a, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xa0, 0x00, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0x00,\r
+0x00 };\r
+\r
+const unsigned char pucGrLibBitmap[] =\r
+{\r
+ IMAGE_FMT_4BPP_COMP,\r
+ 124, 0,\r
+ 49, 0,\r
+\r
+ 15,\r
+ 0x00, 0x00, 0x00,\r
+ 0x00, 0x0c, 0x00,\r
+ 0x20, 0x44, 0x20,\r
+ 0x00, 0x75, 0x00,\r
+ 0x69, 0x69, 0x69,\r
+ 0x00, 0xc2, 0x00,\r
+ 0x00, 0xd2, 0x00,\r
+ 0x38, 0xb6, 0x38,\r
+ 0x00, 0xea, 0x00,\r
+ 0x00, 0xf2, 0x00,\r
+ 0xaa, 0xb2, 0xaa,\r
+ 0x65, 0xff, 0x65,\r
+ 0x69, 0xff, 0x69,\r
+ 0x6d, 0xff, 0x6d,\r
+ 0x71, 0xff, 0x71,\r
+ 0xff, 0xff, 0xff,\r
+\r
+ 0x03, 0x21, 0x33, 0x53, 0x33, 0x33, 0x33, 0xe9, 0xd4, 0xf8, 0xa7, 0x5f,\r
+ 0x17, 0x07, 0x06, 0x35, 0x33, 0x12, 0x03, 0x23, 0x96, 0x68, 0x88, 0x88,\r
+ 0x88, 0xe9, 0xd4, 0xf8, 0xa7, 0x5f, 0x17, 0x07, 0x06, 0x86, 0x69, 0x32,\r
+ 0x03, 0x29, 0x66, 0x65, 0x66, 0x66, 0x66, 0xe9, 0xd4, 0xf8, 0xa7, 0x5f,\r
+ 0x17, 0x07, 0x06, 0x56, 0x66, 0x92, 0x07, 0x78, 0x63, 0x11, 0x11, 0x11,\r
+ 0xe9, 0xd4, 0xa7, 0xf0, 0x5f, 0x17, 0x07, 0x07, 0x11, 0x36, 0x87, 0x78,\r
+ 0x0f, 0x63, 0x00, 0x00, 0x00, 0xe9, 0xd4, 0xa7, 0x5f, 0xe0, 0x17, 0x07,\r
+ 0x07, 0x00, 0x36, 0x87, 0x78, 0x63, 0xfe, 0x07, 0x07, 0x77, 0x2f, 0x07,\r
+ 0x07, 0x02, 0x36, 0x1e, 0x87, 0x78, 0x63, 0x07, 0x07, 0x77, 0x2f, 0x00,\r
+ 0x10, 0x01, 0x22, 0x20, 0x07, 0x00, 0x00, 0x22, 0x21, 0x84, 0x03, 0x36,\r
+ 0x87, 0x78, 0x63, 0x02, 0x02, 0xaa, 0x01, 0xa2, 0x22, 0x20, 0x02, 0x77,\r
+ 0x77, 0x77, 0xe9, 0x3a, 0x22, 0x22, 0x7a, 0xa4, 0x71, 0x20, 0x0a, 0x27,\r
+ 0xb8, 0x29, 0x72, 0xb2, 0x9e, 0x93, 0x36, 0x87, 0x78, 0x40, 0x63, 0x62,\r
+ 0x2a, 0xff, 0xf2, 0xaa, 0x40, 0x07, 0x08, 0xad, 0xdd, 0xdd, 0xdd, 0xe9,\r
+ 0xd7, 0x72, 0x00, 0x40, 0x00, 0xa6, 0xdd, 0xda, 0x70, 0x00, 0x00, 0x02,\r
+ 0x00, 0x77, 0xdd, 0xdc, 0xcc, 0xcd, 0xde, 0xc7, 0x20, 0x00, 0x00, 0x00,\r
+ 0x00, 0x00, 0x01, 0x27, 0xde, 0xdc, 0x08, 0xcc, 0xcc, 0xdd, 0xea, 0x99,\r
+ 0x36, 0x87, 0x78, 0x40, 0x63, 0x69, 0x02, 0xaf, 0xaa, 0xf2, 0x2f, 0xa0,\r
+ 0x04, 0x02, 0xdb, 0xbb, 0xbb, 0xbb, 0xe9, 0xbc, 0xe7, 0x10, 0x20, 0x00,\r
+ 0x07, 0xa5, 0xbb, 0xbd, 0x70, 0x00, 0x10, 0x00, 0x27, 0xec, 0x3b, 0xcd,\r
+ 0xd7, 0x00, 0x00, 0x80, 0x9f, 0xbd, 0x20, 0x00, 0x00, 0x36, 0x87, 0x78,\r
+ 0x40, 0x63, 0x69, 0x02, 0xfa, 0x2a, 0xf2, 0x2f, 0xa0, 0x31, 0x02, 0xdb,\r
+ 0x43, 0x31, 0x42, 0x00, 0x07, 0xa7, 0x0a, 0x70, 0x00, 0x02, 0xdd, 0x41,\r
+ 0xcc, 0x21, 0xce, 0x04, 0x70, 0x00, 0x00, 0x02, 0x7d, 0x39, 0xbc, 0xcb,\r
+ 0x00, 0xbb, 0xbd, 0x20, 0x00, 0x00, 0x36, 0x87, 0x78, 0x20, 0x63, 0x00,\r
+ 0x69, 0xfa, 0x0a, 0xf2, 0x2f, 0xa0, 0x01, 0x02, 0xdb, 0xbb, 0xbb, 0xdd,\r
+ 0xdd, 0xdc, 0x11, 0x08, 0xe7, 0x00, 0x07, 0xad, 0xbb, 0xcd, 0xdd, 0xda,\r
+ 0x09, 0x70, 0x00, 0x2d, 0xcb, 0x41, 0xcc, 0xdd, 0xd1, 0x04, 0xe7, 0x00,\r
+ 0x00, 0x07, 0xeb, 0x51, 0xdc, 0xcd, 0x00, 0xdd, 0xdd, 0x20, 0x00, 0x00,\r
+ 0x36, 0x87, 0x78, 0x00, 0x63, 0x00, 0x00, 0x00, 0x02, 0xfa, 0x2a, 0xf2,\r
+ 0x00, 0xaf, 0xa0, 0x02, 0xdb, 0xbb, 0xbd, 0x72, 0x22, 0x00, 0x77, 0xdc,\r
+ 0xbb, 0xbb, 0xc7, 0x20, 0x07, 0x77, 0x04, 0x77, 0x77, 0xcb, 0xbb, 0xbc,\r
+ 0xd1, 0x20, 0x01, 0x28, 0x7d, 0xbb, 0x42, 0x27, 0x41, 0xcd, 0x20, 0x00,\r
+ 0x40, 0x27, 0x51, 0x72, 0x22, 0x22, 0x27, 0x7c, 0x20, 0x00, 0x00, 0x00,\r
+ 0x36, 0x87, 0x78, 0x63, 0x00, 0x00, 0x00, 0x00, 0x02, 0xaf, 0xaa, 0xfa,\r
+ 0xff, 0x20, 0x02, 0x10, 0xdb, 0xbb, 0xbe, 0x61, 0x2d, 0xbb, 0xbb, 0xcc,\r
+ 0xa8, 0x29, 0x00, 0x89, 0xbd, 0xc3, 0xeb, 0xbb, 0xbb, 0x00, 0xd7, 0x10,\r
+ 0x00, 0x00, 0x2c, 0xcb, 0xbb, 0xbd, 0x58, 0x70, 0x12, 0xc7, 0x13, 0x29,\r
+ 0x36, 0x87, 0x78, 0x40, 0x63, 0xa9, 0x00, 0xaf, 0xff, 0xff, 0xfa, 0x20,\r
+ 0x08, 0x02, 0xdb, 0xbb, 0xbd, 0x39, 0x07, 0xdb, 0xbb, 0x72, 0xcc, 0x03,\r
+ 0x8c, 0x82, 0xbd, 0x70, 0x84, 0xbc, 0x03, 0xd2, 0x00, 0x2d, 0xbb, 0xbb,\r
+ 0xd7, 0x19, 0x01, 0x02, 0x00, 0x00, 0x36, 0x87, 0x78, 0x63, 0xa2, 0x0a,\r
+ 0x10, 0xaf, 0xff, 0xa2, 0x0a, 0xbd, 0x20, 0x00, 0x00, 0x0c, 0x07, 0xdb,\r
+ 0xbb, 0xc7, 0xc9, 0x8e, 0x00, 0x2c, 0x40, 0xcb, 0xc4, 0x00, 0x7c, 0xbb,\r
+ 0xbb, 0xe7, 0x00, 0x06, 0x2d, 0xbb, 0xbb, 0xc7, 0x10, 0x92, 0x31, 0x36,\r
+ 0x10, 0x87, 0x78, 0x63, 0xab, 0x22, 0x22, 0x00, 0x00, 0x00, 0x02, 0xdb,\r
+ 0xbb, 0xbd, 0x20, 0x00, 0x00, 0x07, 0x18, 0xcb, 0xbb, 0xd7, 0x0a, 0x8d,\r
+ 0x00, 0x2d, 0xbb, 0x23, 0xbb, 0xc7, 0x82, 0x00, 0x2e, 0xbb, 0x39, 0x91,\r
+ 0x20, 0xbd, 0x72, 0x8b, 0x00, 0x00, 0x36, 0x87, 0x78, 0x48, 0x63, 0x33,\r
+ 0x02, 0x20, 0xe1, 0xdb, 0xbb, 0xbd, 0x01, 0x20, 0x00, 0x02, 0x7d, 0xbb,\r
+ 0xbb, 0xe2, 0x6b, 0x94, 0x8b, 0x00, 0x00, 0x81, 0xd7, 0x82, 0x00, 0x2d,\r
+ 0x00, 0xbb, 0xbb, 0xc7, 0x20, 0x2c, 0xcb, 0xbb, 0xbb, 0x10, 0xdd, 0x77,\r
+ 0x22, 0x7b, 0x36, 0x87, 0x78, 0x63, 0x80, 0x32, 0x02, 0xaa, 0xf2, 0x22,\r
+ 0x20, 0x02, 0xdb, 0x00, 0xbb, 0xbc, 0x77, 0x77, 0x77, 0xdb, 0xbb, 0xce,\r
+ 0x42, 0x71, 0x63, 0xdb, 0xbb, 0xbd, 0x20, 0x19, 0x7d, 0x10, 0xbb, 0xbb,\r
+ 0xd2, 0x82, 0x00, 0x27, 0xcb, 0xbb, 0x00, 0xc7, 0x20, 0x07, 0xeb, 0xbb,\r
+ 0xbb, 0xbb, 0xcd, 0x21, 0xd7, 0x72, 0x72, 0x36, 0x87, 0x78, 0x63, 0x32,\r
+ 0x01, 0x4f, 0xff, 0xf2, 0xaf, 0xa0, 0x02, 0xdb, 0x41, 0x03, 0xdd, 0xdc,\r
+ 0xbb, 0xbc, 0xd7, 0x20, 0x22, 0x89, 0x42, 0xbd, 0xba, 0x7d, 0xbb, 0xbb,\r
+ 0xd2, 0x82, 0x00, 0x02, 0x27, 0xcb, 0xbb, 0xcc, 0x20, 0x02, 0x89, 0xbb,\r
+ 0x08, 0xbb, 0xbc, 0xdd, 0x72, 0x31, 0x36, 0x87, 0x78, 0x40, 0x63, 0x31,\r
+ 0x02, 0xaf, 0xaa, 0xf2, 0x2f, 0xa0, 0x21, 0x02, 0xdb, 0x3a, 0xbb, 0xbb,\r
+ 0xc7, 0x20, 0x31, 0x88, 0x59, 0xdb, 0xbb, 0xbd, 0xb2, 0x7d, 0xbb, 0xbb,\r
+ 0x40, 0xd2, 0x7b, 0x27, 0xcb, 0xbb, 0xcc, 0x20, 0x00, 0x00, 0x27, 0xec,\r
+ 0xbb, 0xbb, 0xbb, 0xbb, 0xbc, 0xe7, 0x84, 0x29, 0x36, 0x87, 0x78, 0x63,\r
+ 0x31, 0x02, 0xfa, 0x02, 0x0a, 0xf2, 0x2f, 0xa0, 0x02, 0xdb, 0x42, 0xbb,\r
+ 0x31, 0xbb, 0xc7, 0x39, 0x5a, 0xdb, 0xbb, 0xbd, 0xb2, 0x08, 0x7d, 0xbb,\r
+ 0xbb, 0xd2, 0x7b, 0x27, 0xcb, 0xbb, 0x00, 0xcc, 0x20, 0x00, 0x02, 0x77,\r
+ 0xed, 0xcb, 0xbb, 0x00, 0xbb, 0xbb, 0xbd, 0x71, 0x00, 0x00, 0x36, 0x87,\r
+ 0x20, 0x78, 0x63, 0x31, 0x02, 0xfa, 0x0a, 0xf2, 0x2f, 0x00, 0xa0, 0x02,\r
+ 0xdb, 0xbb, 0xbb, 0xcd, 0xdd, 0xcb, 0x18, 0xbb, 0xbc, 0xe2, 0x69, 0x59,\r
+ 0xdb, 0xbb, 0xbd, 0x42, 0x20, 0x19, 0x7d, 0xbb, 0xbb, 0xd2, 0x7b, 0x27,\r
+ 0x10, 0xcb, 0xbb, 0xcb, 0x79, 0x02, 0x27, 0x7d, 0xdc, 0x00, 0xbb, 0xbb,\r
+ 0xbb, 0xe2, 0x00, 0x00, 0x36, 0x87, 0x20, 0x78, 0x63, 0x31, 0x02, 0xfa,\r
+ 0x2a, 0xf2, 0xaf, 0x00, 0xa0, 0x02, 0xdb, 0xbb, 0xbd, 0x72, 0x27, 0x4c,\r
+ 0x1d, 0xbb, 0xbb, 0xd7, 0x69, 0x59, 0x89, 0x20, 0x19, 0x42, 0x7d, 0x7e,\r
+ 0x2c, 0xbb, 0xbb, 0xc7, 0x7a, 0x00, 0x10, 0x22, 0x7c, 0xcb, 0x63, 0x36,\r
+ 0x87, 0x78, 0x63, 0x80, 0x31, 0x02, 0xaf, 0xfa, 0xff, 0xff, 0x20, 0x02,\r
+ 0x00, 0xdb, 0xbb, 0xbd, 0x20, 0x00, 0x2c, 0xcb, 0xbb, 0x28, 0xcb, 0x20,\r
+ 0x61, 0x00, 0x8c, 0x00, 0x00, 0x2d, 0x12, 0xbb, 0xbb, 0xd7, 0x82, 0x00,\r
+ 0x2e, 0xbe, 0x00, 0x21, 0x02, 0x7c, 0x63, 0x36, 0x87, 0x78, 0x63, 0x32,\r
+ 0x00, 0x2f, 0xff, 0xff, 0xfa, 0x00, 0x02, 0xdb, 0xbb, 0x00, 0xbd, 0x20,\r
+ 0x00, 0x07, 0xdb, 0xbb, 0xbe, 0x20, 0xc2, 0x62, 0x8c, 0x00, 0x00, 0x2c,\r
+ 0xcb, 0xc4, 0x00, 0x0c, 0x7d, 0xbb, 0xbb, 0xe7, 0x3a, 0x19, 0x2d, 0xbb,\r
+ 0x00, 0xbb, 0xc7, 0x00, 0x00, 0x36, 0x87, 0x78, 0x63, 0x80, 0x3a, 0x02,\r
+ 0xaa, 0xaa, 0x40, 0x00, 0x02, 0xdb, 0x00, 0xbb, 0xbd, 0x20, 0x00, 0x02,\r
+ 0xcc, 0xbb, 0xbd, 0x63, 0x70, 0x63, 0x8b, 0x00, 0x00, 0x07, 0x49, 0x7a,\r
+ 0x98, 0x09, 0xbb, 0xd2, 0x3a, 0x19, 0x2d, 0xbb, 0xbb, 0x01, 0xd7, 0x00,\r
+ 0x00, 0x36, 0x87, 0x78, 0x63, 0x3a, 0x14, 0xaa, 0x22, 0x20, 0x0b, 0xbd,\r
+ 0xc9, 0x7d, 0xbb, 0x30, 0xbb, 0xd2, 0x61, 0x8e, 0x00, 0x02, 0xeb, 0xbb,\r
+ 0x20, 0xbb, 0xd7, 0x79, 0x27, 0xcb, 0xbb, 0xbd, 0x70, 0x24, 0x00, 0x02,\r
+ 0x6a, 0x00, 0x7d, 0x6b, 0x36, 0x87, 0x24, 0x78, 0x63, 0x39, 0x02, 0xff,\r
+ 0x62, 0x02, 0xdb, 0x21, 0xbb, 0xbd, 0x21, 0x2e, 0xbb, 0xbb, 0xe7, 0x61,\r
+ 0x80, 0x8e, 0x00, 0x02, 0x7d, 0xbb, 0xbb, 0xbd, 0x72, 0x00, 0x22, 0x27,\r
+ 0xcc, 0xbb, 0xbb, 0xcd, 0x20, 0x00, 0x08, 0x07, 0xe7, 0x72, 0x22, 0xa3,\r
+ 0xe2, 0x00, 0x00, 0x00, 0x36, 0x87, 0x78, 0x63, 0x00, 0x00, 0x00, 0x02,\r
+ 0x20, 0xaf, 0xa0, 0xd2, 0xdb, 0xbb, 0xbd, 0x20, 0x00, 0x03, 0x00, 0x2b,\r
+ 0xcb, 0xbb, 0xc7, 0x10, 0x8f, 0x11, 0x01, 0x2d, 0xcb, 0xbb, 0xbb, 0xdd,\r
+ 0xb7, 0xcd, 0xd1, 0x00, 0xe7, 0x00, 0x00, 0x07, 0xdc, 0xdd, 0xcb, 0x7b,\r
+ 0x00, 0xdd, 0xcb, 0xbb, 0xbc, 0x72, 0x00, 0x00, 0x36, 0x10, 0x87, 0x78,\r
+ 0x63, 0x01, 0x00, 0x2a, 0xfa, 0x42, 0x01, 0x22, 0x20, 0x02, 0xdb, 0xbb,\r
+ 0xbd, 0x20, 0x01, 0xb0, 0xcc, 0x00, 0x8d, 0xb9, 0xec, 0xbb, 0xbb, 0xbb,\r
+ 0x00, 0xcc, 0xcb, 0xbb, 0xbb, 0xbe, 0x71, 0x00, 0x00, 0x05, 0x27, 0xcb,\r
+ 0xbb, 0xcc, 0xcc, 0x81, 0xce, 0x29, 0x08, 0x36, 0x87, 0x78, 0x63, 0x02,\r
+ 0xaa, 0xff, 0xff, 0x02, 0xff, 0xa0, 0x02, 0xdb, 0xbb, 0xbd, 0x61, 0x02,\r
+ 0x0e, 0xeb, 0xbb, 0xbd, 0x70, 0x5a, 0x8c, 0x09, 0x27, 0x00, 0xec, 0xbb,\r
+ 0xbb, 0xbb, 0xbb, 0xbb, 0xbd, 0xd7, 0x54, 0x10, 0xa1, 0xcb, 0xa4, 0xd2,\r
+ 0x31, 0x36, 0x87, 0x20, 0x78, 0x63, 0x01, 0x02, 0xff, 0xff, 0xff, 0xff,\r
+ 0x02, 0xa0, 0x07, 0xad, 0xdd, 0xda, 0x20, 0x99, 0xde, 0x1c, 0xdd, 0xde,\r
+ 0xc2, 0x21, 0x8d, 0x0a, 0x7c, 0xed, 0x04, 0xcc, 0xcc, 0xcc, 0xde, 0xd7,\r
+ 0x92, 0x2c, 0xed, 0x40, 0xdc, 0xa7, 0x36, 0x87, 0x78, 0x63, 0x00, 0x02,\r
+ 0x00, 0x22, 0x02, 0xaa, 0xaa, 0xaa, 0xaa, 0x20, 0x02, 0x1b, 0x77, 0x77,\r
+ 0x77, 0x5a, 0xc9, 0x72, 0x21, 0x8e, 0x88, 0xaa, 0x27, 0x77, 0x7b, 0x9d,\r
+ 0x12, 0x27, 0x77, 0x20, 0x77, 0xb7, 0x3d, 0x36, 0x87, 0x78, 0x63, 0x00,\r
+ 0x3e, 0x02, 0xaa, 0x43, 0x22, 0xc6, 0x87, 0x3e, 0x12, 0x21, 0x22, 0x22,\r
+ 0x06, 0x01, 0x22, 0x22, 0x21, 0x04, 0x00, 0x36, 0x87, 0x78, 0x63, 0x00,\r
+ 0x02, 0xfa, 0x22, 0x3f, 0xaa, 0x20, 0x26, 0xc6, 0x87, 0x3f, 0x07, 0x07,\r
+ 0x00, 0x36, 0x87, 0x78, 0x63, 0x00, 0x02, 0xfa, 0x02, 0x7e, 0xff, 0x07,\r
+ 0x07, 0x77, 0x2f, 0x07, 0x06, 0x36, 0x00, 0x87, 0x78, 0x63, 0x00, 0x02,\r
+ 0xff, 0xaa, 0xfa, 0x07, 0x44, 0x44, 0x44, 0x20, 0x02, 0xd9, 0xc1, 0xd4,\r
+ 0xf0, 0xa7, 0x5f, 0x17, 0x04, 0x42, 0x00, 0x00, 0x36, 0x00, 0x87, 0x78,\r
+ 0x63, 0x00, 0x02, 0xff, 0xff, 0xff, 0x9f, 0xe9, 0xa0, 0x0a, 0xc4, 0x94,\r
+ 0xa7, 0x5f, 0x17, 0x80, 0x04, 0xfa, 0x20, 0x00, 0x36, 0x87, 0x78, 0x63,\r
+ 0x13, 0x00, 0x00, 0xaf, 0x03, 0xa0, 0x0a, 0x07, 0xbf, 0xe0, 0x77, 0x2f,\r
+ 0x07, 0xfa, 0x20, 0x00, 0x36, 0x87, 0x00, 0x78, 0x63, 0x00, 0x00, 0x02,\r
+ 0xaa, 0xfa, 0xaa, 0x0f, 0xaa, 0xaa, 0x20, 0x02, 0xd9, 0xc1, 0xd4, 0xa7,\r
+ 0xe0, 0x5f, 0x17, 0x05, 0x00, 0x00, 0x36, 0x87, 0x78, 0x03, 0x63, 0x00,\r
+ 0x00, 0x00, 0x02, 0xff, 0xd9, 0xc1, 0xfc, 0xd4, 0xa7, 0x5f, 0x17, 0x07,\r
+ 0x03, 0x36, 0x87, 0x23, 0x78, 0x63, 0x01, 0x02, 0x44, 0x20, 0x07, 0x07,\r
+ 0xf0, 0x77, 0x2f, 0x07, 0x05, 0x36, 0x87, 0x78, 0x63, 0xfe, 0x07, 0x07,\r
+ 0x77, 0x2f, 0x07, 0x07, 0x02, 0x36, 0x1f, 0x87, 0x78, 0x63, 0x07, 0x07,\r
+ 0x77, 0x2f, 0x07, 0xc0, 0x07, 0x02, 0x36, 0x87, 0x78, 0x63, 0x11, 0x11,\r
+ 0x7f, 0x11, 0xe9, 0xd4, 0xa7, 0x5f, 0x17, 0x07, 0x07, 0x00, 0x11, 0x36,\r
+ 0x87, 0x29, 0x66, 0x55, 0x55, 0x55, 0xfe, 0xe9, 0xd4, 0xa7, 0x5f, 0x17,\r
+ 0x07, 0x07, 0x55, 0x00, 0x66, 0x92, 0x23, 0x96, 0x68, 0x88, 0x88, 0x88,\r
+ 0xfe, 0xe9, 0xd4, 0xa7, 0x5f, 0x17, 0x07, 0x06, 0x86, 0x01, 0x69, 0x32,\r
+ 0x21, 0x33, 0x55, 0x55, 0x55, 0xe9, 0xfc, 0xd4, 0xa7, 0x5f, 0x17, 0x07,\r
+ 0x07, 0x55, 0x33, 0x00, 0x12,\r
+};\r
+\r
+\r
+#endif\r
--- /dev/null
+//*****************************************************************************\r
+//\r
+// formike128x128x16.c - Display driver for the Formike Electronic\r
+// KWH015C04-F01 CSTN panel with an ST7637 controller.\r
+//\r
+// Copyright (c) 2008 Luminary Micro, Inc. All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws. All rights are reserved. You may not combine\r
+// this software with "viral" open-source software in order to form a larger\r
+// program. Any use in violation of the foregoing restrictions may subject\r
+// the user to criminal sanctions under applicable laws, as well as to civil\r
+// liability for the breach of the terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 2523 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+//*****************************************************************************\r
+//\r
+//! \addtogroup ek_lm3s3748_api\r
+//! @{\r
+//\r
+//*****************************************************************************\r
+\r
+#include "hw_gpio.h"\r
+#include "hw_memmap.h"\r
+#include "hw_types.h"\r
+#include "gpio.h"\r
+#include "sysctl.h"\r
+#include "rom.h"\r
+#include "grlib.h"\r
+#include "formike128x128x16.h"\r
+#include <string.h>\r
+\r
+//*****************************************************************************\r
+//\r
+// Defines for the pins that are used to communicate with the ST7637.\r
+//\r
+//*****************************************************************************\r
+#define LCD_A0_BASE GPIO_PORTB_BASE\r
+#define LCD_A0_PIN GPIO_PIN_2\r
+#define LCD_WR_BASE GPIO_PORTC_BASE\r
+#define LCD_WR_PIN GPIO_PIN_4\r
+#define LCD_RD_BASE GPIO_PORTC_BASE\r
+#define LCD_RD_PIN GPIO_PIN_5\r
+#define LCD_BL_BASE GPIO_PORTF_BASE\r
+#define LCD_BL_PIN GPIO_PIN_1\r
+#define LCD_DATA_BASE GPIO_PORTG_BASE\r
+\r
+//*****************************************************************************\r
+//\r
+// Translates a 24-bit RGB color to a display driver-specific color.\r
+//\r
+// \param c is the 24-bit RGB color. The least-significant byte is the blue\r
+// channel, the next byte is the green channel, and the third byte is the red\r
+// channel.\r
+//\r
+// This macro translates a 24-bit RGB color into a value that can be written\r
+// into the display's frame buffer in order to reproduce that color, or the\r
+// closest possible approximation of that color.\r
+//\r
+// \return Returns the display-driver specific color.\r
+//\r
+//*****************************************************************************\r
+#define DPYCOLORTRANSLATE(c) ((((c) & 0x00ff0000) >> 19) | \\r
+ ((((c) & 0x0000ff00) >> 5) & 0x000007e0) | \\r
+ ((((c) & 0x000000ff) << 8) & 0x0000f800))\r
+\r
+//*****************************************************************************\r
+//\r
+// Writes a data word to the ST7637.\r
+//\r
+//*****************************************************************************\r
+static void\r
+WriteData(unsigned char ucData)\r
+{\r
+ //\r
+ // Write the data to the data bus.\r
+ //\r
+ HWREG(LCD_DATA_BASE + GPIO_O_DATA + (0xff << 2)) = ucData;\r
+\r
+ //\r
+ // Assert the write enable signal.\r
+ //\r
+ HWREG(LCD_WR_BASE + GPIO_O_DATA + (LCD_WR_PIN << 2)) = 0;\r
+\r
+ //\r
+ // Deassert the write enable signal.\r
+ //\r
+ HWREG(LCD_WR_BASE + GPIO_O_DATA + (LCD_WR_PIN << 2)) = LCD_WR_PIN;\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+// Writes a command to the ST7637.\r
+//\r
+//*****************************************************************************\r
+static void\r
+WriteCommand(unsigned char ucData)\r
+{\r
+ //\r
+ // Write the command to the data bus.\r
+ //\r
+ HWREG(LCD_DATA_BASE + GPIO_O_DATA + (0xff << 2)) = ucData;\r
+\r
+ //\r
+ // Set the A0 signal low, indicating a command.\r
+ //\r
+ HWREG(LCD_A0_BASE + GPIO_O_DATA + (LCD_A0_PIN << 2)) = 0;\r
+\r
+ //\r
+ // Assert the write enable signal.\r
+ //\r
+ HWREG(LCD_WR_BASE + GPIO_O_DATA + (LCD_WR_PIN << 2)) = 0;\r
+\r
+ //\r
+ // Deassert the write enable signal.\r
+ //\r
+ HWREG(LCD_WR_BASE + GPIO_O_DATA + (LCD_WR_PIN << 2)) = LCD_WR_PIN;\r
+\r
+ //\r
+ // Set the A0 signal high, indicating that following writes are data.\r
+ //\r
+ HWREG(LCD_A0_BASE + GPIO_O_DATA + (LCD_A0_PIN << 2)) = LCD_A0_PIN;\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Initializes the display driver.\r
+//!\r
+//! This function initializes the ST7637 display controller on the panel,\r
+//! preparing it to display data.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+Formike128x128x16Init(void)\r
+{\r
+ unsigned long ulClockMS, ulCount;\r
+\r
+ //\r
+ // Get the value to pass to SysCtlDelay() in order to delay for 1 ms.\r
+ //\r
+ ulClockMS = SysCtlClockGet() / (3 * 1000);\r
+\r
+ //\r
+ // Enable the GPIO peripherals used to interface to the ST7637.\r
+ //\r
+ SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB);\r
+ SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOC);\r
+ SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);\r
+ SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOG);\r
+\r
+ //\r
+ // Configure the pins that connect to the LCD as GPIO outputs.\r
+ //\r
+ GPIOPinTypeGPIOOutput(LCD_A0_BASE, LCD_A0_PIN);\r
+ GPIOPinTypeGPIOOutput(LCD_WR_BASE, LCD_WR_PIN);\r
+ GPIOPinTypeGPIOOutput(LCD_RD_BASE, LCD_RD_PIN);\r
+ GPIOPinTypeGPIOOutput(LCD_BL_BASE, LCD_BL_PIN);\r
+ GPIOPinTypeGPIOOutput(LCD_DATA_BASE, 0xff);\r
+\r
+ //\r
+ // Set the LCD control pins to their default values.\r
+ //\r
+ GPIOPinWrite(LCD_A0_BASE, LCD_A0_PIN, LCD_A0_PIN);\r
+ GPIOPinWrite(LCD_WR_BASE, LCD_WR_PIN | LCD_RD_PIN,\r
+ LCD_WR_PIN | LCD_RD_PIN);\r
+ GPIOPinWrite(LCD_BL_BASE, LCD_BL_PIN, 0);\r
+ GPIOPinWrite(LCD_DATA_BASE, 0xff, 0x00);\r
+\r
+ //\r
+ // Perform a software reset of the ST7637.\r
+ //\r
+ WriteCommand(0x01);\r
+\r
+ //\r
+ // Delay for 120ms.\r
+ //\r
+ SysCtlDelay(ulClockMS * 120);\r
+\r
+ //\r
+ // Disable auto-load of mask rom data.\r
+ //\r
+ WriteCommand(0xD7);\r
+ WriteData(0xBF);\r
+\r
+ //\r
+ // Set the OTP control mode to read.\r
+ //\r
+ WriteCommand(0xE0);\r
+ WriteData(0x00);\r
+\r
+ //\r
+ // Delay for 10ms.\r
+ //\r
+ SysCtlDelay(ulClockMS * 10);\r
+\r
+ //\r
+ // Start the OTP read.\r
+ //\r
+ WriteCommand(0xE3);\r
+\r
+ //\r
+ // Delay for 20ms.\r
+ //\r
+ SysCtlDelay(ulClockMS * 20);\r
+\r
+ //\r
+ // Cancel the OTP read (it should have finished by now).\r
+ //\r
+ WriteCommand(0xE1);\r
+\r
+ //\r
+ // Turn off the display.\r
+ //\r
+ WriteCommand(0x28);\r
+\r
+ //\r
+ // Exit sleep mode.\r
+ //\r
+ WriteCommand(0x11);\r
+\r
+ //\r
+ // Delay for 50ms.\r
+ //\r
+ SysCtlDelay(ulClockMS * 50);\r
+\r
+ //\r
+ // Program the LCD supply voltage V0 to 14V.\r
+ //\r
+ WriteCommand(0xC0);\r
+ WriteData(0x04);\r
+ WriteData(0x01);\r
+\r
+ //\r
+ // Select an LCD bias voltage ratio of 1/12.\r
+ //\r
+ WriteCommand(0xC3);\r
+ WriteData(0x00);\r
+\r
+ //\r
+ // Enable the x8 booster circuit.\r
+ //\r
+ WriteCommand(0xC4);\r
+ WriteData(0x07);\r
+\r
+ //\r
+ // Invert the column scan direction for the panel.\r
+ //\r
+ WriteCommand(0xB7);\r
+ WriteData(0xC0);\r
+\r
+ //\r
+ // Select 16bpp, 5-6-5 data input mode.\r
+ //\r
+ WriteCommand(0x3A);\r
+ WriteData(0x05);\r
+\r
+ //\r
+ // Select the memory scanning direction. The scanning mode does not matter\r
+ // for this driver since the row/column selects will constrain the writes\r
+ // to the desired area of the display.\r
+ //\r
+ WriteCommand(0x36);\r
+ WriteData(0x00);\r
+\r
+ //\r
+ // Turn on the display.\r
+ //\r
+ WriteCommand(0x29);\r
+\r
+ //\r
+ // Clear the contents of the display buffer.\r
+ //\r
+ WriteCommand(0x2A);\r
+ WriteData(0x00);\r
+ WriteData(0x7F);\r
+ WriteCommand(0x2B);\r
+ WriteData(0x01);\r
+ WriteData(0x80);\r
+ WriteCommand(0x2c);\r
+ for(ulCount = 0; ulCount < (128 * 128); ulCount++)\r
+ {\r
+ WriteData(0x00);\r
+ WriteData(0x00);\r
+ }\r
+\r
+ //\r
+ // Enable normal operation of the LCD.\r
+ //\r
+ WriteCommand(0x13);\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Turns on the backlight.\r
+//!\r
+//! This function turns on the backlight on the display.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+Formike128x128x16BacklightOn(void)\r
+{\r
+ //\r
+ // Assert the signal that turns on the backlight.\r
+ //\r
+ HWREG(LCD_BL_BASE + GPIO_O_DATA + (LCD_BL_PIN << 2)) = LCD_BL_PIN;\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Turns off the backlight.\r
+//!\r
+//! This function turns off the backlight on the display.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+Formike128x128x16BacklightOff(void)\r
+{\r
+ //\r
+ // Deassert the signal that turns on the backlight.\r
+ //\r
+ HWREG(LCD_BL_BASE + GPIO_O_DATA + (LCD_BL_PIN << 2)) = 0;\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Draws a pixel on the screen.\r
+//!\r
+//! \param pvDisplayData is a pointer to the driver-specific data for this\r
+//! display driver.\r
+//! \param lX is the X coordinate of the pixel.\r
+//! \param lY is the Y coordinate of the pixel.\r
+//! \param ulValue is the color of the pixel.\r
+//!\r
+//! This function sets the given pixel to a particular color. The coordinates\r
+//! of the pixel are assumed to be within the extents of the display.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+static void\r
+Formike128x128x16PixelDraw(void *pvDisplayData, long lX, long lY,\r
+ unsigned long ulValue)\r
+{\r
+ //\r
+ // Set the X address of the display cursor.\r
+ //\r
+ WriteCommand(0x2a);\r
+ WriteData(lX);\r
+ WriteData(lX);\r
+\r
+ //\r
+ // Set the Y address of the display cursor.\r
+ //\r
+ WriteCommand(0x2b);\r
+ WriteData(lY + 1);\r
+ WriteData(lY + 1);\r
+\r
+ //\r
+ // Write the pixel value.\r
+ //\r
+ WriteCommand(0x2c);\r
+ WriteData(ulValue >> 8);\r
+ WriteData(ulValue);\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Draws a horizontal sequence of pixels on the screen.\r
+//!\r
+//! \param pvDisplayData is a pointer to the driver-specific data for this\r
+//! display driver.\r
+//! \param lX is the X coordinate of the first pixel.\r
+//! \param lY is the Y coordinate of the first pixel.\r
+//! \param lX0 is sub-pixel offset within the pixel data, which is valid for 1\r
+//! or 4 bit per pixel formats.\r
+//! \param lCount is the number of pixels to draw.\r
+//! \param lBPP is the number of bits per pixel; must be 1, 4, or 8.\r
+//! \param pucData is a pointer to the pixel data. For 1 and 4 bit per pixel\r
+//! formats, the most significant bit(s) represent the left-most pixel.\r
+//! \param pucPalette is a pointer to the palette used to draw the pixels.\r
+//!\r
+//! This function draws a horizontal sequence of pixels on the screen, using\r
+//! the supplied palette. For 1 bit per pixel format, the palette contains\r
+//! pre-translated colors; for 4 and 8 bit per pixel formats, the palette\r
+//! contains 24-bit RGB values that must be translated before being written to\r
+//! the display.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+static void\r
+Formike128x128x16PixelDrawMultiple(void *pvDisplayData, long lX, long lY,\r
+ long lX0, long lCount, long lBPP,\r
+ const unsigned char *pucData,\r
+ const unsigned char *pucPalette)\r
+{\r
+ unsigned long ulByte;\r
+\r
+ //\r
+ // Set the extent of the line along the X axis.\r
+ //\r
+ WriteCommand(0x2a);\r
+ WriteData(lX);\r
+ WriteData(lX + lCount - 1);\r
+\r
+ //\r
+ // Set the Y address of the display cursor.\r
+ //\r
+ WriteCommand(0x2b);\r
+ WriteData(lY + 1);\r
+ WriteData(lY + 1);\r
+\r
+ //\r
+ // Write the data RAM write command.\r
+ //\r
+ WriteCommand(0x2c);\r
+\r
+ //\r
+ // Determine how to interpret the pixel data based on the number of bits\r
+ // per pixel.\r
+ //\r
+ switch(lBPP)\r
+ {\r
+ //\r
+ // The pixel data is in 1 bit per pixel format.\r
+ //\r
+ case 1:\r
+ {\r
+ //\r
+ // Loop while there are more pixels to draw.\r
+ //\r
+ while(lCount)\r
+ {\r
+ //\r
+ // Get the next byte of image data.\r
+ //\r
+ ulByte = *pucData++;\r
+\r
+ //\r
+ // Loop through the pixels in this byte of image data.\r
+ //\r
+ for(; (lX0 < 8) && lCount; lX0++, lCount--)\r
+ {\r
+ //\r
+ // Draw this pixel in the appropriate color.\r
+ //\r
+ lBPP = ((unsigned long *)pucPalette)[(ulByte >>\r
+ (7 - lX0)) & 1];\r
+ WriteData(lBPP >> 8);\r
+ WriteData(lBPP);\r
+ }\r
+\r
+ //\r
+ // Start at the beginning of the next byte of image data.\r
+ //\r
+ lX0 = 0;\r
+ }\r
+\r
+ //\r
+ // The image data has been drawn.\r
+ //\r
+ break;\r
+ }\r
+\r
+ //\r
+ // The pixel data is in 4 bit per pixel format.\r
+ //\r
+ case 4:\r
+ {\r
+ //\r
+ // Loop while there are more pixels to draw. "Duff's device" is\r
+ // used to jump into the middle of the loop if the first nibble of\r
+ // the pixel data should not be used. Duff's device makes use of\r
+ // the fact that a case statement is legal anywhere within a\r
+ // sub-block of a switch statement. See\r
+ // http://en.wikipedia.org/wiki/Duff's_device for detailed\r
+ // information about Duff's device.\r
+ //\r
+ switch(lX0 & 1)\r
+ {\r
+ case 0:\r
+ while(lCount)\r
+ {\r
+ //\r
+ // Get the upper nibble of the next byte of pixel data\r
+ // and extract the corresponding entry from the\r
+ // palette.\r
+ //\r
+ ulByte = (*pucData >> 4) * 3;\r
+ ulByte = (*(unsigned long *)(pucPalette + ulByte) &\r
+ 0x00ffffff);\r
+\r
+ //\r
+ // Translate this palette entry and write it to the\r
+ // screen.\r
+ //\r
+ ulByte = DPYCOLORTRANSLATE(ulByte);\r
+ WriteData(ulByte >> 8);\r
+ WriteData(ulByte);\r
+\r
+ //\r
+ // Decrement the count of pixels to draw.\r
+ //\r
+ lCount--;\r
+\r
+ //\r
+ // See if there is another pixel to draw.\r
+ //\r
+ if(lCount)\r
+ {\r
+ case 1:\r
+ //\r
+ // Get the lower nibble of the next byte of pixel\r
+ // data and extract the corresponding entry from\r
+ // the palette.\r
+ //\r
+ ulByte = (*pucData++ & 15) * 3;\r
+ ulByte = (*(unsigned long *)(pucPalette + ulByte) &\r
+ 0x00ffffff);\r
+\r
+ //\r
+ // Translate this palette entry and write it to the\r
+ // screen.\r
+ //\r
+ ulByte = DPYCOLORTRANSLATE(ulByte);\r
+ WriteData(ulByte >> 8);\r
+ WriteData(ulByte);\r
+\r
+ //\r
+ // Decrement the count of pixels to draw.\r
+ //\r
+ lCount--;\r
+ }\r
+ }\r
+ }\r
+\r
+ //\r
+ // The image data has been drawn.\r
+ //\r
+ break;\r
+ }\r
+\r
+ //\r
+ // The pixel data is in 8 bit per pixel format.\r
+ //\r
+ case 8:\r
+ {\r
+ //\r
+ // Loop while there are more pixels to draw.\r
+ //\r
+ while(lCount--)\r
+ {\r
+ //\r
+ // Get the next byte of pixel data and extract the\r
+ // corresponding entry from the palette.\r
+ //\r
+ ulByte = *pucData++ * 3;\r
+ ulByte = *(unsigned long *)(pucPalette + ulByte) & 0x00ffffff;\r
+\r
+ //\r
+ // Translate this palette entry and write it to the screen.\r
+ //\r
+ ulByte = DPYCOLORTRANSLATE(ulByte);\r
+ WriteData(ulByte >> 8);\r
+ WriteData(ulByte);\r
+ }\r
+\r
+ //\r
+ // The image data has been drawn.\r
+ //\r
+ break;\r
+ }\r
+ }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Flushes any cached drawing operations.\r
+//!\r
+//! \param pvDisplayData is a pointer to the driver-specific data for this\r
+//! display driver.\r
+//!\r
+//! This functions flushes any cached drawing operations to the display. This\r
+//! is useful when a local frame buffer is used for drawing operations, and the\r
+//! flush would copy the local frame buffer to the display. For the ST7637\r
+//! driver, the flush is a no operation.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+static void\r
+Formike128x128x16Flush(void *pvDisplayData)\r
+{\r
+ //\r
+ // There is nothing to be done.\r
+ //\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Draws a horizontal line.\r
+//!\r
+//! \param pvDisplayData is a pointer to the driver-specific data for this\r
+//! display driver.\r
+//! \param lX1 is the X coordinate of the start of the line.\r
+//! \param lX2 is the X coordinate of the end of the line.\r
+//! \param lY is the Y coordinate of the line.\r
+//! \param ulValue is the color of the line.\r
+//!\r
+//! This function draws a horizontal line on the display. The coordinates of\r
+//! the line are assumed to be within the extents of the display.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+static void\r
+Formike128x128x16LineDrawH(void *pvDisplayData, long lX1, long lX2, long lY,\r
+ unsigned long ulValue)\r
+{\r
+ //\r
+ // Set the extent of the line along the X axis.\r
+ //\r
+ WriteCommand(0x2a);\r
+ WriteData(lX1);\r
+ WriteData(lX2);\r
+\r
+ //\r
+ // Set the Y address of the display cursor.\r
+ //\r
+ WriteCommand(0x2b);\r
+ WriteData(lY + 1);\r
+ WriteData(lY + 1);\r
+\r
+ //\r
+ // Write the data RAM write command.\r
+ //\r
+ WriteCommand(0x2c);\r
+\r
+ //\r
+ // Loop through the pixels of this horizontal line.\r
+ //\r
+ while(lX1++ <= lX2)\r
+ {\r
+ //\r
+ // Write the pixel value.\r
+ //\r
+ WriteData(ulValue >> 8);\r
+ WriteData(ulValue);\r
+ }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Draws a vertical line.\r
+//!\r
+//! \param pvDisplayData is a pointer to the driver-specific data for this\r
+//! display driver.\r
+//! \param lX is the X coordinate of the line.\r
+//! \param lY1 is the Y coordinate of the start of the line.\r
+//! \param lY2 is the Y coordinate of the end of the line.\r
+//! \param ulValue is the color of the line.\r
+//!\r
+//! This function draws a vertical line on the display. The coordinates of the\r
+//! line are assumed to be within the extents of the display.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+static void\r
+Formike128x128x16LineDrawV(void *pvDisplayData, long lX, long lY1, long lY2,\r
+ unsigned long ulValue)\r
+{\r
+ //\r
+ // Set the X address of the display cursor.\r
+ //\r
+ WriteCommand(0x2a);\r
+ WriteData(lX);\r
+ WriteData(lX);\r
+\r
+ //\r
+ // Set the extent of the line along the Y axis.\r
+ //\r
+ WriteCommand(0x2b);\r
+ WriteData(lY1 + 1);\r
+ WriteData(lY2 + 1);\r
+\r
+ //\r
+ // Write the data RAM write command.\r
+ //\r
+ WriteCommand(0x2c);\r
+\r
+ //\r
+ // Loop through the pixels of this vertical line.\r
+ //\r
+ while(lY1++ <= lY2)\r
+ {\r
+ //\r
+ // Write the pixel value.\r
+ //\r
+ WriteData(ulValue >> 8);\r
+ WriteData(ulValue);\r
+ }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Fills a rectangle.\r
+//!\r
+//! \param pvDisplayData is a pointer to the driver-specific data for this\r
+//! display driver.\r
+//! \param pRect is a pointer to the structure describing the rectangle.\r
+//! \param ulValue is the color of the rectangle.\r
+//!\r
+//! This function fills a rectangle on the display. The coordinates of the\r
+//! rectangle are assumed to be within the extents of the display, and the\r
+//! rectangle specification is fully inclusive (i.e. both sXMin and sXMax are\r
+//! drawn, along with sYMin and sYMax).\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+static void\r
+Formike128x128x16RectFill(void *pvDisplayData, const tRectangle *pRect,\r
+ unsigned long ulValue)\r
+{\r
+ long lCount;\r
+\r
+ //\r
+ // Set the extent of the rectangle along the X axis.\r
+ //\r
+ WriteCommand(0x2a);\r
+ WriteData(pRect->sXMin);\r
+ WriteData(pRect->sXMax);\r
+\r
+ //\r
+ // Set the extent of the rectangle along the Y axis.\r
+ //\r
+ WriteCommand(0x2b);\r
+ WriteData(pRect->sYMin + 1);\r
+ WriteData(pRect->sYMax + 1);\r
+\r
+ //\r
+ // Write the data RAM write command.\r
+ //\r
+ WriteCommand(0x2c);\r
+\r
+ //\r
+ // Loop through the pixels in this rectangle.\r
+ //\r
+ for(lCount = ((pRect->sXMax - pRect->sXMin + 1) *\r
+ (pRect->sYMax - pRect->sYMin + 1)); lCount > 0; lCount--)\r
+ {\r
+ //\r
+ // Write the pixel value.\r
+ //\r
+ WriteData(ulValue >> 8);\r
+ WriteData(ulValue);\r
+ }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Translates a 24-bit RGB color to a display driver-specific color.\r
+//!\r
+//! \param pvDisplayData is a pointer to the driver-specific data for this\r
+//! display driver.\r
+//! \param ulValue is the 24-bit RGB color. The least-significant byte is the\r
+//! blue channel, the next byte is the green channel, and the third byte is the\r
+//! red channel.\r
+//!\r
+//! This function translates a 24-bit RGB color into a value that can be\r
+//! written into the display's frame buffer in order to reproduce that color,\r
+//! or the closest possible approximation of that color.\r
+//!\r
+//! \return Returns the display-driver specific color.\r
+//\r
+//*****************************************************************************\r
+static unsigned long\r
+Formike128x128x16ColorTranslate(void *pvDisplayData, unsigned long ulValue)\r
+{\r
+ //\r
+ // Translate from a 24-bit RGB color to a 5-6-5 RGB color.\r
+ //\r
+ return(DPYCOLORTRANSLATE(ulValue));\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! The display structure that describes the driver for the Formike Electronic\r
+//! KWH015C04-F01 CSTN panel with an ST7637 controller.\r
+//\r
+//*****************************************************************************\r
+const tDisplay g_sFormike128x128x16 =\r
+{\r
+ sizeof(tDisplay),\r
+ 0,\r
+ 128,\r
+ 128,\r
+ Formike128x128x16PixelDraw,\r
+ Formike128x128x16PixelDrawMultiple,\r
+ Formike128x128x16LineDrawH,\r
+ Formike128x128x16LineDrawV,\r
+ Formike128x128x16RectFill,\r
+ Formike128x128x16ColorTranslate,\r
+ Formike128x128x16Flush\r
+};\r
+\r
+//*****************************************************************************\r
+//\r
+// Close the Doxygen group.\r
+//! @}\r
+//\r
+//*****************************************************************************\r
+\r
+\r
+\r
+\r
+\r
+\r
+\r
+\r
+\r
+\r
+\r
+\r
+\r
+\r
+\r
+\r
+/* FreeRTOS.org demo wrappers. These are required so the prototypes for the\r
+functions are the same as for the display drivers used by other evaluation\r
+kits. */\r
+\r
+static tContext sContext;\r
+\r
+void vFormike128x128x16Clear( void )\r
+{\r
+const tRectangle xRectangle = { 0, 0, 127, 127 };\r
+\r
+ GrContextForegroundSet( &sContext, ClrBlack );\r
+ GrRectFill( &sContext, &xRectangle );\r
+ GrContextForegroundSet(&sContext, ClrWhite);\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vFormike128x128x16StringDraw( const char *pcString, unsigned long lX, unsigned long lY, unsigned char ucColor )\r
+{\r
+ GrContextForegroundSet(&sContext, ClrWhite);\r
+ GrStringDraw( &sContext, pcString, strlen( pcString ), lX, lY, false );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vFormike128x128x16Init( unsigned long ul )\r
+{\r
+tRectangle rectScreen;\r
+const unsigned char *pcAppName = "www.FreeRTOS.org";\r
+\r
+ ( void ) ul;\r
+ \r
+ Formike128x128x16Init();\r
+ Formike128x128x16BacklightOn();\r
+ GrContextInit(&sContext, &g_sFormike128x128x16);\r
+ GrContextFontSet(&sContext, &g_sFontCmss12);\r
+ rectScreen.sXMin = 0;\r
+\r
+ /* Fill the screen with a black rectangle. */\r
+ rectScreen.sYMin = 0;\r
+ rectScreen.sXMax = g_sFormike128x128x16.usWidth - 1;\r
+ rectScreen.sYMax = g_sFormike128x128x16.usHeight - 1;\r
+ GrContextForegroundSet(&sContext, ClrBlack);\r
+ GrRectFill(&sContext, &rectScreen);\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vFormike128x128x16ImageDraw( const unsigned char *pucImage, unsigned long ulX, unsigned long ulY, unsigned long ulWidth, unsigned long ulHeight )\r
+{\r
+ GrImageDraw( &sContext, pucImage, ( long ) ulX, ( long ) ulY);\r
+}\r
+\r
+\r
+\r
+\r
--- /dev/null
+//*****************************************************************************\r
+//\r
+// formike128x128x16.h - Prototypes for the Formike Electronic KWH015C04-F01\r
+// display driver.\r
+//\r
+// Copyright (c) 2008 Luminary Micro, Inc. All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws. All rights are reserved. You may not combine\r
+// this software with "viral" open-source software in order to form a larger\r
+// program. Any use in violation of the foregoing restrictions may subject\r
+// the user to criminal sanctions under applicable laws, as well as to civil\r
+// liability for the breach of the terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 2523 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+#ifndef __FORMIKE128X128X16_H__\r
+#define __FORMIKE128X128X16_H__\r
+\r
+//*****************************************************************************\r
+//\r
+// Prototypes for the globals exported by this driver.\r
+//\r
+//*****************************************************************************\r
+extern void Formike128x128x16Init(void);\r
+extern void Formike128x128x16BacklightOn(void);\r
+extern void Formike128x128x16BacklightOff(void);\r
+extern const tDisplay g_sFormike128x128x16;\r
+\r
+/* FreeRTOS.org demo wrappers. These are required so the prototypes for the\r
+functions are the same as for the display drivers used by other evaluation\r
+kits. */\r
+void vFormike128x128x16Clear( void );\r
+void vFormike128x128x16StringDraw( const char *pcString, unsigned long lX, unsigned long lY, unsigned char ucColor );\r
+void vFormike128x128x16Init( unsigned long ul );\r
+void vFormike128x128x16ImageDraw( const unsigned char *pucImage, unsigned long ulX, unsigned long ulY, unsigned long ulWidth, unsigned long ulHeight );\r
+\r
+#endif // __FORMIKE128X128X16_H__\r
--- /dev/null
+#ifndef LCD_MESSAGE_H\r
+#define LCD_MESSAGE_H\r
+\r
+typedef struct\r
+{\r
+ char *pcMessage;\r
+} xOLEDMessage;\r
+\r
+#endif /* LCD_MESSAGE_H */\r
--- /dev/null
+/*\r
+ FreeRTOS V5.4.2 - Copyright (C) 2009 Real Time Engineers Ltd.\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation and modified by the FreeRTOS exception.\r
+ **NOTE** The exception to the GPL is included to allow you to distribute a\r
+ combined work that includes FreeRTOS without being obliged to provide the\r
+ source code for proprietary components outside of the FreeRTOS kernel.\r
+ Alternative commercial license and support terms are also available upon\r
+ request. See the licensing section of http://www.FreeRTOS.org for full\r
+ license details.\r
+\r
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT\r
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details.\r
+\r
+ You should have received a copy of the GNU General Public License along\r
+ with FreeRTOS; if not, write to the Free Software Foundation, Inc., 59\r
+ Temple Place, Suite 330, Boston, MA 02111-1307 USA.\r
+\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * Looking for a quick start? Then check out the FreeRTOS eBook! *\r
+ * See http://www.FreeRTOS.org/Documentation for details *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ Please ensure to read the configuration and relevant port sections of the\r
+ online documentation.\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and\r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety\r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting,\r
+ licensing and training services.\r
+*/\r
+\r
+\r
+/*\r
+ * Creates all the demo application tasks, then starts the scheduler. The WEB\r
+ * documentation provides more details of the standard demo application tasks.\r
+ * In addition to the standard demo tasks, the following tasks and tests are\r
+ * defined and/or created within this file:\r
+ *\r
+ * "Fast Interrupt Test" - A high frequency periodic interrupt is generated\r
+ * using a free running timer to demonstrate the use of the\r
+ * configKERNEL_INTERRUPT_PRIORITY configuration constant. The interrupt\r
+ * service routine measures the number of processor clocks that occur between\r
+ * each interrupt - and in so doing measures the jitter in the interrupt timing.\r
+ * The maximum measured jitter time is latched in the ulMaxJitter variable, and\r
+ * displayed on the OLED display by the 'OLED' task as described below. The\r
+ * fast interrupt is configured and handled in the timertest.c source file.\r
+ *\r
+ * "OLED" task - the OLED task is a 'gatekeeper' task. It is the only task that\r
+ * is permitted to access the display directly. Other tasks wishing to write a\r
+ * message to the OLED send the message on a queue to the OLED task instead of\r
+ * accessing the OLED themselves. The OLED task just blocks on the queue waiting\r
+ * for messages - waking and displaying the messages as they arrive.\r
+ *\r
+ * "Check" hook - This only executes every five seconds from the tick hook.\r
+ * Its main function is to check that all the standard demo tasks are still\r
+ * operational. Should any unexpected behaviour within a demo task be discovered\r
+ * the tick hook will write an error to the OLED (via the OLED task). If all the\r
+ * demo tasks are executing with their expected behaviour then the check task\r
+ * writes PASS to the OLED (again via the OLED task), as described above.\r
+ *\r
+ * "uIP" task - This is the task that handles the uIP stack. All TCP/IP\r
+ * processing is performed in this task.\r
+ */\r
+\r
+\r
+\r
+\r
+/*************************************************************************\r
+ * Please ensure to read http://www.freertos.org/portLM3Sxxxx_Eclipse.html\r
+ * which provides information on configuring and running this demo for the\r
+ * various Luminary Micro EKs.\r
+ *************************************************************************/\r
+\r
+\r
+\r
+\r
+/* Standard includes. */\r
+#include <stdio.h>\r
+\r
+/* Scheduler includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+#include "queue.h"\r
+#include "semphr.h"\r
+\r
+/* Hardware library includes. */\r
+#include "hw_memmap.h"\r
+#include "hw_types.h"\r
+#include "hw_sysctl.h"\r
+#include "sysctl.h"\r
+#include "gpio.h"\r
+#include "grlib.h"\r
+#include "rit128x96x4.h"\r
+#include "osram128x64x4.h"\r
+#include "formike128x128x16.h"\r
+\r
+/* Demo app includes. */\r
+#include "BlockQ.h"\r
+#include "death.h"\r
+#include "integer.h"\r
+#include "blocktim.h"\r
+#include "flash.h"\r
+#include "partest.h"\r
+#include "semtest.h"\r
+#include "PollQ.h"\r
+#include "lcd_message.h"\r
+#include "bitmap.h"\r
+#include "GenQTest.h"\r
+#include "QPeek.h"\r
+#include "recmutex.h"\r
+#include "IntQueue.h"\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* The time between cycles of the 'check' functionality (defined within the\r
+tick hook. */\r
+#define mainCHECK_DELAY ( ( portTickType ) 5000 / portTICK_RATE_MS )\r
+\r
+/* Size of the stack allocated to the uIP task. */\r
+#define mainBASIC_WEB_STACK_SIZE ( configMINIMAL_STACK_SIZE * 3 )\r
+\r
+/* The OLED task uses the sprintf function so requires a little more stack too. */\r
+#define mainOLED_TASK_STACK_SIZE ( configMINIMAL_STACK_SIZE + 50 )\r
+\r
+/* Task priorities. */\r
+#define mainQUEUE_POLL_PRIORITY ( tskIDLE_PRIORITY + 2 )\r
+#define mainCHECK_TASK_PRIORITY ( tskIDLE_PRIORITY + 3 )\r
+#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1 )\r
+#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 2 )\r
+#define mainCREATOR_TASK_PRIORITY ( tskIDLE_PRIORITY + 3 )\r
+#define mainINTEGER_TASK_PRIORITY ( tskIDLE_PRIORITY )\r
+#define mainGEN_QUEUE_TASK_PRIORITY ( tskIDLE_PRIORITY )\r
+\r
+/* The maximum number of message that can be waiting for display at any one\r
+time. */\r
+#define mainOLED_QUEUE_SIZE ( 3 )\r
+\r
+/* Dimensions the buffer into which the jitter time is written. */\r
+#define mainMAX_MSG_LEN 25\r
+\r
+/* The period of the system clock in nano seconds. This is used to calculate\r
+the jitter time in nano seconds. */\r
+#define mainNS_PER_CLOCK ( ( unsigned portLONG ) ( ( 1.0 / ( double ) configCPU_CLOCK_HZ ) * 1000000000.0 ) )\r
+\r
+/* Constants used when writing strings to the display. */\r
+#define mainCHARACTER_HEIGHT ( 9 )\r
+#define mainMAX_ROWS_128 ( mainCHARACTER_HEIGHT * 14 )\r
+#define mainMAX_ROWS_96 ( mainCHARACTER_HEIGHT * 10 )\r
+#define mainMAX_ROWS_64 ( mainCHARACTER_HEIGHT * 7 )\r
+#define mainFULL_SCALE ( 15 )\r
+#define ulSSI_FREQUENCY ( 3500000UL )\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * The task that handles the uIP stack. All TCP/IP processing is performed in\r
+ * this task.\r
+ */\r
+extern void vuIP_Task( void *pvParameters );\r
+\r
+/*\r
+ * The display is written two by more than one task so is controlled by a\r
+ * 'gatekeeper' task. This is the only task that is actually permitted to\r
+ * access the display directly. Other tasks wanting to display a message send\r
+ * the message to the gatekeeper.\r
+ */\r
+static void vOLEDTask( void *pvParameters );\r
+\r
+/*\r
+ * Configure the hardware for the demo.\r
+ */\r
+static void prvSetupHardware( void );\r
+\r
+/*\r
+ * Configures the high frequency timers - those used to measure the timing\r
+ * jitter while the real time kernel is executing.\r
+ */\r
+extern void vSetupHighFrequencyTimer( void );\r
+\r
+/*\r
+ * The idle hook is used to run a test of the scheduler context switch\r
+ * mechanism.\r
+ */\r
+void vApplicationIdleHook( void ) __attribute__((naked));\r
+/*-----------------------------------------------------------*/\r
+\r
+/* The queue used to send messages to the OLED task. */\r
+xQueueHandle xOLEDQueue;\r
+\r
+/* The welcome text. */\r
+const portCHAR * const pcWelcomeMessage = " www.FreeRTOS.org";\r
+\r
+/* Variables used to detect the test in the idle hook failing. */\r
+unsigned portLONG ulIdleError = pdFALSE;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/*************************************************************************\r
+ * Please ensure to read http://www.freertos.org/portLM3Sxxxx_Eclipse.html\r
+ * which provides information on configuring and running this demo for the\r
+ * various Luminary Micro EKs.\r
+ *************************************************************************/\r
+int main( void )\r
+{\r
+ prvSetupHardware();\r
+\r
+ /* Create the queue used by the OLED task. Messages for display on the OLED\r
+ are received via this queue. */\r
+ xOLEDQueue = xQueueCreate( mainOLED_QUEUE_SIZE, sizeof( xOLEDMessage ) );\r
+\r
+ /* Create the uIP task if running on a processor that includes a MAC and\r
+ PHY. */\r
+ if( SysCtlPeripheralPresent( SYSCTL_PERIPH_ETH ) )\r
+ {\r
+ xTaskCreate( vuIP_Task, ( signed portCHAR * ) "uIP", mainBASIC_WEB_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY - 1, NULL );\r
+ }\r
+\r
+ /* Start the standard demo tasks. */\r
+ vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
+ vCreateBlockTimeTasks();\r
+ vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
+ vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );\r
+ vStartIntegerMathTasks( mainINTEGER_TASK_PRIORITY );\r
+ vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );\r
+ vStartQueuePeekTasks();\r
+ vStartRecursiveMutexTasks();\r
+ vStartInterruptQueueTasks();\r
+\r
+ /* Start the tasks defined within this file/specific to this demo. */\r
+ xTaskCreate( vOLEDTask, ( signed portCHAR * ) "OLED", mainOLED_TASK_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );\r
+\r
+ /* The suicide tasks must be created last as they need to know how many\r
+ tasks were running prior to their creation in order to ascertain whether\r
+ or not the correct/expected number of tasks are running at any given time. */\r
+ vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY );\r
+\r
+ /* Configure the high frequency interrupt used to measure the interrupt\r
+ jitter time. */\r
+ vSetupHighFrequencyTimer();\r
+\r
+ /* Start the scheduler. */\r
+ vTaskStartScheduler();\r
+\r
+ /* Will only get here if there was insufficient memory to create the idle\r
+ task. */\r
+ for( ;; );\r
+ return 0;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void prvSetupHardware( void )\r
+{\r
+ /* If running on Rev A2 silicon, turn the LDO voltage up to 2.75V. This is\r
+ a workaround to allow the PLL to operate reliably. */\r
+ if( DEVICE_IS_REVA2 )\r
+ {\r
+ SysCtlLDOSet( SYSCTL_LDO_2_75V );\r
+ }\r
+\r
+ /* Set the clocking to run from the PLL at 50 MHz */\r
+ SysCtlClockSet( SYSCTL_SYSDIV_4 | SYSCTL_USE_PLL | SYSCTL_OSC_MAIN | SYSCTL_XTAL_8MHZ );\r
+\r
+ /* Enable Port F for Ethernet LEDs\r
+ LED0 Bit 3 Output\r
+ LED1 Bit 2 Output */\r
+ SysCtlPeripheralEnable( SYSCTL_PERIPH_GPIOF );\r
+ GPIODirModeSet( GPIO_PORTF_BASE, (GPIO_PIN_2 | GPIO_PIN_3), GPIO_DIR_MODE_HW );\r
+ GPIOPadConfigSet( GPIO_PORTF_BASE, (GPIO_PIN_2 | GPIO_PIN_3 ), GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD );\r
+\r
+ vParTestInitialise();\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vApplicationTickHook( void )\r
+{\r
+static xOLEDMessage xMessage = { "PASS" };\r
+static unsigned portLONG ulTicksSinceLastDisplay = 0;\r
+portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;\r
+\r
+ /* Called from every tick interrupt. Have enough ticks passed to make it\r
+ time to perform our health status check again? */\r
+ ulTicksSinceLastDisplay++;\r
+ if( ulTicksSinceLastDisplay >= mainCHECK_DELAY )\r
+ {\r
+ ulTicksSinceLastDisplay = 0;\r
+\r
+ /* Has an error been found in any task? */\r
+ if( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
+ {\r
+ xMessage.pcMessage = "ERROR IN GEN Q";\r
+ }\r
+ else if( xAreQueuePeekTasksStillRunning() != pdTRUE )\r
+ {\r
+ xMessage.pcMessage = "ERROR IN PEEK Q";\r
+ }\r
+ else if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
+ {\r
+ xMessage.pcMessage = "ERROR IN BLOCK Q";\r
+ }\r
+ else if( xAreBlockTimeTestTasksStillRunning() != pdTRUE )\r
+ {\r
+ xMessage.pcMessage = "ERROR IN BLOCK TIME";\r
+ }\r
+ else if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
+ {\r
+ xMessage.pcMessage = "ERROR IN SEMAPHORE";\r
+ }\r
+ else if( xArePollingQueuesStillRunning() != pdTRUE )\r
+ {\r
+ xMessage.pcMessage = "ERROR IN POLL Q";\r
+ }\r
+ else if( xIsCreateTaskStillRunning() != pdTRUE )\r
+ {\r
+ xMessage.pcMessage = "ERROR IN CREATE";\r
+ }\r
+ else if( xAreIntegerMathsTaskStillRunning() != pdTRUE )\r
+ {\r
+ xMessage.pcMessage = "ERROR IN MATH";\r
+ }\r
+ else if( xAreRecursiveMutexTasksStillRunning() != pdTRUE )\r
+ {\r
+ xMessage.pcMessage = "ERROR IN REC MUTEX";\r
+ }\r
+ else if( ulIdleError != pdFALSE )\r
+ {\r
+ xMessage.pcMessage = "ERROR IN HOOK";\r
+ }\r
+ else if( xAreIntQueueTasksStillRunning() != pdTRUE )\r
+ {\r
+ xMessage.pcMessage = "ERROR IN INT QUEUE";\r
+ }\r
+\r
+\r
+ /* Send the message to the OLED gatekeeper for display. */\r
+ xHigherPriorityTaskWoken = pdFALSE;\r
+ xQueueSendFromISR( xOLEDQueue, &xMessage, &xHigherPriorityTaskWoken );\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vOLEDTask( void *pvParameters )\r
+{\r
+xOLEDMessage xMessage;\r
+unsigned portLONG ulY, ulMaxY;\r
+static portCHAR cMessage[ mainMAX_MSG_LEN ];\r
+extern volatile unsigned portLONG ulMaxJitter;\r
+unsigned portBASE_TYPE uxUnusedStackOnEntry, uxUnusedStackNow;\r
+const unsigned portCHAR *pucImage;\r
+\r
+/* Functions to access the OLED. The one used depends on the dev kit\r
+being used. */\r
+void ( *vOLEDInit )( unsigned portLONG ) = NULL;\r
+void ( *vOLEDStringDraw )( const portCHAR *, unsigned portLONG, unsigned portLONG, unsigned portCHAR ) = NULL;\r
+void ( *vOLEDImageDraw )( const unsigned portCHAR *, unsigned portLONG, unsigned portLONG, unsigned portLONG, unsigned portLONG ) = NULL;\r
+void ( *vOLEDClear )( void ) = NULL;\r
+\r
+ /* Just for demo purposes. */\r
+ uxUnusedStackOnEntry = uxTaskGetStackHighWaterMark( NULL );\r
+\r
+ /* Map the OLED access functions to the driver functions that are appropriate\r
+ for the evaluation kit being used. */\r
+ switch( HWREG( SYSCTL_DID1 ) & SYSCTL_DID1_PRTNO_MASK )\r
+ {\r
+ case SYSCTL_DID1_PRTNO_6965 :\r
+ case SYSCTL_DID1_PRTNO_2965 : vOLEDInit = OSRAM128x64x4Init;\r
+ vOLEDStringDraw = OSRAM128x64x4StringDraw;\r
+ vOLEDImageDraw = OSRAM128x64x4ImageDraw;\r
+ vOLEDClear = OSRAM128x64x4Clear;\r
+ ulMaxY = mainMAX_ROWS_64;\r
+ pucImage = pucBasicBitmap;\r
+ break;\r
+\r
+ case SYSCTL_DID1_PRTNO_1968 :\r
+ case SYSCTL_DID1_PRTNO_8962 : vOLEDInit = RIT128x96x4Init;\r
+ vOLEDStringDraw = RIT128x96x4StringDraw;\r
+ vOLEDImageDraw = RIT128x96x4ImageDraw;\r
+ vOLEDClear = RIT128x96x4Clear;\r
+ ulMaxY = mainMAX_ROWS_96;\r
+ pucImage = pucBasicBitmap;\r
+ break;\r
+\r
+ default : vOLEDInit = vFormike128x128x16Init;\r
+ vOLEDStringDraw = vFormike128x128x16StringDraw;\r
+ vOLEDImageDraw = vFormike128x128x16ImageDraw;\r
+ vOLEDClear = vFormike128x128x16Clear;\r
+ ulMaxY = mainMAX_ROWS_128;\r
+ pucImage = pucGrLibBitmap;\r
+ break;\r
+ }\r
+\r
+ ulY = ulMaxY;\r
+\r
+ /* Initialise the OLED and display a startup message. */\r
+ vOLEDInit( ulSSI_FREQUENCY );\r
+ vOLEDStringDraw( "POWERED BY FreeRTOS", 0, 0, mainFULL_SCALE );\r
+ vOLEDImageDraw( pucImage, 0, mainCHARACTER_HEIGHT + 1, bmpBITMAP_WIDTH, bmpBITMAP_HEIGHT );\r
+\r
+ for( ;; )\r
+ {\r
+ /* Wait for a message to arrive that requires displaying. */\r
+ xQueueReceive( xOLEDQueue, &xMessage, portMAX_DELAY );\r
+\r
+ /* Write the message on the next available row. */\r
+ ulY += mainCHARACTER_HEIGHT;\r
+ if( ulY >= ulMaxY )\r
+ {\r
+ ulY = mainCHARACTER_HEIGHT;\r
+ vOLEDClear();\r
+ vOLEDStringDraw( pcWelcomeMessage, 0, 0, mainFULL_SCALE );\r
+ }\r
+\r
+ /* Display the message along with the maximum jitter time from the\r
+ high priority time test. */\r
+ sprintf( cMessage, "%s [%uns]", xMessage.pcMessage, ulMaxJitter * mainNS_PER_CLOCK );\r
+ vOLEDStringDraw( cMessage, 0, ulY, mainFULL_SCALE );\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vApplicationStackOverflowHook( xTaskHandle *pxTask, signed portCHAR *pcTaskName )\r
+{\r
+ for( ;; );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vApplicationMallocFailedHook( void )\r
+{\r
+ for( ;; );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Just to keep the linker happy. */\r
+void __error__( char *pcFilename, unsigned long ulLine )\r
+{\r
+ for( ;; );\r
+}\r
+\r
+int uipprintf( const char *fmt, ... )\r
+{\r
+ return( 0 );\r
+}\r
--- /dev/null
+//*****************************************************************************\r
+//\r
+// osram128x64x4.c - Driver for the OSRAM 128x64x4 graphical OLED display.\r
+//\r
+// Copyright (c) 2006-2007 Luminary Micro, Inc. All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws. All rights are reserved. Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1408 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+//*****************************************************************************\r
+//\r
+//! \addtogroup ek_lm3sx965_api\r
+//! @{\r
+//\r
+//*****************************************************************************\r
+\r
+#include "hw_ssi.h"\r
+#include "hw_memmap.h"\r
+#include "hw_sysctl.h"\r
+#include "hw_types.h"\r
+#include "debug.h"\r
+#include "gpio.h"\r
+#include "ssi.h"\r
+#include "sysctl.h"\r
+#include "osram128x64x4.h"\r
+\r
+//*****************************************************************************\r
+//\r
+// Flag to indicate if SSI port is enabled for OSRAM usage.\r
+//\r
+//*****************************************************************************\r
+static volatile tBoolean g_bSSIEnabled = false;\r
+\r
+//*****************************************************************************\r
+//\r
+// Define the OSRAM 128x64x4 Remap Setting(s). This will be used in\r
+// several places in the code to switch between vertical and horizontal\r
+// address incrementing.\r
+//\r
+// The Remap Command (0xA0) takes one 8-bit parameter. The parameter is\r
+// defined as follows.\r
+//\r
+// Bit 7: Reserved\r
+// Bit 6: Disable(0)/Enable(1) COM Split Odd Even\r
+// When enabled, the COM signals are split Odd on one side, even on\r
+// the other. Otherwise, they are split 0-39 on one side, 40-79 on\r
+// the other.\r
+// Bit 5: Reserved\r
+// Bit 4: Disable(0)/Enable(1) COM Remap\r
+// When Enabled, ROW 0-79 map to COM 79-0 (i.e. reverse row order)\r
+// Bit 3: Reserved\r
+// Bit 2: Horizontal(0)/Vertical(1) Address Increment\r
+// When set, data RAM address will increment along the column rather\r
+// than along the row.\r
+// Bit 1: Disable(0)/Enable(1) Nibble Remap\r
+// When enabled, the upper and lower nibbles in the DATA bus for access\r
+// to the data RAM are swapped.\r
+// Bit 0: Disable(0)/Enable(1) Column Address Remap\r
+// When enabled, DATA RAM columns 0-63 are remapped to Segment Columns\r
+// 127-0.\r
+//\r
+//*****************************************************************************\r
+#define OSRAM_INIT_REMAP 0x52\r
+#define OSRAM_INIT_OFFSET 0x4C\r
+static const unsigned char g_pucOSRAM128x64x4VerticalInc[] = { 0xA0, 0x56 };\r
+static const unsigned char g_pucOSRAM128x64x4HorizontalInc[] = { 0xA0, 0x52 };\r
+\r
+//*****************************************************************************\r
+//\r
+// A 5x7 font (in a 6x8 cell, where the sixth column is omitted from this\r
+// table) for displaying text on the OLED display. The data is organized as\r
+// bytes from the left column to the right column, with each byte containing\r
+// the top row in the LSB and the bottom row in the MSB.\r
+//\r
+// Note: This is the same font data that is used in the EK-LM3S811\r
+// osram96x16x1 driver. The single bit-per-pixel is expaned in the StringDraw\r
+// function to the appropriate four bit-per-pixel gray scale format.\r
+//\r
+//*****************************************************************************\r
+static const unsigned char g_pucFont[96][5] =\r
+{\r
+ { 0x00, 0x00, 0x00, 0x00, 0x00 }, // " "\r
+ { 0x00, 0x00, 0x4f, 0x00, 0x00 }, // !\r
+ { 0x00, 0x07, 0x00, 0x07, 0x00 }, // "\r
+ { 0x14, 0x7f, 0x14, 0x7f, 0x14 }, // #\r
+ { 0x24, 0x2a, 0x7f, 0x2a, 0x12 }, // $\r
+ { 0x23, 0x13, 0x08, 0x64, 0x62 }, // %\r
+ { 0x36, 0x49, 0x55, 0x22, 0x50 }, // &\r
+ { 0x00, 0x05, 0x03, 0x00, 0x00 }, // '\r
+ { 0x00, 0x1c, 0x22, 0x41, 0x00 }, // (\r
+ { 0x00, 0x41, 0x22, 0x1c, 0x00 }, // )\r
+ { 0x14, 0x08, 0x3e, 0x08, 0x14 }, // *\r
+ { 0x08, 0x08, 0x3e, 0x08, 0x08 }, // +\r
+ { 0x00, 0x50, 0x30, 0x00, 0x00 }, // ,\r
+ { 0x08, 0x08, 0x08, 0x08, 0x08 }, // -\r
+ { 0x00, 0x60, 0x60, 0x00, 0x00 }, // .\r
+ { 0x20, 0x10, 0x08, 0x04, 0x02 }, // /\r
+ { 0x3e, 0x51, 0x49, 0x45, 0x3e }, // 0\r
+ { 0x00, 0x42, 0x7f, 0x40, 0x00 }, // 1\r
+ { 0x42, 0x61, 0x51, 0x49, 0x46 }, // 2\r
+ { 0x21, 0x41, 0x45, 0x4b, 0x31 }, // 3\r
+ { 0x18, 0x14, 0x12, 0x7f, 0x10 }, // 4\r
+ { 0x27, 0x45, 0x45, 0x45, 0x39 }, // 5\r
+ { 0x3c, 0x4a, 0x49, 0x49, 0x30 }, // 6\r
+ { 0x01, 0x71, 0x09, 0x05, 0x03 }, // 7\r
+ { 0x36, 0x49, 0x49, 0x49, 0x36 }, // 8\r
+ { 0x06, 0x49, 0x49, 0x29, 0x1e }, // 9\r
+ { 0x00, 0x36, 0x36, 0x00, 0x00 }, // :\r
+ { 0x00, 0x56, 0x36, 0x00, 0x00 }, // ;\r
+ { 0x08, 0x14, 0x22, 0x41, 0x00 }, // <\r
+ { 0x14, 0x14, 0x14, 0x14, 0x14 }, // =\r
+ { 0x00, 0x41, 0x22, 0x14, 0x08 }, // >\r
+ { 0x02, 0x01, 0x51, 0x09, 0x06 }, // ?\r
+ { 0x32, 0x49, 0x79, 0x41, 0x3e }, // @\r
+ { 0x7e, 0x11, 0x11, 0x11, 0x7e }, // A\r
+ { 0x7f, 0x49, 0x49, 0x49, 0x36 }, // B\r
+ { 0x3e, 0x41, 0x41, 0x41, 0x22 }, // C\r
+ { 0x7f, 0x41, 0x41, 0x22, 0x1c }, // D\r
+ { 0x7f, 0x49, 0x49, 0x49, 0x41 }, // E\r
+ { 0x7f, 0x09, 0x09, 0x09, 0x01 }, // F\r
+ { 0x3e, 0x41, 0x49, 0x49, 0x7a }, // G\r
+ { 0x7f, 0x08, 0x08, 0x08, 0x7f }, // H\r
+ { 0x00, 0x41, 0x7f, 0x41, 0x00 }, // I\r
+ { 0x20, 0x40, 0x41, 0x3f, 0x01 }, // J\r
+ { 0x7f, 0x08, 0x14, 0x22, 0x41 }, // K\r
+ { 0x7f, 0x40, 0x40, 0x40, 0x40 }, // L\r
+ { 0x7f, 0x02, 0x0c, 0x02, 0x7f }, // M\r
+ { 0x7f, 0x04, 0x08, 0x10, 0x7f }, // N\r
+ { 0x3e, 0x41, 0x41, 0x41, 0x3e }, // O\r
+ { 0x7f, 0x09, 0x09, 0x09, 0x06 }, // P\r
+ { 0x3e, 0x41, 0x51, 0x21, 0x5e }, // Q\r
+ { 0x7f, 0x09, 0x19, 0x29, 0x46 }, // R\r
+ { 0x46, 0x49, 0x49, 0x49, 0x31 }, // S\r
+ { 0x01, 0x01, 0x7f, 0x01, 0x01 }, // T\r
+ { 0x3f, 0x40, 0x40, 0x40, 0x3f }, // U\r
+ { 0x1f, 0x20, 0x40, 0x20, 0x1f }, // V\r
+ { 0x3f, 0x40, 0x38, 0x40, 0x3f }, // W\r
+ { 0x63, 0x14, 0x08, 0x14, 0x63 }, // X\r
+ { 0x07, 0x08, 0x70, 0x08, 0x07 }, // Y\r
+ { 0x61, 0x51, 0x49, 0x45, 0x43 }, // Z\r
+ { 0x00, 0x7f, 0x41, 0x41, 0x00 }, // [\r
+ { 0x02, 0x04, 0x08, 0x10, 0x20 }, // "\"\r
+ { 0x00, 0x41, 0x41, 0x7f, 0x00 }, // ]\r
+ { 0x04, 0x02, 0x01, 0x02, 0x04 }, // ^\r
+ { 0x40, 0x40, 0x40, 0x40, 0x40 }, // _\r
+ { 0x00, 0x01, 0x02, 0x04, 0x00 }, // `\r
+ { 0x20, 0x54, 0x54, 0x54, 0x78 }, // a\r
+ { 0x7f, 0x48, 0x44, 0x44, 0x38 }, // b\r
+ { 0x38, 0x44, 0x44, 0x44, 0x20 }, // c\r
+ { 0x38, 0x44, 0x44, 0x48, 0x7f }, // d\r
+ { 0x38, 0x54, 0x54, 0x54, 0x18 }, // e\r
+ { 0x08, 0x7e, 0x09, 0x01, 0x02 }, // f\r
+ { 0x0c, 0x52, 0x52, 0x52, 0x3e }, // g\r
+ { 0x7f, 0x08, 0x04, 0x04, 0x78 }, // h\r
+ { 0x00, 0x44, 0x7d, 0x40, 0x00 }, // i\r
+ { 0x20, 0x40, 0x44, 0x3d, 0x00 }, // j\r
+ { 0x7f, 0x10, 0x28, 0x44, 0x00 }, // k\r
+ { 0x00, 0x41, 0x7f, 0x40, 0x00 }, // l\r
+ { 0x7c, 0x04, 0x18, 0x04, 0x78 }, // m\r
+ { 0x7c, 0x08, 0x04, 0x04, 0x78 }, // n\r
+ { 0x38, 0x44, 0x44, 0x44, 0x38 }, // o\r
+ { 0x7c, 0x14, 0x14, 0x14, 0x08 }, // p\r
+ { 0x08, 0x14, 0x14, 0x18, 0x7c }, // q\r
+ { 0x7c, 0x08, 0x04, 0x04, 0x08 }, // r\r
+ { 0x48, 0x54, 0x54, 0x54, 0x20 }, // s\r
+ { 0x04, 0x3f, 0x44, 0x40, 0x20 }, // t\r
+ { 0x3c, 0x40, 0x40, 0x20, 0x7c }, // u\r
+ { 0x1c, 0x20, 0x40, 0x20, 0x1c }, // v\r
+ { 0x3c, 0x40, 0x30, 0x40, 0x3c }, // w\r
+ { 0x44, 0x28, 0x10, 0x28, 0x44 }, // x\r
+ { 0x0c, 0x50, 0x50, 0x50, 0x3c }, // y\r
+ { 0x44, 0x64, 0x54, 0x4c, 0x44 }, // z\r
+ { 0x00, 0x08, 0x36, 0x41, 0x00 }, // {\r
+ { 0x00, 0x00, 0x7f, 0x00, 0x00 }, // |\r
+ { 0x00, 0x41, 0x36, 0x08, 0x00 }, // }\r
+ { 0x02, 0x01, 0x02, 0x04, 0x02 }, // ~\r
+ { 0x02, 0x01, 0x02, 0x04, 0x02 }, // ~\r
+};\r
+\r
+//*****************************************************************************\r
+//\r
+// The sequence of commands used to initialize the SSD0303 controller. Each\r
+// command is described as follows: there is a byte specifying the number of\r
+// bytes in the command sequence, followed by that many bytes of command data.\r
+// Note: This initialization sequence is derived from OSRAM App Note AN018.\r
+//\r
+//*****************************************************************************\r
+static const unsigned char g_pucOSRAM128x64x4Init[] =\r
+{\r
+ //\r
+ // Column Address\r
+ //\r
+ 4, 0x15, 0, 63, 0xe3,\r
+\r
+ //\r
+ // Row Address\r
+ //\r
+ 4, 0x75, 0, 63, 0xe3,\r
+\r
+ //\r
+ // Contrast Control\r
+ //\r
+ 3, 0x81, 50, 0xe3,\r
+\r
+ //\r
+ // Half Current Range\r
+ //\r
+ 2, 0x85, 0xe3,\r
+\r
+ //\r
+ // Display Re-map\r
+ //\r
+ 3, 0xA0, OSRAM_INIT_REMAP, 0xe3,\r
+\r
+ //\r
+ // Display Start Line\r
+ //\r
+ 3, 0xA1, 0, 0xe3,\r
+\r
+ //\r
+ // Display Offset\r
+ //\r
+ 3, 0xA2, OSRAM_INIT_OFFSET, 0xe3,\r
+\r
+ //\r
+ // Display Mode Normal\r
+ //\r
+ 2, 0xA4, 0xe3,\r
+\r
+ //\r
+ // Multiplex Ratio\r
+ //\r
+ 3, 0xA8, 63, 0xe3,\r
+\r
+ //\r
+ // Phase Length\r
+ //\r
+ 3, 0xB1, 0x22, 0xe3,\r
+\r
+ //\r
+ // Row Period\r
+ //\r
+ 3, 0xB2, 70, 0xe3,\r
+\r
+ //\r
+ // Display Clock Divide\r
+ //\r
+ 3, 0xB3, 0xF1, 0xe3,\r
+\r
+ //\r
+ // VSL\r
+ //\r
+ 3, 0xBF, 0x0D, 0xe3,\r
+\r
+ //\r
+ // VCOMH\r
+ //\r
+ 3, 0xBE, 0x02, 0xe3,\r
+\r
+ //\r
+ // VP\r
+ //\r
+ 3, 0xBC, 0x10, 0xe3,\r
+\r
+ //\r
+ // Gamma\r
+ //\r
+ 10, 0xB8, 0x01, 0x11, 0x22, 0x32, 0x43, 0x54, 0x65, 0x76, 0xe3,\r
+\r
+ //\r
+ // Set DC-DC\r
+ 3, 0xAD, 0x03, 0xe3,\r
+\r
+ //\r
+ // Display ON/OFF\r
+ //\r
+ 2, 0xAF, 0xe3,\r
+};\r
+\r
+//*****************************************************************************\r
+//\r
+//! \internal\r
+//!\r
+//! Write a sequence of command bytes to the SSD0323 controller.\r
+//!\r
+//! The data is written in a polled fashion; this function will not return\r
+//! until the entire byte sequence has been written to the controller.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+static void\r
+OSRAMWriteCommand(const unsigned char *pucBuffer, unsigned long ulCount)\r
+{\r
+ unsigned long ulTemp;\r
+\r
+ //\r
+ // Return iff SSI port is not enabled for OSRAM.\r
+ //\r
+ if(!g_bSSIEnabled)\r
+ {\r
+ return;\r
+ }\r
+\r
+ //\r
+ // Clear the command/control bit to enable command mode.\r
+ //\r
+ GPIOPinWrite(GPIO_PORTC_BASE, GPIO_PIN_7, 0);\r
+\r
+ //\r
+ // Loop while there are more bytes left to be transferred.\r
+ //\r
+ while(ulCount != 0)\r
+ {\r
+ //\r
+ // Write the next byte to the controller.\r
+ //\r
+ SSIDataPut(SSI0_BASE, *pucBuffer++);\r
+\r
+ //\r
+ // Dummy read to drain the fifo and time the GPIO signal.\r
+ //\r
+ SSIDataGet(SSI0_BASE, &ulTemp);\r
+\r
+ //\r
+ // Decrement the BYTE counter.\r
+ //\r
+ ulCount--;\r
+ }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! \internal\r
+//!\r
+//! Write a sequence of data bytes to the SSD0323 controller.\r
+//!\r
+//! The data is written in a polled fashion; this function will not return\r
+//! until the entire byte sequence has been written to the controller.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+static void\r
+OSRAMWriteData(const unsigned char *pucBuffer, unsigned long ulCount)\r
+{\r
+ unsigned long ulTemp;\r
+\r
+ //\r
+ // Return iff SSI port is not enabled for OSRAM.\r
+ //\r
+ if(!g_bSSIEnabled)\r
+ {\r
+ return;\r
+ }\r
+\r
+ //\r
+ // Set the command/control bit to enable data mode.\r
+ //\r
+ GPIOPinWrite(GPIO_PORTC_BASE, GPIO_PIN_7, GPIO_PIN_7);\r
+\r
+ //\r
+ // Loop while there are more bytes left to be transferred.\r
+ //\r
+ while(ulCount != 0)\r
+ {\r
+ //\r
+ // Write the next byte to the controller.\r
+ //\r
+ SSIDataPut(SSI0_BASE, *pucBuffer++);\r
+\r
+ //\r
+ // Dummy read to drain the fifo and time the GPIO signal.\r
+ //\r
+ SSIDataGet(SSI0_BASE, &ulTemp);\r
+\r
+ //\r
+ // Decrement the BYTE counter.\r
+ //\r
+ ulCount--;\r
+ }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Clears the OLED display.\r
+//!\r
+//! This function will clear the display RAM. All pixels in the display will\r
+//! be turned off.\r
+//!\r
+//! This function is contained in <tt>osram128x64x4.c</tt>, with\r
+//! <tt>osram128x64x4.h</tt> containing the API definition for use by\r
+//! applications.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+OSRAM128x64x4Clear(void)\r
+{\r
+ static const unsigned char pucCommand1[] = { 0x15, 0, 63 };\r
+ static const unsigned char pucCommand2[] = { 0x75, 0, 79 };\r
+ unsigned long ulRow, ulColumn;\r
+ static unsigned char pucZeroBuffer[8] = { 0, 0, 0, 0, 0, 0, 0, 0};\r
+\r
+ //\r
+ // Set the window to fill the entire display.\r
+ //\r
+ OSRAMWriteCommand(pucCommand1, sizeof(pucCommand1));\r
+ OSRAMWriteCommand(pucCommand2, sizeof(pucCommand2));\r
+ OSRAMWriteCommand(g_pucOSRAM128x64x4VerticalInc,\r
+ sizeof(g_pucOSRAM128x64x4VerticalInc));\r
+\r
+ //\r
+ // In vertical address increment mode, loop through each column, filling\r
+ // each row with 0.\r
+ //\r
+ for(ulColumn = 0; ulColumn < (128/2); ulColumn++)\r
+ {\r
+ //\r
+ // 8 rows (bytes) per row of text.\r
+ //\r
+ for(ulRow = 0; ulRow < 80; ulRow += 8)\r
+ {\r
+ OSRAMWriteData(pucZeroBuffer, sizeof(pucZeroBuffer));\r
+ }\r
+ }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Displays a string on the OLED display.\r
+//!\r
+//! \param pcStr is a pointer to the string to display.\r
+//! \param ulX is the horizontal position to display the string, specified in\r
+//! columns from the left edge of the display.\r
+//! \param ulY is the vertical position to display the string, specified in\r
+//! rows from the top edge of the display.\r
+//! \param ucLevel is the 4-bit grey scale value to be used for displayed text.\r
+//!\r
+//! This function will draw a string on the display. Only the ASCII characters\r
+//! between 32 (space) and 126 (tilde) are supported; other characters will\r
+//! result in random data being draw on the display (based on whatever appears\r
+//! before/after the font in memory). The font is mono-spaced, so characters\r
+//! such as "i" and "l" have more white space around them than characters such\r
+//! as "m" or "w".\r
+//!\r
+//! If the drawing of the string reaches the right edge of the display, no more\r
+//! characters will be drawn. Therefore, special care is not required to avoid\r
+//! supplying a string that is "too long" to display.\r
+//!\r
+//! This function is contained in <tt>osram128x64x4.c</tt>, with\r
+//! <tt>osram128x64x4.h</tt> containing the API definition for use by\r
+//! applications.\r
+//!\r
+//! \note Because the OLED display packs 2 pixels of data in a single byte, the\r
+//! parameter \e ulX must be an even column number (e.g. 0, 2, 4, etc).\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+OSRAM128x64x4StringDraw(const char *pcStr, unsigned long ulX,\r
+ unsigned long ulY, unsigned char ucLevel)\r
+{\r
+ static unsigned char pucBuffer[8];\r
+ unsigned long ulIdx1, ulIdx2;\r
+ unsigned char ucTemp;\r
+\r
+ //\r
+ // Check the arguments.\r
+ //\r
+ ASSERT(ulX < 128);\r
+ ASSERT((ulX & 1) == 0);\r
+ ASSERT(ulY < 64);\r
+ ASSERT(ucLevel < 16);\r
+\r
+ //\r
+ // Setup a window starting at the specified column and row, ending\r
+ // at the right edge of the display and 8 rows down (single character row).\r
+ //\r
+ pucBuffer[0] = 0x15;\r
+ pucBuffer[1] = ulX / 2;\r
+ pucBuffer[2] = 63;\r
+ OSRAMWriteCommand(pucBuffer, 3);\r
+ pucBuffer[0] = 0x75;\r
+ pucBuffer[1] = ulY;\r
+ pucBuffer[2] = ulY + 7;\r
+ OSRAMWriteCommand(pucBuffer, 3);\r
+ OSRAMWriteCommand(g_pucOSRAM128x64x4VerticalInc,\r
+ sizeof(g_pucOSRAM128x64x4VerticalInc));\r
+\r
+ //\r
+ // Loop while there are more characters in the string.\r
+ //\r
+ while(*pcStr != 0)\r
+ {\r
+ //\r
+ // Get a working copy of the current character and convert to an\r
+ // index into the character bit-map array.\r
+ //\r
+ ucTemp = *pcStr;\r
+ ucTemp &= 0x7F;\r
+ if(ucTemp < ' ')\r
+ {\r
+ ucTemp = ' ';\r
+ }\r
+ else\r
+ {\r
+ ucTemp -= ' ';\r
+ }\r
+\r
+ //\r
+ // Build and display the character buffer.\r
+ //\r
+ for(ulIdx1 = 0; ulIdx1 < 3; ulIdx1++)\r
+ {\r
+ //\r
+ // Convert two columns of 1-bit font data into a single data\r
+ // byte column of 4-bit font data.\r
+ //\r
+ for(ulIdx2 = 0; ulIdx2 < 8; ulIdx2++)\r
+ {\r
+ pucBuffer[ulIdx2] = 0;\r
+ if(g_pucFont[ucTemp][ulIdx1*2] & (1 << ulIdx2))\r
+ {\r
+ pucBuffer[ulIdx2] = ((ucLevel << 4) & 0xf0);\r
+ }\r
+ if((ulIdx1 < 2) &&\r
+ (g_pucFont[ucTemp][ulIdx1*2+1] & (1 << ulIdx2)))\r
+ {\r
+ pucBuffer[ulIdx2] |= ((ucLevel << 0) & 0x0f);\r
+ }\r
+ }\r
+\r
+ //\r
+ // If there is room, dump the single data byte column to the\r
+ // display. Otherwise, bail out.\r
+ //\r
+ if(ulX < 126)\r
+ {\r
+ OSRAMWriteData(pucBuffer, 8);\r
+ ulX += 2;\r
+ }\r
+ else\r
+ {\r
+ return;\r
+ }\r
+ }\r
+\r
+ //\r
+ // Advance to the next character.\r
+ //\r
+ pcStr++;\r
+ }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Displays an image on the OLED display.\r
+//!\r
+//! \param pucImage is a pointer to the image data.\r
+//! \param ulX is the horizontal position to display this image, specified in\r
+//! columns from the left edge of the display.\r
+//! \param ulY is the vertical position to display this image, specified in\r
+//! rows from the top of the display.\r
+//! \param ulWidth is the width of the image, specified in columns.\r
+//! \param ulHeight is the height of the image, specified in rows.\r
+//!\r
+//! This function will display a bitmap graphic on the display. Because of the\r
+//! format of the display RAM, the starting column (/e ulX) and the number of\r
+//! columns (/e ulWidth) must be an integer multiple of two.\r
+//!\r
+//! The image data is organized with the first row of image data appearing left\r
+//! to right, followed immediately by the second row of image data. Each byte\r
+//! contains the data for two columns in the current row, with the leftmost\r
+//! column being contained in bits 7:4 and the rightmost column being contained\r
+//! in bits 3:0.\r
+//!\r
+//! For example, an image six columns wide and seven scan lines tall would\r
+//! be arranged as follows (showing how the twenty one bytes of the image would\r
+//! appear on the display):\r
+//!\r
+//! \verbatim\r
+//! +-------------------+-------------------+-------------------+\r
+//! | Byte 0 | Byte 1 | Byte 2 |\r
+//! +---------+---------+---------+---------+---------+---------+\r
+//! | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
+//! +---------+---------+---------+---------+---------+---------+\r
+//! | Byte 3 | Byte 4 | Byte 5 |\r
+//! +---------+---------+---------+---------+---------+---------+\r
+//! | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
+//! +---------+---------+---------+---------+---------+---------+\r
+//! | Byte 6 | Byte 7 | Byte 8 |\r
+//! +---------+---------+---------+---------+---------+---------+\r
+//! | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
+//! +---------+---------+---------+---------+---------+---------+\r
+//! | Byte 9 | Byte 10 | Byte 11 |\r
+//! +---------+---------+---------+---------+---------+---------+\r
+//! | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
+//! +---------+---------+---------+---------+---------+---------+\r
+//! | Byte 12 | Byte 13 | Byte 14 |\r
+//! +---------+---------+---------+--3------+---------+---------+\r
+//! | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
+//! +---------+---------+---------+---------+---------+---------+\r
+//! | Byte 15 | Byte 16 | Byte 17 |\r
+//! +---------+---------+---------+---------+---------+---------+\r
+//! | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
+//! +---------+---------+---------+---------+---------+---------+\r
+//! | Byte 18 | Byte 19 | Byte 20 |\r
+//! +---------+---------+---------+---------+---------+---------+\r
+//! | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
+//! +---------+---------+---------+---------+---------+---------+\r
+//! \endverbatim\r
+//!\r
+//! This function is contained in <tt>osram128x64x4.c</tt>, with\r
+//! <tt>osram128x64x4.h</tt> containing the API definition for use by`\r
+//! applications.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+OSRAM128x64x4ImageDraw(const unsigned char *pucImage, unsigned long ulX,\r
+ unsigned long ulY, unsigned long ulWidth,\r
+ unsigned long ulHeight)\r
+{\r
+ static unsigned char pucBuffer[8];\r
+\r
+ //\r
+ // Check the arguments.\r
+ //\r
+ ASSERT(ulX < 128);\r
+ ASSERT((ulX & 1) == 0);\r
+ ASSERT(ulY < 64);\r
+ ASSERT((ulX + ulWidth) <= 128);\r
+ ASSERT((ulY + ulHeight) <= 64);\r
+ ASSERT((ulWidth & 1) == 0);\r
+\r
+ //\r
+ // Setup a window starting at the specified column and row, and ending\r
+ // at the column + width and row+height.\r
+ //\r
+ pucBuffer[0] = 0x15;\r
+ pucBuffer[1] = ulX / 2;\r
+ pucBuffer[2] = (ulX + ulWidth - 2) / 2;\r
+ OSRAMWriteCommand(pucBuffer, 3);\r
+ pucBuffer[0] = 0x75;\r
+ pucBuffer[1] = ulY;\r
+ pucBuffer[2] = ulY + ulHeight - 1;\r
+ OSRAMWriteCommand(pucBuffer, 3);\r
+ OSRAMWriteCommand(g_pucOSRAM128x64x4HorizontalInc,\r
+ sizeof(g_pucOSRAM128x64x4HorizontalInc));\r
+\r
+ //\r
+ // Loop while there are more rows to display.\r
+ //\r
+ while(ulHeight--)\r
+ {\r
+ //\r
+ // Write this row of image data.\r
+ //\r
+ OSRAMWriteData(pucImage, (ulWidth / 2));\r
+\r
+ //\r
+ // Advance to the next row of the image.\r
+ //\r
+ pucImage += (ulWidth / 2);\r
+ }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Enable the SSI component of the OLED display driver.\r
+//!\r
+//! \param ulFrequency specifies the SSI Clock Frequency to be used.\r
+//!\r
+//! This function initializes the SSI interface to the OLED display.\r
+//!\r
+//! This function is contained in <tt>osram128x64x4.c</tt>, with\r
+//! <tt>osram128x64x4.h</tt> containing the API definition for use by\r
+//! applications.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+OSRAM128x64x4Enable(unsigned long ulFrequency)\r
+{\r
+ unsigned long ulTemp;\r
+\r
+ //\r
+ // Disable the SSI port.\r
+ //\r
+ SSIDisable(SSI0_BASE);\r
+\r
+ //\r
+ // Configure the SSI0 port for master mode.\r
+ //\r
+ SSIConfig(SSI0_BASE, SSI_FRF_MOTO_MODE_2, SSI_MODE_MASTER, ulFrequency, 8);\r
+\r
+ //\r
+ // (Re)Enable SSI control of the FSS pin.\r
+ //\r
+ GPIOPinTypeSSI(GPIO_PORTA_BASE, GPIO_PIN_3);\r
+ GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_STRENGTH_8MA,\r
+ GPIO_PIN_TYPE_STD_WPU);\r
+\r
+ //\r
+ // Enable the SSI port.\r
+ //\r
+ SSIEnable(SSI0_BASE);\r
+\r
+ //\r
+ // Drain the receive fifo.\r
+ //\r
+ while(SSIDataNonBlockingGet(SSI0_BASE, &ulTemp) != 0)\r
+ {\r
+ }\r
+\r
+ //\r
+ // Indicate that the OSRAM driver can use the SSI Port.\r
+ //\r
+ g_bSSIEnabled = true;\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Enable the SSI component of the OLED display driver.\r
+//!\r
+//! \param ulFrequency specifies the SSI Clock Frequency to be used.\r
+//!\r
+//! This function initializes the SSI interface to the OLED display.\r
+//!\r
+//! This function is contained in <tt>osram128x64x4.c</tt>, with\r
+//! <tt>osram128x64x4.h</tt> containing the API definition for use by\r
+//! applications.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+OSRAM128x64x4Disable(void)\r
+{\r
+ unsigned long ulTemp;\r
+\r
+ //\r
+ // Indicate that the OSRAM driver can no longer use the SSI Port.\r
+ //\r
+ g_bSSIEnabled = false;\r
+\r
+ //\r
+ // Drain the receive fifo.\r
+ //\r
+ while(SSIDataNonBlockingGet(SSI0_BASE, &ulTemp) != 0)\r
+ {\r
+ }\r
+\r
+ //\r
+ // Disable the SSI port.\r
+ //\r
+ SSIDisable(SSI0_BASE);\r
+\r
+ //\r
+ // Disable SSI control of the FSS pin.\r
+ //\r
+ GPIODirModeSet(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_DIR_MODE_OUT);\r
+ GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_STRENGTH_8MA,\r
+ GPIO_PIN_TYPE_STD_WPU);\r
+ GPIOPinWrite(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_PIN_3);\r
+\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Initialize the OLED display.\r
+//!\r
+//! \param ulFrequency specifies the SSI Clock Frequency to be used.\r
+//!\r
+//! This function initializes the SSI interface to the OLED display and\r
+//! configures the SSD0323 controller on the panel.\r
+//!\r
+//! This function is contained in <tt>osram128x64x4.c</tt>, with\r
+//! <tt>osram128x64x4.h</tt> containing the API definition for use by\r
+//! applications.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+OSRAM128x64x4Init(unsigned long ulFrequency)\r
+{\r
+ unsigned long ulIdx;\r
+\r
+ //\r
+ // Enable the SSI0 and GPIO port blocks as they are needed by this driver.\r
+ //\r
+ SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI0);\r
+ SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);\r
+ SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOC);\r
+\r
+ //\r
+ // Configure the SSI0CLK and SSIOTX pins for SSI operation.\r
+ //\r
+ GPIOPinTypeSSI(GPIO_PORTA_BASE, GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_5);\r
+ GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_2, GPIO_STRENGTH_8MA,\r
+ GPIO_PIN_TYPE_STD_WPU);\r
+ GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_STRENGTH_8MA,\r
+ GPIO_PIN_TYPE_STD_WPU);\r
+ GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_5, GPIO_STRENGTH_8MA,\r
+ GPIO_PIN_TYPE_STD_WPU);\r
+\r
+ //\r
+ // Configure the PC7 pin as a D/Cn signal for OLED device.\r
+ //\r
+ GPIODirModeSet(GPIO_PORTC_BASE, GPIO_PIN_7, GPIO_DIR_MODE_OUT);\r
+ GPIOPadConfigSet(GPIO_PORTC_BASE, GPIO_PIN_7, GPIO_STRENGTH_8MA,\r
+ GPIO_PIN_TYPE_STD);\r
+ GPIOPinWrite(GPIO_PORTC_BASE, GPIO_PIN_7, GPIO_PIN_7);\r
+\r
+ //\r
+ // Configure and enable the SSI0 port for master mode.\r
+ //\r
+ OSRAM128x64x4Enable(ulFrequency);\r
+\r
+ //\r
+ // Clear the frame buffer.\r
+ //\r
+ OSRAM128x64x4Clear();\r
+\r
+ //\r
+ // Initialize the SSD0323 controller. Loop through the initialization\r
+ // sequence array, sending each command "string" to the controller.\r
+ //\r
+ for(ulIdx = 0; ulIdx < sizeof(g_pucOSRAM128x64x4Init);\r
+ ulIdx += g_pucOSRAM128x64x4Init[ulIdx] + 1)\r
+ {\r
+ //\r
+ // Send this command.\r
+ //\r
+ OSRAMWriteCommand(g_pucOSRAM128x64x4Init + ulIdx + 1,\r
+ g_pucOSRAM128x64x4Init[ulIdx] - 1);\r
+ }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Turns on the OLED display.\r
+//!\r
+//! This function will turn on the OLED display, causing it to display the\r
+//! contents of its internal frame buffer.\r
+//!\r
+//! This function is contained in <tt>osram128x64x4.c</tt>, with\r
+//! <tt>osram128x64x4.h</tt> containing the API definition for use by\r
+//! applications.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+OSRAM128x64x4DisplayOn(void)\r
+{\r
+ unsigned long ulIdx;\r
+\r
+ //\r
+ // Initialize the SSD0323 controller. Loop through the initialization\r
+ // sequence array, sending each command "string" to the controller.\r
+ //\r
+ for(ulIdx = 0; ulIdx < sizeof(g_pucOSRAM128x64x4Init);\r
+ ulIdx += g_pucOSRAM128x64x4Init[ulIdx] + 1)\r
+ {\r
+ //\r
+ // Send this command.\r
+ //\r
+ OSRAMWriteCommand(g_pucOSRAM128x64x4Init + ulIdx + 1,\r
+ g_pucOSRAM128x64x4Init[ulIdx] - 1);\r
+ }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Turns off the OLED display.\r
+//!\r
+//! This function will turn off the OLED display. This will stop the scanning\r
+//! of the panel and turn off the on-chip DC-DC converter, preventing damage to\r
+//! the panel due to burn-in (it has similar characters to a CRT in this\r
+//! respect).\r
+//!\r
+//! This function is contained in <tt>osram128x64x4.c</tt>, with\r
+//! <tt>osram128x64x4.h</tt> containing the API definition for use by\r
+//! applications.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+OSRAM128x64x4DisplayOff(void)\r
+{\r
+ static const unsigned char pucCommand1[] =\r
+ {\r
+ 0xAE, 0xAD, 0x02\r
+ };\r
+\r
+ //\r
+ // Turn off the DC-DC converter and the display.\r
+ //\r
+ OSRAMWriteCommand(pucCommand1, sizeof(pucCommand1));\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+// Close the Doxygen group.\r
+//! @}\r
+//\r
+//*****************************************************************************\r
--- /dev/null
+//*****************************************************************************\r
+//\r
+// osram128x64x4.h - Prototypes for the driver for the OSRAM 128x64x4 graphical\r
+// OLED display.\r
+//\r
+// Copyright (c) 2006-2007 Luminary Micro, Inc. All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws. All rights are reserved. Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1408 of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+#ifndef __OSRAM128X64X4_H__\r
+#define __OSRAM128X64X4_H__\r
+\r
+//*****************************************************************************\r
+//\r
+// Prototypes for the driver APIs.\r
+//\r
+//*****************************************************************************\r
+extern void OSRAM128x64x4Clear(void);\r
+extern void OSRAM128x64x4StringDraw(const char *pcStr,\r
+ unsigned long ulX,\r
+ unsigned long ulY,\r
+ unsigned char ucLevel);\r
+extern void OSRAM128x64x4ImageDraw(const unsigned char *pucImage,\r
+ unsigned long ulX,\r
+ unsigned long ulY,\r
+ unsigned long ulWidth,\r
+ unsigned long ulHeight);\r
+extern void OSRAM128x64x4Init(unsigned long ulFrequency);\r
+extern void OSRAM128x64x4Enable(unsigned long ulFrequency);\r
+extern void OSRAM128x64x4Disable(void);\r
+extern void OSRAM128x64x4DisplayOn(void);\r
+extern void OSRAM128x64x4DisplayOff(void);\r
+\r
+//*****************************************************************************\r
+//\r
+// The following macro(s) map old names for the OSRAM functions to the new\r
+// names. In new code, the new names should be used in favor of the old names.\r
+//\r
+//*****************************************************************************\r
+#ifndef DEPRECATED\r
+#define OSRAM128x64x1InitSSI OSRAM128x64x4Enable\r
+#endif\r
+\r
+#endif // __OSRAM128X64X4_H__\r
--- /dev/null
+/* Note used by this port of uIP, but required for compilation. */\r
+\r
--- /dev/null
+/* Note used by this port of uIP, but required for compilation. */\r
+\r
--- /dev/null
+//*****************************************************************************\r
+//\r
+// rit128x96x4.c - Driver for the RIT 128x96x4 graphical OLED display.\r
+//\r
+// Copyright (c) 2007 Luminary Micro, Inc. All rights reserved.\r
+// \r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws. All rights are reserved. Any use in violation\r
+// of the foregoing restrictions may subject the user to criminal sanctions\r
+// under applicable laws, as well as to civil liability for the breach of the\r
+// terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 1504-conf of the Stellaris Peripheral Driver Library.\r
+//\r
+//*****************************************************************************\r
+\r
+//*****************************************************************************\r
+//\r
+//! \addtogroup ek_lm3sLM3S8962_api\r
+//! @{\r
+//\r
+//*****************************************************************************\r
+\r
+#include "hw_ssi.h"\r
+#include "hw_memmap.h"\r
+#include "hw_sysctl.h"\r
+#include "hw_types.h"\r
+#include "debug.h"\r
+#include "gpio.h"\r
+#include "ssi.h"\r
+#include "sysctl.h"\r
+#include "rit128x96x4.h"\r
+\r
+//*****************************************************************************\r
+//\r
+// Macros that define the peripheral, port, and pin used for the OLEDDC\r
+// panel control signal.\r
+//\r
+//*****************************************************************************\r
+\r
+unsigned long ulGPIOId = 0, ulGPIOBase = 0, ulOLEDDC_PIN = 0, ulOLEDEN_PIN = 0;\r
+\r
+#define LM3S8962_SYSCTL_PERIPH_GPIO_OLEDDC SYSCTL_PERIPH_GPIOA\r
+#define LM3S8962_GPIO_OLEDDC_BASE GPIO_PORTA_BASE\r
+#define LM3S8962_GPIO_OLEDDC_PIN GPIO_PIN_6\r
+#define LM3S8962_GPIO_OLEDEN_PIN GPIO_PIN_7\r
+\r
+#define LM3S1968_SYSCTL_PERIPH_GPIO_OLEDDC SYSCTL_PERIPH_GPIOH\r
+#define LM3S1968_GPIO_OLEDDC_BASE GPIO_PORTH_BASE\r
+#define LM3S1968_GPIO_OLEDDC_PIN GPIO_PIN_2\r
+#define LM3S1968_GPIO_OLEDEN_PIN GPIO_PIN_3\r
+\r
+\r
+//*****************************************************************************\r
+//\r
+// Flag to indicate if SSI port is enabled for display usage.\r
+//\r
+//*****************************************************************************\r
+static volatile tBoolean g_bSSIEnabled = false;\r
+\r
+//*****************************************************************************\r
+//\r
+// Buffer for storing sequences of command and data for the display.\r
+//\r
+//*****************************************************************************\r
+static unsigned char g_pucBuffer[8];\r
+\r
+//*****************************************************************************\r
+//\r
+// Define the SSD1329 128x96x4 Remap Setting(s). This will be used in\r
+// several places in the code to switch between vertical and horizontal\r
+// address incrementing. Note that the controller support 128 rows while\r
+// the RIT display only uses 96.\r
+//\r
+// The Remap Command (0xA0) takes one 8-bit parameter. The parameter is\r
+// defined as follows.\r
+//\r
+// Bit 7: Reserved\r
+// Bit 6: Disable(0)/Enable(1) COM Split Odd Even\r
+// When enabled, the COM signals are split Odd on one side, even on\r
+// the other. Otherwise, they are split 0-63 on one side, 64-127 on\r
+// the other.\r
+// Bit 5: Reserved\r
+// Bit 4: Disable(0)/Enable(1) COM Remap\r
+// When Enabled, ROW 0-127 map to COM 127-0 (i.e. reverse row order)\r
+// Bit 3: Reserved\r
+// Bit 2: Horizontal(0)/Vertical(1) Address Increment\r
+// When set, data RAM address will increment along the column rather\r
+// than along the row.\r
+// Bit 1: Disable(0)/Enable(1) Nibble Remap\r
+// When enabled, the upper and lower nibbles in the DATA bus for access\r
+// to the data RAM are swapped.\r
+// Bit 0: Disable(0)/Enable(1) Column Address Remap\r
+// When enabled, DATA RAM columns 0-63 are remapped to Segment Columns\r
+// 127-0.\r
+//\r
+//*****************************************************************************\r
+#define RIT_INIT_REMAP 0x52 // app note says 0x51\r
+#define RIT_INIT_OFFSET 0x00\r
+static const unsigned char g_pucRIT128x96x4VerticalInc[] = { 0xA0, 0x56 };\r
+static const unsigned char g_pucRIT128x96x4HorizontalInc[] = { 0xA0, 0x52 };\r
+\r
+//*****************************************************************************\r
+//\r
+// A 5x7 font (in a 6x8 cell, where the sixth column is omitted from this\r
+// table) for displaying text on the OLED display. The data is organized as\r
+// bytes from the left column to the right column, with each byte containing\r
+// the top row in the LSB and the bottom row in the MSB.\r
+//\r
+// Note: This is the same font data that is used in the EK-LM3S811\r
+// osram96x16x1 driver. The single bit-per-pixel is expaned in the StringDraw\r
+// function to the appropriate four bit-per-pixel gray scale format.\r
+//\r
+//*****************************************************************************\r
+static const unsigned char g_pucFont[96][5] =\r
+{\r
+ { 0x00, 0x00, 0x00, 0x00, 0x00 }, // " "\r
+ { 0x00, 0x00, 0x4f, 0x00, 0x00 }, // !\r
+ { 0x00, 0x07, 0x00, 0x07, 0x00 }, // "\r
+ { 0x14, 0x7f, 0x14, 0x7f, 0x14 }, // #\r
+ { 0x24, 0x2a, 0x7f, 0x2a, 0x12 }, // $\r
+ { 0x23, 0x13, 0x08, 0x64, 0x62 }, // %\r
+ { 0x36, 0x49, 0x55, 0x22, 0x50 }, // &\r
+ { 0x00, 0x05, 0x03, 0x00, 0x00 }, // '\r
+ { 0x00, 0x1c, 0x22, 0x41, 0x00 }, // (\r
+ { 0x00, 0x41, 0x22, 0x1c, 0x00 }, // )\r
+ { 0x14, 0x08, 0x3e, 0x08, 0x14 }, // *\r
+ { 0x08, 0x08, 0x3e, 0x08, 0x08 }, // +\r
+ { 0x00, 0x50, 0x30, 0x00, 0x00 }, // ,\r
+ { 0x08, 0x08, 0x08, 0x08, 0x08 }, // -\r
+ { 0x00, 0x60, 0x60, 0x00, 0x00 }, // .\r
+ { 0x20, 0x10, 0x08, 0x04, 0x02 }, // /\r
+ { 0x3e, 0x51, 0x49, 0x45, 0x3e }, // 0\r
+ { 0x00, 0x42, 0x7f, 0x40, 0x00 }, // 1\r
+ { 0x42, 0x61, 0x51, 0x49, 0x46 }, // 2\r
+ { 0x21, 0x41, 0x45, 0x4b, 0x31 }, // 3\r
+ { 0x18, 0x14, 0x12, 0x7f, 0x10 }, // 4\r
+ { 0x27, 0x45, 0x45, 0x45, 0x39 }, // 5\r
+ { 0x3c, 0x4a, 0x49, 0x49, 0x30 }, // 6\r
+ { 0x01, 0x71, 0x09, 0x05, 0x03 }, // 7\r
+ { 0x36, 0x49, 0x49, 0x49, 0x36 }, // 8\r
+ { 0x06, 0x49, 0x49, 0x29, 0x1e }, // 9\r
+ { 0x00, 0x36, 0x36, 0x00, 0x00 }, // :\r
+ { 0x00, 0x56, 0x36, 0x00, 0x00 }, // ;\r
+ { 0x08, 0x14, 0x22, 0x41, 0x00 }, // <\r
+ { 0x14, 0x14, 0x14, 0x14, 0x14 }, // =\r
+ { 0x00, 0x41, 0x22, 0x14, 0x08 }, // >\r
+ { 0x02, 0x01, 0x51, 0x09, 0x06 }, // ?\r
+ { 0x32, 0x49, 0x79, 0x41, 0x3e }, // @\r
+ { 0x7e, 0x11, 0x11, 0x11, 0x7e }, // A\r
+ { 0x7f, 0x49, 0x49, 0x49, 0x36 }, // B\r
+ { 0x3e, 0x41, 0x41, 0x41, 0x22 }, // C\r
+ { 0x7f, 0x41, 0x41, 0x22, 0x1c }, // D\r
+ { 0x7f, 0x49, 0x49, 0x49, 0x41 }, // E\r
+ { 0x7f, 0x09, 0x09, 0x09, 0x01 }, // F\r
+ { 0x3e, 0x41, 0x49, 0x49, 0x7a }, // G\r
+ { 0x7f, 0x08, 0x08, 0x08, 0x7f }, // H\r
+ { 0x00, 0x41, 0x7f, 0x41, 0x00 }, // I\r
+ { 0x20, 0x40, 0x41, 0x3f, 0x01 }, // J\r
+ { 0x7f, 0x08, 0x14, 0x22, 0x41 }, // K\r
+ { 0x7f, 0x40, 0x40, 0x40, 0x40 }, // L\r
+ { 0x7f, 0x02, 0x0c, 0x02, 0x7f }, // M\r
+ { 0x7f, 0x04, 0x08, 0x10, 0x7f }, // N\r
+ { 0x3e, 0x41, 0x41, 0x41, 0x3e }, // O\r
+ { 0x7f, 0x09, 0x09, 0x09, 0x06 }, // P\r
+ { 0x3e, 0x41, 0x51, 0x21, 0x5e }, // Q\r
+ { 0x7f, 0x09, 0x19, 0x29, 0x46 }, // R\r
+ { 0x46, 0x49, 0x49, 0x49, 0x31 }, // S\r
+ { 0x01, 0x01, 0x7f, 0x01, 0x01 }, // T\r
+ { 0x3f, 0x40, 0x40, 0x40, 0x3f }, // U\r
+ { 0x1f, 0x20, 0x40, 0x20, 0x1f }, // V\r
+ { 0x3f, 0x40, 0x38, 0x40, 0x3f }, // W\r
+ { 0x63, 0x14, 0x08, 0x14, 0x63 }, // X\r
+ { 0x07, 0x08, 0x70, 0x08, 0x07 }, // Y\r
+ { 0x61, 0x51, 0x49, 0x45, 0x43 }, // Z\r
+ { 0x00, 0x7f, 0x41, 0x41, 0x00 }, // [\r
+ { 0x02, 0x04, 0x08, 0x10, 0x20 }, // "\"\r
+ { 0x00, 0x41, 0x41, 0x7f, 0x00 }, // ]\r
+ { 0x04, 0x02, 0x01, 0x02, 0x04 }, // ^\r
+ { 0x40, 0x40, 0x40, 0x40, 0x40 }, // _\r
+ { 0x00, 0x01, 0x02, 0x04, 0x00 }, // `\r
+ { 0x20, 0x54, 0x54, 0x54, 0x78 }, // a\r
+ { 0x7f, 0x48, 0x44, 0x44, 0x38 }, // b\r
+ { 0x38, 0x44, 0x44, 0x44, 0x20 }, // c\r
+ { 0x38, 0x44, 0x44, 0x48, 0x7f }, // d\r
+ { 0x38, 0x54, 0x54, 0x54, 0x18 }, // e\r
+ { 0x08, 0x7e, 0x09, 0x01, 0x02 }, // f\r
+ { 0x0c, 0x52, 0x52, 0x52, 0x3e }, // g\r
+ { 0x7f, 0x08, 0x04, 0x04, 0x78 }, // h\r
+ { 0x00, 0x44, 0x7d, 0x40, 0x00 }, // i\r
+ { 0x20, 0x40, 0x44, 0x3d, 0x00 }, // j\r
+ { 0x7f, 0x10, 0x28, 0x44, 0x00 }, // k\r
+ { 0x00, 0x41, 0x7f, 0x40, 0x00 }, // l\r
+ { 0x7c, 0x04, 0x18, 0x04, 0x78 }, // m\r
+ { 0x7c, 0x08, 0x04, 0x04, 0x78 }, // n\r
+ { 0x38, 0x44, 0x44, 0x44, 0x38 }, // o\r
+ { 0x7c, 0x14, 0x14, 0x14, 0x08 }, // p\r
+ { 0x08, 0x14, 0x14, 0x18, 0x7c }, // q\r
+ { 0x7c, 0x08, 0x04, 0x04, 0x08 }, // r\r
+ { 0x48, 0x54, 0x54, 0x54, 0x20 }, // s\r
+ { 0x04, 0x3f, 0x44, 0x40, 0x20 }, // t\r
+ { 0x3c, 0x40, 0x40, 0x20, 0x7c }, // u\r
+ { 0x1c, 0x20, 0x40, 0x20, 0x1c }, // v\r
+ { 0x3c, 0x40, 0x30, 0x40, 0x3c }, // w\r
+ { 0x44, 0x28, 0x10, 0x28, 0x44 }, // x\r
+ { 0x0c, 0x50, 0x50, 0x50, 0x3c }, // y\r
+ { 0x44, 0x64, 0x54, 0x4c, 0x44 }, // z\r
+ { 0x00, 0x08, 0x36, 0x41, 0x00 }, // {\r
+ { 0x00, 0x00, 0x7f, 0x00, 0x00 }, // |\r
+ { 0x00, 0x41, 0x36, 0x08, 0x00 }, // }\r
+ { 0x02, 0x01, 0x02, 0x04, 0x02 }, // ~\r
+ { 0x02, 0x01, 0x02, 0x04, 0x02 }, // ~\r
+};\r
+\r
+//*****************************************************************************\r
+//\r
+// The sequence of commands used to initialize the SSD1329 controller. Each\r
+// command is described as follows: there is a byte specifying the number of\r
+// bytes in the command sequence, followed by that many bytes of command data.\r
+// Note: This initialization sequence is derived from RIT App Note for\r
+// the P14201. Values used are from the RIT app note, except where noted.\r
+//\r
+//*****************************************************************************\r
+static const unsigned char g_pucRIT128x96x4Init[] =\r
+{\r
+ //\r
+ // Unlock commands\r
+ //\r
+ 3, 0xFD, 0x12, 0xe3,\r
+\r
+ //\r
+ // Display off\r
+ //\r
+ 2, 0xAE, 0xe3,\r
+\r
+ //\r
+ // Icon off\r
+ //\r
+ 3, 0x94, 0, 0xe3,\r
+\r
+ //\r
+ // Multiplex ratio\r
+ //\r
+ 3, 0xA8, 95, 0xe3,\r
+\r
+ //\r
+ // Contrast\r
+ //\r
+ 3, 0x81, 0xb7, 0xe3,\r
+\r
+ //\r
+ // Pre-charge current\r
+ //\r
+ 3, 0x82, 0x3f, 0xe3,\r
+\r
+ //\r
+ // Display Re-map\r
+ //\r
+ 3, 0xA0, RIT_INIT_REMAP, 0xe3,\r
+\r
+ //\r
+ // Display Start Line\r
+ //\r
+ 3, 0xA1, 0, 0xe3,\r
+\r
+ //\r
+ // Display Offset\r
+ //\r
+ 3, 0xA2, RIT_INIT_OFFSET, 0xe3,\r
+\r
+ //\r
+ // Display Mode Normal\r
+ //\r
+ 2, 0xA4, 0xe3,\r
+\r
+ //\r
+ // Phase Length\r
+ //\r
+ 3, 0xB1, 0x11, 0xe3,\r
+\r
+ //\r
+ // Frame frequency\r
+ //\r
+ 3, 0xB2, 0x23, 0xe3,\r
+\r
+ //\r
+ // Front Clock Divider\r
+ //\r
+ 3, 0xB3, 0xe2, 0xe3,\r
+\r
+ //\r
+ // Set gray scale table. App note uses default command:\r
+ // 2, 0xB7, 0xe3\r
+ // This gray scale attempts some gamma correction to reduce the\r
+ // the brightness of the low levels.\r
+ //\r
+ 17, 0xB8, 1, 2, 3, 4, 5, 6, 8, 10, 12, 14, 16, 19, 22, 26, 30, 0xe3,\r
+\r
+ //\r
+ // Second pre-charge period. App note uses value 0x04.\r
+ //\r
+ 3, 0xBB, 0x01, 0xe3,\r
+\r
+ //\r
+ // Pre-charge voltage\r
+ //\r
+ 3, 0xBC, 0x3f, 0xe3,\r
+\r
+ //\r
+ // Display ON\r
+ //\r
+ 2, 0xAF, 0xe3,\r
+};\r
+\r
+//*****************************************************************************\r
+//\r
+//! \internal\r
+//!\r
+//! Write a sequence of command bytes to the SSD1329 controller.\r
+//!\r
+//! The data is written in a polled fashion; this function will not return\r
+//! until the entire byte sequence has been written to the controller.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+static void\r
+RITWriteCommand(const unsigned char *pucBuffer, unsigned long ulCount)\r
+{\r
+ unsigned long ulTemp;\r
+\r
+ //\r
+ // Return if SSI port is not enabled for RIT display.\r
+ //\r
+ if(!g_bSSIEnabled)\r
+ {\r
+ return;\r
+ }\r
+\r
+ //\r
+ // Clear the command/control bit to enable command mode.\r
+ //\r
+ GPIOPinWrite(ulGPIOBase, ulOLEDDC_PIN, 0); \r
+\r
+ //\r
+ // Loop while there are more bytes left to be transferred.\r
+ //\r
+ while(ulCount != 0)\r
+ {\r
+ //\r
+ // Write the next byte to the controller.\r
+ //\r
+ SSIDataPut(SSI0_BASE, *pucBuffer++);\r
+\r
+ //\r
+ // Dummy read to drain the fifo and time the GPIO signal.\r
+ //\r
+ SSIDataGet(SSI0_BASE, &ulTemp);\r
+\r
+ //\r
+ // Decrement the BYTE counter.\r
+ //\r
+ ulCount--;\r
+ }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! \internal\r
+//!\r
+//! Write a sequence of data bytes to the SSD1329 controller.\r
+//!\r
+//! The data is written in a polled fashion; this function will not return\r
+//! until the entire byte sequence has been written to the controller.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+static void\r
+RITWriteData(const unsigned char *pucBuffer, unsigned long ulCount)\r
+{\r
+ unsigned long ulTemp;\r
+\r
+ //\r
+ // Return if SSI port is not enabled for RIT display.\r
+ //\r
+ if(!g_bSSIEnabled)\r
+ {\r
+ return;\r
+ }\r
+\r
+ //\r
+ // Set the command/control bit to enable data mode.\r
+ //\r
+ GPIOPinWrite(ulGPIOBase, ulOLEDDC_PIN, ulOLEDDC_PIN);\r
+\r
+ //\r
+ // Loop while there are more bytes left to be transferred.\r
+ //\r
+ while(ulCount != 0)\r
+ {\r
+ //\r
+ // Write the next byte to the controller.\r
+ //\r
+ SSIDataPut(SSI0_BASE, *pucBuffer++);\r
+\r
+ //\r
+ // Dummy read to drain the fifo and time the GPIO signal.\r
+ //\r
+ SSIDataGet(SSI0_BASE, &ulTemp);\r
+\r
+ //\r
+ // Decrement the BYTE counter.\r
+ //\r
+ ulCount--;\r
+ }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Clears the OLED display.\r
+//!\r
+//! This function will clear the display RAM. All pixels in the display will\r
+//! be turned off.\r
+//!\r
+//! This function is contained in <tt>rit128x96x4.c</tt>, with\r
+//! <tt>rit128x96x4.h</tt> containing the API definition for use by\r
+//! applications.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+RIT128x96x4Clear(void)\r
+{\r
+ static const unsigned char pucCommand1[] = { 0x15, 0, 63 };\r
+ static const unsigned char pucCommand2[] = { 0x75, 0, 127 };\r
+ unsigned long ulRow, ulColumn;\r
+\r
+ //\r
+ // Clear out the buffer used for sending bytes to the display.\r
+ *(unsigned long *)&g_pucBuffer[0] = 0;\r
+ *(unsigned long *)&g_pucBuffer[4] = 0;\r
+\r
+ //\r
+ // Set the window to fill the entire display.\r
+ //\r
+ RITWriteCommand(pucCommand1, sizeof(pucCommand1));\r
+ RITWriteCommand(pucCommand2, sizeof(pucCommand2));\r
+ RITWriteCommand(g_pucRIT128x96x4HorizontalInc,\r
+ sizeof(g_pucRIT128x96x4HorizontalInc));\r
+\r
+ //\r
+ // Loop through the rows\r
+ //\r
+ for(ulRow = 0; ulRow < 96; ulRow++)\r
+ {\r
+ //\r
+ // Loop through the columns. Each byte is two pixels,\r
+ // and the buffer hold 8 bytes, so 16 pixels are cleared\r
+ // at a time.\r
+ //\r
+ for(ulColumn = 0; ulColumn < 128; ulColumn += 8 * 2)\r
+ {\r
+ //\r
+ // Write 8 clearing bytes to the display, which will\r
+ // clear 16 pixels across.\r
+ //\r
+ RITWriteData(g_pucBuffer, sizeof(g_pucBuffer));\r
+ }\r
+ }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Displays a string on the OLED display.\r
+//!\r
+//! \param pcStr is a pointer to the string to display.\r
+//! \param ulX is the horizontal position to display the string, specified in\r
+//! columns from the left edge of the display.\r
+//! \param ulY is the vertical position to display the string, specified in\r
+//! rows from the top edge of the display.\r
+//! \param ucLevel is the 4-bit grey scale value to be used for displayed text.\r
+//!\r
+//! This function will draw a string on the display. Only the ASCII characters\r
+//! between 32 (space) and 126 (tilde) are supported; other characters will\r
+//! result in random data being draw on the display (based on whatever appears\r
+//! before/after the font in memory). The font is mono-spaced, so characters\r
+//! such as "i" and "l" have more white space around them than characters such\r
+//! as "m" or "w".\r
+//!\r
+//! If the drawing of the string reaches the right edge of the display, no more\r
+//! characters will be drawn. Therefore, special care is not required to avoid\r
+//! supplying a string that is "too long" to display.\r
+//!\r
+//! This function is contained in <tt>rit128x96x4.c</tt>, with\r
+//! <tt>rit128x96x4.h</tt> containing the API definition for use by\r
+//! applications.\r
+//!\r
+//! \note Because the OLED display packs 2 pixels of data in a single byte, the\r
+//! parameter \e ulX must be an even column number (e.g. 0, 2, 4, etc).\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+RIT128x96x4StringDraw(const char *pcStr, unsigned long ulX,\r
+ unsigned long ulY, unsigned char ucLevel)\r
+{\r
+ unsigned long ulIdx1, ulIdx2;\r
+ unsigned char ucTemp;\r
+\r
+ //\r
+ // Check the arguments.\r
+ //\r
+ ASSERT(ulX < 128);\r
+ ASSERT((ulX & 1) == 0);\r
+ ASSERT(ulY < 96);\r
+ ASSERT(ucLevel < 16);\r
+\r
+ //\r
+ // Setup a window starting at the specified column and row, ending\r
+ // at the right edge of the display and 8 rows down (single character row).\r
+ //\r
+ g_pucBuffer[0] = 0x15;\r
+ g_pucBuffer[1] = ulX / 2;\r
+ g_pucBuffer[2] = 63;\r
+ RITWriteCommand(g_pucBuffer, 3);\r
+ g_pucBuffer[0] = 0x75;\r
+ g_pucBuffer[1] = ulY;\r
+ g_pucBuffer[2] = ulY + 7;\r
+ RITWriteCommand(g_pucBuffer, 3);\r
+ RITWriteCommand(g_pucRIT128x96x4VerticalInc,\r
+ sizeof(g_pucRIT128x96x4VerticalInc));\r
+\r
+ //\r
+ // Loop while there are more characters in the string.\r
+ //\r
+ while(*pcStr != 0)\r
+ {\r
+ //\r
+ // Get a working copy of the current character and convert to an\r
+ // index into the character bit-map array.\r
+ //\r
+ ucTemp = *pcStr;\r
+ ucTemp &= 0x7F;\r
+ if(ucTemp < ' ')\r
+ {\r
+ ucTemp = ' ';\r
+ }\r
+ else\r
+ {\r
+ ucTemp -= ' ';\r
+ }\r
+\r
+ //\r
+ // Build and display the character buffer.\r
+ //\r
+ for(ulIdx1 = 0; ulIdx1 < 3; ulIdx1++)\r
+ {\r
+ //\r
+ // Convert two columns of 1-bit font data into a single data\r
+ // byte column of 4-bit font data.\r
+ //\r
+ for(ulIdx2 = 0; ulIdx2 < 8; ulIdx2++)\r
+ {\r
+ g_pucBuffer[ulIdx2] = 0;\r
+ if(g_pucFont[ucTemp][ulIdx1*2] & (1 << ulIdx2))\r
+ {\r
+ g_pucBuffer[ulIdx2] = ((ucLevel << 4) & 0xf0);\r
+ }\r
+ if((ulIdx1 < 2) &&\r
+ (g_pucFont[ucTemp][ulIdx1*2+1] & (1 << ulIdx2)))\r
+ {\r
+ g_pucBuffer[ulIdx2] |= ((ucLevel << 0) & 0x0f);\r
+ }\r
+ }\r
+\r
+ //\r
+ // If there is room, dump the single data byte column to the\r
+ // display. Otherwise, bail out.\r
+ //\r
+ if(ulX < 126)\r
+ {\r
+ RITWriteData(g_pucBuffer, 8);\r
+ ulX += 2;\r
+ }\r
+ else\r
+ {\r
+ return;\r
+ }\r
+ }\r
+\r
+ //\r
+ // Advance to the next character.\r
+ //\r
+ pcStr++;\r
+ }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Displays an image on the OLED display.\r
+//!\r
+//! \param pucImage is a pointer to the image data.\r
+//! \param ulX is the horizontal position to display this image, specified in\r
+//! columns from the left edge of the display.\r
+//! \param ulY is the vertical position to display this image, specified in\r
+//! rows from the top of the display.\r
+//! \param ulWidth is the width of the image, specified in columns.\r
+//! \param ulHeight is the height of the image, specified in rows.\r
+//!\r
+//! This function will display a bitmap graphic on the display. Because of the\r
+//! format of the display RAM, the starting column (\e ulX) and the number of\r
+//! columns (\e ulWidth) must be an integer multiple of two.\r
+//!\r
+//! The image data is organized with the first row of image data appearing left\r
+//! to right, followed immediately by the second row of image data. Each byte\r
+//! contains the data for two columns in the current row, with the leftmost\r
+//! column being contained in bits 7:4 and the rightmost column being contained\r
+//! in bits 3:0.\r
+//!\r
+//! For example, an image six columns wide and seven scan lines tall would\r
+//! be arranged as follows (showing how the twenty one bytes of the image would\r
+//! appear on the display):\r
+//!\r
+//! \verbatim\r
+//! +-------------------+-------------------+-------------------+\r
+//! | Byte 0 | Byte 1 | Byte 2 |\r
+//! +---------+---------+---------+---------+---------+---------+\r
+//! | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
+//! +---------+---------+---------+---------+---------+---------+\r
+//! | Byte 3 | Byte 4 | Byte 5 |\r
+//! +---------+---------+---------+---------+---------+---------+\r
+//! | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
+//! +---------+---------+---------+---------+---------+---------+\r
+//! | Byte 6 | Byte 7 | Byte 8 |\r
+//! +---------+---------+---------+---------+---------+---------+\r
+//! | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
+//! +---------+---------+---------+---------+---------+---------+\r
+//! | Byte 9 | Byte 10 | Byte 11 |\r
+//! +---------+---------+---------+---------+---------+---------+\r
+//! | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
+//! +---------+---------+---------+---------+---------+---------+\r
+//! | Byte 12 | Byte 13 | Byte 14 |\r
+//! +---------+---------+---------+---------+---------+---------+\r
+//! | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
+//! +---------+---------+---------+---------+---------+---------+\r
+//! | Byte 15 | Byte 16 | Byte 17 |\r
+//! +---------+---------+---------+---------+---------+---------+\r
+//! | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
+//! +---------+---------+---------+---------+---------+---------+\r
+//! | Byte 18 | Byte 19 | Byte 20 |\r
+//! +---------+---------+---------+---------+---------+---------+\r
+//! | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
+//! +---------+---------+---------+---------+---------+---------+\r
+//! \endverbatim\r
+//!\r
+//! This function is contained in <tt>rit128x96x4.c</tt>, with\r
+//! <tt>rit128x96x4.h</tt> containing the API definition for use by\r
+//! applications.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+RIT128x96x4ImageDraw(const unsigned char *pucImage, unsigned long ulX,\r
+ unsigned long ulY, unsigned long ulWidth,\r
+ unsigned long ulHeight)\r
+{\r
+ //\r
+ // Check the arguments.\r
+ //\r
+ ASSERT(ulX < 128);\r
+ ASSERT((ulX & 1) == 0);\r
+ ASSERT(ulY < 96);\r
+ ASSERT((ulX + ulWidth) <= 128);\r
+ ASSERT((ulY + ulHeight) <= 96);\r
+ ASSERT((ulWidth & 1) == 0);\r
+\r
+ //\r
+ // Setup a window starting at the specified column and row, and ending\r
+ // at the column + width and row+height.\r
+ //\r
+ g_pucBuffer[0] = 0x15;\r
+ g_pucBuffer[1] = ulX / 2;\r
+ g_pucBuffer[2] = (ulX + ulWidth - 2) / 2;\r
+ RITWriteCommand(g_pucBuffer, 3);\r
+ g_pucBuffer[0] = 0x75;\r
+ g_pucBuffer[1] = ulY;\r
+ g_pucBuffer[2] = ulY + ulHeight - 1;\r
+ RITWriteCommand(g_pucBuffer, 3);\r
+ RITWriteCommand(g_pucRIT128x96x4HorizontalInc,\r
+ sizeof(g_pucRIT128x96x4HorizontalInc));\r
+\r
+ //\r
+ // Loop while there are more rows to display.\r
+ //\r
+ while(ulHeight--)\r
+ {\r
+ //\r
+ // Write this row of image data.\r
+ //\r
+ RITWriteData(pucImage, (ulWidth / 2));\r
+\r
+ //\r
+ // Advance to the next row of the image.\r
+ //\r
+ pucImage += (ulWidth / 2);\r
+ }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Enable the SSI component of the OLED display driver.\r
+//!\r
+//! \param ulFrequency specifies the SSI Clock Frequency to be used.\r
+//!\r
+//! This function initializes the SSI interface to the OLED display.\r
+//!\r
+//! This function is contained in <tt>rit128x96x4.c</tt>, with\r
+//! <tt>rit128x96x4.h</tt> containing the API definition for use by\r
+//! applications.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+RIT128x96x4Enable(unsigned long ulFrequency)\r
+{\r
+ unsigned long ulTemp;\r
+\r
+ //\r
+ // Disable the SSI port.\r
+ //\r
+ SSIDisable(SSI0_BASE);\r
+\r
+ //\r
+ // Configure the SSI0 port for master mode.\r
+ //\r
+ SSIConfig(SSI0_BASE, SSI_FRF_MOTO_MODE_2, SSI_MODE_MASTER, ulFrequency, 8);\r
+\r
+ //\r
+ // (Re)Enable SSI control of the FSS pin.\r
+ //\r
+ GPIOPinTypeSSI(GPIO_PORTA_BASE, GPIO_PIN_3);\r
+ GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_STRENGTH_8MA,\r
+ GPIO_PIN_TYPE_STD_WPU);\r
+\r
+ //\r
+ // Enable the SSI port.\r
+ //\r
+ SSIEnable(SSI0_BASE);\r
+\r
+ //\r
+ // Drain the receive fifo.\r
+ //\r
+ while(SSIDataNonBlockingGet(SSI0_BASE, &ulTemp) != 0)\r
+ {\r
+ }\r
+\r
+ //\r
+ // Indicate that the RIT driver can use the SSI Port.\r
+ //\r
+ g_bSSIEnabled = true;\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Enable the SSI component of the OLED display driver.\r
+//!\r
+//! This function initializes the SSI interface to the OLED display.\r
+//!\r
+//! This function is contained in <tt>rit128x96x4.c</tt>, with\r
+//! <tt>rit128x96x4.h</tt> containing the API definition for use by\r
+//! applications.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+RIT128x96x4Disable(void)\r
+{\r
+ unsigned long ulTemp;\r
+\r
+ //\r
+ // Indicate that the RIT driver can no longer use the SSI Port.\r
+ //\r
+ g_bSSIEnabled = false;\r
+\r
+ //\r
+ // Drain the receive fifo.\r
+ //\r
+ while(SSIDataNonBlockingGet(SSI0_BASE, &ulTemp) != 0)\r
+ {\r
+ }\r
+\r
+ //\r
+ // Disable the SSI port.\r
+ //\r
+ SSIDisable(SSI0_BASE);\r
+\r
+ //\r
+ // Disable SSI control of the FSS pin.\r
+ //\r
+ GPIOPinTypeGPIOOutput(GPIO_PORTA_BASE, GPIO_PIN_3);\r
+ GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_STRENGTH_8MA,\r
+ GPIO_PIN_TYPE_STD_WPU);\r
+ GPIOPinWrite(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_PIN_3);\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Initialize the OLED display.\r
+//!\r
+//! \param ulFrequency specifies the SSI Clock Frequency to be used.\r
+//!\r
+//! This function initializes the SSI interface to the OLED display and\r
+//! configures the SSD1329 controller on the panel.\r
+//!\r
+//! This function is contained in <tt>rit128x96x4.c</tt>, with\r
+//! <tt>rit128x96x4.h</tt> containing the API definition for use by\r
+//! applications.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+RIT128x96x4Init(unsigned long ulFrequency)\r
+{\r
+ unsigned long ulIdx;\r
+\r
+\r
+ /* Determine which board is being used. */\r
+ if( SysCtlPeripheralPresent( SYSCTL_PERIPH_ETH ) )\r
+ {\r
+ /* Ethernet is present, we must be using the LM3S8962 EK. */\r
+ ulGPIOId = LM3S8962_SYSCTL_PERIPH_GPIO_OLEDDC;\r
+ ulGPIOBase = LM3S8962_GPIO_OLEDDC_BASE;\r
+ ulOLEDDC_PIN = GPIO_PIN_6;\r
+ ulOLEDEN_PIN = GPIO_PIN_7;\r
+ }\r
+ else\r
+ {\r
+ /* Ethernet is not present, we must be using the LM3S1968 EK. */\r
+ ulGPIOId = LM3S1968_SYSCTL_PERIPH_GPIO_OLEDDC;\r
+ ulGPIOBase = LM3S1968_GPIO_OLEDDC_BASE;\r
+ ulOLEDDC_PIN = GPIO_PIN_2;\r
+ ulOLEDEN_PIN = GPIO_PIN_3;\r
+ }\r
+\r
+ //\r
+ // Enable the SSI0 and GPIO port blocks as they are needed by this driver.\r
+ //\r
+ SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI0);\r
+ SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);\r
+ SysCtlPeripheralEnable(ulGPIOId); \r
+\r
+ //\r
+ // Configure the SSI0CLK and SSIOTX pins for SSI operation.\r
+ //\r
+ GPIOPinTypeSSI(GPIO_PORTA_BASE, GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_5);\r
+ GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_5,\r
+ GPIO_STRENGTH_8MA, GPIO_PIN_TYPE_STD_WPU);\r
+\r
+ //\r
+ // Configure the GPIO port pin used as a D/Cn signal for OLED device,\r
+ // and the port pin used to enable power to the OLED panel.\r
+ //\r
+ GPIOPinTypeGPIOOutput(ulGPIOBase, ulOLEDDC_PIN | ulOLEDEN_PIN);\r
+ GPIOPadConfigSet(ulGPIOBase, ulOLEDDC_PIN | ulOLEDEN_PIN,\r
+ GPIO_STRENGTH_8MA, GPIO_PIN_TYPE_STD);\r
+ GPIOPinWrite(ulGPIOBase, ulOLEDDC_PIN | ulOLEDEN_PIN,\r
+ ulOLEDDC_PIN | ulOLEDEN_PIN);\r
+\r
+ //\r
+ // Configure and enable the SSI0 port for master mode.\r
+ //\r
+ RIT128x96x4Enable(ulFrequency);\r
+\r
+ //\r
+ // Clear the frame buffer.\r
+ //\r
+ RIT128x96x4Clear();\r
+\r
+ //\r
+ // Initialize the SSD1329 controller. Loop through the initialization\r
+ // sequence array, sending each command "string" to the controller.\r
+ //\r
+ for(ulIdx = 0; ulIdx < sizeof(g_pucRIT128x96x4Init);\r
+ ulIdx += g_pucRIT128x96x4Init[ulIdx] + 1)\r
+ {\r
+ //\r
+ // Send this command.\r
+ //\r
+ RITWriteCommand(g_pucRIT128x96x4Init + ulIdx + 1,\r
+ g_pucRIT128x96x4Init[ulIdx] - 1);\r
+ }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Turns on the OLED display.\r
+//!\r
+//! This function will turn on the OLED display, causing it to display the\r
+//! contents of its internal frame buffer.\r
+//!\r
+//! This function is contained in <tt>rit128x96x4.c</tt>, with\r
+//! <tt>rit128x96x4.h</tt> containing the API definition for use by\r
+//! applications.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+RIT128x96x4DisplayOn(void)\r
+{\r
+ unsigned long ulIdx;\r
+\r
+ //\r
+ // Initialize the SSD1329 controller. Loop through the initialization\r
+ // sequence array, sending each command "string" to the controller.\r
+ //\r
+ for(ulIdx = 0; ulIdx < sizeof(g_pucRIT128x96x4Init);\r
+ ulIdx += g_pucRIT128x96x4Init[ulIdx] + 1)\r
+ {\r
+ //\r
+ // Send this command.\r
+ //\r
+ RITWriteCommand(g_pucRIT128x96x4Init + ulIdx + 1,\r
+ g_pucRIT128x96x4Init[ulIdx] - 1);\r
+ }\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+//! Turns off the OLED display.\r
+//!\r
+//! This function will turn off the OLED display. This will stop the scanning\r
+//! of the panel and turn off the on-chip DC-DC converter, preventing damage to\r
+//! the panel due to burn-in (it has similar characters to a CRT in this\r
+//! respect).\r
+//!\r
+//! This function is contained in <tt>rit128x96x4.c</tt>, with\r
+//! <tt>rit128x96x4.h</tt> containing the API definition for use by\r
+//! applications.\r
+//!\r
+//! \return None.\r
+//\r
+//*****************************************************************************\r
+void\r
+RIT128x96x4DisplayOff(void)\r
+{\r
+ static const unsigned char pucCommand1[] =\r
+ {\r
+ 0xAE, 0xe3\r
+ };\r
+\r
+ //\r
+ // Put the display to sleep.\r
+ //\r
+ RITWriteCommand(pucCommand1, sizeof(pucCommand1));\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+// Close the Doxygen group.\r
+//! @}\r
+//\r
+//*****************************************************************************\r
--- /dev/null
+/*****************************************************************************\r
+ * Copyright (c) 2009 Rowley Associates Limited. *\r
+ * *\r
+ * This file may be distributed under the terms of the License Agreement *\r
+ * provided with this software. *\r
+ * *\r
+ * THIS FILE IS PROVIDED AS IS WITH NO WARRANTY OF ANY KIND, INCLUDING THE *\r
+ * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. *\r
+ *****************************************************************************/\r
+\r
+/*****************************************************************************\r
+ * Preprocessor Definitions\r
+ * ------------------------\r
+ * APP_ENTRY_POINT\r
+ *\r
+ * Defines the application entry point function, if undefined this setting\r
+ * defaults to "main".\r
+ *\r
+ * USE_PROCESS_STACK\r
+ *\r
+ * If defined, thread mode will be configured to use the process stack if\r
+ * the size of the process stack is greater than zero bytes in length.\r
+ *\r
+ * INITIALIZE_STACK\r
+ *\r
+ * If defined, the contents of the stack will be initialized to a the\r
+ * value 0xCC.\r
+ *\r
+ * FULL_LIBRARY\r
+ *\r
+ * If defined then\r
+ * - argc, argv are setup by the debug_getargs.\r
+ * - the exit symbol is defined and executes on return from main.\r
+ * - the exit symbol calls destructors, atexit functions and then debug_exit.\r
+ *\r
+ * If not defined then\r
+ * - argc and argv are zero.\r
+ * - no exit symbol, code loops on return from main.\r
+ *****************************************************************************/\r
+\r
+#ifndef APP_ENTRY_POINT\r
+#define APP_ENTRY_POINT main\r
+#endif\r
+\r
+#ifndef ARGSSPACE\r
+#define ARGSSPACE 128\r
+#endif\r
+\r
+ .global _start\r
+ .syntax unified\r
+ .extern APP_ENTRY_POINT\r
+#ifdef FULL_LIBRARY\r
+ .global exit\r
+#endif\r
+\r
+ .section .init, "ax"\r
+ .code 16\r
+ .align 2\r
+ .thumb_func\r
+\r
+_start:\r
+#ifdef __RAM_BUILD\r
+ ldr r1, =__stack_end__\r
+ mov sp, r1\r
+#endif\r
+#ifdef INITIALIZE_STACK\r
+ mov r2, #0xCC\r
+ ldr r0, =__stack_start__\r
+#ifndef __RAM_BUILD\r
+ mov r1, sp\r
+#endif\r
+ bl memory_set\r
+#endif\r
+\r
+#ifdef USE_PROCESS_STACK\r
+ /* Set up process stack if size > 0 */\r
+ ldr r1, =__stack_process_end__\r
+ ldr r0, =__stack_process_start__\r
+ subs r2, r1, r0\r
+ beq 1f\r
+ msr psp, r1\r
+ mov r2, #2\r
+ msr control, r2\r
+#ifdef INITIALIZE_STACK\r
+ mov r2, #0xCC\r
+ bl memory_set\r
+#endif\r
+1:\r
+#endif\r
+ /* Copy initialised memory sections into RAM (if necessary). */\r
+ ldr r0, =__data_load_start__\r
+ ldr r1, =__data_start__\r
+ ldr r2, =__data_end__\r
+ bl memory_copy\r
+ ldr r0, =__text_load_start__\r
+ ldr r1, =__text_start__\r
+ ldr r2, =__text_end__\r
+ bl memory_copy\r
+ ldr r0, =__fast_load_start__\r
+ ldr r1, =__fast_start__\r
+ ldr r2, =__fast_end__\r
+ bl memory_copy\r
+ ldr r0, =__ctors_load_start__\r
+ ldr r1, =__ctors_start__\r
+ ldr r2, =__ctors_end__\r
+ bl memory_copy\r
+ ldr r0, =__dtors_load_start__\r
+ ldr r1, =__dtors_start__\r
+ ldr r2, =__dtors_end__\r
+ bl memory_copy\r
+ ldr r0, =__rodata_load_start__\r
+ ldr r1, =__rodata_start__\r
+ ldr r2, =__rodata_end__\r
+ bl memory_copy\r
+\r
+ /* Zero the bss. */\r
+ ldr r0, =__bss_start__\r
+ ldr r1, =__bss_end__\r
+ mov r2, #0\r
+ bl memory_set\r
+\r
+ /* Initialise the heap */\r
+ ldr r0, = __heap_start__\r
+ ldr r1, = __heap_end__\r
+ sub r1, r1, r0\r
+ mov r2, #0\r
+ str r2, [r0]\r
+ add r0, r0, #4\r
+ str r1, [r0]\r
+\r
+ /* Call constructors */\r
+ ldr r0, =__ctors_start__\r
+ ldr r1, =__ctors_end__\r
+ctor_loop:\r
+ cmp r0, r1\r
+ beq ctor_end\r
+ ldr r2, [r0]\r
+ add r0, #4\r
+ push {r0-r1}\r
+ blx r2\r
+ pop {r0-r1}\r
+ b ctor_loop\r
+ctor_end:\r
+\r
+ /* Setup initial call frame */\r
+ mov r0, #0\r
+ mov lr, r0\r
+ mov r12, sp\r
+\r
+start:\r
+ /* Jump to application entry point */\r
+#ifdef FULL_LIBRARY\r
+ mov r0, #ARGSSPACE\r
+ ldr r1, =args\r
+ ldr r2, =debug_getargs\r
+ blx r2\r
+ ldr r1, =args\r
+#else\r
+ mov r0, #0\r
+ mov r1, #0\r
+#endif\r
+ ldr r2, =APP_ENTRY_POINT\r
+ blx r2\r
+\r
+#ifdef FULL_LIBRARY\r
+ .thumb_func\r
+exit:\r
+ mov r5, r0 // save the exit parameter/return result\r
+\r
+ /* Call destructors */\r
+ ldr r0, =__dtors_start__\r
+ ldr r1, =__dtors_end__\r
+dtor_loop:\r
+ cmp r0, r1\r
+ beq dtor_end\r
+ ldr r2, [r0]\r
+ add r0, #4\r
+ push {r0-r1}\r
+ blx r2\r
+ pop {r0-r1}\r
+ b dtor_loop\r
+dtor_end:\r
+\r
+ /* Call atexit functions */\r
+ ldr r2, =_execute_at_exit_fns\r
+ blx r2\r
+\r
+ /* Call debug_exit with return result/exit parameter */\r
+ mov r0, r5\r
+ ldr r2, =debug_exit\r
+ blx r2\r
+#endif\r
+\r
+ /* Returned from application entry point, loop forever. */\r
+exit_loop:\r
+ b exit_loop\r
+\r
+memory_copy:\r
+ cmp r0, r1\r
+ beq 2f\r
+ subs r2, r2, r1\r
+ beq 2f\r
+1:\r
+ ldrb r3, [r0]\r
+ add r0, r0, #1\r
+ strb r3, [r1]\r
+ add r1, r1, #1\r
+ subs r2, r2, #1\r
+ bne 1b\r
+2:\r
+ bx lr\r
+\r
+memory_set:\r
+ cmp r0, r1\r
+ beq 1f\r
+ strb r2, [r0]\r
+ add r0, r0, #1\r
+ b memory_set\r
+1:\r
+ bx lr\r
+\r
+#ifdef FULL_LIBRARY\r
+ .bss\r
+args:\r
+ .space ARGSSPACE\r
+#endif\r
+\r
--- /dev/null
+/*\r
+ FreeRTOS V5.4.2 - Copyright (C) 2009 Real Time Engineers Ltd.\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under \r
+ the terms of the GNU General Public License (version 2) as published by the \r
+ Free Software Foundation and modified by the FreeRTOS exception.\r
+ **NOTE** The exception to the GPL is included to allow you to distribute a\r
+ combined work that includes FreeRTOS without being obliged to provide the \r
+ source code for proprietary components outside of the FreeRTOS kernel. \r
+ Alternative commercial license and support terms are also available upon \r
+ request. See the licensing section of http://www.FreeRTOS.org for full \r
+ license details.\r
+\r
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT\r
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details.\r
+\r
+ You should have received a copy of the GNU General Public License along\r
+ with FreeRTOS; if not, write to the Free Software Foundation, Inc., 59\r
+ Temple Place, Suite 330, Boston, MA 02111-1307 USA.\r
+\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * Looking for a quick start? Then check out the FreeRTOS eBook! *\r
+ * See http://www.FreeRTOS.org/Documentation for details *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ Please ensure to read the configuration and relevant port sections of the\r
+ online documentation.\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and\r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety\r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting,\r
+ licensing and training services.\r
+*/\r
+\r
+/* High speed timer test as described in main.c. */\r
+\r
+/* Scheduler includes. */\r
+#include "FreeRTOS.h"\r
+\r
+/* Library includes. */\r
+#include "hw_ints.h"\r
+#include "hw_memmap.h"\r
+#include "hw_types.h"\r
+#include "interrupt.h"\r
+#include "sysctl.h"\r
+#include "lmi_timer.h"\r
+\r
+/* The set frequency of the interrupt. Deviations from this are measured as\r
+the jitter. */\r
+#define timerINTERRUPT_FREQUENCY ( 20000UL )\r
+\r
+/* The expected time between each of the timer interrupts - if the jitter was\r
+zero. */\r
+#define timerEXPECTED_DIFFERENCE_VALUE ( configCPU_CLOCK_HZ / timerINTERRUPT_FREQUENCY )\r
+\r
+/* The highest available interrupt priority. */\r
+#define timerHIGHEST_PRIORITY ( 0 )\r
+\r
+/* Misc defines. */\r
+#define timerMAX_32BIT_VALUE ( 0xffffffffUL )\r
+#define timerTIMER_1_COUNT_VALUE ( * ( ( unsigned long * ) ( TIMER1_BASE + 0x48 ) ) )\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Interrupt handler in which the jitter is measured. */\r
+void Timer0IntHandler( void );\r
+\r
+/* Stores the value of the maximum recorded jitter between interrupts. */\r
+volatile unsigned portLONG ulMaxJitter = 0UL;\r
+\r
+/* Counts the total number of times that the high frequency timer has 'ticked'.\r
+This value is used by the run time stats function to work out what percentage\r
+of CPU time each task is taking. */\r
+volatile unsigned portLONG ulHighFrequencyTimerTicks = 0UL;\r
+/*-----------------------------------------------------------*/\r
+\r
+void vSetupHighFrequencyTimer( void )\r
+{\r
+unsigned long ulFrequency;\r
+\r
+ /* Timer zero is used to generate the interrupts, and timer 1 is used\r
+ to measure the jitter. */\r
+ SysCtlPeripheralEnable( SYSCTL_PERIPH_TIMER0 );\r
+ SysCtlPeripheralEnable( SYSCTL_PERIPH_TIMER1 );\r
+ TimerConfigure( TIMER0_BASE, TIMER_CFG_32_BIT_PER );\r
+ TimerConfigure( TIMER1_BASE, TIMER_CFG_32_BIT_PER );\r
+\r
+ /* Set the timer interrupt to be above the kernel - highest. */\r
+ IntPrioritySet( INT_TIMER0A, timerHIGHEST_PRIORITY );\r
+\r
+ /* Just used to measure time. */\r
+ TimerLoadSet(TIMER1_BASE, TIMER_A, timerMAX_32BIT_VALUE );\r
+\r
+ /* Ensure interrupts do not start until the scheduler is running. */\r
+ portDISABLE_INTERRUPTS();\r
+\r
+ /* The rate at which the timer will interrupt. */\r
+ ulFrequency = configCPU_CLOCK_HZ / timerINTERRUPT_FREQUENCY;\r
+ TimerLoadSet( TIMER0_BASE, TIMER_A, ulFrequency );\r
+ IntEnable( INT_TIMER0A );\r
+ TimerIntEnable( TIMER0_BASE, TIMER_TIMA_TIMEOUT );\r
+\r
+ /* Enable both timers. */\r
+ TimerEnable( TIMER0_BASE, TIMER_A );\r
+ TimerEnable( TIMER1_BASE, TIMER_A );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void Timer0IntHandler( void )\r
+{\r
+unsigned portLONG ulDifference;\r
+volatile unsigned portLONG ulCurrentCount;\r
+static unsigned portLONG ulMaxDifference = 0, ulLastCount = 0;\r
+\r
+ /* We use the timer 1 counter value to measure the clock cycles between\r
+ the timer 0 interrupts. */\r
+ ulCurrentCount = timerTIMER_1_COUNT_VALUE;\r
+\r
+ TimerIntClear( TIMER0_BASE, TIMER_TIMA_TIMEOUT );\r
+\r
+ if( ulCurrentCount < ulLastCount )\r
+ {\r
+ /* How many times has timer 1 counted since the last interrupt? */\r
+ ulDifference = ulLastCount - ulCurrentCount;\r
+\r
+ /* Is this the largest difference we have measured yet? */\r
+ if( ulDifference > ulMaxDifference )\r
+ {\r
+ ulMaxDifference = ulDifference;\r
+ ulMaxJitter = ulMaxDifference - timerEXPECTED_DIFFERENCE_VALUE;\r
+ }\r
+ }\r
+\r
+ ulLastCount = ulCurrentCount;\r
+\r
+ /* Keep a count of the total number of 20KHz ticks. This is used by the\r
+ run time stats functionality to calculate how much CPU time is used by\r
+ each task. */\r
+ ulHighFrequencyTimerTicks++;\r
+}\r
+\r
+\r
+\r
+\r
+\r
--- /dev/null
+APP_SOURCES += httpd.c http-strings.c httpd-fs.c httpd-cgi.c\r
--- /dev/null
+/*\r
+ * Copyright (c) 2006, Swedish Institute of Computer Science.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions\r
+ * are met:\r
+ * 1. Redistributions of source code must retain the above copyright\r
+ * notice, this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the\r
+ * documentation and/or other materials provided with the distribution.\r
+ * 3. Neither the name of the Institute nor the names of its contributors\r
+ * may be used to endorse or promote products derived from this software\r
+ * without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND\r
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE\r
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\r
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY\r
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF\r
+ * SUCH DAMAGE.\r
+ *\r
+ * This file is part of the uIP TCP/IP stack\r
+ *\r
+ * $Id: clock-arch.h,v 1.2 2006/06/12 08:00:31 adam Exp $\r
+ */\r
+\r
+#ifndef __CLOCK_ARCH_H__\r
+#define __CLOCK_ARCH_H__\r
+\r
+#include "FreeRTOS.h"\r
+\r
+typedef unsigned long clock_time_t;\r
+#define CLOCK_CONF_SECOND configTICK_RATE_HZ\r
+\r
+#endif /* __CLOCK_ARCH_H__ */\r
--- /dev/null
+/*\r
+ FreeRTOS V5.4.2 - Copyright (C) 2009 Real Time Engineers Ltd.\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation and modified by the FreeRTOS exception.\r
+ **NOTE** The exception to the GPL is included to allow you to distribute a\r
+ combined work that includes FreeRTOS without being obliged to provide the\r
+ source code for proprietary components outside of the FreeRTOS kernel.\r
+ Alternative commercial license and support terms are also available upon\r
+ request. See the licensing section of http://www.FreeRTOS.org for full\r
+ license details.\r
+\r
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT\r
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details.\r
+\r
+ You should have received a copy of the GNU General Public License along\r
+ with FreeRTOS; if not, write to the Free Software Foundation, Inc., 59\r
+ Temple Place, Suite 330, Boston, MA 02111-1307 USA.\r
+\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * Looking for a quick start? Then check out the FreeRTOS eBook! *\r
+ * See http://www.FreeRTOS.org/Documentation for details *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ Please ensure to read the configuration and relevant port sections of the\r
+ online documentation.\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and\r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety\r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting,\r
+ licensing and training services.\r
+*/\r
+\r
+/* Kernel includes. */\r
+#include "FreeRTOS.h"\r
+#include "semphr.h"\r
+#include "task.h"\r
+\r
+/* Demo includes. */\r
+#include "emac.h"\r
+\r
+/* uIP includes. */\r
+#include "uip.h"\r
+\r
+/* Hardware library includes. */\r
+#include "hw_types.h"\r
+#include "hw_memmap.h"\r
+#include "hw_ints.h"\r
+#include "hw_ethernet.h"\r
+#include "ethernet.h"\r
+#include "interrupt.h"\r
+\r
+#define emacNUM_RX_BUFFERS 5\r
+#define emacFRAM_SIZE_BYTES 2\r
+#define macNEGOTIATE_DELAY 2000\r
+#define macWAIT_SEND_TIME ( 10 )\r
+\r
+/* The task that handles the MAC peripheral. This is created at a high\r
+priority and is effectively a deferred interrupt handler. The peripheral\r
+handling is deferred to a task to prevent the entire FIFO having to be read\r
+from within an ISR. */\r
+void vMACHandleTask( void *pvParameters );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* The semaphore used to wake the uIP task when data arrives. */\r
+xSemaphoreHandle xEMACSemaphore = NULL;\r
+\r
+/* The semaphore used to wake the interrupt handler task. The peripheral\r
+is processed at the task level to prevent the need to read the entire FIFO from\r
+within the ISR itself. */\r
+xSemaphoreHandle xMACInterruptSemaphore = NULL;\r
+\r
+/* The buffer used by the uIP stack. In this case the pointer is used to\r
+point to one of the Rx buffers. */\r
+unsigned portCHAR *uip_buf;\r
+\r
+/* Buffers into which Rx data is placed. */\r
+static unsigned portCHAR ucRxBuffers[ emacNUM_RX_BUFFERS ][ UIP_BUFSIZE + ( 4 * emacFRAM_SIZE_BYTES ) ] __attribute__((aligned(4)));\r
+\r
+/* The length of the data within each of the Rx buffers. */\r
+static unsigned portLONG ulRxLength[ emacNUM_RX_BUFFERS ];\r
+\r
+/* Used to keep a track of the number of bytes to transmit. */\r
+static unsigned portLONG ulNextTxSpace;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+portBASE_TYPE vInitEMAC( void )\r
+{\r
+unsigned long ulTemp;\r
+portBASE_TYPE xReturn;\r
+\r
+ /* Ensure all interrupts are disabled. */\r
+ EthernetIntDisable( ETH_BASE, ( ETH_INT_PHY | ETH_INT_MDIO | ETH_INT_RXER | ETH_INT_RXOF | ETH_INT_TX | ETH_INT_TXER | ETH_INT_RX));\r
+\r
+ /* Clear any interrupts that were already pending. */\r
+ ulTemp = EthernetIntStatus( ETH_BASE, pdFALSE );\r
+ EthernetIntClear( ETH_BASE, ulTemp );\r
+\r
+ /* Initialise the MAC and connect. */\r
+ EthernetInit( ETH_BASE );\r
+ EthernetConfigSet( ETH_BASE, ( ETH_CFG_TX_DPLXEN | ETH_CFG_TX_CRCEN | ETH_CFG_TX_PADEN ) );\r
+ EthernetEnable( ETH_BASE );\r
+\r
+ /* Mark each Rx buffer as empty. */\r
+ for( ulTemp = 0; ulTemp < emacNUM_RX_BUFFERS; ulTemp++ )\r
+ {\r
+ ulRxLength[ ulTemp ] = 0;\r
+ }\r
+\r
+ /* Create the queue and task used to defer the MAC processing to the\r
+ task level. */\r
+ vSemaphoreCreateBinary( xMACInterruptSemaphore );\r
+ xSemaphoreTake( xMACInterruptSemaphore, 0 );\r
+ xReturn = xTaskCreate( vMACHandleTask, ( signed portCHAR * ) "MAC", configMINIMAL_STACK_SIZE, NULL, configMAX_PRIORITIES - 1, NULL );\r
+ vTaskDelay( macNEGOTIATE_DELAY );\r
+\r
+ /* We are only interested in Rx interrupts. */\r
+ IntPrioritySet( INT_ETH, configKERNEL_INTERRUPT_PRIORITY );\r
+ IntEnable( INT_ETH );\r
+ EthernetIntEnable(ETH_BASE, ETH_INT_RX);\r
+\r
+ return xReturn;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+unsigned int uiGetEMACRxData( unsigned char *ucBuffer )\r
+{\r
+static unsigned long ulNextRxBuffer = 0;\r
+unsigned int iLen;\r
+\r
+ iLen = ulRxLength[ ulNextRxBuffer ];\r
+\r
+ if( iLen != 0 )\r
+ {\r
+ /* Leave room for the size at the start of the buffer. */\r
+ uip_buf = &( ucRxBuffers[ ulNextRxBuffer ][ 2 ] );\r
+\r
+ ulRxLength[ ulNextRxBuffer ] = 0;\r
+\r
+ ulNextRxBuffer++;\r
+ if( ulNextRxBuffer >= emacNUM_RX_BUFFERS )\r
+ {\r
+ ulNextRxBuffer = 0;\r
+ }\r
+ }\r
+\r
+ return iLen;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vInitialiseSend( void )\r
+{\r
+ /* Set the index to the first byte to send - skipping over the size\r
+ bytes. */\r
+ ulNextTxSpace = 2;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vIncrementTxLength( unsigned portLONG ulLength )\r
+{\r
+ ulNextTxSpace += ulLength;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vSendBufferToMAC( void )\r
+{\r
+unsigned long *pulSource;\r
+unsigned portSHORT * pus;\r
+unsigned portLONG ulNextWord;\r
+\r
+ /* Locate the data to be send. */\r
+ pus = ( unsigned portSHORT * ) uip_buf;\r
+\r
+ /* Add in the size of the data. */\r
+ pus--;\r
+ *pus = ulNextTxSpace;\r
+\r
+ /* Wait for data to be sent if there is no space immediately. */\r
+ while( !EthernetSpaceAvail( ETH_BASE ) )\r
+ {\r
+ vTaskDelay( macWAIT_SEND_TIME );\r
+ }\r
+\r
+ pulSource = ( unsigned portLONG * ) pus;\r
+\r
+ for( ulNextWord = 0; ulNextWord < ulNextTxSpace; ulNextWord += sizeof( unsigned portLONG ) )\r
+ {\r
+ HWREG(ETH_BASE + MAC_O_DATA) = *pulSource;\r
+ pulSource++;\r
+ }\r
+\r
+ /* Go. */\r
+ HWREG( ETH_BASE + MAC_O_TR ) = MAC_TR_NEWTX;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vEMAC_ISR( void )\r
+{\r
+portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;\r
+unsigned portLONG ulTemp;\r
+\r
+ /* Clear the interrupt. */\r
+ ulTemp = EthernetIntStatus( ETH_BASE, pdFALSE );\r
+ EthernetIntClear( ETH_BASE, ulTemp );\r
+\r
+ /* Was it an Rx interrupt? */\r
+ if( ulTemp & ETH_INT_RX )\r
+ {\r
+ xSemaphoreGiveFromISR( xMACInterruptSemaphore, &xHigherPriorityTaskWoken );\r
+ EthernetIntDisable( ETH_BASE, ETH_INT_RX );\r
+ }\r
+\r
+ /* Switch to the uIP task. */\r
+ portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vMACHandleTask( void *pvParameters )\r
+{\r
+unsigned long ulLen = 0, i;\r
+unsigned portLONG ulLength, ulInt;\r
+unsigned long *pulBuffer;\r
+static unsigned portLONG ulNextRxBuffer = 0;\r
+portBASE_TYPE xSwitchRequired = pdFALSE;\r
+\r
+ for( ;; )\r
+ {\r
+ /* Wait for something to do. */\r
+ xSemaphoreTake( xMACInterruptSemaphore, portMAX_DELAY );\r
+\r
+ while( ( ulInt = ( EthernetIntStatus( ETH_BASE, pdFALSE ) & ETH_INT_RX ) ) != 0 )\r
+ {\r
+ ulLength = HWREG( ETH_BASE + MAC_O_DATA );\r
+\r
+ /* Leave room at the start of the buffer for the size. */\r
+ pulBuffer = ( unsigned long * ) &( ucRxBuffers[ ulNextRxBuffer ][ 2 ] );\r
+ *pulBuffer = ( ulLength >> 16 );\r
+\r
+ /* Get the size of the data. */\r
+ pulBuffer = ( unsigned long * ) &( ucRxBuffers[ ulNextRxBuffer ][ 4 ] );\r
+ ulLength &= 0xFFFF;\r
+\r
+ if( ulLength > 4 )\r
+ {\r
+ ulLength -= 4;\r
+\r
+ if( ulLength >= UIP_BUFSIZE )\r
+ {\r
+ /* The data won't fit in our buffer. Ensure we don't\r
+ try to write into the buffer. */\r
+ ulLength = 0;\r
+ }\r
+\r
+ /* Read out the data into our buffer. */\r
+ for( i = 0; i < ulLength; i += sizeof( unsigned portLONG ) )\r
+ {\r
+ *pulBuffer = HWREG( ETH_BASE + MAC_O_DATA );\r
+ pulBuffer++;\r
+ }\r
+\r
+ /* Store the length of the data into the separate array. */\r
+ ulRxLength[ ulNextRxBuffer ] = ulLength;\r
+\r
+ /* Use the next buffer the next time through. */\r
+ ulNextRxBuffer++;\r
+ if( ulNextRxBuffer >= emacNUM_RX_BUFFERS )\r
+ {\r
+ ulNextRxBuffer = 0;\r
+ }\r
+\r
+ /* Ensure the uIP task is not blocked as data has arrived. */\r
+ xSemaphoreGive( xEMACSemaphore );\r
+ }\r
+ }\r
+\r
+ EthernetIntEnable( ETH_BASE, ETH_INT_RX );\r
+ }\r
+}\r
+\r
--- /dev/null
+/*----------------------------------------------------------------------------\r
+ * LPC2378 Ethernet Definitions\r
+ *----------------------------------------------------------------------------\r
+ * Name: EMAC.H\r
+ * Purpose: Philips LPC2378 EMAC hardware definitions\r
+ *----------------------------------------------------------------------------\r
+ * Copyright (c) 2006 KEIL - An ARM Company. All rights reserved.\r
+ *---------------------------------------------------------------------------*/\r
+#ifndef __EMAC_H\r
+#define __EMAC_H\r
+\r
+/* MAC address definition. The MAC address must be unique on the network. */\r
+#define emacETHADDR0 0\r
+#define emacETHADDR1 0xbd\r
+#define emacETHADDR2 0x33\r
+#define emacETHADDR3 0x02\r
+#define emacETHADDR4 0x64\r
+#define emacETHADDR5 0x24\r
+\r
+\r
+/* EMAC Memory Buffer configuration for 16K Ethernet RAM. */\r
+#define NUM_RX_FRAG 4 /* Num.of RX Fragments 4*1536= 6.0kB */\r
+#define NUM_TX_FRAG 2 /* Num.of TX Fragments 2*1536= 3.0kB */\r
+#define ETH_FRAG_SIZE 1536 /* Packet Fragment size 1536 Bytes */\r
+\r
+#define ETH_MAX_FLEN 1536 /* Max. Ethernet Frame Size */\r
+\r
+/* EMAC variables located in 16K Ethernet SRAM */\r
+#define RX_DESC_BASE 0x7FE00000\r
+#define RX_STAT_BASE (RX_DESC_BASE + NUM_RX_FRAG*8)\r
+#define TX_DESC_BASE (RX_STAT_BASE + NUM_RX_FRAG*8)\r
+#define TX_STAT_BASE (TX_DESC_BASE + NUM_TX_FRAG*8)\r
+#define RX_BUF_BASE (TX_STAT_BASE + NUM_TX_FRAG*4)\r
+#define TX_BUF_BASE (RX_BUF_BASE + NUM_RX_FRAG*ETH_FRAG_SIZE)\r
+\r
+/* RX and TX descriptor and status definitions. */\r
+#define RX_DESC_PACKET(i) (*(unsigned int *)(RX_DESC_BASE + 8*i))\r
+#define RX_DESC_CTRL(i) (*(unsigned int *)(RX_DESC_BASE+4 + 8*i))\r
+#define RX_STAT_INFO(i) (*(unsigned int *)(RX_STAT_BASE + 8*i))\r
+#define RX_STAT_HASHCRC(i) (*(unsigned int *)(RX_STAT_BASE+4 + 8*i))\r
+#define TX_DESC_PACKET(i) (*(unsigned int *)(TX_DESC_BASE + 8*i))\r
+#define TX_DESC_CTRL(i) (*(unsigned int *)(TX_DESC_BASE+4 + 8*i))\r
+#define TX_STAT_INFO(i) (*(unsigned int *)(TX_STAT_BASE + 4*i))\r
+#define RX_BUF(i) (RX_BUF_BASE + ETH_FRAG_SIZE*i)\r
+#define TX_BUF(i) (TX_BUF_BASE + ETH_FRAG_SIZE*i)\r
+\r
+/* MAC Configuration Register 1 */\r
+#define MAC1_REC_EN 0x00000001 /* Receive Enable */\r
+#define MAC1_PASS_ALL 0x00000002 /* Pass All Receive Frames */\r
+#define MAC1_RX_FLOWC 0x00000004 /* RX Flow Control */\r
+#define MAC1_TX_FLOWC 0x00000008 /* TX Flow Control */\r
+#define MAC1_LOOPB 0x00000010 /* Loop Back Mode */\r
+#define MAC1_RES_TX 0x00000100 /* Reset TX Logic */\r
+#define MAC1_RES_MCS_TX 0x00000200 /* Reset MAC TX Control Sublayer */\r
+#define MAC1_RES_RX 0x00000400 /* Reset RX Logic */\r
+#define MAC1_RES_MCS_RX 0x00000800 /* Reset MAC RX Control Sublayer */\r
+#define MAC1_SIM_RES 0x00004000 /* Simulation Reset */\r
+#define MAC1_SOFT_RES 0x00008000 /* Soft Reset MAC */\r
+\r
+/* MAC Configuration Register 2 */\r
+#define MAC2_FULL_DUP 0x00000001 /* Full Duplex Mode */\r
+#define MAC2_FRM_LEN_CHK 0x00000002 /* Frame Length Checking */\r
+#define MAC2_HUGE_FRM_EN 0x00000004 /* Huge Frame Enable */\r
+#define MAC2_DLY_CRC 0x00000008 /* Delayed CRC Mode */\r
+#define MAC2_CRC_EN 0x00000010 /* Append CRC to every Frame */\r
+#define MAC2_PAD_EN 0x00000020 /* Pad all Short Frames */\r
+#define MAC2_VLAN_PAD_EN 0x00000040 /* VLAN Pad Enable */\r
+#define MAC2_ADET_PAD_EN 0x00000080 /* Auto Detect Pad Enable */\r
+#define MAC2_PPREAM_ENF 0x00000100 /* Pure Preamble Enforcement */\r
+#define MAC2_LPREAM_ENF 0x00000200 /* Long Preamble Enforcement */\r
+#undef MAC2_NO_BACKOFF /* Remove compiler warning. */\r
+#define MAC2_NO_BACKOFF 0x00001000 /* No Backoff Algorithm */\r
+#define MAC2_BACK_PRESSURE 0x00002000 /* Backoff Presurre / No Backoff */\r
+#define MAC2_EXCESS_DEF 0x00004000 /* Excess Defer */\r
+\r
+/* Back-to-Back Inter-Packet-Gap Register */\r
+#define IPGT_FULL_DUP 0x00000015 /* Recommended value for Full Duplex */\r
+#define IPGT_HALF_DUP 0x00000012 /* Recommended value for Half Duplex */\r
+\r
+/* Non Back-to-Back Inter-Packet-Gap Register */\r
+#define IPGR_DEF 0x00000012 /* Recommended value */\r
+\r
+/* Collision Window/Retry Register */\r
+#define CLRT_DEF 0x0000370F /* Default value */\r
+\r
+/* PHY Support Register */\r
+#undef SUPP_SPEED /* Remove compiler warning. */\r
+#define SUPP_SPEED 0x00000100 /* Reduced MII Logic Current Speed */\r
+#define SUPP_RES_RMII 0x00000800 /* Reset Reduced MII Logic */\r
+\r
+/* Test Register */\r
+#define TEST_SHCUT_PQUANTA 0x00000001 /* Shortcut Pause Quanta */\r
+#define TEST_TST_PAUSE 0x00000002 /* Test Pause */\r
+#define TEST_TST_BACKP 0x00000004 /* Test Back Pressure */\r
+\r
+/* MII Management Configuration Register */\r
+#define MCFG_SCAN_INC 0x00000001 /* Scan Increment PHY Address */\r
+#define MCFG_SUPP_PREAM 0x00000002 /* Suppress Preamble */\r
+#define MCFG_CLK_SEL 0x0000001C /* Clock Select Mask */\r
+#define MCFG_RES_MII 0x00008000 /* Reset MII Management Hardware */\r
+\r
+/* MII Management Command Register */\r
+#undef MCMD_READ /* Remove compiler warning. */\r
+#define MCMD_READ 0x00000001 /* MII Read */\r
+#undef MCMD_SCAN /* Remove compiler warning. */\r
+#define MCMD_SCAN 0x00000002 /* MII Scan continuously */\r
+\r
+#define MII_WR_TOUT 0x00050000 /* MII Write timeout count */\r
+#define MII_RD_TOUT 0x00050000 /* MII Read timeout count */\r
+\r
+/* MII Management Address Register */\r
+#define MADR_REG_ADR 0x0000001F /* MII Register Address Mask */\r
+#define MADR_PHY_ADR 0x00001F00 /* PHY Address Mask */\r
+\r
+/* MII Management Indicators Register */\r
+#undef MIND_BUSY /* Remove compiler warning. */\r
+#define MIND_BUSY 0x00000001 /* MII is Busy */\r
+#define MIND_SCAN 0x00000002 /* MII Scanning in Progress */\r
+#define MIND_NOT_VAL 0x00000004 /* MII Read Data not valid */\r
+#define MIND_MII_LINK_FAIL 0x00000008 /* MII Link Failed */\r
+\r
+/* Command Register */\r
+#define CR_RX_EN 0x00000001 /* Enable Receive */\r
+#define CR_TX_EN 0x00000002 /* Enable Transmit */\r
+#define CR_REG_RES 0x00000008 /* Reset Host Registers */\r
+#define CR_TX_RES 0x00000010 /* Reset Transmit Datapath */\r
+#define CR_RX_RES 0x00000020 /* Reset Receive Datapath */\r
+#define CR_PASS_RUNT_FRM 0x00000040 /* Pass Runt Frames */\r
+#define CR_PASS_RX_FILT 0x00000080 /* Pass RX Filter */\r
+#define CR_TX_FLOW_CTRL 0x00000100 /* TX Flow Control */\r
+#define CR_RMII 0x00000200 /* Reduced MII Interface */\r
+#define CR_FULL_DUP 0x00000400 /* Full Duplex */\r
+\r
+/* Status Register */\r
+#define SR_RX_EN 0x00000001 /* Enable Receive */\r
+#define SR_TX_EN 0x00000002 /* Enable Transmit */\r
+\r
+/* Transmit Status Vector 0 Register */\r
+#define TSV0_CRC_ERR 0x00000001 /* CRC error */\r
+#define TSV0_LEN_CHKERR 0x00000002 /* Length Check Error */\r
+#define TSV0_LEN_OUTRNG 0x00000004 /* Length Out of Range */\r
+#define TSV0_DONE 0x00000008 /* Tramsmission Completed */\r
+#define TSV0_MCAST 0x00000010 /* Multicast Destination */\r
+#define TSV0_BCAST 0x00000020 /* Broadcast Destination */\r
+#define TSV0_PKT_DEFER 0x00000040 /* Packet Deferred */\r
+#define TSV0_EXC_DEFER 0x00000080 /* Excessive Packet Deferral */\r
+#define TSV0_EXC_COLL 0x00000100 /* Excessive Collision */\r
+#define TSV0_LATE_COLL 0x00000200 /* Late Collision Occured */\r
+#define TSV0_GIANT 0x00000400 /* Giant Frame */\r
+#define TSV0_UNDERRUN 0x00000800 /* Buffer Underrun */\r
+#define TSV0_BYTES 0x0FFFF000 /* Total Bytes Transferred */\r
+#define TSV0_CTRL_FRAME 0x10000000 /* Control Frame */\r
+#define TSV0_PAUSE 0x20000000 /* Pause Frame */\r
+#define TSV0_BACK_PRESS 0x40000000 /* Backpressure Method Applied */\r
+#define TSV0_VLAN 0x80000000 /* VLAN Frame */\r
+\r
+/* Transmit Status Vector 1 Register */\r
+#define TSV1_BYTE_CNT 0x0000FFFF /* Transmit Byte Count */\r
+#define TSV1_COLL_CNT 0x000F0000 /* Transmit Collision Count */\r
+\r
+/* Receive Status Vector Register */\r
+#define RSV_BYTE_CNT 0x0000FFFF /* Receive Byte Count */\r
+#define RSV_PKT_IGNORED 0x00010000 /* Packet Previously Ignored */\r
+#define RSV_RXDV_SEEN 0x00020000 /* RXDV Event Previously Seen */\r
+#define RSV_CARR_SEEN 0x00040000 /* Carrier Event Previously Seen */\r
+#define RSV_REC_CODEV 0x00080000 /* Receive Code Violation */\r
+#define RSV_CRC_ERR 0x00100000 /* CRC Error */\r
+#define RSV_LEN_CHKERR 0x00200000 /* Length Check Error */\r
+#define RSV_LEN_OUTRNG 0x00400000 /* Length Out of Range */\r
+#define RSV_REC_OK 0x00800000 /* Frame Received OK */\r
+#define RSV_MCAST 0x01000000 /* Multicast Frame */\r
+#define RSV_BCAST 0x02000000 /* Broadcast Frame */\r
+#define RSV_DRIB_NIBB 0x04000000 /* Dribble Nibble */\r
+#define RSV_CTRL_FRAME 0x08000000 /* Control Frame */\r
+#define RSV_PAUSE 0x10000000 /* Pause Frame */\r
+#define RSV_UNSUPP_OPC 0x20000000 /* Unsupported Opcode */\r
+#define RSV_VLAN 0x40000000 /* VLAN Frame */\r
+\r
+/* Flow Control Counter Register */\r
+#define FCC_MIRR_CNT 0x0000FFFF /* Mirror Counter */\r
+#define FCC_PAUSE_TIM 0xFFFF0000 /* Pause Timer */\r
+\r
+/* Flow Control Status Register */\r
+#define FCS_MIRR_CNT 0x0000FFFF /* Mirror Counter Current */\r
+\r
+/* Receive Filter Control Register */\r
+#define RFC_UCAST_EN 0x00000001 /* Accept Unicast Frames Enable */\r
+#define RFC_BCAST_EN 0x00000002 /* Accept Broadcast Frames Enable */\r
+#define RFC_MCAST_EN 0x00000004 /* Accept Multicast Frames Enable */\r
+#define RFC_UCAST_HASH_EN 0x00000008 /* Accept Unicast Hash Filter Frames */\r
+#define RFC_MCAST_HASH_EN 0x00000010 /* Accept Multicast Hash Filter Fram.*/\r
+#define RFC_PERFECT_EN 0x00000020 /* Accept Perfect Match Enable */\r
+#define RFC_MAGP_WOL_EN 0x00001000 /* Magic Packet Filter WoL Enable */\r
+#define RFC_PFILT_WOL_EN 0x00002000 /* Perfect Filter WoL Enable */\r
+\r
+/* Receive Filter WoL Status/Clear Registers */\r
+#define WOL_UCAST 0x00000001 /* Unicast Frame caused WoL */\r
+#define WOL_BCAST 0x00000002 /* Broadcast Frame caused WoL */\r
+#define WOL_MCAST 0x00000004 /* Multicast Frame caused WoL */\r
+#define WOL_UCAST_HASH 0x00000008 /* Unicast Hash Filter Frame WoL */\r
+#define WOL_MCAST_HASH 0x00000010 /* Multicast Hash Filter Frame WoL */\r
+#define WOL_PERFECT 0x00000020 /* Perfect Filter WoL */\r
+#define WOL_RX_FILTER 0x00000080 /* RX Filter caused WoL */\r
+#define WOL_MAG_PACKET 0x00000100 /* Magic Packet Filter caused WoL */\r
+\r
+/* Interrupt Status/Enable/Clear/Set Registers */\r
+#define INT_RX_OVERRUN 0x00000001 /* Overrun Error in RX Queue */\r
+#define INT_RX_ERR 0x00000002 /* Receive Error */\r
+#define INT_RX_FIN 0x00000004 /* RX Finished Process Descriptors */\r
+#define INT_RX_DONE 0x00000008 /* Receive Done */\r
+#define INT_TX_UNDERRUN 0x00000010 /* Transmit Underrun */\r
+#define INT_TX_ERR 0x00000020 /* Transmit Error */\r
+#define INT_TX_FIN 0x00000040 /* TX Finished Process Descriptors */\r
+#define INT_TX_DONE 0x00000080 /* Transmit Done */\r
+#define INT_SOFT_INT 0x00001000 /* Software Triggered Interrupt */\r
+#define INT_WAKEUP 0x00002000 /* Wakeup Event Interrupt */\r
+\r
+/* Power Down Register */\r
+#define PD_POWER_DOWN 0x80000000 /* Power Down MAC */\r
+\r
+/* RX Descriptor Control Word */\r
+#define RCTRL_SIZE 0x000007FF /* Buffer size mask */\r
+#define RCTRL_INT 0x80000000 /* Generate RxDone Interrupt */\r
+\r
+/* RX Status Hash CRC Word */\r
+#define RHASH_SA 0x000001FF /* Hash CRC for Source Address */\r
+#define RHASH_DA 0x001FF000 /* Hash CRC for Destination Address */\r
+\r
+/* RX Status Information Word */\r
+#define RINFO_SIZE 0x000007FF /* Data size in bytes */\r
+#define RINFO_CTRL_FRAME 0x00040000 /* Control Frame */\r
+#define RINFO_VLAN 0x00080000 /* VLAN Frame */\r
+#define RINFO_FAIL_FILT 0x00100000 /* RX Filter Failed */\r
+#define RINFO_MCAST 0x00200000 /* Multicast Frame */\r
+#define RINFO_BCAST 0x00400000 /* Broadcast Frame */\r
+#define RINFO_CRC_ERR 0x00800000 /* CRC Error in Frame */\r
+#define RINFO_SYM_ERR 0x01000000 /* Symbol Error from PHY */\r
+#define RINFO_LEN_ERR 0x02000000 /* Length Error */\r
+#define RINFO_RANGE_ERR 0x04000000 /* Range Error (exceeded max. size) */\r
+#define RINFO_ALIGN_ERR 0x08000000 /* Alignment Error */\r
+#define RINFO_OVERRUN 0x10000000 /* Receive overrun */\r
+#define RINFO_NO_DESCR 0x20000000 /* No new Descriptor available */\r
+#define RINFO_LAST_FLAG 0x40000000 /* Last Fragment in Frame */\r
+#define RINFO_ERR 0x80000000 /* Error Occured (OR of all errors) */\r
+\r
+#define RINFO_ERR_MASK (RINFO_FAIL_FILT | RINFO_CRC_ERR | RINFO_SYM_ERR | \\r
+ RINFO_LEN_ERR | RINFO_ALIGN_ERR | RINFO_OVERRUN)\r
+\r
+/* TX Descriptor Control Word */\r
+#define TCTRL_SIZE 0x000007FF /* Size of data buffer in bytes */\r
+#define TCTRL_OVERRIDE 0x04000000 /* Override Default MAC Registers */\r
+#define TCTRL_HUGE 0x08000000 /* Enable Huge Frame */\r
+#define TCTRL_PAD 0x10000000 /* Pad short Frames to 64 bytes */\r
+#define TCTRL_CRC 0x20000000 /* Append a hardware CRC to Frame */\r
+#define TCTRL_LAST 0x40000000 /* Last Descriptor for TX Frame */\r
+#define TCTRL_INT 0x80000000 /* Generate TxDone Interrupt */\r
+\r
+/* TX Status Information Word */\r
+#define TINFO_COL_CNT 0x01E00000 /* Collision Count */\r
+#define TINFO_DEFER 0x02000000 /* Packet Deferred (not an error) */\r
+#define TINFO_EXCESS_DEF 0x04000000 /* Excessive Deferral */\r
+#define TINFO_EXCESS_COL 0x08000000 /* Excessive Collision */\r
+#define TINFO_LATE_COL 0x10000000 /* Late Collision Occured */\r
+#define TINFO_UNDERRUN 0x20000000 /* Transmit Underrun */\r
+#define TINFO_NO_DESCR 0x40000000 /* No new Descriptor available */\r
+#define TINFO_ERR 0x80000000 /* Error Occured (OR of all errors) */\r
+\r
+/* DP83848C PHY Registers */\r
+#define PHY_REG_BMCR 0x00 /* Basic Mode Control Register */\r
+#define PHY_REG_BMSR 0x01 /* Basic Mode Status Register */\r
+#define PHY_REG_IDR1 0x02 /* PHY Identifier 1 */\r
+#define PHY_REG_IDR2 0x03 /* PHY Identifier 2 */\r
+#define PHY_REG_ANAR 0x04 /* Auto-Negotiation Advertisement */\r
+#define PHY_REG_ANLPAR 0x05 /* Auto-Neg. Link Partner Abitily */\r
+#define PHY_REG_ANER 0x06 /* Auto-Neg. Expansion Register */\r
+#define PHY_REG_ANNPTR 0x07 /* Auto-Neg. Next Page TX */\r
+\r
+/* PHY Extended Registers */\r
+#define PHY_REG_STS 0x10 /* Status Register */\r
+#define PHY_REG_MICR 0x11 /* MII Interrupt Control Register */\r
+#define PHY_REG_MISR 0x12 /* MII Interrupt Status Register */\r
+#define PHY_REG_FCSCR 0x14 /* False Carrier Sense Counter */\r
+#define PHY_REG_RECR 0x15 /* Receive Error Counter */\r
+#define PHY_REG_PCSR 0x16 /* PCS Sublayer Config. and Status */\r
+#define PHY_REG_RBR 0x17 /* RMII and Bypass Register */\r
+#define PHY_REG_LEDCR 0x18 /* LED Direct Control Register */\r
+#define PHY_REG_PHYCR 0x19 /* PHY Control Register */\r
+#define PHY_REG_10BTSCR 0x1A /* 10Base-T Status/Control Register */\r
+#define PHY_REG_CDCTRL1 0x1B /* CD Test Control and BIST Extens. */\r
+#define PHY_REG_EDCR 0x1D /* Energy Detect Control Register */\r
+\r
+#define PHY_FULLD_100M 0x2100 /* Full Duplex 100Mbit */\r
+#define PHY_HALFD_100M 0x2000 /* Half Duplex 100Mbit */\r
+#define PHY_FULLD_10M 0x0100 /* Full Duplex 10Mbit */\r
+#define PHY_HALFD_10M 0x0000 /* Half Duplex 10MBit */\r
+#define PHY_AUTO_NEG 0x3000 /* Select Auto Negotiation */\r
+\r
+#define DP83848C_DEF_ADR 0x0100 /* Default PHY device address */\r
+#define DP83848C_ID 0x20005C90 /* PHY Identifier */\r
+\r
+// prototypes\r
+portBASE_TYPE vInitEMAC(void);\r
+unsigned short ReadFrameBE_EMAC(void);\r
+void vIncrementTxLength(unsigned long ulLength);\r
+void CopyFromFrame_EMAC(void *Dest, unsigned short Size);\r
+void DummyReadFrame_EMAC(unsigned short Size);\r
+unsigned short StartReadFrame(void);\r
+void EndReadFrame(void);\r
+unsigned int CheckFrameReceived(void);\r
+void vInitialiseSend(void);\r
+unsigned int Rdy4Tx(void);\r
+void vSendBufferToMAC(void);\r
+void vEMACWaitForInput( void );\r
+unsigned int uiGetEMACRxData( unsigned char *ucBuffer );\r
+\r
+\r
+#endif\r
+\r
+/*----------------------------------------------------------------------------\r
+ * end of file\r
+ *---------------------------------------------------------------------------*/\r
+\r
--- /dev/null
+http_http "http://"\r
+http_200 "200 "\r
+http_301 "301 "\r
+http_302 "302 "\r
+http_get "GET "\r
+http_10 "HTTP/1.0"\r
+http_11 "HTTP/1.1"\r
+http_content_type "content-type: "\r
+http_texthtml "text/html"\r
+http_location "location: "\r
+http_host "host: "\r
+http_crnl "\r\n"\r
+http_index_html "/index.html"\r
+http_404_html "/404.html"\r
+http_referer "Referer:"\r
+http_header_200 "HTTP/1.0 200 OK\r\nServer: uIP/1.0 http://www.sics.se/~adam/uip/\r\nConnection: close\r\n"\r
+http_header_404 "HTTP/1.0 404 Not found\r\nServer: uIP/1.0 http://www.sics.se/~adam/uip/\r\nConnection: close\r\n"\r
+http_content_type_plain "Content-type: text/plain\r\n\r\n"\r
+http_content_type_html "Content-type: text/html\r\n\r\n"\r
+http_content_type_css "Content-type: text/css\r\n\r\n"\r
+http_content_type_text "Content-type: text/text\r\n\r\n"\r
+http_content_type_png "Content-type: image/png\r\n\r\n"\r
+http_content_type_gif "Content-type: image/gif\r\n\r\n"\r
+http_content_type_jpg "Content-type: image/jpeg\r\n\r\n"\r
+http_content_type_binary "Content-type: application/octet-stream\r\n\r\n"\r
+http_html ".html"\r
+http_shtml ".shtml"\r
+http_htm ".htm"\r
+http_css ".css"\r
+http_png ".png"\r
+http_gif ".gif"\r
+http_jpg ".jpg"\r
+http_text ".txt"\r
+http_txt ".txt"\r
+\r
--- /dev/null
+const char http_http[8] = \r
+/* "http://" */\r
+{0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, };\r
+const char http_200[5] = \r
+/* "200 " */\r
+{0x32, 0x30, 0x30, 0x20, };\r
+const char http_301[5] = \r
+/* "301 " */\r
+{0x33, 0x30, 0x31, 0x20, };\r
+const char http_302[5] = \r
+/* "302 " */\r
+{0x33, 0x30, 0x32, 0x20, };\r
+const char http_get[5] = \r
+/* "GET " */\r
+{0x47, 0x45, 0x54, 0x20, };\r
+const char http_10[9] = \r
+/* "HTTP/1.0" */\r
+{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x30, };\r
+const char http_11[9] = \r
+/* "HTTP/1.1" */\r
+{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x31, };\r
+const char http_content_type[15] = \r
+/* "content-type: " */\r
+{0x63, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, };\r
+const char http_texthtml[10] = \r
+/* "text/html" */\r
+{0x74, 0x65, 0x78, 0x74, 0x2f, 0x68, 0x74, 0x6d, 0x6c, };\r
+const char http_location[11] = \r
+/* "location: " */\r
+{0x6c, 0x6f, 0x63, 0x61, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, };\r
+const char http_host[7] = \r
+/* "host: " */\r
+{0x68, 0x6f, 0x73, 0x74, 0x3a, 0x20, };\r
+const char http_crnl[3] = \r
+/* "\r\n" */\r
+{0xd, 0xa, };\r
+const char http_index_html[12] = \r
+/* "/index.html" */\r
+{0x2f, 0x69, 0x6e, 0x64, 0x65, 0x78, 0x2e, 0x68, 0x74, 0x6d, 0x6c, };\r
+const char http_404_html[10] = \r
+/* "/404.html" */\r
+{0x2f, 0x34, 0x30, 0x34, 0x2e, 0x68, 0x74, 0x6d, 0x6c, };\r
+const char http_referer[9] = \r
+/* "Referer:" */\r
+{0x52, 0x65, 0x66, 0x65, 0x72, 0x65, 0x72, 0x3a, };\r
+const char http_header_200[84] = \r
+/* "HTTP/1.0 200 OK\r\nServer: uIP/1.0 http://www.sics.se/~adam/uip/\r\nConnection: close\r\n" */\r
+{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x32, 0x30, 0x30, 0x20, 0x4f, 0x4b, 0xd, 0xa, 0x53, 0x65, 0x72, 0x76, 0x65, 0x72, 0x3a, 0x20, 0x75, 0x49, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, 0x77, 0x77, 0x77, 0x2e, 0x73, 0x69, 0x63, 0x73, 0x2e, 0x73, 0x65, 0x2f, 0x7e, 0x61, 0x64, 0x61, 0x6d, 0x2f, 0x75, 0x69, 0x70, 0x2f, 0xd, 0xa, 0x43, 0x6f, 0x6e, 0x6e, 0x65, 0x63, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, 0x63, 0x6c, 0x6f, 0x73, 0x65, 0xd, 0xa, };\r
+const char http_header_404[91] = \r
+/* "HTTP/1.0 404 Not found\r\nServer: uIP/1.0 http://www.sics.se/~adam/uip/\r\nConnection: close\r\n" */\r
+{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x34, 0x30, 0x34, 0x20, 0x4e, 0x6f, 0x74, 0x20, 0x66, 0x6f, 0x75, 0x6e, 0x64, 0xd, 0xa, 0x53, 0x65, 0x72, 0x76, 0x65, 0x72, 0x3a, 0x20, 0x75, 0x49, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, 0x77, 0x77, 0x77, 0x2e, 0x73, 0x69, 0x63, 0x73, 0x2e, 0x73, 0x65, 0x2f, 0x7e, 0x61, 0x64, 0x61, 0x6d, 0x2f, 0x75, 0x69, 0x70, 0x2f, 0xd, 0xa, 0x43, 0x6f, 0x6e, 0x6e, 0x65, 0x63, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, 0x63, 0x6c, 0x6f, 0x73, 0x65, 0xd, 0xa, };\r
+const char http_content_type_plain[29] = \r
+/* "Content-type: text/plain\r\n\r\n" */\r
+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x70, 0x6c, 0x61, 0x69, 0x6e, 0xd, 0xa, 0xd, 0xa, };\r
+const char http_content_type_html[28] = \r
+/* "Content-type: text/html\r\n\r\n" */\r
+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x68, 0x74, 0x6d, 0x6c, 0xd, 0xa, 0xd, 0xa, };\r
+const char http_content_type_css [27] = \r
+/* "Content-type: text/css\r\n\r\n" */\r
+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x63, 0x73, 0x73, 0xd, 0xa, 0xd, 0xa, };\r
+const char http_content_type_text[28] = \r
+/* "Content-type: text/text\r\n\r\n" */\r
+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x74, 0x65, 0x78, 0x74, 0xd, 0xa, 0xd, 0xa, };\r
+const char http_content_type_png [28] = \r
+/* "Content-type: image/png\r\n\r\n" */\r
+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x70, 0x6e, 0x67, 0xd, 0xa, 0xd, 0xa, };\r
+const char http_content_type_gif [28] = \r
+/* "Content-type: image/gif\r\n\r\n" */\r
+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x67, 0x69, 0x66, 0xd, 0xa, 0xd, 0xa, };\r
+const char http_content_type_jpg [29] = \r
+/* "Content-type: image/jpeg\r\n\r\n" */\r
+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x6a, 0x70, 0x65, 0x67, 0xd, 0xa, 0xd, 0xa, };\r
+const char http_content_type_binary[43] = \r
+/* "Content-type: application/octet-stream\r\n\r\n" */\r
+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x61, 0x70, 0x70, 0x6c, 0x69, 0x63, 0x61, 0x74, 0x69, 0x6f, 0x6e, 0x2f, 0x6f, 0x63, 0x74, 0x65, 0x74, 0x2d, 0x73, 0x74, 0x72, 0x65, 0x61, 0x6d, 0xd, 0xa, 0xd, 0xa, };\r
+const char http_html[6] = \r
+/* ".html" */\r
+{0x2e, 0x68, 0x74, 0x6d, 0x6c, };\r
+const char http_shtml[7] = \r
+/* ".shtml" */\r
+{0x2e, 0x73, 0x68, 0x74, 0x6d, 0x6c, };\r
+const char http_htm[5] = \r
+/* ".htm" */\r
+{0x2e, 0x68, 0x74, 0x6d, };\r
+const char http_css[5] = \r
+/* ".css" */\r
+{0x2e, 0x63, 0x73, 0x73, };\r
+const char http_png[5] = \r
+/* ".png" */\r
+{0x2e, 0x70, 0x6e, 0x67, };\r
+const char http_gif[5] = \r
+/* ".gif" */\r
+{0x2e, 0x67, 0x69, 0x66, };\r
+const char http_jpg[5] = \r
+/* ".jpg" */\r
+{0x2e, 0x6a, 0x70, 0x67, };\r
+const char http_text[5] = \r
+/* ".txt" */\r
+{0x2e, 0x74, 0x78, 0x74, };\r
+const char http_txt[5] = \r
+/* ".txt" */\r
+{0x2e, 0x74, 0x78, 0x74, };\r
--- /dev/null
+extern const char http_http[8];\r
+extern const char http_200[5];\r
+extern const char http_301[5];\r
+extern const char http_302[5];\r
+extern const char http_get[5];\r
+extern const char http_10[9];\r
+extern const char http_11[9];\r
+extern const char http_content_type[15];\r
+extern const char http_texthtml[10];\r
+extern const char http_location[11];\r
+extern const char http_host[7];\r
+extern const char http_crnl[3];\r
+extern const char http_index_html[12];\r
+extern const char http_404_html[10];\r
+extern const char http_referer[9];\r
+extern const char http_header_200[84];\r
+extern const char http_header_404[91];\r
+extern const char http_content_type_plain[29];\r
+extern const char http_content_type_html[28];\r
+extern const char http_content_type_css [27];\r
+extern const char http_content_type_text[28];\r
+extern const char http_content_type_png [28];\r
+extern const char http_content_type_gif [28];\r
+extern const char http_content_type_jpg [29];\r
+extern const char http_content_type_binary[43];\r
+extern const char http_html[6];\r
+extern const char http_shtml[7];\r
+extern const char http_htm[5];\r
+extern const char http_css[5];\r
+extern const char http_png[5];\r
+extern const char http_gif[5];\r
+extern const char http_jpg[5];\r
+extern const char http_text[5];\r
+extern const char http_txt[5];\r
--- /dev/null
+/**\r
+ * \addtogroup httpd\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * \file\r
+ * Web server script interface\r
+ * \author\r
+ * Adam Dunkels <adam@sics.se>\r
+ *\r
+ */\r
+\r
+/*\r
+ * Copyright (c) 2001-2006, Adam Dunkels.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions\r
+ * are met:\r
+ * 1. Redistributions of source code must retain the above copyright\r
+ * notice, this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the\r
+ * documentation and/or other materials provided with the distribution.\r
+ * 3. The name of the author may not be used to endorse or promote\r
+ * products derived from this software without specific prior\r
+ * written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS\r
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\r
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY\r
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE\r
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\r
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,\r
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\r
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+ * This file is part of the uIP TCP/IP stack.\r
+ *\r
+ * $Id: httpd-cgi.c,v 1.2 2006/06/11 21:46:37 adam Exp $\r
+ *\r
+ */\r
+\r
+#include "uip.h"\r
+#include "psock.h"\r
+#include "httpd.h"\r
+#include "httpd-cgi.h"\r
+#include "httpd-fs.h"\r
+\r
+#include <stdio.h>\r
+#include <string.h>\r
+\r
+HTTPD_CGI_CALL(file, "file-stats", file_stats);\r
+HTTPD_CGI_CALL(tcp, "tcp-connections", tcp_stats);\r
+HTTPD_CGI_CALL(net, "net-stats", net_stats);\r
+HTTPD_CGI_CALL(rtos, "rtos-stats", rtos_stats );\r
+HTTPD_CGI_CALL(run, "run-time", run_time );\r
+HTTPD_CGI_CALL(io, "led-io", led_io );\r
+\r
+\r
+static const struct httpd_cgi_call *calls[] = { &file, &tcp, &net, &rtos, &run, &io, NULL };\r
+\r
+/*---------------------------------------------------------------------------*/\r
+static\r
+PT_THREAD(nullfunction(struct httpd_state *s, char *ptr))\r
+{\r
+ PSOCK_BEGIN(&s->sout);\r
+ PSOCK_END(&s->sout);\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+httpd_cgifunction\r
+httpd_cgi(char *name)\r
+{\r
+ const struct httpd_cgi_call **f;\r
+\r
+ /* Find the matching name in the table, return the function. */\r
+ for(f = calls; *f != NULL; ++f) {\r
+ if(strncmp((*f)->name, name, strlen((*f)->name)) == 0) {\r
+ return (*f)->function;\r
+ }\r
+ }\r
+ return nullfunction;\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static unsigned short\r
+generate_file_stats(void *arg)\r
+{\r
+ char *f = (char *)arg;\r
+ return snprintf((char *)uip_appdata, UIP_APPDATA_SIZE, "%5u", httpd_fs_count(f));\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static\r
+PT_THREAD(file_stats(struct httpd_state *s, char *ptr))\r
+{\r
+ PSOCK_BEGIN(&s->sout);\r
+\r
+ PSOCK_GENERATOR_SEND(&s->sout, generate_file_stats, strchr(ptr, ' ') + 1);\r
+\r
+ PSOCK_END(&s->sout);\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static const char closed[] = /* "CLOSED",*/\r
+{0x43, 0x4c, 0x4f, 0x53, 0x45, 0x44, 0};\r
+static const char syn_rcvd[] = /* "SYN-RCVD",*/\r
+{0x53, 0x59, 0x4e, 0x2d, 0x52, 0x43, 0x56,\r
+ 0x44, 0};\r
+static const char syn_sent[] = /* "SYN-SENT",*/\r
+{0x53, 0x59, 0x4e, 0x2d, 0x53, 0x45, 0x4e,\r
+ 0x54, 0};\r
+static const char established[] = /* "ESTABLISHED",*/\r
+{0x45, 0x53, 0x54, 0x41, 0x42, 0x4c, 0x49, 0x53, 0x48,\r
+ 0x45, 0x44, 0};\r
+static const char fin_wait_1[] = /* "FIN-WAIT-1",*/\r
+{0x46, 0x49, 0x4e, 0x2d, 0x57, 0x41, 0x49,\r
+ 0x54, 0x2d, 0x31, 0};\r
+static const char fin_wait_2[] = /* "FIN-WAIT-2",*/\r
+{0x46, 0x49, 0x4e, 0x2d, 0x57, 0x41, 0x49,\r
+ 0x54, 0x2d, 0x32, 0};\r
+static const char closing[] = /* "CLOSING",*/\r
+{0x43, 0x4c, 0x4f, 0x53, 0x49,\r
+ 0x4e, 0x47, 0};\r
+static const char time_wait[] = /* "TIME-WAIT,"*/\r
+{0x54, 0x49, 0x4d, 0x45, 0x2d, 0x57, 0x41,\r
+ 0x49, 0x54, 0};\r
+static const char last_ack[] = /* "LAST-ACK"*/\r
+{0x4c, 0x41, 0x53, 0x54, 0x2d, 0x41, 0x43,\r
+ 0x4b, 0};\r
+\r
+static const char *states[] = {\r
+ closed,\r
+ syn_rcvd,\r
+ syn_sent,\r
+ established,\r
+ fin_wait_1,\r
+ fin_wait_2,\r
+ closing,\r
+ time_wait,\r
+ last_ack};\r
+\r
+\r
+static unsigned short\r
+generate_tcp_stats(void *arg)\r
+{\r
+ struct uip_conn *conn;\r
+ struct httpd_state *s = (struct httpd_state *)arg;\r
+\r
+ conn = &uip_conns[s->count];\r
+ return snprintf((char *)uip_appdata, UIP_APPDATA_SIZE,\r
+ "<tr><td>%d</td><td>%u.%u.%u.%u:%u</td><td>%s</td><td>%u</td><td>%u</td><td>%c %c</td></tr>\r\n",\r
+ htons(conn->lport),\r
+ htons(conn->ripaddr[0]) >> 8,\r
+ htons(conn->ripaddr[0]) & 0xff,\r
+ htons(conn->ripaddr[1]) >> 8,\r
+ htons(conn->ripaddr[1]) & 0xff,\r
+ htons(conn->rport),\r
+ states[conn->tcpstateflags & UIP_TS_MASK],\r
+ conn->nrtx,\r
+ conn->timer,\r
+ (uip_outstanding(conn))? '*':' ',\r
+ (uip_stopped(conn))? '!':' ');\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static\r
+PT_THREAD(tcp_stats(struct httpd_state *s, char *ptr))\r
+{\r
+\r
+ PSOCK_BEGIN(&s->sout);\r
+\r
+ for(s->count = 0; s->count < UIP_CONNS; ++s->count) {\r
+ if((uip_conns[s->count].tcpstateflags & UIP_TS_MASK) != UIP_CLOSED) {\r
+ PSOCK_GENERATOR_SEND(&s->sout, generate_tcp_stats, s);\r
+ }\r
+ }\r
+\r
+ PSOCK_END(&s->sout);\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static unsigned short\r
+generate_net_stats(void *arg)\r
+{\r
+ struct httpd_state *s = (struct httpd_state *)arg;\r
+ return snprintf((char *)uip_appdata, UIP_APPDATA_SIZE,\r
+ "%5u\n", ((uip_stats_t *)&uip_stat)[s->count]);\r
+}\r
+\r
+static\r
+PT_THREAD(net_stats(struct httpd_state *s, char *ptr))\r
+{\r
+ PSOCK_BEGIN(&s->sout);\r
+\r
+#if UIP_STATISTICS\r
+\r
+ for(s->count = 0; s->count < sizeof(uip_stat) / sizeof(uip_stats_t);\r
+ ++s->count) {\r
+ PSOCK_GENERATOR_SEND(&s->sout, generate_net_stats, s);\r
+ }\r
+\r
+#endif /* UIP_STATISTICS */\r
+\r
+ PSOCK_END(&s->sout);\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+\r
+extern void vTaskList( signed char *pcWriteBuffer );\r
+static char cCountBuf[ 32 ];\r
+long lRefreshCount = 0;\r
+static unsigned short\r
+generate_rtos_stats(void *arg)\r
+{\r
+ lRefreshCount++;\r
+ sprintf( cCountBuf, "<p><br>Refresh count = %d", lRefreshCount );\r
+ vTaskList( uip_appdata );\r
+ strcat( uip_appdata, cCountBuf );\r
+\r
+ return strlen( uip_appdata );\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+\r
+\r
+static\r
+PT_THREAD(rtos_stats(struct httpd_state *s, char *ptr))\r
+{\r
+ PSOCK_BEGIN(&s->sout);\r
+ PSOCK_GENERATOR_SEND(&s->sout, generate_rtos_stats, NULL);\r
+ PSOCK_END(&s->sout);\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+\r
+char *pcStatus;\r
+extern unsigned long uxParTestGetLED( unsigned long uxLED );\r
+\r
+static unsigned short generate_io_state( void *arg )\r
+{\r
+ if( uxParTestGetLED( 0 ) )\r
+ {\r
+ pcStatus = "checked";\r
+ }\r
+ else\r
+ {\r
+ pcStatus = "";\r
+ }\r
+\r
+ sprintf( uip_appdata,\r
+ "<input type=\"checkbox\" name=\"LED0\" value=\"1\" %s>LED"\\r
+ "<p>"\\r
+ "<input type=\"text\" name=\"LCD\" value=\"Enter LCD text\" size=\"16\">",\r
+ pcStatus );\r
+\r
+ return strlen( uip_appdata );\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+\r
+extern void vTaskGetRunTimeStats( signed char *pcWriteBuffer );\r
+static unsigned short\r
+generate_runtime_stats(void *arg)\r
+{\r
+ lRefreshCount++;\r
+ sprintf( cCountBuf, "<p><br>Refresh count = %d", lRefreshCount );\r
+ vTaskGetRunTimeStats( uip_appdata );\r
+ strcat( uip_appdata, cCountBuf );\r
+\r
+ return strlen( uip_appdata );\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+\r
+\r
+static\r
+PT_THREAD(run_time(struct httpd_state *s, char *ptr))\r
+{\r
+ PSOCK_BEGIN(&s->sout);\r
+ PSOCK_GENERATOR_SEND(&s->sout, generate_runtime_stats, NULL);\r
+ PSOCK_END(&s->sout);\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+\r
+static PT_THREAD(led_io(struct httpd_state *s, char *ptr))\r
+{\r
+ PSOCK_BEGIN(&s->sout);\r
+ PSOCK_GENERATOR_SEND(&s->sout, generate_io_state, NULL);\r
+ PSOCK_END(&s->sout);\r
+}\r
+\r
+/** @} */\r
+\r
+\r
+\r
+\r
+\r
+\r
--- /dev/null
+/**\r
+ * \addtogroup httpd\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * \file\r
+ * Web server script interface header file\r
+ * \author\r
+ * Adam Dunkels <adam@sics.se>\r
+ *\r
+ */\r
+\r
+\r
+\r
+/*\r
+ * Copyright (c) 2001, Adam Dunkels.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions\r
+ * are met:\r
+ * 1. Redistributions of source code must retain the above copyright\r
+ * notice, this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the\r
+ * documentation and/or other materials provided with the distribution.\r
+ * 3. The name of the author may not be used to endorse or promote\r
+ * products derived from this software without specific prior\r
+ * written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS\r
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\r
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY\r
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE\r
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\r
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,\r
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\r
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+ * This file is part of the uIP TCP/IP stack.\r
+ *\r
+ * $Id: httpd-cgi.h,v 1.2 2006/06/11 21:46:38 adam Exp $\r
+ *\r
+ */\r
+\r
+#ifndef __HTTPD_CGI_H__\r
+#define __HTTPD_CGI_H__\r
+\r
+#include "psock.h"\r
+#include "httpd.h"\r
+\r
+typedef PT_THREAD((* httpd_cgifunction)(struct httpd_state *, char *));\r
+\r
+httpd_cgifunction httpd_cgi(char *name);\r
+\r
+struct httpd_cgi_call {\r
+ const char *name;\r
+ const httpd_cgifunction function;\r
+};\r
+\r
+/**\r
+ * \brief HTTPD CGI function declaration\r
+ * \param name The C variable name of the function\r
+ * \param str The string name of the function, used in the script file\r
+ * \param function A pointer to the function that implements it\r
+ *\r
+ * This macro is used for declaring a HTTPD CGI\r
+ * function. This function is then added to the list of\r
+ * HTTPD CGI functions with the httpd_cgi_add() function.\r
+ *\r
+ * \hideinitializer\r
+ */\r
+#define HTTPD_CGI_CALL(name, str, function) \\r
+static PT_THREAD(function(struct httpd_state *, char *)); \\r
+static const struct httpd_cgi_call name = {str, function}\r
+\r
+void httpd_cgi_init(void);\r
+#endif /* __HTTPD_CGI_H__ */\r
+\r
+/** @} */\r
--- /dev/null
+/*\r
+ * Copyright (c) 2001, Swedish Institute of Computer Science.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions\r
+ * are met:\r
+ * 1. Redistributions of source code must retain the above copyright\r
+ * notice, this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the\r
+ * documentation and/or other materials provided with the distribution.\r
+ * 3. Neither the name of the Institute nor the names of its contributors\r
+ * may be used to endorse or promote products derived from this software\r
+ * without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND\r
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE\r
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\r
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY\r
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF\r
+ * SUCH DAMAGE.\r
+ *\r
+ * This file is part of the lwIP TCP/IP stack.\r
+ *\r
+ * Author: Adam Dunkels <adam@sics.se>\r
+ *\r
+ * $Id: httpd-fs.c,v 1.1 2006/06/07 09:13:08 adam Exp $\r
+ */\r
+\r
+#include "httpd.h"\r
+#include "httpd-fs.h"\r
+#include "httpd-fsdata.h"\r
+\r
+#ifndef NULL\r
+#define NULL 0\r
+#endif /* NULL */\r
+\r
+#include "httpd-fsdata.c"\r
+\r
+#if HTTPD_FS_STATISTICS\r
+static u16_t count[HTTPD_FS_NUMFILES];\r
+#endif /* HTTPD_FS_STATISTICS */\r
+\r
+/*-----------------------------------------------------------------------------------*/\r
+static u8_t\r
+httpd_fs_strcmp(const char *str1, const char *str2)\r
+{\r
+ u8_t i;\r
+ i = 0;\r
+ loop:\r
+\r
+ if(str2[i] == 0 ||\r
+ str1[i] == '\r' ||\r
+ str1[i] == '\n') {\r
+ return 0;\r
+ }\r
+\r
+ if(str1[i] != str2[i]) {\r
+ return 1;\r
+ }\r
+\r
+\r
+ ++i;\r
+ goto loop;\r
+}\r
+/*-----------------------------------------------------------------------------------*/\r
+int\r
+httpd_fs_open(const char *name, struct httpd_fs_file *file)\r
+{\r
+#if HTTPD_FS_STATISTICS\r
+ u16_t i = 0;\r
+#endif /* HTTPD_FS_STATISTICS */\r
+ struct httpd_fsdata_file_noconst *f;\r
+\r
+ for(f = (struct httpd_fsdata_file_noconst *)HTTPD_FS_ROOT;\r
+ f != NULL;\r
+ f = (struct httpd_fsdata_file_noconst *)f->next) {\r
+\r
+ if(httpd_fs_strcmp(name, f->name) == 0) {\r
+ file->data = f->data;\r
+ file->len = f->len;\r
+#if HTTPD_FS_STATISTICS\r
+ ++count[i];\r
+#endif /* HTTPD_FS_STATISTICS */\r
+ return 1;\r
+ }\r
+#if HTTPD_FS_STATISTICS\r
+ ++i;\r
+#endif /* HTTPD_FS_STATISTICS */\r
+\r
+ }\r
+ return 0;\r
+}\r
+/*-----------------------------------------------------------------------------------*/\r
+void\r
+httpd_fs_init(void)\r
+{\r
+#if HTTPD_FS_STATISTICS\r
+ u16_t i;\r
+ for(i = 0; i < HTTPD_FS_NUMFILES; i++) {\r
+ count[i] = 0;\r
+ }\r
+#endif /* HTTPD_FS_STATISTICS */\r
+}\r
+/*-----------------------------------------------------------------------------------*/\r
+#if HTTPD_FS_STATISTICS\r
+u16_t httpd_fs_count\r
+(char *name)\r
+{\r
+ struct httpd_fsdata_file_noconst *f;\r
+ u16_t i;\r
+\r
+ i = 0;\r
+ for(f = (struct httpd_fsdata_file_noconst *)HTTPD_FS_ROOT;\r
+ f != NULL;\r
+ f = (struct httpd_fsdata_file_noconst *)f->next) {\r
+\r
+ if(httpd_fs_strcmp(name, f->name) == 0) {\r
+ return count[i];\r
+ }\r
+ ++i;\r
+ }\r
+ return 0;\r
+}\r
+#endif /* HTTPD_FS_STATISTICS */\r
+/*-----------------------------------------------------------------------------------*/\r
--- /dev/null
+/*\r
+ * Copyright (c) 2001, Swedish Institute of Computer Science.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions\r
+ * are met:\r
+ * 1. Redistributions of source code must retain the above copyright\r
+ * notice, this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the\r
+ * documentation and/or other materials provided with the distribution.\r
+ * 3. Neither the name of the Institute nor the names of its contributors\r
+ * may be used to endorse or promote products derived from this software\r
+ * without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND\r
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE\r
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\r
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY\r
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF\r
+ * SUCH DAMAGE.\r
+ *\r
+ * This file is part of the lwIP TCP/IP stack.\r
+ *\r
+ * Author: Adam Dunkels <adam@sics.se>\r
+ *\r
+ * $Id: httpd-fs.h,v 1.1 2006/06/07 09:13:08 adam Exp $\r
+ */\r
+#ifndef __HTTPD_FS_H__\r
+#define __HTTPD_FS_H__\r
+\r
+#define HTTPD_FS_STATISTICS 1\r
+\r
+struct httpd_fs_file {\r
+ char *data;\r
+ int len;\r
+};\r
+\r
+/* file must be allocated by caller and will be filled in\r
+ by the function. */\r
+int httpd_fs_open(const char *name, struct httpd_fs_file *file);\r
+\r
+#ifdef HTTPD_FS_STATISTICS\r
+#if HTTPD_FS_STATISTICS == 1\r
+u16_t httpd_fs_count(char *name);\r
+#endif /* HTTPD_FS_STATISTICS */\r
+#endif /* HTTPD_FS_STATISTICS */\r
+\r
+void httpd_fs_init(void);\r
+\r
+#endif /* __HTTPD_FS_H__ */\r
--- /dev/null
+<html>\r
+ <body bgcolor="white">\r
+ <center>\r
+ <h1>404 - file not found</h1>\r
+ <h3>Go <a href="/">here</a> instead.</h3>\r
+ </center>\r
+ </body>\r
+</html>
\ No newline at end of file
--- /dev/null
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">\r
+<html>\r
+ <head>\r
+ <title>FreeRTOS.org uIP WEB server demo</title>\r
+ </head>\r
+ <BODY onLoad="window.setTimeout("location.href='index.shtml'",100)">\r
+<font face="arial">\r
+Loading index.shtml. Click <a href="index.shtml">here</a> if not automatically redirected.\r
+</font>\r
+</font>\r
+</body>\r
+</html>\r
+\r
--- /dev/null
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">\r
+<html>\r
+ <head>\r
+ <title>FreeRTOS.org uIP WEB server demo</title>\r
+ </head>\r
+ <BODY onLoad="window.setTimeout("location.href='index.shtml'",2000)">\r
+<font face="arial">\r
+<a href="index.shtml">Task Stats</a> <b>|</b> <a href="runtime.shtml">Run Time Stats</a> <b>|</b> <a href="stats.shtml">TCP Stats</a> <b>|</b> <a href="tcp.shtml">Connections</a> <b>|</b> <a href="http://www.freertos.org/">FreeRTOS.org Homepage</a> <b>|</b> <a href="io.shtml">IO</a>\r
+<br><p>\r
+<hr>\r
+<br><p>\r
+<h2>Task statistics</h2>\r
+Page will refresh every 2 seconds.<p>\r
+<font face="courier"><pre>Task State Priority Stack #<br>************************************************<br>\r
+%! rtos-stats\r
+</pre></font>\r
+</font>\r
+</body>\r
+</html>\r
+\r
--- /dev/null
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">\r
+<html>\r
+ <head>\r
+ <title>FreeRTOS.org uIP WEB server demo</title>\r
+ </head>\r
+ <BODY>\r
+<font face="arial">\r
+<a href="index.shtml">Task Stats</a> <b>|</b> <a href="runtime.shtml">Run Time Stats</a> <b>|</b> <a href="stats.shtml">TCP Stats</a> <b>|</b> <a href="tcp.shtml">Connections</a> <b>|</b> <a href="http://www.freertos.org/">FreeRTOS.org Homepage</a> <b>|</b> <a href="io.shtml">IO</a>\r
+<br><p>\r
+<hr>\r
+<b>LED and LCD IO</b><br>\r
+\r
+<p>\r
+\r
+Use the check box to turn on or off the LED, enter text to display on the OLED display, then click "Update IO".\r
+\r
+\r
+<p>\r
+<form name="aForm" action="/io.shtml" method="get">\r
+%! led-io\r
+<p>\r
+<input type="submit" value="Update IO">\r
+</form>\r
+<br><p>\r
+</font>\r
+</body>\r
+</html>\r
+\r
--- /dev/null
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">\r
+<html>\r
+ <head>\r
+ <title>FreeRTOS.org uIP WEB server demo</title>\r
+ </head>\r
+ <BODY onLoad="window.setTimeout("location.href='runtime.shtml'",2000)">\r
+<font face="arial">\r
+<a href="index.shtml">Task Stats</a> <b>|</b> <a href="runtime.shtml">Run Time Stats</a> <b>|</b> <a href="stats.shtml">TCP Stats</a> <b>|</b> <a href="tcp.shtml">Connections</a> <b>|</b> <a href="http://www.freertos.org/">FreeRTOS.org Homepage</a> <b>|</b> <a href="io.shtml">IO</a>\r
+<br><p>\r
+<hr>\r
+<br><p>\r
+<h2>Run-time statistics</h2>\r
+Page will refresh every 2 seconds.<p>\r
+<font face="courier"><pre>Task Abs Time % Time<br>****************************************<br>\r
+%! run-time\r
+</pre></font>\r
+</font>\r
+</body>\r
+</html>\r
+\r
--- /dev/null
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">\r
+<html>\r
+ <head>\r
+ <title>FreeRTOS.org uIP WEB server demo</title>\r
+ </head>\r
+ <BODY>\r
+<font face="arial">\r
+<a href="index.shtml">Task Stats</a> <b>|</b> <a href="runtime.shtml">Run Time Stats</a> <b>|</b> <a href="stats.shtml">TCP Stats</a> <b>|</b> <a href="tcp.shtml">Connections</a> <b>|</b> <a href="http://www.freertos.org/">FreeRTOS.org Homepage</a> <b>|</b> <a href="io.shtml">IO</a>\r
+<br><p>\r
+<hr>\r
+<br><p>\r
+<h2>Network statistics</h2>\r
+<table width="300" border="0">\r
+<tr><td align="left"><font face="courier"><pre>\r
+IP Packets dropped\r
+ Packets received\r
+ Packets sent\r
+IP errors IP version/header length\r
+ IP length, high byte\r
+ IP length, low byte\r
+ IP fragments\r
+ Header checksum\r
+ Wrong protocol\r
+ICMP Packets dropped\r
+ Packets received\r
+ Packets sent\r
+ Type errors\r
+TCP Packets dropped\r
+ Packets received\r
+ Packets sent\r
+ Checksum errors\r
+ Data packets without ACKs\r
+ Resets\r
+ Retransmissions\r
+ No connection avaliable\r
+ Connection attempts to closed ports\r
+</pre></font></td><td><pre>%! net-stats\r
+</pre></table>\r
+</font>\r
+</body>\r
+</html>\r
--- /dev/null
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">\r
+<html>\r
+ <head>\r
+ <title>FreeRTOS.org uIP WEB server demo</title>\r
+ </head>\r
+ <BODY>\r
+<font face="arial">\r
+<a href="index.shtml">Task Stats</a> <b>|</b> <a href="runtime.shtml">Run Time Stats</a> <b>|</b> <a href="stats.shtml">TCP Stats</a> <b>|</b> <a href="tcp.shtml">Connections</a> <b>|</b> <a href="http://www.freertos.org/">FreeRTOS.org Homepage</a> <b>|</b> <a href="io.shtml">IO</a>\r
+<br><p>\r
+<hr>\r
+<br>\r
+<h2>Network connections</h2>\r
+<p>\r
+<table>\r
+<tr><th>Local</th><th>Remote</th><th>State</th><th>Retransmissions</th><th>Timer</th><th>Flags</th></tr>\r
+%! tcp-connections\r
+</pre></font>\r
+</font>\r
+</body>\r
+</html>\r
+\r
--- /dev/null
+static const unsigned char data_404_html[] = {\r
+ /* /404.html */\r
+ 0x2f, 0x34, 0x30, 0x34, 0x2e, 0x68, 0x74, 0x6d, 0x6c, 0,\r
+ 0x3c, 0x68, 0x74, 0x6d, 0x6c, 0x3e, 0xa, 0x20, 0x20, 0x3c, \r
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+ 0x6f, 0x72, 0x3d, 0x22, 0x77, 0x68, 0x69, 0x74, 0x65, 0x22, \r
+ 0x3e, 0xa, 0x20, 0x20, 0x20, 0x20, 0x3c, 0x63, 0x65, 0x6e, \r
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+ 0x66, 0x6f, 0x75, 0x6e, 0x64, 0x3c, 0x2f, 0x68, 0x31, 0x3e, \r
+ 0xa, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x3c, 0x68, 0x33, \r
+ 0x3e, 0x47, 0x6f, 0x20, 0x3c, 0x61, 0x20, 0x68, 0x72, 0x65, \r
+ 0x66, 0x3d, 0x22, 0x2f, 0x22, 0x3e, 0x68, 0x65, 0x72, 0x65, \r
+ 0x3c, 0x2f, 0x61, 0x3e, 0x20, 0x69, 0x6e, 0x73, 0x74, 0x65, \r
+ 0x61, 0x64, 0x2e, 0x3c, 0x2f, 0x68, 0x33, 0x3e, 0xa, 0x20, \r
+ 0x20, 0x20, 0x20, 0x3c, 0x2f, 0x63, 0x65, 0x6e, 0x74, 0x65, \r
+ 0x72, 0x3e, 0xa, 0x20, 0x20, 0x3c, 0x2f, 0x62, 0x6f, 0x64, \r
+ 0x79, 0x3e, 0xa, 0x3c, 0x2f, 0x68, 0x74, 0x6d, 0x6c, 0x3e, \r
+0};\r
+\r
+static const unsigned char data_index_html[] = {\r
+ /* /index.html */\r
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+\r
+const struct httpd_fsdata_file file_404_html[] = {{NULL, data_404_html, data_404_html + 10, sizeof(data_404_html) - 10}};\r
+\r
+const struct httpd_fsdata_file file_index_html[] = {{file_404_html, data_index_html, data_index_html + 12, sizeof(data_index_html) - 12}};\r
+\r
+const struct httpd_fsdata_file file_index_shtml[] = {{file_index_html, data_index_shtml, data_index_shtml + 13, sizeof(data_index_shtml) - 13}};\r
+\r
+const struct httpd_fsdata_file file_io_shtml[] = {{file_index_shtml, data_io_shtml, data_io_shtml + 10, sizeof(data_io_shtml) - 10}};\r
+\r
+const struct httpd_fsdata_file file_runtime_shtml[] = {{file_io_shtml, data_runtime_shtml, data_runtime_shtml + 15, sizeof(data_runtime_shtml) - 15}};\r
+\r
+const struct httpd_fsdata_file file_stats_shtml[] = {{file_runtime_shtml, data_stats_shtml, data_stats_shtml + 13, sizeof(data_stats_shtml) - 13}};\r
+\r
+const struct httpd_fsdata_file file_tcp_shtml[] = {{file_stats_shtml, data_tcp_shtml, data_tcp_shtml + 11, sizeof(data_tcp_shtml) - 11}};\r
+\r
+#define HTTPD_FS_ROOT file_tcp_shtml\r
+\r
+#define HTTPD_FS_NUMFILES 7\r
--- /dev/null
+/*\r
+ * Copyright (c) 2001, Swedish Institute of Computer Science.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions\r
+ * are met:\r
+ * 1. Redistributions of source code must retain the above copyright\r
+ * notice, this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the\r
+ * documentation and/or other materials provided with the distribution.\r
+ * 3. Neither the name of the Institute nor the names of its contributors\r
+ * may be used to endorse or promote products derived from this software\r
+ * without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND\r
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE\r
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\r
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY\r
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF\r
+ * SUCH DAMAGE.\r
+ *\r
+ * This file is part of the lwIP TCP/IP stack.\r
+ *\r
+ * Author: Adam Dunkels <adam@sics.se>\r
+ *\r
+ * $Id: httpd-fsdata.h,v 1.1 2006/06/07 09:13:08 adam Exp $\r
+ */\r
+#ifndef __HTTPD_FSDATA_H__\r
+#define __HTTPD_FSDATA_H__\r
+\r
+#include "uip.h"\r
+\r
+struct httpd_fsdata_file {\r
+ const struct httpd_fsdata_file *next;\r
+ const char *name;\r
+ const char *data;\r
+ const int len;\r
+#ifdef HTTPD_FS_STATISTICS\r
+#if HTTPD_FS_STATISTICS == 1\r
+ u16_t count;\r
+#endif /* HTTPD_FS_STATISTICS */\r
+#endif /* HTTPD_FS_STATISTICS */\r
+};\r
+\r
+struct httpd_fsdata_file_noconst {\r
+ struct httpd_fsdata_file *next;\r
+ char *name;\r
+ char *data;\r
+ int len;\r
+#ifdef HTTPD_FS_STATISTICS\r
+#if HTTPD_FS_STATISTICS == 1\r
+ u16_t count;\r
+#endif /* HTTPD_FS_STATISTICS */\r
+#endif /* HTTPD_FS_STATISTICS */\r
+};\r
+\r
+#endif /* __HTTPD_FSDATA_H__ */\r
--- /dev/null
+/**\r
+ * \addtogroup apps\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * \defgroup httpd Web server\r
+ * @{\r
+ * The uIP web server is a very simplistic implementation of an HTTP\r
+ * server. It can serve web pages and files from a read-only ROM\r
+ * filesystem, and provides a very small scripting language.\r
+\r
+ */\r
+\r
+/**\r
+ * \file\r
+ * Web server\r
+ * \author\r
+ * Adam Dunkels <adam@sics.se>\r
+ */\r
+\r
+\r
+/*\r
+ * Copyright (c) 2004, Adam Dunkels.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions\r
+ * are met:\r
+ * 1. Redistributions of source code must retain the above copyright\r
+ * notice, this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the\r
+ * documentation and/or other materials provided with the distribution.\r
+ * 3. Neither the name of the Institute nor the names of its contributors\r
+ * may be used to endorse or promote products derived from this software\r
+ * without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND\r
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE\r
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\r
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY\r
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF\r
+ * SUCH DAMAGE.\r
+ *\r
+ * This file is part of the uIP TCP/IP stack.\r
+ *\r
+ * Author: Adam Dunkels <adam@sics.se>\r
+ *\r
+ * $Id: httpd.c,v 1.2 2006/06/11 21:46:38 adam Exp $\r
+ */\r
+\r
+#include "uip.h"\r
+#include "httpd.h"\r
+#include "httpd-fs.h"\r
+#include "httpd-cgi.h"\r
+#include "http-strings.h"\r
+\r
+#include <string.h>\r
+\r
+#define STATE_WAITING 0\r
+#define STATE_OUTPUT 1\r
+\r
+#define ISO_nl 0x0a\r
+#define ISO_space 0x20\r
+#define ISO_bang 0x21\r
+#define ISO_percent 0x25\r
+#define ISO_period 0x2e\r
+#define ISO_slash 0x2f\r
+#define ISO_colon 0x3a\r
+\r
+\r
+/*---------------------------------------------------------------------------*/\r
+static unsigned short\r
+generate_part_of_file(void *state)\r
+{\r
+ struct httpd_state *s = (struct httpd_state *)state;\r
+\r
+ if(s->file.len > uip_mss()) {\r
+ s->len = uip_mss();\r
+ } else {\r
+ s->len = s->file.len;\r
+ }\r
+ memcpy(uip_appdata, s->file.data, s->len);\r
+ \r
+ return s->len;\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static\r
+PT_THREAD(send_file(struct httpd_state *s))\r
+{\r
+ PSOCK_BEGIN(&s->sout);\r
+ \r
+ do {\r
+ PSOCK_GENERATOR_SEND(&s->sout, generate_part_of_file, s);\r
+ s->file.len -= s->len;\r
+ s->file.data += s->len;\r
+ } while(s->file.len > 0);\r
+ \r
+ PSOCK_END(&s->sout);\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static\r
+PT_THREAD(send_part_of_file(struct httpd_state *s))\r
+{\r
+ PSOCK_BEGIN(&s->sout);\r
+\r
+ PSOCK_SEND(&s->sout, s->file.data, s->len);\r
+ \r
+ PSOCK_END(&s->sout);\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static void\r
+next_scriptstate(struct httpd_state *s)\r
+{\r
+ char *p;\r
+ p = strchr(s->scriptptr, ISO_nl) + 1;\r
+ s->scriptlen -= (unsigned short)(p - s->scriptptr);\r
+ s->scriptptr = p;\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static\r
+PT_THREAD(handle_script(struct httpd_state *s))\r
+{\r
+ char *ptr;\r
+ \r
+ PT_BEGIN(&s->scriptpt);\r
+\r
+\r
+ while(s->file.len > 0) {\r
+\r
+ /* Check if we should start executing a script. */\r
+ if(*s->file.data == ISO_percent &&\r
+ *(s->file.data + 1) == ISO_bang) {\r
+ s->scriptptr = s->file.data + 3;\r
+ s->scriptlen = s->file.len - 3;\r
+ if(*(s->scriptptr - 1) == ISO_colon) {\r
+ httpd_fs_open(s->scriptptr + 1, &s->file);\r
+ PT_WAIT_THREAD(&s->scriptpt, send_file(s));\r
+ } else {\r
+ PT_WAIT_THREAD(&s->scriptpt,\r
+ httpd_cgi(s->scriptptr)(s, s->scriptptr));\r
+ }\r
+ next_scriptstate(s);\r
+ \r
+ /* The script is over, so we reset the pointers and continue\r
+ sending the rest of the file. */\r
+ s->file.data = s->scriptptr;\r
+ s->file.len = s->scriptlen;\r
+ } else {\r
+ /* See if we find the start of script marker in the block of HTML\r
+ to be sent. */\r
+\r
+ if(s->file.len > uip_mss()) {\r
+ s->len = uip_mss();\r
+ } else {\r
+ s->len = s->file.len;\r
+ }\r
+\r
+ if(*s->file.data == ISO_percent) {\r
+ ptr = strchr(s->file.data + 1, ISO_percent);\r
+ } else {\r
+ ptr = strchr(s->file.data, ISO_percent);\r
+ }\r
+ if(ptr != NULL &&\r
+ ptr != s->file.data) {\r
+ s->len = (int)(ptr - s->file.data);\r
+ if(s->len >= uip_mss()) {\r
+ s->len = uip_mss();\r
+ }\r
+ }\r
+ PT_WAIT_THREAD(&s->scriptpt, send_part_of_file(s));\r
+ s->file.data += s->len;\r
+ s->file.len -= s->len;\r
+ \r
+ }\r
+ }\r
+ \r
+ PT_END(&s->scriptpt);\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static\r
+PT_THREAD(send_headers(struct httpd_state *s, const char *statushdr))\r
+{\r
+ char *ptr;\r
+\r
+ PSOCK_BEGIN(&s->sout);\r
+\r
+ PSOCK_SEND_STR(&s->sout, statushdr);\r
+\r
+ ptr = strrchr(s->filename, ISO_period);\r
+ if(ptr == NULL) {\r
+ PSOCK_SEND_STR(&s->sout, http_content_type_binary);\r
+ } else if(strncmp(http_html, ptr, 5) == 0 ||\r
+ strncmp(http_shtml, ptr, 6) == 0) {\r
+ PSOCK_SEND_STR(&s->sout, http_content_type_html);\r
+ } else if(strncmp(http_css, ptr, 4) == 0) {\r
+ PSOCK_SEND_STR(&s->sout, http_content_type_css);\r
+ } else if(strncmp(http_png, ptr, 4) == 0) {\r
+ PSOCK_SEND_STR(&s->sout, http_content_type_png);\r
+ } else if(strncmp(http_gif, ptr, 4) == 0) {\r
+ PSOCK_SEND_STR(&s->sout, http_content_type_gif);\r
+ } else if(strncmp(http_jpg, ptr, 4) == 0) {\r
+ PSOCK_SEND_STR(&s->sout, http_content_type_jpg);\r
+ } else {\r
+ PSOCK_SEND_STR(&s->sout, http_content_type_plain);\r
+ }\r
+ PSOCK_END(&s->sout);\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static\r
+PT_THREAD(handle_output(struct httpd_state *s))\r
+{\r
+ char *ptr;\r
+ \r
+ PT_BEGIN(&s->outputpt);\r
+ \r
+ if(!httpd_fs_open(s->filename, &s->file)) {\r
+ httpd_fs_open(http_404_html, &s->file);\r
+ strcpy(s->filename, http_404_html);\r
+ PT_WAIT_THREAD(&s->outputpt,\r
+ send_headers(s,\r
+ http_header_404));\r
+ PT_WAIT_THREAD(&s->outputpt,\r
+ send_file(s));\r
+ } else {\r
+ PT_WAIT_THREAD(&s->outputpt,\r
+ send_headers(s,\r
+ http_header_200));\r
+ ptr = strchr(s->filename, ISO_period);\r
+ if(ptr != NULL && strncmp(ptr, http_shtml, 6) == 0) {\r
+ PT_INIT(&s->scriptpt);\r
+ PT_WAIT_THREAD(&s->outputpt, handle_script(s));\r
+ } else {\r
+ PT_WAIT_THREAD(&s->outputpt,\r
+ send_file(s));\r
+ }\r
+ }\r
+ PSOCK_CLOSE(&s->sout);\r
+ PT_END(&s->outputpt);\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static\r
+PT_THREAD(handle_input(struct httpd_state *s))\r
+{\r
+ PSOCK_BEGIN(&s->sin);\r
+\r
+ PSOCK_READTO(&s->sin, ISO_space);\r
+\r
+ \r
+ if(strncmp(s->inputbuf, http_get, 4) != 0) {\r
+ PSOCK_CLOSE_EXIT(&s->sin);\r
+ }\r
+ PSOCK_READTO(&s->sin, ISO_space);\r
+\r
+ if(s->inputbuf[0] != ISO_slash) {\r
+ PSOCK_CLOSE_EXIT(&s->sin);\r
+ }\r
+\r
+ if(s->inputbuf[1] == ISO_space) {\r
+ strncpy(s->filename, http_index_html, sizeof(s->filename));\r
+ } else {\r
+\r
+ s->inputbuf[PSOCK_DATALEN(&s->sin) - 1] = 0;\r
+\r
+ /* Process any form input being sent to the server. */\r
+ {\r
+ extern void vApplicationProcessFormInput( char *pcInputString, long xInputLength );\r
+ vApplicationProcessFormInput( s->inputbuf, PSOCK_DATALEN(&s->sin) );\r
+ }\r
+\r
+ strncpy(s->filename, &s->inputbuf[0], sizeof(s->filename));\r
+ }\r
+\r
+ /* httpd_log_file(uip_conn->ripaddr, s->filename);*/\r
+ \r
+ s->state = STATE_OUTPUT;\r
+\r
+ while(1) {\r
+ PSOCK_READTO(&s->sin, ISO_nl);\r
+\r
+ if(strncmp(s->inputbuf, http_referer, 8) == 0) {\r
+ s->inputbuf[PSOCK_DATALEN(&s->sin) - 2] = 0;\r
+ /* httpd_log(&s->inputbuf[9]);*/\r
+ }\r
+ }\r
+ \r
+ PSOCK_END(&s->sin);\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+static void\r
+handle_connection(struct httpd_state *s)\r
+{\r
+ handle_input(s);\r
+ if(s->state == STATE_OUTPUT) {\r
+ handle_output(s);\r
+ }\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+void\r
+httpd_appcall(void)\r
+{\r
+ struct httpd_state *s = (struct httpd_state *)&(uip_conn->appstate);\r
+\r
+ if(uip_closed() || uip_aborted() || uip_timedout()) {\r
+ } else if(uip_connected()) {\r
+ PSOCK_INIT(&s->sin, s->inputbuf, sizeof(s->inputbuf) - 1);\r
+ PSOCK_INIT(&s->sout, s->inputbuf, sizeof(s->inputbuf) - 1);\r
+ PT_INIT(&s->outputpt);\r
+ s->state = STATE_WAITING;\r
+ /* timer_set(&s->timer, CLOCK_SECOND * 100);*/\r
+ s->timer = 0;\r
+ handle_connection(s);\r
+ } else if(s != NULL) {\r
+ if(uip_poll()) {\r
+ ++s->timer;\r
+ if(s->timer >= 20) {\r
+ uip_abort();\r
+ }\r
+ } else {\r
+ s->timer = 0;\r
+ }\r
+ handle_connection(s);\r
+ } else {\r
+ uip_abort();\r
+ }\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+/**\r
+ * \brief Initialize the web server\r
+ *\r
+ * This function initializes the web server and should be\r
+ * called at system boot-up.\r
+ */\r
+void\r
+httpd_init(void)\r
+{\r
+ uip_listen(HTONS(80));\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+/** @} */\r
--- /dev/null
+/*\r
+ * Copyright (c) 2001-2005, Adam Dunkels.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions\r
+ * are met:\r
+ * 1. Redistributions of source code must retain the above copyright\r
+ * notice, this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the\r
+ * documentation and/or other materials provided with the distribution.\r
+ * 3. The name of the author may not be used to endorse or promote\r
+ * products derived from this software without specific prior\r
+ * written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS\r
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\r
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY\r
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE\r
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\r
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,\r
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\r
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+ * This file is part of the uIP TCP/IP stack.\r
+ *\r
+ * $Id: httpd.h,v 1.2 2006/06/11 21:46:38 adam Exp $\r
+ *\r
+ */\r
+\r
+#ifndef __HTTPD_H__\r
+#define __HTTPD_H__\r
+\r
+#include "psock.h"\r
+#include "httpd-fs.h"\r
+\r
+struct httpd_state {\r
+ unsigned char timer;\r
+ struct psock sin, sout;\r
+ struct pt outputpt, scriptpt;\r
+ char inputbuf[50];\r
+ char filename[20];\r
+ char state;\r
+ struct httpd_fs_file file;\r
+ int len;\r
+ char *scriptptr;\r
+ int scriptlen;\r
+ \r
+ unsigned short count;\r
+};\r
+\r
+void httpd_init(void);\r
+void httpd_appcall(void);\r
+\r
+void httpd_log(char *msg);\r
+void httpd_log_file(u16_t *requester, char *file);\r
+\r
+#endif /* __HTTPD_H__ */\r
--- /dev/null
+#!/usr/bin/perl\r
+\r
+open(OUTPUT, "> httpd-fsdata.c");\r
+\r
+chdir("httpd-fs");\r
+\r
+opendir(DIR, ".");\r
+@files = grep { !/^\./ && !/(CVS|~)/ } readdir(DIR);\r
+closedir(DIR);\r
+\r
+foreach $file (@files) { \r
+ \r
+ if(-d $file && $file !~ /^\./) {\r
+ print "Processing directory $file\n";\r
+ opendir(DIR, $file);\r
+ @newfiles = grep { !/^\./ && !/(CVS|~)/ } readdir(DIR);\r
+ closedir(DIR);\r
+ printf "Adding files @newfiles\n";\r
+ @files = (@files, map { $_ = "$file/$_" } @newfiles);\r
+ next;\r
+ }\r
+}\r
+\r
+foreach $file (@files) {\r
+ if(-f $file) {\r
+ \r
+ print "Adding file $file\n";\r
+ \r
+ open(FILE, $file) || die "Could not open file $file\n";\r
+\r
+ $file =~ s-^-/-;\r
+ $fvar = $file;\r
+ $fvar =~ s-/-_-g;\r
+ $fvar =~ s-\.-_-g;\r
+ # for AVR, add PROGMEM here\r
+ print(OUTPUT "static const unsigned char data".$fvar."[] = {\n");\r
+ print(OUTPUT "\t/* $file */\n\t");\r
+ for($j = 0; $j < length($file); $j++) {\r
+ printf(OUTPUT "%#02x, ", unpack("C", substr($file, $j, 1)));\r
+ }\r
+ printf(OUTPUT "0,\n");\r
+ \r
+ \r
+ $i = 0; \r
+ while(read(FILE, $data, 1)) {\r
+ if($i == 0) {\r
+ print(OUTPUT "\t");\r
+ }\r
+ printf(OUTPUT "%#02x, ", unpack("C", $data));\r
+ $i++;\r
+ if($i == 10) {\r
+ print(OUTPUT "\n");\r
+ $i = 0;\r
+ }\r
+ }\r
+ print(OUTPUT "0};\n\n");\r
+ close(FILE);\r
+ push(@fvars, $fvar);\r
+ push(@pfiles, $file);\r
+ }\r
+}\r
+\r
+for($i = 0; $i < @fvars; $i++) {\r
+ $file = $pfiles[$i];\r
+ $fvar = $fvars[$i];\r
+\r
+ if($i == 0) {\r
+ $prevfile = "NULL";\r
+ } else {\r
+ $prevfile = "file" . $fvars[$i - 1];\r
+ }\r
+ print(OUTPUT "const struct httpd_fsdata_file file".$fvar."[] = {{$prevfile, data$fvar, ");\r
+ print(OUTPUT "data$fvar + ". (length($file) + 1) .", ");\r
+ print(OUTPUT "sizeof(data$fvar) - ". (length($file) + 1) ."}};\n\n");\r
+}\r
+\r
+print(OUTPUT "#define HTTPD_FS_ROOT file$fvars[$i - 1]\n\n");\r
+print(OUTPUT "#define HTTPD_FS_NUMFILES $i\n");\r
--- /dev/null
+#!/usr/bin/perl\r
+\r
+\r
+sub stringify {\r
+ my $name = shift(@_);\r
+ open(OUTPUTC, "> $name.c");\r
+ open(OUTPUTH, "> $name.h");\r
+ \r
+ open(FILE, "$name");\r
+ \r
+ while(<FILE>) {\r
+ if(/(.+) "(.+)"/) {\r
+ $var = $1;\r
+ $data = $2;\r
+ \r
+ $datan = $data;\r
+ $datan =~ s/\\r/\r/g;\r
+ $datan =~ s/\\n/\n/g;\r
+ $datan =~ s/\\01/\01/g; \r
+ $datan =~ s/\\0/\0/g;\r
+ \r
+ printf(OUTPUTC "const char $var\[%d] = \n", length($datan) + 1);\r
+ printf(OUTPUTC "/* \"$data\" */\n");\r
+ printf(OUTPUTC "{");\r
+ for($j = 0; $j < length($datan); $j++) {\r
+ printf(OUTPUTC "%#02x, ", unpack("C", substr($datan, $j, 1)));\r
+ }\r
+ printf(OUTPUTC "};\n");\r
+ \r
+ printf(OUTPUTH "extern const char $var\[%d];\n", length($datan) + 1);\r
+ \r
+ }\r
+ }\r
+ close(OUTPUTC);\r
+ close(OUTPUTH);\r
+}\r
+stringify("http-strings");\r
+\r
+exit 0;\r
+\r
--- /dev/null
+/*\r
+ FreeRTOS V5.4.2 - Copyright (C) 2009 Real Time Engineers Ltd.\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation and modified by the FreeRTOS exception.\r
+ **NOTE** The exception to the GPL is included to allow you to distribute a\r
+ combined work that includes FreeRTOS without being obliged to provide the\r
+ source code for proprietary components outside of the FreeRTOS kernel.\r
+ Alternative commercial license and support terms are also available upon\r
+ request. See the licensing section of http://www.FreeRTOS.org for full\r
+ license details.\r
+\r
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT\r
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details.\r
+\r
+ You should have received a copy of the GNU General Public License along\r
+ with FreeRTOS; if not, write to the Free Software Foundation, Inc., 59\r
+ Temple Place, Suite 330, Boston, MA 02111-1307 USA.\r
+\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * Looking for a quick start? Then check out the FreeRTOS eBook! *\r
+ * See http://www.FreeRTOS.org/Documentation for details *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ Please ensure to read the configuration and relevant port sections of the\r
+ online documentation.\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and\r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety\r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting,\r
+ licensing and training services.\r
+*/\r
+/* Standard includes. */\r
+#include <string.h>\r
+\r
+/* Scheduler includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+#include "semphr.h"\r
+\r
+#include "lcd_message.h"\r
+\r
+/* uip includes. */\r
+#include "hw_types.h"\r
+\r
+#include "uip.h"\r
+#include "uip_arp.h"\r
+#include "httpd.h"\r
+#include "timer.h"\r
+#include "clock-arch.h"\r
+#include "hw_ethernet.h"\r
+#include "ethernet.h"\r
+#include "hw_memmap.h"\r
+#include "lmi_flash.h"\r
+#include "sysctl.h"\r
+\r
+/* Demo includes. */\r
+#include "emac.h"\r
+#include "partest.h"\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* IP address configuration. */\r
+#define uipIP_ADDR0 192\r
+#define uipIP_ADDR1 168\r
+#define uipIP_ADDR2 0\r
+#define uipIP_ADDR3 201\r
+\r
+/* Netmask configuration. */\r
+#define uipNETMASK_0 255\r
+#define uipNETMASK_1 255\r
+#define uipNETMASK_2 255\r
+#define uipNETMASK_3 0\r
+\r
+/* How long to wait before attempting to connect the MAC again. */\r
+#define uipINIT_WAIT 100\r
+\r
+/* Shortcut to the header within the Rx buffer. */\r
+#define xHeader ((struct uip_eth_hdr *) &uip_buf[ 0 ])\r
+\r
+/* Standard constant. */\r
+#define uipTOTAL_FRAME_HEADER_SIZE 54\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * Send the uIP buffer to the MAC.\r
+ */\r
+static void prvENET_Send(void);\r
+\r
+/*\r
+ * Setup the MAC address in the MAC itself, and in the uIP stack.\r
+ */\r
+static void prvSetMACAddress( void );\r
+\r
+/*\r
+ * Port functions required by the uIP stack.\r
+ */\r
+void clock_init( void );\r
+clock_time_t clock_time( void );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* The semaphore used by the ISR to wake the uIP task. */\r
+extern xSemaphoreHandle xEMACSemaphore;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+void clock_init(void)\r
+{\r
+ /* This is done when the scheduler starts. */\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+clock_time_t clock_time( void )\r
+{\r
+ return xTaskGetTickCount();\r
+}\r
+\r
+\r
+void vuIP_Task( void *pvParameters )\r
+{\r
+portBASE_TYPE i;\r
+uip_ipaddr_t xIPAddr;\r
+struct timer periodic_timer, arp_timer;\r
+extern void ( vEMAC_ISR )( void );\r
+\r
+ /* Enable/Reset the Ethernet Controller */\r
+ SysCtlPeripheralEnable( SYSCTL_PERIPH_ETH );\r
+ SysCtlPeripheralReset( SYSCTL_PERIPH_ETH );\r
+\r
+ /* Create the semaphore used by the ISR to wake this task. */\r
+ vSemaphoreCreateBinary( xEMACSemaphore );\r
+\r
+ /* Initialise the uIP stack. */\r
+ timer_set( &periodic_timer, configTICK_RATE_HZ / 2 );\r
+ timer_set( &arp_timer, configTICK_RATE_HZ * 10 );\r
+ uip_init();\r
+ uip_ipaddr( xIPAddr, uipIP_ADDR0, uipIP_ADDR1, uipIP_ADDR2, uipIP_ADDR3 );\r
+ uip_sethostaddr( xIPAddr );\r
+ uip_ipaddr( xIPAddr, uipNETMASK_0, uipNETMASK_1, uipNETMASK_2, uipNETMASK_3 );\r
+ uip_setnetmask( xIPAddr );\r
+ httpd_init();\r
+\r
+ while( vInitEMAC() != pdPASS )\r
+ {\r
+ vTaskDelay( uipINIT_WAIT );\r
+ }\r
+ prvSetMACAddress();\r
+\r
+\r
+ for( ;; )\r
+ {\r
+ /* Is there received data ready to be processed? */\r
+ uip_len = uiGetEMACRxData( uip_buf );\r
+\r
+ if( uip_len > 0 )\r
+ {\r
+ /* Standard uIP loop taken from the uIP manual. */\r
+\r
+ if( xHeader->type == htons( UIP_ETHTYPE_IP ) )\r
+ {\r
+ uip_arp_ipin();\r
+ uip_input();\r
+\r
+ /* If the above function invocation resulted in data that\r
+ should be sent out on the network, the global variable\r
+ uip_len is set to a value > 0. */\r
+ if( uip_len > 0 )\r
+ {\r
+ uip_arp_out();\r
+ prvENET_Send();\r
+ }\r
+ }\r
+ else if( xHeader->type == htons( UIP_ETHTYPE_ARP ) )\r
+ {\r
+ uip_arp_arpin();\r
+\r
+ /* If the above function invocation resulted in data that\r
+ should be sent out on the network, the global variable\r
+ uip_len is set to a value > 0. */\r
+ if( uip_len > 0 )\r
+ {\r
+ prvENET_Send();\r
+ }\r
+ }\r
+ }\r
+ else\r
+ {\r
+ if( timer_expired( &periodic_timer ) )\r
+ {\r
+ timer_reset( &periodic_timer );\r
+ for( i = 0; i < UIP_CONNS; i++ )\r
+ {\r
+ uip_periodic( i );\r
+\r
+ /* If the above function invocation resulted in data that\r
+ should be sent out on the network, the global variable\r
+ uip_len is set to a value > 0. */\r
+ if( uip_len > 0 )\r
+ {\r
+ uip_arp_out();\r
+ prvENET_Send();\r
+ }\r
+ }\r
+\r
+ /* Call the ARP timer function every 10 seconds. */\r
+ if( timer_expired( &arp_timer ) )\r
+ {\r
+ timer_reset( &arp_timer );\r
+ uip_arp_timer();\r
+ }\r
+ }\r
+ else\r
+ {\r
+ /* We did not receive a packet, and there was no periodic\r
+ processing to perform. Block for a fixed period. If a packet\r
+ is received during this period we will be woken by the ISR\r
+ giving us the Semaphore. */\r
+ xSemaphoreTake( xEMACSemaphore, configTICK_RATE_HZ / 2 );\r
+ }\r
+ }\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvENET_Send(void)\r
+{\r
+ vInitialiseSend();\r
+ vIncrementTxLength( uip_len );\r
+ vSendBufferToMAC();\r
+ vInitialiseSend();\r
+ vIncrementTxLength( uip_len );\r
+ vSendBufferToMAC();\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvSetMACAddress( void )\r
+{\r
+unsigned portLONG ulUser0, ulUser1;\r
+unsigned char pucMACArray[8];\r
+struct uip_eth_addr xAddr;\r
+\r
+ /* Get the device MAC address from flash */\r
+ FlashUserGet(&ulUser0, &ulUser1);\r
+\r
+ /* Convert the MAC address from flash into sequence of bytes. */\r
+ pucMACArray[0] = ((ulUser0 >> 0) & 0xff);\r
+ pucMACArray[1] = ((ulUser0 >> 8) & 0xff);\r
+ pucMACArray[2] = ((ulUser0 >> 16) & 0xff);\r
+ pucMACArray[3] = ((ulUser1 >> 0) & 0xff);\r
+ pucMACArray[4] = ((ulUser1 >> 8) & 0xff);\r
+ pucMACArray[5] = ((ulUser1 >> 16) & 0xff);\r
+\r
+ /* Program the MAC address. */\r
+ EthernetMACAddrSet(ETH_BASE, pucMACArray);\r
+\r
+ xAddr.addr[ 0 ] = pucMACArray[0];\r
+ xAddr.addr[ 1 ] = pucMACArray[1];\r
+ xAddr.addr[ 2 ] = pucMACArray[2];\r
+ xAddr.addr[ 3 ] = pucMACArray[3];\r
+ xAddr.addr[ 4 ] = pucMACArray[4];\r
+ xAddr.addr[ 5 ] = pucMACArray[5];\r
+ uip_setethaddr( xAddr );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vApplicationProcessFormInput( portCHAR *pcInputString, portBASE_TYPE xInputLength )\r
+{\r
+char *c, *pcText;\r
+static portCHAR cMessageForDisplay[ 32 ];\r
+extern xQueueHandle xOLEDQueue;\r
+xOLEDMessage xOLEDMessage;\r
+\r
+ /* Process the form input sent by the IO page of the served HTML. */\r
+\r
+ c = strstr( pcInputString, "?" );\r
+\r
+ if( c )\r
+ {\r
+ /* Turn LED's on or off in accordance with the check box status. */\r
+ if( strstr( c, "LED0=1" ) != NULL )\r
+ {\r
+ vParTestSetLED( 0, 1 );\r
+ }\r
+ else\r
+ {\r
+ vParTestSetLED( 0, 0 );\r
+ }\r
+\r
+ /* Find the start of the text to be displayed on the LCD. */\r
+ pcText = strstr( c, "LCD=" );\r
+ pcText += strlen( "LCD=" );\r
+\r
+ /* Terminate the file name for further processing within uIP. */\r
+ *c = 0x00;\r
+\r
+ /* Terminate the LCD string. */\r
+ c = strstr( pcText, " " );\r
+ if( c != NULL )\r
+ {\r
+ *c = 0x00;\r
+ }\r
+\r
+ /* Add required spaces. */\r
+ while( ( c = strstr( pcText, "+" ) ) != NULL )\r
+ {\r
+ *c = ' ';\r
+ }\r
+\r
+ /* Write the message to the LCD. */\r
+ strcpy( cMessageForDisplay, pcText );\r
+ xOLEDMessage.pcMessage = cMessageForDisplay;\r
+ xQueueSend( xOLEDQueue, &xOLEDMessage, portMAX_DELAY );\r
+ }\r
+}\r
+\r
--- /dev/null
+/**\r
+ * \addtogroup uipopt\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * \name Project-specific configuration options\r
+ * @{\r
+ *\r
+ * uIP has a number of configuration options that can be overridden\r
+ * for each project. These are kept in a project-specific uip-conf.h\r
+ * file and all configuration names have the prefix UIP_CONF.\r
+ */\r
+\r
+/*\r
+ * Copyright (c) 2006, Swedish Institute of Computer Science.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions\r
+ * are met:\r
+ * 1. Redistributions of source code must retain the above copyright\r
+ * notice, this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the\r
+ * documentation and/or other materials provided with the distribution.\r
+ * 3. Neither the name of the Institute nor the names of its contributors\r
+ * may be used to endorse or promote products derived from this software\r
+ * without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND\r
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE\r
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\r
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY\r
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF\r
+ * SUCH DAMAGE.\r
+ *\r
+ * This file is part of the uIP TCP/IP stack\r
+ *\r
+ * $Id: uip-conf.h,v 1.6 2006/06/12 08:00:31 adam Exp $\r
+ */\r
+\r
+/**\r
+ * \file\r
+ * An example uIP configuration file\r
+ * \author\r
+ * Adam Dunkels <adam@sics.se>\r
+ */\r
+\r
+#ifndef __UIP_CONF_H__\r
+#define __UIP_CONF_H__\r
+\r
+#include <stdint.h>\r
+\r
+/**\r
+ * 8 bit datatype\r
+ *\r
+ * This typedef defines the 8-bit type used throughout uIP.\r
+ *\r
+ * \hideinitializer\r
+ */\r
+typedef uint8_t u8_t;\r
+\r
+/**\r
+ * 16 bit datatype\r
+ *\r
+ * This typedef defines the 16-bit type used throughout uIP.\r
+ *\r
+ * \hideinitializer\r
+ */\r
+typedef uint16_t u16_t;\r
+\r
+/**\r
+ * Statistics datatype\r
+ *\r
+ * This typedef defines the dataype used for keeping statistics in\r
+ * uIP.\r
+ *\r
+ * \hideinitializer\r
+ */\r
+typedef unsigned short uip_stats_t;\r
+\r
+/**\r
+ * Maximum number of TCP connections.\r
+ *\r
+ * \hideinitializer\r
+ */\r
+#define UIP_CONF_MAX_CONNECTIONS 40\r
+\r
+/**\r
+ * Maximum number of listening TCP ports.\r
+ *\r
+ * \hideinitializer\r
+ */\r
+#define UIP_CONF_MAX_LISTENPORTS 40\r
+\r
+/**\r
+ * uIP buffer size.\r
+ *\r
+ * \hideinitializer\r
+ */\r
+#define UIP_CONF_BUFFER_SIZE 1500\r
+\r
+/**\r
+ * CPU byte order.\r
+ *\r
+ * \hideinitializer\r
+ */\r
+#define UIP_CONF_BYTE_ORDER LITTLE_ENDIAN\r
+\r
+/**\r
+ * Logging on or off\r
+ *\r
+ * \hideinitializer\r
+ */\r
+#define UIP_CONF_LOGGING 0\r
+\r
+/**\r
+ * UDP support on or off\r
+ *\r
+ * \hideinitializer\r
+ */\r
+#define UIP_CONF_UDP 0\r
+\r
+/**\r
+ * UDP checksums on or off\r
+ *\r
+ * \hideinitializer\r
+ */\r
+#define UIP_CONF_UDP_CHECKSUMS 1\r
+\r
+/**\r
+ * uIP statistics on or off\r
+ *\r
+ * \hideinitializer\r
+ */\r
+#define UIP_CONF_STATISTICS 1\r
+\r
+/* Here we include the header file for the application(s) we use in\r
+ our project. */\r
+/*#include "smtp.h"*/\r
+/*#include "hello-world.h"*/\r
+/*#include "telnetd.h"*/\r
+#include "webserver.h"\r
+/*#include "dhcpc.h"*/\r
+/*#include "resolv.h"*/\r
+/*#include "webclient.h"*/\r
+\r
+#define UIP_CONF_EXTERNAL_BUFFER\r
+\r
+#endif /* __UIP_CONF_H__ */\r
+\r
+/** @} */\r
+/** @} */\r
--- /dev/null
+/*\r
+ * Copyright (c) 2002, Adam Dunkels.\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions\r
+ * are met:\r
+ * 1. Redistributions of source code must retain the above copyright\r
+ * notice, this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above\r
+ * copyright notice, this list of conditions and the following\r
+ * disclaimer in the documentation and/or other materials provided\r
+ * with the distribution.\r
+ * 3. The name of the author may not be used to endorse or promote\r
+ * products derived from this software without specific prior\r
+ * written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS\r
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\r
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY\r
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE\r
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\r
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,\r
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\r
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+ * This file is part of the uIP TCP/IP stack\r
+ *\r
+ * $Id: webserver.h,v 1.2 2006/06/11 21:46:38 adam Exp $\r
+ *\r
+ */\r
+#ifndef __WEBSERVER_H__\r
+#define __WEBSERVER_H__\r
+\r
+#include "httpd.h"\r
+\r
+typedef struct httpd_state uip_tcp_appstate_t;\r
+/* UIP_APPCALL: the name of the application function. This function\r
+ must return void and take no arguments (i.e., C type "void\r
+ appfunc(void)"). */\r
+#ifndef UIP_APPCALL\r
+#define UIP_APPCALL httpd_appcall\r
+#endif\r
+\r
+\r
+#endif /* __WEBSERVER_H__ */\r
projects / freertos / commitdiff