]> git.sur5r.net Git - openocd/commitdiff
tcl STM32L0xx - add support for dual banked targets and for Nucleo-64 STM32L073
authorJan Čapek <jan.capek@braiins.cz>
Wed, 25 Jan 2017 09:11:48 +0000 (10:11 +0100)
committerFreddie Chopin <freddie.chopin@gmail.com>
Mon, 24 Apr 2017 20:57:57 +0000 (21:57 +0100)
- stm32l0_dual_bank.cfg - implement dual bank configuration

- st_nucleo_l073rz.cfg - implement new board script

Change-Id: Ie8063e5bec45069a63d414d81b2068fe3cc7e4d7
Signed-off-by: Jan Čapek <jan.capek@braiins.cz>
Reviewed-on: http://openocd.zylin.com/3957
Reviewed-by: Cezary Gapiński <cezary.gapinski@gmail.com>
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Tested-by: jenkins
Reviewed-by: Aurelio Lucchesi <me@0rel.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
tcl/board/st_nucleo_l073rz.cfg [new file with mode: 0644]
tcl/target/stm32l0_dual_bank.cfg [new file with mode: 0644]

diff --git a/tcl/board/st_nucleo_l073rz.cfg b/tcl/board/st_nucleo_l073rz.cfg
new file mode 100644 (file)
index 0000000..fa9dc87
--- /dev/null
@@ -0,0 +1,12 @@
+# This is an ST NUCLEO-L073RZ board with single STM32L073RZ chip.
+# http://www.st.com/en/evaluation-tools/nucleo-l073rz.html
+source [find interface/stlink-v2-1.cfg]
+
+transport select hla_swd
+
+set WORKAREASIZE 0x2000
+
+source [find target/stm32l0_dual_bank.cfg]
+
+# There is only system reset line and JTAG/SWD command can be issued when SRST
+reset_config srst_only
diff --git a/tcl/target/stm32l0_dual_bank.cfg b/tcl/target/stm32l0_dual_bank.cfg
new file mode 100644 (file)
index 0000000..f9f1a4e
--- /dev/null
@@ -0,0 +1,5 @@
+source [find target/stm32l0.cfg]
+
+# Add the second flash bank.
+set _FLASHNAME $_CHIPNAME.flash1
+flash bank $_FLASHNAME stm32lx 0 0 0 0 $_TARGETNAME