# Target configuration #
########################
-$_TARGETNAME configure -event reset-init { tonga2_init }
+# Initial JTAG speed should not exceed 1/6 of the initial CPU clock
+# frequency (24MHz). Be conservative and use 1/8 of the frequency.
+# (24MHz / 8 = 3MHz)
+adapter_khz 3000
-proc tonga2_init { } {
+$_TARGETNAME configure -event reset-start {
+ # Upon reset, set the JTAG frequency to 3MHz again, see above.
+ echo "Setting JTAG speed to 3MHz until clocks are initialized."
+ adapter_khz 3000
+
+ # Halt the CPU.
+ halt
+
+ # Disable faster memory access for now.
+ arm7_9 fast_memory_access disable
+}
+
+$_TARGETNAME configure -event reset-init {
+ # Setup clocks, and initialize SRAM and DDR SDRAM.
+ tonga2_init
+ # At this point the CPU is running at 192MHz, increase JTAG speed.
+ # Tests showed that 15MHz works OK, higher speeds can cause problems,
+ # though. Not sure if this is a CPU issue or JTAG adapter issue.
+ echo "Increasing JTAG speed to 15MHz."
+ adapter_khz 15000
+
+ # Enable faster memory access.
+ arm7_9 fast_memory_access enable
+}
+
+proc tonga2_init { } {
######################
# PLL initialization #
######################
# smc_direct_cmd_5 (SMC Direct Command register):
# cmd_type = UpdateRegs, chip_select = CS1
mww 0xf4311010 0x00c00000
+
+ echo "Clocks, SRAM, and DDR SDRAM are now initialized."
}
#######################