return ERROR_OK;
}
-void arm11_build_reg_cache(target_t *target)
+int arm11_build_reg_cache(target_t *target)
{
arm11_common_t *arm11 = target->arch_info;
rs->def_index = i;
rs->target = target;
}
+ return ERROR_OK;
}
int arm11_handle_bool(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, bool * var, char * name)
size_t brp; /**< Number of Breakpoint Register Pairs from DIDR */
size_t wrp; /**< Number of Watchpoint Register Pairs from DIDR */
-
+
enum arm11_debug_version
debug_version; /**< ARM debug architecture from DIDR */
/*@}*/
/**
- * ARM11 DBGTAP instructions
- *
+ * ARM11 DBGTAP instructions
+ *
* http://infocenter.arm.com/help/topic/com.arm.doc.ddi0301f/I1006229.html
*/
enum arm11_instructions
/* target register access for gdb */
int arm11_get_gdb_reg_list(struct target_s *target, struct reg_s **reg_list[], int *reg_list_size);
-/* target memory access
+/* target memory access
* size: 1 = byte (8bit), 2 = half-word (16bit), 4 = word (32bit)
* count: number of items of <size>
*/
int arm11_checksum_memory(struct target_s *target, u32 address, u32 count, u32* checksum);
-/* target break-/watchpoint control
+/* target break-/watchpoint control
* rw: 0 = write, 1 = read, 2 = access
*/
int arm11_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint);
int arm11_quit(void);
/* helpers */
-void arm11_build_reg_cache(target_t *target);
+int arm11_build_reg_cache(target_t *target);
int arm11_set_reg(reg_t *reg, u8 *buf);
int arm11_get_reg(reg_t *reg);