Add barrier instructions to IAR CM3 ports.

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@1860 1d2547de-c912-0410-9cb9-b8ca96c0e9e2

diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM0/port.c b/FreeRTOS/Source/portable/IAR/ARM_CM0/port.c
index c34573f6de393197412d392bb06e89d66afb8ce7..1963223ed9e60ce239740b716c5a44a8530e2285 100644 (file)
--- a/FreeRTOS/Source/portable/IAR/ARM_CM0/port.c
+++ b/FreeRTOS/Source/portable/IAR/ARM_CM0/port.c
@@ -56,19 +56,19 @@
     ***************************************************************************\r
 \r
 \r
-    http://www.FreeRTOS.org - Documentation, books, training, latest versions, \r
+    http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
     license and Real Time Engineers Ltd. contact details.\r
 \r
     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
     including FreeRTOS+Trace - an indispensable productivity tool, and our new\r
     fully thread aware and reentrant UDP/IP stack.\r
 \r
-    http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High \r
-    Integrity Systems, who sell the code with commercial support, \r
+    http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
+    Integrity Systems, who sell the code with commercial support,\r
     indemnification and middleware, under the OpenRTOS brand.\r
-    \r
-    http://www.SafeRTOS.com - High Integrity Systems also provide a safety \r
-    engineered and independently SIL3 certified version for use in safety and \r
+\r
+    http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+    engineered and independently SIL3 certified version for use in safety and\r
     mission critical applications that require provable dependability.\r
 */\r
 \r
@@ -76,6 +76,9 @@
  * Implementation of functions defined in portable.h for the ARM CM0 port.\r
  *----------------------------------------------------------*/\r
 \r
+/* IAR includes. */\r
+#include "intrinsics.h"\r
+\r
 /* Scheduler includes. */\r
 #include "FreeRTOS.h"\r
 #include "task.h"\r
@@ -83,12 +86,10 @@
 /* Constants required to manipulate the NVIC. */\r
 #define portNVIC_SYSTICK_CTRL          ( ( volatile unsigned long *) 0xe000e010 )\r
 #define portNVIC_SYSTICK_LOAD          ( ( volatile unsigned long *) 0xe000e014 )\r
-#define portNVIC_INT_CTRL                      ( ( volatile unsigned long *) 0xe000ed04 )\r
 #define portNVIC_SYSPRI2                       ( ( volatile unsigned long *) 0xe000ed20 )\r
 #define portNVIC_SYSTICK_CLK           0x00000004\r
 #define portNVIC_SYSTICK_INT           0x00000002\r
 #define portNVIC_SYSTICK_ENABLE                0x00000001\r
-#define portNVIC_PENDSVSET                     0x10000000\r
 #define portMIN_INTERRUPT_PRIORITY     ( 255UL )\r
 #define portNVIC_PENDSV_PRI                    ( portMIN_INTERRUPT_PRIORITY << 16UL )\r
 #define portNVIC_SYSTICK_PRI           ( portMIN_INTERRUPT_PRIORITY << 24UL )\r
@@ -155,7 +156,7 @@ portBASE_TYPE xPortStartScheduler( void )
        /* Start the timer that generates the tick ISR.  Interrupts are disabled\r
        here already. */\r
        prvSetupTimerInterrupt();\r
-       \r
+\r
        /* Initialise the critical nesting count ready for the first task. */\r
        uxCriticalNesting = 0;\r
 \r
@@ -174,10 +175,15 @@ void vPortEndScheduler( void )
 }\r
 /*-----------------------------------------------------------*/\r
 \r
-void vPortYieldFromISR( void )\r
+void vPortYield( void )\r
 {\r
        /* Set a PendSV to request a context switch. */\r
        *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;\r
+\r
+       /* Barriers are normally not required but do ensure the code is completely\r
+       within the specified behaviour for the architecture. */\r
+       __DSB();\r
+       __ISB();\r
 }\r
 /*-----------------------------------------------------------*/\r
 \r
@@ -185,6 +191,8 @@ void vPortEnterCritical( void )
 {\r
        portDISABLE_INTERRUPTS();\r
        uxCriticalNesting++;\r
+       __DSB();\r
+       __ISB();\r
 }\r
 /*-----------------------------------------------------------*/\r
 \r
@@ -204,7 +212,7 @@ unsigned long ulDummy;
 \r
        /* If using preemption, also force a context switch. */\r
        #if configUSE_PREEMPTION == 1\r
-               *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;      \r
+               *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;\r
        #endif\r
 \r
        ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();\r

diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM0/portmacro.h b/FreeRTOS/Source/portable/IAR/ARM_CM0/portmacro.h
index cb5e953c7a6157485cb41b9f76832313ef3fceef..60cc8a1823f3146f193164b63a0163369261aac8 100644 (file)
--- a/FreeRTOS/Source/portable/IAR/ARM_CM0/portmacro.h
+++ b/FreeRTOS/Source/portable/IAR/ARM_CM0/portmacro.h
@@ -116,11 +116,11 @@ extern "C" {
 \r
 \r
 /* Scheduler utilities. */\r
-extern void vPortYieldFromISR( void );\r
-\r
-#define portYIELD()                                    vPortYieldFromISR()\r
-\r
-#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) vPortYieldFromISR()\r
+extern void vPortYield( void );\r
+#define portNVIC_INT_CTRL                      ( ( volatile unsigned long *) 0xe000ed04 )\r
+#define portNVIC_PENDSVSET                     0x10000000\r
+#define portYIELD()                                    vPortYield()\r
+#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired )         *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET\r
 /*-----------------------------------------------------------*/\r
 \r
 \r

diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM3/port.c b/FreeRTOS/Source/portable/IAR/ARM_CM3/port.c
index 5dd165086ad1bcbd7fda5ccdeda1897451776bf0..621c1420ed1cdbcd6fada9719abb49d5dc3e4fba 100644 (file)
--- a/FreeRTOS/Source/portable/IAR/ARM_CM3/port.c
+++ b/FreeRTOS/Source/portable/IAR/ARM_CM3/port.c
@@ -56,19 +56,19 @@
     ***************************************************************************\r
 \r
 \r
-    http://www.FreeRTOS.org - Documentation, books, training, latest versions, \r
+    http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
     license and Real Time Engineers Ltd. contact details.\r
 \r
     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
     including FreeRTOS+Trace - an indispensable productivity tool, and our new\r
     fully thread aware and reentrant UDP/IP stack.\r
 \r
-    http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High \r
-    Integrity Systems, who sell the code with commercial support, \r
+    http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
+    Integrity Systems, who sell the code with commercial support,\r
     indemnification and middleware, under the OpenRTOS brand.\r
-    \r
-    http://www.SafeRTOS.com - High Integrity Systems also provide a safety \r
-    engineered and independently SIL3 certified version for use in safety and \r
+\r
+    http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+    engineered and independently SIL3 certified version for use in safety and\r
     mission critical applications that require provable dependability.\r
 */\r
 \r
@@ -95,14 +95,12 @@
 #define portNVIC_SYSTICK_CTRL_REG                      ( * ( ( volatile unsigned long * ) 0xe000e010 ) )\r
 #define portNVIC_SYSTICK_LOAD_REG                      ( * ( ( volatile unsigned long * ) 0xe000e014 ) )\r
 #define portNVIC_SYSTICK_CURRENT_VALUE_REG     ( * ( ( volatile unsigned long * ) 0xe000e018 ) )\r
-#define portNVIC_INT_CTRL_REG                          ( * ( ( volatile unsigned long * ) 0xe000ed04 ) )\r
 #define portNVIC_SYSPRI2_REG                           ( * ( ( volatile unsigned long * ) 0xe000ed20 ) )\r
 /* ...then bits in the registers. */\r
 #define portNVIC_SYSTICK_CLK_BIT                       ( 1UL << 2UL )\r
 #define portNVIC_SYSTICK_INT_BIT                       ( 1UL << 1UL )\r
 #define portNVIC_SYSTICK_ENABLE_BIT                    ( 1UL << 0UL )\r
 #define portNVIC_SYSTICK_COUNT_FLAG_BIT                ( 1UL << 16UL )\r
-#define portNVIC_PENDSVSET_BIT                         ( 1UL << 28UL )\r
 #define portNVIC_PENDSVCLEAR_BIT                       ( 1UL << 27UL )\r
 #define portNVIC_PEND_SYSTICK_CLEAR_BIT                ( 1UL << 25UL )\r
 \r
@@ -219,10 +217,15 @@ void vPortEndScheduler( void )
 }\r
 /*-----------------------------------------------------------*/\r
 \r
-void vPortYieldFromISR( void )\r
+void vPortYield( void )\r
 {\r
        /* Set a PendSV to request a context switch. */\r
        portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;\r
+\r
+       /* Barriers are normally not required but do ensure the code is completely\r
+       within the specified behaviour for the architecture. */\r
+       __DSB();\r
+       __ISB();\r
 }\r
 /*-----------------------------------------------------------*/\r
 \r
@@ -230,6 +233,8 @@ void vPortEnterCritical( void )
 {\r
        portDISABLE_INTERRUPTS();\r
        uxCriticalNesting++;\r
+       __DSB();\r
+       __ISB();\r
 }\r
 /*-----------------------------------------------------------*/\r
 \r
@@ -336,6 +341,8 @@ void xPortSysTickHandler( void )
                        if( xModifiableIdleTime > 0 )\r
                        {\r
                                __WFI();\r
+                               __DSB();\r
+                               __ISB();\r
                        }\r
                        configPOST_SLEEP_PROCESSING( xExpectedIdleTime );\r
 \r

diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM3/portmacro.h b/FreeRTOS/Source/portable/IAR/ARM_CM3/portmacro.h
index 89897f63f0cbc4badc87015f8fe7130ecb942604..f470e73abdaf3fe93795b151a68fc52cd3e0199b 100644 (file)
--- a/FreeRTOS/Source/portable/IAR/ARM_CM3/portmacro.h
+++ b/FreeRTOS/Source/portable/IAR/ARM_CM3/portmacro.h
@@ -115,9 +115,11 @@ extern "C" {
 /*-----------------------------------------------------------*/        \r
 \r
 /* Scheduler utilities. */\r
-extern void vPortYieldFromISR( void );\r
-#define portYIELD()                                    vPortYieldFromISR()\r
-#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) vPortYieldFromISR()\r
+extern void vPortYield( void );\r
+#define portNVIC_INT_CTRL_REG          ( * ( ( volatile unsigned long * ) 0xe000ed04 ) )\r
+#define portNVIC_PENDSVSET_BIT         ( 1UL << 28UL )\r
+#define portYIELD()                                    vPortYield()\r
+#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT\r
 /*-----------------------------------------------------------*/\r
 \r
 /* Architecture specific optimisations. */\r

diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM4F/port.c b/FreeRTOS/Source/portable/IAR/ARM_CM4F/port.c
index 736de211aa9e7db40c21ee97b3e7528a7dc5f478..8df2df55c23364024f7262658d12de4ca7fff955 100644 (file)
--- a/FreeRTOS/Source/portable/IAR/ARM_CM4F/port.c
+++ b/FreeRTOS/Source/portable/IAR/ARM_CM4F/port.c
@@ -56,19 +56,19 @@
     ***************************************************************************\r
 \r
 \r
-    http://www.FreeRTOS.org - Documentation, books, training, latest versions, \r
+    http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
     license and Real Time Engineers Ltd. contact details.\r
 \r
     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
     including FreeRTOS+Trace - an indispensable productivity tool, and our new\r
     fully thread aware and reentrant UDP/IP stack.\r
 \r
-    http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High \r
-    Integrity Systems, who sell the code with commercial support, \r
+    http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
+    Integrity Systems, who sell the code with commercial support,\r
     indemnification and middleware, under the OpenRTOS brand.\r
-    \r
-    http://www.SafeRTOS.com - High Integrity Systems also provide a safety \r
-    engineered and independently SIL3 certified version for use in safety and \r
+\r
+    http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+    engineered and independently SIL3 certified version for use in safety and\r
     mission critical applications that require provable dependability.\r
 */\r
 \r
@@ -99,14 +99,12 @@
 #define portNVIC_SYSTICK_CTRL_REG                      ( * ( ( volatile unsigned long * ) 0xe000e010 ) )\r
 #define portNVIC_SYSTICK_LOAD_REG                      ( * ( ( volatile unsigned long * ) 0xe000e014 ) )\r
 #define portNVIC_SYSTICK_CURRENT_VALUE_REG     ( * ( ( volatile unsigned long * ) 0xe000e018 ) )\r
-#define portNVIC_INT_CTRL_REG                          ( * ( ( volatile unsigned long * ) 0xe000ed04 ) )\r
 #define portNVIC_SYSPRI2_REG                           ( * ( ( volatile unsigned long * ) 0xe000ed20 ) )\r
 /* ...then bits in the registers. */\r
 #define portNVIC_SYSTICK_CLK_BIT                       ( 1UL << 2UL )\r
 #define portNVIC_SYSTICK_INT_BIT                       ( 1UL << 1UL )\r
 #define portNVIC_SYSTICK_ENABLE_BIT                    ( 1UL << 0UL )\r
 #define portNVIC_SYSTICK_COUNT_FLAG_BIT                ( 1UL << 16UL )\r
-#define portNVIC_PENDSVSET_BIT                         ( 1UL << 28UL )\r
 #define portNVIC_PENDSVCLEAR_BIT                       ( 1UL << 27UL )\r
 #define portNVIC_PEND_SYSTICK_CLEAR_BIT                ( 1UL << 25UL )\r
 \r
@@ -244,10 +242,15 @@ void vPortEndScheduler( void )
 }\r
 /*-----------------------------------------------------------*/\r
 \r
-void vPortYieldFromISR( void )\r
+void vPortYield( void )\r
 {\r
        /* Set a PendSV to request a context switch. */\r
        portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;\r
+\r
+       /* Barriers are normally not required but do ensure the code is completely\r
+       within the specified behaviour for the architecture. */\r
+       __DSB();\r
+       __ISB();\r
 }\r
 /*-----------------------------------------------------------*/\r
 \r
@@ -255,6 +258,8 @@ void vPortEnterCritical( void )
 {\r
        portDISABLE_INTERRUPTS();\r
        uxCriticalNesting++;\r
+       __DSB();\r
+       __ISB();\r
 }\r
 /*-----------------------------------------------------------*/\r
 \r
@@ -361,6 +366,8 @@ void xPortSysTickHandler( void )
                        if( xModifiableIdleTime > 0 )\r
                        {\r
                                __WFI();\r
+                               __DSB();\r
+                               __ISB();\r
                        }\r
                        configPOST_SLEEP_PROCESSING( xExpectedIdleTime );\r
 \r

diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM4F/portmacro.h b/FreeRTOS/Source/portable/IAR/ARM_CM4F/portmacro.h
index 7d992bcc1f0118a0b12f575e93404749c5070288..edb2113a32168956838f0bf5c757ec4c8afef8fb 100644 (file)
--- a/FreeRTOS/Source/portable/IAR/ARM_CM4F/portmacro.h
+++ b/FreeRTOS/Source/portable/IAR/ARM_CM4F/portmacro.h
@@ -115,9 +115,11 @@ extern "C" {
 /*-----------------------------------------------------------*/        \r
 \r
 /* Scheduler utilities. */\r
-extern void vPortYieldFromISR( void );\r
-#define portYIELD()                                    vPortYieldFromISR()\r
-#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) vPortYieldFromISR()\r
+extern void vPortYield( void );\r
+#define portNVIC_INT_CTRL_REG          ( * ( ( volatile unsigned long * ) 0xe000ed04 ) )\r
+#define portNVIC_PENDSVSET_BIT         ( 1UL << 28UL )\r
+#define portYIELD()                                    vPortYield()\r
+#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT\r
 /*-----------------------------------------------------------*/\r
 \r
 /* Architecture specific optimisations. */\r

diff --git a/FreeRTOS/Source/portable/IAR/RL78/port.c b/FreeRTOS/Source/portable/IAR/RL78/port.c
index bb39445d1a3f502c31c0f3c6d3ec7fac2d6fb1d4..323606460c8257819a4abe05aaef926503db477c 100644 (file)
--- a/FreeRTOS/Source/portable/IAR/RL78/port.c
+++ b/FreeRTOS/Source/portable/IAR/RL78/port.c
@@ -112,16 +112,16 @@ volatile unsigned short usCriticalNesting = portINITIAL_CRITICAL_NESTING;
 \r
 /*\r
  * Sets up the periodic ISR used for the RTOS tick using the interval timer.\r
- * The application writer can define configSETUP_TIMER_INTERRUPT() (in\r
+ * The application writer can define configSETUP_TICK_INTERRUPT() (in\r
  * FreeRTOSConfig.h) such that their own tick interrupt configuration is used\r
  * in place of prvSetupTimerInterrupt().\r
  */\r
 static void prvSetupTimerInterrupt( void );\r
-#ifndef configSETUP_TIMER_INTERRUPT\r
+#ifndef configSETUP_TICK_INTERRUPT\r
        /* The user has not provided their own tick interrupt configuration so use\r
     the definition in this file (which uses the interval timer). */\r
-       #define configSETUP_TIMER_INTERRUPT() prvSetupTimerInterrupt()\r
-#endif /* configSETUP_TIMER_INTERRUPT */\r
+       #define configSETUP_TICK_INTERRUPT() prvSetupTimerInterrupt()\r
+#endif /* configSETUP_TICK_INTERRUPT */\r
 \r
 /*\r
  * Defined in portasm.s87, this function starts the scheduler by loading the\r
@@ -218,7 +218,7 @@ portBASE_TYPE xPortStartScheduler( void )
 {\r
        /* Setup the hardware to generate the tick.  Interrupts are disabled when\r
        this function is called. */\r
-       configSETUP_TIMER_INTERRUPT();\r
+       configSETUP_TICK_INTERRUPT();\r
 \r
        /* Restore the context of the first task that is going to run. */\r
        vPortStartFirstTask();\r
@@ -227,7 +227,7 @@ portBASE_TYPE xPortStartScheduler( void )
        prvSetupTimerInterrupt() is called here to prevent the compiler outputting\r
        a warning about a statically declared function not being referenced in the\r
        case that the application writer has provided their own tick interrupt\r
-       configuration routine (and defined configSETUP_TIMER_INTERRUPT() such that\r
+       configuration routine (and defined configSETUP_TICK_INTERRUPT() such that\r
        their own routine will be called in place of prvSetupTimerInterrupt()). */\r
        prvSetupTimerInterrupt();\r
        return pdTRUE;\r