uint32_t virtual, uint32_t *physical)
{
uint32_t cb;
- int domain;
- uint32_t ap;
struct arm720t_common *arm720t = target_to_arm720(target);
uint32_t ret;
int retval = armv4_5_mmu_translate_va(target,
- &arm720t->armv4_5_mmu, virtual, &cb, &domain, &ap, &ret);
+ &arm720t->armv4_5_mmu, virtual, &cb, &ret);
if (retval != ERROR_OK)
return retval;
*physical = ret;
uint32_t virt, uint32_t *phys)
{
uint32_t cb;
- int domain;
- uint32_t ap;
struct arm920t_common *arm920t = target_to_arm920(target);
uint32_t ret;
int retval = armv4_5_mmu_translate_va(target,
- &arm920t->armv4_5_mmu, virt, &cb, &domain, &ap, &ret);
+ &arm920t->armv4_5_mmu, virt, &cb, &ret);
if (retval != ERROR_OK)
return retval;
*phys = ret;
* by MMU
*/
uint32_t cb;
- int domain;
- uint32_t ap;
uint32_t pa;
/*
* We need physical address and cb
*/
retval = armv4_5_mmu_translate_va(target, &arm920t->armv4_5_mmu,
- address, &cb, &domain, &ap, &pa);
+ address, &cb, &pa);
if (retval != ERROR_OK)
return retval;
static int arm926ejs_virt2phys(struct target *target, uint32_t virtual, uint32_t *physical)
{
uint32_t cb;
- int domain;
- uint32_t ap;
struct arm926ejs_common *arm926ejs = target_to_arm926(target);
uint32_t ret;
int retval = armv4_5_mmu_translate_va(target, &arm926ejs->armv4_5_mmu,
- virtual, &cb, &domain, &ap, &ret);
+ virtual, &cb, &ret);
if (retval != ERROR_OK)
return retval;
*physical = ret;
#include "armv4_5_mmu.h"
-int armv4_5_mmu_translate_va(struct target *target, struct armv4_5_mmu_common *armv4_5_mmu, uint32_t va, uint32_t *cb, int *domain, uint32_t *ap, uint32_t *val)
+int armv4_5_mmu_translate_va(struct target *target, struct armv4_5_mmu_common *armv4_5_mmu, uint32_t va, uint32_t *cb, uint32_t *val)
{
uint32_t first_lvl_descriptor = 0x0;
uint32_t second_lvl_descriptor = 0x0;
return ERROR_TARGET_TRANSLATION_FAULT;
}
- /* domain is always specified in bits 8-5 */
- *domain = (first_lvl_descriptor & 0x1e0) >> 5;
-
if ((first_lvl_descriptor & 0x3) == 2)
{
/* section descriptor */
*cb = (first_lvl_descriptor & 0xc) >> 2;
- *ap = (first_lvl_descriptor & 0xc00) >> 10;
*val = (first_lvl_descriptor & 0xfff00000) | (va & 0x000fffff);
return ERROR_OK;
}
if ((second_lvl_descriptor & 0x3) == 1)
{
/* large page descriptor */
- *ap = (second_lvl_descriptor & 0xff0) >> 4;
*val = (second_lvl_descriptor & 0xffff0000) | (va & 0x0000ffff);
return ERROR_OK;
}
if ((second_lvl_descriptor & 0x3) == 2)
{
/* small page descriptor */
- *ap = (second_lvl_descriptor & 0xff0) >> 4;
*val = (second_lvl_descriptor & 0xfffff000) | (va & 0x00000fff);
return ERROR_OK;
}
if ((second_lvl_descriptor & 0x3) == 3)
{
/* tiny page descriptor */
- *ap = (second_lvl_descriptor & 0x30) >> 4;
*val = (second_lvl_descriptor & 0xfffffc00) | (va & 0x000003ff);
return ERROR_OK;
}
int armv4_5_mmu_translate_va(struct target *target,
struct armv4_5_mmu_common *armv4_5_mmu, uint32_t va,
- uint32_t *cb, int *domain, uint32_t *ap, uint32_t *val);
+ uint32_t *cb, uint32_t *val);
int armv4_5_mmu_read_physical(struct target *target,
struct armv4_5_mmu_common *armv4_5_mmu,
uint32_t virt, uint32_t *phys)
{
uint32_t cb;
- int domain;
- uint32_t ap;
struct cortex_a8_common *cortex_a8 = target_to_cortex_a8(target);
// struct armv7a_common *armv7a = &cortex_a8->armv7a_common;
struct armv7a_common *armv7a = target_to_armv7a(target);
cortex_a8->current_address_mode = ARM_MODE_SVC;
uint32_t ret;
int retval = armv4_5_mmu_translate_va(target,
- &armv7a->armv4_5_mmu, virt, &cb, &domain, &ap, &ret);
+ &armv7a->armv4_5_mmu, virt, &cb, &ret);
if (retval != ERROR_OK)
return retval;
/* Reset the flag. We don't want someone else to use it by error */
{
struct xscale_common *xscale = target_to_xscale(target);
uint32_t cb;
- int domain;
- uint32_t ap;
if (xscale->common_magic != XSCALE_COMMON_MAGIC) {
LOG_ERROR(xscale_not);
uint32_t ret;
int retval = armv4_5_mmu_translate_va(target, &xscale->armv4_5_mmu,
- virtual, &cb, &domain, &ap, &ret);
+ virtual, &cb, &ret);
if (retval != ERROR_OK)
return retval;
*physical = ret;