--- /dev/null
+/*\r
+ FreeRTOS V7.0.1 - Copyright (C) 2011 Real Time Engineers Ltd.\r
+\r
+\r
+ FreeRTOS supports many tools and architectures. V7.0.0 is sponsored by:\r
+ Atollic AB - Atollic provides professional embedded systems development\r
+ tools for C/C++ development, code analysis and test automation.\r
+ See http://www.atollic.com\r
+\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS tutorial books are available in pdf and paperback. *\r
+ * Complete, revised, and edited pdf reference manuals are also *\r
+ * available. *\r
+ * *\r
+ * Purchasing FreeRTOS documentation will not only help you, by *\r
+ * ensuring you get running as quickly as possible and with an *\r
+ * in-depth knowledge of how to use FreeRTOS, it will also help *\r
+ * the FreeRTOS project to continue with its mission of providing *\r
+ * professional grade, cross platform, de facto standard solutions *\r
+ * for microcontrollers - completely free of charge! *\r
+ * *\r
+ * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
+ * *\r
+ * Thank you for using FreeRTOS, and thank you for your support! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+ >>>NOTE<<< The modification to the GPL is included to allow you to\r
+ distribute a combined work that includes FreeRTOS without being obliged to\r
+ provide the source code for proprietary components outside of the FreeRTOS\r
+ kernel. FreeRTOS is distributed in the hope that it will be useful, but\r
+ WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details. You should have received a copy of the GNU General Public\r
+ License and the FreeRTOS license exception along with FreeRTOS; if not it\r
+ can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
+ by writing to Richard Barry, contact details for whom are available on the\r
+ FreeRTOS WEB site.\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and\r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety\r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting,\r
+ licensing and training services.\r
+*/\r
+\r
+#include "FreeRTOSConfig.h"\r
+\r
+ .extern pxCurrentTCB\r
+ .extern XIntc_DeviceInterruptHandler\r
+ .extern vTaskSwitchContext\r
+ .extern uxCriticalNesting\r
+ .extern pulISRStack\r
+\r
+ .global _interrupt_handler\r
+ .global VPortYieldASM\r
+ .global vPortStartFirstTask\r
+\r
+\r
+.macro portSAVE_CONTEXT\r
+\r
+ /* Make room for the context on the stack. */\r
+ addik r1, r1, -132\r
+\r
+ /* Save r31 so it can then be used as a temporary. */\r
+ swi r31, r1, 4\r
+\r
+ /* Copy the msr into r31 - this is stacked later. */\r
+ mfs r31, rmsr\r
+\r
+ /* Stack general registers. */\r
+ swi r30, r1, 12\r
+ swi r29, r1, 16\r
+ swi r28, r1, 20\r
+ swi r27, r1, 24\r
+ swi r26, r1, 28\r
+ swi r25, r1, 32\r
+ swi r24, r1, 36\r
+ swi r23, r1, 40\r
+ swi r22, r1, 44\r
+ swi r21, r1, 48\r
+ swi r20, r1, 52\r
+ swi r19, r1, 56\r
+ swi r18, r1, 60\r
+ swi r17, r1, 64\r
+ swi r16, r1, 68\r
+ swi r15, r1, 72\r
+ swi r13, r1, 80\r
+ swi r12, r1, 84\r
+ swi r11, r1, 88\r
+ swi r10, r1, 92\r
+ swi r9, r1, 96\r
+ swi r8, r1, 100\r
+ swi r7, r1, 104\r
+ swi r6, r1, 108\r
+ swi r5, r1, 112\r
+ swi r4, r1, 116\r
+ swi r3, r1, 120\r
+ swi r2, r1, 124\r
+\r
+ /* Stack the critical section nesting value. */\r
+ lwi r3, r0, uxCriticalNesting\r
+ swi r3, r1, 128\r
+\r
+ /* Save the top of stack value to the TCB. */\r
+ lwi r3, r0, pxCurrentTCB\r
+ sw r1, r0, r3\r
+ \r
+ .endm\r
+\r
+.macro portRESTORE_CONTEXT\r
+\r
+ /* Load the top of stack value from the TCB. */\r
+ lwi r3, r0, pxCurrentTCB\r
+ lw r1, r0, r3 \r
+\r
+ /* Restore the general registers. */\r
+ lwi r31, r1, 4 \r
+ lwi r30, r1, 12 \r
+ lwi r29, r1, 16 \r
+ lwi r28, r1, 20 \r
+ lwi r27, r1, 24 \r
+ lwi r26, r1, 28 \r
+ lwi r25, r1, 32 \r
+ lwi r24, r1, 36 \r
+ lwi r23, r1, 40 \r
+ lwi r22, r1, 44 \r
+ lwi r21, r1, 48 \r
+ lwi r20, r1, 52 \r
+ lwi r19, r1, 56 \r
+ lwi r18, r1, 60 \r
+ lwi r17, r1, 64 \r
+ lwi r16, r1, 68 \r
+ lwi r15, r1, 72 \r
+ lwi r14, r1, 76 \r
+ lwi r13, r1, 80 \r
+ lwi r12, r1, 84 \r
+ lwi r11, r1, 88 \r
+ lwi r10, r1, 92 \r
+ lwi r9, r1, 96 \r
+ lwi r8, r1, 100 \r
+ lwi r7, r1, 104\r
+ lwi r6, r1, 108\r
+ lwi r5, r1, 112\r
+ lwi r4, r1, 116\r
+ lwi r2, r1, 124\r
+\r
+ /* Reload the rmsr from the stack. */\r
+ lwi r3, r1, 8\r
+ mts rmsr, r3\r
+\r
+ /* Load the critical nesting value. */\r
+ lwi r3, r1, 128\r
+ swi r3, r0, uxCriticalNesting\r
+\r
+ /* Test the critical nesting value. If it is non zero then the task last\r
+ exited the running state using a yield. If it is zero, then the task\r
+ last exited the running state through an interrupt. */\r
+ xori r3, r3, 0\r
+ bnei r3, exit_from_yield\r
+\r
+ /* r3 was being used as a temporary. Now restore its true value from the\r
+ stack. */\r
+ lwi r3, r1, 120\r
+\r
+ /* Remove the stack frame. */\r
+ addik r1, r1, 132\r
+\r
+ /* Return using rtid so interrupts are re-enabled as this function is\r
+ exited. */\r
+ rtid r14, 0\r
+ or r0, r0, r0\r
+\r
+ .endm\r
+\r
+ .text\r
+ .align 2\r
+\r
+/* This function is used to exit portRESTORE_CONTEXT() if the task being\r
+returned to last left the Running state by calling taskYIELD() (rather than\r
+being preempted by an interrupt. */\r
+exit_from_yield:\r
+\r
+ /* r3 was being used as a temporary. Now restore its true value from the\r
+ stack. */\r
+ lwi r3, r1, 120\r
+\r
+ /* Remove the stack frame. */\r
+ addik r1, r1, 132\r
+\r
+ /* Return to the task. */\r
+ rtsd r14, 0\r
+ or r0, r0, r0\r
+\r
+\r
+_interrupt_handler:\r
+\r
+ portSAVE_CONTEXT\r
+\r
+ /* Stack msr. */\r
+ swi r31, r1, 8\r
+\r
+ /* Stack the return address. */\r
+ swi r14, r1, 76\r
+\r
+ /* Switch to the ISR stack. */\r
+ lwi r1, r0, pulISRStack\r
+\r
+ /* The parameter to the interrupt handler. */\r
+ ori r5, r0, 0 _RB_configINTERRUPT_CONTROLLER_TO_USE\r
+\r
+ /* Execute any pending interrupts. */\r
+ bralid r15, XIntc_DeviceInterruptHandler\r
+ or r0, r0, r0\r
+\r
+ /* Restore the context of the next task scheduled to execute. */\r
+ portRESTORE_CONTEXT\r
+\r
+\r
+VPortYieldASM:\r
+\r
+ portSAVE_CONTEXT\r
+\r
+ /* Stack msr. */\r
+ swi r31, r1, 8\r
+\r
+ /* Modify the return address so a return is done to the instruction after\r
+ the call to VPortYieldASM. */\r
+ addi r14, r14, 8\r
+ swi r14, r1, 76\r
+\r
+ /* Switch to use the ISR stack. */\r
+ lwi r1, r0, pulISRStack\r
+\r
+ /* Select the next task to execute. */\r
+ bralid r15, vTaskSwitchContext\r
+ or r0, r0, r0\r
+\r
+ /* Restore the context of the next task scheduled to execute. */\r
+ portRESTORE_CONTEXT\r
+\r
+vPortStartFirstTask:\r
+\r
+ portRESTORE_CONTEXT\r
+ \r
+ \r
+\r
+\r
+\r
+\r
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