Paulius Zaleckas <paulius.zaleckas@gmail.com> Add config for CS351x CPUs

git-svn-id: svn://svn.berlios.de/openocd/trunk@2349 b42882b7-edfa-0310-969c-e2dbd0fdcd60

diff --git a/tcl/target/cs351x.cfg b/tcl/target/cs351x.cfg
new file mode 100644 (file)
index 0000000..51631d3
--- /dev/null
+++ b/tcl/target/cs351x.cfg
@@ -0,0 +1,30 @@
+if { [info exists CHIPNAME] } {        \r
+   set  _CHIPNAME $CHIPNAME    \r
+} else {        \r
+   set  _CHIPNAME cs351x\r
+}\r
+\r
+if { [info exists ENDIAN] } {  \r
+   set  _ENDIAN $ENDIAN    \r
+} else {        \r
+   set  _ENDIAN little\r
+}\r
+\r
+if { [info exists CPUTAPID ] } {\r
+   set _CPUTAPID $CPUTAPID\r
+} else {\r
+   set _CPUTAPID 0x00526fa1\r
+}\r
+\r
+jtag newtap $_CHIPNAME cpu  -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID\r
+\r
+# Create the GDB Target.\r
+set _TARGETNAME [format "%s.cpu" $_CHIPNAME]\r
+target create $_TARGETNAME fa526 -endian $_ENDIAN -chain-position $_TARGETNAME -variant fa526\r
+# There is 16K of SRAM on this chip\r
+# FIXME: flash programming is not working by using this work area. So comment this out for now.\r
+#$_TARGETNAME configure -work-area-virt 0x00000000 -work-area-phys 0x00000000 -work-area-size  0x4000 -work-area-backup 1\r
+\r
+# This chip has a DCC ... use it\r
+arm7_9 dcc_downloads enable\r
+\r