--- /dev/null
+# Hey Emacs, this is a -*- makefile -*-
+
+# Goals available on make command line:
+#
+# [all] Default goal: build the project.
+# clean Clean up the project.
+# rebuild Rebuild the project.
+# ccversion Display CC version information.
+# cppfiles file.i Generate preprocessed files from C source files.
+# asfiles file.x Generate preprocessed assembler files from C and assembler source files.
+# objfiles file.o Generate object files from C and assembler source files.
+# a file.a Archive: create A output file from object files.
+# elf file.elf Link: create ELF output file from object files.
+# lss file.lss Create extended listing from target output file.
+# sym file.sym Create symbol table from target output file.
+# bin file.bin Create binary image from ELF output file.
+# sizes Display target size information.
+# cpuinfo Get CPU information.
+# halt Stop CPU execution.
+# program Program MCU memory from ELF output file.
+# reset Reset CPU.
+# debug Open a debug connection with the MCU.
+# run Start CPU execution.
+# readregs Read CPU registers.
+# doc Build the documentation.
+# cleandoc Clean up the documentation.
+# rebuilddoc Rebuild the documentation.
+# verbose Display main executed commands.
+
+# Copyright (c) 2007, Atmel Corporation All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+# 1. Redistributions of source code must retain the above copyright notice, this
+# list of conditions and the following disclaimer.
+#
+# 2. Redistributions in binary form must reproduce the above copyright notice,
+# this list of conditions and the following disclaimer in the documentation and/
+# or other materials provided with the distribution.
+#
+# 3. The name of ATMEL may not be used to endorse or promote products derived
+# from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+# WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+# MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+# SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+# INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+# OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+# EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+
+# ** ** ** *** ** ** ** ** ** ** ** ** ** ** **
+# ENVIRONMENT SETTINGS
+# ** ** ** *** ** ** ** ** ** ** ** ** ** ** **
+
+FirstWord = $(if $(1),$(word 1,$(1)))
+LastWord = $(if $(1),$(word $(words $(1)),$(1)))
+
+MAKE = make
+MAKECFG = config.mk
+TGTTYPE = $(suffix $(TARGET))
+TGTFILE = $(PART)-$(TARGET)
+
+RM = rm -Rf
+
+AR = avr32-ar
+ARFLAGS = rcs
+
+CPP = $(CC) -E
+CPPFLAGS = -march=$(ARCH) -mpart=$(PART) $(WARNINGS) $(DEFS) \
+ $(PLATFORM_INC_PATH:%=-I%) $(INC_PATH:%=-I%) $(CPP_EXTRA_FLAGS)
+DPNDFILES = $(CSRCS:.c=.d) $(ASSRCS:.S=.d)
+CPPFILES = $(CSRCS:.c=.i)
+
+CC = avr32-gcc
+CFLAGS = $(DEBUG) $(OPTIMIZATION) $(C_EXTRA_FLAGS)
+ASFILES = $(CSRCS:.c=.x) $(ASSRCS:.S=.x)
+
+AS = avr32-as
+ASFLAGS = $(DEBUG) $(AS_EXTRA_FLAGS)
+OBJFILES = $(CSRCS:.c=.o) $(ASSRCS:.S=.o)
+
+LD = avr32-ld
+LDFLAGS = -march=$(ARCH) -mpart=$(PART) \
+ $(LIB_PATH:%=-L%) $(LINKER_SCRIPT:%=-T%) $(LD_EXTRA_FLAGS)
+LOADLIBES =
+LDLIBS = $(LIBS:%=-l%)
+
+OBJDUMP = avr32-objdump
+LSS = $(TGTFILE:$(TGTTYPE)=.lss)
+
+NM = avr32-nm
+SYM = $(TGTFILE:$(TGTTYPE)=.sym)
+
+OBJCOPY = avr32-objcopy
+BIN = $(TGTFILE:$(TGTTYPE)=.bin)
+
+SIZE = avr32-size
+
+SUDO = $(shell if [ -x /usr/bin/sudo ]; then echo sudo; fi)
+
+SLEEP = sleep
+SLEEPUSB = 9
+
+PROGRAM = avr32program
+
+DBGPROXY = avr32gdbproxy
+
+DOCGEN = doxygen
+
+
+# ** ** ** *** ** ** ** ** ** ** ** ** ** ** **
+# MESSAGES
+# ** ** ** *** ** ** ** ** ** ** ** ** ** ** **
+
+ERR_TARGET_TYPE = Target type not supported: `$(TGTTYPE)'
+MSG_CLEANING = Cleaning project.
+MSG_PREPROCESSING = Preprocessing \`$<\' to \`$@\'.
+MSG_COMPILING = Compiling \`$<\' to \`$@\'.
+MSG_ASSEMBLING = Assembling \`$<\' to \`$@\'.
+MSG_ARCHIVING = Archiving to \`$@\'.
+MSG_LINKING = Linking to \`$@\'.
+MSG_EXTENDED_LISTING = Creating extended listing to \`$@\'.
+MSG_SYMBOL_TABLE = Creating symbol table to \`$@\'.
+MSG_BINARY_IMAGE = Creating binary image to \`$@\'.
+MSG_GETTING_CPU_INFO = Getting CPU information.
+MSG_HALTING = Stopping CPU execution.
+MSG_PROGRAMMING = Programming MCU memory from \`$<\'.
+MSG_RESETTING = Resetting CPU.
+MSG_DEBUGGING = Opening debug connection with MCU.
+MSG_RUNNING = Starting CPU execution.
+MSG_READING_CPU_REGS = Reading CPU registers.
+MSG_CLEANING_DOC = Cleaning documentation.
+MSG_GENERATING_DOC = Generating documentation to \`$(DOC_PATH)\'.
+
+
+# ** ** ** *** ** ** ** ** ** ** ** ** ** ** **
+# MAKE RULES
+# ** ** ** *** ** ** ** ** ** ** ** ** ** ** **
+
+# Include the make configuration file.
+include $(MAKECFG)
+
+# ** ** TOP-LEVEL RULES ** **
+
+# Default goal: build the project.
+ifeq ($(TGTTYPE),.a)
+.PHONY: all
+all: ccversion a lss sym
+else
+ifeq ($(TGTTYPE),.elf)
+.PHONY: all
+all: ccversion elf lss sym bin sizes
+else
+$(error $(ERR_TARGET_TYPE))
+endif
+endif
+
+# Clean up the project.
+.PHONY: clean
+clean:
+ @echo $(MSG_CLEANING)
+ -$(VERBOSE_CMD)$(RM) $(BIN)
+ -$(VERBOSE_CMD)$(RM) $(SYM)
+ -$(VERBOSE_CMD)$(RM) $(LSS)
+ -$(VERBOSE_CMD)$(RM) $(TGTFILE)
+ -$(VERBOSE_CMD)$(RM) $(OBJFILES)
+ -$(VERBOSE_CMD)$(RM) $(ASFILES)
+ -$(VERBOSE_CMD)$(RM) $(CPPFILES)
+ -$(VERBOSE_CMD)$(RM) $(DPNDFILES)
+ $(VERBOSE_NL)
+
+# Rebuild the project.
+.PHONY: rebuild
+rebuild: clean all
+
+# Display CC version information.
+.PHONY: ccversion
+ccversion:
+ @echo
+ @echo
+ @$(CC) --version
+
+# Generate preprocessed files from C source files.
+.PHONY: cppfiles
+cppfiles: $(CPPFILES)
+
+# Generate preprocessed assembler files from C and assembler source files.
+.PHONY: asfiles
+asfiles: $(ASFILES)
+
+# Generate object files from C and assembler source files.
+.PHONY: objfiles
+objfiles: $(OBJFILES)
+
+ifeq ($(TGTTYPE),.a)
+# Archive: create A output file from object files.
+.PHONY: a
+a: $(TGTFILE)
+else
+ifeq ($(TGTTYPE),.elf)
+# Link: create ELF output file from object files.
+.PHONY: elf
+elf: $(TGTFILE)
+endif
+endif
+
+# Create extended listing from target output file.
+.PHONY: lss
+lss: $(LSS)
+
+# Create symbol table from target output file.
+.PHONY: sym
+sym: $(SYM)
+
+ifeq ($(TGTTYPE),.elf)
+# Create binary image from ELF output file.
+.PHONY: bin
+bin: $(BIN)
+endif
+
+# Display target size information.
+.PHONY: sizes
+sizes: $(TGTFILE)
+ @echo
+ @echo
+ @$(SIZE) -Ax $<
+
+ifeq ($(TGTTYPE),.elf)
+
+# Get CPU information.
+.PHONY: cpuinfo
+cpuinfo:
+ @echo
+ @echo $(MSG_GETTING_CPU_INFO)
+ $(VERBOSE_CMD)$(SUDO) $(PROGRAM) -cUSB cpuinfo
+ifneq ($(call LastWord,$(filter cpuinfo program reset debug run readregs,$(MAKECMDGOALS))),cpuinfo)
+ @$(SLEEP) $(SLEEPUSB)
+else
+ @echo
+endif
+
+# Stop CPU execution.
+.PHONY: halt
+halt:
+ifeq ($(filter cpuinfo program reset run readregs,$(MAKECMDGOALS)),)
+ @echo
+ @echo $(MSG_HALTING)
+ $(VERBOSE_CMD)$(SUDO) $(PROGRAM) -cUSB halt
+ifneq ($(call LastWord,$(filter halt debug,$(MAKECMDGOALS))),halt)
+ @$(SLEEP) $(SLEEPUSB)
+else
+ @echo
+endif
+else
+ @echo > /dev/null
+endif
+
+# Program MCU memory from ELF output file.
+.PHONY: program
+program: $(TGTFILE)
+ @echo
+ @echo $(MSG_PROGRAMMING)
+ $(VERBOSE_CMD)$(SUDO) $(PROGRAM) -cUSB program $(FLASH:%=-f%) -e -v -R $(if $(findstring run,$(MAKECMDGOALS)),-r) $<
+ifneq ($(call LastWord,$(filter cpuinfo program debug readregs,$(MAKECMDGOALS))),program)
+ @$(SLEEP) $(SLEEPUSB)
+else
+ @echo
+endif
+
+# Reset CPU.
+.PHONY: reset
+reset:
+ifeq ($(filter program run,$(MAKECMDGOALS)),)
+ @echo
+ @echo $(MSG_RESETTING)
+ $(VERBOSE_CMD)$(SUDO) $(PROGRAM) -cUSB reset
+ifneq ($(call LastWord,$(filter cpuinfo reset debug readregs,$(MAKECMDGOALS))),reset)
+ @$(SLEEP) $(SLEEPUSB)
+else
+ @echo
+endif
+else
+ @echo > /dev/null
+endif
+
+# Open a debug connection with the MCU.
+.PHONY: debug
+debug:
+ @echo
+ @echo $(MSG_DEBUGGING)
+ $(VERBOSE_CMD)$(SUDO) $(DBGPROXY) -cUSB $(patsubst cfi@%,-f%,$(FLASH:internal@%=-f%))
+ifneq ($(call LastWord,$(filter cpuinfo halt program reset debug run readregs,$(MAKECMDGOALS))),debug)
+ @$(SLEEP) $(SLEEPUSB)
+else
+ @echo
+endif
+
+# Start CPU execution.
+.PHONY: run
+run:
+ifeq ($(findstring program,$(MAKECMDGOALS)),)
+ @echo
+ @echo $(MSG_RUNNING)
+ $(VERBOSE_CMD)$(SUDO) $(PROGRAM) -cUSB run $(if $(findstring reset,$(MAKECMDGOALS)),-R)
+ifneq ($(call LastWord,$(filter cpuinfo debug run readregs,$(MAKECMDGOALS))),run)
+ @$(SLEEP) $(SLEEPUSB)
+else
+ @echo
+endif
+else
+ @echo > /dev/null
+endif
+
+# Read CPU registers.
+.PHONY: readregs
+readregs:
+ @echo
+ @echo $(MSG_READING_CPU_REGS)
+ $(VERBOSE_CMD)$(SUDO) $(PROGRAM) -cUSB readregs
+ifneq ($(call LastWord,$(filter cpuinfo program reset debug run readregs,$(MAKECMDGOALS))),readregs)
+ @$(SLEEP) $(SLEEPUSB)
+else
+ @echo
+endif
+
+endif
+
+# Build the documentation.
+.PHONY: doc
+doc:
+ @echo
+ @echo $(MSG_GENERATING_DOC)
+ $(VERBOSE_CMD)cd $(dir $(DOC_CFG)) && $(DOCGEN) $(notdir $(DOC_CFG))
+ @echo
+
+# Clean up the documentation.
+.PHONY: cleandoc
+cleandoc:
+ @echo $(MSG_CLEANING_DOC)
+ -$(VERBOSE_CMD)$(RM) $(DOC_PATH)
+ $(VERBOSE_NL)
+
+# Rebuild the documentation.
+.PHONY: rebuilddoc
+rebuilddoc: cleandoc doc
+
+# Display main executed commands.
+.PHONY: verbose
+ifeq ($(MAKECMDGOALS),verbose)
+verbose: all
+else
+verbose:
+ @echo > /dev/null
+endif
+ifneq ($(findstring verbose,$(MAKECMDGOALS)),)
+# Prefix displaying the following command if and only if verbose is a goal.
+VERBOSE_CMD =
+# New line displayed if and only if verbose is a goal.
+VERBOSE_NL = @echo
+else
+VERBOSE_CMD = @
+VERBOSE_NL =
+endif
+
+# ** ** COMPILATION RULES ** **
+
+# Include silently the dependency files.
+-include $(DPNDFILES)
+
+# The dependency files are not built alone but along with first generation files.
+$(DPNDFILES):
+
+# First generation files depend on make files.
+$(CPPFILES) $(ASFILES) $(OBJFILES): Makefile $(MAKECFG)
+
+ifeq ($(TGTTYPE),.elf)
+# Files resulting from linking depend on linker script.
+$(TGTFILE): $(LINKER_SCRIPT)
+endif
+
+# Preprocess: create preprocessed files from C source files.
+%.i: %.c %.d
+ @echo $(MSG_PREPROCESSING)
+ $(VERBOSE_CMD)$(CPP) $(CPPFLAGS) -MD -MP -MT '$*.i $*.x $*.o' -o $@ $<
+ @touch $*.d
+ @touch $@
+ $(VERBOSE_NL)
+
+# Preprocess & compile: create assembler files from C source files.
+%.x: %.c %.d
+ @echo $(MSG_COMPILING)
+ $(VERBOSE_CMD)$(CC) -S $(CPPFLAGS) -MD -MP -MT '$*.i $*.o' $(CFLAGS) -o $@ $<
+ @touch $*.d
+ @touch $@
+ $(VERBOSE_NL)
+
+# Preprocess: create preprocessed files from assembler source files.
+%.x: %.S %.d
+ @echo $(MSG_PREPROCESSING)
+ $(VERBOSE_CMD)$(CPP) $(CPPFLAGS) -MD -MP -MT '$*.x $*.o' -o $@ $<
+ @touch $*.d
+ @touch $@
+ $(VERBOSE_NL)
+
+# Preprocess, compile & assemble: create object files from C source files.
+%.o: %.c %.d
+ @echo $(MSG_COMPILING)
+ $(VERBOSE_CMD)$(CC) -c $(CPPFLAGS) -MD -MP -MT '$*.i $*.x' $(CFLAGS) -o $@ $<
+ @touch $*.d
+ @touch $@
+ $(VERBOSE_NL)
+
+# Preprocess & assemble: create object files from assembler source files.
+%.o: %.S %.d
+ @echo $(MSG_ASSEMBLING)
+ $(VERBOSE_CMD)$(CC) -c $(CPPFLAGS) -MD -MP -MT '$*.x' $(ASFLAGS) -o $@ $<
+ @touch $*.d
+ @touch $@
+ $(VERBOSE_NL)
+
+.PRECIOUS: $(OBJFILES)
+ifeq ($(TGTTYPE),.a)
+# Archive: create A output file from object files.
+.SECONDARY: $(TGTFILE)
+$(TGTFILE): $(OBJFILES)
+ @echo $(MSG_ARCHIVING)
+ $(VERBOSE_CMD)$(AR) $(ARFLAGS) $@ $(filter %.o,$+)
+ $(VERBOSE_NL)
+else
+ifeq ($(TGTTYPE),.elf)
+# Link: create ELF output file from object files.
+.SECONDARY: $(TGTFILE)
+$(TGTFILE): $(OBJFILES)
+ @echo $(MSG_LINKING)
+ $(VERBOSE_CMD)$(CC) $(LDFLAGS) $(filter %.o,$+) $(LOADLIBES) $(LDLIBS) -o $@
+ $(VERBOSE_NL)
+endif
+endif
+
+# Create extended listing from target output file.
+$(LSS): $(TGTFILE)
+ @echo $(MSG_EXTENDED_LISTING)
+ $(VERBOSE_CMD)$(OBJDUMP) -h -S $< > $@
+ $(VERBOSE_NL)
+
+# Create symbol table from target output file.
+$(SYM): $(TGTFILE)
+ @echo $(MSG_SYMBOL_TABLE)
+ $(VERBOSE_CMD)$(NM) -n $< > $@
+ $(VERBOSE_NL)
+
+ifeq ($(TGTTYPE),.elf)
+# Create binary image from ELF output file.
+$(BIN): $(TGTFILE)
+ @echo $(MSG_BINARY_IMAGE)
+ $(VERBOSE_CMD)$(OBJCOPY) -O binary $< $@
+ $(VERBOSE_NL)
+endif
--- /dev/null
+# Hey Emacs, this is a -*- makefile -*-
+
+# The purpose of this file is to define the build configuration variables used
+# by the generic Makefile. See Makefile header for further information.
+
+# Copyright (c) 2007, Atmel Corporation All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+# 1. Redistributions of source code must retain the above copyright notice, this
+# list of conditions and the following disclaimer.
+#
+# 2. Redistributions in binary form must reproduce the above copyright notice,
+# this list of conditions and the following disclaimer in the documentation and/
+# or other materials provided with the distribution.
+#
+# 3. The name of ATMEL may not be used to endorse or promote products derived
+# from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+# WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+# MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+# SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+# INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+# OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+# EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+
+# Base paths
+PRJ_PATH = ../..
+APPS_PATH = $(PRJ_PATH)/APPLICATIONS
+BRDS_PATH = $(PRJ_PATH)/BOARDS
+COMP_PATH = $(PRJ_PATH)/COMPONENTS
+DRVR_PATH = $(PRJ_PATH)/DRIVERS
+SERV_PATH = $(PRJ_PATH)/SERVICES
+UTIL_PATH = $(PRJ_PATH)/UTILS
+
+# CPU architecture: {ap|uc}
+ARCH = uc
+
+# Part: {none|ap7000|ap7010|ap7020|uc3a0256|uc3a0512|uc3a1128|uc3a1256|uc3a1512}
+PART = uc3a0512
+
+# Flash memories: [type@address,size]...
+FLASH = internal@0x80000000,512Kb
+
+# Device/Platform/Board include path
+PLATFORM_INC_PATH = \
+ $(BRDS_PATH)/
+
+# Target name: {*.a|*.elf}
+TARGET = rtosdemo.elf
+
+# Definitions: [-D name[=definition]...] [-U name...]
+# Things that might be added to DEFS:
+# BOARD Board used: {EVK1100}
+DEFS = -D BOARD=EVK1100
+
+# Include path
+INC_PATH = \
+ $(UTIL_PATH)/ \
+ $(UTIL_PATH)/PREPROCESSOR/ \
+ $(DRVR_PATH)/INTC/ \
+ $(DRVR_PATH)/PM/ \
+ $(DRVR_PATH)/GPIO/ \
+ $(DRVR_PATH)/TC/ \
+ ../../../../Source/portable/GCC/AVR32_UC3/ \
+ ../../../../Source/include/ \
+ ../../../Common/include/ \
+ ../../
+
+# C source files
+CSRCS = \
+ $(BRDS_PATH)/EVK1100/led.c \
+ $(DRVR_PATH)/INTC/intc.c \
+ $(DRVR_PATH)/PM/pm.c \
+ $(DRVR_PATH)/GPIO/gpio.c \
+ $(DRVR_PATH)/TC/tc.c \
+ ../../../../Source/portable/GCC/AVR32_UC3/port.c \
+ ../../../../Source/portable/MemMang/heap_3.c \
+ ../../../../Source/list.c \
+ ../../../../Source/queue.c \
+ ../../../../Source/tasks.c \
+ ../../../Common/Minimal/BlockQ.c \
+ ../../../Common/Minimal/comtest.c \
+ ../../../Common/Minimal/death.c \
+ ../../../Common/Minimal/dynamic.c \
+ ../../../Common/Minimal/flash.c \
+ ../../../Common/Minimal/flop.c \
+ ../../../Common/Minimal/integer.c \
+ ../../../Common/Minimal/PollQ.c \
+ ../../../Common/Minimal/semtest.c \
+ ../../ParTest/ParTest.c \
+ ../../serial/serial.c \
+ ../../main.c
+
+# Assembler source files
+ASSRCS = \
+ ../../../../Source/portable/GCC/AVR32_UC3/exception.S
+
+# Library path
+LIB_PATH =
+
+# Libraries to link with the project
+LIBS =
+
+# Linker script file if any
+LINKER_SCRIPT =
+
+# Options to request or suppress warnings: [-fsyntax-only] [-pedantic[-errors]] [-w] [-Wwarning...]
+# For further details, refer to the chapter "GCC Command Options" of the GCC manual.
+WARNINGS = -Wall
+
+# Options for debugging: [-g]...
+# For further details, refer to the chapter "GCC Command Options" of the GCC manual.
+DEBUG = -g
+
+# Options that control optimization: [-O[0|1|2|3|s]]...
+# For further details, refer to the chapter "GCC Command Options" of the GCC manual.
+OPTIMIZATION = -O0 -ffunction-sections -fdata-sections
+
+# Extra flags to use when preprocessing
+CPP_EXTRA_FLAGS =
+
+# Extra flags to use when compiling
+C_EXTRA_FLAGS =
+
+# Extra flags to use when assembling
+AS_EXTRA_FLAGS =
+
+# Extra flags to use when linking
+LD_EXTRA_FLAGS = -Wl,--gc-sections
+
+# Documentation path
+DOC_PATH = \
+ ../../DOC/
+
+# Documentation configuration file
+DOC_CFG = \
+ ../../doxyfile.doxygen
--- /dev/null
+target extended-remote :1024
+symbol uc3a0512-rtosdemo.elf
+
+b _handle_Unrecoverable_Exception
+b _handle_TLB_Multiple_Hit
+b _handle_Bus_Error_Data_Fetch
+b _handle_Bus_Error_Instruction_Fetch
+b _handle_NMI
+b _handle_Instruction_Address
+b _handle_ITLB_Protection
+b _handle_Breakpoint
+b _handle_Illegal_Opcode
+b _handle_Unimplemented_Instruction
+b _handle_Privilege_Violation
+b _handle_Floating_Point
+b _handle_Coprocessor_Absent
+b _handle_Data_Address_Read
+b _handle_Data_Address_Write
+b _handle_DTLB_Protection_Read
+b _handle_DTLB_Protection_Write
+b _handle_DTLB_Modified
+b _handle_ITLB_Miss
+b _handle_DTLB_Miss_Read
+b _handle_DTLB_Miss_Write
+
+define current_task
+printf "Task name: %s\n", ((tskTCB *)pxCurrentTCB)->pcTaskName
+printf "pxTopOfStack: %x\n", ((tskTCB *)pxCurrentTCB)->pxTopOfStack
+end
--- /dev/null
+<?xml version="1.0" encoding="iso-8859-1"?>\r
+\r
+<project>\r
+ <fileVersion>1</fileVersion>\r
+ <configuration>\r
+ <name>Debug</name>\r
+ <toolchain>\r
+ <name>AVR32</name>\r
+ </toolchain>\r
+ <debug>1</debug>\r
+ <settings>\r
+ <name>C-SPY</name>\r
+ <archiveVersion>2</archiveVersion>\r
+ <data>\r
+ <version>0</version>\r
+ <wantNonLocal>1</wantNonLocal>\r
+ <debug>1</debug>\r
+ <option>\r
+ <name>CMandatory</name>\r
+ <state>1</state>\r
+ </option>\r
+ <option>\r
+ <name>CInput</name>\r
+ <state>1</state>\r
+ </option>\r
+ <option>\r
+ <name>CCore</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>CRunToEnable</name>\r
+ <state>1</state>\r
+ </option>\r
+ <option>\r
+ <name>CRunToName</name>\r
+ <state>main</state>\r
+ </option>\r
+ <option>\r
+ <name>CMacOverride</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>CMacFile</name>\r
+ <state></state>\r
+ </option>\r
+ <option>\r
+ <name>DynDriver</name>\r
+ <state>JTAGICEMKIIAVR32</state>\r
+ </option>\r
+ <option>\r
+ <name>DDFOverride</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>DDFFile</name>\r
+ <state>$TOOLKIT_DIR$\config\iouc3a0512.ddf</state>\r
+ </option>\r
+ <option>\r
+ <name>DebuggerUseUbrofResetVector</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>IExtraOptionsCheck</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>IExtraOptions</name>\r
+ <state></state>\r
+ </option>\r
+ </data>\r
+ </settings>\r
+ <settings>\r
+ <name>JTAGICEMKIIAVR32</name>\r
+ <archiveVersion>2</archiveVersion>\r
+ <data>\r
+ <version>0</version>\r
+ <wantNonLocal>1</wantNonLocal>\r
+ <debug>1</debug>\r
+ <option>\r
+ <name>CJtagIceMkIIMandatory</name>\r
+ <state>1</state>\r
+ </option>\r
+ <option>\r
+ <name>CJtagIceMkIIPeripherals</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>CJtagIceMkIIReset</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>CJtagIceMkIISWBreakpoints</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>CJtagIceMkIISuppressDownload</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>CJtagIceMkIIVerifyDownload</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>CJTagIceMkIICommunicationLogging</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>CJtagIceMkIICommLogFile</name>\r
+ <state></state>\r
+ </option>\r
+ <option>\r
+ <name>CJtagIceMkIIConnectionRage</name>\r
+ <version>0</version>\r
+ <state>2</state>\r
+ </option>\r
+ <option>\r
+ <name>CJtagIceMkIIConnectionPort</name>\r
+ <version>0</version>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>CJtagIceMkIIJtagFrequence</name>\r
+ <version>0</version>\r
+ <state>8</state>\r
+ </option>\r
+ <option>\r
+ <name>CJtagIceMkIIDaisyChain</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>CJtagIceMkIIDaisyChainBeforeDevices</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>CJtagIceMkIIDaisyChainBeforeBits</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>CJtagIceMkIIDaisyChainAfterDevices</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>CJtagIceMkIIDaisyChainAfterBits</name>\r
+ <state>0</state>\r
+ </option>\r
+ </data>\r
+ </settings>\r
+ <settings>\r
+ <name>SIMAVR32</name>\r
+ <archiveVersion>2</archiveVersion>\r
+ <data>\r
+ <version>0</version>\r
+ <wantNonLocal>1</wantNonLocal>\r
+ <debug>1</debug>\r
+ <option>\r
+ <name>CSimMandatory</name>\r
+ <state>1</state>\r
+ </option>\r
+ </data>\r
+ </settings>\r
+ <debuggerPlugins>\r
+ <plugin>\r
+ <file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ewplugin</file>\r
+ <loadFlag>1</loadFlag>\r
+ </plugin>\r
+ <plugin>\r
+ <file>$EW_DIR$\common\plugins\Orti\Orti.ewplugin</file>\r
+ <loadFlag>0</loadFlag>\r
+ </plugin>\r
+ <plugin>\r
+ <file>$EW_DIR$\common\plugins\Profiling\Profiling.ewplugin</file>\r
+ <loadFlag>1</loadFlag>\r
+ </plugin>\r
+ <plugin>\r
+ <file>$EW_DIR$\common\plugins\Stack\Stack.ewplugin</file>\r
+ <loadFlag>1</loadFlag>\r
+ </plugin>\r
+ </debuggerPlugins>\r
+ </configuration>\r
+ <configuration>\r
+ <name>Release</name>\r
+ <toolchain>\r
+ <name>AVR32</name>\r
+ </toolchain>\r
+ <debug>0</debug>\r
+ <settings>\r
+ <name>C-SPY</name>\r
+ <archiveVersion>2</archiveVersion>\r
+ <data>\r
+ <version>0</version>\r
+ <wantNonLocal>1</wantNonLocal>\r
+ <debug>0</debug>\r
+ <option>\r
+ <name>CMandatory</name>\r
+ <state>1</state>\r
+ </option>\r
+ <option>\r
+ <name>CInput</name>\r
+ <state>1</state>\r
+ </option>\r
+ <option>\r
+ <name>CCore</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>CRunToEnable</name>\r
+ <state>1</state>\r
+ </option>\r
+ <option>\r
+ <name>CRunToName</name>\r
+ <state>main</state>\r
+ </option>\r
+ <option>\r
+ <name>CMacOverride</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>CMacFile</name>\r
+ <state></state>\r
+ </option>\r
+ <option>\r
+ <name>DynDriver</name>\r
+ <state>JTAGICEMKIIAVR32</state>\r
+ </option>\r
+ <option>\r
+ <name>DDFOverride</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>DDFFile</name>\r
+ <state>$TOOLKIT_DIR$\config\iouc3a0512.ddf</state>\r
+ </option>\r
+ <option>\r
+ <name>DebuggerUseUbrofResetVector</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>IExtraOptionsCheck</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>IExtraOptions</name>\r
+ <state></state>\r
+ </option>\r
+ </data>\r
+ </settings>\r
+ <settings>\r
+ <name>JTAGICEMKIIAVR32</name>\r
+ <archiveVersion>2</archiveVersion>\r
+ <data>\r
+ <version>0</version>\r
+ <wantNonLocal>1</wantNonLocal>\r
+ <debug>0</debug>\r
+ <option>\r
+ <name>CJtagIceMkIIMandatory</name>\r
+ <state>1</state>\r
+ </option>\r
+ <option>\r
+ <name>CJtagIceMkIIPeripherals</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>CJtagIceMkIIReset</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>CJtagIceMkIISWBreakpoints</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>CJtagIceMkIISuppressDownload</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>CJtagIceMkIIVerifyDownload</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>CJTagIceMkIICommunicationLogging</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>CJtagIceMkIICommLogFile</name>\r
+ <state></state>\r
+ </option>\r
+ <option>\r
+ <name>CJtagIceMkIIConnectionRage</name>\r
+ <version>0</version>\r
+ <state>2</state>\r
+ </option>\r
+ <option>\r
+ <name>CJtagIceMkIIConnectionPort</name>\r
+ <version>0</version>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>CJtagIceMkIIJtagFrequence</name>\r
+ <version>0</version>\r
+ <state>8</state>\r
+ </option>\r
+ <option>\r
+ <name>CJtagIceMkIIDaisyChain</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>CJtagIceMkIIDaisyChainBeforeDevices</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>CJtagIceMkIIDaisyChainBeforeBits</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>CJtagIceMkIIDaisyChainAfterDevices</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>CJtagIceMkIIDaisyChainAfterBits</name>\r
+ <state>0</state>\r
+ </option>\r
+ </data>\r
+ </settings>\r
+ <settings>\r
+ <name>SIMAVR32</name>\r
+ <archiveVersion>2</archiveVersion>\r
+ <data>\r
+ <version>0</version>\r
+ <wantNonLocal>1</wantNonLocal>\r
+ <debug>0</debug>\r
+ <option>\r
+ <name>CSimMandatory</name>\r
+ <state>1</state>\r
+ </option>\r
+ </data>\r
+ </settings>\r
+ <debuggerPlugins>\r
+ <plugin>\r
+ <file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ewplugin</file>\r
+ <loadFlag>1</loadFlag>\r
+ </plugin>\r
+ <plugin>\r
+ <file>$EW_DIR$\common\plugins\Orti\Orti.ewplugin</file>\r
+ <loadFlag>0</loadFlag>\r
+ </plugin>\r
+ <plugin>\r
+ <file>$EW_DIR$\common\plugins\Profiling\Profiling.ewplugin</file>\r
+ <loadFlag>1</loadFlag>\r
+ </plugin>\r
+ <plugin>\r
+ <file>$EW_DIR$\common\plugins\Stack\Stack.ewplugin</file>\r
+ <loadFlag>1</loadFlag>\r
+ </plugin>\r
+ </debuggerPlugins>\r
+ </configuration>\r
+</project>\r
+\r
+\r
--- /dev/null
+<?xml version="1.0" encoding="iso-8859-1"?>\r
+\r
+<project>\r
+ <fileVersion>1</fileVersion>\r
+ <configuration>\r
+ <name>Debug</name>\r
+ <toolchain>\r
+ <name>AVR32</name>\r
+ </toolchain>\r
+ <debug>1</debug>\r
+ <settings>\r
+ <name>General</name>\r
+ <archiveVersion>2</archiveVersion>\r
+ <data>\r
+ <version>0</version>\r
+ <wantNonLocal>1</wantNonLocal>\r
+ <debug>1</debug>\r
+ <option>\r
+ <name>ProcessorCoreDyn</name>\r
+ <state>at32uc3a0512</state>\r
+ </option>\r
+ <option>\r
+ <name>ProcessorCoreSlave</name>\r
+ <state>at32uc3a0512</state>\r
+ </option>\r
+ <option>\r
+ <name>CodeModel</name>\r
+ <state>1</state>\r
+ </option>\r
+ <option>\r
+ <name>DataModel</name>\r
+ <state>1</state>\r
+ </option>\r
+ <option>\r
+ <name>EnableSimdInstructions</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>EnableDspInstructions</name>\r
+ <state>1</state>\r
+ </option>\r
+ <option>\r
+ <name>EnableRmwInstructions</name>\r
+ <state>1</state>\r
+ </option>\r
+ <option>\r
+ <name>GAllowUnaligned</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>GOutputBinary</name>\r
+ <state>0</state>\r
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+ <option>\r
+ <name>ExePath</name>\r
+ <state>Debug\Exe</state>\r
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+ <option>\r
+ <name>ObjPath</name>\r
+ <state>Debug\Obj</state>\r
+ </option>\r
+ <option>\r
+ <name>ListPath</name>\r
+ <state>Debug\List</state>\r
+ </option>\r
+ <option>\r
+ <name>GRuntimeLibSelect</name>\r
+ <version>0</version>\r
+ <state>2</state>\r
+ </option>\r
+ <option>\r
+ <name>GRuntimeLibSelectSlave</name>\r
+ <version>0</version>\r
+ <state>2</state>\r
+ </option>\r
+ <option>\r
+ <name>RTDescription</name>\r
+ <state>Use the full configuration of the C/EC++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>\r
+ </option>\r
+ <option>\r
+ <name>RTLibraryPath</name>\r
+ <state>$TOOLKIT_DIR$\lib\dlavr32allaf.r82</state>\r
+ </option>\r
+ <option>\r
+ <name>RTConfigPath</name>\r
+ <state>$TOOLKIT_DIR$\lib\dlavr32allaf.h</state>\r
+ </option>\r
+ <option>\r
+ <name>Input variant</name>\r
+ <version>0</version>\r
+ <state>1</state>\r
+ </option>\r
+ <option>\r
+ <name>Input description</name>\r
+ <state>No specifier n, no float.</state>\r
+ </option>\r
+ <option>\r
+ <name>Output variant</name>\r
+ <version>0</version>\r
+ <state>1</state>\r
+ </option>\r
+ <option>\r
+ <name>Output description</name>\r
+ <state>No specifier a or A.</state>\r
+ </option>\r
+ <option>\r
+ <name>GUnhandledInterrupts</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>GUnhandledExceptions</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>GEnableTrace</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>GTraceBufferSize</name>\r
+ <version>0</version>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>GSStackSize</name>\r
+ <state>0x800</state>\r
+ </option>\r
+ <option>\r
+ <name>GCStackSize</name>\r
+ <state>0x800</state>\r
+ </option>\r
+ <option>\r
+ <name>GHeapSize</name>\r
+ <state>0x8000</state>\r
+ </option>\r
+ <option>\r
+ <name>GeneralMisraRules</name>\r
+ <version>0</version>\r
+ <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>\r
+ </option>\r
+ <option>\r
+ <name>GeneralEnableMisra</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>GeneralMisraVerbose</name>\r
+ <state>0</state>\r
+ </option>\r
+ </data>\r
+ </settings>\r
+ <settings>\r
+ <name>ICCAVR32</name>\r
+ <archiveVersion>2</archiveVersion>\r
+ <data>\r
+ <version>4</version>\r
+ <wantNonLocal>1</wantNonLocal>\r
+ <debug>1</debug>\r
+ <option>\r
+ <name>CCDefines</name>\r
+ <state>BOARD=EVK1100</state>\r
+ </option>\r
+ <option>\r
+ <name>CCPreprocFile</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>CCPreprocComments</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>CCPreprocLine</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>CCListCFile</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>CCListCMnemonics</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>CCListCMessages</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>CCListAssFile</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>CCListAssSource</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>CCEnableRemarks</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>CCDiagSuppress</name>\r
+ <state>Pe191, Pa082</state>\r
+ </option>\r
+ <option>\r
+ <name>CCDiagRemark</name>\r
+ <state></state>\r
+ </option>\r
+ <option>\r
+ <name>CCDiagWarning</name>\r
+ <state></state>\r
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+ <option>\r
+ <name>CCDiagError</name>\r
+ <state></state>\r
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+ <option>\r
+ <name>CCCore</name>\r
+ <state>0</state>\r
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+ <option>\r
+ <name>CCCodeModel</name>\r
+ <state>0</state>\r
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+ <option>\r
+ <name>CCDataModel</name>\r
+ <state>0</state>\r
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+ <option>\r
+ <name>CCObjPrefix</name>\r
+ <state>1</state>\r
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+ <option>\r
+ <name>CCRequirePrototypes</name>\r
+ <state>0</state>\r
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+ <option>\r
+ <name>CCMultibyteSupport</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>CCMigrationPreprocExtentions</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>CCExt</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>CCCharIs</name>\r
+ <state>1</state>\r
+ </option>\r
+ <option>\r
+ <name>CCOptSizeSpeed</name>\r
+ <state>1</state>\r
+ </option>\r
+ <option>\r
+ <name>CCOptimization</name>\r
+ <version>0</version>\r
+ <state>1</state>\r
+ </option>\r
+ <option>\r
+ <name>CCAllowList</name>\r
+ <version>0</version>\r
+ <state>0000000</state>\r
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+ <option>\r
+ <name>CCObjUseModuleName</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>CCObjModuleName</name>\r
+ <state></state>\r
+ </option>\r
+ <option>\r
+ <name>CCDebugInfo</name>\r
+ <state>1</state>\r
+ </option>\r
+ <option>\r
+ <name>CCDiagWarnAreErr</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>CCCompilerRuntimeInfo</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>OutputFile</name>\r
+ <state>$FILE_BNAME$.r82</state>\r
+ </option>\r
+ <option>\r
+ <name>CCLangSelect</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>CCOptSizeSpeedSlave</name>\r
+ <state>1</state>\r
+ </option>\r
+ <option>\r
+ <name>CCOptimizationSlave</name>\r
+ <version>0</version>\r
+ <state>1</state>\r
+ </option>\r
+ <option>\r
+ <name>CCLibConfigHeader</name>\r
+ <state>1</state>\r
+ </option>\r
+ <option>\r
+ <name>PreInclude</name>\r
+ <state></state>\r
+ </option>\r
+ <option>\r
+ <name>CompilerMisraRules</name>\r
+ <version>0</version>\r
+ <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>\r
+ </option>\r
+ <option>\r
+ <name>CompilerMisraOverride</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>CCIncludePath2</name>\r
+ <state>$PROJ_DIR$\..\..\UTILS\</state>\r
+ <state>$PROJ_DIR$\..\..\UTILS\PREPROCESSOR\</state>\r
+ <state>$PROJ_DIR$\..\..\BOARDS\</state>\r
+ <state>$PROJ_DIR$\..\..\DRIVERS\INTC\</state>\r
+ <state>$PROJ_DIR$\..\..\DRIVERS\TC\</state>\r
+ <state>$PROJ_DIR$\..\..\DRIVERS\PM\</state>\r
+ <state>$PROJ_DIR$\..\..\DRIVERS\GPIO\</state>\r
+ <state>$PROJ_DIR$\..\..\DRIVERS\USART\</state>\r
+ <state>$PROJ_DIR$\..\..\..\..\Source\include\</state>\r
+ <state>$PROJ_DIR$\..\..\..\Common\include\</state>\r
+ <state>$PROJ_DIR$\..\..\..\..\Source\portable\IAR\AVR32_UC3\</state>\r
+ <state>$PROJ_DIR$\..\..\</state>\r
+ </option>\r
+ <option>\r
+ <name>CCStdIncCheck</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>CCStdIncludePath</name>\r
+ <state>$TOOLKIT_DIR$\INC\</state>\r
+ </option>\r
+ <option>\r
+ <name>IExtraOptionsCheck</name>\r
+ <state>0</state>\r
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+ <option>\r
+ <name>IExtraOptions</name>\r
+ <state></state>\r
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+ <option>\r
+ <name>CCModuleTypeOverride</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>CCModuleType</name>\r
+ <state>0</state>\r
+ </option>\r
+ </data>\r
+ </settings>\r
+ <settings>\r
+ <name>AAVR32</name>\r
+ <archiveVersion>2</archiveVersion>\r
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+ <version>0</version>\r
+ <wantNonLocal>1</wantNonLocal>\r
+ <debug>1</debug>\r
+ <option>\r
+ <name>AObjPrefix</name>\r
+ <state>1</state>\r
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+ <option>\r
+ <name>ACore</name>\r
+ <state>0</state>\r
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+ <name>AEnableRemarks</name>\r
+ <state>0</state>\r
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+ <option>\r
+ <name>ADiagSuppress</name>\r
+ <state></state>\r
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+ <option>\r
+ <name>ADiagRemark</name>\r
+ <state></state>\r
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+ <option>\r
+ <name>ADiagWarning</name>\r
+ <state></state>\r
+ </option>\r
+ <option>\r
+ <name>ADiagError</name>\r
+ <state></state>\r
+ </option>\r
+ <option>\r
+ <name>ADiagWarnAreErr</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>APreprocFile</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>APreprocComments</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>APreprocLine</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>ADefines</name>\r
+ <state></state>\r
+ </option>\r
+ <option>\r
+ <name>AIncludePaths</name>\r
+ <state>$PROJ_DIR$\..\..\UTILS\</state>\r
+ <state>$PROJ_DIR$\..\..\UTILS\PREPROCESSOR\</state>\r
+ <state>$PROJ_DIR$\..\..\DRIVERS\INTC\</state>\r
+ </option>\r
+ <option>\r
+ <name>AListFile</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>ACrossReference</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>AMacDefs</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>AMacExps</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>AOnlyAsmed</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>ANoDiagnostics</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>AListOptions</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>AMnemonicFirst</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>ADirectiveFirst</name>\r
+ <state>0</state>\r
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+ <option>\r
+ <name>ACaseSensitivity</name>\r
+ <state>1</state>\r
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+ <option>\r
+ <name>ADebug</name>\r
+ <state>1</state>\r
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+ <option>\r
+ <name>AMacroChars</name>\r
+ <version>0</version>\r
+ <state>3</state>\r
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+ <option>\r
+ <name>OutputFile</name>\r
+ <state>$FILE_BNAME$.r82</state>\r
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+ <option>\r
+ <name>ATruncateLine</name>\r
+ <state>0</state>\r
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+ <option>\r
+ <name>IExtraOptionsCheck</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>IExtraOptions</name>\r
+ <state></state>\r
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+ <option>\r
+ <name>AModel</name>\r
+ <state>0</state>\r
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+ <settings>\r
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+ <data/>\r
+ </settings>\r
+ <settings>\r
+ <name>BUILDACTION</name>\r
+ <archiveVersion>1</archiveVersion>\r
+ <data>\r
+ <prebuild></prebuild>\r
+ <postbuild></postbuild>\r
+ </data>\r
+ </settings>\r
+ <settings>\r
+ <name>XLINK</name>\r
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+ <name>SegmentMap</name>\r
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+ <name>XclFile</name>\r
+ <state>$TOOLKIT_DIR$\config\lnkuc3a0512.xcl</state>\r
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+ <option>\r
+ <name>XclFileSlave</name>\r
+ <state></state>\r
+ </option>\r
+ <option>\r
+ <name>DoFill</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>FillerByte</name>\r
+ <state>0xFF</state>\r
+ </option>\r
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+ <name>DoCrc</name>\r
+ <state>0</state>\r
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+ <name>CrcSize</name>\r
+ <version>0</version>\r
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+ <name>CrcAlgo</name>\r
+ <state>1</state>\r
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+ <name>CrcPoly</name>\r
+ <state>0x11021</state>\r
+ </option>\r
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+ <name>OXLibIOConfig</name>\r
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+ <name>XRTSegmentSizes</name>\r
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+ <name>RangeCheckAlternatives</name>\r
+ <state>0</state>\r
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+ <option>\r
+ <name>SuppressAllWarn</name>\r
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+ <name>SuppressDiags</name>\r
+ <state>w6</state>\r
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+ <state></state>\r
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+ <state></state>\r
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+ <name>ModuleLocalSym</name>\r
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+ <name>CrcBitOrder</name>\r
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+ <name>xcProgramEntryLabel</name>\r
+ <state>__program_start</state>\r
+ </option>\r
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+ <name>RuntimeControl</name>\r
+ <state>1</state>\r
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+ <name>IoEmulation</name>\r
+ <state>1</state>\r
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+ <name>xcProgramEntryLabelSelect</name>\r
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+ <state>0</state>\r
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+ <name>RawBinaryFile</name>\r
+ <state></state>\r
+ </option>\r
+ <option>\r
+ <name>RawBinarySymbol</name>\r
+ <state></state>\r
+ </option>\r
+ <option>\r
+ <name>RawBinarySegment</name>\r
+ <state></state>\r
+ </option>\r
+ <option>\r
+ <name>RawBinaryAlign</name>\r
+ <state></state>\r
+ </option>\r
+ <option>\r
+ <name>XLinkMisraHandler</name>\r
+ <state>0</state>\r
+ </option>\r
+ <option>\r
+ <name>CrcAlign</name>\r
+ <state>4</state>\r
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+ <name>CrcInitialValue</name>\r
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+ <name>OXExtraOptionsCheck</name>\r
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+ <option>\r
+ <name>OXExtraOptions</name>\r
+ <state></state>\r
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+ </settings>\r
+ <settings>\r
+ <name>XAR</name>\r
+ <archiveVersion>2</archiveVersion>\r
+ <data>\r
+ <version>0</version>\r
+ <wantNonLocal>1</wantNonLocal>\r
+ <debug>0</debug>\r
+ <option>\r
+ <name>XAROutOverride</name>\r
+ <state>0</state>\r
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+ <option>\r
+ <name>XARInputs</name>\r
+ <state></state>\r
+ </option>\r
+ <option>\r
+ <name>OutputFile</name>\r
+ <state></state>\r
+ </option>\r
+ </data>\r
+ </settings>\r
+ <settings>\r
+ <name>BILINK</name>\r
+ <archiveVersion>0</archiveVersion>\r
+ <data/>\r
+ </settings>\r
+ </configuration>\r
+ <group>\r
+ <name>DLIB</name>\r
+ <file>\r
+ <name>$PROJ_DIR$\..\..\..\..\Source\portable\IAR\AVR32_UC3\read.c</name>\r
+ </file>\r
+ <file>\r
+ <name>$PROJ_DIR$\..\..\..\..\Source\portable\IAR\AVR32_UC3\write.c</name>\r
+ </file>\r
+ </group>\r
+ <group>\r
+ <name>Drivers</name>\r
+ <file>\r
+ <name>$PROJ_DIR$\..\..\DRIVERS\GPIO\gpio.c</name>\r
+ </file>\r
+ <file>\r
+ <name>$PROJ_DIR$\..\..\DRIVERS\INTC\intc.c</name>\r
+ </file>\r
+ <file>\r
+ <name>$PROJ_DIR$\..\..\BOARDS\EVK1100\led.c</name>\r
+ </file>\r
+ <file>\r
+ <name>$PROJ_DIR$\..\..\DRIVERS\PM\pm.c</name>\r
+ </file>\r
+ <file>\r
+ <name>$PROJ_DIR$\..\..\DRIVERS\TC\tc.c</name>\r
+ </file>\r
+ <file>\r
+ <name>$PROJ_DIR$\..\..\DRIVERS\USART\usart.c</name>\r
+ </file>\r
+ </group>\r
+ <group>\r
+ <name>FreeRTOS</name>\r
+ <group>\r
+ <name>AVR32_UC3</name>\r
+ <file>\r
+ <name>$PROJ_DIR$\..\..\..\..\Source\portable\IAR\AVR32_UC3\exception.s82</name>\r
+ </file>\r
+ <file>\r
+ <name>$PROJ_DIR$\..\..\..\..\Source\portable\IAR\AVR32_UC3\port.c</name>\r
+ </file>\r
+ </group>\r
+ <group>\r
+ <name>Common_demo</name>\r
+ <file>\r
+ <name>$PROJ_DIR$\..\..\..\Common\Minimal\BlockQ.c</name>\r
+ </file>\r
+ <file>\r
+ <name>$PROJ_DIR$\..\..\..\Common\Minimal\comtest.c</name>\r
+ </file>\r
+ <file>\r
+ <name>$PROJ_DIR$\..\..\..\Common\Minimal\death.c</name>\r
+ </file>\r
+ <file>\r
+ <name>$PROJ_DIR$\..\..\..\Common\Minimal\dynamic.c</name>\r
+ </file>\r
+ <file>\r
+ <name>$PROJ_DIR$\..\..\..\Common\Minimal\flash.c</name>\r
+ </file>\r
+ <file>\r
+ <name>$PROJ_DIR$\..\..\..\Common\Minimal\flop.c</name>\r
+ </file>\r
+ <file>\r
+ <name>$PROJ_DIR$\..\..\..\Common\Minimal\integer.c</name>\r
+ </file>\r
+ <file>\r
+ <name>$PROJ_DIR$\..\..\..\Common\Minimal\PollQ.c</name>\r
+ </file>\r
+ <file>\r
+ <name>$PROJ_DIR$\..\..\..\Common\Minimal\semtest.c</name>\r
+ </file>\r
+ </group>\r
+ <group>\r
+ <name>Source</name>\r
+ <file>\r
+ <name>$PROJ_DIR$\..\..\..\..\Source\portable\MemMang\heap_3.c</name>\r
+ </file>\r
+ <file>\r
+ <name>$PROJ_DIR$\..\..\..\..\Source\list.c</name>\r
+ </file>\r
+ <file>\r
+ <name>$PROJ_DIR$\..\..\..\..\Source\queue.c</name>\r
+ </file>\r
+ <file>\r
+ <name>$PROJ_DIR$\..\..\..\..\Source\tasks.c</name>\r
+ </file>\r
+ </group>\r
+ </group>\r
+ <file>\r
+ <name>$PROJ_DIR$\..\..\main.c</name>\r
+ </file>\r
+ <file>\r
+ <name>$PROJ_DIR$\..\..\ParTest\ParTest.c</name>\r
+ </file>\r
+ <file>\r
+ <name>$PROJ_DIR$\..\..\serial\serial.c</name>\r
+ </file>\r
+</project>\r
+\r
+\r
--- /dev/null
+<?xml version="1.0" encoding="iso-8859-1"?>\r
+\r
+<workspace>\r
+ <project>\r
+ <path>$WS_DIR$\rtosdemo.ewp</path>\r
+ </project>\r
+ <batchBuild/>\r
+</workspace>\r
+\r
+\r
--- /dev/null
+/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */\r
+\r
+/*This file is prepared for Doxygen automatic documentation generation.*/\r
+/*! \file *********************************************************************\r
+ *\r
+ * \brief AT32UC3A EVK1100 board header file.\r
+ *\r
+ * This file contains definitions and services related to the features of the\r
+ * EVK1100 board.\r
+ *\r
+ * - Compiler: IAR EWAVR32 and GNU GCC for AVR32\r
+ * - Supported devices: All AVR32 AT32UC3A devices can be used.\r
+ * - AppNote:\r
+ *\r
+ * \author Atmel Corporation: http://www.atmel.com \n\r
+ * Support email: avr32@atmel.com\r
+ *\r
+ ******************************************************************************/\r
+\r
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the following disclaimer.\r
+ *\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ * this list of conditions and the following disclaimer in the documentation\r
+ * and/or other materials provided with the distribution.\r
+ *\r
+ * 3. The name of ATMEL may not be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND\r
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,\r
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\r
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\r
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND\r
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF\r
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ */\r
+\r
+\r
+#ifndef _EVK1100_H_\r
+#define _EVK1100_H_\r
+\r
+#include "compiler.h"\r
+\r
+#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling.\r
+# include "led.h"\r
+#endif // __AVR32_ABI_COMPILER__\r
+\r
+\r
+/*! \name Oscillator Definitions\r
+ */\r
+//! @{\r
+\r
+// RCOsc has no custom calibration by default. Set the following definition to\r
+// the appropriate value if a custom RCOsc calibration has been applied to your\r
+// part.\r
+//#define FRCOSC 115200 //!< RCOsc frequency: Hz.\r
+\r
+#define FOSC32 32000 //!< Osc32 frequency: Hz.\r
+#define OSC32_STARTUP 3 //!< Osc32 startup time: RCOsc periods.\r
+\r
+#define FOSC0 12000000 //!< Osc0 frequency: Hz.\r
+#define OSC0_STARTUP 3 //!< Osc0 startup time: RCOsc periods.\r
+\r
+// Osc1 crystal is not mounted by default. Set the following definitions to the\r
+// appropriate values if a custom Osc1 crystal is mounted on your board.\r
+//#define FOSC1 12000000 //!< Osc1 frequency: Hz.\r
+//#define OSC1_STARTUP 3 //!< Osc1 startup time: RCOsc periods.\r
+\r
+//! @}\r
+\r
+\r
+/*! \name SDRAM Definitions\r
+ */\r
+//! @{\r
+\r
+//! Part header file of used SDRAM(s).\r
+#define SDRAM_PART_HDR "MT48LC16M16A2TG7E/mt48lc16m16a2tg7e.h"\r
+\r
+//! Data bus width to use the SDRAM(s) with (16 or 32 bits; always 16 bits on\r
+//! UC3).\r
+#define SDRAM_DBW 16\r
+\r
+//! @}\r
+\r
+\r
+/*! \name USB Definitions\r
+ */\r
+//! @{\r
+\r
+//! Multiplexed pin used for USB_ID: AVR32_USBB_USB_ID_x_x.\r
+//! To be selected according to the AVR32_USBB_USB_ID_x_x_PIN and\r
+//! AVR32_USBB_USB_ID_x_x_FUNCTION definitions from <avr32/uc3axxxx.h>.\r
+#define USB_ID AVR32_USBB_USB_ID_0_0\r
+\r
+//! Multiplexed pin used for USB_VBOF: AVR32_USBB_USB_VBOF_x_x.\r
+//! To be selected according to the AVR32_USBB_USB_VBOF_x_x_PIN and\r
+//! AVR32_USBB_USB_VBOF_x_x_FUNCTION definitions from <avr32/uc3axxxx.h>.\r
+#ifdef EVK1100_REVA\r
+# define USB_VBOF AVR32_USBB_USB_VBOF_0_0\r
+#else\r
+# define USB_VBOF AVR32_USBB_USB_VBOF_0_1\r
+#endif\r
+\r
+//! Active level of the USB_VBOF output pin.\r
+#ifdef EVK1100_REVA\r
+# define USB_VBOF_ACTIVE_LEVEL HIGH\r
+#else\r
+# define USB_VBOF_ACTIVE_LEVEL LOW\r
+#endif\r
+\r
+//! @}\r
+\r
+\r
+//! GPIO connection of the MAC PHY PWR_DOWN/INT signal.\r
+#ifdef EVK1100_REVA\r
+# define MACB_INTERRUPT_PIN AVR32_PIN_PX12\r
+#else\r
+# define MACB_INTERRUPT_PIN AVR32_PIN_PA24\r
+#endif\r
+\r
+\r
+//! Number of LEDs.\r
+#define LED_COUNT 8\r
+\r
+/*! \name GPIO Connections of LEDs\r
+ */\r
+//! @{\r
+#ifdef EVK1100_REVA\r
+# define LED0_GPIO AVR32_PIN_PX13\r
+# define LED1_GPIO AVR32_PIN_PX14\r
+# define LED2_GPIO AVR32_PIN_PX15\r
+# define LED3_GPIO AVR32_PIN_PX16\r
+# define LED4_GPIO AVR32_PIN_PB19\r
+# define LED5_GPIO AVR32_PIN_PB20\r
+# define LED6_GPIO AVR32_PIN_PB21\r
+# define LED7_GPIO AVR32_PIN_PB22\r
+#else\r
+# define LED0_GPIO AVR32_PIN_PB27\r
+# define LED1_GPIO AVR32_PIN_PB28\r
+# define LED2_GPIO AVR32_PIN_PB29\r
+# define LED3_GPIO AVR32_PIN_PB30\r
+# define LED4_GPIO AVR32_PIN_PB19\r
+# define LED5_GPIO AVR32_PIN_PB20\r
+# define LED6_GPIO AVR32_PIN_PB21\r
+# define LED7_GPIO AVR32_PIN_PB22\r
+#endif\r
+//! @}\r
+\r
+/*! \name PWM Channels of LEDs\r
+ */\r
+//! @{\r
+#define LED0_PWM (-1)\r
+#define LED1_PWM (-1)\r
+#define LED2_PWM (-1)\r
+#define LED3_PWM (-1)\r
+#define LED4_PWM 0\r
+#define LED5_PWM 1\r
+#define LED6_PWM 2\r
+#define LED7_PWM 3\r
+//! @}\r
+\r
+/*! \name PWM Functions of LEDs\r
+ */\r
+//! @{\r
+#define LED0_PWM_FUNCTION (-1)\r
+#define LED1_PWM_FUNCTION (-1)\r
+#define LED2_PWM_FUNCTION (-1)\r
+#define LED3_PWM_FUNCTION (-1)\r
+#define LED4_PWM_FUNCTION AVR32_PWM_PWM_0_FUNCTION\r
+#define LED5_PWM_FUNCTION AVR32_PWM_PWM_1_FUNCTION\r
+#define LED6_PWM_FUNCTION AVR32_PWM_PWM_2_FUNCTION\r
+#define LED7_PWM_FUNCTION AVR32_PWM_PWM_3_FUNCTION\r
+//! @}\r
+\r
+/*! \name Color Identifiers of LEDs to Use with LED Functions\r
+ */\r
+//! @{\r
+#ifdef EVK1100_REVA\r
+# define LED_MONO0_GREEN LED4\r
+# define LED_MONO1_GREEN LED5\r
+# define LED_MONO2_GREEN LED6\r
+# define LED_MONO3_GREEN LED7\r
+# define LED_BI0_GREEN LED1\r
+# define LED_BI0_RED LED0\r
+# define LED_BI1_GREEN LED3\r
+# define LED_BI1_RED LED2\r
+#else\r
+# define LED_MONO0_GREEN LED0\r
+# define LED_MONO1_GREEN LED1\r
+# define LED_MONO2_GREEN LED2\r
+# define LED_MONO3_GREEN LED3\r
+# define LED_BI0_GREEN LED5\r
+# define LED_BI0_RED LED4\r
+# define LED_BI1_GREEN LED7\r
+# define LED_BI1_RED LED6\r
+#endif\r
+//! @}\r
+\r
+\r
+/*! \name GPIO Connections of Push Buttons\r
+ */\r
+//! @{\r
+#ifdef EVK1100_REVA\r
+# define GPIO_PUSH_BUTTON_0 AVR32_PIN_PB28\r
+# define GPIO_PUSH_BUTTON_1 AVR32_PIN_PB29\r
+# define GPIO_PUSH_BUTTON_2 AVR32_PIN_PB27\r
+#else\r
+# define GPIO_PUSH_BUTTON_0 AVR32_PIN_PX16\r
+# define GPIO_PUSH_BUTTON_1 AVR32_PIN_PX19\r
+# define GPIO_PUSH_BUTTON_2 AVR32_PIN_PX22\r
+#endif\r
+//! @}\r
+\r
+\r
+/*! \name GPIO Connections of the Joystick\r
+ */\r
+//! @{\r
+#define GPIO_JOYSTICK_PUSH AVR32_PIN_PA20\r
+#define GPIO_JOYSTICK_LEFT AVR32_PIN_PA25\r
+#define GPIO_JOYSTICK_RIGHT AVR32_PIN_PA28\r
+#define GPIO_JOYSTICK_UP AVR32_PIN_PA26\r
+#define GPIO_JOYSTICK_DOWN AVR32_PIN_PA27\r
+//! @}\r
+\r
+\r
+/*! \name ADC Connection of the Potentiometer\r
+ */\r
+//! @{\r
+#define ADC_POTENTIOMETER_CHANNEL 1\r
+#define ADC_POTENTIOMETER_PIN AVR32_ADC_AD_1_PIN\r
+#define ADC_POTENTIOMETER_FUNCTION AVR32_ADC_AD_1_FUNCTION\r
+//! @}\r
+\r
+\r
+/*! \name ADC Connection of the Temperature Sensor\r
+ */\r
+//! @{\r
+#define ADC_TEMPERATURE_CHANNEL 0\r
+#define ADC_TEMPERATURE_PIN AVR32_ADC_AD_0_PIN\r
+#define ADC_TEMPERATURE_FUNCTION AVR32_ADC_AD_0_FUNCTION\r
+//! @}\r
+\r
+\r
+/*! \name ADC Connection of the Light Sensor\r
+ */\r
+//! @{\r
+#define ADC_LIGHT_CHANNEL 2\r
+#define ADC_LIGHT_PIN AVR32_ADC_AD_2_PIN\r
+#define ADC_LIGHT_FUNCTION AVR32_ADC_AD_2_FUNCTION\r
+//! @}\r
+\r
+\r
+/*! \name SPI Connections of the DIP204 LCD\r
+ */\r
+//! @{\r
+#define DIP204_SPI (&AVR32_SPI1)\r
+#define DIP204_SPI_CS 2\r
+#define DIP204_SPI_SCK_PIN AVR32_SPI1_SCK_0_PIN\r
+#define DIP204_SPI_SCK_FUNCTION AVR32_SPI1_SCK_0_FUNCTION\r
+#define DIP204_SPI_MISO_PIN AVR32_SPI1_MISO_0_PIN\r
+#define DIP204_SPI_MISO_FUNCTION AVR32_SPI1_MISO_0_FUNCTION\r
+#define DIP204_SPI_MOSI_PIN AVR32_SPI1_MOSI_0_PIN\r
+#define DIP204_SPI_MOSI_FUNCTION AVR32_SPI1_MOSI_0_FUNCTION\r
+#define DIP204_SPI_NPCS_PIN AVR32_SPI1_NPCS_2_PIN\r
+#define DIP204_SPI_NPCS_FUNCTION AVR32_SPI1_NPCS_2_FUNCTION\r
+//! @}\r
+\r
+/*! \name GPIO and PWM Connections of the DIP204 LCD Backlight\r
+ */\r
+//! @{\r
+#define DIP204_BACKLIGHT_PIN AVR32_PIN_PB18\r
+#define DIP204_PWM_CHANNEL AVR32_PWM_CHID6\r
+#define DIP204_PWM_PIN AVR32_PWM_PWM_6_PIN\r
+#define DIP204_PWM_FUNCTION AVR32_PWM_PWM_6_FUNCTION\r
+//! @}\r
+\r
+\r
+/*! \name SPI Connections of the AT45DBX Data Flash Memory\r
+ */\r
+//! @{\r
+#define AT45DBX_SPI (&AVR32_SPI1)\r
+#define AT45DBX_SPI_SCK_PIN AVR32_SPI1_SCK_0_PIN\r
+#define AT45DBX_SPI_SCK_FUNCTION AVR32_SPI1_SCK_0_FUNCTION\r
+#define AT45DBX_SPI_MISO_PIN AVR32_SPI1_MISO_0_PIN\r
+#define AT45DBX_SPI_MISO_FUNCTION AVR32_SPI1_MISO_0_FUNCTION\r
+#define AT45DBX_SPI_MOSI_PIN AVR32_SPI1_MOSI_0_PIN\r
+#define AT45DBX_SPI_MOSI_FUNCTION AVR32_SPI1_MOSI_0_FUNCTION\r
+#define AT45DBX_SPI_NPCS0_PIN AVR32_SPI1_NPCS_0_PIN\r
+#define AT45DBX_SPI_NPCS0_FUNCTION AVR32_SPI1_NPCS_0_FUNCTION\r
+//! @}\r
+\r
+\r
+/*! \name SPI Connections of the SD/MMC Connector\r
+ */\r
+//! @{\r
+#define SD_MMC_SPI (&AVR32_SPI1)\r
+#define SD_MMC_SPI_CS 1\r
+#define SD_MMC_SPI_SCK_PIN AVR32_SPI1_SCK_0_PIN\r
+#define SD_MMC_SPI_SCK_FUNCTION AVR32_SPI1_SCK_0_FUNCTION\r
+#define SD_MMC_SPI_MISO_PIN AVR32_SPI1_MISO_0_PIN\r
+#define SD_MMC_SPI_MISO_FUNCTION AVR32_SPI1_MISO_0_FUNCTION\r
+#define SD_MMC_SPI_MOSI_PIN AVR32_SPI1_MOSI_0_PIN\r
+#define SD_MMC_SPI_MOSI_FUNCTION AVR32_SPI1_MOSI_0_FUNCTION\r
+#define SD_MMC_SPI_NPCS_PIN AVR32_SPI1_NPCS_1_PIN\r
+#define SD_MMC_SPI_NPCS_FUNCTION AVR32_SPI1_NPCS_1_FUNCTION\r
+//! @}\r
+\r
+\r
+#endif // _EVK1100_H_\r
--- /dev/null
+/* This source file is part of the ATMEL FREERTOS-0.9.0 Release */\r
+\r
+/*This file is prepared for Doxygen automatic documentation generation.*/\r
+/*! \file *********************************************************************\r
+ *\r
+ * \brief AT32UC3A EVK1100 board LEDs support package.\r
+ *\r
+ * This file contains definitions and services related to the LED features of\r
+ * the EVK1100 board.\r
+ *\r
+ * - Compiler: IAR EWAVR32 and GNU GCC for AVR32\r
+ * - Supported devices: All AVR32 AT32UC3A devices can be used.\r
+ * - AppNote:\r
+ *\r
+ * \author Atmel Corporation: http://www.atmel.com \n\r
+ * Support email: avr32@atmel.com\r
+ *\r
+ ******************************************************************************/\r
+\r
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the following disclaimer.\r
+ *\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ * this list of conditions and the following disclaimer in the documentation\r
+ * and/or other materials provided with the distribution.\r
+ *\r
+ * 3. The name of ATMEL may not be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND\r
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,\r
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\r
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\r
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND\r
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF\r
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ */\r
+\r
+\r
+#if __GNUC__\r
+# include <avr32/io.h>\r
+#elif __ICCAVR32__\r
+# include <avr32/iouc3a0512.h>\r
+#else\r
+# error Unknown compiler\r
+#endif\r
+\r
+#include "preprocessor.h"\r
+#include "compiler.h"\r
+#include "evk1100.h"\r
+#include "led.h"\r
+\r
+\r
+//! Structure describing LED hardware connections.\r
+typedef const struct\r
+{\r
+ struct\r
+ {\r
+ U32 PORT; //!< LED GPIO port.\r
+ U32 PIN_MASK; //!< Bit-mask of LED pin in GPIO port.\r
+ } GPIO; //!< LED GPIO descriptor.\r
+ struct\r
+ {\r
+ S32 CHANNEL; //!< LED PWM channel (< 0 if N/A).\r
+ S32 FUNCTION; //!< LED pin PWM function (< 0 if N/A).\r
+ } PWM; //!< LED PWM descriptor.\r
+} tLED_DESCRIPTOR;\r
+\r
+\r
+//! Hardware descriptors of all LEDs.\r
+static tLED_DESCRIPTOR LED_DESCRIPTOR[LED_COUNT] =\r
+{\r
+#define INSERT_LED_DESCRIPTOR(LED_NO, unused) \\r
+ { \\r
+ {LED##LED_NO##_GPIO / 32, 1 << (LED##LED_NO##_GPIO % 32)},\\r
+ {LED##LED_NO##_PWM, LED##LED_NO##_PWM_FUNCTION } \\r
+ },\r
+ MREPEAT(LED_COUNT, INSERT_LED_DESCRIPTOR, ~)\r
+#undef INSERT_LED_DESCRIPTOR\r
+};\r
+\r
+\r
+//! Saved state of all LEDs.\r
+static U32 LED_State = (1 << LED_COUNT) - 1;\r
+\r
+\r
+U32 LED_Read_Display(void)\r
+{\r
+ return LED_State;\r
+}\r
+\r
+\r
+void LED_Display(U32 leds)\r
+{\r
+ tLED_DESCRIPTOR *led_descriptor;\r
+ volatile avr32_gpio_port_t *led_gpio_port;\r
+\r
+ leds &= (1 << LED_COUNT) - 1;\r
+ LED_State = leds;\r
+ for (led_descriptor = &LED_DESCRIPTOR[0];\r
+ led_descriptor < LED_DESCRIPTOR + LED_COUNT;\r
+ led_descriptor++)\r
+ {\r
+ led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];\r
+ if (leds & 1)\r
+ {\r
+ led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK;\r
+ }\r
+ else\r
+ {\r
+ led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK;\r
+ }\r
+ led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK;\r
+ led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK;\r
+ leds >>= 1;\r
+ }\r
+}\r
+\r
+\r
+U32 LED_Read_Display_Mask(U32 mask)\r
+{\r
+ return Rd_bits(LED_State, mask);\r
+}\r
+\r
+\r
+void LED_Display_Mask(U32 mask, U32 leds)\r
+{\r
+ tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1;\r
+ volatile avr32_gpio_port_t *led_gpio_port;\r
+ U8 led_shift;\r
+\r
+ mask &= (1 << LED_COUNT) - 1;\r
+ Wr_bits(LED_State, mask, leds);\r
+ while (mask)\r
+ {\r
+ led_shift = 1 + ctz(mask);\r
+ led_descriptor += led_shift;\r
+ led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];\r
+ leds >>= led_shift - 1;\r
+ if (leds & 1)\r
+ {\r
+ led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK;\r
+ }\r
+ else\r
+ {\r
+ led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK;\r
+ }\r
+ led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK;\r
+ led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK;\r
+ leds >>= 1;\r
+ mask >>= led_shift;\r
+ }\r
+}\r
+\r
+\r
+Bool LED_Test(U32 leds)\r
+{\r
+ return Tst_bits(LED_State, leds);\r
+}\r
+\r
+\r
+void LED_Off(U32 leds)\r
+{\r
+ tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1;\r
+ volatile avr32_gpio_port_t *led_gpio_port;\r
+ U8 led_shift;\r
+\r
+ leds &= (1 << LED_COUNT) - 1;\r
+ Clr_bits(LED_State, leds);\r
+ while (leds)\r
+ {\r
+ led_shift = 1 + ctz(leds);\r
+ led_descriptor += led_shift;\r
+ led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];\r
+ led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK;\r
+ led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK;\r
+ led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK;\r
+ leds >>= led_shift;\r
+ }\r
+}\r
+\r
+\r
+void LED_On(U32 leds)\r
+{\r
+ tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1;\r
+ volatile avr32_gpio_port_t *led_gpio_port;\r
+ U8 led_shift;\r
+\r
+ leds &= (1 << LED_COUNT) - 1;\r
+ Set_bits(LED_State, leds);\r
+ while (leds)\r
+ {\r
+ led_shift = 1 + ctz(leds);\r
+ led_descriptor += led_shift;\r
+ led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];\r
+ led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK;\r
+ led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK;\r
+ led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK;\r
+ leds >>= led_shift;\r
+ }\r
+}\r
+\r
+\r
+void LED_Toggle(U32 leds)\r
+{\r
+ tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1;\r
+ volatile avr32_gpio_port_t *led_gpio_port;\r
+ U8 led_shift;\r
+\r
+ leds &= (1 << LED_COUNT) - 1;\r
+ Tgl_bits(LED_State, leds);\r
+ while (leds)\r
+ {\r
+ led_shift = 1 + ctz(leds);\r
+ led_descriptor += led_shift;\r
+ led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];\r
+ led_gpio_port->ovrt = led_descriptor->GPIO.PIN_MASK;\r
+ led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK;\r
+ led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK;\r
+ leds >>= led_shift;\r
+ }\r
+}\r
+\r
+\r
+U32 LED_Read_Display_Field(U32 field)\r
+{\r
+ return Rd_bitfield(LED_State, field);\r
+}\r
+\r
+\r
+void LED_Display_Field(U32 field, U32 leds)\r
+{\r
+ LED_Display_Mask(field, leds << ctz(field));\r
+}\r
+\r
+\r
+U8 LED_Get_Intensity(U32 led)\r
+{\r
+ tLED_DESCRIPTOR *led_descriptor;\r
+\r
+ // Check that the argument value is valid.\r
+ led = ctz(led);\r
+ led_descriptor = &LED_DESCRIPTOR[led];\r
+ if (led >= LED_COUNT || led_descriptor->PWM.CHANNEL < 0) return 0;\r
+\r
+ // Return the duty cycle value if the LED PWM channel is enabled, else 0.\r
+ return (AVR32_PWM.sr & (1 << led_descriptor->PWM.CHANNEL)) ?\r
+ AVR32_PWM.channel[led_descriptor->PWM.CHANNEL].cdty : 0;\r
+}\r
+\r
+\r
+void LED_Set_Intensity(U32 leds, U8 intensity)\r
+{\r
+ tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1;\r
+ volatile avr32_pwm_channel_t *led_pwm_channel;\r
+ volatile avr32_gpio_port_t *led_gpio_port;\r
+ U8 led_shift;\r
+\r
+ // For each specified LED...\r
+ for (leds &= (1 << LED_COUNT) - 1; leds; leds >>= led_shift)\r
+ {\r
+ // Select the next specified LED and check that it has a PWM channel.\r
+ led_shift = 1 + ctz(leds);\r
+ led_descriptor += led_shift;\r
+ if (led_descriptor->PWM.CHANNEL < 0) continue;\r
+\r
+ // Initialize or update the LED PWM channel.\r
+ led_pwm_channel = &AVR32_PWM.channel[led_descriptor->PWM.CHANNEL];\r
+ if (!(AVR32_PWM.sr & (1 << led_descriptor->PWM.CHANNEL)))\r
+ {\r
+ led_pwm_channel->cmr = (AVR32_PWM_CPRE_MCK << AVR32_PWM_CPRE_OFFSET) &\r
+ ~(AVR32_PWM_CALG_MASK |\r
+ AVR32_PWM_CPOL_MASK |\r
+ AVR32_PWM_CPD_MASK);\r
+ led_pwm_channel->cprd = 0x000000FF;\r
+ led_pwm_channel->cdty = intensity;\r
+ AVR32_PWM.ena = 1 << led_descriptor->PWM.CHANNEL;\r
+ }\r
+ else\r
+ {\r
+ AVR32_PWM.isr;\r
+ while (!(AVR32_PWM.isr & (1 << led_descriptor->PWM.CHANNEL)));\r
+ led_pwm_channel->cupd = intensity;\r
+ }\r
+\r
+ // Switch the LED pin to its PWM function.\r
+ led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];\r
+ if (led_descriptor->PWM.FUNCTION & 0x1)\r
+ {\r
+ led_gpio_port->pmr0s = led_descriptor->GPIO.PIN_MASK;\r
+ }\r
+ else\r
+ {\r
+ led_gpio_port->pmr0c = led_descriptor->GPIO.PIN_MASK;\r
+ }\r
+ if (led_descriptor->PWM.FUNCTION & 0x2)\r
+ {\r
+ led_gpio_port->pmr1s = led_descriptor->GPIO.PIN_MASK;\r
+ }\r
+ else\r
+ {\r
+ led_gpio_port->pmr1c = led_descriptor->GPIO.PIN_MASK;\r
+ }\r
+ led_gpio_port->gperc = led_descriptor->GPIO.PIN_MASK;\r
+ }\r
+}\r
--- /dev/null
+/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */\r
+\r
+/*This file is prepared for Doxygen automatic documentation generation.*/\r
+/*! \file *********************************************************************\r
+ *\r
+ * \brief AT32UC3A EVK1100 board LEDs support package.\r
+ *\r
+ * This file contains definitions and services related to the LED features of\r
+ * the EVK1100 board.\r
+ *\r
+ * - Compiler: IAR EWAVR32 and GNU GCC for AVR32\r
+ * - Supported devices: All AVR32 AT32UC3A devices can be used.\r
+ * - AppNote:\r
+ *\r
+ * \author Atmel Corporation: http://www.atmel.com \n\r
+ * Support email: avr32@atmel.com\r
+ *\r
+ ******************************************************************************/\r
+\r
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the following disclaimer.\r
+ *\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ * this list of conditions and the following disclaimer in the documentation\r
+ * and/or other materials provided with the distribution.\r
+ *\r
+ * 3. The name of ATMEL may not be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND\r
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,\r
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\r
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\r
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND\r
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF\r
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ */\r
+\r
+\r
+#ifndef _LED_H_\r
+#define _LED_H_\r
+\r
+#include "compiler.h"\r
+\r
+\r
+/*! \name Identifiers of LEDs to Use with LED Functions\r
+ */\r
+//! @{\r
+#define LED0 0x01\r
+#define LED1 0x02\r
+#define LED2 0x04\r
+#define LED3 0x08\r
+#define LED4 0x10\r
+#define LED5 0x20\r
+#define LED6 0x40\r
+#define LED7 0x80\r
+//! @}\r
+\r
+\r
+/*! \brief Gets the last state of all LEDs set through the LED API.\r
+ *\r
+ * \return State of all LEDs (1 bit per LED).\r
+ *\r
+ * \note The GPIO pin configuration of all LEDs is left unchanged.\r
+ */\r
+extern U32 LED_Read_Display(void);\r
+\r
+/*! \brief Sets the state of all LEDs.\r
+ *\r
+ * \param leds New state of all LEDs (1 bit per LED).\r
+ *\r
+ * \note The pins of all LEDs are set to GPIO output mode.\r
+ */\r
+extern void LED_Display(U32 leds);\r
+\r
+/*! \brief Gets the last state of the specified LEDs set through the LED API.\r
+ *\r
+ * \param mask LEDs of which to get the state (1 bit per LED).\r
+ *\r
+ * \return State of the specified LEDs (1 bit per LED).\r
+ *\r
+ * \note The GPIO pin configuration of all LEDs is left unchanged.\r
+ */\r
+extern U32 LED_Read_Display_Mask(U32 mask);\r
+\r
+/*! \brief Sets the state of the specified LEDs.\r
+ *\r
+ * \param mask LEDs of which to set the state (1 bit per LED).\r
+ *\r
+ * \param leds New state of the specified LEDs (1 bit per LED).\r
+ *\r
+ * \note The pins of the specified LEDs are set to GPIO output mode.\r
+ */\r
+extern void LED_Display_Mask(U32 mask, U32 leds);\r
+\r
+/*! \brief Tests the last state of the specified LEDs set through the LED API.\r
+ *\r
+ * \param leds LEDs of which to test the state (1 bit per LED).\r
+ *\r
+ * \return \c TRUE if at least one of the specified LEDs has a state on, else\r
+ * \c FALSE.\r
+ *\r
+ * \note The GPIO pin configuration of all LEDs is left unchanged.\r
+ */\r
+extern Bool LED_Test(U32 leds);\r
+\r
+/*! \brief Turns off the specified LEDs.\r
+ *\r
+ * \param leds LEDs to turn off (1 bit per LED).\r
+ *\r
+ * \note The pins of the specified LEDs are set to GPIO output mode.\r
+ */\r
+extern void LED_Off(U32 leds);\r
+\r
+/*! \brief Turns on the specified LEDs.\r
+ *\r
+ * \param leds LEDs to turn on (1 bit per LED).\r
+ *\r
+ * \note The pins of the specified LEDs are set to GPIO output mode.\r
+ */\r
+extern void LED_On(U32 leds);\r
+\r
+/*! \brief Toggles the specified LEDs.\r
+ *\r
+ * \param leds LEDs to toggle (1 bit per LED).\r
+ *\r
+ * \note The pins of the specified LEDs are set to GPIO output mode.\r
+ */\r
+extern void LED_Toggle(U32 leds);\r
+\r
+/*! \brief Gets as a bit-field the last state of the specified LEDs set through\r
+ * the LED API.\r
+ *\r
+ * \param field LEDs of which to get the state (1 bit per LED).\r
+ *\r
+ * \return State of the specified LEDs (1 bit per LED, beginning with the first\r
+ * specified LED).\r
+ *\r
+ * \note The GPIO pin configuration of all LEDs is left unchanged.\r
+ */\r
+extern U32 LED_Read_Display_Field(U32 field);\r
+\r
+/*! \brief Sets as a bit-field the state of the specified LEDs.\r
+ *\r
+ * \param field LEDs of which to set the state (1 bit per LED).\r
+ * \param leds New state of the specified LEDs (1 bit per LED, beginning with\r
+ * the first specified LED).\r
+ *\r
+ * \note The pins of the specified LEDs are set to GPIO output mode.\r
+ */\r
+extern void LED_Display_Field(U32 field, U32 leds);\r
+\r
+/*! \brief Gets the intensity of the specified LED.\r
+ *\r
+ * \param led LED of which to get the intensity (1 bit per LED; only the least\r
+ * significant set bit is used).\r
+ *\r
+ * \return Intensity of the specified LED (0x00 to 0xFF).\r
+ *\r
+ * \warning The PWM channel of the specified LED is supposed to be used only by\r
+ * this module.\r
+ *\r
+ * \note The GPIO pin configuration of all LEDs is left unchanged.\r
+ */\r
+extern U8 LED_Get_Intensity(U32 led);\r
+\r
+/*! \brief Sets the intensity of the specified LEDs.\r
+ *\r
+ * \param leds LEDs of which to set the intensity (1 bit per LED).\r
+ * \param intensity New intensity of the specified LEDs (0x00 to 0xFF).\r
+ *\r
+ * \warning The PWM channels of the specified LEDs are supposed to be used only\r
+ * by this module.\r
+ *\r
+ * \note The pins of the specified LEDs are set to PWM output mode.\r
+ */\r
+extern void LED_Set_Intensity(U32 leds, U8 intensity);\r
+\r
+\r
+#endif // _LED_H_\r
--- /dev/null
+/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */\r
+\r
+/*This file is prepared for Doxygen automatic documentation generation.*/\r
+/*! \file *********************************************************************\r
+ *\r
+ * \brief Standard board header file.\r
+ *\r
+ * This file includes the appropriate board header file according to the\r
+ * defined board.\r
+ *\r
+ * - Compiler: IAR EWAVR32 and GNU GCC for AVR32\r
+ * - Supported devices: All AVR32 devices can be used.\r
+ * - AppNote:\r
+ *\r
+ * \author Atmel Corporation: http://www.atmel.com \n\r
+ * Support email: avr32@atmel.com\r
+ *\r
+ ******************************************************************************/\r
+\r
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the following disclaimer.\r
+ *\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ * this list of conditions and the following disclaimer in the documentation\r
+ * and/or other materials provided with the distribution.\r
+ *\r
+ * 3. The name of ATMEL may not be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND\r
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,\r
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\r
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\r
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND\r
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF\r
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ */\r
+\r
+\r
+#ifndef _BOARD_H_\r
+#define _BOARD_H_\r
+\r
+#if __GNUC__\r
+# include <avr32/io.h>\r
+#elif __ICCAVR32__ || __AAVR32__\r
+# include <avr32/iouc3a0512.h>\r
+#else\r
+# error Unknown compiler\r
+#endif\r
+\r
+#define EVK1100 1 //!< AT32UC3A EVK1100 board.\r
+\r
+#if BOARD == EVK1100\r
+# include "EVK1100/evk1100.h"\r
+#else\r
+# error No known AVR32 board defined\r
+#endif\r
+\r
+\r
+#ifndef FRCOSC\r
+# define FRCOSC AVR32_PM_RCOSC_FREQUENCY //!< Default RCOsc frequency.\r
+#endif\r
+\r
+\r
+#endif // _BOARD_H_\r
--- /dev/null
+\documentclass{article}
+\usepackage{epsfig}
+\pagestyle{empty}
+\begin{document}
+$ baudrate = \frac{Selected Clock}{16 \times CD} $
+\pagebreak
+
+$ baudrate = \frac{Selected Clock}{8 \times CD} $
+\pagebreak
+
+\end{document}
--- /dev/null
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--- /dev/null
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--- /dev/null
+/* This source file is part of the ATMEL FREERTOS-0.9.0 Release */\r
+\r
+/*This file has been prepared for Doxygen automatic documentation generation.*/\r
+/*! \file *********************************************************************\r
+ *\r
+ * \brief GPIO driver for AVR32 UC3.\r
+ *\r
+ * This file defines a useful set of functions for the GPIO.\r
+ *\r
+ * - Compiler: IAR EWAVR32 and GNU GCC for AVR32\r
+ * - Supported devices: All AVR32 devices with a PWM module can be used.\r
+ * - AppNote:\r
+ *\r
+ * \author Atmel Corporation: http://www.atmel.com \n\r
+ * Support email: avr32@atmel.com\r
+ *\r
+ *****************************************************************************/\r
+\r
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the following disclaimer.\r
+ *\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ * this list of conditions and the following disclaimer in the documentation\r
+ * and/or other materials provided with the distribution.\r
+ *\r
+ * 3. The name of ATMEL may not be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND\r
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,\r
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\r
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\r
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND\r
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF\r
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ */\r
+\r
+\r
+#include "gpio.h"\r
+\r
+\r
+//! GPIO module instance.\r
+#define GPIO AVR32_GPIO\r
+\r
+\r
+int gpio_enable_module(avr32_gpiomap_t gpiomap, int size)\r
+{\r
+ int i,status=GPIO_SUCCESS;\r
+\r
+ for(i=0; i<size; i++) {\r
+ status |= gpio_enable_module_pin(**gpiomap, *(*gpiomap+1) );\r
+ gpiomap++;\r
+ }\r
+\r
+ return status;\r
+}\r
+\r
+\r
+int gpio_enable_module_pin(int pin, int function)\r
+{\r
+ volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin/32];\r
+\r
+ // Enable the correct function\r
+ switch(function)\r
+ {\r
+ case 0: // A function\r
+ gpio_port->pmr0c = (1<<(pin%32));\r
+ gpio_port->pmr1c = (1<<(pin%32));\r
+ break;\r
+ case 1: // B function\r
+ gpio_port->pmr0s = (1<<(pin%32));\r
+ gpio_port->pmr1c = (1<<(pin%32));\r
+ break;\r
+ case 2: // C function\r
+ gpio_port->pmr0c = (1<<(pin%32));\r
+ gpio_port->pmr1s = (1<<(pin%32));\r
+ break;\r
+ default:\r
+ return GPIO_INVALID_ARGUMENT;\r
+ }\r
+\r
+ // Disable gpio control\r
+ gpio_port->gperc = (1<<(pin%32));\r
+\r
+ return GPIO_SUCCESS;\r
+}\r
+\r
+\r
+void gpio_enable_gpio(avr32_gpiomap_t gpiomap, int size)\r
+{\r
+ int i;\r
+\r
+ for(i=0; i<size; i++){\r
+ gpio_enable_gpio_pin(**gpiomap);\r
+ gpiomap++;\r
+ }\r
+}\r
+\r
+\r
+void gpio_enable_gpio_pin(int pin)\r
+{\r
+ volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin/32];\r
+ gpio_port->gpers = 1<<(pin%32);\r
+}\r
+\r
+\r
+void gpio_enable_gpio_glitch_filter(int pin)\r
+{\r
+ volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin/32];\r
+ gpio_port->gfers = 1<<(pin%32);\r
+}\r
+\r
+\r
+void gpio_disable_gpio_glitch_filter(int pin)\r
+{\r
+ volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin/32];\r
+ gpio_port->gferc = 1<<(pin%32);\r
+}\r
+\r
+\r
+void gpio_disable_module(avr32_gpiomap_t gpiomap, int size)\r
+{\r
+ int i;\r
+\r
+ for(i=0; i<size; i++){\r
+ gpio_disable_gpio_pin(**gpiomap);\r
+ gpiomap++;\r
+ }\r
+}\r
+\r
+\r
+void gpio_disable_gpio_pin(int pin)\r
+{\r
+ volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin/32];\r
+ gpio_port->gperc = 1<<(pin%32);\r
+}\r
+\r
+\r
+int gpio_pin_value(int pin)\r
+{\r
+ volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin/32];\r
+ return (gpio_port->pvr >>(pin%32))&1;\r
+}\r
+\r
+\r
+void gpio_set_gpio_pin(int pin)\r
+{\r
+ // The port holding that pin.\r
+ volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin/32];\r
+\r
+ gpio_port->ovrs = (1<<(pin%32)); // Value to be driven on the I/O line: 1\r
+ gpio_port->oders = (1<<(pin%32)); // The GPIO output driver is enabled for that pin.\r
+ gpio_port->gpers = (1<<(pin%32)); // The GPIO module controls that pin.\r
+}\r
+\r
+\r
+void gpio_clr_gpio_pin(int pin)\r
+{\r
+ volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin/32]; // The port holding that pin.\r
+\r
+ gpio_port->ovrc = (1<<(pin%32)); // Value to be driven on the I/O line: 0\r
+ gpio_port->oders = (1<<(pin%32)); // The GPIO output driver is enabled for that pin.\r
+ gpio_port->gpers = (1<<(pin%32)); // The GPIO module controls that pin.\r
+}\r
+\r
+\r
+void gpio_tgl_gpio_pin(int pin)\r
+{\r
+ volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin/32]; // The port holding that pin.\r
+\r
+ gpio_port->ovrt = (1<<(pin%32)); // Toggle the I/O line.\r
+ gpio_port->oders = (1<<(pin%32)); // The GPIO output driver is enabled for that pin.\r
+ gpio_port->gpers = (1<<(pin%32)); // The GPIO module controls that pin.\r
+}\r
+\r
+\r
+void gpio_cfg_int_gpio_pin(int pin, int level)\r
+{\r
+ volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin/32]; // The port holding that pin.\r
+\r
+ gpio_port->gpers = 1<<(pin%32); // GPIO controller enable\r
+ gpio_port->gfers = 1<<(pin%32); // GPIO glitch filter enable\r
+ switch (level)\r
+ {\r
+ case GPIO_RISING_EDGE:\r
+ {\r
+ // mode rising edge\r
+ gpio_port->imr0s = 1<<(pin%32);\r
+ gpio_port->imr1c = 1<<(pin%32);\r
+ break;\r
+ }\r
+ case GPIO_FALLING_EDGE:\r
+ {\r
+ // mode falling edge\r
+ gpio_port->imr0c = 1<<(pin%32);\r
+ gpio_port->imr1s = 1<<(pin%32);\r
+ break;\r
+ }\r
+ default :\r
+ {\r
+ // mode pin change\r
+ gpio_port->imr0c = 1<<(pin%32);\r
+ gpio_port->imr1c = 1<<(pin%32);\r
+ break;\r
+ }\r
+ }\r
+ gpio_port->iers = 1<<(pin%32); // GPIO interrupt enable\r
+}\r
--- /dev/null
+/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */\r
+\r
+/*This file has been prepared for Doxygen automatic documentation generation.*/\r
+/*! \file *********************************************************************\r
+ *\r
+ * \brief GPIO header for AVR32 UC3.\r
+ *\r
+ * This file contains basic GPIO driver functions.\r
+ *\r
+ * - Compiler: IAR EWAVR32 and GNU GCC for AVR32\r
+ * - Supported devices: All AVR32 devices with a GPIO module can be used.\r
+ * - AppNote:\r
+ *\r
+ * \author Atmel Corporation: http://www.atmel.com \n\r
+ * Support email: avr32@atmel.com\r
+ *\r
+ *****************************************************************************/\r
+\r
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the following disclaimer.\r
+ *\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ * this list of conditions and the following disclaimer in the documentation\r
+ * and/or other materials provided with the distribution.\r
+ *\r
+ * 3. The name of ATMEL may not be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND\r
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,\r
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\r
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\r
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND\r
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF\r
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ */\r
+\r
+\r
+#ifndef _GPIO_H_\r
+#define _GPIO_H_\r
+\r
+#if __GNUC__\r
+# include <avr32/io.h>\r
+#elif __ICCAVR32__\r
+# include <avr32/iouc3a0512.h>\r
+#else\r
+# error Unknown compiler\r
+#endif\r
+\r
+\r
+/*! \name General GPIO API defines\r
+ * These values are returned by the GPIO API:\r
+ */\r
+//! @{\r
+#define GPIO_SUCCESS 0 //!< Function successfully completed\r
+#define GPIO_FAILURE -1 //!< Function did not successfully complete for some unspecified reason\r
+#define GPIO_INVALID_ARGUMENT 1 //!< Input paramters are out of range\r
+//! @}\r
+\r
+\r
+/*! \name Interrupt configuration defines\r
+ * Configure the method used to trigger the interrupt:\r
+ */\r
+//! @{\r
+#define GPIO_RISING_EDGE 1 //!< configure IT upon Rising Edge\r
+#define GPIO_FALLING_EDGE 2 //!< configure IT upon Falling Edge\r
+#define GPIO_INPUT_CHANGE 3 //!< configure IT upon Pin Change\r
+//! @}\r
+\r
+\r
+/*!\r
+ * A type definitions of pins and module connectivity.\r
+ * First column is the pin number, the second is gpio connectivity.\r
+ */\r
+typedef char avr32_gpiomap_t[][2];\r
+\r
+\r
+/*!\r
+ * \brief Enable a module pin for a given set of pins and respective modules.\r
+ *\r
+ * \param gpiomap A list of pins and pio connectivity\r
+ * \param size The number of pins in \a gpiomap\r
+ * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT\r
+ */\r
+extern int gpio_enable_module(avr32_gpiomap_t gpiomap, int size);\r
+\r
+/*!\r
+ * \brief Enable a special module (function) for a pin (pin number).\r
+ *\r
+ * \param pin The pin number\r
+ * \param function The pin function\r
+ * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT\r
+ */\r
+extern int gpio_enable_module_pin(int pin, int function);\r
+\r
+/*!\r
+ * \brief Enable pins of a module according gpiomap.\r
+ *\r
+ * \param gpiomap The pin map\r
+ * \param size The number of pins in \a gpiomap\r
+ */\r
+extern void gpio_enable_gpio(avr32_gpiomap_t gpiomap, int size);\r
+\r
+/*!\r
+ * \brief Enable the GPIO module to control the pin.\r
+ *\r
+ * \param pin The pin number\r
+ */\r
+extern void gpio_enable_gpio_pin(int pin);\r
+\r
+/*!\r
+ * \brief Enable the GPIO glitch filter.\r
+ *\r
+ * When the glitch filter is enabled, a\r
+ * glitch with duration of less than 1 clock cycle is automatically rejected, while a pulse with duration\r
+ * of 2 clock cycles or more is accepted. For pulse durations between 1 clock cycle and 2 clock\r
+ * cycles, the pulse may or may not be taken into account, depending on the precise timing of its\r
+ * occurrence. Thus for a pulse to be guaranteed visible it must exceed 2 clock cycles, whereas for\r
+ * a glitch to be reliably filtered out, its duration must not exceed 1 clock cycle. The filter introduces\r
+ * 2 clock cycles latency.\r
+ *\r
+ * \param pin The pin number\r
+ * \return \ref GPIO_SUCCESS\r
+ */\r
+extern void gpio_enable_gpio_glitch_filter(int pin);\r
+\r
+/*!\r
+ * \brief Disable the GPIO glitch filter.\r
+ *\r
+ * \param pin The pin number\r
+ */\r
+extern void gpio_disable_gpio_glitch_filter(int pin);\r
+\r
+/*!\r
+ * \brief Return the pin value\r
+ *\r
+ * \param pin The pin number\r
+ * \return pin value\r
+ */\r
+extern int gpio_pin_value(int pin);\r
+\r
+/*!\r
+ * \brief Disable the GPIO module to control a set of pins according to gpiomap.\r
+ *\r
+ * \param gpiomap The pin map\r
+ * \param size The number of pins in \a gpiomap\r
+ */\r
+extern void gpio_disable_module(avr32_gpiomap_t gpiomap, int size);\r
+\r
+/*!\r
+ * \brief Disable the GPIO module to control the pin.\r
+ *\r
+ * \param pin The pin number\r
+ */\r
+extern void gpio_disable_gpio_pin(int pin);\r
+\r
+/*!\r
+ * \brief Configure a pin to generate IT\r
+ *\r
+ * \param pin GPIO pin number to configure.\r
+ * \param level level to configure (\ref GPIO_RISING_EDGE, \ref GPIO_FALLING_EDGE, \ref GPIO_INPUT_CHANGE).\r
+ */\r
+extern void gpio_cfg_int_gpio_pin(int pin, int level);\r
+\r
+/*!\r
+ * \brief Drive a gpio pin value to 1.\r
+ *\r
+ * \param pin The pin number\r
+ */\r
+extern void gpio_set_gpio_pin(int pin);\r
+\r
+/*!\r
+ * \brief Drive a gpio pin value to 0.\r
+ *\r
+ * \param pin The pin number\r
+ */\r
+extern void gpio_clr_gpio_pin(int pin);\r
+\r
+/*!\r
+ * \brief This function toggle a gpio pin value.\r
+ *\r
+ * \param pin The pin number\r
+ */\r
+extern void gpio_tgl_gpio_pin(int pin);\r
+\r
+\r
+#endif // _GPIO_H_\r
--- /dev/null
+/*This file is prepared for Doxygen automatic documentation generation.*/\r
+/*! \file *********************************************************************\r
+ *\r
+ * \brief INTC driver for AVR32 UC3.\r
+ *\r
+ * AVR32 Interrupt Controller driver module.\r
+ *\r
+ * - Compiler: IAR EWAVR32 and GNU GCC for AVR32\r
+ * - Supported devices: All AVR32 devices with an INTC module can be used.\r
+ * - AppNote:\r
+ *\r
+ * \author Atmel Corporation: http://www.atmel.com \n\r
+ * Support email: avr32@atmel.com\r
+ *\r
+ ******************************************************************************/\r
+\r
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the following disclaimer.\r
+ *\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ * this list of conditions and the following disclaimer in the documentation\r
+ * and/or other materials provided with the distribution.\r
+ *\r
+ * 3. The name of ATMEL may not be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND\r
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,\r
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\r
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\r
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND\r
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF\r
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ */\r
+\r
+\r
+#if __GNUC__\r
+# include <avr32/io.h>\r
+#elif __ICCAVR32__\r
+# include <avr32/iouc3a0512.h>\r
+#else\r
+# error Unknown compiler\r
+#endif\r
+\r
+#include "compiler.h"\r
+#include "preprocessor.h"\r
+#include "intc.h"\r
+\r
+\r
+//! Values to store in the interrupt priority registers for the various interrupt priority levels.\r
+extern const unsigned int ipr_val[AVR32_INTC_NUM_INT_LEVELS];\r
+\r
+//! Creates a table of interrupt line handlers per interrupt group in order to optimize RAM space.\r
+//! Each line handler table contains a set of pointers to interrupt handlers.\r
+#define DECL_INT_LINE_HANDLER_TABLE(GRP, unused) \\r
+static volatile __int_handler _int_line_handler_table_##GRP[AVR32_INTC_NUM_IRQS_PER_GRP##GRP];\r
+MREPEAT(AVR32_INTC_NUM_INT_GRPS, DECL_INT_LINE_HANDLER_TABLE, ~);\r
+#undef DECL_INT_LINE_HANDLER_TABLE\r
+\r
+//! Table containing for each interrupt group the number of interrupt request\r
+//! lines and a pointer to the table of interrupt line handlers.\r
+static const struct\r
+{\r
+ unsigned int num_irqs;\r
+ volatile __int_handler *_int_line_handler_table;\r
+} _int_handler_table[AVR32_INTC_NUM_INT_GRPS] =\r
+{\r
+#define INSERT_INT_LINE_HANDLER_TABLE(GRP, unused) \\r
+ {AVR32_INTC_NUM_IRQS_PER_GRP##GRP, _int_line_handler_table_##GRP},\r
+ MREPEAT(AVR32_INTC_NUM_INT_GRPS, INSERT_INT_LINE_HANDLER_TABLE, ~)\r
+#undef INSERT_INT_LINE_HANDLER_TABLE\r
+};\r
+\r
+\r
+/*! \brief Default interrupt handler.\r
+ *\r
+ * \note Taken and adapted from Newlib.\r
+ */\r
+#if __GNUC__\r
+__attribute__((__interrupt__))\r
+#elif __ICCAVR32__\r
+__interrupt\r
+#endif\r
+static void _unhandled_interrupt(void)\r
+{\r
+ // Catch unregistered interrupts.\r
+ while (TRUE);\r
+}\r
+\r
+\r
+/*! \brief Gets the interrupt handler of the current event at the \a int_lev\r
+ * interrupt priority level (called from exception.S).\r
+ *\r
+ * \param int_lev Interrupt priority level to handle.\r
+ *\r
+ * \return Interrupt handler to execute.\r
+ *\r
+ * \note Taken and adapted from Newlib.\r
+ */\r
+__int_handler _get_interrupt_handler(unsigned int int_lev)\r
+{\r
+ // ICR3 is mapped first, ICR0 last.\r
+ // Code in exception.S puts int_lev in R12 which is used by AVR32-GCC to pass\r
+ // a single argument to a function.\r
+ unsigned int int_grp = (&AVR32_INTC.icr3)[INT3 - int_lev];\r
+ unsigned int int_req = AVR32_INTC.irr[int_grp];\r
+\r
+ // As an interrupt may disappear while it is being fetched by the CPU\r
+ // (spurious interrupt caused by a delayed response from an MCU peripheral to\r
+ // an interrupt flag clear or interrupt disable instruction), check if there\r
+ // are remaining interrupt lines to process.\r
+ // If a spurious interrupt occurs, the status register (SR) contains an\r
+ // execution mode and interrupt level masks corresponding to a level 0\r
+ // interrupt, whatever the interrupt priority level causing the spurious\r
+ // event. This behavior has been chosen because a spurious interrupt has not\r
+ // to be a priority one and because it may not cause any trouble to other\r
+ // interrupts.\r
+ // However, these spurious interrupts place the hardware in an unstable state\r
+ // and could give problems in other/future versions of the CPU, so the\r
+ // software has to be written so that they never occur. The only safe way of\r
+ // achieving this is to always clear or disable peripheral interrupts with the\r
+ // following sequence:\r
+ // 1: Mask the interrupt in the CPU by setting GM (or IxM) in SR.\r
+ // 2: Perform the bus access to the peripheral register that clears or\r
+ // disables the interrupt.\r
+ // 3: Wait until the interrupt has actually been cleared or disabled by the\r
+ // peripheral. This is usually performed by reading from a register in the\r
+ // same peripheral (it DOES NOT have to be the same register that was\r
+ // accessed in step 2, but it MUST be in the same peripheral), what takes\r
+ // bus system latencies into account, but peripheral internal latencies\r
+ // (generally 0 cycle) also have to be considered.\r
+ // 4: Unmask the interrupt in the CPU by clearing GM (or IxM) in SR.\r
+ // Note that steps 1 and 4 are useless inside interrupt handlers as the\r
+ // corresponding interrupt level is automatically masked by IxM (unless IxM is\r
+ // explicitly cleared by the software).\r
+ //\r
+ // Get the right IRQ handler.\r
+ //\r
+ // If several interrupt lines are active in the group, the interrupt line with\r
+ // the highest number is selected. This is to be coherent with the\r
+ // prioritization of interrupt groups performed by the hardware interrupt\r
+ // controller.\r
+ //\r
+ // If no handler has been registered for the pending interrupt,\r
+ // _unhandled_interrupt will be selected thanks to the initialization of\r
+ // _int_line_handler_table_x by INTC_init_interrupts.\r
+ //\r
+ // exception.S will provide the interrupt handler with a clean interrupt stack\r
+ // frame, with nothing more pushed onto the stack. The interrupt handler must\r
+ // manage the `rete' instruction, what can be done thanks to pure assembly,\r
+ // inline assembly or the `__attribute__((__interrupt__))' C function\r
+ // attribute.\r
+ return (int_req) ? _int_handler_table[int_grp]._int_line_handler_table[32 - clz(int_req) - 1] : NULL;\r
+}\r
+\r
+\r
+void INTC_init_interrupts(void)\r
+{\r
+ unsigned int int_grp, int_req;\r
+\r
+ // For all interrupt groups,\r
+ for (int_grp = 0; int_grp < AVR32_INTC_NUM_INT_GRPS; int_grp++)\r
+ {\r
+ // For all interrupt request lines of each group,\r
+ for (int_req = 0; int_req < _int_handler_table[int_grp].num_irqs; int_req++)\r
+ {\r
+ // Assign _unhandled_interrupt as default interrupt handler.\r
+ _int_handler_table[int_grp]._int_line_handler_table[int_req] = &_unhandled_interrupt;\r
+ }\r
+\r
+ // Set the interrupt group priority register to its default value.\r
+ // By default, all interrupt groups are linked to the interrupt priority\r
+ // level 0 and to the interrupt vector _int0.\r
+ AVR32_INTC.ipr[int_grp] = ipr_val[INT0];\r
+ }\r
+}\r
+\r
+\r
+void INTC_register_interrupt(__int_handler handler, unsigned int irq, unsigned int int_lev)\r
+{\r
+ unsigned int int_grp = irq / AVR32_INTC_MAX_NUM_IRQS_PER_GRP;\r
+\r
+ // Store in _int_line_handler_table_x the pointer to the interrupt handler, so\r
+ // that _get_interrupt_handler can retrieve it when the interrupt is vectored.\r
+ _int_handler_table[int_grp]._int_line_handler_table[irq % AVR32_INTC_MAX_NUM_IRQS_PER_GRP] = handler;\r
+\r
+ // Program the corresponding IPRX register to set the interrupt priority level\r
+ // and the interrupt vector offset that will be fetched by the core interrupt\r
+ // system.\r
+ // NOTE: The _intx functions are intermediate assembly functions between the\r
+ // core interrupt system and the user interrupt handler.\r
+ AVR32_INTC.ipr[int_grp] = ipr_val[int_lev & (AVR32_INTC_IPR0_INTLEV_MASK >> AVR32_INTC_IPR0_INTLEV_OFFSET)];\r
+}\r
--- /dev/null
+/*This file is prepared for Doxygen automatic documentation generation.*/\r
+/*! \file *********************************************************************\r
+ *\r
+ * \brief INTC driver for AVR32 UC3.\r
+ *\r
+ * AVR32 Interrupt Controller driver module.\r
+ *\r
+ * - Compiler: IAR EWAVR32 and GNU GCC for AVR32\r
+ * - Supported devices: All AVR32 devices with an INTC module can be used.\r
+ * - AppNote:\r
+ *\r
+ * \author Atmel Corporation: http://www.atmel.com \n\r
+ * Support email: avr32@atmel.com\r
+ *\r
+ ******************************************************************************/\r
+\r
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the following disclaimer.\r
+ *\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ * this list of conditions and the following disclaimer in the documentation\r
+ * and/or other materials provided with the distribution.\r
+ *\r
+ * 3. The name of ATMEL may not be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND\r
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,\r
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\r
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\r
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND\r
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF\r
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ */\r
+\r
+\r
+#ifndef _INTC_H_\r
+#define _INTC_H_\r
+\r
+#include "compiler.h"\r
+\r
+\r
+//! Maximal number of interrupt request lines per group.\r
+#define AVR32_INTC_MAX_NUM_IRQS_PER_GRP 32\r
+\r
+//! Number of interrupt priority levels.\r
+#define AVR32_INTC_NUM_INT_LEVELS (1 << AVR32_INTC_IPR0_INTLEV_SIZE)\r
+\r
+/*! \name Interrupt Priority Levels\r
+ */\r
+//! @{\r
+#define INT0 0 //!< Lowest interrupt priority level.\r
+#define INT1 1\r
+#define INT2 2\r
+#define INT3 3 //!< Highest interrupt priority level.\r
+//! @}\r
+\r
+\r
+#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling.\r
+\r
+//! Pointer to interrupt handler.\r
+#if __GNUC__\r
+typedef void (*__int_handler)(void);\r
+#elif __ICCAVR32__\r
+typedef void (__interrupt *__int_handler)(void);\r
+#endif\r
+\r
+\r
+/*! \brief Initializes the hardware interrupt controller driver.\r
+ *\r
+ * \note Taken and adapted from Newlib.\r
+ */\r
+extern void INTC_init_interrupts(void);\r
+\r
+/*! \brief Registers an interrupt handler.\r
+ *\r
+ * \param handler Interrupt handler to register.\r
+ * \param irq IRQ of the interrupt handler to register.\r
+ * \param int_lev Interrupt priority level to assign to the group of this IRQ.\r
+ *\r
+ * \warning The interrupt handler must manage the `rete' instruction, what can\r
+ * be done thanks to pure assembly, inline assembly or the\r
+ * `__attribute__((__interrupt__))' C function attribute.\r
+ *\r
+ * \warning If several interrupt handlers of a same group are registered with\r
+ * different priority levels, only the latest priority level set will\r
+ * be effective.\r
+ *\r
+ * \note Taken and adapted from Newlib.\r
+ */\r
+extern void INTC_register_interrupt(__int_handler handler, unsigned int irq, unsigned int int_lev);\r
+\r
+#endif // __AVR32_ABI_COMPILER__\r
+\r
+\r
+#endif // _INTC_H_\r
--- /dev/null
+/*This file has been prepared for Doxygen automatic documentation generation.*/\r
+/*! \file *********************************************************************\r
+ *\r
+ * \brief Power Manager driver.\r
+ *\r
+ *\r
+ * - Compiler: IAR EWAVR32 and GNU GCC for AVR32\r
+ * - Supported devices: All AVR32 devices.\r
+ * - AppNote:\r
+ *\r
+ * \author Atmel Corporation: http://www.atmel.com \n\r
+ * Support email: avr32@atmel.com\r
+ *\r
+ *****************************************************************************/\r
+\r
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the following disclaimer.\r
+ *\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ * this list of conditions and the following disclaimer in the documentation\r
+ * and/or other materials provided with the distribution.\r
+ *\r
+ * 3. The name of ATMEL may not be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND\r
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,\r
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\r
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\r
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND\r
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF\r
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ */\r
+\r
+\r
+#include "pm.h"\r
+\r
+\r
+void pm_enable_osc0_ext_clock(volatile avr32_pm_t *pm)\r
+{\r
+ union {\r
+ unsigned long oscctrl0;\r
+ avr32_pm_oscctrl0_t OSCCTRL0;\r
+ } oscctrl0 ;\r
+ // Read\r
+ oscctrl0.oscctrl0 = pm->oscctrl0;\r
+ // Modify\r
+ oscctrl0.OSCCTRL0.mode = AVR32_PM_OSCCTRL0_MODE_EXT_CLOCK;\r
+ // Write\r
+ pm->oscctrl0 = oscctrl0.oscctrl0;\r
+}\r
+\r
+\r
+void pm_enable_osc0_crystal(volatile avr32_pm_t *pm, unsigned int fosc0)\r
+{\r
+ union {\r
+ unsigned long oscctrl0;\r
+ avr32_pm_oscctrl0_t OSCCTRL0;\r
+ } oscctrl0 ;\r
+ // Read\r
+ oscctrl0.oscctrl0 = pm->oscctrl0;\r
+ // Modify\r
+ oscctrl0.OSCCTRL0.mode = (fosc0 < 8000000) ? AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G2 :\r
+ AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G3;\r
+ // Write\r
+ pm->oscctrl0 = oscctrl0.oscctrl0;\r
+}\r
+\r
+\r
+void pm_enable_clk0(volatile avr32_pm_t *pm, unsigned int startup)\r
+{\r
+ union {\r
+ avr32_pm_mcctrl_t MCCTRL;\r
+ unsigned long mcctrl;\r
+ } mcctrl;\r
+ union {\r
+ unsigned long oscctrl0;\r
+ avr32_pm_oscctrl0_t OSCCTRL0;\r
+ } oscctrl0 ;\r
+\r
+ // Read register\r
+ mcctrl.mcctrl = pm->mcctrl;\r
+ oscctrl0.oscctrl0 = pm->oscctrl0;\r
+ // Modify\r
+ mcctrl.MCCTRL.osc0en = 1;\r
+ oscctrl0.OSCCTRL0.startup = startup;\r
+ // Write back\r
+ pm->oscctrl0 = oscctrl0.oscctrl0;\r
+ pm->mcctrl = mcctrl.mcctrl;\r
+\r
+ while(!pm->ISR.osc0rdy); //For osc output valid\r
+}\r
+\r
+\r
+void pm_disable_clk0(volatile avr32_pm_t *pm)\r
+{\r
+ union {\r
+ avr32_pm_mcctrl_t MCCTRL;\r
+ unsigned long mcctrl;\r
+ } mcctrl;\r
+\r
+ // Read register\r
+ mcctrl.mcctrl = pm->mcctrl;\r
+\r
+ // Modify\r
+ mcctrl.MCCTRL.osc0en = 0;\r
+\r
+ // Write back\r
+ pm->mcctrl = mcctrl.mcctrl;\r
+}\r
+\r
+\r
+void pm_enable_clk0_no_wait(volatile avr32_pm_t *pm, unsigned int startup)\r
+{\r
+ union {\r
+ avr32_pm_mcctrl_t MCCTRL;\r
+ unsigned long mcctrl;\r
+ } mcctrl;\r
+ union {\r
+ unsigned long oscctrl0;\r
+ avr32_pm_oscctrl0_t OSCCTRL0;\r
+ } oscctrl0 ;\r
+\r
+ // Read register\r
+ mcctrl.mcctrl = pm->mcctrl;\r
+ oscctrl0.oscctrl0 = pm->oscctrl0;\r
+ // Modify\r
+ mcctrl.MCCTRL.osc0en = 1;\r
+ oscctrl0.OSCCTRL0.startup=startup;\r
+ // Write back\r
+ pm->mcctrl = mcctrl.mcctrl;\r
+ pm->oscctrl0 = oscctrl0.oscctrl0;\r
+}\r
+\r
+\r
+void pm_wait_for_clk0_ready(volatile avr32_pm_t *pm)\r
+{\r
+ while(!pm->ISR.osc0rdy);\r
+}\r
+\r
+\r
+void pm_enable_osc1_ext_clock(volatile avr32_pm_t *pm)\r
+{\r
+ union {\r
+ unsigned long oscctrl1;\r
+ avr32_pm_oscctrl1_t OSCCTRL1;\r
+ } oscctrl1 ;\r
+ // Read\r
+ oscctrl1.oscctrl1= pm->oscctrl1;\r
+ // Modify\r
+ oscctrl1.OSCCTRL1.mode = AVR32_PM_OSCCTRL1_MODE_EXT_CLOCK;\r
+ // Write\r
+ pm->oscctrl1 = oscctrl1.oscctrl1;\r
+}\r
+\r
+\r
+void pm_enable_osc1_crystal(volatile avr32_pm_t *pm, unsigned int fosc1)\r
+{\r
+ union {\r
+ unsigned long oscctrl1;\r
+ avr32_pm_oscctrl1_t OSCCTRL1;\r
+ } oscctrl1 ;\r
+ // Read\r
+ oscctrl1.oscctrl1= pm->oscctrl1;\r
+ // Modify\r
+ oscctrl1.OSCCTRL1.mode = (fosc1 < 8000000) ? AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G2 :\r
+ AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G3;\r
+ // Write\r
+ pm->oscctrl1 = oscctrl1.oscctrl1;\r
+}\r
+\r
+\r
+void pm_enable_clk1(volatile avr32_pm_t *pm, unsigned int startup)\r
+{\r
+ union {\r
+ avr32_pm_mcctrl_t MCCTRL;\r
+ unsigned long mcctrl;\r
+ } mcctrl;\r
+ union {\r
+ unsigned long oscctrl1;\r
+ avr32_pm_oscctrl1_t OSCCTRL1;\r
+ } oscctrl1 ;\r
+\r
+ // Read register\r
+ mcctrl.mcctrl = pm->mcctrl;\r
+ oscctrl1.oscctrl1 = pm->oscctrl1;\r
+\r
+ mcctrl.MCCTRL.osc1en = 1;\r
+ oscctrl1.OSCCTRL1.startup=startup;\r
+ // Write back\r
+ pm->oscctrl1 = oscctrl1.oscctrl1;\r
+ pm->mcctrl = mcctrl.mcctrl;\r
+\r
+ while(!pm->ISR.osc1rdy);\r
+}\r
+\r
+\r
+void pm_disable_clk1(volatile avr32_pm_t *pm)\r
+{\r
+ union {\r
+ avr32_pm_mcctrl_t MCCTRL;\r
+ unsigned long mcctrl;\r
+ } mcctrl;\r
+\r
+\r
+ // Read register\r
+ mcctrl.mcctrl = pm->mcctrl;\r
+\r
+ // Modify\r
+ mcctrl.MCCTRL.osc1en = 0;\r
+\r
+ // Write back\r
+ pm->mcctrl = mcctrl.mcctrl;\r
+}\r
+\r
+\r
+void pm_enable_clk1_no_wait(volatile avr32_pm_t *pm, unsigned int startup)\r
+{\r
+ union {\r
+ avr32_pm_mcctrl_t MCCTRL;\r
+ unsigned long mcctrl;\r
+ } mcctrl;\r
+ union {\r
+ unsigned long oscctrl1;\r
+ avr32_pm_oscctrl1_t OSCCTRL1;\r
+ } oscctrl1 ;\r
+\r
+ // Read register\r
+ mcctrl.mcctrl = pm->mcctrl;\r
+ oscctrl1.oscctrl1 = pm->oscctrl1;\r
+\r
+ mcctrl.MCCTRL.osc1en = 1;\r
+ oscctrl1.OSCCTRL1.startup=startup;\r
+ // Write back\r
+ pm->oscctrl1 = oscctrl1.oscctrl1;\r
+ pm->mcctrl = mcctrl.mcctrl;\r
+}\r
+\r
+\r
+void pm_wait_for_clk1_ready(volatile avr32_pm_t *pm)\r
+{\r
+ while(!pm->ISR.osc1rdy);\r
+}\r
+\r
+\r
+void pm_enable_osc32_ext_clock(volatile avr32_pm_t *pm)\r
+{\r
+ union {\r
+ unsigned long oscctrl32;\r
+ avr32_pm_oscctrl32_t OSCCTRL32;\r
+ } u_ctrl;\r
+ u_ctrl.oscctrl32 = pm->oscctrl32;\r
+ u_ctrl.OSCCTRL32.mode = AVR32_PM_OSCCTRL32_MODE_EXT_CLOCK;\r
+ pm->oscctrl32 = u_ctrl.oscctrl32;\r
+}\r
+\r
+\r
+void pm_enable_osc32_crystal(volatile avr32_pm_t *pm)\r
+{\r
+ union {\r
+ unsigned long oscctrl32;\r
+ avr32_pm_oscctrl32_t OSCCTRL32;\r
+ } u_ctrl;\r
+ u_ctrl.oscctrl32 = pm->oscctrl32;\r
+ u_ctrl.OSCCTRL32.mode = AVR32_PM_OSCCTRL32_MODE_CRYSTAL;\r
+ pm->oscctrl32 = u_ctrl.oscctrl32;\r
+}\r
+\r
+\r
+void pm_enable_clk32(volatile avr32_pm_t *pm, unsigned int startup)\r
+{\r
+ union {\r
+ unsigned long oscctrl32;\r
+ avr32_pm_oscctrl32_t OSCCTRL32;\r
+ } oscctrl32 ;\r
+\r
+ // Read register\r
+ oscctrl32.oscctrl32 = pm->oscctrl32;\r
+ // Modify\r
+ oscctrl32.OSCCTRL32.osc32en = 1;\r
+ oscctrl32.OSCCTRL32.startup=startup;\r
+ // Write back\r
+ pm->oscctrl32 = oscctrl32.oscctrl32;\r
+\r
+ while(!pm->ISR.osc32rdy);\r
+}\r
+\r
+\r
+void pm_disable_clk32(volatile avr32_pm_t *pm)\r
+{\r
+ // To get rid of a GCC bug\r
+ // This makes C code longer, but not ASM\r
+ union {\r
+ unsigned long oscctrl32;\r
+ avr32_pm_oscctrl32_t OSCCTRL32;\r
+ } oscctrl32 ;\r
+\r
+ // Read register\r
+ oscctrl32.oscctrl32 = pm->oscctrl32;\r
+ // Modify\r
+ oscctrl32.OSCCTRL32.osc32en = 0;\r
+ // Write back\r
+ pm->oscctrl32 = oscctrl32.oscctrl32;\r
+}\r
+\r
+\r
+void pm_enable_clk32_no_wait(volatile avr32_pm_t *pm, unsigned int startup)\r
+{\r
+ union {\r
+ unsigned long oscctrl32;\r
+ avr32_pm_oscctrl32_t OSCCTRL32;\r
+ } oscctrl32 ;\r
+\r
+ // Read register\r
+ oscctrl32.oscctrl32 = pm->oscctrl32;\r
+ // Modify\r
+ oscctrl32.OSCCTRL32.osc32en = 1;\r
+ oscctrl32.OSCCTRL32.startup=startup;\r
+ // Write back\r
+ pm->oscctrl32 = oscctrl32.oscctrl32;\r
+}\r
+\r
+\r
+void pm_wait_for_clk32_ready(volatile avr32_pm_t *pm)\r
+{\r
+ // To get rid of a GCC bug\r
+ // This makes C code longer, but not ASM\r
+\r
+ while(!pm->ISR.osc32rdy);\r
+}\r
+\r
+\r
+void pm_cksel(volatile avr32_pm_t *pm,\r
+ unsigned int pbadiv,\r
+ unsigned int pbasel,\r
+ unsigned int pbbdiv,\r
+ unsigned int pbbsel,\r
+ unsigned int hsbdiv,\r
+ unsigned int hsbsel)\r
+{\r
+ // Force the compiler to generate only one 32 bits access\r
+ union {\r
+ avr32_pm_cksel_t selval ;\r
+ unsigned long uword32;\r
+ } cksel;\r
+\r
+ cksel.uword32 = 0;\r
+\r
+ cksel.selval.cpudiv = hsbdiv;\r
+ cksel.selval.cpusel = hsbsel;\r
+ cksel.selval.hsbdiv = hsbdiv;\r
+ cksel.selval.hsbsel = hsbsel;\r
+ cksel.selval.pbbdiv = pbbdiv;\r
+ cksel.selval.pbbsel = pbbsel;\r
+ cksel.selval.pbadiv = pbadiv;\r
+ cksel.selval.pbasel = pbasel;\r
+\r
+ pm->cksel = cksel.uword32;\r
+\r
+ // Wait for ckrdy bit and then clear it\r
+ while(!(pm->ISR.ckrdy));\r
+\r
+ return;\r
+}\r
+\r
+\r
+void pm_gc_setup(volatile avr32_pm_t *pm,\r
+ unsigned int gc,\r
+ unsigned int osc_or_pll, // Use Osc (=0) or PLL (=1)\r
+ unsigned int pll_osc, // Sel Osc0/PLL0 or Osc1/PLL1\r
+ unsigned int diven,\r
+ unsigned int div) {\r
+ union {\r
+ unsigned long gcctrl;\r
+ avr32_pm_gcctrl_t GCCTRL;\r
+ } u_gc;\r
+\r
+ u_gc.GCCTRL.oscsel = pll_osc;\r
+ u_gc.GCCTRL.pllsel = osc_or_pll;\r
+ u_gc.GCCTRL.diven = diven;\r
+ u_gc.GCCTRL.div = div;\r
+ u_gc.GCCTRL.cen = 0; // Disable GC first\r
+ pm->gcctrl[gc] = u_gc.gcctrl;\r
+}\r
+\r
+\r
+void pm_gc_enable(volatile avr32_pm_t *pm,\r
+ unsigned int gc) {\r
+ union {\r
+ unsigned long gcctrl;\r
+ avr32_pm_gcctrl_t GCCTRL;\r
+ } u_gc;\r
+ u_gc.gcctrl = pm->gcctrl[gc];\r
+ u_gc.GCCTRL.cen = 1;\r
+ pm->gcctrl[gc] = u_gc.gcctrl;\r
+}\r
+\r
+\r
+void pm_gc_disable(volatile avr32_pm_t *pm,\r
+ unsigned int gc) {\r
+ union {\r
+ unsigned long gcctrl;\r
+ avr32_pm_gcctrl_t GCCTRL;\r
+ } u_gc;\r
+ u_gc.gcctrl = pm->gcctrl[gc];\r
+ u_gc.GCCTRL.cen = 0;\r
+ pm->gcctrl[gc] = u_gc.gcctrl;\r
+}\r
+\r
+\r
+void pm_pll_setup(volatile avr32_pm_t *pm,\r
+ unsigned int pll,\r
+ unsigned int mul,\r
+ unsigned int div,\r
+ unsigned int osc,\r
+ unsigned int lockcount) {\r
+\r
+ union {\r
+ unsigned long pll ;\r
+ avr32_pm_pll_t PLL ;\r
+ } u_pll;\r
+\r
+ u_pll.pll=0;\r
+\r
+ u_pll.PLL.pllmul = mul;\r
+ u_pll.PLL.plldiv = div;\r
+ u_pll.PLL.pllosc = osc;\r
+ u_pll.PLL.pllcount = lockcount;\r
+\r
+ u_pll.PLL.pllopt = 0;\r
+\r
+ u_pll.PLL.plltest = 0;\r
+\r
+ (pm->pll)[pll] = u_pll.pll;\r
+}\r
+\r
+\r
+void pm_pll_set_option(volatile avr32_pm_t *pm,\r
+ unsigned int pll,\r
+ unsigned int pll_freq,\r
+ unsigned int pll_div2,\r
+ unsigned int pll_wbwdisable) {\r
+ union {\r
+ unsigned long pll ;\r
+ avr32_pm_pll_t PLL ;\r
+ } u_pll;\r
+\r
+ u_pll.pll = (pm->pll)[pll];\r
+ u_pll.PLL.pllopt = pll_freq | (pll_div2<<1) | (pll_wbwdisable<<2);\r
+ (pm->pll)[pll] = u_pll.pll;\r
+}\r
+\r
+\r
+unsigned int pm_pll_get_option(volatile avr32_pm_t *pm,\r
+ unsigned int pll) {\r
+ return (pm->PLL)[pll].pllopt;\r
+}\r
+\r
+\r
+void pm_pll_enable(volatile avr32_pm_t *pm,\r
+ unsigned int pll) {\r
+ union {\r
+ unsigned long pll ;\r
+ avr32_pm_pll_t PLL ;\r
+ } u_pll;\r
+\r
+ u_pll.pll = (pm->pll)[pll];\r
+ u_pll.PLL.pllen = 1;\r
+ (pm->pll)[pll] = u_pll.pll;\r
+}\r
+\r
+\r
+void pm_pll_disable(volatile avr32_pm_t *pm,\r
+ unsigned int pll) {\r
+ union {\r
+ unsigned long pll ;\r
+ avr32_pm_pll_t PLL ;\r
+ } u_pll;\r
+\r
+ u_pll.pll = (pm->pll)[pll];\r
+ u_pll.PLL.pllen = 0;\r
+ (pm->pll)[pll] = u_pll.pll;\r
+}\r
+\r
+\r
+void pm_wait_for_pll0_locked(volatile avr32_pm_t *pm)\r
+{\r
+ while(!pm->ISR.lock0);\r
+\r
+ // Bypass the lock signal of the PLL\r
+ pm->pll[0] |= AVR32_PM_PLL0_PLLBPL_MASK;\r
+}\r
+\r
+\r
+void pm_wait_for_pll1_locked(volatile avr32_pm_t *pm)\r
+{\r
+ while(!pm->ISR.lock1);\r
+\r
+ // Bypass the lock signal of the PLL\r
+ pm->pll[1] |= AVR32_PM_PLL1_PLLBPL_MASK;\r
+}\r
+\r
+\r
+void pm_switch_to_clock(volatile avr32_pm_t *pm, unsigned long clock)\r
+{\r
+ union {\r
+ avr32_pm_mcctrl_t MCCTRL;\r
+ unsigned long mcctrl;\r
+ } mcctrl;\r
+ // Read\r
+ mcctrl.mcctrl = pm->mcctrl;\r
+ // Modify\r
+ mcctrl.MCCTRL.mcsel = clock;\r
+ // Write Back\r
+ pm->MCCTRL.mcsel = mcctrl.mcctrl;\r
+}\r
+\r
+\r
+void pm_switch_to_osc0(volatile avr32_pm_t *pm, unsigned int fosc0, unsigned int startup)\r
+{\r
+ pm_enable_osc0_crystal(pm, fosc0); // Enable the Osc0 in crystal mode\r
+ pm_enable_clk0(pm, startup); // Crystal startup time - This parameter is critical and depends on the characteristics of the crystal\r
+ pm_switch_to_clock(pm, AVR32_PM_MCSEL_OSC0); // Then switch main clock to Osc0\r
+}\r
+\r
+\r
+void pm_bod_enable_irq(volatile struct avr32_pm_t *pm) {\r
+\r
+ union {\r
+ unsigned long ier ;\r
+ avr32_pm_ier_t IER ;\r
+ } u_ier;\r
+ u_ier.ier = 0;\r
+ u_ier.IER.boddet = 1;\r
+\r
+ pm->ier = u_ier.ier;\r
+}\r
+\r
+\r
+void pm_bod_disable_irq(volatile struct avr32_pm_t *pm) {\r
+\r
+ union {\r
+ unsigned long idr ;\r
+ avr32_pm_idr_t IDR ;\r
+ } u_idr;\r
+ u_idr.idr = 0;\r
+ u_idr.IDR.boddet = 1;\r
+\r
+ pm->idr = u_idr.idr;\r
+}\r
+\r
+\r
+void pm_bod_clear_irq(volatile struct avr32_pm_t *pm) {\r
+\r
+ union {\r
+ unsigned long icr ;\r
+ avr32_pm_idr_t ICR ;\r
+ } u_icr;\r
+ u_icr.icr = 0;\r
+ u_icr.ICR.boddet = 1;\r
+\r
+ pm->icr = u_icr.icr;\r
+}\r
+\r
+\r
+unsigned long pm_bod_get_irq_status(volatile struct avr32_pm_t *pm) {\r
+\r
+ return pm->ISR.boddet;\r
+}\r
+\r
+\r
+unsigned long pm_bod_get_irq_enable_bit(volatile struct avr32_pm_t *pm) {\r
+\r
+ return pm->IMR.boddet;\r
+}\r
+\r
+\r
+unsigned long pm_bod_get_level(volatile avr32_pm_t *pm) {\r
+ union {\r
+ unsigned long bod ;\r
+ avr32_pm_bod_t BOD ;\r
+ } u_bod;\r
+\r
+ u_bod.bod = pm->bod;\r
+\r
+ return (unsigned long) u_bod.BOD.level;\r
+\r
+}\r
+\r
+\r
+void pm_write_gplp(volatile avr32_pm_t *pm,unsigned long gplp, unsigned long value) {\r
+ (pm->gplp)[gplp] = value;\r
+\r
+}\r
+\r
+\r
+unsigned long pm_read_gplp(volatile avr32_pm_t *pm,unsigned long gplp) {\r
+\r
+ return (pm->gplp)[gplp];\r
+}\r
--- /dev/null
+/*This file has been prepared for Doxygen automatic documentation generation.*/\r
+/*! \file *********************************************************************\r
+ *\r
+ * \brief Power Manager driver.\r
+ *\r
+ *\r
+ * - Compiler: IAR EWAVR32 and GNU GCC for AVR32\r
+ * - Supported devices: All AVR32 devices.\r
+ * - AppNote:\r
+ *\r
+ * \author Atmel Corporation: http://www.atmel.com \n\r
+ * Support email: avr32@atmel.com\r
+ *\r
+ *****************************************************************************/\r
+\r
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the following disclaimer.\r
+ *\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ * this list of conditions and the following disclaimer in the documentation\r
+ * and/or other materials provided with the distribution.\r
+ *\r
+ * 3. The name of ATMEL may not be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND\r
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,\r
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\r
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\r
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND\r
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF\r
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ */\r
+\r
+\r
+#ifndef _PM_H_\r
+#define _PM_H_\r
+\r
+#if __GNUC__\r
+# include <avr32/io.h>\r
+#elif __ICCAVR32__\r
+# include <avr32/iouc3a0512.h>\r
+# include <avr32/uc3a0512.h>\r
+#else\r
+# error Unknown compiler\r
+#endif\r
+\r
+#include "compiler.h"\r
+#include "preprocessor.h"\r
+\r
+\r
+/*! \brief Sets the MCU in the specified sleep mode.\r
+ *\r
+ * \param mode Sleep mode:\r
+ * \arg \c AVR32_PM_SMODE_IDLE: Idle;\r
+ * \arg \c AVR32_PM_SMODE_FROZEN: Frozen;\r
+ * \arg \c AVR32_PM_SMODE_STANDBY: Standby;\r
+ * \arg \c AVR32_PM_SMODE_STOP: Stop;\r
+ * \arg \c AVR32_PM_SMODE_SHUTDOWN: Shutdown (DeepStop);\r
+ * \arg \c AVR32_PM_SMODE_STATIC: Static.\r
+ */\r
+#define SLEEP(mode) {__asm__ __volatile__ ("sleep "STRINGZ(mode));}\r
+\r
+\r
+/*!\r
+ * \brief This function will enable the external clock mode of the oscillator 0.\r
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)\r
+ */\r
+extern void pm_enable_osc0_ext_clock(volatile avr32_pm_t *pm);\r
+\r
+\r
+/*!\r
+ * \brief This function will enable the crystal mode of the oscillator 0.\r
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)\r
+ * \param fosc0 Oscillator 0 crystal frequency (Hz)\r
+ */\r
+extern void pm_enable_osc0_crystal(volatile avr32_pm_t *pm, unsigned int fosc0);\r
+\r
+\r
+/*!\r
+ * \brief This function will enable the oscillator 0 to be used with a startup time.\r
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)\r
+ * \param startup Clock 0 startup time. Time is expressed in term of RCOsc periods (3-bit value)\r
+ */\r
+extern void pm_enable_clk0(volatile avr32_pm_t *pm, unsigned int startup);\r
+\r
+\r
+/*!\r
+ * \brief This function will disable the oscillator 0.\r
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)\r
+ */\r
+extern void pm_disable_clk0(volatile avr32_pm_t *pm);\r
+\r
+\r
+/*!\r
+ * \brief This function will enable the oscillator 0 to be used with no startup time.\r
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)\r
+ * \param startup Clock 0 startup time. Time is expressed in term of RCOsc periods (3-bit value) but not checked.\r
+ */\r
+extern void pm_enable_clk0_no_wait(volatile avr32_pm_t *pm, unsigned int startup);\r
+\r
+\r
+/*!\r
+ * \brief This function will wait until the Osc0 clock is ready.\r
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)\r
+ */\r
+extern void pm_wait_for_clk0_ready(volatile avr32_pm_t *pm);\r
+\r
+\r
+/*!\r
+ * \brief This function will enable the external clock mode of the oscillator 1.\r
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)\r
+ */\r
+extern void pm_enable_osc1_ext_clock(volatile avr32_pm_t *pm);\r
+\r
+\r
+/*!\r
+ * \brief This function will enable the crystal mode of the oscillator 1.\r
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)\r
+ * \param fosc1 Oscillator 1 crystal frequency (Hz)\r
+ */\r
+extern void pm_enable_osc1_crystal(volatile avr32_pm_t *pm, unsigned int fosc1);\r
+\r
+\r
+/*!\r
+ * \brief This function will enable the oscillator 1 to be used with a startup time.\r
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)\r
+ * \param startup Clock 1 startup time. Time is expressed in term of RCOsc periods (3-bit value)\r
+ */\r
+extern void pm_enable_clk1(volatile avr32_pm_t *pm, unsigned int startup);\r
+\r
+\r
+/*!\r
+ * \brief This function will disable the oscillator 1.\r
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)\r
+ */\r
+extern void pm_disable_clk1(volatile avr32_pm_t *pm);\r
+\r
+\r
+/*!\r
+ * \brief This function will enable the oscillator 1 to be used with no startup time.\r
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)\r
+ * \param startup Clock 1 startup time. Time is expressed in term of RCOsc periods (3-bit value) but not checked.\r
+ */\r
+extern void pm_enable_clk1_no_wait(volatile avr32_pm_t *pm, unsigned int startup);\r
+\r
+\r
+/*!\r
+ * \brief This function will wait until the Osc1 clock is ready.\r
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)\r
+ */\r
+extern void pm_wait_for_clk1_ready(volatile avr32_pm_t *pm);\r
+\r
+\r
+/*!\r
+ * \brief This function will enable the external clock mode of the 32-kHz oscillator.\r
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)\r
+ */\r
+extern void pm_enable_osc32_ext_clock(volatile avr32_pm_t *pm);\r
+\r
+\r
+/*!\r
+ * \brief This function will enable the crystal mode of the 32-kHz oscillator.\r
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)\r
+ */\r
+extern void pm_enable_osc32_crystal(volatile avr32_pm_t *pm);\r
+\r
+\r
+/*!\r
+ * \brief This function will enable the oscillator 32 to be used with a startup time.\r
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)\r
+ * \param startup Clock 32 kHz startup time. Time is expressed in term of RCOsc periods (3-bit value)\r
+ */\r
+extern void pm_enable_clk32(volatile avr32_pm_t *pm, unsigned int startup);\r
+\r
+\r
+/*!\r
+ * \brief This function will disable the oscillator 32.\r
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)\r
+ */\r
+extern void pm_disable_clk32(volatile avr32_pm_t *pm);\r
+\r
+\r
+/*!\r
+ * \brief This function will enable the oscillator 32 to be used with no startup time.\r
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)\r
+ * \param startup Clock 32 kHz startup time. Time is expressed in term of RCOsc periods (3-bit value) but not checked.\r
+ */\r
+extern void pm_enable_clk32_no_wait(volatile avr32_pm_t *pm, unsigned int startup);\r
+\r
+\r
+/*!\r
+ * \brief This function will wait until the osc32 clock is ready.\r
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)\r
+ */\r
+extern void pm_wait_for_clk32_ready(volatile avr32_pm_t *pm);\r
+\r
+\r
+//FIXME update this header -SM\r
+/*!\r
+ * \brief This function will select all the power manager clocks.\r
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)\r
+ * \param pbadiv Peripheral Bus A clock divisor enable\r
+ * \param pbasel Peripheral Bus A select\r
+ * \param pbbdiv Peripheral Bus B clock divisor enable\r
+ * \param pbbsel Peripheral Bus B select\r
+ * \param hsbdiv High Speed Bus clock divisor enable (CPU clock = HSB clock)\r
+ * \param hsbsel High Speed Bus select (CPU clock = HSB clock )\r
+ */\r
+extern void pm_cksel(volatile avr32_pm_t *pm, unsigned int pbadiv, unsigned int pbasel, unsigned int pbbdiv, unsigned int pbbsel, unsigned int hsbdiv, unsigned int hsbsel);\r
+\r
+\r
+/*!\r
+ * \brief This function will setup a generic clock.\r
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)\r
+ * \param gc generic clock number (0 for gc0...)\r
+ * \param osc_or_pll Use OSC (=0) or PLL (=1)\r
+ * \param pll_osc Select Osc0/PLL0 or Osc1/PLL1\r
+ * \param diven Generic clock divisor enable\r
+ * \param div Generic clock divisor\r
+ */\r
+extern void pm_gc_setup(volatile avr32_pm_t *pm, unsigned int gc, unsigned int osc_or_pll, unsigned int pll_osc, unsigned int diven, unsigned int div);\r
+\r
+\r
+/*!\r
+ * \brief This function will enable a generic clock.\r
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)\r
+ * \param gc generic clock number (0 for gc0...)\r
+ */\r
+extern void pm_gc_enable(volatile avr32_pm_t *pm, unsigned int gc);\r
+\r
+\r
+/*!\r
+ * \brief This function will disable a generic clock.\r
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)\r
+ * \param gc generic clock number (0 for gc0...)\r
+ */\r
+extern void pm_gc_disable(volatile avr32_pm_t *pm, unsigned int gc);\r
+\r
+\r
+//FIXME update this header -SM\r
+/*!\r
+ * \brief This function will setup a PLL.\r
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)\r
+ * \param pll PLL number(0 for PLL0, 1 for PLL1)\r
+ * \param mul\r
+ * \param div\r
+ * \param osc\r
+ * \param lockcount\r
+ */\r
+extern void pm_pll_setup(volatile avr32_pm_t *pm, unsigned int pll, unsigned int mul, unsigned int div, unsigned int osc, unsigned int lockcount);\r
+\r
+\r
+//FIXME update this header -SM\r
+/*!\r
+ * \brief This function will set a PLL option.\r
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)\r
+ * \param pll PLL number(0 for PLL0, 1 for PLL1)\r
+ * \param pll_freq Set to 1 for VCO frequency range 80-180MHz, set to 0 for VCO frequency range 160-240Mhz.\r
+ * \param pll_div2 Divide the PLL output frequency by 2 (this settings does not change the FVCO value)\r
+ * \param pll_wbwdisable 1 Disable the Wide-Bandith Mode (Wide-Bandwith mode allow a faster startup time and out-of-lock time). 0 to enable the Wide-Bandith Mode.\r
+ */\r
+extern void pm_pll_set_option(volatile avr32_pm_t *pm, unsigned int pll, unsigned int pll_freq, unsigned int pll_div2, unsigned int pll_wbwdisable);\r
+\r
+\r
+//FIXME update this header -SM\r
+/*!\r
+ * \brief This function will get a PLL option.\r
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)\r
+ * \param pll PLL number(0 for PLL0, 1 for PLL1)\r
+ * \return Option\r
+ */\r
+extern unsigned int pm_pll_get_option(volatile avr32_pm_t *pm, unsigned int pll);\r
+\r
+\r
+/*!\r
+ * \brief This function will enable a PLL.\r
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)\r
+ * \param pll PLL number(0 for PLL0, 1 for PLL1)\r
+ */\r
+extern void pm_pll_enable(volatile avr32_pm_t *pm, unsigned int pll);\r
+\r
+\r
+/*!\r
+ * \brief This function will disable a PLL.\r
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)\r
+ * \param pll PLL number(0 for PLL0, 1 for PLL1)\r
+ */\r
+extern void pm_pll_disable(volatile avr32_pm_t *pm, unsigned int pll);\r
+\r
+\r
+/*!\r
+ * \brief This function will wait for PLL0 locked\r
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)\r
+ */\r
+extern void pm_wait_for_pll0_locked(volatile avr32_pm_t *pm);\r
+\r
+\r
+/*!\r
+ * \brief This function will wait for PLL1 locked\r
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)\r
+ */\r
+extern void pm_wait_for_pll1_locked(volatile avr32_pm_t *pm);\r
+\r
+\r
+/*!\r
+ * \brief This function will switch the power manager main clock.\r
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)\r
+ * \param clock Clock to be switched on. AVR32_PM_MCSEL_SLOW for RCOsc, AVR32_PM_MCSEL_OSC0 for Osc0, AVR32_PM_MCSEL_PLL0 for PLL0.\r
+ */\r
+extern void pm_switch_to_clock(volatile avr32_pm_t *pm, unsigned long clock);\r
+\r
+\r
+/*!\r
+ * \brief Switch main clock to clock Osc0 (crystal mode)\r
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)\r
+ * \param fosc0 Oscillator 0 crystal frequency (Hz)\r
+ * \param startup Crystal 0 startup time. Time is expressed in term of RCOsc periods (3-bit value)\r
+ */\r
+extern void pm_switch_to_osc0(volatile avr32_pm_t *pm, unsigned int fosc0, unsigned int startup);\r
+\r
+\r
+#endif // _PM_H_\r
--- /dev/null
+/*This file is prepared for Doxygen automatic documentation generation.*/\r
+/*! \file *********************************************************************\r
+ *\r
+ * \brief TC driver for AVR32 UC3.\r
+ *\r
+ * AVR32 Timer/Counter driver module.\r
+ *\r
+ * - Compiler: IAR EWAVR32 and GNU GCC for AVR32\r
+ * - Supported devices: All AVR32 devices with a TC module can be used.\r
+ * - AppNote:\r
+ *\r
+ * \author Atmel Corporation: http://www.atmel.com \n\r
+ * Support email: avr32@atmel.com\r
+ *\r
+ ******************************************************************************/\r
+\r
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the following disclaimer.\r
+ *\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ * this list of conditions and the following disclaimer in the documentation\r
+ * and/or other materials provided with the distribution.\r
+ *\r
+ * 3. The name of ATMEL may not be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND\r
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,\r
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\r
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\r
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND\r
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF\r
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ */\r
+\r
+\r
+#if __GNUC__\r
+# include <avr32/io.h>\r
+#elif __ICCAVR32__\r
+# include <avr32/iouc3a0512.h>\r
+#else\r
+# error Unknown compiler\r
+#endif\r
+\r
+#include "compiler.h"\r
+#include "tc.h"\r
+\r
+\r
+int tc_get_interrupt_settings(volatile avr32_tc_t *tc, unsigned int channel)\r
+{\r
+ // Check for valid input.\r
+ if (channel >= TC_NUMBER_OF_CHANNELS)\r
+ return TC_INVALID_ARGUMENT;\r
+\r
+ return tc->channel[channel].imr;\r
+}\r
+\r
+\r
+int tc_configure_interrupts(volatile avr32_tc_t *tc, unsigned int channel, const tc_interrupt_t *bitfield)\r
+{\r
+ // Check for valid input.\r
+ if (channel >= TC_NUMBER_OF_CHANNELS)\r
+ return TC_INVALID_ARGUMENT;\r
+\r
+ // Enable the appropriate interrupts.\r
+ tc->channel[channel].ier = bitfield->etrgs << AVR32_TC_ETRGS_OFFSET |\r
+ bitfield->ldrbs << AVR32_TC_LDRBS_OFFSET |\r
+ bitfield->ldras << AVR32_TC_LDRAS_OFFSET |\r
+ bitfield->cpcs << AVR32_TC_CPCS_OFFSET |\r
+ bitfield->cpbs << AVR32_TC_CPBS_OFFSET |\r
+ bitfield->cpas << AVR32_TC_CPAS_OFFSET |\r
+ bitfield->lovrs << AVR32_TC_LOVRS_OFFSET |\r
+ bitfield->covfs << AVR32_TC_COVFS_OFFSET;\r
+\r
+ // Disable the appropriate interrupts.\r
+ tc->channel[channel].idr = (~bitfield->etrgs & 1) << AVR32_TC_ETRGS_OFFSET |\r
+ (~bitfield->ldrbs & 1) << AVR32_TC_LDRBS_OFFSET |\r
+ (~bitfield->ldras & 1) << AVR32_TC_LDRAS_OFFSET |\r
+ (~bitfield->cpcs & 1) << AVR32_TC_CPCS_OFFSET |\r
+ (~bitfield->cpbs & 1) << AVR32_TC_CPBS_OFFSET |\r
+ (~bitfield->cpas & 1) << AVR32_TC_CPAS_OFFSET |\r
+ (~bitfield->lovrs & 1) << AVR32_TC_LOVRS_OFFSET |\r
+ (~bitfield->covfs & 1) << AVR32_TC_COVFS_OFFSET;\r
+\r
+ return 0;\r
+}\r
+\r
+\r
+int tc_select_external_clock(volatile avr32_tc_t *tc, unsigned int channel, unsigned int ext_clk_sig_src)\r
+{\r
+ // Check for valid input.\r
+ if (channel >= TC_NUMBER_OF_CHANNELS || ext_clk_sig_src >= 1 << AVR32_TC_BMR_TC0XC0S_SIZE)\r
+ return TC_INVALID_ARGUMENT;\r
+\r
+ // Clear bit-field and set the correct behavior.\r
+ tc->bmr = (tc->bmr & ~(AVR32_TC_BMR_TC0XC0S_MASK << (channel * AVR32_TC_BMR_TC0XC0S_SIZE))) |\r
+ (ext_clk_sig_src << (channel * AVR32_TC_BMR_TC0XC0S_SIZE));\r
+\r
+ return 0;\r
+}\r
+\r
+\r
+int tc_init_capture(volatile avr32_tc_t *tc, const tc_capture_opt_t *opt)\r
+{\r
+ // Check for valid input.\r
+ if (opt->channel >= TC_NUMBER_OF_CHANNELS)\r
+ return TC_INVALID_ARGUMENT;\r
+\r
+ // MEASURE SIGNALS: Capture operating mode.\r
+ tc->channel[opt->channel].cmr = opt->ldrb << AVR32_TC_LDRB_OFFSET |\r
+ opt->ldra << AVR32_TC_LDRA_OFFSET |\r
+ 0 << AVR32_TC_WAVE_OFFSET |\r
+ opt->cpctrg << AVR32_TC_CPCTRG_OFFSET |\r
+ opt->abetrg << AVR32_TC_ABETRG_OFFSET |\r
+ opt->etrgedg << AVR32_TC_ETRGEDG_OFFSET|\r
+ opt->ldbdis << AVR32_TC_LDBDIS_OFFSET |\r
+ opt->ldbstop << AVR32_TC_LDBSTOP_OFFSET |\r
+ opt->burst << AVR32_TC_BURST_OFFSET |\r
+ opt->clki << AVR32_TC_CLKI_OFFSET |\r
+ opt->tcclks << AVR32_TC_TCCLKS_OFFSET;\r
+\r
+ return 0;\r
+}\r
+\r
+\r
+int tc_init_waveform(volatile avr32_tc_t *tc, const tc_waveform_opt_t *opt)\r
+{\r
+ // Check for valid input.\r
+ if (opt->channel >= TC_NUMBER_OF_CHANNELS)\r
+ return TC_INVALID_ARGUMENT;\r
+\r
+ // GENERATE SIGNALS: Waveform operating mode.\r
+ tc->channel[opt->channel].cmr = opt->bswtrg << AVR32_TC_BSWTRG_OFFSET |\r
+ opt->beevt << AVR32_TC_BEEVT_OFFSET |\r
+ opt->bcpc << AVR32_TC_BCPC_OFFSET |\r
+ opt->bcpb << AVR32_TC_BCPB_OFFSET |\r
+ opt->aswtrg << AVR32_TC_ASWTRG_OFFSET |\r
+ opt->aeevt << AVR32_TC_AEEVT_OFFSET |\r
+ opt->acpc << AVR32_TC_ACPC_OFFSET |\r
+ opt->acpa << AVR32_TC_ACPA_OFFSET |\r
+ 1 << AVR32_TC_WAVE_OFFSET |\r
+ opt->wavsel << AVR32_TC_WAVSEL_OFFSET |\r
+ opt->enetrg << AVR32_TC_ENETRG_OFFSET |\r
+ opt->eevt << AVR32_TC_EEVT_OFFSET |\r
+ opt->eevtedg << AVR32_TC_EEVTEDG_OFFSET |\r
+ opt->cpcdis << AVR32_TC_CPCDIS_OFFSET |\r
+ opt->cpcstop << AVR32_TC_CPCSTOP_OFFSET |\r
+ opt->burst << AVR32_TC_BURST_OFFSET |\r
+ opt->clki << AVR32_TC_CLKI_OFFSET |\r
+ opt->tcclks << AVR32_TC_TCCLKS_OFFSET;\r
+\r
+ return 0;\r
+}\r
+\r
+\r
+int tc_start(volatile avr32_tc_t *tc, unsigned int channel)\r
+{\r
+ // Check for valid input.\r
+ if (channel >= TC_NUMBER_OF_CHANNELS)\r
+ return TC_INVALID_ARGUMENT;\r
+\r
+ // Enable, reset and start the selected timer/counter channel.\r
+ tc->channel[channel].ccr = AVR32_TC_SWTRG_MASK | AVR32_TC_CLKEN_MASK;\r
+\r
+ return 0;\r
+}\r
+\r
+\r
+int tc_stop(volatile avr32_tc_t *tc, unsigned int channel)\r
+{\r
+ // Check for valid input.\r
+ if (channel >= TC_NUMBER_OF_CHANNELS)\r
+ return TC_INVALID_ARGUMENT;\r
+\r
+ // Disable the selected timer/counter channel.\r
+ tc->channel[channel].ccr = AVR32_TC_CLKDIS_MASK;\r
+\r
+ return 0;\r
+}\r
+\r
+\r
+int tc_software_trigger(volatile avr32_tc_t *tc, unsigned int channel)\r
+{\r
+ // Check for valid input.\r
+ if (channel >= TC_NUMBER_OF_CHANNELS)\r
+ return TC_INVALID_ARGUMENT;\r
+\r
+ // Reset the selected timer/counter channel.\r
+ tc->channel[channel].ccr = AVR32_TC_SWTRG_MASK;\r
+\r
+ return 0;\r
+}\r
+\r
+\r
+void tc_sync_trigger(volatile avr32_tc_t *tc)\r
+{\r
+ // Reset all channels of the selected timer/counter.\r
+ tc->bcr = AVR32_TC_BCR_SYNC_MASK;\r
+}\r
+\r
+\r
+int tc_read_sr(volatile avr32_tc_t *tc, unsigned int channel)\r
+{\r
+ // Check for valid input.\r
+ if (channel >= TC_NUMBER_OF_CHANNELS)\r
+ return TC_INVALID_ARGUMENT;\r
+\r
+ return tc->channel[channel].sr;\r
+}\r
+\r
+\r
+int tc_read_tc(volatile avr32_tc_t *tc, unsigned int channel)\r
+{\r
+ // Check for valid input.\r
+ if (channel >= TC_NUMBER_OF_CHANNELS)\r
+ return TC_INVALID_ARGUMENT;\r
+\r
+ return Rd_bitfield(tc->channel[channel].cv, AVR32_TC_CV_MASK);\r
+}\r
+\r
+\r
+int tc_read_ra(volatile avr32_tc_t *tc, unsigned int channel)\r
+{\r
+ // Check for valid input.\r
+ if (channel >= TC_NUMBER_OF_CHANNELS)\r
+ return TC_INVALID_ARGUMENT;\r
+\r
+ return Rd_bitfield(tc->channel[channel].ra, AVR32_TC_RA_MASK);\r
+}\r
+\r
+\r
+int tc_read_rb(volatile avr32_tc_t *tc, unsigned int channel)\r
+{\r
+ // Check for valid input.\r
+ if (channel >= TC_NUMBER_OF_CHANNELS)\r
+ return TC_INVALID_ARGUMENT;\r
+\r
+ return Rd_bitfield(tc->channel[channel].rb, AVR32_TC_RB_MASK);\r
+}\r
+\r
+\r
+int tc_read_rc(volatile avr32_tc_t *tc, unsigned int channel)\r
+{\r
+ // Check for valid input.\r
+ if (channel >= TC_NUMBER_OF_CHANNELS)\r
+ return TC_INVALID_ARGUMENT;\r
+\r
+ return Rd_bitfield(tc->channel[channel].rc, AVR32_TC_RC_MASK);\r
+}\r
+\r
+\r
+int tc_write_ra(volatile avr32_tc_t *tc, unsigned int channel, unsigned short value)\r
+{\r
+ // Check for valid input.\r
+ if (channel >= TC_NUMBER_OF_CHANNELS)\r
+ return TC_INVALID_ARGUMENT;\r
+\r
+ // This function is only available in WAVEFORM mode.\r
+ if (Tst_bits(tc->channel[channel].cmr, AVR32_TC_WAVE_MASK))\r
+ Wr_bitfield(tc->channel[channel].ra, AVR32_TC_RA_MASK, value);\r
+\r
+ return value;\r
+}\r
+\r
+\r
+int tc_write_rb(volatile avr32_tc_t *tc, unsigned int channel, unsigned short value)\r
+{\r
+ // Check for valid input.\r
+ if (channel >= TC_NUMBER_OF_CHANNELS)\r
+ return TC_INVALID_ARGUMENT;\r
+\r
+ // This function is only available in WAVEFORM mode.\r
+ if (Tst_bits(tc->channel[channel].cmr, AVR32_TC_WAVE_MASK))\r
+ Wr_bitfield(tc->channel[channel].rb, AVR32_TC_RB_MASK, value);\r
+\r
+ return value;\r
+}\r
+\r
+\r
+int tc_write_rc(volatile avr32_tc_t *tc, unsigned int channel, unsigned short value)\r
+{\r
+ // Check for valid input.\r
+ if (channel >= TC_NUMBER_OF_CHANNELS)\r
+ return TC_INVALID_ARGUMENT;\r
+\r
+ // This function is only available in WAVEFORM mode.\r
+ if (Tst_bits(tc->channel[channel].cmr, AVR32_TC_WAVE_MASK))\r
+ Wr_bitfield(tc->channel[channel].rc, AVR32_TC_RC_MASK, value);\r
+\r
+ return value;\r
+}\r
--- /dev/null
+/*This file is prepared for Doxygen automatic documentation generation.*/\r
+/*! \file *********************************************************************\r
+ *\r
+ * \brief Timer/Counter driver for AVR32 UC3.\r
+ *\r
+ * AVR32 Timer/Counter driver module.\r
+ *\r
+ * - Compiler: IAR EWAVR32 and GNU GCC for AVR32\r
+ * - Supported devices: All AVR32 devices with a TC module can be used.\r
+ * - AppNote:\r
+ *\r
+ * \author Atmel Corporation: http://www.atmel.com \n\r
+ * Support email: avr32@atmel.com\r
+ *\r
+ ******************************************************************************/\r
+\r
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the following disclaimer.\r
+ *\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ * this list of conditions and the following disclaimer in the documentation\r
+ * and/or other materials provided with the distribution.\r
+ *\r
+ * 3. The name of ATMEL may not be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND\r
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,\r
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\r
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\r
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND\r
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF\r
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ */\r
+\r
+\r
+#ifndef _TC_H_\r
+#define _TC_H_\r
+\r
+#if __GNUC__\r
+# include <avr32/io.h>\r
+#elif __ICCAVR32__\r
+# include <avr32/iouc3a0512.h>\r
+#else\r
+# error Unknown compiler\r
+#endif\r
+\r
+\r
+//! TC driver functions return value in case of invalid argument(s).\r
+#define TC_INVALID_ARGUMENT -1\r
+\r
+//! Number of timer/counter channels.\r
+#define TC_NUMBER_OF_CHANNELS (sizeof(((avr32_tc_t *)0)->channel) / sizeof(avr32_tc_channel_t))\r
+\r
+/*! \name External Clock Signal 0 Selection\r
+ */\r
+//! @{\r
+#define TC_CH0_EXT_CLK0_SRC_TCLK0 AVR32_TC_TC0XC0S_TCLK0\r
+#define TC_CH0_EXT_CLK0_SRC_NO_CLK AVR32_TC_TC0XC0S_NO_CLK\r
+#define TC_CH0_EXT_CLK0_SRC_TIOA1 AVR32_TC_TC0XC0S_TIOA1\r
+#define TC_CH0_EXT_CLK0_SRC_TIOA2 AVR32_TC_TC0XC0S_TIOA2\r
+//! @}\r
+\r
+/*! \name External Clock Signal 1 Selection\r
+ */\r
+//! @{\r
+#define TC_CH1_EXT_CLK1_SRC_TCLK1 AVR32_TC_TC1XC1S_TCLK1\r
+#define TC_CH1_EXT_CLK1_SRC_NO_CLK AVR32_TC_TC1XC1S_NO_CLK\r
+#define TC_CH1_EXT_CLK1_SRC_TIOA0 AVR32_TC_TC1XC1S_TIOA0\r
+#define TC_CH1_EXT_CLK1_SRC_TIOA2 AVR32_TC_TC1XC1S_TIOA2\r
+//! @}\r
+\r
+/*! \name External Clock Signal 2 Selection\r
+ */\r
+//! @{\r
+#define TC_CH2_EXT_CLK2_SRC_TCLK2 AVR32_TC_TC2XC2S_TCLK2\r
+#define TC_CH2_EXT_CLK2_SRC_NO_CLK AVR32_TC_TC2XC2S_NO_CLK\r
+#define TC_CH2_EXT_CLK2_SRC_TIOA0 AVR32_TC_TC2XC2S_TIOA0\r
+#define TC_CH2_EXT_CLK2_SRC_TIOA1 AVR32_TC_TC2XC2S_TIOA1\r
+//! @}\r
+\r
+/*! \name Event/Trigger Actions on Output\r
+ */\r
+//! @{\r
+#define TC_EVT_EFFECT_NOOP AVR32_TC_NONE\r
+#define TC_EVT_EFFECT_SET AVR32_TC_SET\r
+#define TC_EVT_EFFECT_CLEAR AVR32_TC_CLEAR\r
+#define TC_EVT_EFFECT_TOGGLE AVR32_TC_TOGGLE\r
+//! @}\r
+\r
+/*! \name RC Compare Trigger Enable\r
+ */\r
+//! @{\r
+#define TC_NO_TRIGGER_COMPARE_RC 0\r
+#define TC_TRIGGER_COMPARE_RC 1\r
+//! @}\r
+\r
+/*! \name Waveform Selection\r
+ */\r
+//! @{\r
+#define TC_WAVEFORM_SEL_UP_MODE AVR32_TC_WAVSEL_UP_NO_AUTO\r
+#define TC_WAVEFORM_SEL_UP_MODE_RC_TRIGGER AVR32_TC_WAVSEL_UP_AUTO\r
+#define TC_WAVEFORM_SEL_UPDOWN_MODE AVR32_TC_WAVSEL_UPDOWN_NO_AUTO\r
+#define TC_WAVEFORM_SEL_UPDOWN_MODE_RC_TRIGGER AVR32_TC_WAVSEL_UPDOWN_AUTO\r
+//! @}\r
+\r
+/*! \name TIOA or TIOB External Trigger Selection\r
+ */\r
+//! @{\r
+#define TC_EXT_TRIG_SEL_TIOA 1\r
+#define TC_EXT_TRIG_SEL_TIOB 0\r
+//! @}\r
+\r
+/*! \name External Event Selection\r
+ */\r
+//! @{\r
+#define TC_EXT_EVENT_SEL_TIOB_INPUT AVR32_TC_EEVT_TIOB_INPUT\r
+#define TC_EXT_EVENT_SEL_XC0_OUTPUT AVR32_TC_EEVT_XC0_OUTPUT\r
+#define TC_EXT_EVENT_SEL_XC1_OUTPUT AVR32_TC_EEVT_XC1_OUTPUT\r
+#define TC_EXT_EVENT_SEL_XC2_OUTPUT AVR32_TC_EEVT_XC2_OUTPUT\r
+//! @}\r
+\r
+/*! \name Edge Selection\r
+ */\r
+//! @{\r
+#define TC_SEL_NO_EDGE AVR32_TC_EEVTEDG_NO_EDGE\r
+#define TC_SEL_RISING_EDGE AVR32_TC_EEVTEDG_POS_EDGE\r
+#define TC_SEL_FALLING_EDGE AVR32_TC_EEVTEDG_NEG_EDGE\r
+#define TC_SEL_EACH_EDGE AVR32_TC_EEVTEDG_BOTH_EDGES\r
+//! @}\r
+\r
+/*! \name Burst Signal Selection\r
+ */\r
+//! @{\r
+#define TC_BURST_NOT_GATED AVR32_TC_BURST_NOT_GATED\r
+#define TC_BURST_CLK_AND_XC0 AVR32_TC_BURST_CLK_AND_XC0\r
+#define TC_BURST_CLK_AND_XC1 AVR32_TC_BURST_CLK_AND_XC1\r
+#define TC_BURST_CLK_AND_XC2 AVR32_TC_BURST_CLK_AND_XC2\r
+//! @}\r
+\r
+/*! \name Clock Invert\r
+ */\r
+//! @{\r
+#define TC_CLOCK_RISING_EDGE 0\r
+#define TC_CLOCK_FALLING_EDGE 1\r
+//! @}\r
+\r
+/*! \name Clock Selection\r
+ */\r
+//! @{\r
+#define TC_CLOCK_SOURCE_TC1 AVR32_TC_TCCLKS_TIMER_DIV1_CLOCK\r
+#define TC_CLOCK_SOURCE_TC2 AVR32_TC_TCCLKS_TIMER_DIV2_CLOCK\r
+#define TC_CLOCK_SOURCE_TC3 AVR32_TC_TCCLKS_TIMER_DIV3_CLOCK\r
+#define TC_CLOCK_SOURCE_TC4 AVR32_TC_TCCLKS_TIMER_DIV4_CLOCK\r
+#define TC_CLOCK_SOURCE_TC5 AVR32_TC_TCCLKS_TIMER_DIV5_CLOCK\r
+#define TC_CLOCK_SOURCE_XC0 AVR32_TC_TCCLKS_XC0\r
+#define TC_CLOCK_SOURCE_XC1 AVR32_TC_TCCLKS_XC1\r
+#define TC_CLOCK_SOURCE_XC2 AVR32_TC_TCCLKS_XC2\r
+//! @}\r
+\r
+\r
+//! Timer/counter interrupts.\r
+typedef struct\r
+{\r
+ unsigned int :24;\r
+\r
+ //! External trigger interrupt.\r
+ unsigned int etrgs : 1;\r
+\r
+ //! RB load interrupt.\r
+ unsigned int ldrbs : 1;\r
+\r
+ //! RA load interrupt.\r
+ unsigned int ldras : 1;\r
+\r
+ //! RC compare interrupt.\r
+ unsigned int cpcs : 1;\r
+\r
+ //! RB compare interrupt.\r
+ unsigned int cpbs : 1;\r
+\r
+ //! RA compare interrupt.\r
+ unsigned int cpas : 1;\r
+\r
+ //! Load overrun interrupt.\r
+ unsigned int lovrs : 1;\r
+\r
+ //! Counter overflow interrupt.\r
+ unsigned int covfs : 1;\r
+} tc_interrupt_t;\r
+\r
+//! Parameters when initializing a timer/counter in capture mode.\r
+typedef struct\r
+{\r
+ //! Channel to initialize.\r
+ unsigned int channel ;\r
+\r
+ unsigned int :12;\r
+\r
+ //! RB loading selection:\n\r
+ //! - \ref TC_SEL_NO_EDGE;\n\r
+ //! - \ref TC_SEL_RISING_EDGE;\n\r
+ //! - \ref TC_SEL_FALLING_EDGE;\n\r
+ //! - \ref TC_SEL_EACH_EDGE.\r
+ unsigned int ldrb : 2;\r
+\r
+ //! RA loading selection:\n\r
+ //! - \ref TC_SEL_NO_EDGE;\n\r
+ //! - \ref TC_SEL_RISING_EDGE;\n\r
+ //! - \ref TC_SEL_FALLING_EDGE;\n\r
+ //! - \ref TC_SEL_EACH_EDGE.\r
+ unsigned int ldra : 2;\r
+\r
+ unsigned int : 1;\r
+\r
+ //! RC compare trigger enable:\n\r
+ //! - \ref TC_NO_TRIGGER_COMPARE_RC;\n\r
+ //! - \ref TC_TRIGGER_COMPARE_RC.\r
+ unsigned int cpctrg : 1;\r
+\r
+ unsigned int : 3;\r
+\r
+ //! TIOA or TIOB external trigger selection:\n\r
+ //! - \ref TC_EXT_TRIG_SEL_TIOA;\n\r
+ //! - \ref TC_EXT_TRIG_SEL_TIOB.\r
+ unsigned int abetrg : 1;\r
+\r
+ //! External trigger edge selection:\n\r
+ //! - \ref TC_SEL_NO_EDGE;\n\r
+ //! - \ref TC_SEL_RISING_EDGE;\n\r
+ //! - \ref TC_SEL_FALLING_EDGE;\n\r
+ //! - \ref TC_SEL_EACH_EDGE.\r
+ unsigned int etrgedg : 2;\r
+\r
+ //! Counter clock disable with RB loading:\n\r
+ //! - \c FALSE;\n\r
+ //! - \c TRUE.\r
+ unsigned int ldbdis : 1;\r
+\r
+ //! Counter clock stopped with RB loading:\n\r
+ //! - \c FALSE;\n\r
+ //! - \c TRUE.\r
+ unsigned int ldbstop : 1;\r
+\r
+ //! Burst signal selection:\n\r
+ //! - \ref TC_BURST_NOT_GATED;\n\r
+ //! - \ref TC_BURST_CLK_AND_XC0;\n\r
+ //! - \ref TC_BURST_CLK_AND_XC1;\n\r
+ //! - \ref TC_BURST_CLK_AND_XC2.\r
+ unsigned int burst : 2;\r
+\r
+ //! Clock invert:\n\r
+ //! - \ref TC_CLOCK_RISING_EDGE;\n\r
+ //! - \ref TC_CLOCK_FALLING_EDGE.\r
+ unsigned int clki : 1;\r
+\r
+ //! Clock selection:\n\r
+ //! - \ref TC_CLOCK_SOURCE_TC1;\n\r
+ //! - \ref TC_CLOCK_SOURCE_TC2;\n\r
+ //! - \ref TC_CLOCK_SOURCE_TC3;\n\r
+ //! - \ref TC_CLOCK_SOURCE_TC4;\n\r
+ //! - \ref TC_CLOCK_SOURCE_TC5;\n\r
+ //! - \ref TC_CLOCK_SOURCE_XC0;\n\r
+ //! - \ref TC_CLOCK_SOURCE_XC1;\n\r
+ //! - \ref TC_CLOCK_SOURCE_XC2.\r
+ unsigned int tcclks : 3;\r
+} tc_capture_opt_t;\r
+\r
+//! Parameters when initializing a timer/counter in waveform mode.\r
+typedef struct\r
+{\r
+ //! Channel to initialize.\r
+ unsigned int channel ;\r
+\r
+ //! Software trigger effect on TIOB:\n\r
+ //! - \ref TC_EVT_EFFECT_NOOP;\n\r
+ //! - \ref TC_EVT_EFFECT_SET;\n\r
+ //! - \ref TC_EVT_EFFECT_CLEAR;\n\r
+ //! - \ref TC_EVT_EFFECT_TOGGLE.\r
+ unsigned int bswtrg : 2;\r
+\r
+ //! External event effect on TIOB:\n\r
+ //! - \ref TC_EVT_EFFECT_NOOP;\n\r
+ //! - \ref TC_EVT_EFFECT_SET;\n\r
+ //! - \ref TC_EVT_EFFECT_CLEAR;\n\r
+ //! - \ref TC_EVT_EFFECT_TOGGLE.\r
+ unsigned int beevt : 2;\r
+\r
+ //! RC compare effect on TIOB:\n\r
+ //! - \ref TC_EVT_EFFECT_NOOP;\n\r
+ //! - \ref TC_EVT_EFFECT_SET;\n\r
+ //! - \ref TC_EVT_EFFECT_CLEAR;\n\r
+ //! - \ref TC_EVT_EFFECT_TOGGLE.\r
+ unsigned int bcpc : 2;\r
+\r
+ //! RB compare effect on TIOB:\n\r
+ //! - \ref TC_EVT_EFFECT_NOOP;\n\r
+ //! - \ref TC_EVT_EFFECT_SET;\n\r
+ //! - \ref TC_EVT_EFFECT_CLEAR;\n\r
+ //! - \ref TC_EVT_EFFECT_TOGGLE.\r
+ unsigned int bcpb : 2;\r
+\r
+ //! Software trigger effect on TIOA:\n\r
+ //! - \ref TC_EVT_EFFECT_NOOP;\n\r
+ //! - \ref TC_EVT_EFFECT_SET;\n\r
+ //! - \ref TC_EVT_EFFECT_CLEAR;\n\r
+ //! - \ref TC_EVT_EFFECT_TOGGLE.\r
+ unsigned int aswtrg : 2;\r
+\r
+ //! External event effect on TIOA:\n\r
+ //! - \ref TC_EVT_EFFECT_NOOP;\n\r
+ //! - \ref TC_EVT_EFFECT_SET;\n\r
+ //! - \ref TC_EVT_EFFECT_CLEAR;\n\r
+ //! - \ref TC_EVT_EFFECT_TOGGLE.\r
+ unsigned int aeevt : 2;\r
+\r
+ //! RC compare effect on TIOA:\n\r
+ //! - \ref TC_EVT_EFFECT_NOOP;\n\r
+ //! - \ref TC_EVT_EFFECT_SET;\n\r
+ //! - \ref TC_EVT_EFFECT_CLEAR;\n\r
+ //! - \ref TC_EVT_EFFECT_TOGGLE.\r
+ unsigned int acpc : 2;\r
+\r
+ //! RA compare effect on TIOA:\n\r
+ //! - \ref TC_EVT_EFFECT_NOOP;\n\r
+ //! - \ref TC_EVT_EFFECT_SET;\n\r
+ //! - \ref TC_EVT_EFFECT_CLEAR;\n\r
+ //! - \ref TC_EVT_EFFECT_TOGGLE.\r
+ unsigned int acpa : 2;\r
+\r
+ unsigned int : 1;\r
+\r
+ //! Waveform selection:\n\r
+ //! - \ref TC_WAVEFORM_SEL_UP_MODE;\n\r
+ //! - \ref TC_WAVEFORM_SEL_UP_MODE_RC_TRIGGER;\n\r
+ //! - \ref TC_WAVEFORM_SEL_UPDOWN_MODE;\n\r
+ //! - \ref TC_WAVEFORM_SEL_UPDOWN_MODE_RC_TRIGGER.\r
+ unsigned int wavsel : 2;\r
+\r
+ //! External event trigger enable:\n\r
+ //! - \c FALSE;\n\r
+ //! - \c TRUE.\r
+ unsigned int enetrg : 1;\r
+\r
+ //! External event selection:\n\r
+ //! - \ref TC_EXT_EVENT_SEL_TIOB_INPUT;\n\r
+ //! - \ref TC_EXT_EVENT_SEL_XC0_OUTPUT;\n\r
+ //! - \ref TC_EXT_EVENT_SEL_XC1_OUTPUT;\n\r
+ //! - \ref TC_EXT_EVENT_SEL_XC2_OUTPUT.\r
+ unsigned int eevt : 2;\r
+\r
+ //! External event edge selection:\n\r
+ //! - \ref TC_SEL_NO_EDGE;\n\r
+ //! - \ref TC_SEL_RISING_EDGE;\n\r
+ //! - \ref TC_SEL_FALLING_EDGE;\n\r
+ //! - \ref TC_SEL_EACH_EDGE.\r
+ unsigned int eevtedg : 2;\r
+\r
+ //! Counter clock disable with RC compare:\n\r
+ //! - \c FALSE;\n\r
+ //! - \c TRUE.\r
+ unsigned int cpcdis : 1;\r
+\r
+ //! Counter clock stopped with RC compare:\n\r
+ //! - \c FALSE;\n\r
+ //! - \c TRUE.\r
+ unsigned int cpcstop : 1;\r
+\r
+ //! Burst signal selection:\n\r
+ //! - \ref TC_BURST_NOT_GATED;\n\r
+ //! - \ref TC_BURST_CLK_AND_XC0;\n\r
+ //! - \ref TC_BURST_CLK_AND_XC1;\n\r
+ //! - \ref TC_BURST_CLK_AND_XC2.\r
+ unsigned int burst : 2;\r
+\r
+ //! Clock invert:\n\r
+ //! - \ref TC_CLOCK_RISING_EDGE;\n\r
+ //! - \ref TC_CLOCK_FALLING_EDGE.\r
+ unsigned int clki : 1;\r
+\r
+ //! Clock selection:\n\r
+ //! - \ref TC_CLOCK_SOURCE_TC1;\n\r
+ //! - \ref TC_CLOCK_SOURCE_TC2;\n\r
+ //! - \ref TC_CLOCK_SOURCE_TC3;\n\r
+ //! - \ref TC_CLOCK_SOURCE_TC4;\n\r
+ //! - \ref TC_CLOCK_SOURCE_TC5;\n\r
+ //! - \ref TC_CLOCK_SOURCE_XC0;\n\r
+ //! - \ref TC_CLOCK_SOURCE_XC1;\n\r
+ //! - \ref TC_CLOCK_SOURCE_XC2.\r
+ unsigned int tcclks : 3;\r
+} tc_waveform_opt_t;\r
+\r
+\r
+/*! \brief Reads timer/counter interrupt settings.\r
+ *\r
+ * \param tc Pointer to the TC instance to access.\r
+ * \param channel The TC instance channel to access.\r
+ *\r
+ * \retval >=0 The interrupt enable configuration organized according to \ref tc_interrupt_t.\r
+ * \retval TC_INVALID_ARGUMENT Invalid argument(s).\r
+ */\r
+extern int tc_get_interrupt_settings(volatile avr32_tc_t *tc, unsigned int channel);\r
+\r
+/*! \brief Enables various timer/counter interrupts.\r
+ *\r
+ * \param tc Pointer to the TC instance to access.\r
+ * \param channel The TC instance channel to access.\r
+ * \param bitfield The interrupt enable configuration.\r
+ *\r
+ * \retval 0 Success.\r
+ * \retval TC_INVALID_ARGUMENT Invalid argument(s).\r
+ */\r
+extern int tc_configure_interrupts(volatile avr32_tc_t *tc, unsigned int channel, const tc_interrupt_t *bitfield);\r
+\r
+/*! \brief Selects which external clock to use and how to configure it.\r
+ *\r
+ * \param tc Pointer to the TC instance to access.\r
+ * \param channel The TC instance channel to access.\r
+ * \param ext_clk_sig_src External clock signal selection:\r
+ * \arg \c TC_CH0_EXT_CLK0_SRC_TCLK0;\r
+ * \arg \c TC_CH0_EXT_CLK0_SRC_NO_CLK;\r
+ * \arg \c TC_CH0_EXT_CLK0_SRC_TIOA1;\r
+ * \arg \c TC_CH0_EXT_CLK0_SRC_TIOA2;\r
+ * \arg \c TC_CH1_EXT_CLK1_SRC_TCLK1;\r
+ * \arg \c TC_CH1_EXT_CLK1_SRC_NO_CLK;\r
+ * \arg \c TC_CH1_EXT_CLK1_SRC_TIOA0;\r
+ * \arg \c TC_CH1_EXT_CLK1_SRC_TIOA2;\r
+ * \arg \c TC_CH2_EXT_CLK2_SRC_TCLK2;\r
+ * \arg \c TC_CH2_EXT_CLK2_SRC_NO_CLK;\r
+ * \arg \c TC_CH2_EXT_CLK2_SRC_TIOA0;\r
+ * \arg \c TC_CH2_EXT_CLK2_SRC_TIOA1.\r
+ *\r
+ * \retval 0 Success.\r
+ * \retval TC_INVALID_ARGUMENT Invalid argument(s).\r
+ */\r
+extern int tc_select_external_clock(volatile avr32_tc_t *tc, unsigned int channel, unsigned int ext_clk_sig_src);\r
+\r
+/*! \brief Sets options for timer/counter capture initialization.\r
+ *\r
+ * \param tc Pointer to the TC instance to access.\r
+ * \param opt Options for capture mode.\r
+ *\r
+ * \retval 0 Success.\r
+ * \retval TC_INVALID_ARGUMENT Invalid argument(s).\r
+ */\r
+extern int tc_init_capture(volatile avr32_tc_t *tc, const tc_capture_opt_t *opt);\r
+\r
+/*! \brief Sets options for timer/counter waveform initialization.\r
+ *\r
+ * \param tc Pointer to the TC instance to access.\r
+ * \param opt Options for waveform generation.\r
+ *\r
+ * \retval 0 Success.\r
+ * \retval TC_INVALID_ARGUMENT Invalid argument(s).\r
+ */\r
+extern int tc_init_waveform(volatile avr32_tc_t *tc, const tc_waveform_opt_t *opt);\r
+\r
+/*! \brief Starts a timer/counter.\r
+ *\r
+ * \param tc Pointer to the TC instance to access.\r
+ * \param channel The TC instance channel to access.\r
+ *\r
+ * \retval 0 Success.\r
+ * \retval TC_INVALID_ARGUMENT Invalid argument(s).\r
+ */\r
+extern int tc_start(volatile avr32_tc_t *tc, unsigned int channel);\r
+\r
+/*! \brief Stops a timer/counter.\r
+ *\r
+ * \param tc Pointer to the TC instance to access.\r
+ * \param channel The TC instance channel to access.\r
+ *\r
+ * \retval 0 Success.\r
+ * \retval TC_INVALID_ARGUMENT Invalid argument(s).\r
+ */\r
+extern int tc_stop(volatile avr32_tc_t *tc, unsigned int channel);\r
+\r
+/*! \brief Performs a software trigger: the counter is reset and the clock is started.\r
+ *\r
+ * \param tc Pointer to the TC instance to access.\r
+ * \param channel The TC instance channel to access.\r
+ *\r
+ * \retval 0 Success.\r
+ * \retval TC_INVALID_ARGUMENT Invalid argument(s).\r
+ */\r
+extern int tc_software_trigger(volatile avr32_tc_t *tc, unsigned int channel);\r
+\r
+/*! \brief Asserts a SYNC signal to generate a software trigger and reset all channels.\r
+ *\r
+ * \param tc Pointer to the TC instance to access.\r
+ */\r
+extern void tc_sync_trigger(volatile avr32_tc_t *tc);\r
+\r
+/*! \brief Reads the status register.\r
+ *\r
+ * \param tc Pointer to the TC instance to access.\r
+ * \param channel The TC instance channel to access.\r
+ *\r
+ * \retval >=0 Status register value.\r
+ * \retval TC_INVALID_ARGUMENT Invalid argument(s).\r
+ */\r
+extern int tc_read_sr(volatile avr32_tc_t *tc, unsigned int channel);\r
+\r
+/*! \brief Reads the channel's TC counter and returns the value.\r
+ *\r
+ * \param tc Pointer to the TC instance to access.\r
+ * \param channel The TC instance channel to access.\r
+ *\r
+ * \retval >=0 TC counter value.\r
+ * \retval TC_INVALID_ARGUMENT Invalid argument(s).\r
+ */\r
+extern int tc_read_tc(volatile avr32_tc_t *tc, unsigned int channel);\r
+\r
+/*! \brief Reads the channel's RA register and returns the value.\r
+ *\r
+ * \param tc Pointer to the TC instance to access.\r
+ * \param channel The TC instance channel to access.\r
+ *\r
+ * \retval >=0 RA register value.\r
+ * \retval TC_INVALID_ARGUMENT Invalid argument(s).\r
+ */\r
+extern int tc_read_ra(volatile avr32_tc_t *tc, unsigned int channel);\r
+\r
+/*! \brief Reads the channel's RB register and returns the value.\r
+ *\r
+ * \param tc Pointer to the TC instance to access.\r
+ * \param channel The TC instance channel to access.\r
+ *\r
+ * \retval >=0 RB register value.\r
+ * \retval TC_INVALID_ARGUMENT Invalid argument(s).\r
+ */\r
+extern int tc_read_rb(volatile avr32_tc_t *tc, unsigned int channel);\r
+\r
+/*! \brief Reads the channel's RC register and returns the value.\r
+ *\r
+ * \param tc Pointer to the TC instance to access.\r
+ * \param channel The TC instance channel to access.\r
+ *\r
+ * \retval >=0 RC register value.\r
+ * \retval TC_INVALID_ARGUMENT Invalid argument(s).\r
+ */\r
+extern int tc_read_rc(volatile avr32_tc_t *tc, unsigned int channel);\r
+\r
+/*! \brief Writes a value to the channel's RA register.\r
+ *\r
+ * \param tc Pointer to the TC instance to access.\r
+ * \param channel The TC instance channel to access.\r
+ * \param value Value to write to the RA register.\r
+ *\r
+ * \retval >=0 Written value.\r
+ * \retval TC_INVALID_ARGUMENT Invalid argument(s).\r
+ */\r
+extern int tc_write_ra(volatile avr32_tc_t *tc, unsigned int channel, unsigned short value);\r
+\r
+/*! \brief Writes a value to the channel's RB register.\r
+ *\r
+ * \param tc Pointer to the TC instance to access.\r
+ * \param channel The TC instance channel to access.\r
+ * \param value Value to write to the RB register.\r
+ *\r
+ * \retval >=0 Written value.\r
+ * \retval TC_INVALID_ARGUMENT Invalid argument(s).\r
+ */\r
+extern int tc_write_rb(volatile avr32_tc_t *tc, unsigned int channel, unsigned short value);\r
+\r
+/*! \brief Writes a value to the channel's RC register.\r
+ *\r
+ * \param tc Pointer to the TC instance to access.\r
+ * \param channel The TC instance channel to access.\r
+ * \param value Value to write to the RC register.\r
+ *\r
+ * \retval >=0 Written value.\r
+ * \retval TC_INVALID_ARGUMENT Invalid argument(s).\r
+ */\r
+extern int tc_write_rc(volatile avr32_tc_t *tc, unsigned int channel, unsigned short value);\r
+\r
+\r
+#endif // _TC_H_\r
--- /dev/null
+/*This file is prepared for Doxygen automatic documentation generation.*/\r
+/*! \file *********************************************************************\r
+ *\r
+ * \brief USART driver for AVR32 UC3.\r
+ *\r
+ * This file contains basic functions for the AVR32 USART, with support for all\r
+ * modes, settings and clock speeds.\r
+ *\r
+ * - Compiler: IAR EWAVR32 and GNU GCC for AVR32\r
+ * - Supported devices: All AVR32 devices with a USART module can be used.\r
+ * - AppNote:\r
+ *\r
+ * \author Atmel Corporation: http://www.atmel.com \n\r
+ * Support email: avr32@atmel.com\r
+ *\r
+ ******************************************************************************/\r
+\r
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the following disclaimer.\r
+ *\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ * this list of conditions and the following disclaimer in the documentation\r
+ * and/or other materials provided with the distribution.\r
+ *\r
+ * 3. The name of ATMEL may not be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND\r
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,\r
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\r
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\r
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND\r
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF\r
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ */\r
+\r
+\r
+#include "usart.h"\r
+\r
+\r
+//------------------------------------------------------------------------------\r
+/*! \name Private Functions\r
+ */\r
+//! @{\r
+\r
+\r
+/*! \brief Checks if the USART is in multidrop mode.\r
+ *\r
+ * \param usart Base address of the USART instance.\r
+ *\r
+ * \return \c 1 if the USART is in multidrop mode, otherwise \c 0.\r
+ */\r
+#if __GNUC__\r
+__attribute__((__always_inline__))\r
+#endif\r
+static __inline__ int usart_mode_is_multidrop(volatile avr32_usart_t *usart)\r
+{\r
+ return ((usart->mr >> AVR32_USART_MR_PAR_OFFSET) & AVR32_USART_MR_PAR_MULTI) == AVR32_USART_MR_PAR_MULTI;\r
+}\r
+\r
+\r
+/*! \brief Calculates a clock divider (\e CD) that gets the USART as close to a\r
+ * wanted baudrate as possible.\r
+ *\r
+ * Baudrate calculation:\r
+ * \f$ baudrate = \frac{Selected Clock}{16 \times CD} \f$ with 16x oversampling or\r
+ * \f$ baudrate = \frac{Selected Clock}{8 \times CD} \f$ with 8x oversampling.\r
+ *\r
+ * \param usart Base address of the USART instance.\r
+ * \param baudrate Wanted baudrate.\r
+ * \param pba_hz USART module input clock frequency (PBA clock, Hz).\r
+ *\r
+ * \retval USART_SUCCESS Baudrate successfully initialized.\r
+ * \retval USART_INVALID_INPUT Wanted baudrate is impossible with given clock speed.\r
+ */\r
+\r
+static int usart_set_baudrate(volatile avr32_usart_t *usart, unsigned int baudrate, long pba_hz)\r
+{\r
+ // Clock divider.\r
+ int cd;\r
+\r
+ // Baudrate calculation.\r
+ if (baudrate < pba_hz / 16)\r
+ {\r
+ // Use 16x oversampling.\r
+ usart->mr &=~ AVR32_USART_MR_OVER_MASK;\r
+ cd = pba_hz / (16 * baudrate);\r
+\r
+ if ((cd >65535)) return USART_INVALID_INPUT;\r
+ }\r
+ else\r
+ {\r
+ // Use 8x oversampling.\r
+ usart->mr |= AVR32_USART_MR_OVER_MASK;\r
+ cd = pba_hz / (8 * baudrate);\r
+\r
+ if ((cd < 1)||(cd >65535)) return USART_INVALID_INPUT;\r
+ }\r
+ usart->brgr = cd << AVR32_USART_BRGR_CD_OFFSET;\r
+\r
+ return USART_SUCCESS;\r
+}\r
+\r
+//! @}\r
+\r
+\r
+//------------------------------------------------------------------------------\r
+/*! \name Initialization Functions\r
+ */\r
+//! @{\r
+\r
+\r
+void usart_reset(volatile avr32_usart_t *usart)\r
+{\r
+ // Disable all USART interrupts.\r
+ // Interrupts needed should be set explicitly on every reset.\r
+ usart->idr = 0xFFFFFFFF;\r
+\r
+ // Reset mode and other registers that could cause unpredictable behavior after reset.\r
+ usart->mr = 0;\r
+ usart->rtor = 0;\r
+ usart->ttgr = 0;\r
+\r
+ // Shutdown TX and RX (will be re-enabled when setup has successfully completed),\r
+ // reset status bits and turn off DTR and RTS.\r
+ usart->cr = AVR32_USART_CR_RSTRX_MASK |\r
+ AVR32_USART_CR_RSTTX_MASK |\r
+ AVR32_USART_CR_RSTSTA_MASK |\r
+ AVR32_USART_CR_RSTIT_MASK |\r
+ AVR32_USART_CR_RSTNACK_MASK |\r
+ AVR32_USART_CR_DTRDIS_MASK |\r
+ AVR32_USART_CR_RTSDIS_MASK;\r
+}\r
+\r
+\r
+int usart_init_rs232(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)\r
+{\r
+ // Reset the USART and shutdown TX and RX.\r
+ usart_reset(usart);\r
+\r
+ // Check input values.\r
+ if (!opt) // Null pointer.\r
+ return USART_INVALID_INPUT;\r
+ if (opt->charlength < 5 || opt->charlength > 9 ||\r
+ opt->paritytype > 7 ||\r
+ opt->stopbits > 2 + 255 ||\r
+ opt->channelmode > 3)\r
+ return USART_INVALID_INPUT;\r
+\r
+ if (usart_set_baudrate(usart, opt->baudrate, pba_hz) == USART_INVALID_INPUT)\r
+ return USART_INVALID_INPUT;\r
+\r
+ if (opt->charlength == 9)\r
+ {\r
+ // Character length set to 9 bits. MODE9 dominates CHRL.\r
+ usart->mr |= AVR32_USART_MR_MODE9_MASK;\r
+ }\r
+ else\r
+ {\r
+ // CHRL gives the character length (- 5) when MODE9 = 0.\r
+ usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET;\r
+ }\r
+\r
+ usart->mr |= (opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET) |\r
+ (opt->paritytype << AVR32_USART_MR_PAR_OFFSET);\r
+\r
+ if (opt->stopbits > USART_2_STOPBITS)\r
+ {\r
+ // Set two stop bits\r
+ usart->mr |= AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET;\r
+ // and a timeguard period gives the rest.\r
+ usart->ttgr = opt->stopbits - USART_2_STOPBITS;\r
+ }\r
+ else\r
+ // Insert 1, 1.5 or 2 stop bits.\r
+ usart->mr |= opt->stopbits << AVR32_USART_MR_NBSTOP_OFFSET;\r
+\r
+ // Setup complete; enable communication.\r
+ // Enable input and output.\r
+ usart->cr |= AVR32_USART_CR_TXEN_MASK |\r
+ AVR32_USART_CR_RXEN_MASK;\r
+\r
+ return USART_SUCCESS;\r
+}\r
+\r
+\r
+int usart_init_hw_handshaking(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)\r
+{\r
+ // First: Setup standard RS232.\r
+ if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT)\r
+ return USART_INVALID_INPUT;\r
+\r
+ // Clear previous mode.\r
+ usart->mr &= ~AVR32_USART_MR_MODE_MASK;\r
+ // Hardware handshaking.\r
+ usart->mr |= USART_MODE_HW_HSH << AVR32_USART_MR_MODE_OFFSET;\r
+\r
+ return USART_SUCCESS;\r
+}\r
+\r
+\r
+int usart_init_IrDA(volatile avr32_usart_t *usart, const usart_options_t *opt,\r
+ long pba_hz, unsigned char irda_filter)\r
+{\r
+ // First: Setup standard RS232.\r
+ if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT)\r
+ return USART_INVALID_INPUT;\r
+\r
+ // Set IrDA counter.\r
+ usart->ifr = irda_filter;\r
+\r
+ // Activate "low-pass filtering" of input.\r
+ usart->mr |= AVR32_USART_MR_FILTER_MASK;\r
+\r
+ return USART_SUCCESS;\r
+}\r
+\r
+\r
+int usart_init_modem(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)\r
+{\r
+ // First: Setup standard RS232.\r
+ if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT)\r
+ return USART_INVALID_INPUT;\r
+\r
+ // Clear previous mode.\r
+ usart->mr &= ~AVR32_USART_MR_MODE_MASK;\r
+ // Set modem mode.\r
+ usart->mr |= USART_MODE_MODEM << AVR32_USART_MR_MODE_OFFSET;\r
+\r
+ return USART_SUCCESS;\r
+}\r
+\r
+\r
+int usart_init_rs485(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)\r
+{\r
+ // First: Setup standard RS232.\r
+ if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT)\r
+ return USART_INVALID_INPUT;\r
+\r
+ // Clear previous mode.\r
+ usart->mr &= ~AVR32_USART_MR_MODE_MASK;\r
+ // Set RS485 mode.\r
+ usart->mr |= USART_MODE_RS485 << AVR32_USART_MR_MODE_OFFSET;\r
+\r
+ return USART_SUCCESS;\r
+}\r
+\r
+\r
+int usart_init_iso7816(volatile avr32_usart_t *usart, const iso7816_options_t *opt, int t, long pba_hz)\r
+{\r
+ // Reset the USART and shutdown TX and RX.\r
+ usart_reset(usart);\r
+\r
+ // Check input values.\r
+ if (!opt) // Null pointer.\r
+ return USART_INVALID_INPUT;\r
+\r
+ if (t == 0)\r
+ {\r
+ // Set USART mode to ISO7816, T=0.\r
+ // The T=0 protocol always uses 2 stop bits.\r
+ usart->mr = (USART_MODE_ISO7816_T0 << AVR32_USART_MR_MODE_OFFSET) |\r
+ (AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET) |\r
+ (opt->bit_order << AVR32_USART_MR_MSBF_OFFSET); // Allow MSBF in T=0.\r
+ }\r
+ else if (t == 1)\r
+ {\r
+ // Only LSB first in the T=1 protocol.\r
+ // max_iterations field is only used in T=0 mode.\r
+ if (opt->bit_order != 0 ||\r
+ opt->max_iterations != 0)\r
+ return USART_INVALID_INPUT;\r
+ // Set USART mode to ISO7816, T=1.\r
+ // The T=1 protocol always uses 1 stop bit.\r
+ usart->mr = (USART_MODE_ISO7816_T1 << AVR32_USART_MR_MODE_OFFSET) |\r
+ (AVR32_USART_MR_NBSTOP_1 << AVR32_USART_MR_NBSTOP_OFFSET);\r
+ }\r
+ else\r
+ return USART_INVALID_INPUT;\r
+\r
+ if (usart_set_baudrate(usart, opt->iso7816_hz, pba_hz) == USART_INVALID_INPUT)\r
+ return USART_INVALID_INPUT;\r
+\r
+ // Set FIDI register: bit rate = selected clock/FI_DI_ratio/16.\r
+ usart->fidi = opt->fidi_ratio;\r
+ // Set ISO7816 spesific options in the MODE register.\r
+ usart->mr |= (opt->inhibit_nack << AVR32_USART_MR_INACK_OFFSET) |\r
+ (opt->dis_suc_nack << AVR32_USART_MR_DSNACK_OFFSET) |\r
+ (opt->max_iterations << AVR32_USART_MR_MAX_ITERATION_OFFSET) |\r
+ AVR32_USART_MR_CLKO_MASK; // Enable clock output.\r
+\r
+ // Setup complete; enable input.\r
+ // Leave TX disabled for now.\r
+ usart->cr |= AVR32_USART_CR_RXEN_MASK;\r
+\r
+ return USART_SUCCESS;\r
+}\r
+\r
+\r
+//! @}\r
+\r
+\r
+//------------------------------------------------------------------------------\r
+/*! \name Transmit/Receive Functions\r
+ */\r
+//! @{\r
+\r
+\r
+int usart_send_address(volatile avr32_usart_t *usart, int address)\r
+{\r
+ // Check if USART is in multidrop / RS485 mode.\r
+ if (!usart_mode_is_multidrop(usart)) return USART_MODE_FAULT;\r
+\r
+ // Prepare to send an address.\r
+ usart->cr |= AVR32_USART_CR_SENDA_MASK;\r
+\r
+ // Write the address to TX.\r
+ usart_bw_write_char(usart, address);\r
+\r
+ return USART_SUCCESS;\r
+}\r
+\r
+\r
+int usart_write_char(volatile avr32_usart_t *usart, int c)\r
+{\r
+ if (usart->csr & AVR32_USART_CSR_TXRDY_MASK)\r
+ {\r
+ usart->thr = c;\r
+ return USART_SUCCESS;\r
+ }\r
+ else\r
+ return USART_TX_BUSY;\r
+}\r
+\r
+\r
+int usart_putchar(volatile avr32_usart_t *usart, int c)\r
+{\r
+ int timeout = USART_DEFAULT_TIMEOUT;\r
+\r
+ if (c == '\n')\r
+ {\r
+ do\r
+ {\r
+ if (!timeout--) return USART_FAILURE;\r
+ } while (usart_write_char(usart, '\r') != USART_SUCCESS);\r
+\r
+ timeout = USART_DEFAULT_TIMEOUT;\r
+ }\r
+\r
+ do\r
+ {\r
+ if (!timeout--) return USART_FAILURE;\r
+ } while (usart_write_char(usart, c) != USART_SUCCESS);\r
+\r
+ return USART_SUCCESS;\r
+}\r
+\r
+\r
+int usart_read_char(volatile avr32_usart_t *usart, int *c)\r
+{\r
+ // Check for errors: frame, parity and overrun. In RS485 mode, a parity error\r
+ // would mean that an address char has been received.\r
+ if (usart->csr & (AVR32_USART_CSR_OVRE_MASK |\r
+ AVR32_USART_CSR_FRAME_MASK |\r
+ AVR32_USART_CSR_PARE_MASK))\r
+ return USART_RX_ERROR;\r
+\r
+ // No error; if we really did receive a char, read it and return SUCCESS.\r
+ if (usart->csr & AVR32_USART_CSR_RXRDY_MASK)\r
+ {\r
+ *c = (unsigned short)usart->rhr;\r
+ return USART_SUCCESS;\r
+ }\r
+ else\r
+ return USART_RX_EMPTY;\r
+}\r
+\r
+\r
+int usart_getchar(volatile avr32_usart_t *usart)\r
+{\r
+ int c, ret;\r
+\r
+ while ((ret = usart_read_char(usart, &c)) == USART_RX_EMPTY);\r
+\r
+ if (ret == USART_RX_ERROR)\r
+ return USART_FAILURE;\r
+\r
+ return c;\r
+}\r
+\r
+\r
+void usart_write_line(volatile avr32_usart_t *usart, const char *string)\r
+{\r
+ while (*string != '\0')\r
+ usart_putchar(usart, *string++);\r
+}\r
+\r
+\r
+int usart_get_echo_line(volatile avr32_usart_t *usart)\r
+{\r
+ int rx_char;\r
+ int retval = USART_SUCCESS;\r
+\r
+ while (1)\r
+ {\r
+ rx_char = usart_getchar(usart);\r
+ if (rx_char == USART_FAILURE)\r
+ {\r
+ usart_write_line(usart, "Error!!!\n");\r
+ break;\r
+ }\r
+ if (rx_char == '\x03')\r
+ {\r
+ retval = USART_FAILURE;\r
+ break;\r
+ }\r
+ usart_putchar(usart, rx_char);\r
+ if (rx_char == '\r')\r
+ {\r
+ usart_putchar(usart, '\n');\r
+ break;\r
+ }\r
+ }\r
+\r
+ return retval;\r
+}\r
+\r
+\r
+//! @}\r
--- /dev/null
+/*This file is prepared for Doxygen automatic documentation generation.*/\r
+/*! \file *********************************************************************\r
+ *\r
+ * \brief USART driver for AVR32 UC3.\r
+ *\r
+ * This file contains basic functions for the AVR32 USART, with support for all\r
+ * modes, settings and clock speeds.\r
+ *\r
+ * - Compiler: IAR EWAVR32 and GNU GCC for AVR32\r
+ * - Supported devices: All AVR32 devices with a USART module can be used.\r
+ * - AppNote:\r
+ *\r
+ * \author Atmel Corporation: http://www.atmel.com \n\r
+ * Support email: avr32@atmel.com\r
+ *\r
+ ******************************************************************************/\r
+\r
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the following disclaimer.\r
+ *\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ * this list of conditions and the following disclaimer in the documentation\r
+ * and/or other materials provided with the distribution.\r
+ *\r
+ * 3. The name of ATMEL may not be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND\r
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,\r
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\r
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\r
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND\r
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF\r
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ */\r
+\r
+\r
+#ifndef _USART_H_\r
+#define _USART_H_\r
+\r
+#if __GNUC__\r
+# include <avr32/io.h>\r
+#elif __ICCAVR32__\r
+# include <avr32/iouc3a0512.h>\r
+#else\r
+# error Unknown compiler\r
+#endif\r
+\r
+#include "compiler.h"\r
+\r
+\r
+/*! \name Return Values\r
+ */\r
+//! @{\r
+#define USART_SUCCESS 0 //!< Successful completion.\r
+#define USART_FAILURE -1 //!< Failure because of some unspecified reason.\r
+#define USART_INVALID_INPUT 1 //!< Input value out of range.\r
+#define USART_INVALID_ARGUMENT -1 //!< Argument value out of range.\r
+#define USART_TX_BUSY 2 //!< Transmitter was busy.\r
+#define USART_RX_EMPTY 3 //!< Nothing was received.\r
+#define USART_RX_ERROR 4 //!< Transmission error occurred.\r
+#define USART_MODE_FAULT 5 //!< USART not in the appropriate mode.\r
+//! @}\r
+\r
+//! Default time-out value (number of attempts).\r
+#define USART_DEFAULT_TIMEOUT 10000\r
+\r
+/*! \name Parity Settings\r
+ */\r
+//! @{\r
+#define USART_EVEN_PARITY AVR32_USART_MR_PAR_EVEN //!< Use even parity on character transmission.\r
+#define USART_ODD_PARITY AVR32_USART_MR_PAR_ODD //!< Use odd parity on character transmission.\r
+#define USART_SPACE_PARITY AVR32_USART_MR_PAR_SPACE //!< Use a space as parity bit.\r
+#define USART_MARK_PARITY AVR32_USART_MR_PAR_MARK //!< Use a mark as parity bit.\r
+#define USART_NO_PARITY AVR32_USART_MR_PAR_NONE //!< Don't use a parity bit.\r
+#define USART_MULTIDROP_PARITY AVR32_USART_MR_PAR_MULTI //!< Parity bit is used to flag address characters.\r
+//! @}\r
+\r
+/*! \name Operating Modes\r
+ */\r
+//! @{\r
+#define USART_MODE_NORMAL AVR32_USART_MR_MODE_NORMAL //!< Normal RS232 mode.\r
+#define USART_MODE_RS485 AVR32_USART_MR_MODE_RS485 //!< RS485 mode.\r
+#define USART_MODE_HW_HSH AVR32_USART_MR_MODE_HARDWARE //!< RS232 mode with hardware handshaking.\r
+#define USART_MODE_MODEM AVR32_USART_MR_MODE_MODEM //!< Modem mode.\r
+#define USART_MODE_ISO7816_T0 AVR32_USART_MR_MODE_ISO7816_T0 //!< ISO7816, T = 0 mode.\r
+#define USART_MODE_ISO7816_T1 AVR32_USART_MR_MODE_ISO7816_T1 //!< ISO7816, T = 1 mode.\r
+#define USART_MODE_IRDA AVR32_USART_MR_MODE_IRDA //!< IrDA mode.\r
+#define USART_MODE_SW_HSH AVR32_USART_MR_MODE_SOFTWARE //!< RS232 mode with software handshaking.\r
+//! @}\r
+\r
+/*! \name Channel Modes\r
+ */\r
+//! @{\r
+#define USART_NORMAL_CHMODE AVR32_USART_MR_CHMODE_NORMAL //!< Normal communication.\r
+#define USART_AUTO_ECHO AVR32_USART_MR_CHMODE_ECHO //!< Echo data.\r
+#define USART_LOCAL_LOOPBACK AVR32_USART_MR_CHMODE_LOCAL_LOOP //!< Local loopback.\r
+#define USART_REMOTE_LOOPBACK AVR32_USART_MR_CHMODE_REMOTE_LOOP //!< Remote loopback.\r
+//! @}\r
+\r
+/*! \name Stop Bits Settings\r
+ */\r
+//! @{\r
+#define USART_1_STOPBIT AVR32_USART_MR_NBSTOP_1 //!< Use 1 stop bit.\r
+#define USART_1_5_STOPBITS AVR32_USART_MR_NBSTOP_1_5 //!< Use 1.5 stop bits.\r
+#define USART_2_STOPBITS AVR32_USART_MR_NBSTOP_2 //!< Use 2 stop bits (for more, just give the number of bits).\r
+//! @}\r
+\r
+\r
+//! Input parameters when initializing RS232 and similar modes.\r
+typedef struct\r
+{\r
+ //! Set baudrate of the USART.\r
+ unsigned long baudrate;\r
+\r
+ //! Number of bits to transmit as a character (5 to 9).\r
+ unsigned char charlength;\r
+\r
+ //! How to calculate the parity bit: \ref USART_EVEN_PARITY, \ref USART_ODD_PARITY,\r
+ //! \ref USART_SPACE_PARITY, \ref USART_MARK_PARITY, \ref USART_NO_PARITY or\r
+ //! \ref USART_MULTIDROP_PARITY.\r
+ unsigned char paritytype;\r
+\r
+ //! Number of stop bits between two characters: \ref USART_1_STOPBIT,\r
+ //! \ref USART_1_5_STOPBITS, \ref USART_2_STOPBITS or any number from 3 to 257\r
+ //! which will result in a time guard period of that length between characters.\r
+ unsigned short stopbits;\r
+\r
+ //! Run the channel in testmode: \ref USART_NORMAL_CHMODE, \ref USART_AUTO_ECHO,\r
+ //! \ref USART_LOCAL_LOOPBACK or \ref USART_REMOTE_LOOPBACK.\r
+ unsigned char channelmode;\r
+} usart_options_t;\r
+\r
+//! Input parameters when initializing ISO7816 modes.\r
+typedef struct\r
+{\r
+ //! Set the frequency of the ISO7816 clock.\r
+ unsigned long iso7816_hz;\r
+\r
+ //! The number of ISO7816 clock ticks in every bit period (1 to 2047, 0 = disable clock).\r
+ //! Bit rate = \ref iso7816_hz / \ref fidi_ratio.\r
+ unsigned short fidi_ratio;\r
+\r
+ //! Inhibit Non Acknowledge:\n\r
+ //! - 0: the NACK is generated;\n\r
+ //! - 1: the NACK is not generated.\r
+ //!\r
+ //! \note This bit will be used only in ISO7816 mode, protocol T = 0 receiver.\r
+ int inhibit_nack;\r
+\r
+ //! Disable successive NACKs.\r
+ //! Successive parity errors are counted up to the value in the \ref max_iterations field.\r
+ //! These parity errors generate a NACK on the ISO line. As soon as this value is reached,\r
+ //! no addititional NACK is sent on the ISO line. The ITERATION flag is asserted.\r
+ int dis_suc_nack;\r
+\r
+ //! Max number of repetitions (0 to 7).\r
+ unsigned char max_iterations;\r
+\r
+ //! Bit order in transmitted characters:\n\r
+ //! - 0: LSB first;\n\r
+ //! - 1: MSB first.\r
+ int bit_order;\r
+} iso7816_options_t;\r
+\r
+\r
+//------------------------------------------------------------------------------\r
+/*! \name Initialization Functions\r
+ */\r
+//! @{\r
+\r
+/*! \brief Resets the USART and disables TX and RX.\r
+ *\r
+ * \param usart Base address of the USART instance.\r
+ */\r
+extern void usart_reset(volatile avr32_usart_t *usart);\r
+\r
+/*! \brief Sets up the USART to use the standard RS232 protocol.\r
+ *\r
+ * \param usart Base address of the USART instance.\r
+ * \param opt Options needed to set up RS232 communication (see \ref usart_options_t).\r
+ * \param pba_hz USART module input clock frequency (PBA clock, Hz).\r
+ *\r
+ * \retval USART_SUCCESS Mode successfully initialized.\r
+ * \retval USART_INVALID_INPUT One or more of the arguments is out of valid range.\r
+ */\r
+extern int usart_init_rs232(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz);\r
+\r
+/*! \brief Sets up the USART to use hardware handshaking.\r
+ *\r
+ * \param usart Base address of the USART instance.\r
+ * \param opt Options needed to set up RS232 communication (see \ref usart_options_t).\r
+ * \param pba_hz USART module input clock frequency (PBA clock, Hz).\r
+ *\r
+ * \retval USART_SUCCESS Mode successfully initialized.\r
+ * \retval USART_INVALID_INPUT One or more of the arguments is out of valid range.\r
+ *\r
+ * \note \ref usart_init_rs232 does not need to be invoked before this function.\r
+ */\r
+extern int usart_init_hw_handshaking(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz);\r
+\r
+/*! \brief Sets up the USART to use the IrDA protocol.\r
+ *\r
+ * \param usart Base address of the USART instance.\r
+ * \param opt Options needed to set up RS232 communication (see \ref usart_options_t).\r
+ * \param pba_hz USART module input clock frequency (PBA clock, Hz).\r
+ * \param irda_filter Counter used to distinguish received ones from zeros.\r
+ *\r
+ * \retval USART_SUCCESS Mode successfully initialized.\r
+ * \retval USART_INVALID_INPUT One or more of the arguments is out of valid range.\r
+ */\r
+extern int usart_init_IrDA(volatile avr32_usart_t *usart, const usart_options_t *opt,\r
+ long pba_hz, unsigned char irda_filter);\r
+\r
+/*! \brief Sets up the USART to use the modem protocol, activating dedicated inputs/outputs.\r
+ *\r
+ * \param usart Base address of the USART instance.\r
+ * \param opt Options needed to set up RS232 communication (see \ref usart_options_t).\r
+ * \param pba_hz USART module input clock frequency (PBA clock, Hz).\r
+ *\r
+ * \retval USART_SUCCESS Mode successfully initialized.\r
+ * \retval USART_INVALID_INPUT One or more of the arguments is out of valid range.\r
+ */\r
+extern int usart_init_modem(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz);\r
+\r
+/*! \brief Sets up the USART to use the RS485 protocol.\r
+ *\r
+ * \param usart Base address of the USART instance.\r
+ * \param opt Options needed to set up RS232 communication (see \ref usart_options_t).\r
+ * \param pba_hz USART module input clock frequency (PBA clock, Hz).\r
+ *\r
+ * \retval USART_SUCCESS Mode successfully initialized.\r
+ * \retval USART_INVALID_INPUT One or more of the arguments is out of valid range.\r
+ */\r
+extern int usart_init_rs485(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz);\r
+\r
+/*! \brief Sets up the USART to use the ISO7816 T=0 or T=1 smartcard protocols.\r
+ *\r
+ * \param usart Base address of the USART instance.\r
+ * \param opt Options needed to set up ISO7816 communication (see \ref iso7816_options_t).\r
+ * \param t ISO7816 mode to use (T=0 or T=1).\r
+ * \param pba_hz USART module input clock frequency (PBA clock, Hz).\r
+ *\r
+ * \retval USART_SUCCESS Mode successfully initialized.\r
+ * \retval USART_INVALID_INPUT One or more of the arguments is out of valid range.\r
+ */\r
+extern int usart_init_iso7816(volatile avr32_usart_t *usart, const iso7816_options_t *opt, int t, long pba_hz);\r
+\r
+//! @}\r
+\r
+\r
+//------------------------------------------------------------------------------\r
+/*! \name Read and Reset Error Status Bits\r
+ */\r
+//! @{\r
+\r
+/*! \brief Resets the error status.\r
+ *\r
+ * This function resets the status bits indicating that a parity error,\r
+ * framing error or overrun has occurred. The RXBRK bit, indicating\r
+ * a start/end of break condition on the RX line, is also reset.\r
+ *\r
+ * \param usart Base address of the USART instance.\r
+ */\r
+#if __GNUC__\r
+__attribute__((__always_inline__))\r
+#endif\r
+extern __inline__ void usart_reset_status(volatile avr32_usart_t *usart)\r
+{\r
+ usart->cr |= AVR32_USART_CR_RSTSTA_MASK;\r
+}\r
+\r
+/*! \brief Checks if a parity error has occurred since last status reset.\r
+ *\r
+ * \param usart Base address of the USART instance.\r
+ *\r
+ * \return \c 1 if a parity error has been detected, otherwise \c 0.\r
+ */\r
+#if __GNUC__\r
+__attribute__((__always_inline__))\r
+#endif\r
+extern __inline__ int usart_parity_error(volatile avr32_usart_t *usart)\r
+{\r
+ return (usart->csr & AVR32_USART_CSR_PARE_MASK) != 0;\r
+}\r
+\r
+/*! \brief Checks if a framing error has occurred since last status reset.\r
+ *\r
+ * \param usart Base address of the USART instance.\r
+ *\r
+ * \return \c 1 if a framing error has been detected, otherwise \c 0.\r
+ */\r
+#if __GNUC__\r
+__attribute__((__always_inline__))\r
+#endif\r
+extern __inline__ int usart_framing_error(volatile avr32_usart_t *usart)\r
+{\r
+ return (usart->csr & AVR32_USART_CSR_FRAME_MASK) != 0;\r
+}\r
+\r
+/*! \brief Checks if an overrun error has occurred since last status reset.\r
+ *\r
+ * \param usart Base address of the USART instance.\r
+ *\r
+ * \return \c 1 if a overrun error has been detected, otherwise \c 0.\r
+ */\r
+#if __GNUC__\r
+__attribute__((__always_inline__))\r
+#endif\r
+extern __inline__ int usart_overrun_error(volatile avr32_usart_t *usart)\r
+{\r
+ return (usart->csr & AVR32_USART_CSR_OVRE_MASK) != 0;\r
+}\r
+\r
+//! @}\r
+\r
+\r
+//------------------------------------------------------------------------------\r
+/*! \name Transmit/Receive Functions\r
+ */\r
+//! @{\r
+\r
+/*! \brief Addresses a receiver.\r
+ *\r
+ * While in RS485 mode, receivers only accept data addressed to them.\r
+ * A packet/char with the address tag set has to precede any data.\r
+ * This function is used to address a receiver. This receiver should read\r
+ * all the following data, until an address packet addresses another receiver.\r
+ *\r
+ * \param usart Base address of the USART instance.\r
+ * \param address Address of the target device.\r
+ *\r
+ * \retval USART_SUCCESS Address successfully sent (if current mode is RS485).\r
+ * \retval USART_MODE_FAULT Wrong operating mode.\r
+ */\r
+extern int usart_send_address(volatile avr32_usart_t *usart, int address);\r
+\r
+/*! \brief Writes the given character to the TX buffer if the transmitter is ready.\r
+ *\r
+ * \param usart Base address of the USART instance.\r
+ * \param c The character (up to 9 bits) to transmit.\r
+ *\r
+ * \retval USART_SUCCESS The transmitter was ready.\r
+ * \retval USART_TX_BUSY The transmitter was busy.\r
+ */\r
+extern int usart_write_char(volatile avr32_usart_t *usart, int c);\r
+\r
+/*! \brief An active wait writing a character to the USART.\r
+ *\r
+ * \param usart Base address of the USART instance.\r
+ * \param c The character (up to 9 bits) to transmit.\r
+ */\r
+#if __GNUC__\r
+__attribute__((__always_inline__))\r
+#endif\r
+extern __inline__ void usart_bw_write_char(volatile avr32_usart_t *usart, int c)\r
+{\r
+ while (usart_write_char(usart, c) != USART_SUCCESS);\r
+}\r
+\r
+/*! \brief Sends a character with the USART.\r
+ *\r
+ * \param usart Base address of the USART instance.\r
+ * \param c Character to write.\r
+ *\r
+ * \retval USART_SUCCESS The character was written.\r
+ * \retval USART_FAILURE The function timed out before the USART transmitter became ready to send.\r
+ */\r
+extern int usart_putchar(volatile avr32_usart_t *usart, int c);\r
+\r
+/*! \brief Checks the RX buffer for a received character, and stores it at the\r
+ * given memory location.\r
+ *\r
+ * \param usart Base address of the USART instance.\r
+ * \param c Pointer to the where the read character should be stored\r
+ * (must be at least short in order to accept 9-bit characters).\r
+ *\r
+ * \retval USART_SUCCESS The character was read successfully.\r
+ * \retval USART_RX_EMPTY The RX buffer was empty.\r
+ * \retval USART_RX_ERROR An error was deteceted.\r
+ */\r
+extern int usart_read_char(volatile avr32_usart_t *usart, int *c);\r
+\r
+/*! \brief Waits until a character is received, and returns it.\r
+ *\r
+ * \param usart Base address of the USART instance.\r
+ *\r
+ * \return The received character, or \ref USART_FAILURE upon error.\r
+ */\r
+extern int usart_getchar(volatile avr32_usart_t *usart);\r
+\r
+/*! \brief Writes one character string to the USART.\r
+ *\r
+ * \param usart Base address of the USART instance.\r
+ * \param string String to be written.\r
+ */\r
+extern void usart_write_line(volatile avr32_usart_t *usart, const char *string);\r
+\r
+/*! \brief Gets and echoes characters until end of line.\r
+ *\r
+ * \param usart Base address of the USART instance.\r
+ *\r
+ * \retval USART_SUCCESS Success.\r
+ * \retval USART_FAILURE ETX character received.\r
+ */\r
+extern int usart_get_echo_line(volatile avr32_usart_t *usart);\r
+\r
+//! @}\r
+\r
+\r
+#endif // _USART_H_\r
--- /dev/null
+/*This file has been prepared for Doxygen automatic documentation generation.*/\r
+/*! \file *********************************************************************\r
+ *\r
+ * \brief FreeRTOS demonstration for AVR32 UC3.\r
+ *\r
+ * - Compiler: IAR EWAVR32 and GNU GCC for AVR32\r
+ * - Supported devices: All AVR32 devices can be used.\r
+ * - AppNote:\r
+ *\r
+ * \author Atmel Corporation: http://www.atmel.com \n\r
+ * Support email: avr32@atmel.com\r
+ *\r
+ *****************************************************************************/\r
+\r
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the following disclaimer.\r
+ *\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ * this list of conditions and the following disclaimer in the documentation\r
+ * and/or other materials provided with the distribution.\r
+ *\r
+ * 3. The name of ATMEL may not be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND\r
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,\r
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\r
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\r
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND\r
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF\r
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ */\r
+\r
+\r
+#ifndef FREERTOS_CONFIG_H\r
+#define FREERTOS_CONFIG_H\r
+\r
+#include "board.h"\r
+\r
+\r
+/*-----------------------------------------------------------\r
+ * Application specific definitions.\r
+ *\r
+ * These definitions should be adjusted for your particular hardware and\r
+ * application requirements.\r
+ *\r
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE\r
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.\r
+ *----------------------------------------------------------*/\r
+\r
+#define configUSE_PREEMPTION 1\r
+#define configUSE_IDLE_HOOK 0\r
+#define configUSE_TICK_HOOK 0\r
+#define configCPU_CLOCK_HZ ( FOSC0 ) /* Hz clk gen */\r
+#define configPBA_CLOCK_HZ ( FOSC0 )\r
+#define configTICK_RATE_HZ ( ( portTickType ) 1000 )\r
+#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 8 )\r
+#define configMINIMAL_STACK_SIZE ( ( unsigned portSHORT ) 128 )\r
+#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 1024*30 ) )\r
+#define configMAX_TASK_NAME_LEN ( 16 )\r
+#define configUSE_TRACE_FACILITY 0\r
+#define configUSE_16_BIT_TICKS 0\r
+#define configIDLE_SHOULD_YIELD 1\r
+\r
+/* Co-routine definitions. */\r
+#define configUSE_CO_ROUTINES 0\r
+#define configMAX_CO_ROUTINE_PRIORITIES ( 0 )\r
+\r
+/* Set the following definitions to 1 to include the API function, or zero\r
+to exclude the API function. */\r
+\r
+#define INCLUDE_vTaskPrioritySet 1\r
+#define INCLUDE_uxTaskPriorityGet 1\r
+#define INCLUDE_vTaskDelete 1\r
+#define INCLUDE_vTaskCleanUpResources 0\r
+#define INCLUDE_vTaskSuspend 1\r
+#define INCLUDE_vTaskDelayUntil 1\r
+#define INCLUDE_vTaskDelay 1\r
+\r
+/* configTICK_USE_TC is a boolean indicating whether to use a Timer Counter\r
+ for the tick generation. Timer Counter will generate an accurate Tick;\r
+ otherwise the CPU will generate a tick but with time drift.\r
+ configTICK_TC_CHANNEL is the TC channel.*/\r
+#define configTICK_USE_TC 1\r
+#define configTICK_TC_CHANNEL 2\r
+\r
+/* Debug trace configuration.\r
+ configDBG is a boolean indicating whether to activate the debug trace. */\r
+#define configDBG 1\r
+#define configDBG_USART (&AVR32_USART1)\r
+#define configDBG_USART_RX_PIN AVR32_USART1_RXD_0_PIN\r
+#define configDBG_USART_RX_FUNCTION AVR32_USART1_RXD_0_FUNCTION\r
+#define configDBG_USART_TX_PIN AVR32_USART1_TXD_0_PIN\r
+#define configDBG_USART_TX_FUNCTION AVR32_USART1_TXD_0_FUNCTION\r
+#define configDBG_USART_BAUDRATE 57600\r
+\r
+#endif /* FREERTOS_CONFIG_H */\r
--- /dev/null
+/* This source file is part of the ATMEL FREERTOS-0.9.0 Release */\r
+\r
+/*This file has been prepared for Doxygen automatic documentation generation.*/\r
+/*! \file *********************************************************************\r
+ *\r
+ * \brief FreeRTOS LEDs Management for AVR32 UC3.\r
+ *\r
+ * - Compiler: IAR EWAVR32 and GNU GCC for AVR32\r
+ * - Supported devices: All AVR32 devices can be used.\r
+ * - AppNote:\r
+ *\r
+ * \author Atmel Corporation: http://www.atmel.com \n\r
+ * Support email: avr32@atmel.com\r
+ *\r
+ *****************************************************************************/\r
+\r
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the following disclaimer.\r
+ *\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ * this list of conditions and the following disclaimer in the documentation\r
+ * and/or other materials provided with the distribution.\r
+ *\r
+ * 3. The name of ATMEL may not be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND\r
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,\r
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\r
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\r
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND\r
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF\r
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ */\r
+\r
+\r
+\r
+#if __GNUC__\r
+ #include <avr32/io.h>\r
+#elif __ICCAVR32__\r
+ #include <avr32/iouc3a0512.h>\r
+#else\r
+ #error Unknown compiler\r
+#endif\r
+\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+#include "partest.h"\r
+\r
+\r
+/*-----------------------------------------------------------\r
+ * Simple parallel port IO routines.\r
+ *-----------------------------------------------------------*/\r
+\r
+#define partstALL_OUTPUTS_OFF ( ( unsigned portCHAR ) 0x00 )\r
+#define partstMAX_OUTPUT_LED ( ( unsigned portCHAR ) 8 )\r
+\r
+static volatile unsigned portCHAR ucCurrentOutputValue = partstALL_OUTPUTS_OFF; /*lint !e956 File scope parameters okay here. */\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+void vParTestInitialise( void )\r
+{\r
+ LED_Display( partstALL_OUTPUTS_OFF ); /* Start with all LEDs off. */\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vParTestSetLED( unsigned portBASE_TYPE uxLED, signed portBASE_TYPE xValue )\r
+{\r
+unsigned portCHAR ucBit;\r
+\r
+ if( uxLED >= partstMAX_OUTPUT_LED )\r
+ {\r
+ return;\r
+ }\r
+\r
+ ucBit = ( ( unsigned portCHAR ) 1 ) << uxLED;\r
+\r
+ vTaskSuspendAll();\r
+ {\r
+ if( xValue == pdTRUE )\r
+ {\r
+ ucCurrentOutputValue |= ucBit;\r
+ }\r
+ else\r
+ {\r
+ ucCurrentOutputValue &= ~ucBit;\r
+ }\r
+\r
+ LED_Display(ucCurrentOutputValue);\r
+ }\r
+ xTaskResumeAll();\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vParTestToggleLED( unsigned portBASE_TYPE uxLED )\r
+{\r
+unsigned portCHAR ucBit;\r
+\r
+ if( uxLED >= partstMAX_OUTPUT_LED )\r
+ {\r
+ return;\r
+ }\r
+\r
+ ucBit = ( ( unsigned portCHAR ) 1 ) << uxLED;\r
+\r
+ vTaskSuspendAll();\r
+ {\r
+ ucCurrentOutputValue ^= ucBit;\r
+ LED_Display(ucCurrentOutputValue);\r
+ }\r
+ xTaskResumeAll();\r
+}\r
--- /dev/null
+/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */\r
+\r
+/*This file is prepared for Doxygen automatic documentation generation.*/\r
+/*! \file *********************************************************************\r
+ *\r
+ * \brief Preprocessor macro repeating utils.\r
+ *\r
+ * - Compiler: IAR EWAVR32 and GNU GCC for AVR32\r
+ * - Supported devices: All AVR32 devices can be used.\r
+ *\r
+ * \author Atmel Corporation: http://www.atmel.com \n\r
+ * Support email: avr32@atmel.com\r
+ *\r
+ ******************************************************************************/\r
+\r
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the following disclaimer.\r
+ *\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ * this list of conditions and the following disclaimer in the documentation\r
+ * and/or other materials provided with the distribution.\r
+ *\r
+ * 3. The name of ATMEL may not be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND\r
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,\r
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\r
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\r
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND\r
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF\r
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ */\r
+\r
+\r
+#ifndef _MREPEAT_H_\r
+#define _MREPEAT_H_\r
+\r
+#include "preprocessor.h"\r
+\r
+\r
+//! Maximal number of repetitions supported by MREPEAT.\r
+#define MREPEAT_LIMIT 256\r
+\r
+/*! \brief Macro repeat.\r
+ *\r
+ * This macro represents a horizontal repetition construct.\r
+ *\r
+ * \param count The number of repetitious calls to macro. Valid values range from 0 to MREPEAT_LIMIT.\r
+ * \param macro A binary operation of the form macro(n, data). This macro is expanded by MREPEAT with\r
+ * the current repetition number and the auxiliary data argument.\r
+ * \param data Auxiliary data passed to macro.\r
+ *\r
+ * \return <tt>macro(0, data) macro(1, data) ... macro(count - 1, data)</tt>\r
+ */\r
+#define MREPEAT(count, macro, data) TPASTE2(MREPEAT, count)(macro, data)\r
+\r
+#define MREPEAT0( macro, data)\r
+#define MREPEAT1( macro, data) MREPEAT0( macro, data) macro( 0, data)\r
+#define MREPEAT2( macro, data) MREPEAT1( macro, data) macro( 1, data)\r
+#define MREPEAT3( macro, data) MREPEAT2( macro, data) macro( 2, data)\r
+#define MREPEAT4( macro, data) MREPEAT3( macro, data) macro( 3, data)\r
+#define MREPEAT5( macro, data) MREPEAT4( macro, data) macro( 4, data)\r
+#define MREPEAT6( macro, data) MREPEAT5( macro, data) macro( 5, data)\r
+#define MREPEAT7( macro, data) MREPEAT6( macro, data) macro( 6, data)\r
+#define MREPEAT8( macro, data) MREPEAT7( macro, data) macro( 7, data)\r
+#define MREPEAT9( macro, data) MREPEAT8( macro, data) macro( 8, data)\r
+#define MREPEAT10( macro, data) MREPEAT9( macro, data) macro( 9, data)\r
+#define MREPEAT11( macro, data) MREPEAT10( macro, data) macro( 10, data)\r
+#define MREPEAT12( macro, data) MREPEAT11( macro, data) macro( 11, data)\r
+#define MREPEAT13( macro, data) MREPEAT12( macro, data) macro( 12, data)\r
+#define MREPEAT14( macro, data) MREPEAT13( macro, data) macro( 13, data)\r
+#define MREPEAT15( macro, data) MREPEAT14( macro, data) macro( 14, data)\r
+#define MREPEAT16( macro, data) MREPEAT15( macro, data) macro( 15, data)\r
+#define MREPEAT17( macro, data) MREPEAT16( macro, data) macro( 16, data)\r
+#define MREPEAT18( macro, data) MREPEAT17( macro, data) macro( 17, data)\r
+#define MREPEAT19( macro, data) MREPEAT18( macro, data) macro( 18, data)\r
+#define MREPEAT20( macro, data) MREPEAT19( macro, data) macro( 19, data)\r
+#define MREPEAT21( macro, data) MREPEAT20( macro, data) macro( 20, data)\r
+#define MREPEAT22( macro, data) MREPEAT21( macro, data) macro( 21, data)\r
+#define MREPEAT23( macro, data) MREPEAT22( macro, data) macro( 22, data)\r
+#define MREPEAT24( macro, data) MREPEAT23( macro, data) macro( 23, data)\r
+#define MREPEAT25( macro, data) MREPEAT24( macro, data) macro( 24, data)\r
+#define MREPEAT26( macro, data) MREPEAT25( macro, data) macro( 25, data)\r
+#define MREPEAT27( macro, data) MREPEAT26( macro, data) macro( 26, data)\r
+#define MREPEAT28( macro, data) MREPEAT27( macro, data) macro( 27, data)\r
+#define MREPEAT29( macro, data) MREPEAT28( macro, data) macro( 28, data)\r
+#define MREPEAT30( macro, data) MREPEAT29( macro, data) macro( 29, data)\r
+#define MREPEAT31( macro, data) MREPEAT30( macro, data) macro( 30, data)\r
+#define MREPEAT32( macro, data) MREPEAT31( macro, data) macro( 31, data)\r
+#define MREPEAT33( macro, data) MREPEAT32( macro, data) macro( 32, data)\r
+#define MREPEAT34( macro, data) MREPEAT33( macro, data) macro( 33, data)\r
+#define MREPEAT35( macro, data) MREPEAT34( macro, data) macro( 34, data)\r
+#define MREPEAT36( macro, data) MREPEAT35( macro, data) macro( 35, data)\r
+#define MREPEAT37( macro, data) MREPEAT36( macro, data) macro( 36, data)\r
+#define MREPEAT38( macro, data) MREPEAT37( macro, data) macro( 37, data)\r
+#define MREPEAT39( macro, data) MREPEAT38( macro, data) macro( 38, data)\r
+#define MREPEAT40( macro, data) MREPEAT39( macro, data) macro( 39, data)\r
+#define MREPEAT41( macro, data) MREPEAT40( macro, data) macro( 40, data)\r
+#define MREPEAT42( macro, data) MREPEAT41( macro, data) macro( 41, data)\r
+#define MREPEAT43( macro, data) MREPEAT42( macro, data) macro( 42, data)\r
+#define MREPEAT44( macro, data) MREPEAT43( macro, data) macro( 43, data)\r
+#define MREPEAT45( macro, data) MREPEAT44( macro, data) macro( 44, data)\r
+#define MREPEAT46( macro, data) MREPEAT45( macro, data) macro( 45, data)\r
+#define MREPEAT47( macro, data) MREPEAT46( macro, data) macro( 46, data)\r
+#define MREPEAT48( macro, data) MREPEAT47( macro, data) macro( 47, data)\r
+#define MREPEAT49( macro, data) MREPEAT48( macro, data) macro( 48, data)\r
+#define MREPEAT50( macro, data) MREPEAT49( macro, data) macro( 49, data)\r
+#define MREPEAT51( macro, data) MREPEAT50( macro, data) macro( 50, data)\r
+#define MREPEAT52( macro, data) MREPEAT51( macro, data) macro( 51, data)\r
+#define MREPEAT53( macro, data) MREPEAT52( macro, data) macro( 52, data)\r
+#define MREPEAT54( macro, data) MREPEAT53( macro, data) macro( 53, data)\r
+#define MREPEAT55( macro, data) MREPEAT54( macro, data) macro( 54, data)\r
+#define MREPEAT56( macro, data) MREPEAT55( macro, data) macro( 55, data)\r
+#define MREPEAT57( macro, data) MREPEAT56( macro, data) macro( 56, data)\r
+#define MREPEAT58( macro, data) MREPEAT57( macro, data) macro( 57, data)\r
+#define MREPEAT59( macro, data) MREPEAT58( macro, data) macro( 58, data)\r
+#define MREPEAT60( macro, data) MREPEAT59( macro, data) macro( 59, data)\r
+#define MREPEAT61( macro, data) MREPEAT60( macro, data) macro( 60, data)\r
+#define MREPEAT62( macro, data) MREPEAT61( macro, data) macro( 61, data)\r
+#define MREPEAT63( macro, data) MREPEAT62( macro, data) macro( 62, data)\r
+#define MREPEAT64( macro, data) MREPEAT63( macro, data) macro( 63, data)\r
+#define MREPEAT65( macro, data) MREPEAT64( macro, data) macro( 64, data)\r
+#define MREPEAT66( macro, data) MREPEAT65( macro, data) macro( 65, data)\r
+#define MREPEAT67( macro, data) MREPEAT66( macro, data) macro( 66, data)\r
+#define MREPEAT68( macro, data) MREPEAT67( macro, data) macro( 67, data)\r
+#define MREPEAT69( macro, data) MREPEAT68( macro, data) macro( 68, data)\r
+#define MREPEAT70( macro, data) MREPEAT69( macro, data) macro( 69, data)\r
+#define MREPEAT71( macro, data) MREPEAT70( macro, data) macro( 70, data)\r
+#define MREPEAT72( macro, data) MREPEAT71( macro, data) macro( 71, data)\r
+#define MREPEAT73( macro, data) MREPEAT72( macro, data) macro( 72, data)\r
+#define MREPEAT74( macro, data) MREPEAT73( macro, data) macro( 73, data)\r
+#define MREPEAT75( macro, data) MREPEAT74( macro, data) macro( 74, data)\r
+#define MREPEAT76( macro, data) MREPEAT75( macro, data) macro( 75, data)\r
+#define MREPEAT77( macro, data) MREPEAT76( macro, data) macro( 76, data)\r
+#define MREPEAT78( macro, data) MREPEAT77( macro, data) macro( 77, data)\r
+#define MREPEAT79( macro, data) MREPEAT78( macro, data) macro( 78, data)\r
+#define MREPEAT80( macro, data) MREPEAT79( macro, data) macro( 79, data)\r
+#define MREPEAT81( macro, data) MREPEAT80( macro, data) macro( 80, data)\r
+#define MREPEAT82( macro, data) MREPEAT81( macro, data) macro( 81, data)\r
+#define MREPEAT83( macro, data) MREPEAT82( macro, data) macro( 82, data)\r
+#define MREPEAT84( macro, data) MREPEAT83( macro, data) macro( 83, data)\r
+#define MREPEAT85( macro, data) MREPEAT84( macro, data) macro( 84, data)\r
+#define MREPEAT86( macro, data) MREPEAT85( macro, data) macro( 85, data)\r
+#define MREPEAT87( macro, data) MREPEAT86( macro, data) macro( 86, data)\r
+#define MREPEAT88( macro, data) MREPEAT87( macro, data) macro( 87, data)\r
+#define MREPEAT89( macro, data) MREPEAT88( macro, data) macro( 88, data)\r
+#define MREPEAT90( macro, data) MREPEAT89( macro, data) macro( 89, data)\r
+#define MREPEAT91( macro, data) MREPEAT90( macro, data) macro( 90, data)\r
+#define MREPEAT92( macro, data) MREPEAT91( macro, data) macro( 91, data)\r
+#define MREPEAT93( macro, data) MREPEAT92( macro, data) macro( 92, data)\r
+#define MREPEAT94( macro, data) MREPEAT93( macro, data) macro( 93, data)\r
+#define MREPEAT95( macro, data) MREPEAT94( macro, data) macro( 94, data)\r
+#define MREPEAT96( macro, data) MREPEAT95( macro, data) macro( 95, data)\r
+#define MREPEAT97( macro, data) MREPEAT96( macro, data) macro( 96, data)\r
+#define MREPEAT98( macro, data) MREPEAT97( macro, data) macro( 97, data)\r
+#define MREPEAT99( macro, data) MREPEAT98( macro, data) macro( 98, data)\r
+#define MREPEAT100(macro, data) MREPEAT99( macro, data) macro( 99, data)\r
+#define MREPEAT101(macro, data) MREPEAT100(macro, data) macro(100, data)\r
+#define MREPEAT102(macro, data) MREPEAT101(macro, data) macro(101, data)\r
+#define MREPEAT103(macro, data) MREPEAT102(macro, data) macro(102, data)\r
+#define MREPEAT104(macro, data) MREPEAT103(macro, data) macro(103, data)\r
+#define MREPEAT105(macro, data) MREPEAT104(macro, data) macro(104, data)\r
+#define MREPEAT106(macro, data) MREPEAT105(macro, data) macro(105, data)\r
+#define MREPEAT107(macro, data) MREPEAT106(macro, data) macro(106, data)\r
+#define MREPEAT108(macro, data) MREPEAT107(macro, data) macro(107, data)\r
+#define MREPEAT109(macro, data) MREPEAT108(macro, data) macro(108, data)\r
+#define MREPEAT110(macro, data) MREPEAT109(macro, data) macro(109, data)\r
+#define MREPEAT111(macro, data) MREPEAT110(macro, data) macro(110, data)\r
+#define MREPEAT112(macro, data) MREPEAT111(macro, data) macro(111, data)\r
+#define MREPEAT113(macro, data) MREPEAT112(macro, data) macro(112, data)\r
+#define MREPEAT114(macro, data) MREPEAT113(macro, data) macro(113, data)\r
+#define MREPEAT115(macro, data) MREPEAT114(macro, data) macro(114, data)\r
+#define MREPEAT116(macro, data) MREPEAT115(macro, data) macro(115, data)\r
+#define MREPEAT117(macro, data) MREPEAT116(macro, data) macro(116, data)\r
+#define MREPEAT118(macro, data) MREPEAT117(macro, data) macro(117, data)\r
+#define MREPEAT119(macro, data) MREPEAT118(macro, data) macro(118, data)\r
+#define MREPEAT120(macro, data) MREPEAT119(macro, data) macro(119, data)\r
+#define MREPEAT121(macro, data) MREPEAT120(macro, data) macro(120, data)\r
+#define MREPEAT122(macro, data) MREPEAT121(macro, data) macro(121, data)\r
+#define MREPEAT123(macro, data) MREPEAT122(macro, data) macro(122, data)\r
+#define MREPEAT124(macro, data) MREPEAT123(macro, data) macro(123, data)\r
+#define MREPEAT125(macro, data) MREPEAT124(macro, data) macro(124, data)\r
+#define MREPEAT126(macro, data) MREPEAT125(macro, data) macro(125, data)\r
+#define MREPEAT127(macro, data) MREPEAT126(macro, data) macro(126, data)\r
+#define MREPEAT128(macro, data) MREPEAT127(macro, data) macro(127, data)\r
+#define MREPEAT129(macro, data) MREPEAT128(macro, data) macro(128, data)\r
+#define MREPEAT130(macro, data) MREPEAT129(macro, data) macro(129, data)\r
+#define MREPEAT131(macro, data) MREPEAT130(macro, data) macro(130, data)\r
+#define MREPEAT132(macro, data) MREPEAT131(macro, data) macro(131, data)\r
+#define MREPEAT133(macro, data) MREPEAT132(macro, data) macro(132, data)\r
+#define MREPEAT134(macro, data) MREPEAT133(macro, data) macro(133, data)\r
+#define MREPEAT135(macro, data) MREPEAT134(macro, data) macro(134, data)\r
+#define MREPEAT136(macro, data) MREPEAT135(macro, data) macro(135, data)\r
+#define MREPEAT137(macro, data) MREPEAT136(macro, data) macro(136, data)\r
+#define MREPEAT138(macro, data) MREPEAT137(macro, data) macro(137, data)\r
+#define MREPEAT139(macro, data) MREPEAT138(macro, data) macro(138, data)\r
+#define MREPEAT140(macro, data) MREPEAT139(macro, data) macro(139, data)\r
+#define MREPEAT141(macro, data) MREPEAT140(macro, data) macro(140, data)\r
+#define MREPEAT142(macro, data) MREPEAT141(macro, data) macro(141, data)\r
+#define MREPEAT143(macro, data) MREPEAT142(macro, data) macro(142, data)\r
+#define MREPEAT144(macro, data) MREPEAT143(macro, data) macro(143, data)\r
+#define MREPEAT145(macro, data) MREPEAT144(macro, data) macro(144, data)\r
+#define MREPEAT146(macro, data) MREPEAT145(macro, data) macro(145, data)\r
+#define MREPEAT147(macro, data) MREPEAT146(macro, data) macro(146, data)\r
+#define MREPEAT148(macro, data) MREPEAT147(macro, data) macro(147, data)\r
+#define MREPEAT149(macro, data) MREPEAT148(macro, data) macro(148, data)\r
+#define MREPEAT150(macro, data) MREPEAT149(macro, data) macro(149, data)\r
+#define MREPEAT151(macro, data) MREPEAT150(macro, data) macro(150, data)\r
+#define MREPEAT152(macro, data) MREPEAT151(macro, data) macro(151, data)\r
+#define MREPEAT153(macro, data) MREPEAT152(macro, data) macro(152, data)\r
+#define MREPEAT154(macro, data) MREPEAT153(macro, data) macro(153, data)\r
+#define MREPEAT155(macro, data) MREPEAT154(macro, data) macro(154, data)\r
+#define MREPEAT156(macro, data) MREPEAT155(macro, data) macro(155, data)\r
+#define MREPEAT157(macro, data) MREPEAT156(macro, data) macro(156, data)\r
+#define MREPEAT158(macro, data) MREPEAT157(macro, data) macro(157, data)\r
+#define MREPEAT159(macro, data) MREPEAT158(macro, data) macro(158, data)\r
+#define MREPEAT160(macro, data) MREPEAT159(macro, data) macro(159, data)\r
+#define MREPEAT161(macro, data) MREPEAT160(macro, data) macro(160, data)\r
+#define MREPEAT162(macro, data) MREPEAT161(macro, data) macro(161, data)\r
+#define MREPEAT163(macro, data) MREPEAT162(macro, data) macro(162, data)\r
+#define MREPEAT164(macro, data) MREPEAT163(macro, data) macro(163, data)\r
+#define MREPEAT165(macro, data) MREPEAT164(macro, data) macro(164, data)\r
+#define MREPEAT166(macro, data) MREPEAT165(macro, data) macro(165, data)\r
+#define MREPEAT167(macro, data) MREPEAT166(macro, data) macro(166, data)\r
+#define MREPEAT168(macro, data) MREPEAT167(macro, data) macro(167, data)\r
+#define MREPEAT169(macro, data) MREPEAT168(macro, data) macro(168, data)\r
+#define MREPEAT170(macro, data) MREPEAT169(macro, data) macro(169, data)\r
+#define MREPEAT171(macro, data) MREPEAT170(macro, data) macro(170, data)\r
+#define MREPEAT172(macro, data) MREPEAT171(macro, data) macro(171, data)\r
+#define MREPEAT173(macro, data) MREPEAT172(macro, data) macro(172, data)\r
+#define MREPEAT174(macro, data) MREPEAT173(macro, data) macro(173, data)\r
+#define MREPEAT175(macro, data) MREPEAT174(macro, data) macro(174, data)\r
+#define MREPEAT176(macro, data) MREPEAT175(macro, data) macro(175, data)\r
+#define MREPEAT177(macro, data) MREPEAT176(macro, data) macro(176, data)\r
+#define MREPEAT178(macro, data) MREPEAT177(macro, data) macro(177, data)\r
+#define MREPEAT179(macro, data) MREPEAT178(macro, data) macro(178, data)\r
+#define MREPEAT180(macro, data) MREPEAT179(macro, data) macro(179, data)\r
+#define MREPEAT181(macro, data) MREPEAT180(macro, data) macro(180, data)\r
+#define MREPEAT182(macro, data) MREPEAT181(macro, data) macro(181, data)\r
+#define MREPEAT183(macro, data) MREPEAT182(macro, data) macro(182, data)\r
+#define MREPEAT184(macro, data) MREPEAT183(macro, data) macro(183, data)\r
+#define MREPEAT185(macro, data) MREPEAT184(macro, data) macro(184, data)\r
+#define MREPEAT186(macro, data) MREPEAT185(macro, data) macro(185, data)\r
+#define MREPEAT187(macro, data) MREPEAT186(macro, data) macro(186, data)\r
+#define MREPEAT188(macro, data) MREPEAT187(macro, data) macro(187, data)\r
+#define MREPEAT189(macro, data) MREPEAT188(macro, data) macro(188, data)\r
+#define MREPEAT190(macro, data) MREPEAT189(macro, data) macro(189, data)\r
+#define MREPEAT191(macro, data) MREPEAT190(macro, data) macro(190, data)\r
+#define MREPEAT192(macro, data) MREPEAT191(macro, data) macro(191, data)\r
+#define MREPEAT193(macro, data) MREPEAT192(macro, data) macro(192, data)\r
+#define MREPEAT194(macro, data) MREPEAT193(macro, data) macro(193, data)\r
+#define MREPEAT195(macro, data) MREPEAT194(macro, data) macro(194, data)\r
+#define MREPEAT196(macro, data) MREPEAT195(macro, data) macro(195, data)\r
+#define MREPEAT197(macro, data) MREPEAT196(macro, data) macro(196, data)\r
+#define MREPEAT198(macro, data) MREPEAT197(macro, data) macro(197, data)\r
+#define MREPEAT199(macro, data) MREPEAT198(macro, data) macro(198, data)\r
+#define MREPEAT200(macro, data) MREPEAT199(macro, data) macro(199, data)\r
+#define MREPEAT201(macro, data) MREPEAT200(macro, data) macro(200, data)\r
+#define MREPEAT202(macro, data) MREPEAT201(macro, data) macro(201, data)\r
+#define MREPEAT203(macro, data) MREPEAT202(macro, data) macro(202, data)\r
+#define MREPEAT204(macro, data) MREPEAT203(macro, data) macro(203, data)\r
+#define MREPEAT205(macro, data) MREPEAT204(macro, data) macro(204, data)\r
+#define MREPEAT206(macro, data) MREPEAT205(macro, data) macro(205, data)\r
+#define MREPEAT207(macro, data) MREPEAT206(macro, data) macro(206, data)\r
+#define MREPEAT208(macro, data) MREPEAT207(macro, data) macro(207, data)\r
+#define MREPEAT209(macro, data) MREPEAT208(macro, data) macro(208, data)\r
+#define MREPEAT210(macro, data) MREPEAT209(macro, data) macro(209, data)\r
+#define MREPEAT211(macro, data) MREPEAT210(macro, data) macro(210, data)\r
+#define MREPEAT212(macro, data) MREPEAT211(macro, data) macro(211, data)\r
+#define MREPEAT213(macro, data) MREPEAT212(macro, data) macro(212, data)\r
+#define MREPEAT214(macro, data) MREPEAT213(macro, data) macro(213, data)\r
+#define MREPEAT215(macro, data) MREPEAT214(macro, data) macro(214, data)\r
+#define MREPEAT216(macro, data) MREPEAT215(macro, data) macro(215, data)\r
+#define MREPEAT217(macro, data) MREPEAT216(macro, data) macro(216, data)\r
+#define MREPEAT218(macro, data) MREPEAT217(macro, data) macro(217, data)\r
+#define MREPEAT219(macro, data) MREPEAT218(macro, data) macro(218, data)\r
+#define MREPEAT220(macro, data) MREPEAT219(macro, data) macro(219, data)\r
+#define MREPEAT221(macro, data) MREPEAT220(macro, data) macro(220, data)\r
+#define MREPEAT222(macro, data) MREPEAT221(macro, data) macro(221, data)\r
+#define MREPEAT223(macro, data) MREPEAT222(macro, data) macro(222, data)\r
+#define MREPEAT224(macro, data) MREPEAT223(macro, data) macro(223, data)\r
+#define MREPEAT225(macro, data) MREPEAT224(macro, data) macro(224, data)\r
+#define MREPEAT226(macro, data) MREPEAT225(macro, data) macro(225, data)\r
+#define MREPEAT227(macro, data) MREPEAT226(macro, data) macro(226, data)\r
+#define MREPEAT228(macro, data) MREPEAT227(macro, data) macro(227, data)\r
+#define MREPEAT229(macro, data) MREPEAT228(macro, data) macro(228, data)\r
+#define MREPEAT230(macro, data) MREPEAT229(macro, data) macro(229, data)\r
+#define MREPEAT231(macro, data) MREPEAT230(macro, data) macro(230, data)\r
+#define MREPEAT232(macro, data) MREPEAT231(macro, data) macro(231, data)\r
+#define MREPEAT233(macro, data) MREPEAT232(macro, data) macro(232, data)\r
+#define MREPEAT234(macro, data) MREPEAT233(macro, data) macro(233, data)\r
+#define MREPEAT235(macro, data) MREPEAT234(macro, data) macro(234, data)\r
+#define MREPEAT236(macro, data) MREPEAT235(macro, data) macro(235, data)\r
+#define MREPEAT237(macro, data) MREPEAT236(macro, data) macro(236, data)\r
+#define MREPEAT238(macro, data) MREPEAT237(macro, data) macro(237, data)\r
+#define MREPEAT239(macro, data) MREPEAT238(macro, data) macro(238, data)\r
+#define MREPEAT240(macro, data) MREPEAT239(macro, data) macro(239, data)\r
+#define MREPEAT241(macro, data) MREPEAT240(macro, data) macro(240, data)\r
+#define MREPEAT242(macro, data) MREPEAT241(macro, data) macro(241, data)\r
+#define MREPEAT243(macro, data) MREPEAT242(macro, data) macro(242, data)\r
+#define MREPEAT244(macro, data) MREPEAT243(macro, data) macro(243, data)\r
+#define MREPEAT245(macro, data) MREPEAT244(macro, data) macro(244, data)\r
+#define MREPEAT246(macro, data) MREPEAT245(macro, data) macro(245, data)\r
+#define MREPEAT247(macro, data) MREPEAT246(macro, data) macro(246, data)\r
+#define MREPEAT248(macro, data) MREPEAT247(macro, data) macro(247, data)\r
+#define MREPEAT249(macro, data) MREPEAT248(macro, data) macro(248, data)\r
+#define MREPEAT250(macro, data) MREPEAT249(macro, data) macro(249, data)\r
+#define MREPEAT251(macro, data) MREPEAT250(macro, data) macro(250, data)\r
+#define MREPEAT252(macro, data) MREPEAT251(macro, data) macro(251, data)\r
+#define MREPEAT253(macro, data) MREPEAT252(macro, data) macro(252, data)\r
+#define MREPEAT254(macro, data) MREPEAT253(macro, data) macro(253, data)\r
+#define MREPEAT255(macro, data) MREPEAT254(macro, data) macro(254, data)\r
+#define MREPEAT256(macro, data) MREPEAT255(macro, data) macro(255, data)\r
+\r
+\r
+#endif // _MREPEAT_H_\r
--- /dev/null
+/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */\r
+\r
+/*This file is prepared for Doxygen automatic documentation generation.*/\r
+/*! \file *********************************************************************\r
+ *\r
+ * \brief Preprocessor utils.\r
+ *\r
+ * - Compiler: IAR EWAVR32 and GNU GCC for AVR32\r
+ * - Supported devices: All AVR32 devices can be used.\r
+ *\r
+ * \author Atmel Corporation: http://www.atmel.com \n\r
+ * Support email: avr32@atmel.com\r
+ *\r
+ ******************************************************************************/\r
+\r
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the following disclaimer.\r
+ *\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ * this list of conditions and the following disclaimer in the documentation\r
+ * and/or other materials provided with the distribution.\r
+ *\r
+ * 3. The name of ATMEL may not be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND\r
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,\r
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\r
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\r
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND\r
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF\r
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ */\r
+\r
+\r
+#ifndef _PREPROCESSOR_H_\r
+#define _PREPROCESSOR_H_\r
+\r
+#include "tpaste.h"\r
+#include "stringz.h"\r
+#include "mrepeat.h"\r
+\r
+\r
+#endif // _PREPROCESSOR_H_\r
--- /dev/null
+/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */\r
+\r
+/*This file is prepared for Doxygen automatic documentation generation.*/\r
+/*! \file *********************************************************************\r
+ *\r
+ * \brief Preprocessor stringizing utils.\r
+ *\r
+ * - Compiler: IAR EWAVR32 and GNU GCC for AVR32\r
+ * - Supported devices: All AVR32 devices can be used.\r
+ *\r
+ * \author Atmel Corporation: http://www.atmel.com \n\r
+ * Support email: avr32@atmel.com\r
+ *\r
+ ******************************************************************************/\r
+\r
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the following disclaimer.\r
+ *\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ * this list of conditions and the following disclaimer in the documentation\r
+ * and/or other materials provided with the distribution.\r
+ *\r
+ * 3. The name of ATMEL may not be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND\r
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,\r
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\r
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\r
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND\r
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF\r
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ */\r
+\r
+\r
+#ifndef _STRINGZ_H_\r
+#define _STRINGZ_H_\r
+\r
+\r
+/*! \brief Stringize.\r
+ *\r
+ * Stringize a preprocessing token, this token being allowed to be #defined.\r
+ *\r
+ * May be used only within macros with the token passed as an argument if the token is #defined.\r
+ *\r
+ * For example, writing STRINGZ(PIN) within a macro #defined by PIN_NAME(PIN)\r
+ * and invoked as PIN_NAME(PIN0) with PIN0 #defined as A0 is equivalent to\r
+ * writing "A0".\r
+ */\r
+#define STRINGZ(x) #x\r
+\r
+/*! \brief Absolute stringize.\r
+ *\r
+ * Stringize a preprocessing token, this token being allowed to be #defined.\r
+ *\r
+ * No restriction of use if the token is #defined.\r
+ *\r
+ * For example, writing ASTRINGZ(PIN0) anywhere with PIN0 #defined as A0 is\r
+ * equivalent to writing "A0".\r
+ */\r
+#define ASTRINGZ(x) STRINGZ(x)\r
+\r
+\r
+#endif // _STRINGZ_H_\r
--- /dev/null
+/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */\r
+\r
+/*This file is prepared for Doxygen automatic documentation generation.*/\r
+/*! \file *********************************************************************\r
+ *\r
+ * \brief Preprocessor token pasting utils.\r
+ *\r
+ * - Compiler: IAR EWAVR32 and GNU GCC for AVR32\r
+ * - Supported devices: All AVR32 devices can be used.\r
+ *\r
+ * \author Atmel Corporation: http://www.atmel.com \n\r
+ * Support email: avr32@atmel.com\r
+ *\r
+ ******************************************************************************/\r
+\r
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the following disclaimer.\r
+ *\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ * this list of conditions and the following disclaimer in the documentation\r
+ * and/or other materials provided with the distribution.\r
+ *\r
+ * 3. The name of ATMEL may not be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND\r
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,\r
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\r
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\r
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND\r
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF\r
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ */\r
+\r
+\r
+#ifndef _TPASTE_H_\r
+#define _TPASTE_H_\r
+\r
+\r
+/*! \name Token Paste\r
+ *\r
+ * Paste N preprocessing tokens together, these tokens being allowed to be #defined.\r
+ *\r
+ * May be used only within macros with the tokens passed as arguments if the tokens are #defined.\r
+ *\r
+ * For example, writing TPASTE2(U, WIDTH) within a macro #defined by\r
+ * UTYPE(WIDTH) and invoked as UTYPE(UL_WIDTH) with UL_WIDTH #defined as 32 is\r
+ * equivalent to writing U32.\r
+ */\r
+//! @{\r
+#define TPASTE2( a, b) a##b\r
+#define TPASTE3( a, b, c) a##b##c\r
+#define TPASTE4( a, b, c, d) a##b##c##d\r
+#define TPASTE5( a, b, c, d, e) a##b##c##d##e\r
+#define TPASTE6( a, b, c, d, e, f) a##b##c##d##e##f\r
+#define TPASTE7( a, b, c, d, e, f, g) a##b##c##d##e##f##g\r
+#define TPASTE8( a, b, c, d, e, f, g, h) a##b##c##d##e##f##g##h\r
+#define TPASTE9( a, b, c, d, e, f, g, h, i) a##b##c##d##e##f##g##h##i\r
+#define TPASTE10(a, b, c, d, e, f, g, h, i, j) a##b##c##d##e##f##g##h##i##j\r
+//! @}\r
+\r
+/*! \name Absolute Token Paste\r
+ *\r
+ * Paste N preprocessing tokens together, these tokens being allowed to be #defined.\r
+ *\r
+ * No restriction of use if the tokens are #defined.\r
+ *\r
+ * For example, writing ATPASTE2(U, UL_WIDTH) anywhere with UL_WIDTH #defined\r
+ * as 32 is equivalent to writing U32.\r
+ */\r
+//! @{\r
+#define ATPASTE2( a, b) TPASTE2( a, b)\r
+#define ATPASTE3( a, b, c) TPASTE3( a, b, c)\r
+#define ATPASTE4( a, b, c, d) TPASTE4( a, b, c, d)\r
+#define ATPASTE5( a, b, c, d, e) TPASTE5( a, b, c, d, e)\r
+#define ATPASTE6( a, b, c, d, e, f) TPASTE6( a, b, c, d, e, f)\r
+#define ATPASTE7( a, b, c, d, e, f, g) TPASTE7( a, b, c, d, e, f, g)\r
+#define ATPASTE8( a, b, c, d, e, f, g, h) TPASTE8( a, b, c, d, e, f, g, h)\r
+#define ATPASTE9( a, b, c, d, e, f, g, h, i) TPASTE9( a, b, c, d, e, f, g, h, i)\r
+#define ATPASTE10(a, b, c, d, e, f, g, h, i, j) TPASTE10(a, b, c, d, e, f, g, h, i, j)\r
+//! @}\r
+\r
+\r
+#endif // _TPASTE_H_\r
--- /dev/null
+/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */\r
+\r
+/*This file is prepared for Doxygen automatic documentation generation.*/\r
+/*! \file *********************************************************************\r
+ *\r
+ * \brief Compiler file for AVR32.\r
+ *\r
+ * This file defines commonly used types and macros.\r
+ *\r
+ * - Compiler: IAR EWAVR32 and GNU GCC for AVR32\r
+ * - Supported devices: All AVR32 devices can be used.\r
+ * - AppNote:\r
+ *\r
+ * \author Atmel Corporation: http://www.atmel.com \n\r
+ * Support email: avr32@atmel.com\r
+ *\r
+ ******************************************************************************/\r
+\r
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the following disclaimer.\r
+ *\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ * this list of conditions and the following disclaimer in the documentation\r
+ * and/or other materials provided with the distribution.\r
+ *\r
+ * 3. The name of ATMEL may not be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND\r
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,\r
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\r
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\r
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND\r
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF\r
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ */\r
+\r
+\r
+#ifndef _COMPILER_H_\r
+#define _COMPILER_H_\r
+\r
+#if __GNUC__\r
+# include <avr32/io.h>\r
+#elif __ICCAVR32__ || __AAVR32__\r
+# include <avr32/iouc3a0512.h>\r
+# include <avr32/uc3a0512.h>\r
+# if __ICCAVR32__\r
+# include <intrinsics.h>\r
+# endif\r
+#else\r
+# error Unknown compiler\r
+#endif\r
+\r
+#include "preprocessor.h"\r
+\r
+\r
+//_____ D E C L A R A T I O N S ____________________________________________\r
+\r
+#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling.\r
+\r
+#include <stddef.h>\r
+#include <stdlib.h>\r
+\r
+/*! \name Usual Types\r
+ */\r
+//! @{\r
+typedef unsigned char Bool; //!< Boolean.\r
+typedef unsigned char U8 ; //!< 8-bit unsigned integer.\r
+typedef unsigned short int U16; //!< 16-bit unsigned integer.\r
+typedef unsigned long int U32; //!< 32-bit unsigned integer.\r
+typedef unsigned long long int U64; //!< 64-bit unsigned integer.\r
+typedef signed char S8 ; //!< 8-bit signed integer.\r
+typedef signed short int S16; //!< 16-bit signed integer.\r
+typedef signed long int S32; //!< 32-bit signed integer.\r
+typedef signed long long int S64; //!< 64-bit signed integer.\r
+typedef float F32; //!< 32-bit floating-point number.\r
+typedef double F64; //!< 64-bit floating-point number.\r
+//! @}\r
+\r
+/*! \name Status Types\r
+ */\r
+//! @{\r
+typedef Bool Status_bool_t; //!< Boolean status.\r
+typedef U8 Status_t; //!< 8-bit-coded status.\r
+//! @}\r
+\r
+#if __ICCAVR32__\r
+\r
+/*! \name Compiler Keywords\r
+ *\r
+ * Translation of some keywords from GNU GCC for AVR32 to IAR Embedded Workbench for Atmel AVR32.\r
+ */\r
+//! @{\r
+#define __asm__ asm\r
+#define __inline__ inline\r
+#define __volatile__\r
+//! @}\r
+\r
+#endif\r
+\r
+/*! \name Aliasing Aggregate Types\r
+ */\r
+//! @{\r
+\r
+//! 16-bit union.\r
+typedef union\r
+{\r
+ U16 u16 ;\r
+ U8 u8 [2];\r
+} Union16;\r
+\r
+//! 32-bit union.\r
+typedef union\r
+{\r
+ U32 u32 ;\r
+ U16 u16[2];\r
+ U8 u8 [4];\r
+} Union32;\r
+\r
+//! 64-bit union.\r
+typedef union\r
+{\r
+ U64 u64 ;\r
+ U32 u32[2];\r
+ U16 u16[4];\r
+ U8 u8 [8];\r
+} Union64;\r
+\r
+//! Union of pointers to 64-, 32-, 16- and 8-bit unsigned integers.\r
+typedef union\r
+{\r
+ U64 *u64ptr;\r
+ U32 *u32ptr;\r
+ U16 *u16ptr;\r
+ U8 *u8ptr ;\r
+} UnionPtr;\r
+\r
+//! Union of pointers to volatile 64-, 32-, 16- and 8-bit unsigned integers.\r
+typedef union\r
+{\r
+ volatile U64 *u64ptr;\r
+ volatile U32 *u32ptr;\r
+ volatile U16 *u16ptr;\r
+ volatile U8 *u8ptr ;\r
+} UnionVPtr;\r
+\r
+//! Union of pointers to constant 64-, 32-, 16- and 8-bit unsigned integers.\r
+typedef union\r
+{\r
+ const U64 *u64ptr;\r
+ const U32 *u32ptr;\r
+ const U16 *u16ptr;\r
+ const U8 *u8ptr ;\r
+} UnionCPtr;\r
+\r
+//! Union of pointers to constant volatile 64-, 32-, 16- and 8-bit unsigned integers.\r
+typedef union\r
+{\r
+ const volatile U64 *u64ptr;\r
+ const volatile U32 *u32ptr;\r
+ const volatile U16 *u16ptr;\r
+ const volatile U8 *u8ptr ;\r
+} UnionCVPtr;\r
+\r
+//! Structure of pointers to 64-, 32-, 16- and 8-bit unsigned integers.\r
+typedef struct\r
+{\r
+ U64 *u64ptr;\r
+ U32 *u32ptr;\r
+ U16 *u16ptr;\r
+ U8 *u8ptr ;\r
+} StructPtr;\r
+\r
+//! Structure of pointers to volatile 64-, 32-, 16- and 8-bit unsigned integers.\r
+typedef struct\r
+{\r
+ volatile U64 *u64ptr;\r
+ volatile U32 *u32ptr;\r
+ volatile U16 *u16ptr;\r
+ volatile U8 *u8ptr ;\r
+} StructVPtr;\r
+\r
+//! Structure of pointers to constant 64-, 32-, 16- and 8-bit unsigned integers.\r
+typedef struct\r
+{\r
+ const U64 *u64ptr;\r
+ const U32 *u32ptr;\r
+ const U16 *u16ptr;\r
+ const U8 *u8ptr ;\r
+} StructCPtr;\r
+\r
+//! Structure of pointers to constant volatile 64-, 32-, 16- and 8-bit unsigned integers.\r
+typedef struct\r
+{\r
+ const volatile U64 *u64ptr;\r
+ const volatile U32 *u32ptr;\r
+ const volatile U16 *u16ptr;\r
+ const volatile U8 *u8ptr ;\r
+} StructCVPtr;\r
+\r
+//! @}\r
+\r
+#endif // __AVR32_ABI_COMPILER__\r
+\r
+//_____ M A C R O S ________________________________________________________\r
+\r
+/*! \name Usual Constants\r
+ */\r
+//! @{\r
+#define DISABLE 0\r
+#define ENABLE 1\r
+#define DISABLED 0\r
+#define ENABLED 1\r
+#define OFF 0\r
+#define ON 1\r
+#define FALSE 0\r
+#define TRUE 1\r
+#define KO 0\r
+#define OK 1\r
+#define PASS 0\r
+#define FAIL 1\r
+#define LOW 0\r
+#define HIGH 1\r
+#define CLR 0\r
+#define SET 1\r
+//! @}\r
+\r
+#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling.\r
+\r
+/*! \name Bit-Field Handling Macros\r
+ */\r
+//! @{\r
+\r
+/*! \brief Reads the bits of a value specified by a given bit-mask.\r
+ *\r
+ * \param value Value to read bits from.\r
+ * \param mask Bit-mask indicating bits to read.\r
+ *\r
+ * \return Read bits.\r
+ */\r
+#define Rd_bits( value, mask) ((value) & (mask))\r
+\r
+/*! \brief Writes the bits of a C lvalue specified by a given bit-mask.\r
+ *\r
+ * \param lvalue C lvalue to write bits to.\r
+ * \param mask Bit-mask indicating bits to write.\r
+ * \param bits Bits to write.\r
+ *\r
+ * \return Resulting value with written bits.\r
+ */\r
+#define Wr_bits(lvalue, mask, bits) ((lvalue) = ((lvalue) & ~(mask)) |\\r
+ ((bits ) & (mask)))\r
+\r
+/*! \brief Tests the bits of a value specified by a given bit-mask.\r
+ *\r
+ * \param value Value of which to test bits.\r
+ * \param mask Bit-mask indicating bits to test.\r
+ *\r
+ * \return \c 1 if at least one of the tested bits is set, else \c 0.\r
+ */\r
+#define Tst_bits( value, mask) (Rd_bits(value, mask) != 0)\r
+\r
+/*! \brief Clears the bits of a C lvalue specified by a given bit-mask.\r
+ *\r
+ * \param lvalue C lvalue of which to clear bits.\r
+ * \param mask Bit-mask indicating bits to clear.\r
+ *\r
+ * \return Resulting value with cleared bits.\r
+ */\r
+#define Clr_bits(lvalue, mask) ((lvalue) &= ~(mask))\r
+\r
+/*! \brief Sets the bits of a C lvalue specified by a given bit-mask.\r
+ *\r
+ * \param lvalue C lvalue of which to set bits.\r
+ * \param mask Bit-mask indicating bits to set.\r
+ *\r
+ * \return Resulting value with set bits.\r
+ */\r
+#define Set_bits(lvalue, mask) ((lvalue) |= (mask))\r
+\r
+/*! \brief Toggles the bits of a C lvalue specified by a given bit-mask.\r
+ *\r
+ * \param lvalue C lvalue of which to toggle bits.\r
+ * \param mask Bit-mask indicating bits to toggle.\r
+ *\r
+ * \return Resulting value with toggled bits.\r
+ */\r
+#define Tgl_bits(lvalue, mask) ((lvalue) ^= (mask))\r
+\r
+/*! \brief Reads the bit-field of a value specified by a given bit-mask.\r
+ *\r
+ * \param value Value to read a bit-field from.\r
+ * \param mask Bit-mask indicating the bit-field to read.\r
+ *\r
+ * \return Read bit-field.\r
+ */\r
+#define Rd_bitfield( value, mask) (Rd_bits( value, mask) >> ctz(mask))\r
+\r
+/*! \brief Writes the bit-field of a C lvalue specified by a given bit-mask.\r
+ *\r
+ * \param lvalue C lvalue to write a bit-field to.\r
+ * \param mask Bit-mask indicating the bit-field to write.\r
+ * \param bitfield Bit-field to write.\r
+ *\r
+ * \return Resulting value with written bit-field.\r
+ */\r
+#define Wr_bitfield(lvalue, mask, bitfield) (Wr_bits(lvalue, mask, (U32)(bitfield) << ctz(mask)))\r
+\r
+//! @}\r
+\r
+/*! \brief This macro is used to test fatal errors.\r
+ *\r
+ * The macro tests if the expression is FALSE. If it is, a fatal error is\r
+ * detected and the application hangs up.\r
+ *\r
+ * \param expr Expression to evaluate and supposed to be nonzero.\r
+ */\r
+#ifdef _ASSERT_ENABLE_\r
+ #define Assert(expr) \\r
+ {\\r
+ if (!(expr)) while (TRUE);\\r
+ }\r
+#else\r
+ #define Assert(expr)\r
+#endif\r
+\r
+/*! \name Zero-Bit Counting Macros\r
+ *\r
+ * Under AVR32-GCC, __builtin_clz and __builtin_ctz behave like macros when\r
+ * applied to constant expressions (values known at compile time), so they are\r
+ * more optimized than the use of the corresponding assembly instructions and\r
+ * they can be used as constant expressions e.g. to initialize objects having\r
+ * static storage duration, and like the corresponding assembly instructions\r
+ * when applied to non-constant expressions (values unknown at compile time), so\r
+ * they are more optimized than an assembly periphrasis. Hence, clz and ctz\r
+ * ensure a possible and optimized behavior for both constant and non-constant\r
+ * expressions.\r
+ */\r
+//! @{\r
+\r
+/*! \brief Counts the leading zero bits of the given value considered as a 32-bit integer.\r
+ *\r
+ * \param u Value of which to count the leading zero bits.\r
+ *\r
+ * \return The count of leading zero bits in \a u.\r
+ */\r
+#if __GNUC__\r
+ #define clz(u) __builtin_clz(u)\r
+#elif __ICCAVR32__\r
+ #define clz(u) __count_leading_zeros(u)\r
+#endif\r
+\r
+/*! \brief Counts the trailing zero bits of the given value considered as a 32-bit integer.\r
+ *\r
+ * \param u Value of which to count the trailing zero bits.\r
+ *\r
+ * \return The count of trailing zero bits in \a u.\r
+ */\r
+#if __GNUC__\r
+ #define ctz(u) __builtin_ctz(u)\r
+#elif __ICCAVR32__\r
+ #define ctz(u) __count_trailing_zeros(u)\r
+#endif\r
+\r
+//! @}\r
+\r
+/*! \name Alignment Macros\r
+ */\r
+//! @{\r
+\r
+/*! \brief Tests alignment of the number \a val with the \a n boundary.\r
+ *\r
+ * \param val Input value.\r
+ * \param n Boundary.\r
+ *\r
+ * \return \c 1 if the number \a val is aligned with the \a n boundary, else \c 0.\r
+ */\r
+#define Test_align(val, n ) (!Tst_bits( val, (n) - 1 ) )\r
+\r
+/*! \brief Gets alignment of the number \a val with respect to the \a n boundary.\r
+ *\r
+ * \param val Input value.\r
+ * \param n Boundary.\r
+ *\r
+ * \return Alignment of the number \a val with respect to the \a n boundary.\r
+ */\r
+#define Get_align( val, n ) ( Rd_bits( val, (n) - 1 ) )\r
+\r
+/*! \brief Sets alignment of the lvalue number \a lval to \a alg with respect to the \a n boundary.\r
+ *\r
+ * \param lval Input/output lvalue.\r
+ * \param n Boundary.\r
+ * \param alg Alignment.\r
+ *\r
+ * \return New value of \a lval resulting from its alignment set to \a alg with respect to the \a n boundary.\r
+ */\r
+#define Set_align(lval, n, alg) ( Wr_bits(lval, (n) - 1, alg) )\r
+\r
+/*! \brief Aligns the number \a val with the upper \a n boundary.\r
+ *\r
+ * \param val Input value.\r
+ * \param n Boundary.\r
+ *\r
+ * \return Value resulting from the number \a val aligned with the upper \a n boundary.\r
+ */\r
+#define Align_up( val, n ) (((val) + ((n) - 1)) & ~((n) - 1))\r
+\r
+/*! \brief Aligns the number \a val with the lower \a n boundary.\r
+ *\r
+ * \param val Input value.\r
+ * \param n Boundary.\r
+ *\r
+ * \return Value resulting from the number \a val aligned with the lower \a n boundary.\r
+ */\r
+#define Align_down(val, n ) ( (val) & ~((n) - 1))\r
+\r
+//! @}\r
+\r
+/*! \name Mathematics Macros\r
+ *\r
+ * The same considerations as for clz and ctz apply here but AVR32-GCC does not\r
+ * provide built-in functions to access the assembly instructions abs, min and\r
+ * max and it does not produce them by itself in most cases, so two sets of\r
+ * macros are defined here:\r
+ * - Abs, Min and Max to apply to constant expressions (values known at\r
+ * compile time);\r
+ * - abs, min and max to apply to non-constant expressions (values unknown at\r
+ * compile time).\r
+ */\r
+//! @{\r
+\r
+/*! \brief Takes the absolute value of \a a.\r
+ *\r
+ * \param a Input value.\r
+ *\r
+ * \return Absolute value of \a a.\r
+ *\r
+ * \note More optimized if only used with values known at compile time.\r
+ */\r
+#define Abs(a) (((a) < 0 ) ? -(a) : (a))\r
+\r
+/*! \brief Takes the minimal value of \a a and \a b.\r
+ *\r
+ * \param a Input value.\r
+ * \param b Input value.\r
+ *\r
+ * \return Minimal value of \a a and \a b.\r
+ *\r
+ * \note More optimized if only used with values known at compile time.\r
+ */\r
+#define Min(a, b) (((a) < (b)) ? (a) : (b))\r
+\r
+/*! \brief Takes the maximal value of \a a and \a b.\r
+ *\r
+ * \param a Input value.\r
+ * \param b Input value.\r
+ *\r
+ * \return Maximal value of \a a and \a b.\r
+ *\r
+ * \note More optimized if only used with values known at compile time.\r
+ */\r
+#define Max(a, b) (((a) > (b)) ? (a) : (b))\r
+\r
+/*! \brief Takes the absolute value of \a a.\r
+ *\r
+ * \param a Input value.\r
+ *\r
+ * \return Absolute value of \a a.\r
+ *\r
+ * \note More optimized if only used with values unknown at compile time.\r
+ */\r
+#if __GNUC__\r
+ #define abs(a) \\r
+ (\\r
+ {\\r
+ int __value = (a);\\r
+ __asm__ ("abs\t%0" : "+r" (__value) : : "cc");\\r
+ __value;\\r
+ }\\r
+ )\r
+#elif __ICCAVR32__\r
+ #define abs(a) Abs(a)\r
+#endif\r
+\r
+/*! \brief Takes the minimal value of \a a and \a b.\r
+ *\r
+ * \param a Input value.\r
+ * \param b Input value.\r
+ *\r
+ * \return Minimal value of \a a and \a b.\r
+ *\r
+ * \note More optimized if only used with values unknown at compile time.\r
+ */\r
+#if __GNUC__\r
+ #define min(a, b) \\r
+ (\\r
+ {\\r
+ int __value, __arg_a = (a), __arg_b = (b);\\r
+ __asm__ ("min\t%0, %1, %2" : "=r" (__value) : "r" (__arg_a), "r" (__arg_b));\\r
+ __value;\\r
+ }\\r
+ )\r
+#elif __ICCAVR32__\r
+ #define min(a, b) Min(a, b)\r
+#endif\r
+\r
+/*! \brief Takes the maximal value of \a a and \a b.\r
+ *\r
+ * \param a Input value.\r
+ * \param b Input value.\r
+ *\r
+ * \return Maximal value of \a a and \a b.\r
+ *\r
+ * \note More optimized if only used with values unknown at compile time.\r
+ */\r
+#if __GNUC__\r
+ #define max(a, b) \\r
+ (\\r
+ {\\r
+ int __value, __arg_a = (a), __arg_b = (b);\\r
+ __asm__ ("max\t%0, %1, %2" : "=r" (__value) : "r" (__arg_a), "r" (__arg_b));\\r
+ __value;\\r
+ }\\r
+ )\r
+#elif __ICCAVR32__\r
+ #define max(a, b) Max(a, b)\r
+#endif\r
+\r
+//! @}\r
+\r
+/*! \brief Calls the routine at address \a addr.\r
+ *\r
+ * It generates a long call opcode.\r
+ *\r
+ * For example, `Long_call(0x80000000)' generates a software reset on a UC3 if\r
+ * it is invoked from the CPU supervisor mode.\r
+ *\r
+ * \param addr Address of the routine to call.\r
+ *\r
+ * \note It may be used as a long jump opcode in some special cases.\r
+ */\r
+#define Long_call(addr) ((*(void (*)(void))(addr))())\r
+\r
+/*! \brief Resets the CPU by software.\r
+ *\r
+ * \warning It shall not be called from the CPU application mode.\r
+ */\r
+#if __GNUC__\r
+ #define Reset_CPU() \\r
+ (\\r
+ {\\r
+ __asm__ __volatile__ (\\r
+ "lda.w r8, _start\n\t"\\r
+ "lddpc r9, 1f\n\t"\\r
+ "stm --sp, r8-r9\n\t"\\r
+ "mfsr r8, %[SR]\n\t"\\r
+ "bfextu r8, r8, %[SR_MX_OFFSET], %[SR_MX_SIZE]\n\t"\\r
+ "cp.w r8, 0b001\n\t"\\r
+ "breq 0f\n\t"\\r
+ "rete\n"\\r
+ "0:\n\t"\\r
+ "rets\n\t"\\r
+ ".balign 4\n"\\r
+ "1:\n\t"\\r
+ ".word %[RESET_SR]"\\r
+ :\\r
+ : [SR] "i" (AVR32_SR),\\r
+ [SR_MX_OFFSET] "i" (AVR32_SR_M0_OFFSET),\\r
+ [SR_MX_SIZE] "i" (AVR32_SR_M0_SIZE + AVR32_SR_M1_SIZE + AVR32_SR_M2_SIZE),\\r
+ [RESET_SR] "i" (AVR32_SR_GM_MASK | AVR32_SR_EM_MASK | AVR32_SR_M0_MASK)\\r
+ );\\r
+ }\\r
+ )\r
+#elif __ICCAVR32__\r
+ #define Reset_CPU() \\r
+ {\\r
+ extern void *volatile __program_start;\\r
+ __asm__ __volatile__ (\\r
+ "mov r8, LWRD(__program_start)\n\t"\\r
+ "orh r8, HWRD(__program_start)\n\t"\\r
+ "mov r9, LWRD("ASTRINGZ(AVR32_SR_GM_MASK | AVR32_SR_EM_MASK | AVR32_SR_M0_MASK)")\n\t"\\r
+ "orh r9, HWRD("ASTRINGZ(AVR32_SR_GM_MASK | AVR32_SR_EM_MASK | AVR32_SR_M0_MASK)")\n\t"\\r
+ "stm --sp, r8-r9\n\t"\\r
+ "mfsr r8, "ASTRINGZ(AVR32_SR)"\n\t"\\r
+ "bfextu r8, r8, "ASTRINGZ(AVR32_SR_M0_OFFSET)", "ASTRINGZ(AVR32_SR_M0_SIZE + AVR32_SR_M1_SIZE + AVR32_SR_M2_SIZE)"\n\t"\\r
+ "cp.w r8, 001b\n\t"\\r
+ "breq $ + 4\n\t"\\r
+ "rete\n\t"\\r
+ "rets"\\r
+ );\\r
+ __program_start;\\r
+}\r
+#endif\r
+\r
+/*! \name CPU Status Register Macros\r
+ */\r
+//! @{\r
+\r
+/*! \brief Disables all exceptions.\r
+ */\r
+#if __GNUC__\r
+ #define Disable_global_exception() ({__asm__ __volatile__ ("ssrf\t%0" : : "i" (AVR32_SR_EM_OFFSET));})\r
+#elif __ICCAVR32__\r
+ #define Disable_global_exception() (__set_status_flag(AVR32_SR_EM_OFFSET))\r
+#endif\r
+\r
+/*! \brief Enables all exceptions.\r
+ */\r
+#if __GNUC__\r
+ #define Enable_global_exception() ({__asm__ __volatile__ ("csrf\t%0" : : "i" (AVR32_SR_EM_OFFSET));})\r
+#elif __ICCAVR32__\r
+ #define Enable_global_exception() (__clear_status_flag(AVR32_SR_EM_OFFSET))\r
+#endif\r
+\r
+/*! \brief Disables all interrupts.\r
+ */\r
+#if __GNUC__\r
+ #define Disable_global_interrupt() ({__asm__ __volatile__ ("ssrf\t%0\n\tnop\n\tnop" : : "i" (AVR32_SR_GM_OFFSET));})\r
+#elif __ICCAVR32__\r
+ #define Disable_global_interrupt() {__asm__ __volatile__ ("ssrf\t"ASTRINGZ(AVR32_SR_GM_OFFSET)"\n\tnop\n\tnop");}\r
+#endif\r
+\r
+/*! \brief Enables all interrupts.\r
+ */\r
+#if __GNUC__\r
+ #define Enable_global_interrupt() ({__asm__ __volatile__ ("csrf\t%0" : : "i" (AVR32_SR_GM_OFFSET));})\r
+#elif __ICCAVR32__\r
+ #define Enable_global_interrupt() (__enable_interrupt())\r
+#endif\r
+\r
+/*! \brief Disables interrupt level \a int_lev.\r
+ *\r
+ * \param int_lev Interrupt level to disable (0 to 3).\r
+ */\r
+#if __GNUC__\r
+ #define Disable_interrupt_level(int_lev) ({__asm__ __volatile__ ("ssrf\t%0\n\tnop\n\tnop" : : "i" (TPASTE3(AVR32_SR_I, int_lev, M_OFFSET)));})\r
+#elif __ICCAVR32__\r
+ #define Disable_interrupt_level(int_lev) {__asm__ __volatile__ ("ssrf\t"ASTRINGZ(TPASTE3(AVR32_SR_I, int_lev, M_OFFSET))"\n\tnop\n\tnop");}\r
+#endif\r
+\r
+/*! \brief Enables interrupt level \a int_lev.\r
+ *\r
+ * \param int_lev Interrupt level to enable (0 to 3).\r
+ */\r
+#if __GNUC__\r
+ #define Enable_interrupt_level(int_lev) ({__asm__ __volatile__ ("csrf\t%0" : : "i" (TPASTE3(AVR32_SR_I, int_lev, M_OFFSET)));})\r
+#elif __ICCAVR32__\r
+ #define Enable_interrupt_level(int_lev) (__clear_status_flag(TPASTE3(AVR32_SR_I, int_lev, M_OFFSET)))\r
+#endif\r
+\r
+//! @}\r
+\r
+/*! \name System Register Access Macros\r
+ */\r
+//! @{\r
+\r
+/*! \brief Gets the value of the \a sysreg system register.\r
+ *\r
+ * \param sysreg Address of the system register of which to get the value.\r
+ *\r
+ * \return Value of the \a sysreg system register.\r
+ */\r
+#if __GNUC__\r
+ #define Get_system_register(sysreg) __builtin_mfsr(sysreg)\r
+#elif __ICCAVR32__\r
+ #define Get_system_register(sysreg) __get_system_register(sysreg)\r
+#endif\r
+\r
+/*! \brief Sets the value of the \a sysreg system register to \a value.\r
+ *\r
+ * \param sysreg Address of the system register of which to set the value.\r
+ * \param value Value to set the \a sysreg system register to.\r
+ */\r
+#if __GNUC__\r
+ #define Set_system_register(sysreg, value) __builtin_mtsr(sysreg, value)\r
+#elif __ICCAVR32__\r
+ #define Set_system_register(sysreg, value) __set_system_register(sysreg, value)\r
+#endif\r
+\r
+//! @}\r
+\r
+#endif // __AVR32_ABI_COMPILER__\r
+\r
+//! Boolean evaluating MCU little endianism.\r
+#if (__GNUC__ && __AVR32__) || (__ICCAVR32__ || __AAVR32__)\r
+ #define LITTLE_ENDIAN_MCU FALSE\r
+#endif\r
+\r
+// Check that MCU endianism is correctly defined.\r
+#ifndef LITTLE_ENDIAN_MCU\r
+ #error YOU MUST define the MCU endianism with LITTLE_ENDIAN_MCU: either FALSE or TRUE\r
+#endif\r
+\r
+//! Boolean evaluating MCU big endianism.\r
+#define BIG_ENDIAN_MCU (!LITTLE_ENDIAN_MCU)\r
+\r
+#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling.\r
+\r
+/*! \name U16/U32/U64 MCU Endianism Handling Macros\r
+ */\r
+//! @{\r
+#if LITTLE_ENDIAN_MCU\r
+ #define LSB(u16) (((U8 *)&(u16))[0]) //!< Least significant byte of \a u16.\r
+ #define MSB(u16) (((U8 *)&(u16))[1]) //!< Most significant byte of \a u16.\r
+ #define LSH(u32) (((U16 *)&(u32))[0]) //!< Least significant half-word of \a u32.\r
+ #define MSH(u32) (((U16 *)&(u32))[1]) //!< Most significant half-word of \a u32.\r
+ #define LSB0W(u32) (((U8 *)&(u32))[0]) //!< Least significant byte of 1st rank of \a u32.\r
+ #define LSB1W(u32) (((U8 *)&(u32))[1]) //!< Least significant byte of 2nd rank of \a u32.\r
+ #define LSB2W(u32) (((U8 *)&(u32))[2]) //!< Least significant byte of 3rd rank of \a u32.\r
+ #define LSB3W(u32) (((U8 *)&(u32))[3]) //!< Least significant byte of 4th rank of \a u32.\r
+ #define MSB3W(u32) LSB0W(u32) //!< Most significant byte of 1st rank of \a u32.\r
+ #define MSB2W(u32) LSB1W(u32) //!< Most significant byte of 2nd rank of \a u32.\r
+ #define MSB1W(u32) LSB2W(u32) //!< Most significant byte of 3rd rank of \a u32.\r
+ #define MSB0W(u32) LSB3W(u32) //!< Most significant byte of 4th rank of \a u32.\r
+ #define LSW(u64) (((U32 *)&(u64))[0]) //!< Least significant word of \a u64.\r
+ #define MSW(u64) (((U32 *)&(u64))[1]) //!< Most significant word of \a u64.\r
+ #define LSH0(u64) (((U16 *)&(u64))[0]) //!< Least significant half-word of 1st rank of \a u64.\r
+ #define LSH1(u64) (((U16 *)&(u64))[1]) //!< Least significant half-word of 2nd rank of \a u64.\r
+ #define LSH2(u64) (((U16 *)&(u64))[2]) //!< Least significant half-word of 3rd rank of \a u64.\r
+ #define LSH3(u64) (((U16 *)&(u64))[3]) //!< Least significant half-word of 4th rank of \a u64.\r
+ #define MSH3(u64) LSH0(u64) //!< Most significant half-word of 1st rank of \a u64.\r
+ #define MSH2(u64) LSH1(u64) //!< Most significant half-word of 2nd rank of \a u64.\r
+ #define MSH1(u64) LSH2(u64) //!< Most significant half-word of 3rd rank of \a u64.\r
+ #define MSH0(u64) LSH3(u64) //!< Most significant half-word of 4th rank of \a u64.\r
+ #define LSB0D(u64) (((U8 *)&(u64))[0]) //!< Least significant byte of 1st rank of \a u64.\r
+ #define LSB1D(u64) (((U8 *)&(u64))[1]) //!< Least significant byte of 2nd rank of \a u64.\r
+ #define LSB2D(u64) (((U8 *)&(u64))[2]) //!< Least significant byte of 3rd rank of \a u64.\r
+ #define LSB3D(u64) (((U8 *)&(u64))[3]) //!< Least significant byte of 4th rank of \a u64.\r
+ #define LSB4D(u64) (((U8 *)&(u64))[4]) //!< Least significant byte of 5th rank of \a u64.\r
+ #define LSB5D(u64) (((U8 *)&(u64))[5]) //!< Least significant byte of 6th rank of \a u64.\r
+ #define LSB6D(u64) (((U8 *)&(u64))[6]) //!< Least significant byte of 7th rank of \a u64.\r
+ #define LSB7D(u64) (((U8 *)&(u64))[7]) //!< Least significant byte of 8th rank of \a u64.\r
+ #define MSB7D(u64) LSB0D(u64) //!< Most significant byte of 1st rank of \a u64.\r
+ #define MSB6D(u64) LSB1D(u64) //!< Most significant byte of 2nd rank of \a u64.\r
+ #define MSB5D(u64) LSB2D(u64) //!< Most significant byte of 3rd rank of \a u64.\r
+ #define MSB4D(u64) LSB3D(u64) //!< Most significant byte of 4th rank of \a u64.\r
+ #define MSB3D(u64) LSB4D(u64) //!< Most significant byte of 5th rank of \a u64.\r
+ #define MSB2D(u64) LSB5D(u64) //!< Most significant byte of 6th rank of \a u64.\r
+ #define MSB1D(u64) LSB6D(u64) //!< Most significant byte of 7th rank of \a u64.\r
+ #define MSB0D(u64) LSB7D(u64) //!< Most significant byte of 8th rank of \a u64.\r
+#else // BIG_ENDIAN_MCU\r
+ #define MSB(u16) (((U8 *)&(u16))[0]) //!< Most significant byte of \a u16.\r
+ #define LSB(u16) (((U8 *)&(u16))[1]) //!< Least significant byte of \a u16.\r
+ #define MSH(u32) (((U16 *)&(u32))[0]) //!< Most significant half-word of \a u32.\r
+ #define LSH(u32) (((U16 *)&(u32))[1]) //!< Least significant half-word of \a u32.\r
+ #define MSB0W(u32) (((U8 *)&(u32))[0]) //!< Most significant byte of 1st rank of \a u32.\r
+ #define MSB1W(u32) (((U8 *)&(u32))[1]) //!< Most significant byte of 2nd rank of \a u32.\r
+ #define MSB2W(u32) (((U8 *)&(u32))[2]) //!< Most significant byte of 3rd rank of \a u32.\r
+ #define MSB3W(u32) (((U8 *)&(u32))[3]) //!< Most significant byte of 4th rank of \a u32.\r
+ #define LSB3W(u32) MSB0W(u32) //!< Least significant byte of 1st rank of \a u32.\r
+ #define LSB2W(u32) MSB1W(u32) //!< Least significant byte of 2nd rank of \a u32.\r
+ #define LSB1W(u32) MSB2W(u32) //!< Least significant byte of 3rd rank of \a u32.\r
+ #define LSB0W(u32) MSB3W(u32) //!< Least significant byte of 4th rank of \a u32.\r
+ #define MSW(u64) (((U32 *)&(u64))[0]) //!< Most significant word of \a u64.\r
+ #define LSW(u64) (((U32 *)&(u64))[1]) //!< Least significant word of \a u64.\r
+ #define MSH0(u64) (((U16 *)&(u64))[0]) //!< Most significant half-word of 1st rank of \a u64.\r
+ #define MSH1(u64) (((U16 *)&(u64))[1]) //!< Most significant half-word of 2nd rank of \a u64.\r
+ #define MSH2(u64) (((U16 *)&(u64))[2]) //!< Most significant half-word of 3rd rank of \a u64.\r
+ #define MSH3(u64) (((U16 *)&(u64))[3]) //!< Most significant half-word of 4th rank of \a u64.\r
+ #define LSH3(u64) MSH0(u64) //!< Least significant half-word of 1st rank of \a u64.\r
+ #define LSH2(u64) MSH1(u64) //!< Least significant half-word of 2nd rank of \a u64.\r
+ #define LSH1(u64) MSH2(u64) //!< Least significant half-word of 3rd rank of \a u64.\r
+ #define LSH0(u64) MSH3(u64) //!< Least significant half-word of 4th rank of \a u64.\r
+ #define MSB0D(u64) (((U8 *)&(u64))[0]) //!< Most significant byte of 1st rank of \a u64.\r
+ #define MSB1D(u64) (((U8 *)&(u64))[1]) //!< Most significant byte of 2nd rank of \a u64.\r
+ #define MSB2D(u64) (((U8 *)&(u64))[2]) //!< Most significant byte of 3rd rank of \a u64.\r
+ #define MSB3D(u64) (((U8 *)&(u64))[3]) //!< Most significant byte of 4th rank of \a u64.\r
+ #define MSB4D(u64) (((U8 *)&(u64))[4]) //!< Most significant byte of 5th rank of \a u64.\r
+ #define MSB5D(u64) (((U8 *)&(u64))[5]) //!< Most significant byte of 6th rank of \a u64.\r
+ #define MSB6D(u64) (((U8 *)&(u64))[6]) //!< Most significant byte of 7th rank of \a u64.\r
+ #define MSB7D(u64) (((U8 *)&(u64))[7]) //!< Most significant byte of 8th rank of \a u64.\r
+ #define LSB7D(u64) MSB0D(u64) //!< Least significant byte of 1st rank of \a u64.\r
+ #define LSB6D(u64) MSB1D(u64) //!< Least significant byte of 2nd rank of \a u64.\r
+ #define LSB5D(u64) MSB2D(u64) //!< Least significant byte of 3rd rank of \a u64.\r
+ #define LSB4D(u64) MSB3D(u64) //!< Least significant byte of 4th rank of \a u64.\r
+ #define LSB3D(u64) MSB4D(u64) //!< Least significant byte of 5th rank of \a u64.\r
+ #define LSB2D(u64) MSB5D(u64) //!< Least significant byte of 6th rank of \a u64.\r
+ #define LSB1D(u64) MSB6D(u64) //!< Least significant byte of 7th rank of \a u64.\r
+ #define LSB0D(u64) MSB7D(u64) //!< Least significant byte of 8th rank of \a u64.\r
+#endif\r
+//! @}\r
+\r
+/*! \name Endianism Conversion Macros\r
+ *\r
+ * The same considerations as for clz and ctz apply here but AVR32-GCC's\r
+ * __builtin_bswap_16 and __builtin_bswap_32 do not behave like macros when\r
+ * applied to constant expressions, so two sets of macros are defined here:\r
+ * - Swap16, Swap32 and Swap64 to apply to constant expressions (values known\r
+ * at compile time);\r
+ * - swap16, swap32 and swap64 to apply to non-constant expressions (values\r
+ * unknown at compile time).\r
+ */\r
+//! @{\r
+\r
+/*! \brief Toggles the endianism of \a u16 (by swapping its bytes).\r
+ *\r
+ * \param u16 U16 of which to toggle the endianism.\r
+ *\r
+ * \return Value resulting from \a u16 with toggled endianism.\r
+ *\r
+ * \note More optimized if only used with values known at compile time.\r
+ */\r
+#define Swap16(u16) ((U16)(((U16)(u16) >> 8) |\\r
+ ((U16)(u16) << 8)))\r
+\r
+/*! \brief Toggles the endianism of \a u32 (by swapping its bytes).\r
+ *\r
+ * \param u32 U32 of which to toggle the endianism.\r
+ *\r
+ * \return Value resulting from \a u32 with toggled endianism.\r
+ *\r
+ * \note More optimized if only used with values known at compile time.\r
+ */\r
+#define Swap32(u32) ((U32)(((U32)Swap16((U32)(u32) >> 16)) |\\r
+ ((U32)Swap16((U32)(u32)) << 16)))\r
+\r
+/*! \brief Toggles the endianism of \a u64 (by swapping its bytes).\r
+ *\r
+ * \param u64 U64 of which to toggle the endianism.\r
+ *\r
+ * \return Value resulting from \a u64 with toggled endianism.\r
+ *\r
+ * \note More optimized if only used with values known at compile time.\r
+ */\r
+#define Swap64(u64) ((U64)(((U64)Swap32((U64)(u64) >> 32)) |\\r
+ ((U64)Swap32((U64)(u64)) << 32)))\r
+\r
+/*! \brief Toggles the endianism of \a u16 (by swapping its bytes).\r
+ *\r
+ * \param u16 U16 of which to toggle the endianism.\r
+ *\r
+ * \return Value resulting from \a u16 with toggled endianism.\r
+ *\r
+ * \note More optimized if only used with values unknown at compile time.\r
+ */\r
+#if __GNUC__\r
+ #define swap16(u16) __builtin_bswap_16(u16)\r
+#elif __ICCAVR32__\r
+ #define swap16(u16) Swap16(u16)\r
+#endif\r
+\r
+/*! \brief Toggles the endianism of \a u32 (by swapping its bytes).\r
+ *\r
+ * \param u32 U32 of which to toggle the endianism.\r
+ *\r
+ * \return Value resulting from \a u32 with toggled endianism.\r
+ *\r
+ * \note More optimized if only used with values unknown at compile time.\r
+ */\r
+#if __GNUC__\r
+ #define swap32(u32) __builtin_bswap_32(u32)\r
+#elif __ICCAVR32__\r
+ #define swap32(u32) Swap32(u32)\r
+#endif\r
+\r
+/*! \brief Toggles the endianism of \a u64 (by swapping its bytes).\r
+ *\r
+ * \param u64 U64 of which to toggle the endianism.\r
+ *\r
+ * \return Value resulting from \a u64 with toggled endianism.\r
+ *\r
+ * \note More optimized if only used with values unknown at compile time.\r
+ */\r
+#define swap64(u64) ((U64)(((U64)swap32((U64)(u64) >> 32)) |\\r
+ ((U64)swap32((U64)(u64)) << 32)))\r
+\r
+//! @}\r
+\r
+#endif // __AVR32_ABI_COMPILER__\r
+\r
+\r
+#endif // _COMPILER_H_\r
--- /dev/null
+/*This file is prepared for Doxygen automatic documentation generation.*/\r
+/*! \file *********************************************************************\r
+ *\r
+ * \brief FreeRTOS application example for AVR32 UC3.\r
+ *\r
+ * - Compiler: IAR EWAVR32 and GNU GCC for AVR32\r
+ * - Supported devices: All AVR32 devices can be used.\r
+ * - AppNote:\r
+ *\r
+ * \author Atmel Corporation: http://www.atmel.com \n\r
+ * Support email: avr32@atmel.com\r
+ *\r
+ ******************************************************************************/\r
+\r
+/*! \mainpage\r
+ * \section intro Introduction\r
+ *\r
+ * This is the documentation for the data structures, functions, variables,\r
+ * defines, enums, and typedefs for the FreeRTOS application.\r
+ *\r
+ * \image html freertos.gif\r
+ *\r
+ * FreeRTOS.orgTM is a portable, open source, mini Real Time Kernel - a\r
+ * free to download and royalty free RTOS that can be used in commercial\r
+ * applications (see license text). This site shows how a complete embedded\r
+ * real time system can be created from a Windows host using quality open\r
+ * source development tools (where available). See the FreeRTOS.org features\r
+ * summary.\r
+ * Highlights include:\r
+ * - Free RTOS kernel - preemptive, cooperative and hybrid configuration options.\r
+ * - Designed to be small, simple and easy to use.\r
+ * - Very portable code structure predominantly written in C.\r
+ * - Supports both tasks and co-routines.\r
+ * - No software restriction on the number of tasks that can be created.\r
+ * - No software restriction on the number of priorities that can be used.\r
+ * - No restrictions imposed on priority assignment - more than one task can be assigned the same priority.\r
+ * - Queues and semaphores for communication and synchronisation between tasks, or between tasks and interrupts.\r
+ * - Free embedded software source code.\r
+ * - Royalty free.\r
+ * - Cross development from a standard Windows host.\r
+ * - Pre-configured demo applications for selected single board computers allowing 'out of the box' operation and fast learning curve.\r
+ * - Compile time configuration allows small FLASH footprint\r
+ * - The SafeRTOS derivative product provides a high level of confidence in the code integrity.\r
+ *\r
+ * \section files Main Files\r
+ * - main.c : FreeRTOS example\r
+ *\r
+ * \section compilinfo Compilation Information\r
+ * This software is written for GNU GCC for AVR32 and for IAR Embedded Workbench\r
+ * for Atmel AVR32. Other compilers may or may not work.\r
+ *\r
+ * \section deviceinfo Device Information\r
+ * All AVR32 devices can be used.\r
+ *\r
+ * \section configinfo Configuration Information\r
+ * This example has been tested with the following configuration:\r
+ * - EVK1100 evaluation kit;\r
+ * - CPU clock: 12 MHz;\r
+ * - USART0 connected to a PC serial port via a standard RS232 DB9 cable;\r
+ * - PC terminal settings:\r
+ * - 57600 bps,\r
+ * - 8 data bits,\r
+ * - no parity bit,\r
+ * - 1 stop bit,\r
+ * - no flow control.\r
+ *\r
+ * \section contactinfo Contact Information\r
+ * For further information, visit\r
+ * <A href="http://www.atmel.com/products/AVR32/" >Atmel AVR32</A>. and\r
+ * <A href="http://www.freertos.org/" >FreeRTOS home page</A>.\n\r
+ * Support e-mail address: avr32@atmel.com.\r
+ */\r
--- /dev/null
+# Doxyfile 1.4.7
+
+#---------------------------------------------------------------------------
+# Project related configuration options
+#---------------------------------------------------------------------------
+PROJECT_NAME = "AVR32 UC3 - FreeRTOS Real Time Kernel"
+PROJECT_NUMBER =
+OUTPUT_DIRECTORY =
+CREATE_SUBDIRS = NO
+OUTPUT_LANGUAGE = English
+USE_WINDOWS_ENCODING = YES
+BRIEF_MEMBER_DESC = YES
+REPEAT_BRIEF = YES
+ABBREVIATE_BRIEF =
+ALWAYS_DETAILED_SEC = NO
+INLINE_INHERITED_MEMB = NO
+FULL_PATH_NAMES = NO
+STRIP_FROM_PATH =
+STRIP_FROM_INC_PATH =
+SHORT_NAMES = NO
+JAVADOC_AUTOBRIEF = YES
+MULTILINE_CPP_IS_BRIEF = NO
+DETAILS_AT_TOP = YES
+INHERIT_DOCS = YES
+SEPARATE_MEMBER_PAGES = NO
+TAB_SIZE = 4
+ALIASES =
+OPTIMIZE_OUTPUT_FOR_C = YES
+OPTIMIZE_OUTPUT_JAVA = NO
+BUILTIN_STL_SUPPORT = NO
+DISTRIBUTE_GROUP_DOC = NO
+SUBGROUPING = YES
+#---------------------------------------------------------------------------
+# Build related configuration options
+#---------------------------------------------------------------------------
+EXTRACT_ALL = YES
+EXTRACT_PRIVATE = NO
+EXTRACT_STATIC = YES
+EXTRACT_LOCAL_CLASSES = YES
+EXTRACT_LOCAL_METHODS = NO
+HIDE_UNDOC_MEMBERS = NO
+HIDE_UNDOC_CLASSES = NO
+HIDE_FRIEND_COMPOUNDS = NO
+HIDE_IN_BODY_DOCS = NO
+INTERNAL_DOCS = YES
+CASE_SENSE_NAMES = YES
+HIDE_SCOPE_NAMES = NO
+SHOW_INCLUDE_FILES = YES
+INLINE_INFO = YES
+SORT_MEMBER_DOCS = YES
+SORT_BRIEF_DOCS = YES
+SORT_BY_SCOPE_NAME = NO
+GENERATE_TODOLIST = YES
+GENERATE_TESTLIST = YES
+GENERATE_BUGLIST = YES
+GENERATE_DEPRECATEDLIST= YES
+ENABLED_SECTIONS =
+MAX_INITIALIZER_LINES = 30
+SHOW_USED_FILES = NO
+SHOW_DIRECTORIES = NO
+FILE_VERSION_FILTER =
+#---------------------------------------------------------------------------
+# configuration options related to warning and progress messages
+#---------------------------------------------------------------------------
+QUIET = YES
+WARNINGS = YES
+WARN_IF_UNDOCUMENTED = YES
+WARN_IF_DOC_ERROR = YES
+WARN_NO_PARAMDOC = NO
+WARN_FORMAT = "$file:$line: $text"
+WARN_LOGFILE =
+#---------------------------------------------------------------------------
+# configuration options related to the input files
+#---------------------------------------------------------------------------
+INPUT = ./ ./../../Source ./../Common/include ./../Common/Minimal
+FILE_PATTERNS = *.c \
+ *.h
+RECURSIVE = YES
+EXCLUDE =
+EXCLUDE_SYMLINKS = NO
+EXCLUDE_PATTERNS =
+EXAMPLE_PATH =
+EXAMPLE_PATTERNS =
+EXAMPLE_RECURSIVE = NO
+IMAGE_PATH = ./
+INPUT_FILTER =
+FILTER_PATTERNS =
+FILTER_SOURCE_FILES = NO
+#---------------------------------------------------------------------------
+# configuration options related to source browsing
+#---------------------------------------------------------------------------
+SOURCE_BROWSER = YES
+INLINE_SOURCES = YES
+STRIP_CODE_COMMENTS = YES
+REFERENCED_BY_RELATION = YES
+REFERENCES_RELATION = YES
+REFERENCES_LINK_SOURCE = YES
+USE_HTAGS = NO
+VERBATIM_HEADERS = YES
+#---------------------------------------------------------------------------
+# configuration options related to the alphabetical class index
+#---------------------------------------------------------------------------
+ALPHABETICAL_INDEX = NO
+COLS_IN_ALPHA_INDEX = 5
+IGNORE_PREFIX =
+#---------------------------------------------------------------------------
+# configuration options related to the HTML output
+#---------------------------------------------------------------------------
+GENERATE_HTML = YES
+HTML_OUTPUT = DOC
+HTML_FILE_EXTENSION = .html
+HTML_HEADER =
+HTML_FOOTER =
+HTML_STYLESHEET =
+HTML_ALIGN_MEMBERS = YES
+GENERATE_HTMLHELP = NO
+CHM_FILE =
+HHC_LOCATION =
+GENERATE_CHI = NO
+BINARY_TOC = NO
+TOC_EXPAND = NO
+DISABLE_INDEX = NO
+ENUM_VALUES_PER_LINE = 4
+GENERATE_TREEVIEW = YES
+TREEVIEW_WIDTH = 250
+#---------------------------------------------------------------------------
+# configuration options related to the LaTeX output
+#---------------------------------------------------------------------------
+GENERATE_LATEX = NO
+LATEX_OUTPUT = latex
+LATEX_CMD_NAME = latex
+MAKEINDEX_CMD_NAME = makeindex
+COMPACT_LATEX = NO
+PAPER_TYPE = a4wide
+EXTRA_PACKAGES =
+LATEX_HEADER =
+PDF_HYPERLINKS = NO
+USE_PDFLATEX = NO
+LATEX_BATCHMODE = NO
+LATEX_HIDE_INDICES = NO
+#---------------------------------------------------------------------------
+# configuration options related to the RTF output
+#---------------------------------------------------------------------------
+GENERATE_RTF = NO
+RTF_OUTPUT = RTF
+COMPACT_RTF = NO
+RTF_HYPERLINKS = YES
+RTF_STYLESHEET_FILE =
+RTF_EXTENSIONS_FILE =
+#---------------------------------------------------------------------------
+# configuration options related to the man page output
+#---------------------------------------------------------------------------
+GENERATE_MAN = NO
+MAN_OUTPUT = man
+MAN_EXTENSION = .3
+MAN_LINKS = NO
+#---------------------------------------------------------------------------
+# configuration options related to the XML output
+#---------------------------------------------------------------------------
+GENERATE_XML = NO
+XML_OUTPUT = xml
+XML_SCHEMA =
+XML_DTD =
+XML_PROGRAMLISTING = YES
+#---------------------------------------------------------------------------
+# configuration options for the AutoGen Definitions output
+#---------------------------------------------------------------------------
+GENERATE_AUTOGEN_DEF = NO
+#---------------------------------------------------------------------------
+# configuration options related to the Perl module output
+#---------------------------------------------------------------------------
+GENERATE_PERLMOD = NO
+PERLMOD_LATEX = NO
+PERLMOD_PRETTY = YES
+PERLMOD_MAKEVAR_PREFIX =
+#---------------------------------------------------------------------------
+# Configuration options related to the preprocessor
+#---------------------------------------------------------------------------
+ENABLE_PREPROCESSING = YES
+MACRO_EXPANSION = YES
+EXPAND_ONLY_PREDEF = YES
+SEARCH_INCLUDES = YES
+INCLUDE_PATH =
+INCLUDE_FILE_PATTERNS =
+PREDEFINED = __GNUC__=4 \
+ __attribute__()= \
+ __AVR32__=1 \
+ __AVR32_UC3A0512__=1 \
+ __AVR32_ABI_COMPILER__ \
+ BOARD=EVK1100
+EXPAND_AS_DEFINED =
+SKIP_FUNCTION_MACROS = YES
+#---------------------------------------------------------------------------
+# Configuration::additions related to external references
+#---------------------------------------------------------------------------
+TAGFILES =
+GENERATE_TAGFILE =
+ALLEXTERNALS = NO
+EXTERNAL_GROUPS = YES
+PERL_PATH = /usr/bin/perl
+#---------------------------------------------------------------------------
+# Configuration options related to the dot tool
+#---------------------------------------------------------------------------
+CLASS_DIAGRAMS = NO
+HIDE_UNDOC_RELATIONS = YES
+HAVE_DOT = NO
+CLASS_GRAPH = NO
+COLLABORATION_GRAPH = NO
+GROUP_GRAPHS = NO
+UML_LOOK = YES
+TEMPLATE_RELATIONS = YES
+INCLUDE_GRAPH = NO
+INCLUDED_BY_GRAPH = NO
+CALL_GRAPH = NO
+CALLER_GRAPH = NO
+GRAPHICAL_HIERARCHY = NO
+DIRECTORY_GRAPH = NO
+DOT_IMAGE_FORMAT = png
+DOT_PATH =
+DOTFILE_DIRS =
+MAX_DOT_GRAPH_WIDTH = 1024
+MAX_DOT_GRAPH_HEIGHT = 1024
+MAX_DOT_GRAPH_DEPTH = 0
+DOT_TRANSPARENT = NO
+DOT_MULTI_TARGETS = NO
+GENERATE_LEGEND = YES
+DOT_CLEANUP = YES
+#---------------------------------------------------------------------------
+# Configuration::additions related to the search engine
+#---------------------------------------------------------------------------
+SEARCHENGINE = NO
--- /dev/null
+/* This source file is part of the ATMEL FREERTOS-0.9.0 Release */\r
+\r
+/*This file has been prepared for Doxygen automatic documentation generation.*/\r
+/*! \file *********************************************************************\r
+ *\r
+ * \brief FreeRTOS Real Time Kernel example.\r
+ *\r
+ * Creates all the demo application tasks, then starts the scheduler. The WEB\r
+ * documentation provides more details of the demo application tasks.\r
+ *\r
+ * Main. c also creates a task called "Check". This only executes every three\r
+ * seconds but has the highest priority so is guaranteed to get processor time.\r
+ * Its main function is to check that all the other tasks are still operational.\r
+ * Each task that does not flash an LED maintains a unique count that is\r
+ * incremented each time the task successfully completes its function. Should\r
+ * any error occur within such a task the count is permanently halted. The\r
+ * check task inspects the count of each task to ensure it has changed since\r
+ * the last time the check task executed. If all the count variables have\r
+ * changed all the tasks are still executing error free, and the check task\r
+ * toggles an LED. Should any task contain an error at any time the LED toggle\r
+ * will stop.\r
+ *\r
+ * The LED flash and communications test tasks do not maintain a count.\r
+ *\r
+ * - Compiler: IAR EWAVR32 and GNU GCC for AVR32\r
+ * - Supported devices: All AVR32 devices with GPIO.\r
+ * - AppNote:\r
+ *\r
+ * \author Atmel Corporation: http://www.atmel.com \n\r
+ * Support email: avr32@atmel.com\r
+ *\r
+ *****************************************************************************/\r
+\r
+/*\r
+ FreeRTOS.org V4.2.0 - Copyright (C) 2003-2007 Richard Barry.\r
+\r
+ This file is part of the FreeRTOS.org distribution.\r
+\r
+ FreeRTOS.org is free software; you can redistribute it and/or modify\r
+ it under the terms of the GNU General Public License as published by\r
+ the Free Software Foundation; either version 2 of the License, or\r
+ (at your option) any later version.\r
+\r
+ FreeRTOS.org is distributed in the hope that it will be useful,\r
+ but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\r
+ GNU General Public License for more details.\r
+\r
+ You should have received a copy of the GNU General Public License\r
+ along with FreeRTOS.org; if not, write to the Free Software\r
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA\r
+\r
+ A special exception to the GPL can be applied should you wish to distribute\r
+ a combined work that includes FreeRTOS.org, without being obliged to provide\r
+ the source code for any proprietary components. See the licensing section\r
+ of http://www.FreeRTOS.org for full details of how and when the exception\r
+ can be applied.\r
+\r
+ ***************************************************************************\r
+ See http://www.FreeRTOS.org for documentation, latest information, license\r
+ and contact details. Please ensure to read the configuration and relevant\r
+ port sections of the online documentation.\r
+ ***************************************************************************\r
+*/\r
+\r
+\r
+#include <stdio.h>\r
+#include <stdlib.h>\r
+#include <string.h>\r
+\r
+/* Environment header files. */\r
+#include "pm.h"\r
+\r
+/* Scheduler header files. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+\r
+/* Demo file headers. */\r
+#include "partest.h"\r
+#include "serial.h"\r
+#include "integer.h"\r
+#include "comtest.h"\r
+#include "flash.h"\r
+#include "PollQ.h"\r
+#include "semtest.h"\r
+#include "dynamic.h"\r
+#include "BlockQ.h"\r
+#include "death.h"\r
+#include "flop.h"\r
+\r
+/*! \name Priority definitions for most of the tasks in the demo application.\r
+ * Some tasks just use the idle priority.\r
+ */\r
+//! @{\r
+#define mainLED_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 )\r
+#define mainCOM_TEST_PRIORITY ( tskIDLE_PRIORITY + 2 )\r
+#define mainQUEUE_POLL_PRIORITY ( tskIDLE_PRIORITY + 2 )\r
+#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1 )\r
+#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 3 )\r
+#define mainCHECK_TASK_PRIORITY ( tskIDLE_PRIORITY + 4 )\r
+#define mainCREATOR_TASK_PRIORITY ( tskIDLE_PRIORITY + 3 )\r
+//! @}\r
+\r
+//! Baud rate used by the serial port tasks.\r
+#define mainCOM_TEST_BAUD_RATE ( ( unsigned portLONG ) 57600 )\r
+\r
+//! LED used by the serial port tasks. This is toggled on each character Tx,\r
+//! and mainCOM_TEST_LED + 1 is toggled on each character Rx.\r
+#define mainCOM_TEST_LED ( 3 )\r
+\r
+//! LED that is toggled by the check task. The check task periodically checks\r
+//! that all the other tasks are operating without error. If no errors are found\r
+//! the LED is toggled. If an error is found at any time the LED toggles faster.\r
+#define mainCHECK_TASK_LED ( 6 )\r
+\r
+//! LED that is set upon error.\r
+#define mainERROR_LED ( 7 )\r
+\r
+//! The period between executions of the check task.\r
+#define mainCHECK_PERIOD ( ( portTickType ) 3000 / portTICK_RATE_MS )\r
+\r
+//! If an error is detected in a task, the vErrorChecks task will enter in an\r
+//! infinite loop flashing the LED at this rate.\r
+#define mainERROR_FLASH_RATE ( (portTickType) 500 / portTICK_RATE_MS )\r
+\r
+/*! \name Constants used by the vMemCheckTask() task.\r
+ */\r
+//! @{\r
+#define mainCOUNT_INITIAL_VALUE ( ( unsigned portLONG ) 0 )\r
+#define mainNO_TASK ( 0 )\r
+//! @}\r
+\r
+/*! \name The size of the memory blocks allocated by the vMemCheckTask() task.\r
+ */\r
+//! @{\r
+#define mainMEM_CHECK_SIZE_1 ( ( size_t ) 51 )\r
+#define mainMEM_CHECK_SIZE_2 ( ( size_t ) 52 )\r
+#define mainMEM_CHECK_SIZE_3 ( ( size_t ) 151 )\r
+//! @}\r
+\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * The task that executes at the highest priority and calls\r
+ * prvCheckOtherTasksAreStillRunning(). See the description at the top\r
+ * of the file.\r
+ */\r
+static void vErrorChecks( void *pvParameters );\r
+\r
+/*\r
+ * Checks that all the demo application tasks are still executing without error\r
+ * - as described at the top of the file.\r
+ */\r
+static portBASE_TYPE prvCheckOtherTasksAreStillRunning( void );\r
+\r
+/*\r
+ * A task that exercises the memory allocator.\r
+ */\r
+static void vMemCheckTask( void *pvParameters );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+int main( void )\r
+{\r
+ /* Start the crystal oscillator 0 and switch the main clock to it. */\r
+ pm_switch_to_osc0(&AVR32_PM, FOSC0, OSC0_STARTUP);\r
+\r
+ portDBG_TRACE("Starting the FreeRTOS AVR32 UC3 Demo...");\r
+\r
+ /* Setup the LED's for output. */\r
+ vParTestInitialise();\r
+\r
+ /* Start the standard demo tasks. See the WEB documentation for more\r
+ information. */\r
+ vStartLEDFlashTasks( mainLED_TASK_PRIORITY );\r
+ vAltStartComTestTasks( mainCOM_TEST_PRIORITY, mainCOM_TEST_BAUD_RATE, mainCOM_TEST_LED );\r
+ vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );\r
+ vStartIntegerMathTasks( tskIDLE_PRIORITY );\r
+ vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
+ vStartDynamicPriorityTasks();\r
+ vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
+ vStartMathTasks( tskIDLE_PRIORITY );\r
+\r
+ /* Start the demo tasks defined within this file, specifically the check\r
+ task as described at the top of this file. */\r
+ xTaskCreate(\r
+ vErrorChecks\r
+ , (const signed portCHAR *)"ErrCheck"\r
+ , configMINIMAL_STACK_SIZE\r
+ , NULL\r
+ , mainCHECK_TASK_PRIORITY\r
+ , NULL );\r
+\r
+ /* Start the scheduler. */\r
+ vTaskStartScheduler();\r
+\r
+ /* Will only get here if there was insufficient memory to create the idle\r
+ task. */\r
+\r
+ return 0;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+/*!\r
+ * \brief The task function for the "Check" task.\r
+ */\r
+static void vErrorChecks( void *pvParameters )\r
+{\r
+static volatile unsigned portLONG ulDummyVariable = 3UL;\r
+unsigned portLONG ulMemCheckTaskRunningCount;\r
+xTaskHandle xCreatedTask;\r
+portBASE_TYPE bSuicidalTask = 0;\r
+\r
+ /* The parameters are not used. Prevent compiler warnings. */\r
+ ( void ) pvParameters;\r
+\r
+ /* Cycle for ever, delaying then checking all the other tasks are still\r
+ operating without error.\r
+\r
+ In addition to the standard tests the memory allocator is tested through\r
+ the dynamic creation and deletion of a task each cycle. Each time the\r
+ task is created memory must be allocated for its stack. When the task is\r
+ deleted this memory is returned to the heap. If the task cannot be created\r
+ then it is likely that the memory allocation failed. */\r
+\r
+ for( ;; )\r
+ {\r
+ /* Do this only once. */\r
+ if( bSuicidalTask == 0 )\r
+ {\r
+ bSuicidalTask++;\r
+\r
+ /* This task has to be created last as it keeps account of the number of\r
+ tasks it expects to see running. However its implementation expects\r
+ to be called before vTaskStartScheduler(). We're in the case here where\r
+ vTaskStartScheduler() has already been called (thus the hidden IDLE task\r
+ has already been spawned). Since vCreateSuicidalTask() supposes that the\r
+ IDLE task isn't included in the response from uxTaskGetNumberOfTasks(),\r
+ let the MEM_CHECK task play that role. => this is why vCreateSuicidalTasks()\r
+ is not called as the last task. */\r
+ vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY );\r
+ }\r
+\r
+ /* Reset xCreatedTask. This is modified by the task about to be\r
+ created so we can tell if it is executing correctly or not. */\r
+ xCreatedTask = mainNO_TASK;\r
+\r
+ /* Dynamically create a task - passing ulMemCheckTaskRunningCount as a\r
+ parameter. */\r
+ ulMemCheckTaskRunningCount = mainCOUNT_INITIAL_VALUE;\r
+\r
+ if( xTaskCreate( vMemCheckTask,\r
+ ( signed portCHAR * ) "MEM_CHECK",\r
+ configMINIMAL_STACK_SIZE,\r
+ ( void * ) &ulMemCheckTaskRunningCount,\r
+ tskIDLE_PRIORITY, &xCreatedTask ) != pdPASS )\r
+ {\r
+ /* Could not create the task - we have probably run out of heap.\r
+ Don't go any further and flash the LED faster to provide visual\r
+ feedback of the error. */\r
+ for(;;)\r
+ {\r
+ vParTestToggleLED( mainCHECK_TASK_LED );\r
+ vTaskDelay( mainERROR_FLASH_RATE );\r
+ }\r
+ }\r
+\r
+ /* Delay until it is time to execute again. */\r
+ vTaskDelay( mainCHECK_PERIOD );\r
+\r
+ /* Delete the dynamically created task. */\r
+ if( xCreatedTask != mainNO_TASK )\r
+ {\r
+ vTaskDelete( xCreatedTask );\r
+ }\r
+\r
+ /* Perform a bit of 32bit maths to ensure the registers used by the\r
+ integer tasks get some exercise. The result here is not important -\r
+ see the demo application documentation for more info. */\r
+ ulDummyVariable *= 3;\r
+\r
+ /* Check all other tasks are still operating without error.\r
+ Check that vMemCheckTask did increment the counter. */\r
+ if( ( prvCheckOtherTasksAreStillRunning() != pdFALSE )\r
+ || ( ulMemCheckTaskRunningCount == mainCOUNT_INITIAL_VALUE ) )\r
+ {\r
+ /* An error has occurred in one of the tasks.\r
+ Don't go any further and flash the LED faster to give visual\r
+ feedback of the error. */\r
+ vParTestSetLED(mainERROR_LED,pdTRUE);\r
+ for(;;)\r
+ {\r
+ vParTestToggleLED( mainCHECK_TASK_LED );\r
+ vTaskDelay( mainERROR_FLASH_RATE );\r
+ }\r
+ }\r
+ else\r
+ {\r
+ /* Toggle the LED if everything is okay. */\r
+ vParTestToggleLED( mainCHECK_TASK_LED );\r
+ }\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+\r
+/*!\r
+ * \brief Checks that all the demo application tasks are still executing without error.\r
+ */\r
+static portBASE_TYPE prvCheckOtherTasksAreStillRunning( void )\r
+{\r
+static portBASE_TYPE xErrorHasOccurred = pdFALSE;\r
+\r
+ if( xAreComTestTasksStillRunning() != pdTRUE )\r
+ {\r
+ xErrorHasOccurred = pdTRUE;\r
+ }\r
+\r
+ if( xArePollingQueuesStillRunning() != pdTRUE )\r
+ {\r
+ xErrorHasOccurred = pdTRUE;\r
+ }\r
+\r
+ if( xAreIntegerMathsTaskStillRunning() != pdTRUE )\r
+ {\r
+ xErrorHasOccurred = pdTRUE;\r
+ }\r
+\r
+ if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
+ {\r
+ xErrorHasOccurred = pdTRUE;\r
+ }\r
+\r
+ if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
+ {\r
+ xErrorHasOccurred = pdTRUE;\r
+ }\r
+\r
+ if( xAreDynamicPriorityTasksStillRunning() != pdTRUE )\r
+ {\r
+ xErrorHasOccurred = pdTRUE;\r
+ }\r
+\r
+ if( xAreMathsTaskStillRunning() != pdTRUE )\r
+ {\r
+ xErrorHasOccurred = pdTRUE;\r
+ }\r
+\r
+ if( xIsCreateTaskStillRunning() != pdTRUE )\r
+ {\r
+ xErrorHasOccurred = pdTRUE;\r
+ }\r
+\r
+ return ( xErrorHasOccurred );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+\r
+/*!\r
+ * \brief Dynamically created and deleted during each cycle of the vErrorChecks()\r
+ * task. This is done to check the operation of the memory allocator.\r
+ * See the top of vErrorChecks for more details.\r
+ *\r
+ * \param *pvParameters Parameters for the task (can be of any kind)\r
+ */\r
+static void vMemCheckTask( void *pvParameters )\r
+{\r
+unsigned portLONG *pulMemCheckTaskRunningCounter;\r
+void *pvMem1, *pvMem2, *pvMem3;\r
+static portLONG lErrorOccurred = pdFALSE;\r
+\r
+ /* This task is dynamically created then deleted during each cycle of the\r
+ vErrorChecks task to check the operation of the memory allocator. Each time\r
+ the task is created memory is allocated for the stack and TCB. Each time\r
+ the task is deleted this memory is returned to the heap. This task itself\r
+ exercises the allocator by allocating and freeing blocks.\r
+\r
+ The task executes at the idle priority so does not require a delay.\r
+\r
+ pulMemCheckTaskRunningCounter is incremented each cycle to indicate to the\r
+ vErrorChecks() task that this task is still executing without error. */\r
+\r
+ pulMemCheckTaskRunningCounter = ( unsigned portLONG * ) pvParameters;\r
+\r
+ for( ;; )\r
+ {\r
+ if( lErrorOccurred == pdFALSE )\r
+ {\r
+ /* We have never seen an error so increment the counter. */\r
+ ( *pulMemCheckTaskRunningCounter )++;\r
+ }\r
+ else\r
+ {\r
+ /* There has been an error so reset the counter so the check task\r
+ can tell that an error occurred. */\r
+ *pulMemCheckTaskRunningCounter = mainCOUNT_INITIAL_VALUE;\r
+ }\r
+\r
+ /* Allocate some memory - just to give the allocator some extra\r
+ exercise. This has to be in a critical section to ensure the\r
+ task does not get deleted while it has memory allocated. */\r
+\r
+ vTaskSuspendAll();\r
+ {\r
+ pvMem1 = pvPortMalloc( mainMEM_CHECK_SIZE_1 );\r
+\r
+ if( pvMem1 == NULL )\r
+ {\r
+ lErrorOccurred = pdTRUE;\r
+ }\r
+ else\r
+ {\r
+ memset( pvMem1, 0xaa, mainMEM_CHECK_SIZE_1 );\r
+ vPortFree( pvMem1 );\r
+ }\r
+ }\r
+ xTaskResumeAll();\r
+\r
+ /* Again - with a different size block. */\r
+ vTaskSuspendAll();\r
+ {\r
+ pvMem2 = pvPortMalloc( mainMEM_CHECK_SIZE_2 );\r
+\r
+ if( pvMem2 == NULL )\r
+ {\r
+ lErrorOccurred = pdTRUE;\r
+ }\r
+ else\r
+ {\r
+ memset( pvMem2, 0xaa, mainMEM_CHECK_SIZE_2 );\r
+ vPortFree( pvMem2 );\r
+ }\r
+ }\r
+ xTaskResumeAll();\r
+\r
+ /* Again - with a different size block. */\r
+ vTaskSuspendAll();\r
+ {\r
+ pvMem3 = pvPortMalloc( mainMEM_CHECK_SIZE_3 );\r
+ if( pvMem3 == NULL )\r
+ {\r
+ lErrorOccurred = pdTRUE;\r
+ }\r
+ else\r
+ {\r
+ memset( pvMem3, 0xaa, mainMEM_CHECK_SIZE_3 );\r
+ vPortFree( pvMem3 );\r
+ }\r
+ }\r
+ xTaskResumeAll();\r
+ }\r
+}\r
--- /dev/null
+/* This source file is part of the ATMEL FREERTOS-0.9.0 Release */\r
+\r
+/*This file has been prepared for Doxygen automatic documentation generation.*/\r
+/*! \file *********************************************************************\r
+ *\r
+ * \brief FreeRTOS Serial Port management example for AVR32 UC3.\r
+ *\r
+ * - Compiler: IAR EWAVR32 and GNU GCC for AVR32\r
+ * - Supported devices: All AVR32 devices can be used.\r
+ * - AppNote:\r
+ *\r
+ * \author Atmel Corporation: http://www.atmel.com \n\r
+ * Support email: avr32@atmel.com\r
+ *\r
+ *****************************************************************************/\r
+\r
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the following disclaimer.\r
+ *\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ * this list of conditions and the following disclaimer in the documentation\r
+ * and/or other materials provided with the distribution.\r
+ *\r
+ * 3. The name of ATMEL may not be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND\r
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,\r
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\r
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\r
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND\r
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF\r
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ */\r
+\r
+\r
+/*\r
+ BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR USART0.\r
+*/\r
+\r
+/* Scheduler includes. */\r
+#include "FreeRTOS.h"\r
+#include "queue.h"\r
+#include "task.h"\r
+\r
+/* Demo application includes. */\r
+#include "serial.h"\r
+\r
+#if __GNUC__\r
+ #include <avr32/io.h>\r
+#elif __ICCAVR32__\r
+ #include <avr32/iouc3a0512.h>\r
+#else\r
+ #error Unknown compiler\r
+#endif\r
+\r
+#include "board.h"\r
+#include "gpio.h"\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Constants to setup and access the USART. */\r
+#define serINVALID_COMPORT_HANDLER ( ( xComPortHandle ) 0 )\r
+#define serINVALID_QUEUE ( ( xQueueHandle ) 0 )\r
+#define serHANDLE ( ( xComPortHandle ) 1 )\r
+#define serNO_BLOCK ( ( portTickType ) 0 )\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Queues used to hold received characters, and characters waiting to be\r
+transmitted. */\r
+static xQueueHandle xRxedChars;\r
+static xQueueHandle xCharsForTx;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Forward declaration. */\r
+static void vprvSerialCreateQueues( unsigned portBASE_TYPE uxQueueLength,\r
+ xQueueHandle *pxRxedChars,\r
+ xQueueHandle *pxCharsForTx );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+#if __GNUC__\r
+ __attribute__((__noinline__))\r
+#elif __ICCAVR32__\r
+ #pragma optimize = no_inline\r
+#endif\r
+\r
+static portBASE_TYPE prvUSART0_ISR_NonNakedBehaviour( void )\r
+{\r
+ /* Now we can declare the local variables. */\r
+ signed portCHAR cChar;\r
+ portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByRx = pdFALSE;\r
+ unsigned portLONG ulStatus;\r
+ volatile avr32_usart_t *usart0 = &AVR32_USART0;\r
+ portBASE_TYPE retstatus;\r
+\r
+ /* What caused the interrupt? */\r
+ ulStatus = usart0->csr & usart0->imr;\r
+\r
+ if (ulStatus & AVR32_USART_CSR_TXRDY_MASK)\r
+ {\r
+ /* The interrupt was caused by the THR becoming empty. Are there any\r
+ more characters to transmit?\r
+ Because FreeRTOS is not supposed to run with nested interrupts, put all OS\r
+ calls in a critical section . */\r
+ portENTER_CRITICAL();\r
+ retstatus = xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWokenByTx );\r
+ portEXIT_CRITICAL();\r
+\r
+ if (retstatus == pdTRUE)\r
+ {\r
+ /* A character was retrieved from the queue so can be sent to the\r
+ THR now. */\r
+ usart0->thr = cChar;\r
+ }\r
+ else\r
+ {\r
+ /* Queue empty, nothing to send so turn off the Tx interrupt. */\r
+ usart0->idr = AVR32_USART_IDR_TXRDY_MASK;\r
+ }\r
+ }\r
+\r
+ if (ulStatus & AVR32_USART_CSR_RXRDY_MASK)\r
+ {\r
+ /* The interrupt was caused by the receiver getting data. */\r
+ cChar = usart0->rhr; //TODO\r
+\r
+ /* Because FreeRTOS is not supposed to run with nested interrupts, put all OS\r
+ calls in a critical section . */\r
+ portENTER_CRITICAL();\r
+ retstatus = xQueueSendFromISR(xRxedChars, &cChar, pdFALSE);\r
+ portEXIT_CRITICAL();\r
+\r
+ if( retstatus )\r
+ {\r
+ xTaskWokenByRx = pdTRUE;\r
+ }\r
+ }\r
+\r
+ /* The return value will be used by portEXIT_SWITCHING_ISR() to know if it\r
+ should perform a vTaskSwitchContext(). */\r
+ return ( xTaskWokenByTx || xTaskWokenByRx );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * USART0 interrupt service routine.\r
+ */\r
+#if __GNUC__\r
+ __attribute__((__naked__))\r
+#elif __ICCAVR32__\r
+ #pragma shadow_registers = full // Naked.\r
+#endif\r
+\r
+static void vUSART0_ISR( void )\r
+{\r
+ /* This ISR can cause a context switch, so the first statement must be a\r
+ call to the portENTER_SWITCHING_ISR() macro. This must be BEFORE any\r
+ variable declarations. */\r
+ portENTER_SWITCHING_ISR();\r
+ \r
+ prvUSART0_ISR_NonNakedBehaviour();\r
+ \r
+ /* Exit the ISR. If a task was woken by either a character being received\r
+ or transmitted then a context switch will occur. */\r
+ portEXIT_SWITCHING_ISR();\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+\r
+/*\r
+ * Init the serial port for the Minimal implementation.\r
+ */\r
+xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )\r
+{\r
+xComPortHandle xReturn = serHANDLE;\r
+volatile avr32_usart_t *usart0 = &AVR32_USART0;\r
+int cd; /* USART0 Clock Divider. */\r
+\r
+ /* Create the rx and tx queues. */\r
+ vprvSerialCreateQueues( uxQueueLength, &xRxedChars, &xCharsForTx );\r
+\r
+ /* Configure USART0. */\r
+ if( ( xRxedChars != serINVALID_QUEUE ) &&\r
+ ( xCharsForTx != serINVALID_QUEUE ) &&\r
+ ( ulWantedBaud != ( unsigned portLONG ) 0 ) )\r
+ {\r
+ portENTER_CRITICAL();\r
+ {\r
+ /**\r
+ ** Reset USART0.\r
+ **/\r
+ /* Disable all USART0 interrupt sources to begin... */\r
+ usart0->idr = 0xFFFFFFFF;\r
+\r
+ /* Reset mode and other registers that could cause unpredictable\r
+ behaviour after reset */\r
+ usart0->mr = 0; /* Reset Mode register. */\r
+ usart0->rtor = 0; /* Reset Receiver Time-out register. */\r
+ usart0->ttgr = 0; /* Reset Transmitter Timeguard register. */\r
+\r
+ /* Shutdown RX and TX, reset status bits, reset iterations in CSR, reset NACK\r
+ and turn off DTR and RTS */\r
+ usart0->cr = AVR32_USART_CR_RSTRX_MASK |\r
+ AVR32_USART_CR_RSTTX_MASK |\r
+ AVR32_USART_CR_RXDIS_MASK |\r
+ AVR32_USART_CR_TXDIS_MASK |\r
+ AVR32_USART_CR_RSTSTA_MASK |\r
+ AVR32_USART_CR_RSTIT_MASK |\r
+ AVR32_USART_CR_RSTNACK_MASK |\r
+ AVR32_USART_CR_DTRDIS_MASK |\r
+ AVR32_USART_CR_RTSDIS_MASK;\r
+\r
+ /**\r
+ ** Configure USART0.\r
+ **/\r
+ /* Enable USART0 RXD & TXD pins. */\r
+ gpio_enable_module_pin(AVR32_USART0_RXD_0_PIN, AVR32_USART0_RXD_0_FUNCTION);\r
+ gpio_enable_module_pin(AVR32_USART0_TXD_0_PIN, AVR32_USART0_TXD_0_FUNCTION);\r
+\r
+ /* Set the USART0 baudrate to be as close as possible to the wanted baudrate. */\r
+ /*\r
+ * ** BAUDRATE CALCULATION **\r
+ *\r
+ * Selected Clock Selected Clock\r
+ * baudrate = ---------------- or baudrate = ----------------\r
+ * 16 x CD 8 x CD\r
+ *\r
+ * (with 16x oversampling) (with 8x oversampling)\r
+ */\r
+\r
+ if( ulWantedBaud < ( configCPU_CLOCK_HZ / 16 ) )\r
+ {\r
+ /* Use 8x oversampling */\r
+ usart0->mr |= (1<<AVR32_USART_MR_OVER_OFFSET);\r
+ cd = configCPU_CLOCK_HZ / (8*ulWantedBaud);\r
+\r
+ if( cd < 2 ) \r
+ {\r
+ return serINVALID_COMPORT_HANDLER;\r
+ }\r
+\r
+ usart0->brgr = (cd << AVR32_USART_BRGR_CD_OFFSET);\r
+ } \r
+ else \r
+ {\r
+ /* Use 16x oversampling */\r
+ usart0->mr &= ~(1<<AVR32_USART_MR_OVER_OFFSET);\r
+ cd = configCPU_CLOCK_HZ / (16*ulWantedBaud);\r
+\r
+ if( cd > 65535 ) \r
+ {\r
+ /* Baudrate is too low */\r
+ return serINVALID_COMPORT_HANDLER;\r
+ }\r
+ }\r
+\r
+ usart0->brgr = (cd << AVR32_USART_BRGR_CD_OFFSET);\r
+\r
+ /* Set the USART0 Mode register: Mode=Normal(0), Clk selection=MCK(0),\r
+ CHRL=8, SYNC=0(asynchronous), PAR=None, NBSTOP=1, CHMODE=0, MSBF=0,\r
+ MODE9=0, CKLO=0, OVER(previously done when setting the baudrate),\r
+ other fields not used in this mode. */\r
+ usart0->mr |= ((8-5) << AVR32_USART_MR_CHRL_OFFSET ) |\r
+ ( 4 << AVR32_USART_MR_PAR_OFFSET ) |\r
+ ( 1 << AVR32_USART_MR_NBSTOP_OFFSET);\r
+\r
+ /* Write the Transmit Timeguard Register */\r
+ usart0->ttgr = 0;\r
+\r
+ \r
+ /* Register the USART0 interrupt handler to the interrupt controller and\r
+ enable the USART0 interrupt. */\r
+ INTC_register_interrupt((__int_handler)&vUSART0_ISR, AVR32_USART0_IRQ, INT1);\r
+\r
+ /* Enable USART0 interrupt sources (but not Tx for now)... */\r
+ usart0->ier = AVR32_USART_IER_RXRDY_MASK;\r
+\r
+ /* Enable receiver and transmitter... */\r
+ usart0->cr |= AVR32_USART_CR_TXEN_MASK | AVR32_USART_CR_RXEN_MASK;\r
+ }\r
+ portEXIT_CRITICAL();\r
+ }\r
+ else\r
+ {\r
+ xReturn = serINVALID_COMPORT_HANDLER;\r
+ }\r
+\r
+ return xReturn;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime )\r
+{\r
+ /* The port handle is not required as this driver only supports UART0. */\r
+ ( void ) pxPort;\r
+\r
+ /* Get the next character from the buffer. Return false if no characters\r
+ are available, or arrive before xBlockTime expires. */\r
+ if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )\r
+ {\r
+ return pdTRUE;\r
+ }\r
+ else\r
+ {\r
+ return pdFALSE;\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vSerialPutString( xComPortHandle pxPort, const signed portCHAR * const pcString, unsigned portSHORT usStringLength )\r
+{\r
+signed portCHAR *pxNext;\r
+\r
+ /* NOTE: This implementation does not handle the queue being full as no\r
+ block time is used! */\r
+\r
+ /* The port handle is not required as this driver only supports UART0. */\r
+ ( void ) pxPort;\r
+\r
+ /* Send each character in the string, one at a time. */\r
+ pxNext = ( signed portCHAR * ) pcString;\r
+ while( *pxNext )\r
+ {\r
+ xSerialPutChar( pxPort, *pxNext, serNO_BLOCK );\r
+ pxNext++;\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )\r
+{\r
+volatile avr32_usart_t *usart0 = &AVR32_USART0;\r
+\r
+ /* Place the character in the queue of characters to be transmitted. */\r
+ if( xQueueSend( xCharsForTx, &cOutChar, xBlockTime ) != pdPASS )\r
+ {\r
+ return pdFAIL;\r
+ }\r
+\r
+ /* Turn on the Tx interrupt so the ISR will remove the character from the\r
+ queue and send it. This does not need to be in a critical section as\r
+ if the interrupt has already removed the character the next interrupt\r
+ will simply turn off the Tx interrupt again. */\r
+ usart0->ier = (1 << AVR32_USART_IER_TXRDY_OFFSET);\r
+\r
+ return pdPASS;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vSerialClose( xComPortHandle xPort )\r
+{\r
+ /* Not supported as not required by the demo application. */\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+/*###########################################################*/\r
+\r
+/*\r
+ * Create the rx and tx queues.\r
+ */\r
+static void vprvSerialCreateQueues( unsigned portBASE_TYPE uxQueueLength, xQueueHandle *pxRxedChars, xQueueHandle *pxCharsForTx )\r
+{\r
+ /* Create the queues used to hold Rx and Tx characters. */\r
+ xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );\r
+ xCharsForTx = xQueueCreate( uxQueueLength + 1, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );\r
+\r
+ /* Pass back a reference to the queues so the serial API file can\r
+ post/receive characters. */\r
+ *pxRxedChars = xRxedChars;\r
+ *pxCharsForTx = xCharsForTx;\r
+}\r
+/*-----------------------------------------------------------*/\r
projects / freertos / commitdiff
