Added portMEMORY_BARRIER() implemented as __asm volatile( "" ::: "memory" ) into...

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@2650 1d2547de-c912-0410-9cb9-b8ca96c0e9e2

diff --git a/FreeRTOS/Source/portable/GCC/ARM_CA53_64_BIT/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM_CA53_64_BIT/portmacro.h
index 15ca36b945901d9973efc8d6c87eed7b316b08e0..9825cbcdab2896e2eedd194640451a1f51a55f64 100644 (file)
--- a/FreeRTOS/Source/portable/GCC/ARM_CA53_64_BIT/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/ARM_CA53_64_BIT/portmacro.h
@@ -205,5 +205,7 @@ number of bits implemented by the interrupt controller. */
 #define portICCBPR_BINARY_POINT_REGISTER                                       ( *( ( const volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCBPR_BINARY_POINT_OFFSET ) ) )\r
 #define portICCRPR_RUNNING_PRIORITY_REGISTER                           ( *( ( const volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCRPR_RUNNING_PRIORITY_OFFSET ) ) )\r
 \r
+#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )\r
+\r
 #endif /* PORTMACRO_H */\r
 \r

diff --git a/FreeRTOS/Source/portable/GCC/ARM_CA9/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM_CA9/portmacro.h
index a8be773520636a227b5c0d2d954e66e93e57fb65..a47387720eae9848e893abcdf44cb002072e130f 100644 (file)
--- a/FreeRTOS/Source/portable/GCC/ARM_CA9/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/ARM_CA9/portmacro.h
@@ -202,5 +202,7 @@ number of bits implemented by the interrupt controller. */
 #define portICCBPR_BINARY_POINT_REGISTER                                       ( *( ( const volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCBPR_BINARY_POINT_OFFSET ) ) )\r
 #define portICCRPR_RUNNING_PRIORITY_REGISTER                           ( *( ( const volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCRPR_RUNNING_PRIORITY_OFFSET ) ) )\r
 \r
+#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )\r
+\r
 #endif /* PORTMACRO_H */\r
 \r

diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM0/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM_CM0/portmacro.h
index 1552ac0389d08bc68d2e8b5eafdf25f135863533..2392bfb3c1b566bd93785eb45e704aacdef116c4 100644 (file)
--- a/FreeRTOS/Source/portable/GCC/ARM_CM0/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/ARM_CM0/portmacro.h
@@ -107,6 +107,8 @@ extern void vClearInterruptMaskFromISR( uint32_t ulMask )  __attribute__((naked)
 \r
 #define portNOP()\r
 \r
+#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )\r
+\r
 #ifdef __cplusplus\r
 }\r
 #endif\r

diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM3/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM_CM3/portmacro.h
index 71c09de47b656ddd7e71d9596c2329e08aa6b6fb..cd6fb375f2b01dca21d72b49c4c61e54920bda14 100644 (file)
--- a/FreeRTOS/Source/portable/GCC/ARM_CM3/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/ARM_CM3/portmacro.h
@@ -233,6 +233,7 @@ portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
 }\r
 /*-----------------------------------------------------------*/\r
 \r
+#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )\r
 \r
 #ifdef __cplusplus\r
 }\r

diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM3_MPU/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM_CM3_MPU/portmacro.h
index 08efbd4124065132d460d8bb622cb0e9a9f112b9..f0e51fbfb3b191ddfeadacb74c2f74c2a59ccd52 100644 (file)
--- a/FreeRTOS/Source/portable/GCC/ARM_CM3_MPU/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/ARM_CM3_MPU/portmacro.h
@@ -291,6 +291,7 @@ portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
 }\r
 /*-----------------------------------------------------------*/\r
 \r
+#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )\r
 \r
 #ifdef __cplusplus\r
 }\r

diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h
index 85c718c8be8f484473808ac039329a0abed846c5..261c5ae6c5eca71276201d6779863453c3114a4e 100644 (file)
--- a/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h
@@ -233,6 +233,7 @@ portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
 }\r
 /*-----------------------------------------------------------*/\r
 \r
+#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )\r
 \r
 #ifdef __cplusplus\r
 }\r

diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM4_MPU/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM_CM4_MPU/portmacro.h
index 08efbd4124065132d460d8bb622cb0e9a9f112b9..f0e51fbfb3b191ddfeadacb74c2f74c2a59ccd52 100644 (file)
--- a/FreeRTOS/Source/portable/GCC/ARM_CM4_MPU/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/ARM_CM4_MPU/portmacro.h
@@ -291,6 +291,7 @@ portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
 }\r
 /*-----------------------------------------------------------*/\r
 \r
+#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )\r
 \r
 #ifdef __cplusplus\r
 }\r

diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h
index 434132742523932d6dbeb890c9418c233590e8d8..aa28b51e064fe6320e821dfb81748d0c39a652f5 100644 (file)
--- a/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h
@@ -237,6 +237,7 @@ portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
 }\r
 /*-----------------------------------------------------------*/\r
 \r
+#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )\r
 \r
 #ifdef __cplusplus\r
 }\r

diff --git a/FreeRTOS/Source/portable/GCC/ARM_CR5/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM_CR5/portmacro.h
index b93ca71632b9c71990c5c3b9944846df0f1c61d9..111cdc33a8cf9a691b6ad7f50885efcef0f5e9ae 100644 (file)
--- a/FreeRTOS/Source/portable/GCC/ARM_CR5/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/ARM_CR5/portmacro.h
@@ -189,5 +189,7 @@ number of bits implemented by the interrupt controller. */
 #define portICCBPR_BINARY_POINT_REGISTER                                       ( *( ( const volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCBPR_BINARY_POINT_OFFSET ) ) )\r
 #define portICCRPR_RUNNING_PRIORITY_REGISTER                           ( *( ( const volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCRPR_RUNNING_PRIORITY_OFFSET ) ) )\r
 \r
+#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )\r
+\r
 #endif /* PORTMACRO_H */\r
 \r

diff --git a/FreeRTOS/Source/portable/GCC/ARM_CRx_No_GIC/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM_CRx_No_GIC/portmacro.h
index 595cade212c9bbcc22ded99fef2b8add35d08ec6..a4510acf82026e8f11bd86d2ef5fcbcf121cae9c 100644 (file)
--- a/FreeRTOS/Source/portable/GCC/ARM_CRx_No_GIC/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/ARM_CRx_No_GIC/portmacro.h
@@ -164,6 +164,8 @@ void vPortTaskUsesFPU( void );
 #define portNOP() __asm volatile( "NOP" )\r
 #define portINLINE __inline\r
 \r
+#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )\r
+\r
 #ifdef __cplusplus\r
        } /* extern C */\r
 #endif\r

diff --git a/FreeRTOS/Source/portable/GCC/RISC-V/portmacro.h b/FreeRTOS/Source/portable/GCC/RISC-V/portmacro.h
index c43cd92e17ae501678a05e8d7cf411885b410485..5cc1261d96956e801705bf0b053aefa825e2f7fd 100644 (file)
--- a/FreeRTOS/Source/portable/GCC/RISC-V/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/RISC-V/portmacro.h
@@ -144,6 +144,8 @@ not necessary for to use this port.  They are defined so the common demo files
        #define portFORCE_INLINE inline __attribute__(( always_inline))\r
 #endif\r
 \r
+#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )\r
+\r
 #ifdef __cplusplus\r
 }\r
 #endif\r